Apparatus for transmitting and receiving a signal and method of transmitting and receiving a signal

[0001] The present invention relates to a method of transmitting and receiving a signal and a device for transmitting and receiving a signal, and more specifically, a method of transmitting and receiving a signal and a device for transmitting and receiving a signal that are capable of improving the efficiency of data transmission.

Description of related field [0002] Thanks to the development of digital broadcasting technology, users can receive a high definition (HD) moving image. With the continuous development of the compression algorithm and high performance of computer hardware, users will have better conditions in the future. A digital television (DTV) system can receive a digital broadcast signal and provide users with various additional services as well as a video signal and an audio signal.

[0003] The Digital Video Broadcasting (DVB) -C2 standard is the third specification that joined the DVB family of second generation transmission systems. Developed in 1994, currently DVB-C is used in over 50 million cable tuners worldwide. In line with other second-generation DVB systems, DVB-C2 uses a combination of Lowdensity Parity Check (LDPC) codes and BCH codes. This strong error correction correction (FEC) improves the signal to noise ratio by about 5 dB relative to DVB-C. Appropriate bit interleaving schemes optimize the overall robustness of the FEC system. These frames and their header are referred to as Physical Layer Pipes (PLPs). One or more PLPs are multiplexed to data segments. Two-dimensional interleaving (in time and frequency domains) is used for each segment, which allows the receiver to eliminate the effects of pulse weakening and selective frequency interference, such as single frequency input.

[0004] With the development of these digital broadcasting technologies, the requirements for services related to, for example, video and audio signals as well as the amount of data desired by users or the number of broadcast channels have gradually increased. In the ETSI Digital video broadcasting (DVB) online publication "Frame structure channel coding and modulation for a second generation digital terrestrial television broadcasting system (DVB-T2)", October 1, 2008. (2008-1001), describes the techniques of channel frame coding structure for broadcast systems.

SUMMARY OF THE INVENTION [0005] Accordingly, the present invention is directed to a method of transmitting and receiving a signal and to a device for transmitting and receiving a signal that substantially eliminates one or more problems resulting from the limitations and disadvantages of the methods and devices known in the art.

[0006] It is an object of the present invention to provide a method of transmitting and receiving a signal and an apparatus for transmitting and receiving a signal that are capable of improving the efficiency of data transmission.

[0007] Another object of the present invention is to provide a method of transmitting and receiving a signal and an apparatus for transmitting and receiving a signal that are capable of improving the error correction capability of the service configuration bits.

[0008] Additional advantages, objects, and features of the invention will be presented in part in the following description and in part will become apparent to those of ordinary skill in the art after analyzing the following. The objects and other advantages of the invention can be realized and attained by the structure particularly indicated in the description and claims as well as in the accompanying drawings.

[0009] To achieve these goals, the present invention provides a transmitter for transmitting broadcasting data, a transmitter comprising: first coding means using Forward Error Correction (FEC) to encode FEC encoding of physical layer pipe data. Physical Layer Pipe, PLP); second FEC encoding elements for FEC encoding Layer 1 signaling data; and frame construction components for FEC encoded PLP data and FEC encoded Layer 1 signaling data to form a signal frame in which the signal frame comprises preamble symbols carrying Layer 1 signaling data and data symbols carrying PLP data in which the preamble symbols comprise L1 blocks that are repeated in the frequency domain in which at least one of L1 blocks contains 3408 subcarriers, wherein the Layer 1 signaling data includes PLP_type information indicating whether the PLP is a common PLP or the PLP of the normal data or the PLP of the grouped data and the Layer 1 signal data then includes the PLP_bundle_Flag information, which PLP_bundle_Flag information indicates whether the PLP is associated in bundles with other PLPs within the broadcast system or not, and in which bundled PLP, which carries at least one service is demultiplexed into many data segments.

[0010] Still another embodiment of the present invention provides a receiver for processing broadcasting data, a receiver comprising: frame syntax analyzing elements for a signal frame syntax analyzing preamble symbols carrying Layer 1 signaling data and data symbols carrying Physical Layer Pipe data. PLP) and sending PLP data and Layer 1 signaling data; the first decoding elements using advance error correction Forward Error Correction (FEC) to decode FEC PLP data; and second FEC decoding elements for decoding FEC Layer 1 signaling data in which the preamble symbols comprise L1 blocks that are repeated in the frequency domain in which at least one of L1 blocks contains 3408 subcarriers in which Layer 1 signaling data includes PLP_type information whether the PLP is a common PLP or a PLP of normal data, or the PLP grouped data and Layer 1 signaling data then contain PLP_bundle_Flag information, which PLP_bundle_Flag information indicates whether the PLP is bundled with other PLPs within the broadcast system or not and in which the bundled PLP that carries at least one service is demultiplexed into multiple data segments.

[0011] Yet another embodiment of the present invention provides a method of processing broadcasting data, the method comprising: analyzing the syntax of a signal frame comprising preamble symbols carrying Layer 1 signaling data and data symbols carrying Physical Layer Pipe (PLP) data and sending PLP data and Layer 1 signaling data; decoding PLP data using advance error correction (ang. Forward Error Correction, FEC); and FEC decoding Layer 1 signaling data in which the preamble symbols comprise L1 blocks that are repeated in the frequency domain in which at least one of L1 blocks contains 3408 subcarriers in which Layer 1 signaling data includes PLP_type information indicating whether the stream

PLP is a common PLP, or PLP of normal data, or PLP of grouped data and Layer 1 signaling data then includes PLP_bundle_Flag information, which PLP_bundle_Flag information indicates whether PLP is bundled with other PLPs within the broadcast system, or no, and in which the bundled PLP that carries at least one service is demultiplexed into multiple data segments.

[0012] Yet another embodiment of the present invention provides a method of transmitting broadcasting data, the method comprising: encoding Physical Layer Pipe (PLP) data utilizing ahead error correction. Forward Error Correction, FEC); FEC encoding Layer 1 signaling data; and assembling the FEC encoded PLP data and the FEC encoded Layer 1 signaling data to form a signal frame in which the signal frame comprises preamble symbols carrying Layer 1 signaling data and data symbols carrying PLP data in which the preamble symbols comprise L1 blocks that are repeated in the frequency domain in which at least one of the L1 blocks contains 3408 subcarriers, wherein the Layer 1 signaling data includes PLP_type information indicating whether the PLP is a common PLP or the PLP of the normal data or the PLP of the grouped data and the Layer 1 signal data then includes the PLP_bundle_Flag information, which PLP_bundle_Flag information indicates whether the PLP is associated in bundles with other PLPs within the broadcast system or not, and in which bundled PLP, which carries at least one service is demultiplexed into many data segments.

DESCRIPTION OF THE PREFERRED EMBODIMENTS [0013] The accompanying figures of the drawings which are included herein to enable further understanding of the invention and are incorporated herein and form part of the present application, illustrate an example (s) of the implementation of the invention and together with the description serve to explain the essence of the invention. In the figures of the drawing:

[0014] Fig. 1 is an example of digital broadcasting system.

[0015] Fig. 2 is an example of an input processor.

[0016] Fig. 3 shows information that can be included in the base band (BB).

[0017] Fig. 4 is an example of BICM module.

[0018] Fig. 5 is an example of shortened / punctured encoder.

[0019] Fig. 6 is an example of using various constellations.

[0020] Fig. 7 is another example of cases where compatibility between conventional systems is considered.

[0021] Fig. 8 is a frame structure which comprises preamble for L1 signaling and data symbol for PLP data.

[0022] Fig. 9 is an example of a frame builder.

[0023] Fig. 10 is an example of pilot insertion module 404 of Fig. 4.

[0024] Fig. 11 is an SP structure.

[0025] Fig. 12 shows a new SP structure or pilot pattern (PP5 ').

[0026] Fig. 13 is a suggested PP5 'structure.

[0027] Fig. 14 is a relationship between data symbol and preamble.

[0028] Fig. 15 is another relationship between data symbol and preamble.

[0029] Fig. 16 is an example of cable television delay profile.

[0030] Fig. 17 is a scattered pilot structure that uses z = 56 and z = 112. [0031] Fig. 18 is an example of a modulator based on OFDM.

[0032] Fig. 19 is an example of Preamble structure.

[0033] Fig. 20 is an example of Preamble decoding.

[0034] Fig. 21 is a method of designing a more optimized preamble.

[0035] Fig. 22 is another example of preamble structure [0036] Fig. 23 is another example of preamble decoding.

[0037] Fig. 24 is an example of Preamble structure.

[0038] Fig. 25 is an example of L1 decoding.

[0039] Fig. 26 is an example of analog processor.

[0040] Fig. 27 is an example of digital receiver system.

[0041] Fig. 28 is an example of analog processor used at the receiver.

[0042] Fig. 29 is an example of demodulator.

[0043] Fig. 30 is an example of frame parser.

[0044] Fig. 31 is an example of BICM demodulator.

[0045] Fig. 32 is an example of LDPC decoding using shortening / puncturing. [0046] Fig. 33 is an example of output processor.

[0047] Fig. 34 is an example of L1 block repetition rate of 8 MHz.

[0048] Fig. 35 is an example of L1 block repetition rate of 8 MHz.

[0049] Fig. 36 is a new L1 block repetition rate of 7.61 MHz.

[0050] Fig. 37 is an example of L1 signaling which is transmitted in the frame header. [0051] Fig. 38 is a simulation result of a preamble structure and L1 block.

[0052] Fig. 39 is an example of symbol interleaver.

[0053] Fig. 40 is an example of transmitting L1 block.

[0054] Fig. 41 is showing another example of L1 signaling which is transmitted within the frame header.

[0055] Fig. 42 is an example of frequency or time interleaving / deinterleaving.

[0056] Fig. 43 is a table showing L1 block signal overhead analysis which is transmitted in the FECFRAME header in the ModCod 307 header inserting module on the BICM module data path of Fig. 3.

[0057] Fig. 44 is showing a structure for a FECFRAME header to minimize the overhead.

[0058] Fig. 45 is showing the performance of a bit error rate (BER) of the above mentioned L1 block protection.

[0059] Fig. 46 is showing examples of a transmission frame and FEC frame structure. [0060] Fig. 47 is showing an example of L1 signaling.

[0061] Fig. 48 is showing an example of L1-pre signaling.

[0062] Fig. 49 is showing a structure of L1 signaling block.

[0063] Fig. 50 is showing a L1 time interleaving.

[0064] Fig. 51 is showing an example of extracting modulation and code information.

[0065] Fig. 52 is showing another example of L1-pre signaling.

[0066] Fig. 53 is showing an example of scheduling of L1 signaling block that is transmitted in preamble.

[0067] Fig. 54 is showing an example of L1-pre signaling where power boosting is considered.

[0068] Fig. 55 is showing an example of L1 signaling.

[0069] Fig. 56 is showing another example of extracting modulation and code information.

[0070] Fig. 57 is showing another example of extracting modulation and code information.

[0071] Fig. 58 is an example of L1-pre synchronization.

[0072] Fig. 59 is showing an example of L1-pre signaling.

[0073] Fig. 60 is showing an example of L1 signaling.

[0074] Fig. 61 is an example of L1 signaling path.

[0075] Fig. 62 is showing another example of L1 signaling which is transmitted within the frame header.

[0076] Fig. 63 is showing another example of L1 signaling which is transmitted within the frame header.

[0077] Fig. 64 is showing another example of L1 signaling which is transmitted within the frame header.

[0078] Fig. 65 is showing an example of L1 signaling.

[0079] Fig. 66 is an example of symbol interleaver.

[0080] Fig. 67 is showing the interleaving performance of time interleaver of Fig. 66.

[0081] Fig. 68 is an example of symbol interleaver.

[0082] Fig. 69 is showing the interleaving performance of time interleaver of Fig. 68.

[0083] Fig. 70 is an example of symbol deinterleaver.

[0084] Fig. 71 is another example of time interleaving.

[0085] Fig. 72 is an result of interleaving using the method shown in Fig. 71. [0086] Fig. 73 is an example of the addressing method of Fig. 72.

[0087] Fig. 74 is another example of L1 time interleaving.

[0088] Fig. 75 is an example of symbol deinterleaver.

[0089] Fig. 76 is another example of deinterleaver.

[0090] Fig. 77 is an example of symbol deinterleaver.

[0091] Fig. 78 is an example of row and column addresses for time deinterleaving.

[0092] Fig. 79 is an example of general block interleaving in a data symbol domain where pilots are not used.

[0093] Fig. 80 is an example of an OFDM transmitter which uses data slices.

[0094] Fig. 81 is an example of an OFDM receiver which uses data slice.

[0095] Fig. 82 is an example of time interleaver and an example of time deinterleaver.

[0096] Fig. 83 is an example of creating OFDM symbols.

[0097] Fig. 84 is an example of time interleaver (Time Interleaver, TI).

[0098] Fig. 85 is an example of time interleaver (Time Interleaver, TI).

[0099] Fig. 86 is showing an example of a preamble structure at a transmitter and an example of processing at a receiver.

[0100] Fig. 87 is showing an example of processing at a receiver to obtain L1_XFEC_FRAME from a preamble.

[0101] Fig. 88 is showing an example of a preamble structure at a transmitter and an example of processing at a receiver.

[0102] Fig. 89 is an example of time interleaver (Time Interleaver, TI).

[0103] Fig. 90 is an example of an OFDM transmitter using data slices.

[0104] Fig. 91 is an example of an OFDM receiver using data slices.

[0105] Fig. 92 is an example of Time Interleaver (Time Interleaver, TI).

[0106] Fig. 93 is an example of Time Deinterleaver (Time De-Interleaver, TDI). [0107] Fig. 94 is an example of Time Interleaver (Time Interleaver, TI).

[0108] Fig. 95 is an example of preamble time interleaving flow.

[0109] Fig. 96 is a time interleaving depth parameter in L1 signaling header.

[0110] Fig. 97 is showing an example of L1 signaling header, L1 structure and data block padding method.

[0111] Fig. 98 is showing an example of L1 signaling.

[0112] Fig. 99 is an example of dslice_ti_depth.

[0113] Fig. 100 is an example of dslice_type.

[0114] Fig. 101 shows an example of plp_type.

[0115] Fig. 102 shows an example of Plp_payload_type.

[0116] Fig. 103 is an example of Plp_modcod field.

[0117] Fig. 104 shows an example of GI.

[0118] Fig. 105 shows an example of PAPR.

[0119] Fig. 106 shows an example of L1 signaling.

[0120] Fig. 107 is an example of plp_type field.

[0121] Fig. 108 is an example of L1 signaling.

[0122] Fig. 109 is an example of L1 signaling header, L1 structure, and data block padding method.

[0123] Fig. 110 is an example of L1 signaling.

[0124] Fig. 111 is showing examples of L1 signaling fields.

[0125] Fig. 112 is showing an example of L1 signaling.

[0126] Fig. 113 shows an example of plp_type.

[0127] Fig. 114 shows an example of L1 signaling and L2 signaling for normal and bundled PLP types.

[0128] Fig. 115 is an example of L1 and L2 decoding flow of activity through a conventional DVB-C2 receiver using a single 8 MHz tuner.

[0129] Fig. 116 is an example of L1 and L2 decoding flow of activity through an improved DVB-C2 receiver using multiple tuners or a single broadband tuner.

[0130] Fig. 117 is an example of C2 L2 signaling.

[0131] Fig. 118 is an example of the duration of the active OFDM symbol.

[0132] Fig. 119 shows an example of value of the inter-channel interval.

[0133] Fig. 120 is an example of L1 signaling.

[0134] Fig. 121 is an example of L1 block interleaving over time.

DESCRIPTION OF THE PREFERRED EMBODIMENTS [0135] Detailed information will now be provided regarding preferred embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers will be used in all figures of the drawing to refer to the same or similar parts.

[0136] In the description below, the term "service" as used indicates a broadcast content that may be transmitted / received by a signal transmitting / receiving device.

[0137] Fig. 1 shows an example of a digital broadcasting system according to an embodiment of the present invention. Inputs can include multiple MPEG-TS streams or GSE streams (encapsulated streams using the General Stream Encapsulation scheme). The input processor module 101 can add transmission parameters to the input stream and perform scheduling for the BICM 102 module. BICM 102 may add redundancy and interleaving data to correct a transmission channel error. Frame builder 103 can build frames by adding physical layer signaling information and pilots. Modulator 104 can perform modulation on input symbols by effective methods. The analog processor 105 may perform various processes to convert the digital input signals into analog output signals.

[0138] Fig. 2 shows an example of an input processor. The MPEG-TS or GSE input stream can be converted by the total input preprocessor in n streams that will be processed independently. Each of these streams may be in the form of a complete TS frame that contains components for multiple services, or in the form of a minimal TS frame that includes components for a service (i.e., video or audio). In addition, each of these streams may be a GSE stream that broadcasts multiple services or a single service.

[0139] Input interface module 202-1 may allocate a number of input bits equal to the maximum data field capacity of a Baseband (BB) frame. A padding may be inserted to fill the block capacity of the LDPC / BCH code. The input stream synchronizing module 203-1 may provide a mechanism for regenerating, in the receiver, the transport stream clock (or generic stream, Generic Stream, in the form of packets) to guarantee from one end to another a constant data rate and constant delay.

[0140] To allow the transport stream to be reconnected without the need for additional memory in the receiver, the input transport streams are delayed by 204-1 ~ n delay compensators, taking into account the PLP data interleaving parameters in the group and the corresponding PLP common stream. Modules that reset the zero packet 205-1 ~ n can increase the transmission efficiency by removing the inserted zero packet for the VBR service case (variable bit rate, variable bit rate). Cyclic redundancy check (CRC) coder modules 206-1 ~ n can add CRC parity to increase the reliability of BB frame transmission. BB header insertion modules 207-1 ~ n can add a BB frame header in the beginning part of a BB frame. The information that can be included in the BB header is shown in Figure 3.

[0141] The Merger / slicer module 208 may perform BB frame slicing from each PLP, merging BB frames from multiple PLPs, and scheduling each BB frame within a transmission frame. In this way, the combining / segmenting module 208 may output L1 signaling information that relates to the allocation of the PLP in the frame. Finally, the BB 209 hash module can randomize bit input streams to minimize the correlation between bits inside the bit streams. The modules that are shaded in Fig. 2 are the modules used when the transmitting system uses a single PLP, while the other modules shown in Fig. 2 are the modules used when the transmitting device uses multiple PLPs.

[0142] Fig. 4 shows an embodiment of the BICM module according to the present invention. Fig. 4a shows the BICM module for the data path and Fig. 4b shows the BICM module for the L1 signal path.

[0143] Referring to Fig. 4a, external encoder 301 and internal encoder 303 can add redundancy to bit input streams to correct errors. The outer interleaver 302 and the inner interleaver 304 can interleave the bits to prevent pulse errors. External interleaver 302 can be omitted if BICM modulation is for DVB-C2. The bit demultiplexer 305 may control the reliability of the output of each bit from the internal interleaver 304. The symbol mapper 306 may map the input bit streams to the symbol streams. At this time, it is possible to use any of the conventional QAM modulations, MQAM modulation that uses the above-mentioned BRGC method to improve performance, NU-QAM modulation that uses non-uniform modulation, or NU-MQAM modulation that uses non-uniform modulation using the method BRGC to improve performance. Combinations of modulations using MQAM and / or NUMQAM may be considered for constructing a system that is more resistant to noise depending on the code rate of the error correction code and the constellation capacity. At this time, the symbol mapper 306 may use the appropriate constellation according to the code rate and constellation capacity. Fig. 6 is an example of such combinations.

[0144] Case 1 illustrates an example of using only NU-MQAM at low code rate to implement a simplified system. Case 2 illustrates an example of using an optimized constellation at each code rate. The transmitter can send information about the code rate of the error correction code and the constellation capacity to the receiver, so that the receiver can use the appropriate constellation. In fig. 7 illustrates another example of cases where compatibility between conventional systems is considered. In addition to these examples, further combinations are possible to optimize the system.

[0145] The ModCod 307 header inserting module shown in Fig. 4 may receive adaptive coding and modulation (ACM) / variable coding and modulation (VCM) feedback and add parameter information used in coding and modulation to the FEC block as header. The header including modulation type / coding efficiency (ModCod) may contain the following information:

* FEC type (1 bit) - long or short LDPC * Coding efficiency (3 bits) * Modulation (3 bits) - up to 64K QAM * PLP identifier (8 bits) [0146] The symbol interleaver 308 can perform interleaving in the symbol domain in for additional interleaving effects. Similar processes performed on the data path can be carried out on the L1 signal path, but using different parameters as possible (301-1 ~ 308-1). At this point, the short / punctured coding module (303-1) can be used for internal coding.

[0147] Fig. 5 shows an example of LDPC encoding using shortening / puncturing. The shortening process can be carried out on input blocks that contain fewer bits than the required number of bits for LDPC coding, because the zero input bits 301c may have a plurality of zero bits required for LDPC encoding. The bit input streams with zeros can contain parity bits throughout the LDPC 302c encoder. At this time, zeros (303c) may be removed to obtain bit streams that correspond to the original bit streams, and to obtain parity of bit streams, piercing through the parity piercing module 304c may be performed according to the coding efficiency. These processed information bit streams and even bit streams can be multiplexed to the original sequences and output to the 305c multiplexer.

[0148] Fig. 8 shows a frame structure which comprises preamble for L1 signaling and data symbol for PLP data. It can be seen that the preamble and data symbols are cyclically generated, using one frame as a unit. Data symbols include PLP type 0 that is transmitted using fixed modulation / coding and PLP type 1 that is transmitted using variable modulation / coding. For PLP type 0, information such as modulation, FEC type, and FEC code rate are transmitted in a preamble (see Fig. 9 for frame header insertion module 401). For PLP type 1, appropriate information may be transmitted in the FEC block header of the data symbol (see Fig. 3 for the ModCod 307 header insertion module). As a result of PLP type separation, ModCod overhead can be reduced by 3 ~ 4% relative to the overall transmission rate for PLP type 0 that is transmitted at a constant data rate. At the receiver, in the case of fixed PLP modulation / PLP coding of type 0 PLP, frame header remover r401 shown in Fig. thirty it can extract information about modulation and FEC code rate and provide obtained information to the BICM decoding module. For variable modulation / variable PLP coding of PLP type 1, ModCod extractor modules, r307 and r307-1 shown in Fig. 31 can extract and provide the parameters necessary for BICM decoding. [0149] Fig. 9 shows an example of a frame builder. The frame header insertion module 401 may create a frame from input symbol streams and may add a frame header in front of each transmitted frame. The frame header may contain the following information:

* Number of connected channels (4 bits) * Security interval (2 bits) * PAPR (2 bits) * Pilot signal pattern (2 bits) * Digital System identification (16 bits) * Frame identification (16 bits) * Frame length (16 bits ) - the number of multiplexing symbols divided into Orthogonal Frequency Division Multiplexing (OFDM) per frame * Length of the super frame (16 bits) - number of frames per super frame * number of PLP frames (8 bits) * for each PLP

PLP identification (8 bits) and channel linking id (4 bits)

Beginning of PLP (9 bits)

PLP type (2 bits) - PLP common or other

PLP data block type (5 bits)

Type MC (1 bit) - fixed / variable modulation and coding when type MC == fixed modulation and coding

Type FEC (1 bit) - long or short LDPC

Coding efficiency (3 bits)

Modulation (3 bits) - up to 64K QAM end of loop when;

Number of channel notches (2 bits) for each notch

Cutout start (9 bits)

Cutout width (9 bits)

End of loop for;

PLP width (9 bits) - maximum number of FEC blocks in PLP type PLP time interleaving (2 bits) end of loop for;

* CRC-32 (32 bits) [0150] It is assumed that the channel bonding environment for L1 information transmitted in a frame header and in data that corresponds to each data segment is defined as a PLP. Therefore, information such as PLP identifier, channel bonding identifier, and PLP start address are required for each channel used in combining. In one embodiment of the present invention, it is suggested to send a ModCod data field in the FEC frame header if the PLP type supports variable modulation / variable coding and to send a ModCod data field in the frame header if the PLP type supports fixed modulation / fixed coding to reduce overhead signal. In addition, if there is a notch band for each PLP, by transmitting the start notch address and its width, decoding the appropriate carriers in the receiver may become unnecessary.

[0151] Fig. 10 shows an example of Pilot Pattern 5 (PP5) used in a channel bonding environment. As shown, in case the SP positions coincide with the pilot preamble positions, an irregular pilot structure may occur.

[0152] Fig. 10a shows an example of a pilot insertion module 404 as shown in Fig. 9. As shown in Fig. 10a when a single frequency band is used (e.g., 8

MHz), the available bandwidth is 7.61 MHz, but if multi-frequency bands are combined, the guard bands can be removed, which can significantly increase frequency performance. Fig. 10b shows an example of a preamble inserting module 504 as shown in Fig. 18, which is transmitted in the front of the frame and even in the case of channel bonding, the preamble has a repetition rate of 7.61 MHz, which is the L1 block bandwidth. It is a design that takes into account the bandwidth of the tuner that performs the initial channel scan.

[0153] Pilot Patterns exist for both Preamble and Data Symbols. Scattered pilot (SP) patterns can be used for data symbols. Pilot Pattern (PP5) and Pilot Pattern (PP7) T2 can be good candidates for frequency-only interpolation. Standard PP5 has x = 12, y = 4, z = 48 for GI = 1/64, and standard PP7 has x = 24, y = 4, z = 96 for GI = 1/128. Additional time interpolation is also possible for better channel estimation. Preamble pilot patterns may cover all possible pilot positions to detect the initial channel. In addition, preamble pilot positions should be coincident with SP positions and a single pilot pattern is required for both preamble and SP. Preamble pilots can also be used for time interpolation and each preamble can have an identical pilot pattern. These requirements are important for C2 detection during scanning and necessary for estimating frequency shift using hash sequence correlation. In a channel bonding environment, coincidence in pilot positions should also be maintained during channel bonding because irregular pilot structure may reduce interpolation performance.

[0154] In particular, if the distance z between the distributed pilot signals (SPs) in the OFDM symbol is 48 and if the distance y between the distributed pilot signals (SPs) corresponding to a specific SP carrier along the time axis is 4, the useful distance x after time interpolation will be 12. This is the case when the fraction of the protection interval (GI) is 1/64. If the fraction GI is 1/128, then the parameters x = 24, y = 4, and z = 96 can be used. In the case where channel bonding is used, they may be coincident with pilot positions for the preamble, by generating discontinuous points in the distributed pilot structure.

[0155] At this time, preamble pilot positions may be coincident with all data symbol SP positions. When channel bonding is used, the data segment in which the service is transmitted can be determined regardless of the 8 MHz grain frequency bandwidth. However, to reduce overhead for the address data segment, you can choose a transmission starting at the SP position and ending at the SP position.

[0156] When the receiver receives such SP scattered pilots, if necessary, the channel estimator (r501) shown in Fig. 29 can perform time interpolation to obtain pilots shown in dashed lines in Fig. 10 and can perform frequency interpolation. At this time, in the case of discontinuous points, the intervals of which are designated '32' in Fig. 10a, left and right interpolations can be performed separately or one side can be interpolated, and then the other can be interpolated by using already interpolated pilot positions whose range is 12 as the reference point. At this time, the data slice width may vary within 7.61 MHz, and thus, the receiver can minimize power consumption by performing channel estimation and decoding only necessary subcarriers.

[0157] Fig. 11 is another example of the PP5 pattern used in a channel bonding environment or SP structure to maintain a usable distance of x at 12 to avoid the irregular SP structure of Fig. 10 when channel bonding is used. As shown, if the SP distance is consistently maintained for channel bonding, then there will be no problems during frequency interpolation, but pilot positions between the data symbol and the preamble may not coincide. In other words, this structure does not require additional channel estimation for the irregular SP structure, however, the SP positions used in channel bonding and the preamble pilot positions become different for each channel.

[0158] Fig. 12 shows a new SP or PP5 'structure which aims to provide a solution to the two problems mentioned above in the channel bonding environment. Specifically, a pilot distance of x = 16 can solve these problems. To secure pilot density or maintain the same overhead, PP5 'can have x = 16, y = 3, z = 48 for GI = 1/64 and PP7' can have x = 16, y = 6, z = 96 for GI = 1/128. The ability to interpolate the same frequency can still be maintained. Pilot positions are shown in Fig. 12 for comparison with PP5 structure.

[0159] Fig. 13 shows an example of a new SP Pattern or PP5 'structure in channel bonding environment. As shown in Fig. 46, regardless of whether a single channel or channel bonding is used, a useful pilot distance of x = 16 can be provided. In addition, since it is possible to cause SP positions to coincide with preamble pilot positions, channel estimation deterioration caused by irregularity of the SP or lack of coincidence of the SP position can be avoided. In other words, there is no irregular SP position for the frequency interpolator and coincidence between the preamble and SP positions is ensured.

[0160] Consequently, the proposed new SP patterns can be advantageous in that single SP pattern can be used for both single and bonded channel; no irregular pilot structure can be caused, thus a good channel estimation is possible; both preamble and SP pilot positions can be kept coincident; pilot density may be maintained the same as for PP5 and PP7 patterns, respectively; and the ability to interpolate the same frequency can also be preserved.

[0161] In addition, the preamble structure can meet requirements, such as preamble pilot positions, which should cover all possible SP positions to detect the initial channel; the maximum number of carriers should be 3409 (7.61 MHz) for initial searching; exactly the same pilot and hashing sequence patterns should be used for C2 detection; and no detection-specific preamble such as P1 in T2 is required.

[0162] In terms of relation to the frame structure, the granularity of the data segment position can be modified to 16 carriers rather than 12, so that less overhead associated with positioning can occur and no other problems can be expected regarding the state of the data segment, the state of zero slot, e.t.c.

[0163] Therefore, in the channel estimation module r501 shown in Fig. 62, pilots in each preamble can be used when SP time interpolation of data symbols is performed. Thus, channel detection and channel estimation at frame boundaries can be improved. [0164] Now, given the preamble and pilot design requirements, there is consensus in that positions of preamble pilots and SPs should coincide regardless of channel bonding; the number of all carriers in L1 block should divide by pilot distance to avoid irregular structure at band edge; L1 blocks should be repeated in the frequency domain; and L1 blocks should always be able to be decoded in any position of the tuner window. Additional requirements may be that pilot positions and patterns should be repeated at a period of 8 MHz; the correct carrier frequency shift should be estimated without knowledge of channel bonding; and L1 decoding (reordering) is not possible before the frequency offset is equalized.

[0165] Fig. 14 shows a relationship between data symbol and preamble when preamble structures as shown in Fig. 19 and Fig. 20 are used. L1 block can be repeated by period of 6 MHz. For L1 decoding, both the frequency shift and the preamble shift pattern should be found. L1 decoding is not possible in any tuner position without channel bonding information and the receiver cannot distinguish between preamble shift and frequency shift values.

[0166] Thus, the receiver needs to obtain a channel bonding structure, in particular for the frame header de-traversing element (r401) shown in Fig. 30 to perform L1 signal decoding. Since the expected preamble shift amount in the two vertically shaded areas in Fig. 30 is known, the time / frequency synchronizing element r505 in Fig. 29 can estimate the carrier frequency offset. Based on this estimation, L1 signal path r308-1 - r301-1 shown in Fig. 31 can decode L1 block.

[0167] Fig. 15 shows a relationship between data symbol and preamble when the preamble structure as shown in Fig. 22 is used. L1 block can be repeated by period of 8 MHz. For L1 decoding, only frequency offset needs to be found and knowledge of channel bonding may not be required. The frequency shift can be easily estimated by using the known binary pseudo-random sequence (Pseudo Random Binary Sequence (PRBS). As illustrated in fig. 48, the preamble and data symbols are aligned, and therefore, additional synchronization search may become unnecessary. Therefore, for the receiver, in particular for the header removing element r401 illustrated in Fig. 63, it is sufficient that only the peak correlation value with the pilot hash sequence is obtained to perform L1 signal decoding. The r505 time / frequency synchronizing element shown in Fig. 29 can estimate carrier frequency offset from peak position.

[0168] Fig. 16 shows an example of cable television delay profile.

[0169] From the point of view of pilot design, the widely used GI already over-protects the spread of cable channel delay. In the worst case, redesigning the channel model may be an option. In order to repeat the pattern exactly every 8 MHz, the pilot distance should be a divider of 3584 carriers (z = 32 or 56). A pilot density of z = 32 may increase pilot overhead, and therefore a density of z = 56 may be selected. A slightly smaller delay coverage area may not be relevant for a cable TV channel. For example, it can be 8 μs for PP5 'and 4 μs for PP7', compared to 9.3 μs (PP5) and 4.7 μs (PP7). Significant delays can be covered by both pilot patterns, even in the worst case. For pilot preamble positions, only all SP positions in the data symbol are needed.

[0170] If the -40 dB delay path can be ignored, the actual delay spread may start to be 2.5 μs, 1/64 GI = 7 μs, or 1/128 GI = 3.5 μs. This illustrates that the pilot distance parameter, z = 56 may have a good enough value. In addition, z = 56 may provide a convenient value for constructing a pilot pattern that enables the preamble structure shown in Fig. 48.

[0171] Fig. 17 shows a scattered pilot structure using z = 56 and z = 112, which is constructed at pilot insertion module 404 in Fig. 42. PP5 '(x = 14, y = 4, z = 56) are proposed and PP7 '(x = 28, y = 4, z = 112). Edge carriers can be inserted for the end edge. [0172] As shown in Fig. 50, pilots are aligned at 8 MHz from each edge of the band, every pilot position and pilot structure can be repeated every 8 MHz. In this way, this structure can support the preamble structure shown in Fig. 48. In addition, a common pilot structure between preamble and data symbols can be used. Therefore, the channel estimation module r501 shown in Fig. 29, can perform channel estimation using interpolation on preamble and data symbols, since no irregular pilot pattern may appear, regardless of the window position decided by the location data segment. At this time, using only frequency interpolation, it is possible to sufficiently compensate for channel distortion due to delay spread. If time interpolation is performed in addition, more accurate channel estimation may be performed.

[0173] Consequently, in the new proposed pilot pattern, pilot position and pattern can be repeated based on a period of 8 MHz. A single pilot pattern can be used for both preamble and data symbols. L1 decoding can always be possible without knowledge of channel bonding. In addition, the proposed pilot pattern may not affect co-operation with T2 because the same pilot strategy of scattered pilot pattern may be used; T2 already uses 8 different pilot patterns; and modified pilot patterns may not cause a significant increase in receiver complexity. For a pilot hash sequence, the PRBS period may be 2047 (m-sequence); generating PRBS whose period is 3584 can be reset every 8 MHz; pilot repetition rate of 56 may also be jointly first with period 2047; and you can expect there will be no problems with PAPR.

[0174] Fig. 18 shows an example of a modulator based on OFDM. Input symbol streams can be converted to the time domain by the IFFT 501 module. If necessary, the peak to average power ratio (PAPR) can be reduced in the PAPR 502 decreasing module. In the PAPR methods, the Active constellation extension method can be used. ACE) or tone reservation method (tone reservation). The GI 503 insertion module can copy the last part of the useful OFDM symbol to fill the protection interval in the form of a cyclic prefix.

[0175] Preamble inserting module 504 may insert a preamble in front of each transmitted frame so that the receiver can detect the digital signal, the frame and can collect time / frequency offset data. At this time, the preamble signal may perform signaling at the physical layer of information such as the FFT dimension (3 bits) and the guard interval dimension (3 bits). The preamble inserting module 504 may be omitted if the modulator is intended for DVB-C2.

[0176] Fig. 19 is an example of channel preamble structure generated in Preamble Inserting Module 504 in Fig. 51. One complete L1 block should be "always decodable" in any arbitrary 7.61 MHz tuning window position and should not L1 signal loss occurs regardless of the position of the tuner window. As shown, L1 blocks can be repeated in the frequency domain with a period of 6 MHz. The data symbol can be a combined channel for every 8 MHz. If, for L1 decoding, the receiver uses a tuner, such as the tuner r603 shown in Fig. 28, which uses the 7.61 MHz bandwidth, then the frame header removing element r401 shown in Fig. 30 needs to rearrange the received cyclically shifted block L1 (Fig. 20) to its original form. Such rearrangement is possible because the L1 block is repeated for each 6 MHz block.

[0177] Fig. 21 shows a method of designing a more optimized preamble. The preamble structure shown in Fig. 19 uses only 6 MHz of the total tuner bandwidth 7.61 MHz for L1 decoding. In terms of spectral efficiency, the tuner bandwidth 7.61 MHz is not fully utilized. Therefore, further optimization regarding spectral efficiency can be carried out.

[0178] Fig. 22 shows another example of a preamble structure or preamble symbol structure for full spectral efficiency generated in the frame header insertion module 401 of Fig. 42. Like the data symbol, L1 blocks can be repeated in the frequency domain with a period of 8 MHz. One complete L1 block is still "always decodable" in any arbitrary 7.61 MHz tuning window position. After tuning, 7.61 MHz data can be considered as a virtually punctured code. Thanks to exactly the same frequency bandwidth for both preamble and data symbols and exactly the same pilot structure for both preamble and data symbols, spectral efficiency can be maximized. Other characteristics, such as the cyclic shift property and the lack of sending L1 block in the absence of a data segment, can be kept unchanged. In other words, the preamble symbol bandwidth can be identical to the data symbol bandwidth or, as shown in Fig. 57, the preamble symbol bandwidth can be the tuner bandwidth (in this case, 7.61 MHz). The tuner bandwidth can be defined as the frequency bandwidth that corresponds to the number of all active carriers when a single channel is used. That is, the preamble symbol bandwidth may correspond to the number of all active carriers (in this case 7.61 MHz).

[0179] Fig. 23 shows a virtually punctured code. 7.61 MHz data between the 8 MHz L1 block can be considered coded as punctured code. When the tuner r603, shown in Fig. 28, uses a bandwidth of 7.61 MHz to decode L1, the frame header removing element r401, shown in Fig. 30, needs to regroup the received, cyclically shifted L1 block to its original form as shown in fig. 56. At this time, L1 decoding is performed using the full tuner bandwidth. After rearrangement of the L1 block, the spectrum of the rearranged L1 block may include a blank region within the spectrum as shown in Fig. 23 in the upper right side, because the original dimension of the L1 block is 8 MHz bandwidth.

[0180] After padding the empty area with zeros, or after deinterleaving in the symbol domain by the deinterleaver in the frequency domain r403 in Fig. 30 or by the deinterleaver in the symbol domain r308-1 in Fig. 31 or after deinterleaving in the bit domain, by the symbol demapper r3061, the bit multiplexer r305-1, and the internal deinterleaver r304-1 shown in Fig. 31, the block may have a form that appears to be punctured, as shown in the lower right of Fig. 23. [0181] This L1 block may be decoded in the punctured / shortened decoding module r303-1 shown in Fig. 31. Through using these preamble structures, the tuner's total frequency bandwidth can be used, and thus spectral efficiency and coding efficiency can be increased. In addition, identical frequency bandwidth and pilot structure can be used for preamble and data symbols.

[0182] Additionally, if the preamble bandwidth or preamble symbol bandwidth is set as the tuner bandwidth as shown in Fig. 25, (in this example it is 7.61 MHz), complete rearrangement can be obtained block L1 without even using piercing. In other words, for a frame containing preamble symbols, in which the preamble symbols comprise at least one layer 1 (L1) of the block, it can be said that L1 block contains 3408 active subcarriers and that 3408 active subcarriers correspond to 7.61 MHz from the radio frequency band ( RF) of 8 MHz.

[0183] In this way, spectral efficiency and L1 decoding performance can be maximized. In other words, at the receiver, decoding can be performed in punctured / shortened decoding module r303-1 shown in Fig. 31 after performing symbol deinterleaving only.

[0184] Consequently, the proposed new preamble structure can be advantageous in that it is fully compatible with previously used preamble, except that the bandwidth is different; L1 blocks are repeated with a period of 8 MHz; L1 block can always be decoded, regardless of tuner window position; full tuner bandwidth can be used for L1 decoding; maximum spectrum efficiency can guarantee higher coding efficiency; an incomplete L1 block can be considered as punctured coded; a simple and same pilot structure can be used for both preamble and data; and identical frequency bandwidth can be used for both preamble and data.

[0185] Fig. 26 shows an example of an analog processor. The DAC module (601) can convert a digital input signal to an analog signal. After converting up the transmit frequency bandwidth in the up converter 602 and filtering the analog through an analog filter 603, the signal can be transmitted.

[0186] Fig. 27 shows an example of a digital receiver system according to an embodiment of the present invention. The received signal is converted into a digital signal in the r105 analog processor. The r104 demodulator can convert the signal to frequency domain data. The r103 frame parser can remove pilots and headers and allow selection of information about services that must be decoded. The BICM r102 demodulator can correct errors in the transmission channel. The output processor r101 can restore the originally broadcast service stream and timing information.

[0187] Fig. 28 shows an example of analog processor used at the receiver. The tuner / AGC (Auto Gain Controller) r603 module can select the desired frequency bandwidth from the received signal. The r602 down converter can restore the baseband. The ADC r601 module can convert an analog signal to a digital signal.

[0188] Fig. 29 shows an example of demodulator. The r506 frame detector can detect the preamble, check for a corresponding digital signal, and detect the beginning of the frame. The time / frequency synchronizing element r505 can perform synchronization in time and frequency domains. At this time, a security interval correlation can be used to synchronize in the time domain. To synchronize in the frequency domain, correlation can be used or the offset can be estimated based on the information about the subcarrier phase that is transmitted in the frequency domain. The preamble removing element r504 can remove the preamble from the front of the detected frame. The GI r503 removal element can remove the protective compartment. The FFT module r501 can convert a time domain signal to a frequency domain signal. The channel estimation / equalization module r501 can compensate errors by estimating the deformation in the transmission channel using a pilot symbol. The r504 preamble deleting element may be omitted if the demodulator is adapted for DVB-C2.

[0189] Fig. 30 shows an example of frame parser. Pilot Removal Element (r404) may remove pilot symbol. The frequency deinterleaver r403 can perform frequency deinterleaving. The OFDM symbol merger r402 can restore a data frame from symbol streams transmitted in the form of OFDM symbols. The frame header removing element r401 may extract the signal physical layer from the header of each transmitted frame and remove the header. The extracted information can be used as parameters for subsequent processes carried out at the receiver.

[0190] Fig. 31 shows an example of a BICM demodulator. Fig. 31a shows a data path and Fig. 31b shows a L1 signaling path. The deinterleaver in the symbol domain r308 can perform deinterleaving in the symbol domain. The ModCod r307 extractor can extract ModCod parameters from the front of each BB frame and make these parameters available for subsequent adaptive / variable demodulation and decoding processes. The symbol demapper r306 can map the symbol input streams into bit streams with log-likelyhood ratio (LLR). The LLR bit output streams can be calculated using the constellation used in the transmitter symbol mapper 306 as the reference point. At this point, when the above-mentioned MQAM or NU-MQAM modulation is used, by calculating both the I axis and the Q axis when calculating the bit closest to the MSB and by calculating the I axis or the Q axis, when calculating the remaining bits, an effective element can be obtained demap the symbol. This method can be used, for example, in Approximate LLR, in Exact LLR, or in hard decision (Hard decision).

[0191] When an optimized constellation is used according to the constellation capacity and coding rate (code rate) of the error correction code in the transmitter symbol mapper 306, the receiver symbol demapper r306 may receive the constellation using code rate information ) and the capacities of the constellations transmitted from the transmitter. The receiver r305 bit multiplexer may perform the reverse function of the transmitter 305 bit demultiplexer. The inner deinterleaver r304 and the receiver's outer deinterleaver r302 can perform the inverse functions of the transmitter inner interleaver (304) and the transmitter outer interleaver 302, respectively, to obtain the bit stream in its original sequence. The external deinterleaver r302 can be omitted if the BICM demodulator is for DVB-C2.

[0192] The internal decoder r303 and the external decoder r301 of the receiver may perform respective decoding processes for the internal encoder module 303 and the transmitter external encoder module 301, respectively, to correct errors on the transmission channel. Similar processes to the data path can be carried out on the L1 signal path, but with different parameters r308-1 - r301-1. At this point, as explained in the introductory part, the shortened / punctured coding module r303-1 can be used to decode the L1 signal.

[0193] Fig. 32 is an example of LDPC decoding using shortened / punctured coding module r303-1. The r301a demultiplexer can separately output the information portion and the parity portion of the systematic code from the bit input streams. For the information part, the zero padding module of the r302a data can perform the zero padding of the data block according to the number of LDPC decoder input streams, and for the parity part, the input bit streams for the LDPC decoder can be generated by reverse piercing of the part punctured in the piercing module inverse parity r303a. LDPC decoding by module r304a can be performed on generated bit streams, and zeros in the information part can be removed by zero removing element r305a and output.

[0194] Fig. 33 shows an example of output processor. The BB r209 decryptor can restore encrypted bit streams in the transmitter. The splitter r208 can restore BB frames corresponding to multiple PLPs that are multiplexed and transmitted from the transmitter according to the PLP path. For each PLP path, BB header removing elements r207-1 ~ n can delete the header that is transmitted in front of the BB frame. The CRC decoder r206-1 ~ n can perform CRC decoding and make reliable BB frames available for selection. Null packet inserting module r205-1 ~ n can restore null packets that have been removed for greater transmission efficiency at their original location. The r204-1 ~ n delay recovery module can restore the delay that exists between each PLP path.

[0195] The output clock recovery module r203-1 ~n can restore the original timing of the service stream from the timing information transmitted from the input stream synchronizing element 203-1 ~n. The output interface module r202-1 ~ n can restore data in the TS / GS packet from input bit streams that are segmented in the BB frame. An output postprocess element r201-1 ~ n can restore multiple TS / GS streams to a complete TS / GS stream if necessary. The shaded blocks shown in Fig. 33 represent modules that can be used when a single PLP is processed at one time, while the other blocks represent modules that can be used when multiple PLPs are processed at the same time. [0196] Preamble pilot patterns were carefully constructed to avoid PAPR increase, thus, it is necessary to consider whether L1 block repetition rate may increase PAPR. The number of L1 block information bits changes dynamically according to channel bonding, number of PLPs, etc. In particular, the following points must be taken into account: the set L1 block size may introduce unnecessary overhead; L1 signal block should be more protected than data symbols; and L1 block time interleaving can improve channel weakness immunity such as impulsive interference deficiency.

[0197] For an L1 block repetition rate of 8 MHz as shown in Fig. 34, total spectral efficiency (26.8% BW increase) is demonstrated using virtual piercing, but the PAPR ratio can be increased because the L1 block bandwidth is the same as the bandwidth of the data symbols. For a repetition rate of 8 MHz, 4K-FFT DVB-T2 frequency interleaving can be used for commonality, and the same pattern can repeat in an 8 MHz period after interleaving.

[0198] For an L1 block repetition rate of 6 MHz, as illustrated in Fig. 35, reduced spectral efficiency can be demonstrated without virtual puncturing. A similar problem regarding the PAPR ratio as in the case of 8 MHz may occur because the bandwidth of the L1 block and the data symbol share LCM = 24 MHz together. For a repetition rate of 6 MHz, 4K-FFT DVB-T2 frequency interleaving can be used for commonality, and the same pattern can repeat with a period of 24 MHz after interleaving.

[0199] Fig. 36 shows a new L1 block repetition rate of 7.61 MHz or full tuner bandwidth. Total spectral efficiency (26.8% BW increase) can be obtained without using virtual puncturing. In this case, there may be no problem with the PAPR ratio, because the L1 block bandwidth and data symbol share LCM = 1704 MHz jointly. For a repetition frequency of 7.61 MHz, 4K-FFT DVB-T2 frequency interleaving can be used for commonality, and the same pattern can repeat with a period of about 1704 MHz after interleaving.

[0200] Fig. 37 is an example of L1 signaling which is transmitted in the frame header. Any information in the L1 signaling block can be sent to a receiver and can be used as a decoding parameter. Particularly, information may be used in the L1 signaling path of Fig. 31, and PLPs may be transmitted in each data slice. In this way, increased resistance can be obtained for each PLP.

[0201] Fig. 39 is an example of symbol interleaver 308-1 as shown in L1 signal path of Fig. 4, which can also be an example of the corresponding symbol deinterleaver r308-1 as shown in L1 signal path of Fig. 31. Blocks with diagonal lines represent L1 blocks and solid blocks represent data carriers. L1 blocks can be transmitted not only within a single preamble, but also can be transmitted within multiple OFDM blocks. Depending on the size of the L1 block, the size of the interleaving block can vary. In other words, the num_L1_sym and L1_span parameters may be different. To minimize unnecessary overhead, data can be transmitted within the rest of the OFDM symbol carriers in which the L1 block is transmitted. At this point, full spectrum efficiency can be guaranteed because the repeating cycle of L1 block is still the tuner's overall bandwidth. In Fig. 39, the numbers in the blocks with oblique lines represent the order of the bits within a single LDPC block.

[0202] Consequently, when the bits are written in the interleaved memory in the direction indicated by the rows according to the symbol index as shown in Fig. 72 and are read in the direction indicated by the columns according to the carrier index, a block interleaving effect can be obtained. In other words, one LDPC block can be interleaved in time and frequency domain and then can be transmitted. The num_L1_sym parameter may have a predetermined value, for example, a number between 2-4 may be set as the number of OFDM symbols. At this point, to increase the granularity of the L1 block size, a punctured / shortened LDPC code having the minimum code word length can be used to secure the L1 block.

[0203] Fig. 40 shows an example of transmitting L1 blocks. Fig. 40 is Fig. 39 in the field of frame. As shown on the left of Fig. 40, L1 blocks can occupy the full tuner bandwidth or as shown on the right of Fig. 40, L1 blocks can occupy part and the rest of the carriers can be used as a data carrier. In any case, it can be seen that the repetition rate of the L1 block can be identical to the total tuner bandwidth. In addition, for OFDM symbols that use the L1 signaling block containing the preamble, only symbol interleaving can be performed that does not allow data transmission in these OFDM symbols. Consequently, in the case of the OFDM symbol used for L1 signaling, the receiver can decode L1 by performing deinterleaving without decoding the data. At this point, the L1 block can transmit the L1 signal block of the current frame or the L1 signal block of the next frame. At the receiver side, the L1 decoded parameters from the L1 signal block decoding path shown in Fig. 31 can be used to decode the data path from the frame parser of the next frame.

[0204] Briefly, at a transmitter, block interleaving of L1 area can be performed by writing blocks in memory in the direction of rows and reading written blocks from memory in the direction of columns. At the receiver, block deinterleaving the L1 area can be performed by writing blocks in memory in a direction indicated by columns and reading written blocks from memory in a direction indicated by rows. The reading and writing directions of the transmitter and receiver can be changed.

[0205] After simulation, using assumptions such as CR = 1/2 to protect the L1 block and to share T2; symbol mapping using 16-QAM; pilot density of 6 in the preamble; short LDPC number, which implies the required amount of piercing / shortening, results or conclusions can be obtained, such as: for transmitting L1 block the preamble alone may not be enough; the number of OFDM symbols depends on the size of the L1 block; the shortest LDPC code word (e.g. 192 bit information) from among shortened / punctured codes can be used to obtain flexibility and fine granularity; and padding, if required, with a slight overhead can be added. This result is summarized in Fig. 38.

[0206] Consequently, for the L1 block repetition rate, the tuner total bandwidth without virtual piercing may be a good solution and there may still be no problem with PAPR at full spectral efficiency. For the L1 signaling block, an effective signal structure can allow maximum configuration in an environment of combining 8 channels, 32 notches, 256 data segments, and 256 PLPs. For L1 block structure, a flexible L1 signaling block can be implemented according to L1 block size. Time interleaving can be performed for better robustness for T2 commonality. A smaller overhead may allow data to be transmitted in a preamble.

[0207] Block interleaving of L1 block can be performed for better robustness. Interleaving can be performed using a predefined number of L1 symbols (num_L1_sym) and the number of carriers connected by L1 as a parameter (L1_span). The same technique is used for interleaving P2 preamble to DVB-T2.

[0208] L1 block of variable size can also be used. The size can be adjusted to the number of bits of the L1 signaling block, resulting in reduced overhead. Total spectral efficiency can be obtained without any problem with the PAPR ratio. A repetition less than 7.61 MHz may mean that more redundancy can be sent, but this is unused. In this case, there may not be a problem with the PAPR ratio due to the 7.61 MHz repetition rate for the L1 block.

[0209] Fig. 41 shows another example of L1 signaling which is transmitted within a frame header. Fig. 41 differs from Fig. 37 in that the L1_span field having 12 bits was divided into two fields. In other words, the L1_span field is divided into a L1_column field having 9 bits and a L1_row field having 3 bits. The L1_column field represents the media index that includes the L1 block. Because the data segment begins and ends every 12 carriers, which is the density of the pilot signal, 12 bits of overhead can be reduced by 3 bits to obtain 9 bits.

[0210] The L1_row field represents the number of OFDM symbols that includes the L1 block when using time interleaving. Consequently, time interleaving can be performed inside L1_column fields multiplied by L1_row fields. Alternatively, L1 blocks of an overall size can be transmitted for which the L1_span field shown in Fig. 37 can be used when time interleaving is not performed. In this case, the L1 block size is 11.776 x 2 bits in this example, and therefore 15 bits is sufficient. Consequently, the L1_span field can be created by 15 bits.

[0211] Fig. 42 shows an example of frequency or time interleaving / deinterleaving. Fig. 42 shows a portion of the entire broadcast frame. Fig. 42 also illustrates combining multiple 8 MHz bandwidths. The frame may consist of a preamble that transmits L1 blocks and a data symbol that transmits data. Different types of data symbols represent data segments for different services. As shown in Fig. 42, the preamble sends L1 blocks for every 7.61 MHz.

[0212] For the preamble, frequency or time interleaving is performed within L1 blocks and not performed between L1 blocks. That is, for the preamble, it can be said that interleaving is performed at L1 block level. This enables L1 blocks to be decoded by transmitting L1 blocks within the tuner window's bandwidth, even when the tuner window has been moved to a random location within the channel bonding system.

[0213] For decoding data symbol at a random tuner window bandwidth, interleaving between data slices should not occur. That is, for data segments, it can be said that interleaving is performed at the data segment level. Consequently, frequency interleaving and time interleaving should be performed within the data slice. Therefore, the symbol interleaver 308 in the data path of the transmitter BICM module as shown in Fig. 4 can perform symbol interleaving for each data slice. The symbol interleaver 308-1 in the L1 signaling path can perform symbol interleaving for each L1 block.

[0214] A frequency interleaver 403 of Fig. 9 needs to perform interleaving on the preamble and data symbols separately. In particular, for the preamble, frequency interleaving can be performed for each L1 block, and for data symbols, frequency interleaving can be performed for each data slice. At this point, time interleaving in a data path or L1 signaling path may not be performed given the low delay mode.

[0215] Fig. 43 is a table showing L1 block signal overhead analysis that is transmitted in a FECFRAME header in a ModCod header inserter (307) on a BICM module data path, as shown in Fig. 37. As shown in Fig. 76 , for a short LDPC block (size = 16200) a maximum overhead of 3.3% may occur, which may not be insignificant. In the analysis, 45 symbols are assumed to protect FECFRAME, the preamble is the C2-specific L1 signal block and the FECFRAME header is the FECFRAME-specific L1 signal block, i.e. Mod, Cod, and PLP identifier.

[0216] To reduce the L1 signaling overhead, approaches may be considered for two types of data slices. In cases involving the ACM / VCM type and multiple PLPs, the same frame as for the FECFRAME header may be preserved. For ACM / VCM and single PLP cases, the PLP identifier may be removed from the FECFRAME header, resulting in a 1.8% overhead reduction. For CCM and multiple PLP cases, the Mod / Cod field may be removed from the FECFRAME header, resulting in a reduction of overhead of 1.5%. In contrast, for CCM and single PLP cases, no FECFRAME header is required, and thus a reduction of overhead of up to 3.3% can be achieved.

[0217] In a shortened L1 signaling, either Mod / Cod identifier (7 bits) or PLP identifier (8 bits) can be transmitted, but it can be too short to get any coding gain. However, no synchronization requirement is possible because PLPs can be adapted to a C2 transmission frame; each ModCod of each PLP can be known from the preamble; and simple calculation can enable synchronization with a specific FECFRAME header.

[0218] Fig. 44 is showing a structure for a FECFRAME header for minimizing the overhead. In Fig. 44, the oblique line blocks and the FECFRAME constructor represent a block diagram of a portion of the ModCod 307 header inserting module on the BICM module data path as shown in Fig. 4. The solid blocks represent an example of an internal coding module 303, an internal interleaver 304, a bit demultiplexer 305, and a symbol mapper 306 on a BICM data path, as shown in Fig. 4. At this point, shortened L1 signaling can be performed because CCM does not requires Mod / Cod field, single PLP does not require PLP identifier. On this L1 signal with a reduced number of bits, the L1 signal can be repeated three times in the preamble and BPSK modulation can be performed, and therefore very robust signaling is possible. Finally, the ModCod 307 header insertion module can insert the generated header into each FEC frame. Fig. 51 is an example of ModCod r307 extractor in the data path of the BICM demodulator module shown in Fig. 31.

[0219] As shown in Fig. 51, the FECFRAME header can be parsed in the parser r301b, and then the symbols that transmit identical information in the repeated symbols can be delayed, aligned, and then combined in the combining deviation module r302b. Finally, when BPSK demodulation is performed in module r303b, the received L1 signal field can be restored and this restored L1 signal field can be sent to the system controller for use as a decoding parameter. The analyzed FECFRAME header can be sent to the symbol demapper.

[0220] Fig. 45 shows the performance of a bit error rate (BER) of the above-mentioned L1 block protection. It can be seen that about 4.8 dB SNR gain is obtained by repeating three times. The SNR required is 8.7 dB at BER = 1E-11.

[0221] Fig. 46 is showing examples of a transmission frame and FEC frame structure. The FEC frame structures shown in the upper right of Fig. 46 represent the FECFRAME header inserted by the ModCod 307 header insertion module of Fig. 4. It can be seen that depending on various combinations of conditions, i.e., CCM or ACM / VCM type and single or multiple PLPs, different sizes of headers can be inserted. Or, headers may not be inserted. Transmission frames created according to the data segment types and shown at the bottom left of Fig. 46 can be created by the frame header insertion module 401 of the frame builder as shown in Fig. 9 and the input / segmenting module 208 of the input processor shown in Fig. 2. At this point, the FECFRAME header may be transmitted according to different types of data slice. By using this method you can reduce the maximum 3.3% of the mark-up. In the upper right corner of fig. 79 four different types of constructions are illustrated, but a person skilled in the art will understand that these are only examples, and any of these types or combinations thereof may be used for the data segment.

[0222] On the receiver side, the frame header removing element r401 of the frame parser module, as illustrated in Fig. 30, and the ModCod extractor r307 of the BICM demodulator module, as shown in Fig. 31, can extract the ModCod field parameter that is required for decoding. At this point, transmission frame parameters can be extracted according to the types of data segments. For example, for the CCM type, the parameters can be extracted from the L1 signaling block that is transmitted in the preamble, and for the ACM / VCM type, the parameters can be extracted from the FECFRAME header.

[0223] As shown in the upper right corner of Fig. 79, the fecram structure may be divided into two groups, in which the first group is the upper three frame structures with header and the second group is the last frame structure without header.

[0224] Fig. 47 is an example of L1 signaling that can be transmitted in a preamble by the frame insertion module header 401 of the frame builder module, shown in Fig. 42. This L1 signaling differs from previous L1 signaling in that L1 block size can be transmitted in bits (L1_size, 14 bits); it is possible to enable / disable time interleaving on the data segment (dslice_time_intrlv, 1 bit); and by defining the data segment type (dslice_type, 1 bit), the L1 signaling overhead is reduced. At this point, when the data segment type is CCM, the Mod / Cod field can be transmitted in the preamble rather than in the FECFRAME header (plp_mod (3 bits), plp_fec_type (1 bit), plp_cod (3 bits)).

[0225] On the receiver side, the shortened / punctured internal decoding module r303-1 of the BICM demodulator, as illustrated in Fig. 31, can receive the first LDPC block, which has a fixed L1 block size, and is transmitted in the preamble, by decoding. You can also get the numbers and size of the remaining LDPC blocks.

[0226] Time interleaving can be used when multiple OFDM symbols are needed for L1 transmission or when there is a time interleaved data slice. Flexible on / off time interleaving is possible using the interleaving status flag. For time preamble interleaving, a time interleaving state flag (1 bit) and the number of OFDM symbols flying through (3 bits) may be required, thus, a total of 4 bits can be protected in a manner similar to the shortened FECFRAME header.

[0227] Fig. 48 is an example of L1-pre signaling that can be performed on a ModCod 307-1 header inserting module on a BICM data path of Fig. 4. Blocks with an oblique line and a Preamble Builder are examples of a ModCod 307 header inserting module -1 on the L1 signaling path of the BICM module shown in Fig. 4. Solid blocks are examples of the insertion module frame header 401 of the frame builder, as shown in Fig. 42. [0228] Also, solid blocks may be examples of the shortened / punctured inner coding module 303-1, the inner interleaver 304-1, the bit demultiplexer 305-1, and the symbol mapper 306-1 on the L1 signal path of the BICM module shown in Fig. 4.

[0229] As seen in Fig. 48, the L1 signal that is transmitted in the preamble can be protected using shortened / punctured LDPC encoding. Related parameters can be inserted into the header as L1-pre signaling. At this point, only time interleaving parameters can be transmitted in the preamble header. Four times can be repeated for greater resistance. On the receiver side, to enable decoding of the L1 signal that is transmitted in the preamble, the ModCod extractor r307-1 on the L1 signal path of the BICM demodulator, as illustrated in Fig. 31, must use the decoding module shown in Fig. 18. At this point, because four times repetition is performed here, unlike the previous decoding FECFRAME header, a deviation receiving process is required that synchronizes four times repeated symbols and adds symbols.

[0230] Fig. 49 is showing a structure of L1 signaling block that is transmitted from a frame header inserting module 401 of a frame builder module as shown in Fig. 42. This shows the case where time interleaving is not used in the preamble. As illustrated in Fig. 49, different types of LDPC blocks can be transmitted in carrier order. After the OFDM symbol is created and sent, the next OFDM symbol is created and transmitted. In the case of the last OFDM symbol to be transmitted, if any remaining carrier is present, then these carriers may be used for data transmission or may be artificially padded. The example shown in Fig. 49 illustrates a preamble that includes three OFDM symbols. On the receiver side, in the absence of interleaving, the deinterleaver in symbol domain r308-1 on the L1 signal path of the BICM demodulator, as shown in Fig. 31, can be omitted.

[0231] Fig. 50 shows a case where L1 time interleaving is performed. As shown in Fig. 50, block interleaving can be performed in a manner comprising forming an OFDM symbol for identical carrier indicators and then creating OFDM symbols for subsequent carrier indicators. As in the case where no interleaving is performed, if any remaining carrier is present, then these carriers can be used for data transmission or can be artificially padded. On the receiver side, in the absence of interleaving, the deinterleaver in the symbol domain r308-1 on the L1 signal path of the BICM demodulator, as shown in Fig. 31, can perform block deinterleaving by reading the LDPC blocks in ascending order of LDPC block numbers.

[0232] In addition, there can be at least two types of data slices. Type 1 data segment has dslice_type = 0 in L1 signal block fields. This type of data segment has no XFECFrame header and has its mod / cod values ​​in the L1 signal block fields. Type 2 data segment has dslice_type = 1 in L1 signal block fields. This type of data segment has an XFECFrame header and has its mod / cod values ​​in the XFECFrame header.

[0233] XFECFrame means XFEC (compleX Forward Error Correction) Frame, and mod / cod means modulation type / code rate.

[0234] At a receiver, a frame parser can form a frame from demodulated signals. The frame has data symbols, and the data symbols may have a first type of data segment that includes XFECFrame and an XFECFrame header and a second type of data segment that includes XFECFrame without an XFECFrame header. Also, the receiver may extract from L1 the preamble symbols a field indicating whether to perform time deinterleaving on the preamble symbols or not to perform time deinterleaving on the preamble symbols.

[0235] At a transmitter, a frame builder can build a frame. The frame data symbols include the first data segment type that has the XFECFrame and the XFECFrame header, and the second data segment type that has the XFECFrame without the XFECFrame header. In addition, a field may be inserted in L1 of preamble symbols indicating whether to perform time interleaving on preamble symbols or not to perform time interleaving on preamble symbols.

[0236] Finally, for the short / punctured code for the frame header insertion module 401 of the frame builder shown in Fig. 9, the minimum code word size that can receive the coding gain and can be transmitted in the first LDPC block can be determined. In this way, the remaining LDPC block sizes can be derived from the transmitted L1 block size.

[0237] Fig. 52 is showing another example of L1-pre signaling that can be transmitted from a ModCod 307-1 header inserting module to the L1 signaling path of the BICM module in Fig. 4. Fig. 52 is different from Fig. 48 in that in the header part the security mechanism has been modified. As seen in Fig. 52, information about L1 block size L1_size (14 bits) is not transmitted in L1 block, but is transmitted in the header. In the header, 4-bit time interleaving information can also be transmitted. For a total of 18 bits of input signal, BCH codes (45, 18) are used, which output 45 bits and are copied to two paths and finally mapped to QPSK. For the Q path, 1-bit cyclic shift can be performed to vary the gain, and PRBS modulation can be performed according to the synchronization word. A total of 45 QPSK symbols can be derived from these I / Q path inputs. At this point, if the time interleaving depth is set as the number of preambles that is required to send the L1 block, then the L1_span (3 bits) parameter that indicates the time interleaving depth may not need to be transmitted. In other words, only the time flag on / off time interleaving (1 bit) can be transmitted. On the receiver side, by checking only the number of preambles transmitted, without using the L1_span parameter, time deinterleaving depth can be obtained.

[0238] Fig. 53 is showing an example of scheduling of L1 signaling block that is transmitted in preamble. If the size of L1 information that can be transmitted in the preamble is Nmax, then when the size of L1 is smaller than Nmax, one preamble can send information. However, when L1 size is larger than Nmax, L1 information can be evenly divided such that the divided L1 subblock is smaller than Nmax, and then the divided L1 subblock can be transmitted in a preamble. At this point, for a carrier that is not used because L1 information is less than Nmax, no data is transmitted.

[0239] Instead, as shown in Fig. 55, the carrier power in which L1 blocks are transmitted can be increased so as to maintain the total preamble signal strength equal to that of the data symbol. The power increase factor may vary depending on the size of the transmitted L1, and the transmitter and receiver may have a fixed value for this power increase factor. For example, if only half of all carriers are used, the power increase factor may be two.

[0240] Fig. 54 is showing an example of L1-pre signaling where power boosting is considered. By comparing with Fig. 52, it can be seen that the power of the QPSK symbol can be increased and sent to the Preamble Builder.

[0241] Fig. 56 is showing another example of the ModCod r307-1 extractor on the L1 signaling path of the BICM demodulator module shown in Fig. 31. From the preamble input symbol, FECFRAME of the L1 signal block can be output to the symbol demapper and only the decoding can be decoded head part.

[0242] For the input header symbol, QPSK demapping can be performed and a Log-Likelihood Ratio (LLR) value can be obtained. For path Q, PRBS may be demodulated according to the synchronization word, and the inverse of the 1-bit cyclic shift process may be performed to restore.

[0243] These aligned two I / Q path values ​​can be combined and SNR gain can be obtained. The hard decision output can be input to the BCH decoder. The BCH decoder can restore 18 L1-pre bits out of 45 bits input.

[0244] Fig. 57 is showing a counterpart, ModCod extractor of a receiver. Comparing with Fig. 56, power control can be performed on a QPSK demapper input symbols to restore the transmitter to its original value from the increased power level. At this point, power control can be performed by taking into account the number of carriers used for the L1 signaling block in the preamble and taking the inverse value of the obtained power boost factor of the transmitter. The power increase factor sets the preamble power and data symbol power so that they have identical values.

[0245] Fig. 58 is an example of L1-pre synchronization that can be performed in a ModCod r307-1 extractor on the L1 signal path of the BICM demodulation module shown in Fig. 31. This is a synchronization process to obtain the initial position of the header in the preamble. The input symbols may be QPSK demapped, and then for the output Q path, the inverse of 1-bit cyclic shift may be performed, and alignment may be performed. Two I / Q path values ​​can be multiplied and modulated values ​​by L1-pre signaling can be demodulated. Thus, the output from the multiplier can only express PRBS, which is a sync word. In the event that the output signal correlates with a known PRBS sequence, a peak correlation value can be obtained in the header. Thus, the initial heading position in the preamble can be obtained. If necessary, power control that is performed to restore the original power level as in Fig. 57 can be performed at the input of the QPSK demapper.

[0246] Fig. 59 is showing another example of L1 block header field that is sent to header insertion module 307-1 on the B1 signal module L1 signal path, as shown in Fig. 4. Fig. 59 is different from Fig. 52 in that that the L1_span parameter, which represents time interleaving depth, is reduced to 2 bits and reserved bits are increased by 1 bit. The receiver can receive the L1 block time interleaving parameter from the transmitted L1_span parameter.

[0247] Fig. 60 shows processes of equally dividing an L1 block into as many parts as the number of preambles, and then inserting a header into each of the divided L1 blocks, and assigning L1 blocks with the inserted preamble headers. This can be done when time interleaving is performed using a number of preambles, the number of preambles being greater than the minimum number of preambles that is required for transmitting L1 block. This can be carried out in L1 block on the L1 signal path of the BICM module as shown in Fig. 37. The rest of the carriers, after sending L1 blocks may have cyclic repetition patterns instead of zero padding.

[0248] Fig. 61 is an example of the symbol demapper r306-1 of the BICM demodulation module as shown in Fig. 31. For the case where L1 FEC blocks are repeated as shown in Fig. 60, each start point of L1 blocks The FEC can be equalized, combined in the r301f module, and then demapped using QAM in the QAM r302f demapper to achieve differentiation gain and SNR gain. At this point, the connecting element may include processes for aligning and adding each L1 FEC block and dividing the added L1 FEC block. For the case where only a portion of the last FEC block is repeated as illustrated in Fig. 60, only the repeated portion may be divided into as many parts as the number of FEC block headers and the other part may be divided by a value that is one less than the number of FEC block headers. In other words, the dividing number corresponds to the number of carriers that is added to each carrier.

[0249] Fig. 65 is showing another example of L1 block scheduling. Fig. 65 differs from Fig. 60 in that instead of performing zero pad blocking or repetition when L1 blocks do not fill one OFDM symbol, the OFDM symbol can be completed using parity redundancy by performing less puncturing on the shortened / punctured code on the transmitter . In other words, when the parity piercing module 304c is carried out in Fig. 5, the effective code rate can be determined according to the puncture rate, and therefore, by using piercing in which fewer bits must be padded with zeros, the effective code rate can be lowered and better coding gain can be obtained. The receiver's reverse parity puncture module r303a, as illustrated in Fig. 32, can perform inverse puncturing taking into account the less punctured parity redundancy. At this point, because the receiver and transmitter can have information regarding the total L1 block size, a pierce index can be calculated.

[0250] Fig. 62 is showing another example of L1 signaling field. Fig. 62 is different from Fig. 41 in that in the case where the data slice type is CCM, the start address (21 bits) of the PLP can be transmitted. This may enable the transmission frame to be created by the FECFRAME header of each PLP, without aligning the FECFRAME header with the starting position of the transmission frame. Thus, padding that can occur when the width of the data slice is small can be eliminated. In the case where the data slice type is CCM, the receiver may receive ModCod information from the preamble on the L1 signal path of the BICM demodulator module as shown in Fig. 31, instead of obtaining this information from the FECFRAME header. In addition, even when switching occurs at the random location of the transmission frame, FECFRAME synchronization can be performed without delay because the start address of the PLP can already be obtained from the preamble.

[0251] Fig. 63 is showing another example of L1 signaling fields that can reduce the PLP addressing overhead.

[0252] Fig. 64 is showing a number of QAM symbols that correspond to FECFRAME depending on the modulation types. At this point, the largest common QAM symbol divider is 135, so the log2 (135) = 7 bits overhead can be reduced. Thus, Fig. 63 differs from Fig. 62 in that the number of bits of PLP_start field can be reduced from 21 bits to 14 bits. This is the result of considering 135 symbols as a single group and addressing group. The receiver can receive the OFDM carrier index, where the PLP begins in the transmission frame after obtaining the PLP_start field value and multiplying it by 135.

[0253] Fig. 66 and Fig. 68 are examples of symbol interleaver 308 that can time-interleave data symbols that are sent from the ModCod 307 header inserting module to the BICM module data path, as shown in Fig. 4.

[0254] Fig. 66 shows an example of a block interleaver for time interleaving that can operate on a data slice basis. The value of the order means the number of payload cells in four of the OFDM symbols in one data segment. Interleaving based on an OFDM symbol may not be possible because the number of cells may vary between neighboring OFDM cells. The value of the K column means time interleaving depth, which can be 1, 2, 4, 8, or 16 ... K signaling for each data segment can be performed inside L1 signaling. A frequency interleaver 403, as shown in Fig. 9, can perform its operations before a time interleaver 308, as shown in Fig. 4.

[0255] Fig. 67 shows interleaving performance of time interleaver as shown in Fig. 66. It is assumed that the value of the column is 2, the value of the order is 8, the width of the data segment is 12 data cells and that in the data segment there are continuous pilots. The upper figure in fig. 67 illustrates the OFDM symbol structure when time interleaving is not performed and the bottom figure illustrates the OFDM symbol structure when time interleaving is performed. Black cells represent scattered pilot, and non-black cells represent data cells. The same type of data cells is represented by the OFDM symbol. In Fig. 100, data cells that correspond to a single OFDM symbol are interleaved into two symbols. Interleaving memory is used, which corresponds to eight OFDM symbols, but interleaving depth only corresponds to two OFDM symbols, thus, no total interleaving depth is obtained.

[0256] Fig. 68 is suggested for achieving full interleaving depth. In Fig. 68, black cells represent scattered pilots and cells that are not black represent data cells. The time interleaver, as shown in Fig. 68, can be implemented as a block interleaver and can interleave data slices. In fig. 68, number of columns, K represents the width of the data segment, row number, N represents the time interleaving depth and value, K can be random among the values ​​i.e., K = 1,2,3, .... The interleaving process involves writing a data cell in a column in a twisting manner and reading in the direction indicated by the columns, excluding pilot positions. This means that it can be said that interleaving is performed in a row-column twisted fashion.

[0257] In addition, at a transmitter, cells that are read in a twist column in an interleaving memory correspond to a single OFDM symbol and pilot positions of OFDM symbols can be preserved during cell interleaving.

[0258] Also, at the receiver, the cells that are read in the column in a twist manner from the de-interleaving memory correspond to a single OFDM symbol and the pilot positions of the OFDM symbols can be preserved during time-deinterleaving the cells.

[0259] Fig. 69 shows the time interleaving performance of Fig. 68. For comparison with Fig. 66, it was assumed that the row number is 8, the data segment width is 12 data cells, and that the data segment is not continuous pilots. In Fig. 69, data cells corresponding to a single OFDM symbol are interleaved into eight OFDM symbols. As illustrated in fig. 102, interleaving memory is used, which corresponds to eight OFDM symbols and the resulting interleaving depth corresponds to eight OFDM symbols, and thus, total interleaving depth is obtained.

[0260] The time interleaver as shown in Fig. 68 can be advantageous in that full interleaving depth can be obtained using identical memory; interleaving depth can be flexible, as opposed to Fig. 66; and consequently, the length of the transmission frame may also be flexible, i.e., rows need not be multiples of four. In addition, the time interleaver used for the data slice can be identical to the interleaving method used for the preamble, and can also be shared with a digital broadcast system that uses general OFDM multiplexing. In particular, time interleaver 308, as shown in Fig. 4, can be used before using frequency interleaver 403, as shown in Fig. 9. Given the complexity of the receiver, no additional memory may be required, other than additional address control logic, which may require very low complexity.

[0261] Fig. 70 shows a corresponding deinterleaver in the symbol domain (r308) at a receiver. This element may perform deinterleaving after receiving an output signal from the frame header removing element r401. In deinterleaving processes, compared to Fig. 66, the processes for writing and reading block interleaving are inverted. By using pilot position information, time deinterleaver can perform virtual deinterleaving not by writing in or reading from the pilot position in the interleaver memory, and by writing to or reading from the data cell position in the interleaver memory. The de-interleaved information can be output to a ModCod r307 extractor.

[0262] Fig. 71 is another example of time interleaving. Here you can write in an oblique direction and read row by row. As in Fig. 68, interleaving is performed taking into account pilot positions. Read and write are not performed for pilot positions, but interleaving memory is provided by considering only the position of the data cell.

[0263] Fig. 72 shows the result of interleaving using the method shown in Fig. 71. When compared to Fig. 69, cells with the same patterns are dispersed not only in time domain, but also in the frequency domain. In other words, total interleaving depth can be obtained in both time and frequency domains.

[0264] Fig. 75 is showing a deinterleaver in symbol domain r308 of a respective receiver. The output of the frame header removing element r401 may be deinterleaved. Comparing with Fig. 66, deinterleaving changes the order of reading and writing. The time deinterleaver can use pilot position information to perform virtual deinterleaving such that no reading or writing is performed at pilot positions, but reading or writing can only be performed at data cell positions. Deinterleave one data can be output to a ModCod r307 extractor.

[0265] Fig. 73 is an example of the addressing method of Fig. 72. NT means time interleaving depth and ND means data slice width. It is assumed here that the order value, N is 8, the width of the data segment is 12 data cells, and the data segment does not contain continuous pilot signals. Fig. 73 shows a method of generating addresses for writing data in time interleaving memory when a transmitter performs time interleaving. Addressing begins with the first address with a Row Address (RA) = 0 and Column Address (CA) = 0. In each case of addressing, RA and CA are increased. For RA, a modulo operation may be performed using OFDM symbols used in the time interleaver. For CA, a modulo operation can be performed using the number of carriers that corresponds to the width of the data slice. RA may be increased by 1 when carriers that correspond to a data segment are stored in memory. Memory storage can only be performed if the location of the current address is not the location of the pilot signal. If the location of the current address is the location of the pilot signal, only the address value can be increased.

[0266] In Fig. 73, number of columns, K represents data slice width, row number, N represents time interleaving depth, value, K can be random among the values ​​i.e., K = 1,2,3, .... The interleaving process may include writing the cell data to the column in a twisting manner and reading towards the column, excluding pilot positions. In other words, virtual interleaving memory may include pilot positions, but pilot positions may be excluded in real interleaving.

[0267] Fig. 76 shows deinterleaving, an inverse process of time interleaving as shown in Fig. 71. Writing row-by-row and reading in diagonal direction can restore cells in original sequences.

[0268] The addressing method used in a transmitter can be used in a receiver. The receiver can write row-by-row the received data in the time deinterleaver memory and can read the stored data using the generated address values ​​and pilot location information, which can be generated in a similar manner to that of a transmitter. As an alternative method, the generated address values ​​and pilot information that was used for writing can be used to read row-by-row.

[0269] These methods can be used in a preamble that transmits L1. Because each OFDM symbol that includes the preamble can have pilots in identical locations, either interleaving relating to address values ​​can be performed, taking into account pilot locations or interleaving relating to address values ​​without taking into account pilot locations. For the case of address values ​​without taking into account the location of the pilot signal, the transmitter stores data in time interleaving memory each time. In this case, the amount of memory required to perform preamble interleaving / deinterleaving at the receiver or transmitter becomes identical to the number of payload cells present in the OFDM symbols used for time interleaving. [0270] In Fig. 74 shows another example of L1 time interleaving. In this example, time interleaving can place carriers in all OFDM symbols, although all carriers could be located in a single OFDM symbol if time interleaving was not performed. For example, for data located in the first OFDM symbol, the first carrier of the first OFDM symbol will be located at its original location. The second carrier of the first OFDM symbol will be located in the second carrier index of the second OFDM symbol. In other words, the i-data carrier that is located in the nth OFDM symbol will be located in the i-th carrier index (i + n) mod of the N-th OFDM symbol in which i = 0, 1.2 ... , number of carriers-1, n = 0, 1, 2 ..., N-1, and N denotes the number of OFDM symbols used in L1 time interleaving. In this L1 time interleaving method, it can be said that interleaving for all OFDM symbols is performed in a twisted manner, as shown in Fig. 107. Even if pilot positions are not illustrated in Fig. 107, as mentioned above, interleaving can be applied to all OFDM symbols containing pilot symbols. That is, it can be said that interleaving can be performed for all OFDM symbols without taking into account pilot position or regardless of whether the OFDM symbols are pilot symbols or not.

[0271] If the size of the LDPC block used in L1 is smaller than the size of a single OFDM symbol, the remaining carriers may contain copies of a portion of the LDPC block or may be padded with zeros. The same time interleaving as above can be performed at this point. Similarly, in fig. 74, the receiver can perform deinterleaving by storing in memory all blocks used in L1 time interleaving and reading the blocks in the order in which they were interleaved, i.e., in the order of the numbers written in the blocks as shown in Fig. 74.

[0272] When a block interleaver is used as shown in Fig. 73, two buffer memories are used. In particular, while one buffer memory stores input symbols, previous input symbols may be read from another buffer. After performing these processes for one symbol interleaving block, deinterleaving can be performed using switching read and write order to avoid memory access conflict. This "ping-pong" style deinterleaving can have simple address generation logic. However, the use of two symbol interleaving buffer memories can increase hardware complexity.

[0273] Fig. 77 is an example of deinterleaver in the field of symbol r308 or r308-1, as shown in Fig. 31. This proposed implementation of the invention can only use a single buffer to perform deinterleaving. After the address value is generated by the address generation logic, the address value can be output from the buffer memory and an operation transfer can be performed using the storage of the symbol which is input to the same address. By using these processes, you can avoid memory access conflict when reading and writing. In addition, symbol deinterleaving can be performed using only a single buffer. You can define parameters to explain this address generation rule. As shown in Fig. 73, the number of rows of deinterleaving memory can be defined as time interleaving depth, D, and the number of deinterleaving memory columns can be defined as data slice width, W. Then, the address generator can generate the following addresses.

[0274] i-th sample on j-th block u, including pilot i = 0,1,2, ..., N-1;

N = D * W;

Ci, j = and mod W;

Tw = ((Ci, j mod D) * j) mod D; Ri, j = ((and div W) + Tw) modD;

Li, j (1) = Ri, j * W + Ci, j;

Or

Li, j (2) = Cij * D + Ri, j;

[0275] The addresses include pilot positions, thus, input symbols are assumed to include pilot positions. If input symbols that contain only data symbols need to be processed, additional control logic may be required, which bypasses the corresponding addresses. At this point, i represents the index of input symbols, j represents the index of the input interleaver, and N = D * W represents the length of the interleaver. The Mod operation represents the modulo operation, which gives the remainder after division. The Div operation represents a division operation that gives a quotient after division. Ri, ji and Ci, j represent the row address and the address of the input column of the i-th symbol of the j-th interleaving respectively. Tw represents the column twist value for the addresses where the symbols are located. In other words, each column can be considered as a buffer memory in which an independent twist is performed according to the Tw value. Li, j represents an address when a single buffer is implemented in one sequential memory dimension, not two dimensions. Li, j can have values ​​from 0 to (N-1). Two different ways are possible. Li, j (1) is used when the memory matrix is ​​connected row by row and Li, j (2) is used when the memory matrix is ​​connected column by column.

[0276] Fig. 78 is an example of row and column addresses for time deinterleaving when D is 8 and W is 12. J starts with j = 0 and for each value of j, the first row can represent the row address, the second row can represent the address of a column. Fig. 78 only shows addresses of the first 24 symbols. Each column index can be identical to the input symbol index and.

[0277] Fig. 80 is an example of an OFDM transmitter using a data slice. As shown in Fig. 80, the transmitter may include a PLP data path, an L1 signal path, a frame builder, and an OFDM modulation portion. The PLP data path is indicated by blocks with horizontal lines and vertical lines. The L1 signal path is indicated by blocks with diagonal lines. Input processing modules 701-0, 701-N, 701-K, and 701-M may include blocks and sequences of the 202-1 input interface module, 203-1 input stream synchronizing element, 204-1 delay compensator, zero packet reset module 205 -1, CRC encoder 206-1, header insertion module BB 207-1, and mixing module BB 209 performed for each PLP as illustrated in Fig. 2. The FEC 702-0, 702-N, 702-K, and 702-M modules may include blocks and sequences of the external coding module 301 and internal coding module 303 as shown in Fig. 4. The FEC 702-L1 module used on the L1 path may include blocks and sequences of the external coding module 301-1 and the shortened / punctured internal coding module 3031 as illustrated in Fig. 4. The L1 signal module 700-L1 may generate L1 information required to frame the frame.

[0278] Bit interleaving modules 703-0, 703-N, 703-K, and 703-M may include blocks and sequences of internal interleaver 304 and bit demultiplexer 305, as shown in Fig. 37. 703-L1 bit interleaving module used on path L1 may include blocks and sequences of 304-1 interleaver and 305-1 bit demultiplexer as shown in Fig. 4. Symbol mappers 704-0, 704-N, 704-K, and 704-M may perform functions identical to the functions of the symbol mapper 306 shown in Fig. 4. The symbol mapper 704-L1 used on the path L1 may perform functions identical to the functions of the symbol mapper 306-1 shown in Fig. 4. FEC header modules 705-0, 705-N, 705-K, and 705-M can perform functions identical to those of the ModCod 307 header inserting module shown in Fig. 4. The FEC 705-L1 header module for L1 path can perform functions identical to those of the ModCod 307-1 header insertion module shown in Fig. 4.

[0279] Modules mapping data segments 706-0 and 706-K may place FEC blocks in their respective data segments and may send placed FEC blocks, where the FEC blocks correspond to PLPs that are assigned to each data segment. The preamble mapper 707-L1 may place L1 signaling FEC blocks in the preambles. L1 signaling FEC blocks are transmitted in preambles. Time interleavers 708-0 and 708-K may perform functions identical to those of the symbol interleaver 308 shown in Fig. 4, which may interleave data slices. The time interleaver 708-L1 used on the L1 path can perform functions identical to those of the 308-1 symbol interleaver shown in Fig. 4.

[0280] Alternatively, time interleaver 708-L1 used on L1 path can perform identical functions with the symbol interleaver 308-1 shown in Fig. 3, but only on the preamble symbols.

[0281] Blocks of frequency interleaver 709-0 and 709-K may perform frequency interleaving on data slices. The 709-L1 frequency interleaver used on the L1 path can perform frequency interleaving according to the preamble frequency bandwidth.

[0282] Pilot signal generating module 710 may generate pilot signals that are suitable for continuous pilot (CP), scattered pilot (SP), data slice edge, and preamble. The frame can be constructed by placing data slice, preamble, and pilot in module 711. The IFFT 712 module and the GI 713 insertion module can perform functions identical to the functions of the blocks of the IFFT 501 module and the GI 503 insertion module shown in Fig. 18, respectively. Finally, the DAC 714 can convert digital signals into analog signals and transformed signals can be transmitted.

[0283] Fig. 81 is an example of an OFDM receiver which uses data slice. In Fig. 81, the tuner r700 can perform the function of the tuner / AGC r603 and the functions of the down converter r602 shown in Fig. 61. ADC r701 can convert the received analog signals into digital signals. The time / frequency synchronizing element r702 can perform functions identical to the functions of the time / frequency synchronizing element r505 shown in Fig. 62. The frame detector r703 can perform functions identical to those of the frame detector r506 shown in Fig. 62.

[0284] At this point, after time / frequency synchronization, synchronization can be improved by using a preamble in each frame that is transmitted from the frame detector r703 during the routing process.

[0285] The GI removal element r704 and the FFT module r705 can perform functions identical to those of the GI removal element r503 and the FFT module r502 shown in Fig. 62, respectively.

[0286] The channel estimator r706 and the EQ channel r707 may perform the channel estimation part and the Est / Eq channel correction part r501 as shown in Fig. 62. The frame parser r708 may output a data segment and a preamble in which user selected services are transmitted . Blocks indicated by the oblique lines process the preamble. Blocks indicated by horizontal lines, which may include common PLPs, process data segments. The frequency deinterleaver r709-L1 used on the L1 path can perform frequency deinterleaving within the preamble bandwidth. The frequency deinterleaver r709 used on the data path segment can perform frequency deinterleaving within the data slice. The FEC header decoding module r712-L1, the time deinterleaver r710-L1, and the r713-L1 symbol demapper used on the L1 path can perform functions identical to the functions of the ModCod r307-1 extractor, the deinterleaver in the r308-1 symbol domain, and the symbol demapper r306-1 shown in Fig. 31.

[0287] The r714-L1 bit deinterleaver can include modules and sequences of the bit demultiplexer r305-1 and the internal deinterleaver r304-1 as shown in Fig. 31. FEC decode module r715-L1 can include modules and shortened / punctured internal module sequences encoding r303-1 and the external decoding module r301-1, shown in Fig. 31. At this point, the L1 path output may be L1 signaling information and may be sent to the system controller to restore PLP data that is transmitted in data slices. [0288] Time deinterleaver r710 used on the data path segment can perform functions identical to the deinterleaver functions in the domain of the symbol r308 shown in Fig. 31. The r711 data slice parser can output the user-selected PLP from the data slices and, if necessary, common PLPs associated with the user-selected PLP. The FEC header decoding module r712-C and r712-K can perform functions identical to those of ModCod r307 extractor shown in Fig. 31. The symbol demapper r713-C and r713-K can perform functions identical to the functions of the symbol demapper r306 shown in Fig. 31.

[0289] The r714-C and r714-K bit deinterleaver can include blocks and sequences of the bit demultiplexer r305 and the inner deinterleaver r304, as shown in Fig. 31. FEC decoding module r715-C and r715-K can include blocks and internal sequences a decode module r303 and an external decode module r301 as illustrated in Fig. 31. Finally, the output processor r716-C and r716-K may include blocks and sequences of BB decryptor r209, BB header removing element r207-1, CRC decoder r206-1, zero packet inserting module r205-1, delay recovery module r204-1, an output clock recovery module r203-1, and an output interface module r202-1, whose functions are performed for each PLP in Fig. 2. In the case where common PLPs are used, then the common PLPs and PLP data associated with the common PLPs can be sent to the TS re-connecting element and can be converted into user-selected PLPs.

[0290] With reference to Fig. 81, it should be noted that in the receiver, blocks on L1 path do not have a symmetrically arranged order to the transmitter as opposed to data path, where the blocks are arranged symmetrically or in a sequence opposite the transmitter. In other words, for the data path, frequency deinterleaver r709, time deinterleaver r710, data slice parser r711, and FEC header decoding module r712-C and r712-K have a fixed position. However, for path L1, frequency deinterleaver r709-L1, FEC header decoding module r712-L1, and time deinterleaver r710-L1 have a fixed position.

[0291] Fig. 79 is an example of general block interleaving in a data symbol domain where pilots are not used. As can be seen in the left figure, interleaving memory can be completed without black pilots. To create a rectangular memory, padding cells can be used if necessary. In the left figure, complement cells are indicated as cells with oblique lines. In this example, because one continuous pilot can coincide with one type of scattered pilot pattern, a total of three padding cells are required in total during the duration of the four OFDM symbols. Finally, the middle figure shows the contents of the interleaved memory.

[0292] As in the left figure in Fig. 79, one can perform or writing row by row and perform column twisting; or saving in a twisted way from the beginning. The output of the interleaver can include reading row-by-row from memory. The output that has been read can be placed as shown in the right figure when OFDM transmission is considered. At this time, for simplicity, frequency interleaving can be ignored. As can be seen in the figure, the frequency diversity is not as great as that shown in Fig. 73, but is maintained at a similar level. First of all, this can be advantageous in that the memory required to perform interleaving and deinterleaving can be optimized. In this example, the memory size can be reduced from W * D to (W-1) * D. By increasing the data segment width, you can further reduce the memory size.

[0293] For input signals for the time deinterleaver, the receiver should restore the buffer memory in the form of a middle figure, while taking into account the padding cells. Basically, OFDM symbols can be read symbol by symbol and can be kept row by row. Then the column can be unscrewed corresponding to its twisting. The output from the deinterleaver can be output in the form of reading row-by-row from the memory of the left figure. In this way, compared to the method shown in Fig. 73, pilot overhead can be minimized, and consequently interleaving / deinterleaving memory can be minimized.

[0294] Fig. 82 is an example of time interleaver 708-L1 for L1 path of Fig. 80. As shown in Fig. 82, time interleaving for preamble in which L1 is transmitted can include interleaving L1 data cells , excluding pilots that are usually transmitted in a preamble. The interleaving method may include writing the input data in an oblique direction (solid lines) and reading the data row by row (dashed lines) using identical methods to those shown with reference to Fig. 73.

[0295] Fig. 82 is an example of time deinterleaver r712-L1 on L1, as shown in Fig. 81. As shown in Fig. 82, for preamble in which L1 is transmitted, L1 data cell deinterleaving can be performed, excluding pilot signals that are broadcast regularly in the preamble. The deinterleaving method can be identical to the method illustrated in Fig. 76, in which the input data is written row by row (solid lines) and is read in an oblique direction (dashed lines). The input data does not contain any pilot signal, and as a consequence, the output data has L1 data cells that also do not contain pilot signal. In the case where the receiver uses a single buffer in the time deinterleaver for the preamble, a deinterleaver memory having the address generator structure as shown in Fig. 77 can be used.

[0296] Deinterleaving r712-L1 can be performed using addressing operations as follows:

i-th sample on j-th block, including pilot i = 0,1,2, ..., N-1;

N = D * W;

Ci, j = and mod W;

Tw = ((Ci, j mod D) * j) mod D; Ri, j = ((and div W) + Tw) mod D;

Li, j (1) = Ri, j * W + Ci, j;

or

Li, j (2) = Ci, j * D + Ri, j;

[0297] In the above operations, the row length, W denotes the length of the interleaving memory row, as shown in Fig. 82. Column length, D is the time preamble interleaving depth, being the number of OFDM symbols that are required for transmitting the preambles.

[0298] Fig. 83 is an example of creating OFDM symbols by scheduling pilot signals and input preambles from frame builder 711, as shown in Fig. 80. Empty cells form an L1 header, which is the output signal of FEC header 705-L1 on path L1, as shown in Fig. 80. Gray cells represent continuous preamble pilots that are generated by pilot generating module 710, as shown in Fig. 80. Patterned cells represent L1 signaling cells, which are the output of preamble mapper 707-L1, as shown in Fig. 80. The left figure represents the symbols

OFDM when time interleaving is turned off and the right figure represents OFDM symbols when time interleaving is turned on. The L1 header can be excluded from time interleaving because the L1 header transmits information about the length of the L1 signaling field and the status tag information on / off time interleaving. This is because the L1 header is added before time interleaving. As mentioned above, time interleaving is performed excluding pilot cells. The remaining L1 data cells can be interleaved as shown in Fig. 82 and can then be assigned to OFDM subcarriers.

[0299] Fig. 84 is an example of time interleavers 708-0 - 708-K that can interleave data symbols transmitted from data slice mappers 706-0 ~ 706-K on the data path of an OFDM transmitter using the data slice shown in Fig. 80. Time interleaving can be performed for each data slice. Time interleaved symbols can be output to 709-0 - 709-K interleavers.

[0300] Fig. 84 also shows an example of a simple time interleaver using a single buffer. Fig. 84a shows the structure of OFDM symbols before time interleaving. Blocks with the same patterns represent the same type of OFDM symbols. Figs. 84b and 84c show the structure of OFDM symbols after time interleaving. The time interleaving method can be divided into Type 1 and Type 2. Each type can be carried out alternatively for even symbols and odd symbols. Accordingly, the receiver can perform deinterleaving. One of the reasons for the alternative use of type 1 and type 2 is to reduce the memory required in the receiver by using a single buffer during time deinterleaving.

[0301] Fig. 84b shows time interleaving using type 1 interleaving. Input symbols can be written in a downward diagonal direction and can be read in the direction indicated by the rows. Fig. 84c shows time interleaving using type 2 interleaving. Input symbols can be written in an upward diagonal direction and can be read in the direction indicated by the rows. The difference between type 1 and type 2 is that the writing direction of the input symbol is either up or down. These two methods differ in the way symbols are written, however, the two methods are identical in terms of showing total time interleaving depth and total frequency diversity. However, using these methods can cause problems during synchronization at the receiver due to the use of two interleaving schemes.

[0302] Two possible solutions are possible. The first solution may be signaling 1 bit of the interleaving of the first block of the interleaver that passes first after each preamble through the preamble L1 signaling block. This method performs interleaving through signaling correctly. The second solution may be to create a frame so that it has an even number of interleaved blocks. By using this method, the first interleaved block of each frame can be of the same type, and therefore, the problem of synchronization of interleaved blocks can be solved. For example, a synchronization problem can be solved by applying type 1 interleaving to the first interleaved block and then applying to subsequent interleaved blocks in each frame, ending the last interleaved block of each frame using type 2 interleaving. This method requires that the frame consists of two interleaving blocks, but may be advantageous in that, as in the first method, no additional signaling is required.

[0303] Fig. 89 is showing a structure of a time deinterleaver receiver r710 shown in Fig. 81. Time deinterleaving can be performed on the output data of frequency deinterleaver r709. The time deinterleaver of Fig. 89 represents the deinterleaving scheme, which is the reverse process of time interleaving shown in Fig. 84. De-interleaving compared to Fig. 84, will have the opposite way of reading and writing. In other words, type 1 deinterleaver can write input symbols in the direction of the rows and can read the written symbols in an oblique downward direction. Type 2 deinterleaver can write input symbols in an oblique downward direction and can read written symbols in the direction indicated by the rows. These methods may enable the received symbols to be written, the symbols being previously read by setting the direction of writing the deinterleaver type 2 symbols to be identical to the reading direction of the deinterleaver type 1 symbols. Thus, the receiver can perform deinterleaving using a single buffer. In addition, a simple implementation can be implemented because type 1 and type 2 deinterleaving methods are carried out either by writing and reading symbols in an oblique direction or in a direction indicated by rows.

[0304] However, using these methods can cause a problem in synchronization at the receiver due to the use of two interleaving schemes. For example, type 1 deinterleaving in a type 2 interleaved symbol can cause performance degradation. There are two possible solutions. The first solution may be to determine the type of interleaved block that comes after the preamble, using 1 bit of interleaving of the transmitted part of the L1 signal block. A second solution may be to perform deinterleaving using a type according to the first interleaving block in the frame if the number of interleaving blocks in the frame is an even number. The deinterleaved symbol can be output to the r711 data slice parser.

[0305] Fig. 85 is an address generation logic that is identical to the logic of address generation of a single buffer when the block interleaver uses two buffer memories as in Fig. 73. Address generation logic can perform the same functions as the functions shown in Fig. 73. By defining time interleaving depth D as the number of rows of deinterleaving memory and by defining the width of data segment W as the number of columns, the addresses shown in Fig. 85 can be generated by an address generator. Addresses may include pilot positions. In order to time-interleave input symbols that contain only data symbols, control logic may be required, which can skip addresses. Addresses used in interleaved preambles may not require pilot position and interleaving can be performed using L1 blocks. The letter i represents the index of the input symbol, N = D * W represents the length of the interleaving block. Ri and Ci represent the row address and column address of the i-th input symbol respectively. Tw represents the column twist value or twist parameter from the address where the symbol is located. Li represents addresses in the case where one-dimensional memory having a single buffer is implemented. Li values ​​can be from 0 to (N1). In this one-dimensional memory, at least two ways are possible. Li (1) stands for row-by-row coupling matrix and Li (2) stands for column-by-column coupling matrix. The receiver can use the address generation logic to read symbols during deinterleaving.

[0306] Fig. 86 is showing another example of a preamble. When the OFDM symbol having 4K-FFT size is used in the 7.61 MHz band and the sixth carrier in the OFDM symbol and the carriers at both ends are used as pilot signals, it can be assumed that the number of carriers that can be used in the L1 signaling block it will be 2840. When multiple channels are combined, there may be multiple preamble bandwidths. The number of carriers may vary depending on the type of pilot signals to be used, FFT sizes, number of connected channels, and other factors. If the size of the L1_XFEC_FRAME frame containing the L1_header (H) header to be assigned to a single OFDM symbol and L1 FEC block (L1_FEC1) is smaller than a single OFDM symbol (5w-a-1), then the L1_XFEC_FRAME containing the L1_header header may be repeated to fill the remaining part of a single OFDM symbol (5w-a-2). This is similar to the preamble structure shown in Fig. 60. For a receiver to receive a data segment that is located in a certain frequency bandwidth of the connected channels, the tuner window of the receiver can be located in a certain frequency bandwidth.

[0307] If the receiver tuner window is located as the 5w-a-3 element shown in Fig. 86, an incorrect result may appear when combining repeating L1_XFEC_FRAME frames. Case 1 of Fig. 86 can be such an example. The receiver detects the L1_header (H) header to locate the start position of the L1_header (H) header within the tuner window, but the found L1_header header may be the header of the incomplete L1_XFEC_FRAME (5w-a-4). L1 signaling information may not be received correctly if the L1_XFEC_FRAME frame length is derived from this L1_header header, and the rest of the part (5w-a-5) is added to the start position of this L1_header header. To prevent this, the receiver may need additional operations to find the header of the complete L1_XFEC_FRAME frame. Fig. 87 is showing such operations. In this example, to find the header of the complete L1_XFEC_FRAME frame, if the incomplete L1_XFEC_FRAME frame is in the preamble, the receiver can use at least two L1_header headers to find the start location of the L1_header header to combine the L1_XFEC_FRAME frame. First, the receiver can find the L1_header header from the OFDM preamble symbol (5w-b-1). Then, using the L1_XFEC_FRAME frame length within the found L1_header header, the receiver can check if each L1_XFEC_FRAME frame in the current OFDM symbol is a complete block (5w-b-2). If this is not the case, the receiver can find the next L1_header from the current preamble symbol (5w-b-3). Based on the calculated distance between the newly found L1_header header and the previous L1_header header, it can be determined whether a given L1_XFEC_FRAME frame is a complete block (5w-b-4). Then, the L1_header header of the complete L1_XFEC_FRAME frame can be used as the point specifying the join. Using this determining point, the L1_XFEC_FRAME frame can be combined (5w-b-5). Using these processes, it can be expected that the receiver will have the case 2 or the correct combining shown in Fig. 86. These processes may be performed in the FEC header decoder r712-L1 on the L1 signal path shown in Fig. 81.

[0308] Fig. 88 is an example of preamble structure that can eliminate the above-mentioned additional operations at the receiver. Unlike the previous preamble structure, when the remaining part of the OFDM symbol is filled, only L1-FEC1 of the L1_XFEC_FRAME frame, excluding the L1_header (H) header can be filled multiple times (5w-c-2). In this way, when the receiver detects the start position of the L1_header (H) header to connect the L1_XFEC_FRAME frame, the L1_header header of only the complete L1_XFEC_FRAME frame can be found (5w-c-4), and therefore, without additional operations, the L1_XFEC_FRAME frame can be combined with using the found L1_header header. Therefore, in the receiver, processes such as (5w-b-2), (5w-b-3), and (5wb-4) shown in Fig. 87 can be eliminated. These processes and processes equivalent to these processes can be carried out in the FEC header decoder 712-L1 on the L1 signal path of the receiver shown in Fig. 81 and in the FEC header 705-L1 on the L1 signal path of the transmitter shown in Fig. 80.

[0309] Time deinterleaver r712-L1 on the L1 path of the receiver of Fig. 81 can deinterleave L1 block cells or patterned cells, excluding other cells such as preamble header and pilot cells. L1 block cells are represented by cells with patterns as shown in Fig. 83. Fig. 90 is another example of an OFDM transmitter which uses data slices. This transmitter can be of identical design and can perform the same function as the transmitter of Fig. 80, except added and modified blocks. The preamble mapper 1007-L1 may map L1 blocks and L1 block headers, which are output signals from FEC header 705-L1, to preamble symbols used in a transmission frame. In particular, the L1 block header may be repeated for each preamble, and the L1 block may be divided into as many as the number of preambles used. Time interleaver 1008-L1 can interleave L1 blocks, which are divided into preambles. At this point, L1 block header may or may not be interleaving. Whether or not the L1 block header is involved may not change the L1 block header signal structure, but may change the order of L1 block interleaving and transmission. The L1_XFEC repeater 1015-L1 may repeat the time-interleaved L1_XFEC blocks within the preamble frequency bandwidth. At this point, the L1 block header can be either repeated in the preamble or not repeated in the preamble.

[0310] Fig. 91 is showing another example of an OFDM receiver using data slices. This receiver has an identical design and can perform the same function as the receiver shown in Fig. 81, except added and modified blocks. The FEC header decoding module r1012-L1 can synchronize L1 headers in a preamble. If L1 headers are repeated, L1 headers can be combined to obtain SNR gain. Then, the FEC header decoding module r712-L1 of Fig. 81 can perform FEC decoding. The synchronization process may give the location of the header using correlation of the header synchronization word and the preambles. For frequency integers of many integers, the correlation range can be determined from cyclic addressing.

[0311] L1_XFEC merger module r1017-L1 can combine L1_XFEC blocks to obtain SRN gain when split L1 blocks are obtained in a preamble. Time deinterleaver r1010-L1 can time deinterleave L1 blocks in the preamble. Depending on whether L1 block headers are time interleaved at the transmitter or not, L1 block headers can be deinterleaved at the receiver. The order of L1 block deinterleaving can be changed depending on whether the L1 block headers are time interleaved at the transmitter or not. For example, when time interleaving is ON, as in Fig. 83, the location of cell number 33, which is the first L1 block cell within the first preamble, may change. In other words, when L1 block headers are not involved in interleaving, an interleaved signal having cell locations as shown in Fig. 83 will be obtained. If L1 block headers are involved in interleaving, cell location number 33 must be changed to interleaved cells that are interleaved diagonally, using the first cell of the first L1 block header within the first preamble as a reference. The L1_FEC merger r1018-L1 can combine L1 blocks that are divided into multiple preambles into a single L1 block for FEC decoding.

[0312] With an additional 1 bit, PLP_type field of L1 signaling fields that are transmitted in a preamble can have following values.

PLP_type = 00 (shared PLP)

PLP_type = 01 (PLP normal data)

PLP_type = 10 (PLP of demultiplexed data)

PLP_type = 11 (reserved) [0313] Normal data PLP represents PLP data in the case where a single service is transmitted in a single data segment. PLP of demultiplexed data represents PLP of data when a single service is demultiplexed to multiple data segments. When the user changes the service, if L1 signaling and L2 signaling are stored in the receiver, waiting for L1 signaling information in the next frame can be eliminated. Therefore, the receiver can efficiently change services and the user can get the benefit of less delay when changing the service. Fig. 95 is showing structures of an L1 block signal that is transmitted in a preamble, for time interleaving stream and time deinterleaving stream. As seen in Fig. 95, interleaving and deinterleaving can be performed not on the entire preamble bandwidth, but on the divided L1 block.

[0314] Fig. 96 is an example of L1 time interleaving L1 signaling fields, processed by FEC header 705-L1 on L1, shown in Fig. 90. As shown in Fig. 96, one bit or two bits can be used for time interleaving parameter. If one bit is used, interleaving is not performed when the bit value is 0, and the interleaving of the OFDM symbol depth used in the preamble symbols can be performed when the bit value is 1. If two bits are used when the bit value is 00, interleaving is performed with interleaving depth of 0 or interleaving is not performed, while interleaving with the depth of OFDM symbols used in preamble symbols can be performed when the bit value is 01. Interleaving having a depth of four symbols OFDM can be carried out when the bit value is 10. Interleaving having a depth of eight OFDM symbols can be performed when the bit value is 11.

[0315] The receiver, in particular, the FEC header decoder r1012-L1 on path L1 shown in Fig. 91 can extract the time interleaving parameters (TI) shown in Fig. 96. Using these parameters, time deinterleaver r1010-L1 can perform deinterleaving according to the interleaving depth. Parameters that are transmitted in the L1 header include L1 information size (15 bits), time interleaving parameter (maximum 2 bits), and CRC (maximum 2 bits). If the Reed-Muller code RM (16, 32) is used to encode the L1 signaling header field, because the bits that can be transmitted include 16 bits, there are not enough bits. Fig. 97 is an example of L1 signaling field that can be used in this case.

[0316] Fig. 97 shows processing performed on a FEC header 705-L1 on path L1 of Fig. 90. Fig. 97a, L1 () in a column of signaling fields represents size L1 and TI () represents size for interleaving parameters after a while. In the first case, or when L1 (15 bits) and TI (1 bit) sizes are transmitted, additional padding may not be necessary, and significant L1 header decoding performance can be achieved, however, because information is provided on whether to perform interleaving after time or not, for a short L1 block, interleaving effect cannot be obtained.

[0317] In the second case or when L1 size is reduced to 1/8 of original size, transmitting information with numbers of bits such as L1 (12 bits), TI (2 bits), and CRC (2 bits) becomes possible. Thus, for the second case, the best L1 decoding performance and time interleaving effect can be expected. However, the second case requires an additional padding process to get L1 size being a multiple of eight if L1 size is not a multiple of eight. In fig. 97b shows the padding method that can be performed on the L1 700-L1 signal shown in Fig. 90. This illustrates that padding is located after L1 block and coincides with CRC coding. As a consequence, at the receiver, the FEC BCH / LDPC decode module r715-L1 on the L1 path shown in Fig. 91 it can perform FEC decoding, and then if there is no error after checking the CRC field, you can perform bit syntax analysis according to the L1 signal block field, after which the process of defining the rest of the bits, such as padding or CRC32, is required, and excluding the rest of the bits from the parameters.

[0318] For the third case or when L1 size is expressed as a number of QAM mapped cells, not a number of bits, the number of bits may be reduced. In the fourth case, the size L1 is expressed not as the size of the entire L1 block, but as the size L1 for each OFDM symbol. Thus, for a receiver to obtain the entire L1 block size, the L1 block size must be multiplied in a single OFDM symbol by the number of OFDM symbols used in the preamble. In this case, the actual size L1 must exclude padding.

[0319] In the fifth case, by expressing the L1 block not as a number of bits but as a number of QAM mapped cells, it is possible to obtain a greater reduction in bits. In cases three through five, the parameters TI, CRC, and the number of necessary bits are shown. For the case in which the L1 block size is expressed as the number of cells, for the receiver to obtain the L1 size in bits, the receiver must multiply the number of bits in which only cells are transmitted by the received L1 size. In addition, the number of padding bits must be excluded. [0320] The last case illustrates increasing the total number of bits to 32 bits by using two RM code blocks in header. The total CRC fields become four-bit because each RM code block needs two bits of the CRC field. The FEC header receiver or decoder r1012-L1 on the L1 path, shown in Fig. 91, needs FEC decoding on a total of two FEC blocks to obtain the necessary parameters. Using the received parameters, the receiver, in particular the time deinterleaver r1010-L1 on the L1 path, shown in Fig. 91, may specify whether or not to perform deinterleaving, and may receive deinterleaving depth if it is specified that deinterleaving is to be performed. In addition, the FEC BCH / LDPC decoding module r715-L1 can receive the LDPC block length required to perform FEC decoding and shortening / puncturing parameters. Thus, the superfluous padding fields required to send the L1 signal to the system controller can be eliminated.

[0321] Fig. 92 shows an example of a data slice time interleaving (TI). The TI process assumes that all pilot positions are known. The TI process can only output data cells, excluding pilot signals. Knowing the positions of the pilot signal, it is possible to obtain the correct number of output cells for each OFDM symbol. Also, the TI process can be implemented by a single buffer in the receiver.

[0322] Fig. 93 is an example of an efficient implementation of Time De-interleaver at a receiver. Fig. 93a shows four different deinterleaving schemes according to an embodiment of the present invention. Fig. 93b shows a single buffer that performs deinterleaving. Fig. 93c shows an exemplary scheme of addressing L1 blocks in a 2D matrix or in a 1D sequence.

[0323] As illustrated in Figs. 93a-c, a more efficient implementation of time deinterleaver can be obtained using a single buffer algorithm. The algorithm can be characterized by reading the output cells from memory first, and then writing the input cells where the output cells are read. Diagonal addressing can be considered as circular addressing in each column.

[0324] More specifically, referring to Fig. 93a, these four methods of writing and reading then apply to the C2 frames that are received at the receiver. The first received frame at the receiver is stored in the memory of the deinterleaver, as in Fig. 93b, in the same way as for the zero block in Fig. 93a, and read as in the first block. The second frame received is stored in the memory of the deinterleaver in Fig. 93b as for the first block and read as for the second block. The third frame received is stored in the memory of the deinterleaver in Fig. 93b in a manner as for the second block and read in the manner as for the third block. The fourth received frame is written to the de-interleaver memory in Fig. 93b in a manner as for the third block and read in the manner as for the zero block, and so on. This means that the writing and reading methods shown in Fig. 93a can be sequentially and cyclically applied to C2 frames that are sequentially obtained.

[0325] Time interleaving (TI) process can be performed on preambles as shown in Fig. 94. Pilot positions are periodically and easily removed and no interleaving is necessary for L1 block header. This is because the preamble header carries TI parameters and both interleaving and non-interleaving have the same results because of the repetition. Thus, only L1 signaling cells are interleaved. The single buffer memory used in the TI data segment can be used.

[0326] Fig. 95 is showing a preamble time interleaving flow. Interleaving can be performed in one L1 block instead of the entire preamble. At the transmitter, as shown in Fig. 128a, L1 block can be encoded (1), then interleaving at L1 block (2) can be performed, and interleaved L1 block can be repeated in preamble. In the receiver, as illustrated in fig. 128b, from the received preamble (1), the L1 block can be combined or synchronized and a single L1 block period can be obtained (2) and the combined L1 block can be deinterleaved (3).

[0327] Fig. 96 is showing time interleaving depth parameters in L1 signaling header. For L1 header construction, RM (16, 32) has 16 capacity bits. A maximum of 2 CRC bits can improve RM BER performance. Required L1 header signaling fields include L1_info_size (15 bits), which may require a maximum of 5 OFDM symbols, and TI_depth (2 bits or 1 bit).

However, a total of 18 or 19 bits exceed the L1 header capacity.

[0328] Fig. 97 is an example of L1 signaling header and structure and padding method. [0329] Fig. 98 is an example of L1 signaling transmitted in a frame header. L1 signaling information can be used as decoding parameters in a receiver. Specifically, the modules on the L1 signal path, shown in Fig. 91, can perform L1 signaling decoding, and the modules on the PLP path, shown in Fig. 91, may use parameters, and thus services may be decoded. The receiver can receive L1 signaling block parameters from L1 path signals that are decoded according to the order of each field and field length. The meaning of each field and its use are explained below. The name of each field, the number of bits for each field, or an example of each field can be modified.

[0330] Num_chbon: This field indicates the number of channels used in channel bonding. By using this field, the receiver can obtain the total frequency bandwidth of the channels used. The channel can have 6 MHz, 7 MHz, 8 MHz, or other frequency bandwidth values.

[0331] Num_dslice: This field indicates the number of data slices occurring on a bonded channel. After decoding the L1 signaling block, the receiver gains access to the loop in which the data segment information is included to obtain information about the data segment. By using this field, the receiver can receive a loop size for decoding.

[0332] Num_notch: This field indicates the number of indentation bands existing in a bonded channel. After decoding the L1 signal block, the receiver gains access to the loop in which the indentation band information is included to obtain indentation band information. By using this field, the receiver can receive a loop size for decoding.

[0333] For each data slice, dslice_id, dslice_start, dslice_width, dslice_ti_depth, dslice_type, dslice_pwr_allocation, and PLP information can be transmitted in the preamble of the frame header. A data segment can be considered a specific frequency bandwidth that contains one or more PLPs. Services can be broadcast in PLP streams. The receiver needs to access the data segment that contains the specific PLP in order to decode the services.

[0334] Dslice_id: This field can be used to identify a data slice. Each data segment in the connected channel can have a unique value. When the receiver gains access to one of the PLPs to decode services, this field can be used for the receiver to distinguish the data segment in which the PLP is located from other data segments.

[0335] Dslice_start: This field indicates the start location of a data slice on the connected channel. By using this field, the receiver can receive the frequency at which the data segment begins. In addition, tuning to access the data segment can be performed by using this field.

[0336] Dslice_width: This field indicates data bandwidth. By using this field, the receiver can receive the size of the data segment. Particularly, this field can be used in time deinterleaving to enable decoding. Along with the dslice_start field, the receiver can determine which frequency to decode from the received RF signals. This process can be carried out on the tuner r700 shown in Fig. 91. Information such as dslice_start and dslice_width can be used as the tuner control signal (r700).

[0337] Dslice_ti_depth: This field indicates the depth of the time interleaver used on the time interleaved data slices. Along with the dslice_width field, the receiver can receive time deinterleaving width and depth and can perform deinterleaving over time. Fig. 99 is an example of dslice_ti_depth. In this example, 1, 4, 8, or 16 OFDM symbols are used in the time interleaving process. This process is carried out in the deinterleaver after r710 shown in Fig. 91. Dslice_width and dslice_ti_depth can be used as a control signal.

[0338] Dslice_type: This field indicates type of data slice. Type 1 data slice includes a single PLP and this PLP uses CCM (fixed coding and modulation). Type 2 data segment represents all other types of data segments. By using this field, the receiver can perform decoding according to the PLP. Type 1 PLP does not have a FECFRAME header, and therefore the receiver does not look for a FECFRAME header. For type 2, the receiver looks for the FECFRAME header of the PLP to obtain MODCOD information. Fig. 100 is an example of dslice_type. By using this field, the data slice parser r711 of Fig. 91 can control the FEC header decoder r712-c, k.

[0339] Dslice_pwr_allocation: This field indicates data segment power. Each data segment can have different power from other data segments. This is due to the adaptation of the connection to the cable network. The receiver can use this field to control the power of the received data segment. The tuner r700 shown in Fig. 91 can adjust the gain of the signal by using this field.

[0340] Num_plp: This field indicates the number of PLPs in the data slice. After decoding the L1 signaling block, the receiver gains access to the loop that includes PLP information. By using this field, the receiver can obtain the loop size and decode PLPs.

[0341] For each PLP, plp_id, plp_type, PSI / SI reprocessing, plp_payload_type, plp_modcod, and plp_start_addr can be transmitted in the frame header (preamble). Each PLP can broadcast one or more streams or packets, such as TS and GSE. The receiver can receive services by decoding PLPs in which services are transmitted.

[0342] Plp_id: This field is a PLP identifier and has a unique value for each PLP in a bonded channel. By using this field, the receiver can access the PLP in which the decoding service is located. This field can be used for the same purpose as plp_id in the FECFRAME header. The FEC header decoder r712-c, k in Fig. 91 can access the necessary PLP by using this field.

[0343] Plp_type: This field indicates whether the PLP type is a shared PLP or a data PLP. By using this field, a receiver can find common PLPs and can receive information required to decode a TS packet from common PLPs. Then, the receiver can decode the TS packet within the data PLP. Fig. 101 shows an example of plp_type. [0344] PSI / SI Reprocessing: This field indicates whether or not PSI / SI reprocessing of the received signal has been performed. By using this field, the receiver can determine whether to invoke the PSI / SI specific service from the broadcast service. If the receiver cannot rely on the PSI / SI specific service from the broadcast service, the PSI / SI to which the specific service may refer may, for example, be transmitted via common PLPs. By using this information, the receiver can decode services. In addition, this field can be a 1-bit field. This field can be used by the receiver to recognize if it can rely on related parts of PSI / SI. When PSI / SI reprocessing is performed, this field should be set to '1', otherwise it should be set to '0'.

[0345] Plp_payload_type: This field indicates type of payload data that PLP transmits. The receiver can use this field before decoding data within PLPs. If the receiver cannot decode a specific data type, you can prevent decoding a PLP that contains that specific data type. Fig. 102 shows an example of Plp_payload_type. If the data segment has a single PLP and CCM is applied to the data segment, i.e., to the data segment type 1, fields such as plp_modcod and plp_start_addr may also be transmitted.

[0346] Plp_modcod: This field indicates modulation type and FEC code rate used on PLP. By using this field, the receiver can perform QAM demodulation and FEC decoding. Fig. 103 is an example of Plp_modcod. The values ​​shown in this figure can be used in the modcod, which is transmitted in the header of the FECFRAME frame. Symbol demapper r713-c, k FEC BCH / LDPC r715-c decoding module, k shown in fig. 91 may use this field for decoding.

[0347] Plp_start_addr: This field indicates where the first FECFRAME of the PLP in the transmission frame appears. By using this field, the receiver can receive the initial location of the FECFRAME and perform FEC decoding. By using this field, the data slice parser r711 of Fig. 91 can synchronize FECFRAME frames for type 1 PLPs. For each indentation band, information such as notch_start and notch_width can be transmitted in the frame header (preamble).

[0348] Notch_start: This field indicates a start location of an indentation band. Notch_width: This field indicates the notch bandwidth. By using the notch_start and notch_width fields, the receiver can receive the location and size of the indentation band in the connected channel. In addition, you can receive the tuning location for proper service decoding and you can check for the existence of the service over a certain frequency bandwidth. The r700 tuner shown in fig. 91 can perform tuning by using this information.

[0349] GI: This field indicates information about the inter-channel interval used in the system. The receiver can receive information about the inter-channel range by using this field. The time / frequency synchronizing element r702 and the GI removing element r704 shown in Fig. 91 can use this field. Fig. 104 shows an example.

[0350] Num_data_symbols: This field indicates the number of OFDM data symbols, except for the preamble, used in the frame. The length of the transmission frame can be defined by this field. By using this field, the receiver can predict the location of the next preamble, and therefore, this field can be used to decode L1 signaling. The r708 frame parser shown in fig. 91 can use this field and predict OFDM symbols that are preamble and send a signal to a preamble decoding path.

[0351] Num_c2_frames: This field indicates the number of frames present in a super frame. By using this field, a receiver can receive a super frame boundary and can predict information repeated by each super frame.

[0352] Frame_idx: This field is a frame index and is reset for each super frame. By using this field, the receiver can receive the current frame number and find the location of the current frame within the super frame. By using this field, the frame parser r708 in Fig. 91 can determine how many frames are in front of the current frame in a super frame. Along with the num_c2_frames field, it is possible to predict the change occurring in the L1 signaling block and to control L1 decoding.

[0353] PAPR: This field indicates whether tone booking is used to reduce PAPR or not. By using this field, the receiver can process accordingly. Fig. 105 shows an example. For example, if tone reservation is used, the receiver may exclude carriers used in tone reservation from decoding. In particular, the data slice parser r711 of Fig. 91 can use this field to exclude carriers from decoding.

[0354] Reserved: This field is additional bits reserved for future use.

[0355] Fig. 106 shows another example of L1 signaling transmitted in a frame header. In Fig. 106, the additional information added to Fig. 98 may increase the efficiency of the decoding service by the receiver. The following fields only explain this additional information. The other fields are the same as in Fig. 98.

[0356] Network_id: This field indicates a network to which a transmitted signal belongs. By using this field, the receiver can find the current network. When the receiver tunes to another network to find a service on the network, the receiver can process faster because only L1 decoding is sufficient to decide whether the tuned network is the desired network or not.

[0357] C2_system_id: This field identifies the system to which the transmitted signal belongs. By using this field, the receiver can find the current system. When the receiver tunes to another system to find a service in that system, the receiver can process faster, because using only L1 decoding is sufficient to decide whether the tuned system is the desired system or not.

[0358] C2_signal_start_frequency: This field indicates a starting frequency of connected channels. C2_signal_stop_frequency: This field indicates the final frequency of connected channels. By using the c2_signal_start_frequency and c2_signal_stop_frequency fields, the RF frequency bandwidth of all data segments can be found by L1 decoding a certain frequency bandwidth within connected channels. In addition, this field can be used to obtain the frequency shift amount required for L1_XFEC_FRAME frame synchronization. The L1 XFEC r1017-L1 connecting element shown in Fig. 91 can use this field. In addition, when the receiver receives data segments located at both ends of the connected channel, this field can be used to tune to the appropriate frequency. The tuner r700 shown in Fig. 91 can use this information.

[0359] Plp_type: This field indicates whether PLP is a common PLP, PLP of normal data, or PLP of grouped data. By using this field, the receiver can identify the common PLP and can receive the information required to decode the TS packet with the common PLP, and then can decode the TS packet within the PLP of the grouped data. Here, the common PLP may be a PLP that contains data common to multiple PLPs. Fig. 107 is an example of this field. Normal data PLP means a data PLP that does not have a common PLP. In this case, the receiver does not need to find a common PLP. A grouped PLP or PLP grouped may broadcast information such as plp_group_id. For other types of PLP, more efficient transmission is possible because no additional information needs to be transmitted. [0360] Plp_group_id: This field indicates a group where a current PLP belongs to. The PLP of the grouped data may transmit common TS parameters using the common PLP. By using this field, if the currently decoded PLP is a grouped PLP, the receiver can find the necessary common PLP, obtain the parameters required for the grouped TS PLP package, and create a complete TS package.

[0361] Reserved_1 / reserved_2 / reserved_3: These fields represent additional bits reserved for future use for data slice loops, PLP loop loops, and transmission frame, respectively.

[0362] Fig. 108 shows another example of L1 signaling transmitted in a frame header. Compared to Fig. 106, more optimized information can be transmitted, and therefore, less signaling overhead can occur. Accordingly, the receiver can effectively decode services. Specifically, the modules on the L1 signaling path shown in Fig. 91 can perform L1 signaling decoding and the modules on the PLP path shown in Fig. 91 they can use parameters and thus, services can be decoded. The receiver can receive L1 signaling block parameters from L1 path signals that are decoded according to the order of each field and field length. The name of each field, the number of bits for each field, or an example of each field can be modified. The field descriptions except for the dslice_width field are identical to the field descriptions mentioned above. The function of the dslice_width field according to the example is as follows.

[0363] Dslice_width: This field indicates data bandwidth. By using this field, the receiver can receive the size of the data segment. Particularly, this field can be used in time deinterleaving to enable decoding. Along with the dslice_start field, the receiver can determine which frequency to decode from the received RF signals. This process can be carried out on the tuner r700 shown in Fig. 91. Information such as dslice_start and dslice_width can be used as the control signal of tuner r700. At this point, the data segment width can be increased to 64 MHz by using 12 bits for this dslice_width field. By using this field, the receiver can determine whether the currently available tuner can decode the current data segment. If the data segment width is greater than the frequency bandwidth of an existing receiver tuner, to decode such data segment, the receiver may use either at least two existing tuners or a tuner with a sufficiently large frequency bandwidth. In this example, the granularity of the values ​​used in the dslice_start, dslice_width, notch_start, and notch_width fields can be 12 OFDM carriers (cells). In other words, the receiver can find the location of the actual OFDM cell by multiplying the transmitted values ​​by 12. In this example, for the granularity of the Plp_start_addr field, one OFDM carrier (cell) can be used. In other words, the receiver can determine how many OFDM symbols and OFDM cells are in front of the initial location of the PLP in the OFDM symbol. The dslice_start and dslice_width fields can be used for this. The r711 data slice parser shown in Fig. 91 can carry out such a process.

[0364] Fig. 109 shows an example of processing at FEC header 705-L1 on L1 path of Fig. 90. A total of 16 bits can be transmitted in FEC header of L1 path. Fourteen bits can be allocated for the L1_info_size field. If the L1_info_size field has a value that is half the length of the actually transmitted L1 block, the receiver can multiply the received L1_info_size field by two and get the actual length of the L1 block and start L1 decoding. This L1 block length obtained is the length that includes the padding of the data block.

[0365] For an L1 block which, as determined, has no error, despite the CRC checking, the receiver can consider the rest of the bits after L1 decoding as a complement to the data block. The last two bits, as in previous methods, can be used to indicate the depth of time preamble interleaving. The preamble mapper 1007-L1 of Fig. 90 can determine the required OFDM symbols for transmitting L1 blocks. Then, time interleaver 1008L1 of Fig. 90 can perform time interleaving. By using time interleaving depth information and the L1_info_size field, the receiver can determine what size of L1 block is transmitted in as many OFDM symbols. The joining, merging, and time deinterleaving of L1 blocks can be performed in L1 XFEC 12417-L1 connecting element, L1_FEC 12418-L1 connecting element, and in time deinterleaver 12410-L1 shown in Fig. 91, respectively. [0366] At the receiver shown in Fig. 91, the L1 XFEC block length in an OFDM symbol can be obtained by dividing the total L1 block length by the number of OFDM symbols used in the preamble. The number of OFDM symbols can be obtained from the values ​​defined in ti_depth. A receiver L1 XFEC 12417-L1 connector can receive an L1 XFEC block. Then, time deinterleaving 12410-L1 can be performed using ti_depth. Finally, L1 XFEC blocks can be combined to obtain a L1_FEC block. After merging using L1_FEC 12418-L1 combiner, bit deinterleaving r714-L1, and LDPC / BCH decoding r715-L1, L1 block can be obtained. The L1_info_size field can be multiplied by two, the L1 block can be CRC checked, and can decode L1. Unnecessary padding of the data block can be neglected.

[0367] Fig. 110 is showing another example of L1 signaling transmitted in a frame header. Compared to Fig. 108, the number of bits for some fields are modified and some fields are added to improve the decoding efficiency of the receiver. Specifically, the modules on the L1 signal path of Fig. 91 can perform L1 signaling decoding, and the modules on the PLP path of Fig. 91 can use parameters, and therefore services can be decoded. The receiver can receive L1 signaling block parameters from L1 path signals that are decoded according to the order of each field and field length. The name of each field, the number of bits for each field, or an example of each field can be modified. With the exception of the modified fields from the previous figure, the field descriptions are identical to the field descriptions mentioned above. RESERVED_1, RESERVED_2, RESERVED_3, and RESERVED_4 indicate fields reserved for future use. In this example, the PLP_START field may indicate the same information as the above-mentioned plp_start_addr field.

[0368] L1_PART2_CHANGE_COUNTER indicates the number of frames from the first frame to the frame that shows a change in any L1 signaling information, excluding the PLP_START field change from the previous frames. This means that this field indicates the number of frames in front where the configuration will change. By using this field, the receiver can skip L1 decoding for each frame to obtain L1 information. In other words, by applying the L1_PART2_CHAGNE_COUNTER field value, the receiver can determine which frame shows a change in L1 information from previous frames, and therefore, no L1 decoding is performed for frames before a frame showing a change in L1 occurs, then L1 decoding can be performed failed for a frame that shows a change in L1. Thus, unnecessary operations may be omitted. By using this field, the receiver can avoid unnecessary L1 decoding operation. This value can also be calculated by the receiver using already decoded L1 information.

[0369] If the L1_PART2_CHANGE_COUNTER field is 0, it means that there has been no change in L1 for at least 256 (2^Λ8, 8 means the number of bits used for L1_PART2_CHANGE_COUNTER) frames. In this one of the best cases, the receiver only needs to decode L1 every 51 seconds. This process can be performed in the frame parser r708 shown in Fig. 91. The frame parser can determine if the current preamble shows a change in L1 and can control subsequent processes on the L1 signal path. The receiver can calculate PLP_START for a specific frame from the PLP_START and PLP_MODCOD already received, without performing L1 decoding to obtain PLP_START. [0370] Fig. 111 shows examples of fields shown in Fig. 110. Blocks of a receiver can perform processes according to the values ​​indicated by the fields in the examples.

[0371] Fig. 112 shows another example of L1 signaling transmitted in a frame header. Compared to Fig. 110, some fields are modified and some fields are added to improve the decoding efficiency of the receiver. Specifically, the modules on the L1 signal path of Fig. 91 can perform L1 signaling decoding, and the modules on the PLP path of Fig. 91 can use parameters, and therefore services can be decoded. The receiver can receive L1 signaling block parameters from L1 path signals that are decoded according to the order of each field and field length. The name of each field, the number of bits for each field, or an example of each field can be modified. With the exception of the modified field from the previous figure, the field descriptions are identical to the field descriptions mentioned above.

[0372] DSLICE_START, DSLICE_width, NOTCH_START, and NOTCH_width field descriptions are identical to previous descriptions. However, signaling overhead can be minimized by signaling fields with a minimum number of bits according to the GI mode. Accordingly, it can be said that DSLICE_START, DSLICE_width, NOTCH_ START, and NOTCH_width signaling are based on GI mode. L1 information can be obtained from the L1 signal path of the receiver shown in Fig. 91. The system controller can determine the number of bits used for each field according to the GI value obtained and can read the fields accordingly. The G1 value must be assigned before other values.

[0373] Instead of DSLIC_START and DSLICE_width, 12 tuning position bits may be transmitted, which indicates the optimized location for receiving the data slice and 11 bits of offset value from the tuning position to indicate the width of the data slice. Particularly, by using 11 bits of offset value, data segments that occupy a maximum of 8 connected channels can be signaled and a receiver that can receive such data segments can operate accordingly. The receiver tuner r700 shown in fig. 91 it can determine the RF frequency bandwidth using the tuning position and can obtain the data segment width using the offset value to serve the same purpose as the DSLICE_width field mentioned above.

[0374] DSLICE_CONST_FLAG means a field indicating whether the configuration of a specific data segment is kept constant. By using this field obtained from L1 from a certain frequency bandwidth, the receiver can determine whether the specific data segment has a fixed configuration, and then the receiver can receive PLPs of the specific data segment without additional L1 decoding. This type of process may be useful for receiving a data slice that is located in the frequency bandwidth where L1 decoding is not available. [0375] DSLICE_NOTCH_FLAG is a field or flag that indicates the indentation band on both edges of a specific data segment. The Most Significant Bit (MSB) can be used as an indicator for an adjacent notch band at a low frequency bandwidth, and the Least Significant Bit (LSB) can be used as an indicator for an adjacent indent band at a high frequency bandwidth . By using this field, when the receiver decodes a specific data segment, the receiver can consider indentation bands by identifying changes in active carriers caused by continuous pilot signals adjacent at both ends of the indentation band. This information can also be obtained from indentation information broadcast in the NOTCH_START and NOTCH_width fields. Time deinterleaver r710 of the receiver shown in Fig. 91 can use information to find the location of active carriers and send data only corresponding to the active carriers to the data segment parser.

[0376] For PLP_TYPE, one additional bit is added in Fig. 110. Fig. 113 is an example of plp_type in Fig. 112. A value indicating bundled PLP data can be transmitted. A large TS stream with a high data rate can be multiplexed to many PLPs. Bundled data PLPs can be used to indicate PLPs in which multiplexed streams are transmitted. For an existing receiver that is unable to decode a specific PLP, this field can prevent that receiver from gaining PLP access, and thus, it is possible to prevent malfunction. [0377] Still as an alternative method, if the above-mentioned dslice_width field is used together with the dslice_start field and indentation information, the receiver can determine which frequency to decode from the received RF signals. This process can be performed on the tuner (r700) shown in Fig. 91. Information such as dslice_start, dslice_width, notch_start, and notch_width can be used as the control signal of tuner r700. Thus, by avoiding indentation, it becomes possible to obtain a data segment and simultaneously perform tuning to the RF band, in which there is no problem with L1 decoding.

[0378] Considering the L1 signaling block of Fig. 112, Fig. 114 shows the relationship between L1 signaling and L2 signaling when the PLP is of the related type. In addition, Fig. 114 also shows an activity that can be performed by a receiver in such a case. TS 1 can be mapped to PLP37 via L2 c2dsd. This TS1 corresponds to a normal L1 PLP, and therefore, the PLP can be decoded by a normal receiver (single 8 MHz tuner) and an improved receiver (multiple tuner or broadband tuner (> 8 MHz)). TS2 and TS3 are mapped to PLP39 and PLP44, respectively, via c2dsd. They correspond to the associated PLP L1, and thus these PLPs can be decoded by an improved receiver (multiple tuner or broadband tuner (> 8 MHz)), but not by a normal receiver (single 8 MHz tuner). Consequently, according to L1 information, the receiver can check whether or not a corresponding TS is received.

[0379] Fig. 115 and Fig. 116 are flow diagrams describing L1 decoding and L2 decoding activities for beam PLP and normal PLP in a normal receiver and an improved receiver, respectively. Fig. 117 is an example of the construction c2_delivery_ system_descriptor and syntax for L2 signaling, while taking into account Fig. 112. This descriptor can map TS_id to plp_id as shown in Fig. 114. Beam information may be processed at L1 and therefore need not be signaled at L2. The variables shown in Fig. 117 are described as follows.

[0380] Plp id: This 8-bit field uniquely identifies the data PLP in the C2 system.

[0381] C2_system_id: This 16-bit field uniquely identifies the C2 system. The rest of this descriptor, immediately following the C2_system_id field, occurs only once per C2 system, because the parameters are uniquely applicable to all data segments carried on the given C2 system. The presence or absence of this part may be derived from the field of the desk length. In the absence of the remaining part, this length is equal to 0x07, otherwise larger values ​​are assigned to it.

[0382] C2_System_tuning_frequency: This 32-bit field indicates a frequency value. The coding range can be from a minimum of 1 Hz (0x00000001) to a maximum of 4, 294, 967, 295 Hz (0xFFFFFFFF). This data field can give a tuning frequency where a complete preamble is transmitted within the tuning window. Generally, the C2_System_tuning_frequency field means the center frequency of the C2_System field, but may deviate from the center frequency for notches in this area.

[0383] Active_OFDM_symbol_duration: This 3-bit field indicates the duration of the active OFDM symbol. An example of this field is shown in Fig. 118.

[0384] Guard_interval: This 3 bit field indicates an inter-channel interval. An example of this field is shown in Fig. 119.

[0385] In previous L1 time interleaving / deinterleaving examples, in cases where TI_DEPTH is "10" or "11", the preamble mapper 1007-L1 of Fig. 90 can evenly divide the original L1 block into four or eight subblocks. However, if the subblock size is smaller than the minimum size required to perform FEC encoding, then the FEC encoding may not be performed correctly. A possible solution may be to set a limit value. If the L1 block size is smaller than the set limit value, the L1 block can be repeated four or eight times in cases where TI_DEPTH is "10" or "11". If the L1 block size is larger than the set limit, then the L1 block can be evenly divided into four or eight subblocks. The limit value can be set to four or eight times the minimum size required to perform FEC encoding. [0386] In addition, setting TI_DEPTH as "10" or "11" occurs in cases where time interleaving effect is not obtained because of the small L1 block size. Thus, the limit value can be defined as the size of information bits that can be transmitted by a single preamble symbol. For example, if the FEC L1 coding is assumed to be identical to DVB-T2, the limit value will be 4.772 bits.

[0387] In cases where TI_DEPTH is "10" or "11", using L1 size information, TI depth, and the limit value shared between transmitter and receiver, receiver modules, from FEC header decoder r1012-L1 to L1_FEC_Merger r1018-L1 Fig. 91 can determine the size of L1 subblock, combining, and merging L1 subblocks that are transmitted in a preamble OFDM symbol.

[0388] If L1 size is smaller than the limit, L1_FEC_Merger r1018-L1 shown in Fig. 91 does not need to combine split subblocks because the original L1 block is repeatedly transmitted according to TI_DEPTH in four or eight OFDM symbols. However, if the L1 size is larger than the limit because the number of symbols that is greater than the number of OFDM symbols required for L1 block transmission is used, the FEC header decoder r1012-L1 shown in Fig. 91 can obtain the subblock size using TI_DEPTH. Then, L1_FEC connecting element r1017-L1 can join L1 FEC blocks and time deinterleaver r1010-L1 can perform deinterleaving. Finally, L1_FEC linker r1018-L1 can combine L1_FEC blocks to restore the original L1 block.

[0389] Fig. 120 is showing another example of L1 signaling which is transmitted in frame header. Compared to Fig. 112, some fields have been modified and some fields have been added to improve the decoding performance of the receiver. Specifically, modules on the L1 signal path of Fig. 91 can perform L1 signaling decoding, and modules on the PLP path of Fig. 91 can use parameters, and thus services can be decoded. The receiver can receive L1 signaling parameters from L1 path signals, which are decoded according to the order of each field and field length. The name of each field, the number of bits for each field, or an example of each field can be modified. With the exception of the modified fields from the previous figure, the half explanations are identical to the above field explanations.

[0390] DSLICE_TUNE_POS indicates the tuning position for a receiver to receive a data slice. Depending on the GI mode, this value can be expressed in 12 or 11 bits. DSLICE_OFFSET_RIGHT and DSLICE_OFFSET_LEFT, which indicate the amount of shift from the tuning position or the width of the data segment, can be expressed in 9 or 8 bits, depending on the GI mode. In the case where the offset can have a certain value, i.e. a positive or negative value, the position and width of the data segment containing the narrow band may also be expressed. The receiver tuner r700 shown in Fig. 91 can determine the RF band using the tuning position, and then using this determined offset amount, a data slice width can be obtained. In this way, this field can serve the same purposes as the DSLICE_WIDTH field mentioned above. The receiver can receive the width in bits using the GI value.

[0391] DSLlCE_NOTCH_FLAG is a flag indicating that some data segment is adjacent to the indentation band. This tag can serve the same purposes as the examples mentioned above, but in this case, only 1 bit is used for this field for each data segment. Using this 1 bit information, the receiver can perform the same function as the examples mentioned above.

[0392] PLP_BUNDLED_FLAG indicates that the PLP is bundled PLP data. This means that the PLP_BUNDLED_FLAG flag indicates whether or not the PLP is bundled with another PLP within the broadcast system. This field can serve the same purposes as the above-mentioned bundled PLP data of the PLP_TYPE field of Fig. 112. The PLP_TYPE field is shown in Fig. 110.

[0393] Fig. 121 shows another two examples of time interleaving that can be used on L1 path of Fig. 90. As seen in ON (1) time interleaving, interleaving can only be block interleaving. Compared to the method shown in Fig. 83, the frequency interleaving performance may not be as good as in the method shown in Fig. 83. However, in cases where TI_DEPTH is "10" or "11", without repeating or dividing L1 blocks according to the limit value, L1 blocks can be expanded in time direction regardless of L1 block size, and then can be repeated in the preamble if there is a place in the preamble, and thus, this method may be beneficial for simplifying controls. Interleaving can be performed by writing the input symbol streams in time direction and reading the recorded symbol streams in frequency direction. Time deinterleaver r1010-L1 on path L1 of the receiver shown in Fig. 91 may perform interleaving by writing the input symbol streams in a frequency direction and reading the written symbol streams in a time direction [0394] The second example or ON (2) time interleaving process of Fig. 120 includes an additional ON (1) time interleaving process which is cyclic shifting in the direction of the rows. By using this process, in addition to the advantages of ON (1) time interleaving, you can achieve a frequency expansion effect. Time deinterleaver r1010L1 on path L1 of the receiver shown in Fig. 91 must perform cyclic repositioning in the direction indicated by the rows before performing the ON time interleaving (1).

[0395] Using the proposed methods and devices, among other advantages, it is possible to implement an effective digital transmitter, receiver and physical layer signaling structure.

[0396] By sending ModCod information in each BB frame header that is necessary for ACM / VCM and transmitting the rest of the physical layer signaling in a frame header, signaling overhead can be minimized.

[0397] Modified QAM for a more energy efficient transmission or a more noise-robust digital broadcasting system can be implemented. The system may include a transmitter and receiver for each example disclosed and combinations thereof.

[0398] An improved, non-uniform, modified QAM for a more energy efficient transmission or a more noise-robust digital broadcasting system can be implemented. Also described is how to use the error rate code with high code rate in NU-MQAM and MQAM modulation. The system may include a transmitter and receiver for each example disclosed and combinations thereof.

[0399] The proposed L1 signaling method can reduce overhead by 3-4% by minimizing the signal overhead during channel bonding.

[0400] It will be apparent to those skilled in the art that the present invention may be subjected to various modifications and changes without departing from the scope of the invention.