Apparatus and method for transmitting and receiving a broadcast signal

The present invention relates to a method for transmitting and receiving a signal and apparatus for transmitting and receiving a signal, and more specifically, a method of transmitting and receiving a signal and an apparatus for transmitting and receiving a signal that is capable of improving data transmission efficiency.

Description of the related field [0002] Owing to the development of digital broadcasting technology, users can receive a high resolution (HD) motion image. Along with the continuous development of the compression algorithm and high performance of computer hardware, users will have better conditions in the future. A digital TV system (DTV) can receive digital broadcasting and provide users with various additional services, as well as a video signal and an audio signal. In the October 2008 internet publication: ETSI Digital video broadcasting (DVB). The structure of the digital television broadcasting system (DVB-T2) describes the coding and modulation of the channel for digital television services.

[0003] The Digital Video Broadcasting (DVB) -C2 standard is the third specification that has joined the second generation DVB family of transmission systems. Developed in 1994, DVB-C is currently used in more than 50 million cable receivers around the world. According to other DVB systems of the second generation, DVB-C2 uses combinations of Lowdensity parity-check (LDPC) codes and BCH codes. This strong Error Correction (Forward Error Correction FEC) improves the signal-to-noise ratio by approximately 5 dB relative to DVB-C. Suitable bit interleaving schemes optimize the overall robustness of the FEC system. These frames and their header are referred to as Physical Layer Pipes (PLP). One or more PLPs are multiplexed to form data slices.

[0004] With the development of these digital broadcasting technologies, the requirements for services associated with, for example, video signals and audio signals, as well as the amount of data desired by users or the number of broadcasting channels have been gradually increasing.

SUMMARY OF THE INVENTION [0005] Accordingly, the present invention is directed to a method of transmitting and receiving a signal and to an apparatus for transmitting and receiving a signal that substantially eliminates one or more problems resulting from limitations and disadvantages of methods and devices known in the art.

The object of the present invention is to provide a method for transmitting and receiving a signal and an apparatus for transmitting and receiving a signal that is capable of improving data transmission efficiency.

[0007] Another object of the present invention is to provide a method for transmitting and receiving a signal and an apparatus for transmitting and receiving a signal that is capable of correcting the error correction capability of the service configuring bits.

[0008] Additional advantages, objects, and features of the invention will be set forth in part in the following description and will become apparent to those having ordinary skill in the art after having analyzed the following. The objects and other advantages of the invention may be implemented and achieved by the structure particularly indicated in the description and patent claims, as well as in the attached drawings.

[0009] To achieve these aims, the present invention provides a transmitter for transmitting broadcasting data to a receiver, a transmitter comprising: an FEC with Forward Error Correction configured to encode FEC error data of Layer 1 signaling data; a bit interleaver configured to interleave the FEC coded bit error codes of Layer 1 signaling data; a quadrature amplitude modulation QAM element configured to demultiplex the interleaved bits of Layer 1 signaling data into cell words and to map cell words to constellation values ​​corresponding to the Layer 1 signaling data; a time interleaver configured to time interleave the mapped constellation values ​​corresponding to the Layer 1 signaling data; an inserter configured to insert the layer 1 header into the temporally interleaved constellation values ​​corresponding to the layer 1 signaling data; repeating elements configured to repeat constellation values ​​corresponding to Layer 1 signaling data and Layer 1 header; and a frequency interleaver configured to interleave the frequency of the repeated constellation values ​​corresponding to the Layer 1 signaling data and the Layer 1 header. repeating elements configured to repeat constellation values ​​corresponding to Layer 1 signaling data and Layer 1 header; and a frequency interleaver configured to interleave the frequency of the repeated constellation values ​​corresponding to the Layer 1 signaling data and the Layer 1 header. repeating elements configured to repeat constellation values ​​corresponding to Layer 1 signaling data and Layer 1 header; and a frequency interleaver configured to interleave the frequency of the repeated constellation values ​​corresponding to the Layer 1 signaling data and the Layer 1 header.

[0010] A further embodiment of the present invention provides a receiver for processing broadcast data, a receiver comprising: frequency deinterleaver configured to frequency deinterleave constellation values ​​corresponding to the layer 1 signaling data and the layer 1 header; an extractor configured to extract the constellation values ​​corresponding to the layer 1 signaling data from the frequency-constrained constellation values ​​corresponding to the Layer 1 signaling data and the Layer 1 header; a time deinterleaver configured to time deinterleaved the extracted constellation values ​​corresponding to the layer 1 signaling data; a QAM quadrature amplitude mapping element configured to map the inverse constellation values ​​corresponding to the Layer 1 signaling data to the Layer 1 signaling data; a bit deinterleaver configured to deinterleave the bits of the symbol-mapped reverse signaling data; and a FEC decoder with Forward Error Correction configured to FEC decoding with the Layer 1 signaling data.

[0011] Yet another embodiment of the present invention provides a method of receiving broadcasting data, the method comprising: frequency deinterleaving constellation values ​​corresponding to Layer 1 signaling data and a Layer 1 header; extracting the constellation values ​​corresponding to the layer 1 signaling data from the frequency-constrained constellation values ​​corresponding to the Layer 1 signaling data and the Layer 1 header; time-deinterleaving the extracted constellation values ​​corresponding to Layer 1 signaling data; reverse mapping of time-constrained constellation values ​​corresponding to Layer 1 signaling data to Layer 1 signaling data; deinterleaving the bits of the symbol-mapped signal mapped in reverse; and FEC error correction decoding of layer 1 signaling data.

[0012] Yet another embodiment of the present invention provides a method of transmitting broadcasting data to a receiver, the method comprising: FEC error correction of Layer 1 signaling data; interleaving the FEC coded error-correction data of Layer 1 signaling data; demultiplexing the interleaved bits of Layer 1 signaling data into cell words; mapping cell words to constellation values ​​corresponding to Layer 1 signaling data; time interleaving of mapped constellation values ​​corresponding to Layer 1 signaling data; inserting the layer 1 header into time constants that are interleaved corresponding to the layer 1 signaling data; repeating constellation values ​​corresponding to Layer 1 signaling data and Layer 1 header;

DESCRIPTION OF THE PREFERRED EMBODIMENTS [0013] The accompanying drawings, which are included in the present description to enable further understanding of the invention and are included in it and form a part of this application, illustrate an example (s) of the invention and together with the description serve to explain the essence of the invention. In the figures:

[0014] Fig. 1 shows an example of a digital broadcasting system.

[0015] Fig. 2 shows an example of an input processor.

[0016] Fig. 3 illustrates information that may be included in the base band (BB).

[0017] Fig. 4 shows an example of a BICM module.

[0018] Fig. 5 shows an example of a shortened / punctured encoder.

[0019] Fig. 6 is an example of using various constellations.

[0020] Fig. 7 is another example of cases in which compatibility between conventional systems is considered.

[0021] Fig. 8 shows a frame structure which comprises preamble for L1 signaling and data symbol for PLP data.

[0022] Fig. 9 shows an example of a frame builder.

[0023] Fig. 10 is an example of an insertion module of pilot insert 404 shown in Fig. 4.

[0024] Fig. 11 is a structure of SP.

[0025] Fig. 12 shows a new SP structure or pilot pattern (PP5 ').

[0026] Fig. 13 is a suggested PP5 'structure.

[0027] Fig. 14 shows a relationship between data symbol and preamble.

[0028] Fig. 15 is another relationship between data symbol and preamble.

[0029] Fig. 16 shows an example of a cable television delay profile.

[0030] Fig. 17 shows a distributed pilot structure that uses z = 56 and z = 112.

[0031] Fig. 18 is an example of OFDM-based modulator.

[0032] Fig. 19 is an example of preamble structure.

[0033] Fig. 20 is an example of preamble decoding.

[0034] Fig. 21 shows a method for constructing a more optimized preamble.

[0035] Fig. 22 is another example of a preamble structure

[0036] Fig. 23 is another example of preamble decoding.

[0037] Fig. 24 is an example of preamble structure.

[0038] Fig. 25 is an example of L1 decoding.

[0039] Fig. 26 shows an example of an analog processor.

[0040] Fig. 27 is an example of a digital receiver system.

[0041] Fig. 28 shows an example of an analog processor used at a receiver.

[0042] Fig. 29 is an example of demodulator.

[0043] Fig. 30 shows an example of frame parser.

[0044] Fig. 31 is an example of BICM demodulator.

[0045] Fig. 32 is an example of LDPC decoding using shortening / puncturing. [0046] Fig. 33 shows an example of an output processor.

[0047] Fig. 34 is an example of L1 block repetition rate of 8 MHz.

[0048] Fig. 35 is an example of L1 block repetition rate of 8 MHz.

[0049] Fig. 36 shows a new L1 block repetition rate of 7.61 MHz.

[0050] Fig. 37 is an example of L1 signaling block that is transmitted in a frame header. [0051] Fig. 38 is a simulation of the preamble structure and the L1 block.

[0052] Fig. 39 is an example of symbol interleaver.

[0053] Fig. 40 is an example of transmitting L1 block.

[0054] Fig. 41 shows another example of L1 signaling block that is transmitted within a frame header.

[0055] Fig. 42 is an example of frequency or time interleaving / deinterleaving.

[0056] Fig. 43 is an array with L1 signaling signal overhead analysis which is transmitted in a FECFRAME header in ModCod 307 inserting module in the BICM module data path depicted in Fig. 3.

[0057] Fig. 44 is a structure for a FECFRAME header to minimize the overhead.

[0058] Fig. 45 shows the bit error rate (BER) of the aforementioned L1 block protection.

[0059] Fig. 46 shows examples of transmission frame and FEC frame structure.

[0060] Fig. 47 is an example of L1 signaling.

[0061] Fig. 48 is showing an example of L1-pre signaling.

[0062] Fig. 49 shows the construction of a L1 signaling block.

[0063] Fig. 50 is showing an L1 time interleaving.

[0064] Fig. 51 is an example of extracting modulation and code information.

[0065] Fig. 52 is another example of L1-pre signaling.

[0066] Fig. 53 is showing an example of scheduling of L1 signaling block that is transmitted in preamble.

[0067] Fig. 54 is an example of L1-pre signaling wherein power boosting is considered.

[0068] Fig. 55 is an example of L1 signaling.

[0069] Fig. 56 is another example of extracting modulation and code information.

[0070] Fig. 57 is another example of extracting modulation and code information.

[0071] Fig. 58 is showing an example of L1 pre-synchronization. [0072] Fig. 59 is showing an example of L1-pre signaling.

[0073] Fig. 60 is an example of L1 signaling.

[0074] Fig. 61 is an example of L1 signaling path.

[0075] Fig. 62 is another example of L1 signaling frame header.

[0076] Fig. 63 is another example of L1 signaling frame header.

[0077] Fig. 64 is another example of L1 signaling transmitted within a frame which is transmitted inside that is transmitted within a frame header.

[0078] Fig. 65 is an example of L1 signaling.

[0079] Fig. 66 is an example of symbol interleaver.

[0080] Fig. 67 is showing an interleaving performance of time interleaver of Fig. 66.

[0081] Fig. 68 is an example of symbol interleaver.

[0082] Fig. 69 is showing an interleaving performance of the interleaver after the time shown in Fig. 68.

[0083] Fig. 70 is an example of symbol deinterleaver.

[0084] Fig. 71 is another example of time interleaving.

[0085] Fig. 72 shows a result of an interleaving using the method shown in Fig. 71. [0086] Fig. 73 is an example of addressing method shown in Fig. 72.

[0087] Fig. 74 is another example of L1 time interleaving.

[0088] Fig. 75 is an example of symbol deinterleaver.

[0089] Fig. 76 is another example of deinterleaver.

[0090] Fig. 77 is an example of symbol deinterleaver.

[0091] Fig. 78 is an example of row and column addresses for time deinterleaving.

[0092] Fig. 79 is an example of general block interleaving in the area of ​​data symbols in which pilot signals are not used.

[0093] Fig. 80 is an example of an OFDM transmitter that uses data slices.

[0094] Fig. 81 is an example of an OFDM receiver that uses a data slice.

[0095] Fig. 82 is an example of time interleaver and an example of time deinterleaver.

[0096] Fig. 83 is an example of creating OFDM symbols.

[0097] Fig. 84 is an example of time interleaver (Time Interleaver, TI).

[0098] Fig. 85 is an example of time interleaver (Time Interleaver, TI).

[0099] Fig. 86 is an example of a preamble structure at a transmitter and an example of processing at a receiver.

[0100] Fig. 87 is an example of a process in a receiver to obtain L1_XFEC_FRAME from preamble.

[0101] Fig. 88 is an example of a preamble structure at a transmitter and an example of processing at a receiver.

[0102] Fig. 89 is an example of time interleaver (Time Interleaver, TI).

[0103] Fig. 90 is an example of an OFDM transmitter using data slices.

[0104] Fig. 91 is an example of an OFDM receiver using data slices.

[0105] Fig. 92 is an example of time interleaver (Time Interleaver, TI).

[0106] Fig. 93 is an example of time deinterleaver (Time De-Interleaver, TDI). [0107] Fig. 94 is an example of time interleaver (Time Interleaver, TI).

[0108] Fig. 95 is an example of a flow of interleaving preamble time interleaving and deblocking.

[0109] Fig. 96 is a time interleaving depth parameter in an L1 signaling header.

[0110] Fig. 97 is an example of an L1 header signaling, L1 structure, and a method of filling a data block.

[0111] Fig. 98 is an example of L1 signaling.

[0112] Fig. 99 is an example of dslice_ti_depth.

[0113] Fig. 100 is an example of dslice_type.

[0114] Fig. 101 is an example of plp_type field.

[0115] Fig. 102 is an example of a Plp_payload_type field.

[0116] Fig. 103 is an example of a Plp_modcod field.

[0117] Fig. 104 is an example of GI.

[0118] Fig. 105 is an example of PAPR.

[0119] Fig. 106 is an example of L1 signaling.

[0120] Fig. 107 is an example of plp_type field.

[0121] Fig. 108 is an example of L1 signaling.

[0122] Fig. 109 is an example of an L1 header signaling, L1 structure, and a method of filling a data block.

[0123] Fig. 110 is an example of L1 signaling.

[0124] Fig. 111 shows examples of L1 signaling fields.

[0125] Fig. 112 is an example of L1 signaling.

[0126] Fig. 113 is an example of plp_type field.

[0127] Fig. 114 shows an example of L1 signaling and L2 signaling for normal and bundled PLP types.

[0128] Fig. 115 is an example of flow of L1 and L2 decoding activities by a conventional DVB-C2 receiver using an 8 MHz single tuner.

[0129] Fig. 116 is an example of flow of L1 and L2 decoding activities by an enhanced DVB-C2 receiver using multiple tuners or a single broadband tuner.

[0130] Fig. 117 is an example of L2 signaling for C2.

[0131] Fig. 118 is an example of duration of an active OFDM symbol.

[0132] Fig. 119 is an example of a value of a guard interval.

[0133] Fig. 120 is an example of L1 signaling.

[0134] Fig. 121 is an example of time interleaving of L1 block.

[0135] Fig. 122 is an example of an OFDM transmitter using a data slice.

[0136] Fig. 123 is an example of an OFDM receiver using a data slice.

[0137] Fig. 124 is an example of an L1 data processing flow of a transmitter.

[0138] Fig. 125 is an example of an L1 data processing flow of a receiver.

[0139] Fig. 126 is an example of L1 time interleaving process of a transmitter.

[0140] Fig. 127 is an example of L1 de-interleaving process of the receiver.

DESCRIPTION OF THE PREFERRED EMBODIMENTS [0141] Detailed information will now be provided about preferred embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numerals will be used in all figures of the drawing with reference to the same or similar parts.

[0142] In the following description, the term "service" as used indicates the transmitted content that can be transmitted / received by the signal transmission / reception apparatus.

[0143] Fig. 1 shows an example of a digital transmission system. The inputs can include multiple MPEG-TS streams or GSE streams (streams encapsulated using the general stream encapsulation scheme). The input processor module 101 may add transmission parameters to the input stream and perform scheduling for the BICM 102. The BICM 102 module may add redundancy and interleaving data to correct the transmission channel error. The frame builder 103 can build frames by adding information signaling the physical layer and pilot signals. The modulator 104 can modulate the input symbols with effective methods.

[0144] Fig. 2 shows an example of an input processor. The MPEG-TS or GSE input stream can be transformed by the input preprocessor in total of the streams that will be processed independently. Each of these streams may be in the form of a complete TS frame that includes components for multiple services or in the form of a minimal TS frame that includes a service component (i.e., video or audio). In addition, each of these streams may be a GSE stream that broadcasts multiple services or a single service.

[0145] The input interface module 202-1 may allocate a number of input bits equal to the maximum data capacity of the baseband frame data field (Baseband, BB). A padding can be inserted to fill the LDPC / BCH code block capacity. The input stream synchronizing module 203-1 may provide a mechanism for regenerating, at the receiver, a transport stream clock (or generic stream, in packet form) to guarantee a consistent data rate and a constant delay from one end of the other.

[0146] In order to allow the Transport Stream recombining without requiring additional memory in the receiver, the input Transport Streams are delayed by delay compensators 204-1~n considering interleaving parameters of the data PLPs in the group and the corresponding common PLP. Null packet deleting modules 205-1 ~ n can increase transmission efficiency by removing the inserted null packet for a case of VBR (variable bit rate) service. Cyclical Redundancy Checker (CRC) 206-1 ~ n coding modules can add CRC parity to increase the reliability of BB frame transmissions. BB header insert 207-1 n can add a BB frame header in the start portion of the BB frame. The information that may be included in the BB header is shown in Fig. 3.

[0147] The Merger / slicer module 208 can perform BB frame slicing from each PLP, merging BB frames from multiple PLPs, and scheduling each BB frame within a frame.

Transmission. In this way, the combining / slicing module 208 can output L1 signaling information that relates to the PLP allocation in the frame. Finally, the BB 209 mixing module can randomize the bit input streams to minimize the correlation between the bits within the bit streams. The modules that are shaded in Fig. 2 indicate the modules used when the transmitting system uses a single PLP, while the remaining modules shown in Fig. 2 are modules used when the sending device uses a plurality of PLPs.

[0148] Fig. 4 shows an example of a BICM module. Fig. 4a illustrates the data path and Fig. 4b illustrates the L1 path of the BICM module.

[0149] Referring to Fig. 4a, the outer coder 301 and the inner coder 303 may add redundancy to the input bit streams for error correction. The external interleaver module 302 and the interleaving interleaver 304 can interleave the bits to prevent pulse errors. External interleaver module 302 may be omitted if BICM modulation is intended for DVB-C2. The bit demultiplexer module 305 can control the reliability of the output of each bit from the interleaving module 304. The symbol mapper module 306 can convert the bit input streams into symbol streams. At this time, it is possible to use any of the conventional QAM modulations, MQAM modulation, which uses the above-mentioned BRGC method to improve performance, NU-QAM modulation, which uses uneven modulation, or NU-MQAM modulation, which uses non-uniform modulation using the BRGC method to improve performance. To construct a system that is more resistant to noise, you can consider combinations of modulations using MQAM and / or NUMQAM depending on the code rate of the error correction code and the capacity of the console. At this time, the symbol mapper module 306 may use the corresponding constellation according to the code rate and constellation capacity. Fig. 6 is an example of such combinations. combinations of modulations using MQAM and / or NUMQAM may be considered depending on the code rate of the error correction code and the capacity of the consultation. At this time, the symbol mapper module 306 may use the corresponding constellation according to the code rate and constellation capacity. Fig. 6 is an example of such combinations. combinations of modulations using MQAM and / or NUMQAM may be considered depending on the code rate of the error correction code and the capacity of the consultation. At this time, the symbol mapper module 306 may use the corresponding constellation according to the code rate and constellation capacity. Fig. 6 is an example of such combinations.

[0150] Case 1 illustrates an example of using only NU-MQAM with low code rate to implement a simplified system. Case 2 illustrates an example of using an optimized constellation at each code rate. The transmitter may send to the receiver information about the code rate of the error correction code and the constellation capacity, so that the receiver can use the appropriate constellation. Fig. 7 is another example of cases in which compatibility between conventional systems is considered. In addition to these examples, further combinations are possible to optimize the system.

[0151] The ModCod 30 inserting module depicted in Fig. 4 can receive feedback on adaptive coding and modulation (ACM) / variable encoding and modulation (VCM) and add information about the parameter used in coding and modulation to the FEC block in the form of a header. The header containing the modulation type / coding efficiency (ModCod) may contain the following information:

* FEC type (1 bit) - long or short LDPC * Coding efficiency (3 bits) * Modulation (3 bits) - up to 64K QAM * PLP identifier (8 bits) [0152] The symbol interleaver 308 may perform interleaving in the field of the symbol in to

Obtaining additional interleaving effects. Processes similar to those performed on the data path can be performed on the L1 signal path, but using possibly different parameters (301-1 ~ 308-1). At this point, the shortened / punctured coding module 303-1 can be used for internal coding.

[0153] Fig. 5 shows an example of LDPC encoding using shortening / puncturing. The shortening process can be performed on input blocks that contain fewer bits than the required number of bits for LDPC encoding, because a plurality of zero bits required for LDPC encoding can be entered through the zero padding module 301c. Input streams of bits with zeros entered may contain parity bits throughout the LDPC encoder 302c. At this time, in order to obtain bitstreams that correspond to the original bitstreams, zeros (303c) can be removed and bit pattern puncturing can be performed by puncturing the parity pierce 304c according to coding efficiency.

[0154] Fig. 8 shows a frame structure that comprises preamble for L1 signaling and data symbol for PLP data. It can be seen that preamble and data symbols are generated cyclically, using one frame as a unit. The data symbols include PLP type 0 which is transmitted using fixed modulation / fixed coding, and PLP type 1 which is transmitted using variable modulation / variable coding. In the case of the PLP type 0, information such as modulation, type FEC, and code rate FEC are transmitted in the preamble (see FIG. 9, module inserting the frame header 401). For type 1 PLP, the corresponding information may be transmitted in the header of the FEC data symbol block (see FIG. 3 for ModCod 307 header inserter). By separating the types of PLPs, the ModCod overhead can be reduced by 3 ~ 4% relative to the total transmission rate for a type PLP PLP that is transmitted at a fixed data rate. At the receiver, in the case of a fixed modulation / fixed PLP encoding of the PLP type 0, the frame header erasing element r401 shown in Fig. 30 may extract information regarding the FEC modulation and code rate, and provide the information obtained to the BICM decoding module. In the PLP type 1 modulation / variable PLP coding variable, the ModCod extraction modules, r307 and r307-1 shown in Fig. 31, can extract and provide parameters necessary for BICM decoding. [0155] Fig. 9 shows an example of a frame builder. The frame header inserter 401 can form a frame from the input symbol streams and can add a frame header at the front of each transmitted frame. The frame header can contain the following information:

* Number of connected channels (4 bits) * Protective range (2 bits) * PAPR (2 bits) * Pilot pattern (2 bits) * Digital System identification (16 bits) * Frame identification (16 bits) * Frame length (16 bits) ) - number of multiplexing symbols divided into Orthogonal Frequency Division Multiplexing (OFDM) per frame * Length of super frame (16 bits) - number of frames per super frame

The number of PLP frames (8 bits) for each PLP

PLP identification (8 bits) channel bonding id (4 bits)

Start of PLP (9 bits)

PLP type (2 bits) - common PLP or other type PLP data block (5 bits)

MC type (1 bit) - fixed / variable modulation and coding when type MC == fixed modulation and coding FEC type (1 bit) - long or short LDPC Efficiency of coding (3 bits)

Modulation (3 bits) - up to 64K QAM end of the loop when;

Number of channel notches (2 bits) for each cutout

Beginning of the notch (9 bits) The width of the notch (9 bits)

End of the loop for;

PLP width (9 bits) - maximum number of FEC blocks in the PLP PLP type of time interleaving (2 bits) end of the loop for;

* CRC-32 (32 bits) [0156] Channel bonding environment is assumed for L1 information transmitted in frame header and data that correspond to each data slice is defined as PLP. Therefore, information such as PLP identifier, channel bond identifier, and starting PLP address are required for each channel used in the join. In one embodiment of the present invention, it is suggested to transfer a ModCod data field in the FEC frame header if the PLP type supports variable modulation / variable coding and ModCod data field transfer in the frame header if the PLP type supports fixed modulation / fixed coding to reduce the overhead signal. Additionally, if there is a Notch band for each PLP,

[0157] Fig. 10 is an example of pilot pattern 5 (PP5) used in a channel bonding environment. As shown, in the case where the SP positions are coincidental with the pilot signal preamble positions, an irregular pilot structure may occur.

[0158] Fig. 10a is an example of an insertion module of pilot insert 404 as shown in Fig. 9. As shown in Fig. 10a, when a single frequency band (e.g., 8 MHz) is used, the available bandwidth is 7.61 MHz, but if multiple frequency bands are combined, the protection bands can be removed, which can significantly increase the frequency performance. Fig. 10b is an example of the preamble inserting module 504 as shown in Fig. 18 which is transmitted at the front of the frame and even when connecting

For the channels, the preamble has a repetition rate of 7.61 MHz, which is the bandwidth of the L1 block. It is a construction that takes into account the frequency bandwidth of the tuner, which performs initial channel scanning.

[0159] Pilot Patterns exist for both preamble and data symbols. Data patterns of the distributed pilot signal (SP) may be used for the data symbols. The pilot pattern (PP5) and pilot pattern (PP7) T2 can be good candidates for frequency-only interpolation. The PP5 pattern has x = 12, y = 4, z = 48 for GI = 1/64, and the PP7 pattern has x = 24, y = 4, z = 96 for GI = 1/128. Additional time interpolation is also available for better channel estimation. Pilot patterns for the preamble can cover all possible pilot positions to detect the initial channel. In addition, pilot positions for preamble should be coincidental with SP positions and a single pilot pattern is required for both preamble and SP. Pilot signals for the preamble may also be used for time interpolation and each preamble may have an identical pilot pattern. These requirements are important for C2 detection during the search and necessary to estimate the frequency shift using the mixing sequence correlation. In the channel bonding environment, the coincidence in pilot positions should also be maintained during channel bonding because an irregular pilot structure can reduce interpolation performance.

[0160] In particular, if the distance z between the scattered pilot signals (SPs) in the OFDM symbol is 48 and if the distance y between the scattered pilot signals (SPs) corresponding to the specific SP carrier along the time axis is 4, the usable distance x after time interpolation will be 12. This is the case if the fraction of the guard interval (GI) is 1/64. If the GI fraction is 1/128, then the parameters x = 24, y = 4, and z = 96 may be used. In the case where channel bonding is used, they can be set to coincidence with the pilot positions for the preamble by generating discrete points in the distributed pilot structure.

[0161] At this time, the pilot positions for the preamble may be coincident with all SP data symbol positions. When channel bonding is used , the data segment in which the service is transmitted may be determined regardless of the 8 MHz granularity of the bandwidth. However, in order to reduce the overhead for the address data slice, a transmission starting from the position SP and ending at the position SP can be selected.

[0162] When the receiver receives such scattered pilot signals SP, if necessary, the channel estimator (r501) shown in Fig. 29 may perform time interpolation to obtain pilot signals represented by dashed lines in Fig. 10 and may perform frequency interpolation. At this time, for discontinuous points whose compartments are designated '32' in Fig. 10a, interpolations on the left and right can be performed separately or interpolations can be performed only on one side and interpolation on the other side can be performed by applying already interpolated pilot positions, whose range is 12 as the reference point. At this time, the width of the data segment may vary within the 7.61 MHz range, and thus,

[0163] Fig. 11 is another example of a PP5 standard used in the channel bonding environment

Or the structure SP to maintain a usable distance x at level 12 to avoid the irregular structure SP shown in FIG. 10 when channel bonding is used. As shown, if the SP distance is kept consistent in the case of channel bonding, then there will be no problems during frequency interpolation, but the pilot positions between the data symbol and the preamble may not be coincidental. In other words, this construction does not require additional channel estimation for the irregular SP structure, however, the SP positions used in channel bonding and pilot positions for the preamble become different for each channel.

[0164] Fig. 12 shows a new structure SP or PP5 ', which is intended to provide a solution to the two problems mentioned above in the channel bonding environment. Specifically, the pilot distance of x = 16 can solve these problems. In order to protect the pilot signal density or maintain the same overhead, the PP5 'pattern may have x = 16, y = 3, z = 48 for GI = 1/64 and the PP7' pattern may have x = 16, y = 6, z = 96 for GI = 1/128. The ability to interpolate the same frequency can still be maintained. The pilot positions are shown in Fig. 12 for comparison with the PP5 construction.

[0165] Fig. 13 is an example of a new SP pattern or a PP5 'construct in the channel bonding environment. As shown in Fig. 46, regardless of whether a single channel or channel bonding is used, a useful pilot distance x = 16 can be provided. In addition, since it is possible to make the SPs coincidental with the pilot positions for the preamble, the deterioration of the channel estimation caused by the SP irregularity or the lack of the coincidence of the SP position can be avoided. In other words, there is no irregular SP position for the frequency interpolator and a coincidence between the preamble and the SP positions is provided.

[0166] Consequently, the proposed new SP standards may be advantageous in that a single SP pattern can be used for both a single and a combined channel; it is possible to cause the lack of an irregular pilot structure, thanks to which a good channel estimation is possible; both preamble positions and SP pilot positions may be maintained coincidental; the pilot signal density can be kept the same as for PP5 and PP7 standards, respectively; and the ability to interpolate the same frequency can also be maintained.

[0167] In addition, the preamble structure can meet requirements such as pilot positions for the preamble, which should cover all possible SP positions to detect the original channel; the maximum number of carriers should be 3409 (7.61 MHz) for the initial search; exactly the same pilot pattern and mixing sequence should be used for C2 detection; and a detection-specific preamble such as P1 in T2 is not required.

[0168] In terms of the relationship with the frame structure, the granularity of the data slice position may be modified to 16 carriers rather than 12, so that a smaller overhead associated with address addressing may occur and other missing data slice state problems, zero gap state may be expected, e.t.c.

[0169] Therefore, in the estimator module r501 shown in Fig. 62, pilot signals in each preamble may be used when SP interpolation of data symbols is performed. Thus, channel detection and channel estimation at frame boundaries may be improved. [0170] Now, considering the requirements of the preamble and the pilot structure, there is

Congruence that the positions of preamble pilots and SPs should coincide regardless of channel bonding; the number of all carriers in L1 block should be divided by the distance of the pilot signal in order to avoid an irregular structure at the edge of the band; L1 blocks should be repeated in the frequency domain; and L1 blocks should always be capable of decoding in any position of the tuner window. Additional requirements may be such that pilot positions and standards should be repeated at a period of 8 MHz; the correct carrier frequency shift should be estimated without knowledge about channel bonding; and L1 decoding (re-ordering) is impossible before the frequency offset is equalized.

[0171] Fig. 14 shows a relationship between data symbol and preamble when preamble constructions are used as shown in Fig. 19 and Fig. 20. Block L1 can be repeated with a period of 6 MHz. In order to decode L1, both the frequency shift and the preamble shift pattern should be found. L1 decoding is not possible in any tuner position without channel bonding information and the receiver can not distinguish between the preamble shift value and the frequency offset.

[0172] Thus, the receiver must obtain a channel bonding structure, in particular that the frame header erasing element (r401) shown in Fig. 30 could perform L1 signal decoding. Because the expected preamble offset amount in the two vertically shadowed regions in Fig. 30 is known, the time / freq synchronizing element r505 in Fig. 29 can estimate the carrier frequency offset. Based on this estimation, the L1 signal path r308-1 - r301-1 shown in Fig. 31 can decode the L1 block.

[0173] Fig. 15 shows a relationship between data symbol and preamble when the preamble structure is used, as shown in Fig. 22. Block L1 can be repeated with a period of 8 MHz. In order to decode L1, you only need to find the frequency shift and the knowledge about channel bonding may not be required. The frequency offset can be easily estimated by applying a known binary pseudo-random sequence (Pseudo Random Binary Sequence, PRBS). As illustrated in Fig. 48, the preamble and data symbols are aligned, and therefore, an additional search for synchronization may become unnecessary. Therefore, for the receiver, in particular for the frame header removal element r401 illustrated in Fig. 63, it is sufficient that only the peak correlation value with the pilot mixing sequence is obtained in order to decode the L1 signal. The time / freq synchronizing element r505 shown in Fig. 29 can estimate the carrier frequency offset with respect to a peak position.

[0174] Fig. 16 shows an example of a cable television delay profile.

[0175] From the point of view of the pilot structure, the commonly used GI already with excess secures the spread of the delay of the cable channel. In the worst case scenario, rebuilding the channel model can be an option. In order to repeat the pattern exactly every 8 MHz, the distance of the pilot signal should be a carrier divider of 3584 (z = 32 or 56). A pilot density of z = 32 may increase the pilot overhead, and therefore a density of z = 56 may be selected. A slightly smaller area of ​​delay coverage may not be relevant for a cable channel. For example, it can be 8 μs for PP5 'and 4 μs for PP7', compared to 9.3 μs (PP5) and 4.7 μs (PP7). Significant delays can be covered by both pilot patterns, even in the worst case scenario. For pilot signal preamble items,

[0176] If the delay path -40 dB can be ignored, the actual delay spread may start to be 2.5 μs, 1/64 GI = 7 μs, or 1/128 GI = 3.5 μs. This illustrates that the distance parameter of the pilot signal, z = 56 can have a good enough value. In addition, z = 56 may be a convenient value for constructing a pilot pattern, which allows the preamble structure shown in Fig. 48.

[0177] Fig. 17 shows a distributed pilot structure using z = 56 and z = 112, which is constructed at insertion module of pilot insert 404 in Fig. 42. PP5 'are proposed (x = 14, y = 4, z = 56) and PP7 '(x = 28, y = 4, z = 112). Edge carriers can be inserted for the final edge. [0178] As illustrated in Fig. 50, pilot signals are aligned at 8 MHz from each edge of the band, each pilot position and pilot structure can be repeated every 8 MHz. In this way, this structure can support the preamble structure shown in Fig. 48. In addition, a common pilot structure between preamble and data symbols can be used. Therefore, the channel estimating module r501, shown in Fig. 29, can perform channel estimation using interpolation on preamble and data symbols, because no irregular pilot pattern can appear, regardless of the position of the window determined by the position data segment. At this time, using only frequency interpolation, it is possible to sufficiently compensate the channel deformation resulting from the delay spread. If time interpolation is performed additionally, a more accurate channel estimation can be performed. it is possible to sufficiently compensate the channel deformation resulting from the expansion of the delay. If time interpolation is performed additionally, a more accurate channel estimation can be performed. it is possible to sufficiently compensate the channel deformation resulting from the expansion of the delay. If time interpolation is performed additionally, a more accurate channel estimation can be performed.

[0179] Consequently, in the new proposed pilot pattern, pilot position and pattern can be repeated based on a period of 8 MHz. A single pilot pattern can be used for both preamble and data symbols. L1 decoding can always be possible without knowledge about channel bonding. In addition, the proposed pilot pattern may not affect the commonality with T2, because the same pilot strategy of the pilot scatter pattern may be used; T2 already uses 8 different pilot patterns; and modified pilot patterns can not cause a significant increase in the complexity of the receiver. For a pilot mixing sequence, the PRBS can be 2047 (m-sequence); generating PRBS whose period is 3584 can be reset every 8 MHz; the pilot repeating frequency 56 may also be jointly first with period 2047; and you can expect that there will be no problems with PAPR.

[0180] Fig. 18 shows an example of an OFDM based modulator. The input symbol streams can be converted to the time domain by the IFFT 501 module. If necessary, the Peak-to-Average (PAPR) power ratio can be reduced in the PAPR 502 reduction module. In the PAPR methods, the active constellation extension method can be used. ACE) or the tone reservation method (tone reservation). The inserter module GI 503 may copy the last part of the useful OFDM symbol to fill the guard interval in the form of a cyclic prefix.

[0181] Preamble inserting module 504 can insert preamble at the front of each transmitted frame such that a receiver can detect digital signal, frame and acquire time / freq offset acquisition. At this time, the preamble signal may perform signaling in the physical layer of information such as the FFT (3 bits) dimension and the size of the guard interval (3 bits). The preamble inserting module 504 can be omitted if the modulator is intended for DVB-C2.

[0182] Fig. 19 is an example of a preamble structure for channel bonding generated in preamble inserting module 504 shown in Fig. 51. One complete L1 block should be "always decodable" at any arbitrary position of tuning window 7, 61 MHz and no L1 signal loss should occur regardless of the position of the tuner window. As shown, the L1 blocks can be repeated in the frequency domain with a period of 6 MHz. The data symbol can be a combined channel for every 8 MHz. If, for L1 decoding, the receiver uses a tuner, such as the r603 tuner shown in Fig. 28, which uses a 7.61 MHz bandwidth, then the frame header removal element r401 shown in Fig. 30 needs a rearrangement of the received cyclic shifted block. L1 (FIG. 20) to its original form. Such rearrangement is possible because the L1 block is repeated for each 6 MHz block.

[0183] Fig. 21 is a process for designing a more optimized preamble. The preamble structure shown in Fig. 19 uses only 6 MHz of the total bandwidth of the 7.61 MHz tuner to decode L1. In terms of spectral efficiency, the tuner frequency bandwidth of 7.61 MHz is not fully utilized. Therefore, further optimization regarding spectral efficiency can be performed.

[0184] Fig. 22 is another example of a preamble structure or preamble symbol structure for achieving full spectral efficiency generated in the frame header inserter 401 shown in Fig. 42. Like the data symbol, L1 blocks can be repeated in the frequency domain. with a period of 8 MHz. One complete L1 block is still "always decodable" in any arbitrary position of the 7.61 MHz tuning window. After performing the tuning, the given 7.61 MHz frequencies can be considered as virtually punctured code. With exactly the same frequency bandwidth for both preamble and data symbols and exactly the same pilot structure for both preamble and data symbols, spectral efficiency can be maximized. Other characteristics such as the cyclic shift property and the lack of sending L1 block in the absence of a data slice, can be maintained unchanged. In other words, the frequency bandwidth of the preamble symbols may be identical to the data bandwidth of the data symbols or, as illustrated in Fig. 57, the bandwidth of the preamble symbols may be the bandwidth of the tuner (in this case 7.61 MHz). The frequency bandwidth of the tuner can be defined as the frequency bandwidth that corresponds to the number of all active carriers when a single channel is used. That is, the frequency bandwidth of the preamble symbol may correspond to the number of all active carriers (in this case 7.61 MHz).

[0185] Fig. 23 shows a virtually punctured code. Data 7.61 MHz between 8 MHz L1 block can be considered to be coded as a punctured code. When the r603 tuner shown in Fig. 28 uses a bandwidth of 7.61 MHz for L1 decoding, the frame header removal element r401 shown in Fig. 30 needs to rearrange the received cyclic shifted L1 block to its original form, like illustrated in Fig. 56. At this time, L1 decoding is performed using the entire tuner bandwidth. After the L1 block is rearranged, the spectrum of the rearranged L1 block may include a hollow region within the spectrum, as shown in Fig. 23 in the upper right side, since the L1 block primary size has 8 MHz bandwidth.

[0186] After zero-filled null space, or after performing de-interleaving

Deinterleaving) in the symbol domain by the frequency domain deinterleaver r403 shown in Fig. 30 or by the de-interleaver in the symbol art r308-1 shown in Fig. 31 or after bit deinterleaving in the r306 field by the symbol demapper r306 -1, a bit multiplexer r305-1, and an internal de-interleaver r304-1 shown in Fig. 31, the block may be in a form that appears to be pierced, as shown in the bottom right hand of Fig. 23.

[0187] This L1 block can be decoded in the punctured / shortened decode module r303-1 shown in Fig. 31. By using these preamble structure, the total tuner bandwidth can be used, and thus an increase in spectral efficiency and coding efficiency can be obtained. . In addition, identical frequency bandwidth and pilot structure can be used for preamble and data symbols.

[0188] In addition, if the preamble bandwidth or the frequency band of the preamble symbols is set like the tuner bandwidth as illustrated in Fig. 25, (in this example it is 7.61 MHz), after regrouping, complete block L1, not even using piercing. In other words, for a frame containing preamble symbols, in which the preamble symbols comprise at least one block layer 1 (L1), it can be said that the L1 block comprises 3408 active subcarriers and that 3408 active subcarriers correspond to 7.61 MHz from the radio frequency band ( RF) of 8 MHz.

[0189] Thus, the spectral efficiency and L1 performance decoding can be maximized. In this way, the spectral efficiency and L1 decoding performance can be maximized. In other words, at the receiver, decoding can be performed in the punctured / shortened decode module module r303-1, shown in Fig. 31, after only de-interleaving in the symbol domain.

[0190] Consequently, the proposed new preamble structure can be advantageous in that it is fully compatible with previously used preamble except that the bandwidth is different; L1 blocks are repeated with a period of 8 MHz; the L1 block can always be suitable for decoding, regardless of the position of the tuner window; the full tuner frequency bandwidth can be used for L1 decoding; maximum spectral efficiency can guarantee higher coding efficiency; an incomplete L1 block can be considered to be coded in a punctured manner; a simple and the same pilot structure can be used for both preamble and data; and identical bandwidth can be used for both preamble and data.

[0191] Fig. 26 shows an example of an analog processor. The DAC (601) module can convert an input digital signal into an analog signal. After up conversion of the transmission frequency bandwidth up converter 602 and analog filtering through the analog filter 603, the signal may be transmitted.

[0192] Fig. 27 is an example of a digital reception system according to an embodiment of the present invention. The received signal is converted to a digital signal in the analogue processor r105. The demodulator r104 can convert the signal into frequency domain data. The r103 frame parser can remove pilot signals and headers and allow selection of information about services that need to be decoded. The BICM demodulator r102 can correct errors in the transmission channel. The r101 output processor can restore the originally transmitted service stream i

Timing information.

[0193] Fig. 28 shows an example of an analog processor used at a receiver. The tuner / AGC (auto gain controller) module r603 can select the desired bandwidth from the received signal. The down converter r602 can restore the basic band. The r601 ADC module can convert an analog signal into a digital signal.

[0194] Fig. 29 is an example of demodulator. The frame detector r506 can detect the preamble, check for a corresponding digital signal, and detect the beginning of the frame. The time / frequency synchronizing element r505 can perform synchronization in time and frequency domains. At this time, the correlation of the guard interval may be used to synchronize in the time domain. For synchronization in the frequency domain, a correlation may be used, or the offset may be estimated based on the subcarrier information that is transmitted in the frequency domain. The preamble remover r504 can remove the preamble from the front portion of the detected frame. The GI r503 removal element can remove the protection interval. The FFT module r501 can convert the time domain signal into a frequency domain signal. The channel estimation / equalization module r501 can compensate for errors in the lightweight estimation of strain on the transmission channel using the pilot signal symbol. The preamble remover r504 may be omitted if the demodulator is adapted for DVB-C2.

[0195] Fig. 30 shows an example of frame parser. The pilot removal element (r404) can delete the pilot symbol. The de-interleaving element in the frequency domain r403 can perform frequency deinterleaving in the frequency domain. The element combining the OFDM symbol r402 can restore the data frame from symbol streams transferred in the form of OFDM symbols. The frame header removal element r401 can extract the physical signal layer from the header of each transmitted frame and delete the header. The information extracted can be used as parameters for subsequent processes carried out in the receiver.

[0196] Fig. 31 is an example of BICM demodulator. Fig. 31a illustrates the data path, and Fig. 31b illustrates the L1 signaling path. The de-interleaver in the symbol domain r308 may perform deinterleaving in the symbol domain. The ModCod extractor r307 can extract ModCod parameters from the front of each BB frame and cause that these parameters become available for subsequent adaptive / variable demodulation processes and decoding processes. The r306 symbol demapper can reverse the input symbol streams into logarithmic bit streams the ratio of probabilities (Log-Likelyhood Ratio, LLR). The output streams of LLRs can be calculated using the constellation used in the transmitter mapper 306 as a reference. In this point, when the above-mentioned MQAM or NU-MQAM modulation is applied, by computing both the I axis and the Q axis when calculating the bit closest to the MSB and by calculating the axis I or the Q axis, the effective symbol demapper can be obtained when calculating the remaining bits. This method can be used, for example, in the approximate logarithmic ratio of probabilities (Approximate LLR), in the exact logarithmic ratio of probabilities (Exact LLR), or in the hard decision (hard decision).

[0197] In the case where an optimized constellation is used according to the constellation capacity and code rate of the error correction code in the mapper

The transmitter symbol 306, the symbol demapper r306 of the receiver can receive a constellation using information about the code rate and constellation capacities transmitted from the transmitter. The receiver multiplexer r305 may perform a reverse function than the transmitter bit demoder 305. The internal de-interleaver r304 and the external de-interleaver r302 of the receiver can perform inverse functions than the inner interleaver (304) and the external interleaver 302, respectively, to obtain a bit stream in its original sequence. The external de-interleaver r302 may be omitted if the BICM demodulator is intended for DVB-C2.

[0198] The inner decoder r303 and the outer decoder r301 of the receiver can perform corresponding decoding processes to the inner coder module 303 and outer transmitter encoder 301, respectively, to correct errors in the transmission channel. Similar processes to be performed on the data path can be performed on the L1 signal path, but using different parameters r308-1 - r301-1. At this point, as explained in the introductory part, the shortened / punctured coding module r303-1 can be used to decode the L1 signal.

[0199] Fig. 32 shows an example of LDPC decoding using a shortened / punctured module r303-1. The r301a demultiplexer can separately output the information part and the parity portion of the systematic code from the input bitstreams. For the information part, the padding block for data block r302a can perform padding zeros according to the number of input streams of the LDPC decoder bit, and for the parity portion, the input bit streams for the LDPC can be generated by piercing the inverse pierced part in the puncturing module inverse parity r303a. LDPC decoding by module r304a can be performed on generated bitstreams,

[0200] Fig. 33 shows an example of an output processor. The BB r209 decrypter can restore encrypted bit streams in the transmitter. The r208 splitter can restore the BB frames corresponding to the plurality of PLPs that are multiplexed and transmitted from the transmitter according to the PLP path. For each PLP path, the BB header removing elements r207-1 ~ n can delete the header that is transmitted at the front of the BB frame. The CRC decoder r206-1? N can perform CRC decoding and cause the reliable BB frames to become available for selection. The null packet inserting module r205-1 ~ n can restore null packets that have been deleted in order to achieve higher transmission efficiency in their original location. The delay recovery module r204-1~n can restore the delay that exists between each PLP path.

[0201] The resettlement clock module r203-1~n can restore the original timing of the service stream from timing information transmitted from the gate stream synchronizer 203-1 ~ n. The r202-1 ~ n output interface module can restore data in the TS / GS packet from the input bit streams that are segmented in the BB frame. The output post-processing element r201-1? N can restore multiple TS / GS streams to a complete TS / GS stream, if necessary. The shaded blocks shown in Fig. 33 represent modules that can be used when a single PLP is processed at one time, while the remaining blocks represent modules that can be used when multiple PLPs are processed at the same time.

[0202] Pilot patterns for the preamble have been carefully designed to avoid increasing PAPR, and thus, it is necessary to consider whether the L1 block repetition rate can increase PAPR. The number of information bits of the L1 block varies dynamically according to channel joining, number of PLPs, etc. In particular, it is necessary to take into account the following issues: a fixed block size L1 may introduce unnecessary overhead; the L1 signal block should be more protected than the data symbols; and time interleaving of the L1 block may improve the channel weakness resistance such as the shortage of impulsive interference.

[0203] For an L1 block repetition rate of 8 MHz, as shown in Fig. 34, the total spectral efficiency (26.8% increase in BW) is exhibited using virtual piercing, but the PAPR ratio can be increased because the L1 block bandwidth is is the same as the frequency band of the data symbols. For a repetition rate of 8 MHz, 4K-FFT DVB-T2 frequency interleaving may be used for commonality and the same pattern may be repeated in the 8 MHz period after interleaving.

[0204] For a L1 block repetition rate of 6 MHz, as illustrated in Fig. 35, reduced spectral efficiency may be exhibited without virtual puncturing. A similar problem regarding the PAPR ratio as in the case of 8 MHz can occur because the bandwidth of the L1 block and the data symbol are shared by LCM = 24 MHz. For a repetition rate of 6 MHz, 4K-FFT DVB-T2 frequency interleaving may be used for commonality and the same pattern may be repeated with a period of 24 MHz after interleaving.

[0205] Fig. 36 shows a new L1 block repetition rate of 7.61 MHz or total tuner bandwidth. Total spectral efficiency (26.8% increase in BW) can be obtained without using virtual piercing. In this case, there may be no problem with the PAPR ratio, because the bandwidth of L1 block and data symbol are shared by LCM = 1704 MHz. For a repetition rate of 7.61 MHz, 4K-FFT DVB-T2 frequency interleaving can be used for commonality and the same pattern can be repeated with a period of about 1704 MHz after interleaving.

[0206] Fig. 37 is an example of L1 signaling block that is transmitted in the frame header. Any information in the L1 signal block can be sent to the receiver and can be used as a decoding parameter. Specifically, the information may be used in the L1 signaling path shown in Fig. 31, and the PLPs may be transmitted in each data slice. In this way, an increased resistance for each PLP can be obtained.

[0207] Fig. 39 is an example of symbol interleaver 308-1 as shown in L1 signal path in Fig. 4, which may also be an example of a corresponding symbol deinterleaver r308-1, as shown in the L1 signaling path in FIG. 31. Blocks with oblique lines represent L1 blocks, and solid blocks represent data carriers. L1 blocks may be transmitted not only within a single preamble, but may also be transmitted within multiple OFDM blocks. Depending on the size of the L1 block, the size of the interleaving block may vary. In other words, the num_L1_sym and L1_span parameters may differ from each other. In order to minimize unnecessary overhead, data may be transmitted within the rest of the OFDM symbol carriers in which the L1 block is transmitted. In this point, total spectral efficiency can be guaranteed because the repeating L1 block cycle is still the total tuner bandwidth. In Fig. 39, numbers in blocks with oblique lines represent the order of bits within a single

The LDPC block.

[0208] Consequently, when the bits are written in the interleaved memory in accordance with the symbol index as illustrated in Fig. 72 and are read in the column direction according to the carrier index, a block interleaving effect can be obtained. In other words, one LDPC block may be interleaved in the time domain and in the frequency domain, and may then be transmitted. The num_L1_sym parameter can have a predetermined value, e.g., a number between 2-4 can be set as the number of OFDM symbols. At this point, to increase the granularity of the L1 block size, a punctured / shortened LDPC code having a minimum length of the codeword can be used to secure the L1 block.

[0209] Fig. 40 is an example of transmitting L1 blocks. Fig. 40 shows Fig. 39 in the field of the frame. As shown on the left of Figure 40, the L1 blocks may occupy the entire tuner bandwidth or as shown on the right of Fig. 40, the L1 blocks may occupy a part, and the rest of the carriers may be used as a data carrier. In any case, it can be seen that the repetition rate of the L1 block can be identical to the total tuner bandwidth. In addition, for OFDM symbols that use the L1 signal block including the preamble, only symbol interleaving can be performed that does not allow data to be transmitted in these OFDM symbols. Consequently, for the OFDM symbol used for the L1 signal block, the receiver can decode L1 by performing de-interleaving without decoding the data. At this point, the L1 block may transmit the L1 signaling block of the current frame or the L1 signal block of the next frame. On the receiver side, the decoded L1 parameters from the L1 signaling decoding path shown in Fig. 31 may be applied to the decoding process for the data path zp of the frame arsermost of the next frame.

[0210] Briefly, at a transmitter, interleaving blocks of L1 can be performed by storing blocks in a memory in the row direction and reading the stored blocks from the memory in the direction determined by the columns. In the receiver, deinterleaving L1 blocks can be performed by writing blocks in the memory in the direction determined by the columns and reading the stored blocks from the memory in the direction determined by the rows. The directions of reading and writing in the transmitter and receiver can be swapped.

[0211] After performing the simulation, using assumptions such as CR = 1/2 to protect the L1 block and to enable the T2 mutualization; symbol mapping using 16-QAM modulation; pilot density of 6 in the preamble; the short LDPC number, which implies the required number of piercing / shortening, results or conclusions can be obtained, such as: for transmitting the L1 block the preamble itself may not be sufficient; the number of OFDM symbols depends on the L1 block size; the shortest LDPC codeword (e.g., 192 bit information) from shortened / punctured codes can be used to obtain flexibility and fine granularity; and filling may be added, if required, with a slight overhead. This result is summarized in Fig. 38.

[0212] Consequently, for the L1 block repetition rate, the total tuner bandwidth with no virtual puncturing can be a good solution and still no PAPR problem can arise with full spectral efficiency. For the L1 signal block, the effective signal structure can allow the maximum configuration in the 8-channel connection environment, 32 notches, 256 data segments, and 256 PLPs. For the structure of the L1 block, the L1 signal flexible block can be implemented according to the size of the L1 block. Time interleaving can

They may be carried out in order to obtain a better resistance to T2 commonality. A lower overhead can allow data to be transmitted in the preamble.

[0213] Block interleaving of L1 block can be performed for better robustness. The interleaving can be performed using a pre-defined number of L1 symbols (num_L1_sym) and the number of carriers connected by L1 as parameter (L1_span). The same technique is used for interleaving the preamble P2 in DVB-T2.

[0214] A L1 block of variable size may also be used. The size may be adapted to the number of bits of the L1 signaling block, resulting in a reduction of the overhead. The total spectral efficiency can be obtained without a problem with the PAPR ratio. Repetition lower than 7.61 MHz may mean that more redundancy can be transmitted, but this is unused. In this case, there may be no problem with the PAPR ratio due to the 7.61 MHz repetition rate for the L1 block.

[0215] Fig. 41 shows another example of L1 signaling block that is transmitted within a frame header. Fig. 41 differs from Fig. 37 in that the L1_span field having 12 bits has been divided into two fields. In other words, the L1_span field is divided into an L1_column field having 9 bits and an L1_row field having 3 bits. The L1_column field represents the subscript of the carrier that includes block L1. Because the data segment starts and ends every 12 media, which is the pilot density, 12 bits of overhead can be reduced by 3 bits to obtain 9 bits.

[0216] The L1_row field represents the number of OFDM symbols that comprise the L1 block when using time interleaving. Consequently, time interleaving can be performed inside the L1_column fields multiplied by the L1_row fields. Alternatively, L1 blocks with a total size may be transmitted, so that the L1_span field shown in Fig. 37 can be used can be used when time interleaving is not performed. In this case, the L1 block size is 11.776 x 2 bits in this example, and therefore 15 bits is sufficient. Consequently, the L1_span field can be created by 15 bits.

[0217] Fig. 42 is an example of frequency or time interleaving / deinterleaving. Fig. 42 shows a part of the entire transmitted frame. Fig. 42 also illustrates combining a plurality of 8 MHz bandwidth. The frame may consist of a preamble that transmits L1 blocks and a data symbol that transmits data. Different types of data symbols represent data segments for different services. As illustrated in Fig. 42, the preamble transmits L1 blocks for every 7.61 MHz.

[0218] In the case of a preamble, interleaving in the frequency or time domain is performed within L1 blocks and is not performed between the L1 blocks. That is, for the preamble, it can be said that interleaving is carried out at L1 block level. This allows L1 blocks to be decoded by transmitting L1 blocks within the tuner window bandwidth, even when the tuner window has been moved to a random location within the channel bonding system.

[0219] For decoding a data symbol at a random tuner window bandwidth, interleaving between data slices should not occur. This means that for data segments, it can be said that interleaving is performed at the level of the data slice. Consequently, frequency interleaving and time interleaving should be performed within the data slice. Therefore, the symbol interleaver 308 in the data path of the transmitter's BICM module, as illustrated in FIG. 4, can perform symbol interleaving for

Each data segment. The symbol interleaver 308-1 in the L1 signaling path can perform symbol interleaving for each L1 block.

[0220] The frequency interleaver 403, illustrated in Fig. 9, must perform interleaving on the preamble and data symbols separately. In particular, for preamble, frequency interleaving can be performed for each L1 block, and for data symbols, frequency interleaving can be performed for each data slice. At this point, time interleaving in the data path or L1 signaling path may not be performed considering the low latency mode.

[0221] Fig. 43 is an array of L1 signaling signal overhead analysis which is transmitted in a FECFRAME header in a ModCod header inserter (307) on a BICM module data path, as illustrated in Fig. 37. As seen in Fig. 76. , for a short LDPC block (size = 16200), a maximum mark of 3.3% may occur, which may not be negligible. In the analysis, 45 symbols are assumed to protect FECFRAME, the preamble is the frame-specific C2 signal block L1 and the FECFRAME header is the FECFRAME-specific L1 signal block, i.e. the Mod, Cod, and PLP identifier.

[0222] To reduce the L1 signaling overhead, you can consider approaches to the two types of data segments. In cases related to the type ACMNCM and many PLPs, the same frame as for the FECFRAME header can be kept. In ACMNCM type and single PLP cases, the PLP identifier can be removed from the FECFRAME header, resulting in a reduction of the overhead of 1.8%. In cases related to the type CCM and many PLPs, the Mod / Cod field can be removed from the FECFRAME header, resulting in a reduction of the overhead of up to 1.5%. In contrast, in the CCM type and single PLP cases, the FECFRAME header is not required, and thus, a reduction of the overhead up to 3.3% can be obtained.

[0223] In a shortened L1 signaling, either Mod / Cod (7 bits) or PLP identifier (8 bits) may be transmitted, but may be too short to get any coding gain. However, no synchronization requirement is possible, because the PLPs can be adapted to the C2 transmission frame; each ModCod of each PLP may be known from the preamble; and simple calculation can enable synchronization with the specific FECFRAME header.

[0224] Fig. 44 is a structure for a FECFRAME header for minimizing the overhead. In Fig. 44, skewed line blocks and the FECFRAME constructor represent a block diagram of a ModCod 307 inserter module in the BICM module data path, as illustrated in Fig. 4. The solid blocks represent an example of an inner coding module 303, an inner interleaver 304, a bit demultiplexer. 305, and symbol mapper 306 in the BICM module data path, as illustrated in Fig. 4. At this point, short L1 signaling may be performed, because the CCM does not require a Mod / Cod field, the single PLP does not require a PLP. At this L1 signal with a reduced number of bits, the L1 signal can be repeated three times in the preamble and BPSK modulation can be performed, therefore, very strong signaling is possible. Finally, the modifier inserting module ModCod 307 can insert the generated header into each FEC frame. Fig. 51 is an example of ModCod extractor r307 in data path of BICM demodulator module shown in Fig. 31.

[0225] As illustrated in Fig. 51, the FECFRAME header can be parsed in the r301b parser, and then symbols that transmit identical information in repeated symbols can be

These are delayed, aligned, and then combined in the deviation link module r302b. Finally, when the BPSK demodulation is performed in the module r303b, the received L1 signal field can be restored and this reconstructed L1 signal field can be sent to the system controller for its use as a parameter for decoding. The parsed FECFRAME header can be sent to the symbol mapper.

[0226] Fig. 45 shows the bit error rate performance (BER) of the aforementioned L1 block protection. It can be seen that about 4.8 dB of SNR gain is obtained by repeating three times. The required SNR is 8.7 dB at BER = 1E-11.

[0227] Fig. 46 shows examples of transmission frame and FEC frame structure. The FEC frame structures shown at the top right of FIG. 46 represent the FECFRAME header inserted by the ModCod 30 inserting header shown in FIG. 4. It can be seen that depending on various combinations of conditions, i.e., type CCM or ACMNCM and single or multiple PLPs, headers of different sizes can be inserted. Or, headers may not be inserted. The transmission frames created according to the data slice types and shown at the bottom left of FIG. 46 can be created by the header inserter 401 of the frame builder, as illustrated in FIG. 9, and the input processor / segmenter 208 of the input processor shown in FIG. 2. In this point, the FECFRAME header can be transmitted according to different types of data segment. Using this method, a maximum of 3.3% of the overhead can be reduced. In the upper right corner of Fig. 79, four different types of structures are illustrated, but one skilled in the art will understand that these are only examples, and any of these types or combinations thereof can be used for a data slice.

[0228] On the receiver side, the frame header deletion frame r401 header element as illustrated in Fig. 30, and the BICM demodulator ModCod module r307, as shown in Fig. 31, can extract the ModCod field parameter that is required for decoding. At this point, the parameters of the transmission frame can be extracted according to the types of data segments. For example, for the CCM type, parameters can be extracted from the L1 signaling block that is transmitted in the preamble, and for the ACM / VCM type, the parameters can be extracted from the FECFRAME header.

[0229] As shown in the upper right side of Fig. 79, the fecframe structure can be divided into two groups in which the first group is the upper three frame structures with a header and the second group is the last frame structure without a header.

[0230] Fig. 47 is an example of L1 signaling that can be transmitted in a preamble by the framesetter inserter 401 of the frame builder module shown in Fig. 42. This L1 signaling differs from previous L1 signaling in that the L1 block size can be transmitted in bits (L1_size, 14 bits); it is possible to enable / disable time interleaving on the data slice (dslice_time_intrlv, 1 bit); and by defining the data slice type (dslice_type, 1 bit), signaling overhead L1 is reduced. At this point, when the data slice type is CCM, the Mod / Cod field may be transmitted in a preamble rather than the FECFRAME header (plp_mod (3 bits), plp_fec_type (1 bit), plp_cod (3 bits)).

[0231] On the receiver side, the shortened / punctured internal decoding module r303-1 of the BICM demodulator, as illustrated in Fig. 31, can receive the first LDPC block that has a fixed L1 block size, and is transmitted in the preamble by decoding. The numbers and sizes of other LDPC blocks can also be obtained.

[0232] Time interleaving can be used when a plurality of OFDM symbols are needed to transmit L1 or when there is a time interleaved data slice. Flexible switching on / off of time interleaving is possible using the interleaving symbol flag. For interleaving the preamble over time, a time interleaver (1 bit) and number of OFDM symbols (3 bits) flashed may be required, thus, a total of 4 bits may be protected in a manner similar to the abbreviated FECFRAME header.

[0233] Fig. 48 shows an example of L1-pre signaling that can be performed in a ModCod 307-1 header inserter on the BICM data path shown in Fig. 4. Blocks with oblique lines and Preamble constructor are examples of ModCod 307 header inserting module. -1 on the L1 signal path L1 of the BICM module shown in Fig. 4. The lite blocks are examples of the frame inserter header 401 of the frame builder, as shown in Fig. 42. [0234] Also, the solid blocks may be examples of the shortened / punctured internal coding module 303 -1, the internal interleaver 304-1, the bit demultiplexer 305-1, and the symbol mapper 306-1 on the L1 signaling path of the BICM module shown in Figure 4.

[0235] As can be seen in Fig. 48, the L1 signal that is transmitted in the preamble can be protected using a shortened / punctured LDPC encoding. The associated parameters can be inserted into the header in the form of L1 pre-signaling. At this point, only time interleaving parameters can be transmitted in the preamble header. For greater immunity, it can be repeated four times. On the receiver side, to enable L1 signaling, which is transmitted in the preamble, the ModCod extractor r307-1 on the BICM demodulator L1 signal path, as illustrated in Fig. 31, must use the decoding module shown in Fig. 18. At this point, because quadruple repetition is performed here, unlike the previous decoding FECFRAME header, the process of receiving the deviation is required,

[0236] Fig. 49 shows the construction of L1 signaling block that is transmitted from frame header inserter 401 of frame builder module as shown in Fig. 42. This shows the case in which time interleaving is not used in the preamble. As illustrated in Fig. 49, different types of LDPC blocks may be transmitted in the order of carriers. After creating and transmitting the OFDM symbol, the next OFDM symbol is created and transmitted. In the case of the last OFDM symbol to be transmitted, if there is any other carrier, then these carriers may be used to transmit data or may be artificially filled. The example shown in Fig. 49 illustrates a preamble that contains three OFDM symbols. On the receiver side, in the case of this lack of interleaving,

[0237] Fig. 50 shows a case where interleaving over time L1 is performed. As illustrated in Fig. 50, block interleaving can be performed in a method comprising forming an OFDM symbol for identical carrier indices, and then creating OFDM symbols for subsequent carrier indices. As in the case where no interlacing is carried out, if there is any other carrier, then these carriers may be used to transmit data or may be artificially filled. On the receiver side, in the case of this lack of interleaving, the de-interleaver in the symbol domain r308-1 on the L1 signal path

The BICM demodulator, as shown in Fig. 31, can perform deinterleaving of blocks by reading LDPC blocks in ascending order of LDPC blocks.

[0238] Additionally, there may be at least two types of data slices. The data type segment 1 has dslice_type = 0 in the L1 signal block fields. This type of data segment does not have the XFECFRAME header and has its mod / cod values ​​in the L1 signal block fields. The type 2 data segment has dslice_type = 1 in the L1 signal block fields. This type of data segment has the XFECFRAME header and has its mod / cod values ​​in the XFECFRAME header.

[0239] XFECFRAME means XFEC (compleX Forward Error Correction) Frame, and mod / cod represents the type of modulation / code rate.

[0240] At the receiver, the frame parser can create a frame of demodulated signals. The frame has data symbols and the data symbols may have a first data slice type that includes XFECFRAME and an XFECFRAME header and a second data segment type that includes XFECFRAME without the XFECFRAME header. Also, the receiver can extract from the L1 preamble symbols a field indicating whether to perform time de-interleaving on the preamble symbols or whether or not to perform time deinterleaving on the preamble symbols.

[0241] At a transmitter, a frame builder can build a frame. The frame data symbols include the first data segment type that has XFECFRAME and the XFECFRAME header and the second data segment type that has XFECFRAME without the XFECFRAME header. In addition, a field may be inserted in L1 of the preamble symbols indicating whether to perform time interleaving on the preamble symbols or not to perform time interleaving on the preamble symbols.

[0242] Finally, for the shortened / punctured code for the frame inserter 401 of the frame builder shown in Fig. 9, the minimum size of the codeword that a coding gain can receive and can be transmitted in the first LDPC block can be determined. In this way, for the rest of the LDPC block sizes, they can be obtained from the size of the transmitted L1 block.

[0243] Fig. 52 is another example of L1-pre signaling that may be transmitted from the ModCod inserting module 307-1 to the LIC signaling path L1 of the BICM module shown in Fig. 4. Fig. 52 differs from Fig. 48 in that in the header part the security mechanism has been modified. As can be seen in Fig. 52, L1 L1_size block size information (14 bits) is not transmitted in L1 block, but is transmitted in the header. In the header, 4-bit time interleaving information may also be transmitted. For a total of 18 bits of the input signal, the BCH codes (45, 18) are used, which output 45 bits and are copied to two paths and are finally mapped to QPSK. For the Q path, a 1-bit cyclic shift can be performed to differentiate the gain and PRBS modulation can be performed according to the sync word. A total of 45 QPSK symbols can be derived from these I / Q path inputs. At this point, if the time interleaving depth is set like the number of preambles that is required to transmit the L1 block, then the L1_span (3 bits) parameter which indicates the time interleaving depth may not necessarily be transmitted. In other words, only the on / off flag of time interleaving (1 bit) can be transmitted. On the receiver side, by checking only the number of transmitted preambles, without using the parameter L1_span, the de-interleaving depth over time can be obtained. A total of 45 QPSK symbols can be derived from these I / Q path inputs. At this point, if the time interleaving depth is set like the number of preambles that is required to transmit the L1 block, then the L1_span (3 bits) parameter which indicates the time interleaving depth may not necessarily be transmitted. In other words, only the on / off flag of time interleaving (1 bit) can be transmitted. On the receiver side, by checking only the number of transmitted preambles, without using the parameter L1_span, the de-interleaving depth over time can be obtained. A total of 45 QPSK symbols can be derived from these I / Q path inputs. At this point, if the time interleaving depth is set like the number of preambles that is required to transmit the L1 block, then the L1_span (3 bits) parameter which indicates the time interleaving depth may not necessarily be transmitted. In other words, only the on / off flag of time interleaving (1 bit) can be transmitted. On the receiver side, by checking only the number of transmitted preambles, without using the parameter L1_span, the de-interleaving depth over time can be obtained. In other words, only the on / off flag of time interleaving (1 bit) can be transmitted. On the receiver side, by checking only the number of transmitted preambles, without using the parameter L1_span, the de-interleaving depth over time can be obtained. In other words, only the on / off flag of time interleaving (1 bit) can be transmitted. On the receiver side, by checking only the number of transmitted preambles, without using the parameter L1_span, the de-interleaving depth over time can be obtained.

[0244] Fig. 53 is showing an example of scheduling of L1 signaling block that is transmitted in preamble. If the amount of L1 information that can be transmitted in the preamble is Nmax, then

If the magnitude L1 is less than Nmax, one preamble can transmit information. However, when the magnitude L1 is greater than Nmax, the information L1 can be equally divided so that the divided subblock L1 is smaller than Nmax, and then the divided subblock L1 can be transmitted in the preamble. At this point, for a carrier that is not used, because L1 information is less than Nmax, no data is transmitted.

[0245] Instead, as illustrated in Fig. 55, the power of carriers in which L1 blocks are transmitted can be increased so as to maintain the total preamble signal power equal to the power of the data symbol. The power increase factor may vary depending on the size of transmitted L1, and the transmitter and receiver may have a fixed value of this power increase factor. For example, if only half of all carriers are used, the power increase factor may be two.

[0246] Fig. 54 shows an example of L1 pre signaling wherein power boosting is considered. Comparing with Fig. 52, it can be seen that the power of the QPSK symbol can be increased and sent to the Preamble Designer.

[0247] Fig. 56 is showing another example of ModCod extractor r307-1 on L1 signaling path of BICM demodulator module shown in Fig. 31. From input preamble symbol, FECFRAME signal block L1 may be output to the symbol demapper and the decode may only be heading part.

[0248] For the input header symbol, QPSK inverse mapping can be performed and the log-likelihood ratio (LLR) can be obtained. For the path Q, the PRBS demodulation can be performed according to the synchronizing word and the reverse process can be performed to the 1-bit cyclic shift to be restored.

[0249] These aligned two I / Q path values ​​can be combined and SNR gain can be obtained. The hard decision output can be the entrance to the BCH decoder. The BCH decoder can restore 18 L1-pre bits from the input 45 bits.

[0250] Fig. 57 is showing a counterpart, ModCod extractor of a receiver. Comparing with Fig. 56, a power control can be performed on the QPSK demapper input symbols to restore the transmitter to its original value from an increased power level. At this point, the power control may be performed by taking into account the number of carriers used for the L1 signaling block in the preamble and taking the inverse of the acquired power increase ratio of the transmitter. The power increase factor sets the preamble power and the power of the data symbol to have identical values.

[0251] Fig. 58 is showing an example of L1 pre-synchronization that can be performed in the ModCod extractor r307-1 on the L1 signaling path of the BICM demodulation module shown in Fig. 31. This is a synchronizing process to obtain the initial heading position in the preamble. The input symbols may be QPSK inversely demapped, and then for the output Q-path, the inverse of the 1-bit cyclic shift may be performed and the alignment may be performed. Two I / Q path values ​​can be multiplied and modulated values ​​by L1-pre signaling can be demodulated. Thus, the output from the multiplier can only express PRBS, which is a synchronizing word. In the case where the output signal is correlated with a known PRBS sequence, a correlation peak in the header can be obtained. AND

Thus, an initial head position in the preamble can be obtained. If necessary, the power control which is carried out to restore the original power level as in Fig. 57 can be performed at the input of the QPSK demapper.

[0252] Fig. 59 is another example of L1 header field that is transmitted to the header inserter 307-1 on L1 signaling path of the BICM module as shown in Fig. 4. Fig. 59 is different from Fig. 52, that the L1_span parameter, which represents the depth of time interleaving, is reduced to 2 bits and the reserved bits are increased by 1 bit. The receiver may receive the time interleaving parameter of L1 block from the transmitted L1_span parameter.

[0253] Fig. 60 shows processes of evenly dividing L1 into as many parts as the number of preambles, and then inserting a header into each of the divided L1 blocks, and associating L1 blocks with inserted preamble headers. This can be done when time interleaving is performed using a number of preambles, this number of preambles being greater than the minimum number of preambles that is required to transmit the L1 block. This can be performed in L1 block on L1 signal path L1 of the BICM module, as illustrated in Fig. 37. The rest of the carriers, after transmitting L1 blocks, can have cyclic repeat patterns instead of zero padding.

[0254] Fig. 61 is an example of the reversemeter mapping element r306-1 of the BICM demodulation module as shown in Fig. 31. For the case where the FEC L1 blocks are repeated, as shown in Fig. 60, each starting point of the L1 blocks. The FEC may be aligned, combined in the r301f module, and then mapped inversely using QAM in the QAM r302f inverse mapping element to obtain a SNR diversity gain and gain. At this point, the combiner may include the processes of aligning and adding each L1 FEC block and dividing the added L1 FEC block. For the case in which only part of the last FEC block is repeated, as illustrated in Fig. 60, only the repeating portion can be divided into as many as the number of FEC block headings and the other part can be divided by the value, which is one less than the number of FEC block headers. In other words, the dividing number corresponds to the number of carriers that is added to each carrier.

[0255] Fig. 65 is another example of scheduling of L1 block. Fig. 65 differs from Fig. 60 in that instead of performing a block-filled padding, givench or repeat when the L1 blocks do not fill one OFDM symbol, the OFDM symbol can be filled using parity redundancy by performing a smaller puncture on the shortened / punctured code in the transmitter. In other words, when the parity piercing module 304c is carried out in Fig. 5, the effective code rate can be determined according to the pierce rate, and therefore, by using a punch in which fewer bits have to be filled with zeros, the effective efficiency can be reduced coding (code rate) and you can get a better coding gain. The receiver parity piercing module r303a, as illustrated in Fig. 32, can perform reverse piercing, taking into account less punctured parity redraw. In this point,

[0256] Fig. 62 is showing another example of L1 signaling field. Fig. 62 is different from Fig. 41 in that for the case where the data slice type is CCM, the start address (21 bits) of the PLP can be transmitted. This may allow the creation of a transmission frame through the FECFRAME header

Each PLP, without aligning the FECFRAME header with the initial position of the transmission frame. Thus, the padding overhead that can occur when the width of the data slice is small can be eliminated. In the case where the data slice type is CCM, the receiver can receive ModCod information from the preamble in the L1 signaling path of the BICM demodulator module, as illustrated in Fig. 31, instead of obtaining this information from the FECFRAME header. In addition, even when a switching occurs in the random location of the transmission frame, the FECFRAME synchronization can be performed without delay because the starting address of the PLP can already be obtained from the preamble.

[0257] Fig. 63 is showing another example of L1 signaling fields that may reduce the addressing overhead of a PLP.

[0258] Fig. 64 shows the numbers of QAM symbols that correspond to FECFRAME depending on the modulation types. At this point, the largest common divisor of the QAM symbol is 135, thus, the overhead of log2 (135) -7 bits can be reduced. Thus, Fig. 63 differs from Fig. 62 in that the number of bits of the PLP_start field can be reduced from 21 bits to 14 bits. This is the result of considering 135 symbols as a single group and addressing group. The receiver may receive the OFDM carrier index, where the PLP begins in the transmission frame after obtaining the PLP_start field value and multiplying it by 135.

[0259] Fig. 66 and Fig. 68 are examples of symbol interleaver 308 which can time-interleave data symbols that are transmitted from the ModCod inserting module 307 to the BICM module data path, as illustrated in Fig. 4.

[0260] Fig. 66 is an example of block interleaver for time interleaving that can operate on a data segment basis. The row value is the number of payload cells in four of the OFDM symbols in one data slice. The interleaving based on the OFDM symbol may not be possible because the number of cells may vary between neighboring OFDM cells. The value of the column K denotes the time interleaving depth, which may be 1, 2, 4, 8, or 16 ... The signaling K for each data slice can be performed inside the L1 signaling. The frequency interleaver 403, as illustrated in Fig. 9, can perform its operations before the time interleaver 308, as illustrated in Fig. 4.

[0261] Fig. 67 is showing an interleaving performance of time interleaver as shown in Fig. 66. Here assumes that the column value is 2, the row value is 8, the data slice width is 12 data cells, and that in the data segment there is no data there are continuous pilot signals. The upper figure in Fig. 67 illustrates the construction of an OFDM symbol when time interleaving is not performed and the bottom figure illustrates the construction of the OFDM symbol when time interleaving is performed. Black cells represent a scattered pilot and non-black cells represent data cells. The same type of data cell represents the OFDM symbol. In Fig. 100, data cells that correspond to a single OFDM symbol are interleaved into two symbols. Interleaving memory is used,

[0262] Fig. 68 is suggested for achieving full interleaving depth. In Fig. 68, the black cells represent scattered pilots, and the non-black cells represent data cells. Time interleaver as illustrated in Fig. 68 can be implemented

In the form of a block interleaver, it can interleave data slices. In Fig. 68, the number of columns, K represents the width of the data slice, the row number, N represents the depth of the time interleaving and the value, K can be a random value, i.e., K = 1,2,3, .... The interleaving process includes saving a data cell in a column in a winding manner and reading in a direction determined by columns, disabling pilot positions. This means that it can be said that interleaving is carried out in a twisted row-column.

[0263] In addition, at a transmitter, the cells which are read in a column twisted fashion of the interleaving memory correspond to a single OFDM symbol and the pilot positions of the OFDM symbols can be maintained while interleaving the cells.

[0264] Also, at the receiver, the cells which are read in a column twisted fashion of the de-interleaving memory correspond to a single OFDM symbol and the pilot positions of the OFDM symbols can be maintained while de-interleaving the cells.

[0265] Fig. 69 shows time interleaving performances depicted in Fig. 68. For comparison with Fig. 66, it is assumed that the row number is 8, the data slice width is 12 data cells, and that the data slice is not located in the data slice. continuous pilot signals. In Fig. 69, data cells corresponding to a single OFDM symbol are interleaved up to eight OFDM symbols. As illustrated in Fig. 102, an interleaving memory is used which corresponds to eight OFDM symbols and the resulting interleaving depth corresponds to the eight OFDM symbols and thus, a complete interleaving depth is obtained.

[0266] The time interleaver as shown in Fig. 68 may be advantageous in that the total interleaving depth can be obtained using identical memory; the interleaving depth may be flexible, as opposed to FIG. 66; consequently, the length of the transmission frame can also be flexible, i.e., the rows do not have to be multiples of four. In addition, the time interleaver used for the data slice may be identical to the interleaving method used for the preamble and may also be shared with a digital transmission system that uses overall OFDM multiplexing. In particular, the time interleaver 308, as illustrated in Fig. 4, can be used before using the frequency interleaver 403 as illustrated in Fig. 9.

[0267] Fig. 70 is showing a corresponding symbol deinterleaver (r308) in a receiver. This element may perform deinterleaving after receiving the output signal from the frame header erasing element r401. In the unraveling processes, compared to f. 66, the block interleaving and reading processes are reversed. By using position information of the pilot signal, the time de-interleaver can perform virtual de-interleaving not by writing into or reading from the pilot position in the interleaver memory, and by writing into or reading from the cell position the data in the interleaver memory. Deinterleaved information can be output to the ModCod extractor r307.

[0268] Fig. 71 is another example of time interleaving. You can carry out writing in an oblique direction and reading row by row. As in FIG. 68, interleaving is performed considering pilot positions. Reading and saving is not

This is done for the pilot position, but the interleaving memory is made available by considering only the position of the data cell.

[0269] Fig. 72 shows a result of interleaving using the method shown in Fig. 71. Comparing with Fig. 69, cells with the same patterns are dispersed not only in the time domain but also in the frequency domain. In other words, the overall interleaving depth can be obtained in both the time domain and frequency.

[0270] Fig. 75 is showing an interleaver in symbol r308 of a corresponding receiver. The output signal of the frame header erasing element r401 may be de-interleaved. Comparing with FIG. 66, de-interleaving changes the order of reading and writing. Time de-interleaver may use pilot position position information to perform virtual de-interleaving so that no read or write is performed at the pilot positions, but reading or writing may be performed only at the positions of the data cell. Deinterleaved data can be output to the ModCod r307 extractor.

[0271] Fig. 73 is an example of the addressing method shown in Fig. 72. NT is time interleaving depth and ND is data slice width. The assumption here is that the row value, N, is 8, the width of the data segment is 12 data cells, and no pilots are in the data segment. Fig. 73 shows a method for generating addresses for storing data in a time interleaving memory when the transmitter performs time interleaving. The addressing starts from the first address with the Row Address (RA) = 0 and the Column Address (CA) = 0. In each addressing case, RA and CA are incremented. For RA, a modulo operation can be performed using the OFDM symbols used in the time interleaver. For CA, a modulo operation can be performed using the number of carriers, which corresponds to the width of the data segment. RA can be increased by 1 when carriers that correspond to the data segment are stored in memory. Storing in the memory can only be carried out when the location of the current address is not the location of the pilot signal. If the location of the current address is the location of the pilot signal, only the address value can be increased.

[0272] In Fig. 73, the number of columns, K represents the width of the data slice, the order number, N represents the depth of the time interleaving, the value, K can be a random value, i.e., K = 1,2,3, .... The interleaving process may include writing the cell data in the column twisting and reading towards the column, disabling pilot positions. In other words, the virtual interleaving memory may include pilot positions, but pilot positions may be excluded in real interleaving.

[0273] Fig. 76 is showing a de-interleaving process inverse to time interleaving as illustrated in Fig. 71. Writing row-by-row and reading in an oblique direction can restore cells in primary sequences.

[0274] The addressing method used in a transmitter can be used in a receiver. The receiver can write row-by-row data received in the de-interleaver memory over time and can read stored data using the generated address values ​​and pilot location information that can be generated in a similar manner to that of the transmitter. As an alternative method, the generated address values ​​and pilot signal information that were used for saving can be used to read row by row.

[0275] These methods can be used in a preamble that transmits L1. Because each symbol

EP 2 222 007 B1

The OFDM, which includes the preamble can have pilot signals at identical locations, one can perform either interleaving referring to address values, taking into account pilot location or interleaving referring to address values ​​without considering the location of the pilot signal. For a case relating to address values ​​without taking into account the location of the pilot signal, the transmitter stores data in the time interleaving memory each time. In this case, the amount of memory required to perform interleaving / unraveling preambles at the receiver or transmitter becomes identical to the number of payload cells present in the OFDM symbols used for time interleaving. [0276] Fig. 74 is another example of L1 time interleaving. In this example, Time interleaving can place carriers in all OFDM symbols, although all carriers could be located in a single OFDM symbol if time interleaving were not performed. For example, for data located in the first OFDM symbol, the first bearer of the first OFDM symbol will be located in its original location. The second carrier of the first OFDM symbol will be located in the second carrier index of the second OFDM symbol. In other words, the carrier of i-data that is located in the nth OFDM symbol will be located in the i-th carrier index (i + n) mod Nth OFDM symbol, in which i = 0, 1,2 ... , number of carriers-1, n = 0, 1, 2 ..., N-1, and N is the number of OFDM symbols used for time interleaving L1. In this L1 interleaving method, it can be said that interleaving for all OFDM symbols is performed in a twisted fashion as illustrated in Fig. 107. Even if pilot positions are not illustrated in Fig. 107, as mentioned above, interleaving can be applied to all OFDM symbols comprising pilot symbols. This means that it can be said that interleaving can be performed for all OFDM symbols without considering the pilot position or regardless of whether the OFDM symbols are pilot symbols or not.

[0277] If the size of the LDPC block used in L1 is smaller than the size of a single OFDM symbol, the remaining carriers may include copies of parts of the LDPC block or may be filled with zeros. At this point, the same interleaving can be performed after the time as above. Similarly, in Fig. 74, the receiver can perform de-interleaving using all the blocks used in the L1 time interleaving and reading the blocks in the order in which they were interleaved, i.e., in order of numbers stored in blocks, as shown in Fig. 74 .

[0278] When using a block interleaver as shown in Fig. 73, two buffer memories are used. In particular, while one buffer memory stores input symbols, previous input symbols can be read from a different buffer memory. After these processes have been performed for one symbol interleaver, interleaving can be performed using the switching order of reading and writing to avoid a memory access conflict. This "ping-pong" type deinterleaving can have a simple address generation logic. However, the use of two symbol interleaver buffers can increase hardware complexity.

[0279] Fig. 77 is an example of deinterleaver in symbol art r308 or r308-1 as shown in Fig. 31. This proposed embodiment of the invention may use only a single buffer memory for performing deinterleaving. After generating the address value by the address generation logic, the address value can be output from the buffer memory and can be left

The operation is carried out using symbol storage, which is entered into the same address. By using these processes, you can avoid the conflict of access to the memory while reading and writing. In addition, symbol deinterleaving can be performed using only a single buffer. Parameters can be defined to explain this principle of address generation. As illustrated in Fig. 73, the number of rows of deinterleaving memory can be defined as the depth of time interleaving, D, and the number of columns of the de-interleaving memory can be defined as the width of the data slice, W. Then, the address generator can generate the following addresses.

i-th sample on j-th block, including pilot signal i = 0,1,2, ..., N-1;

N = D * W;

Ci, j = i mod W;

Tw = ((Ci, j mod D) * j) mod D;

Ri, j = ((and div W) + Tw) modD;

Li, j (1) = Ri, i * W + Ci, j;

Or

Li, j (2) = Ci, j * D + Ri, j;

[0280] The addresses include pilot positions, and thus, input symbols are assumed to include pilot positions. If input symbols that only contain data symbols must be processed, additional control logic may be required that bypasses corresponding addresses. At this point, i represents the index of the input symbols, j represents the index of the input interleaving block, and N = D * W represents the length of the interleaving block. The Mod operation represents a modulo operation that gives the rest after splitting. The Div operation represents a division operation that gives a quotient after splitting. Ri, j and Ci, respectively represent the row address and address of the input column of the i-th symbol of the j-th block-interleaver. Tw represents the column twisting value for the addresses in which the symbols are located. In other words, each column can be considered as a buffer memory in which an independent twisting is carried out according to the value of Tw. Li, j represents the address when a single buffer is implemented in one dimension of sequential memory and not in two dimensions. Li, j can have values ​​from 0 to (N-1). Two different ways are possible. Li, j (1) is used when the memory matrix is ​​connected row by row and Li, j (2) is used when the memory matrix is ​​connected column by column.

[0281] Fig. 78 is an example of row and column addresses for time deinterleaving when D is 8 and W is 12. J starts from j = 0 and for each value j, the first row may represent row address and the second row may represent row address the government can represent the address of the column. Fig. 78 only shows the addresses of the first 24 symbols. Each column index can be identical to the index of input symbols and.

[0282] Fig. 80 is an example of an OFDM transmitter using a data slice. As illustrated in Fig. 80, the transmitter may include a PLP data path, an L1 signaling path, a frame builder, and an OFDM modulation part. The PLP data path is indicated by blocks with horizontal lines and vertical lines. Signal path L1 is indicated by blocks with oblique lines.

EP 2 222 007 B1

Input processing modules 701-0, 701-N, 701-K, and 701-M can include blocks and sequences of input interface module 202-1, input stream synchronizer 203-1, delay compensator 204-1, zero packer reset module 205 -1, the CRC encoder 206-1, BB 207-1 header inserter module, and BB 209 scrambler module performed for each PLP, as illustrated in Fig. 2. FEC 702-0, 702-N, 702-K, and 702-M may include blocks and sequences of the external encoding module 301 and the inner coding module 303 as shown in Fig. 4. The FEC 702-L1 module used on the L1 path may include blocks and sequences of the outer coding module 301-1 and the shortened / punctured module. internal coding 3031, as illustrated in Fig. 4.The L1 signal module 700-L1 can generate the L1 information required to enclose the frame.

[0283] The bit interleavers 703-0, 703-N, 703-K, and 703-M may include blocks and sequences of the inner interleaver 304 and the bit demultiplexer 305, as illustrated in Fig. 37. The bit interleaver 703-L1 used on the L1 path, it may comprise blocks and sequences of the interleaving module 304-1 and the bit demultiplexer 305-1, as illustrated in Fig. 4. The symbol mappers 704-0, 704-N, 704-K, and 704-M can perform functions identical to the functions of the symbol mapper 306 shown in Fig. 4. The symbol mapping module 704-L1 used on the L1 path can perform functions identical to the functions of the symbol mapper 306-1 shown in Fig. 4. The FEC header modules 705-0, 705- N, 705-K,and 705-M may perform functions identical to those of the ModCod 307 header inserter shown in Fig. 4. The FEC header module 705-L1 for the L1 path may perform functions identical to those of the ModCod 307-1 header inserter shown in Fig. 4.

[0284] Data slice mapper modules 706-0 and 706-K can place FEC blocks in the corresponding data slices, and can send inserted FECs, where the FECs correspond to the PLPs that are assigned to each data slice. Preamble mapper 707-L1 can place L1 signaling FEC blocks in preambles. The L1 L1 signaling blocks are transmitted in preambles. Time interleaver modules 708-0 and 708-K can perform functions identical to the functions of the symbol interleaver 308 shown in Fig. 4, which can interleave data slices. Time interleaver 708-L1 used on the L1 path can perform functions identical to those of the symbol interleaver 308-1 shown in Fig. 4.

[0285] Alternatively, the time interleaver 708-L1 used on the L1 path can perform identical functions with the symbol interleaver 308-1 shown in Fig. 3, but only on the preamble symbols.

[0286] Interleaver blocks 709-0 and 709-K can perform frequency interleaving on data slices. The interleaver 709-L1 used in the L1 path can perform frequency interleaving according to the preamble frequency bandwidth.

[0287] The pilot coding module 710 may generate pilots that are suitable for a continuous pilot signal (CP), a scattered pilot signal (SP), a data slice edge, and a preamble. The frame can be constructed by placing a data slice, a preamble, and a pilot signal in the module 711. The IFFT 712 module and the GI 713 inserter module can perform functions identical to the functions of the IFFT 501 module and module blocks, respectively.

The DAC 714 may convert the digital signals into analog signals and the converted signals may be transmitted.

[0288] Fig. 81 is an example of an OFDM receiver that uses a data slice. In Fig. 81, the tuner r700 can perform the tuner / AGC function r603 and the down converter functions r602 shown in Fig. 61. The ADC r701 can convert the received analog signals into digital signals. The time / frequency synchronizing element r702 may perform functions identical to the functions of the time / freq synchronizer r505 shown in Fig. 62. The frame detector r703 may perform functions identical to the functions of the r506 frame detector shown in Fig. 62.

[0289] At this point, after performing time / frequency synchronization, synchronization may be improved by applying a preamble in each frame that is transmitted from the frame detector r703 during the routing process.

[0290] The G1 removal element r704 and the FFT module r705 can perform functions identical to those of the G50 ripper removal element r503 and the r502 module FFT, respectively, shown in fig. 62.

[0291] The channel estimating element r706 and the channel EQ r707 may perform the channel estimation part and the correction part of the Est / Eq channel r501 as shown in Fig. 62. The frame parser r708 can output a data slice and a preamble in which user selected services are transmitted. . The blocks indicated by the oblique lines process the preamble. Blocks pointed by horizontal lines that can include common PLPs process data segments. The frequency deinterleaver element r709-L1 used on the L1 path can perform frequency deinterleaving within the preamble frequency bandwidth. The frequency deinterleaver element r709 used on the data path segment may perform frequency deinterleaving within a data slice. FEC r712-L1 header decoding module,

[0292] The bits deinterleaver r714-L1 may include the modules and sequences of the r305-1 bit demultiplexer and the internal de-interleaver r304-1, as shown in Fig. 31. The FEC decoder module r715-L1 may comprise modules and sequences of the shortened / punctured module encoding r303-1 and external decoder module r301-1, shown in Fig. 31. At this point, the L1 path output signal may be L1 signaling information and may be sent to a system controller to restore PLP data that is transmitted in segments. data. [0293] The time de-interleaver r710 used on the data slice segment can perform functions identical to the functions of the de-interleaver in the symbol domain r308 shown in Fig. 31. Data slice parser r711 can output the user-selected PLP from the data slices and, if necessary, the common PLP associated with the user-selected PLP. The FEC header decoding module r712-C and r712-K can perform functions identical to those of the ModCod r307 extractor shown in Fig. 31. The symbol demapper r713-C and r713-K can perform functions identical to the functions of the symbol demapper r306 shown in FIG. Fig. 31.

[0294] The bits deinterleaver r714-C and r714-K may include the blocks and sequences of the bit demodiplexer r305 and the internal de-interleaver r304 as illustrated in Figure 31.

The FEC decoding r715-C and r715-K may include the blocks and sequences of the r303 decoder inner module and the r301 outer decoding module as illustrated in Fig. 31. Finally, the r716-C and r716-K output processor may include Blocks and descriptor sequences BB r209, header deletion BB r207-1, CRC decoder r206-1, r205-1 packet inserter module, r204-1 delay recovery module, r203-1 clock recovering module, and r202-1 output interface module 1, the functions of which are performed for each PLP in FIG. 2. In the case where common PLPs are used, then the common PLPs and PLPs associated with the common PLPs can be sent to the linking element TS and can be transformed in the PLP pipelines selected by the user.

[0295] W odniesieniu do fig. 81 należy zauważyć, że w odbiorniku, bloki na ścieżce L1 nie mają symetrycznie ustalonej kolejności do nadajnika w przeciwieństwie do ścieżki danych, gdzie bloki są rozmieszczone symetrycznie lub w sekwencji przeciwległej do nadajnika. Innymi słowy, dla ścieżki danych, element rozplatania w dziedzinie częstotliwości r709, element rozplatający po czasie r710, parser segmentu danych r711, i moduł dekodowania nagłówka FEC r712-C i r712-K mają ustalone położenie. Jednakże, dla ścieżki L1, element rozplatający po częstotliwości r709-L1, moduł dekodowania nagłówka FEC r712-L1, i element rozplatający po czasie r710-L1 mają ustalone położenie.

[0296] Fig. 79 is an example of general block interleaving in the data symbol area where pilot signals are not used. As can be seen in the left figure, interleaving memory can be filled without black pilot signals. To create a rectangular memory, if necessary, filler cells can be used. In the left figure, the filling cells are indicated as cells with oblique lines. In this example, since one continuous pilot may coincide with one type of scattered pilot pattern, a total of three padding cells are required during the duration of the four OFDM symbols. Finally, the content of the interlaced memory is shown in the central figure.

[0297] As in the left figure shown in Fig. 79, it is possible to perform either row-by-row writing and column-twisting; or saving in a twisted way from the beginning. The output of the interleaver can include reading row-by-row from memory. The output data that has been read can be placed as shown in the right figure when OFDM transmission is considered. At this time, for simplicity, frequency interleaving can be ignored. As can be seen in the figure, the frequency diversity is not as large as shown in Fig. 73, but is kept at a similar level. First of all, this may be advantageous in that the memory required for performing the interleaving and deinterleaving can be optimized. In this example,

[0298] For input signals for the time de-interleaver, the receiver should restore the contents of the buffer memory in the form of a central figure, simultaneously taking into account the padding cells. In general, OFDM symbols can be read symbol by symbol and can be kept row by row. Then, the column may be unscrewed corresponding to its twisting. The output signal from the de-interleaver can be output in a row-by-row reading from the memory of the left figure. In this way, compared to the method shown in Fig. 73, the pilot signal overhead can be minimized, and consequently the interleaving / deinterleaving memory can be minimized.

[0299] Fig. 82 is an example of Time interleaver 708-L1 for the L1 path shown in Fig. 80. As shown in Fig. 82, time interleaving for a preamble in which L1 is transmitted, may include interleaving L1 data cells, excluding pilot signals that are typically transmitted in the preamble. The interleaving method may comprise storing input data in an oblique direction (solid lines) and reading data row-by-row (dashed lines), using identical methods to those shown with reference to Fig. 73.

[0300] Fig. 82 is an example of time deinterleaver r712-L1 on L1 path as shown in Fig. 81. As shown in Fig. 82, for a L1 broadcasting preamble, L1 data deselection can be performed, excluding pilot signals that are regularly broadcast in the preamble. The de-interleaving method may be identical to the method illustrated in Fig. 76, in which input data is written row by row (solid lines) and read in an oblique direction (dashed lines). The input data does not include any pilot signal and, consequently, the output data has L1 data cells that also do not include a pilot signal. In the case where the receiver uses a single buffer in the time de-interleaver for the preamble,

[0301] The de-interleaving r712-L1 can be performed using the addressing operation as follows:

i-th sample on j-th block, including pilot signal i = 0,1,2, ..., N-1;

N = D * W;

Ci, j = i mod W;

Tw = ((Ci, j mod D) * j) mod D;

Ri, j = ((and div W) + Tw) mod D;

Li, j (1) = Ri, j * W + Ci, j;

or

Li, j (2) =? D + Ci.j Ri.j;

[0302] In the above operations, a length of a row, W is a length of a row of an interleaving memory as shown in Fig. 82. Column length, D is the depth of preamble time interleaving, which is a number of OFDM symbols that are required for transmitting preambles.

[0303] Fig. 83 shows an example of forming OFDM symbols by scheduling pilots and input preambles from the frame builder 711 as shown in Fig. 80. Blank cells form a L1 header which is an output signal of the FEC header 705-L1 on the L1 path, as shown in Fig. 80. Gray cells represent continual pilots for the preamble which are generated by the pilot generating module 710 as shown in Fig. 80. cells with patterns represent the L1 signaling cells which are an output signal of the preamble mapper 707- L1, as illustrated in Fig. 80. The left figure represents OFDM symbols when time interleaving is turned off and the right figure represents OFDM symbols when time interleaving is on.The L1 header can be excluded from time interleaving,

Because the L1 header transmits information about the length of the L1 signaling field and the status mark information enabled / disabled for time interleaving. This is because the L1 header is added before time interleaving. As mentioned above, time interleaving is performed by switching off the pilot cells. The remaining L1 data cells can be interleaved as illustrated in Fig. 82 and can then be assigned to OFDM sub-carriers.

[0304] Fig. 84 shows an example of a Time Interleavers 708-0 - 708-K that can interleave data symbols sent from a data segment Mappers 706-0 ~ 706-K on data path of an OFDM transmitter using data slice shown in Fig. 80. Time interleaving can be performed for each data slice. Symbols interleaved after time can be output to interleavers at 709-0 - 709-K.

[0305] Fig. 84 also illustrates an example of a simple time interleaver using a single buffer memory. Fig. 84a illustrates the construction of OFDM symbols before time interleaving. Blocks with the same patterns represent the same type of OFDM symbols. Figs. 84b and 84c illustrate the construction of OFDM symbols after time interleaving. The time interleaving method can be divided into Type 1 and Type 2. Each type can be performed alternatively for even symbols and odd symbols. Accordingly, the receiver can perform deinterleaving. One of the reasons for the alternative use of type 1 and type 2 is to reduce the required memory in the receiver by using a single buffer memory during time de-interleaving.

[0306] Fig. 84b shows time interleaving using a type of interleaving. Input symbols may be recorded in an oblique downward direction and may be read in the row direction. Fig. 84c shows time interleaving using type 2 interleaving. Input symbols may be written in an oblique direction upwards and may be read in the direction of the rows. The difference between type 1 and type 2 is that the direction of writing the input symbol is either up or down. These two methods differ in the way symbols are recorded, however, these two methods are identical in terms of showing the total depth of time interleaving and total frequency diversity. However,

[0307] There are two possible solutions. The first solution may be to signal the 1st interleave bit of the first interleaver block that passes first after each preamble by the preamble signal block L1. This method performs proper interleaving by signaling. The second solution may be to create a frame so that it has a length with an even number of interleaved blocks. Using this method, the first interleaved block of each frame may have the same type, and thus, the problem of timing of interleaved blocks may be solved. For example, a synchronization problem can be solved by using the type 1 interleaving into the first interleaved block and then applying to subsequent interleaved blocks in each frame,

[0308] Fig. 89 is showing a time deinterleaver r710 of a receiver,

The time deinterleaving can be performed on the output of the frequency deinterleaver in the frequency domain r709. The time deinterleaver of Fig. 89 represents a de-interleaving scheme, which is a reverse process of time interleaving shown in Fig. 84. The de-interleaving, compared to Fig. 84, will have the opposite method of reading and writing. In other words, type 1 of the de-interleaver can write the input symbols in the direction determined by the rows and can read the stored symbols in an oblique downward direction. Type 2 of the de-interleaver can write the input symbols in an oblique downward direction and can read the recorded symbols in the direction determined by the rows. These methods can enable saving of received symbols, wherein the symbols are previously read, determining the direction of writing symbols of type 2 of the de-interleaver, such that it is identical to the direction of reading symbols of type 1 of the de-interleaver. Thus, the receiver can perform de-interleaving using a single buffer memory. In addition, a simple implementation can be implemented because the Type 1 and Type 2 de-interleaving methods are performed either by writing and reading the symbols in an oblique direction or in a direction determined by the rows.

[0309] However, the use of these methods can cause a problem in synchronizing at the receiver due to the use of two interleaving schemes. For example, type 1 de-interleaving of two interleaved symbols may result in performance deterioration. There are two possible solutions. The first solution may be to determine the type of interleaved block that comes after the preamble using 1 interleave bit of the transmitted portion of the L1 signaling block. A second solution may be to perform un-interleaving using the type according to the first interleaving block in the frame, if the number of interleaving blocks in the frame is an even number. The unbuttoned symbol can be output to the parser of the r711 data segment.

[0310] Fig. 85 shows an address generation logic that is identical with an address generation logic of a single buffer, when a block interleaver uses two memory buffers as in Fig. 73. The address generation logic can perform identical functions as functions shown in FIG 73. By defining the depth of time interleaving D as the number of rows of de-interleaving memory and defining the width of the data segment W as the number of columns, the addresses shown in Fig. 85 can be generated by the address generator. Addresses may include pilot positions. In order to time-interleave input symbols that contain only data symbols, a control logic may be required that can bypass addresses. The addresses used in the interleaved preambles may not require a pilot position and interleaving can be performed using L1 blocks. The letter i represents the index of the input symbol, N = D * W represents the length of the interleaving block. Ri and Ci represent the row address and column address of the i-th input symbol, respectively. Tw represents the value of a column twisting or twisting parameter from the address where the symbol is located. Li represents addresses in the case where a one-dimensional memory having a single buffer is implemented. The Li values ​​can be from 0 to (N1). In this one-dimensional memory, at least two ways are possible. Li (1) denotes a memory matrix coupling row by row, and Li (2) denotes a memory matrix coupling column by column.

[0311] Fig. 86 is another example of preamble. In the case where the OFDM symbol has

The size of the 4K-FFT is used in the 7.61 MHz bandwidth and the sixth carrier in the OFDM symbol and the carriers at both ends are used as pilot signals, it can be assumed that the number of carriers that can be used in the block L1 signal will be 2840. When multiple channels are combined, there may be many preamble frequency bandwidths. The number of carriers may vary depending on the type of pilot signals to be used, the size of the FFT, the number of connected channels, and other factors. If the L1_XFEC_FRAME frame size that includes the L1_header header (H) to be assigned to a single OFDM symbol and the FEC L1 block (L1_FEC1) is smaller than a single OFDM symbol (5w-a-1), then the L1_XFEC_FRAME frame containing the L1_header header can be repeated to populate the remainder of a single OFDM symbol (5w-a-2). This is similar to the preamble structure shown in Fig. 60. For a receiver to receive a data slice that is located in a certain bandwidth of connected channels, a receiver tuner window may be located in a certain bandwidth.

[0312] If the receiver tuner window is located as element 5w-a-3 shown in Fig. 86, an incorrect result may occur when combining repeating L1_XFEC_FRAME frames. Case 1 shown in Fig. 86 can be such an example. The receiver detects the L1_header header (H) to locate the initial position of the L1_header header (H) inside the tuner window, but the found L1_header header can be the header of the incomplete L1_XFEC_FRAME (5W-a-4) frame. L1 signaling information may not be obtained correctly if the L1_XFEC_FRAME frame length is derived from this L1_header header and the rest of the portion (5w-a-5) is added to the initial position of this L1_header header. In order to prevent such an accident, the receiver may need additional operations to find the header of the complete L1_XFEC_FRAME frame. Fig. 87 illustrates such operations. In this example, to find the header of a complete L1_XFEC_FRAME frame, if the incomplete L1_XFEC_FRAME frame is in the preamble, the receiver can use at least two L1_header headers to find the initial location of the L1_header header to connect the L1_XFEC_FRAME frame. First, the receiver can find the L1_header header from the OFDM preamble symbol (5w-b-1). Then, by using the L1_XFEC_FRAME frame length within the found L1_header header, the receiver can check that each L1_XFEC_FRAME frame in the current OFDM symbol is a complete block (5w-b-2). If this is not the case, the receiver can find another L1_header header from the current preamble symbol (5w-b-3). Based on the calculated distance between the newly found L1_header header and the previous L1_header header, it can be determined if the given L1_XFEC_FRAME frame is a complete block (5w-b-4). Then, the L1_header header of the complete L1_XFEC_FRAME frame can be used as a junction point. Using this determination point, the L1_XFEC_FRAME frame can be combined (5w-b-5). Using these processes, it can be expected that the receiver will have the case 2 or the correct connection shown in Fig. 86. These processes can be carried out in the decoder of the FEC header r712-L1 on the L1 signal path shown in Fig. 81. the L1_header header of the complete L1_XFEC_FRAME frame can be used as a junction point. Using this determination point, the L1_XFEC_FRAME frame can be combined (5w-b-5). Using these processes, it can be expected that the receiver will have the case 2 or the correct connection shown in Fig. 86. These processes can be carried out in the decoder of the FEC header r712-L1 on the L1 signal path shown in Fig. 81. the L1_header header of the complete L1_XFEC_FRAME frame can be used as a junction point. Using this determination point, the L1_XFEC_FRAME frame can be combined (5w-b-5). Using these processes, it can be expected that the receiver will have the case 2 or the correct connection shown in Fig. 86. These processes can be carried out in the decoder of the FEC header r712-L1 on the L1 signal path shown in Fig. 81.

[0313] Fig. 88 is an example of a preamble structure that can eliminate the above-mentioned additional operations at a receiver. Unlike the previous preamble structure, when the remainder of the OFDM symbol is filled, only the L1-FEC1 of the L1_XFEC_FRAME frame, excluding the L1_header (H) header, can be populated multiple times (5w-c-2). In this way, when the receiver

Detects the initial position of the L1_header (H) for combining the L1_XFEC_FRAME frame, the L1_header header of only the complete L1_XFEC_FRAME frame can be found (5w-c-4), and thus, without additional operations, the L1_XFEC_FRAME frame can be combined using found L1_header header. Therefore, in a receiver processes such as (5w-b-2), (5w-b-3), and (5wb-4) shown in Fig. 87 can be eliminated. These processes and processes equivalent to these processes can be carried out in the FEC 712-L1 header decoder in the L1 signal path of the receiver shown in Fig. 81 and in the FEC 705-L1 header in the L1 signal path of the transmitter shown in Fig. 80.

[0314] The time deinterleaver r712-L1 on the L1 path of the receiver of Fig. 81 can de-interleave the L1 block cells or cells with the patterns, disabling other cells, such as the preamble and the pilot signal cells. L1 block cells are represented by cells with patterns, as illustrated in Fig. 83. Fig. 90 is another example of an OFDM transmitter that uses data slices. This transmitter may be of identical construction and may perform the same function as the transmitter shown in Fig. 80, with the exception of added and modified blocks. Preamble mapper 1007-L1 can map L1 blocks and L1 block headers, which are output signals from the FEC 705-L1 header, into preamble symbols used in the transmission frame. In particular, the L1 block header can be repeated for each preamble, and the L1 block can be divided into as many as the number of preambles used. Time interleaver 1008-L1 can interleave L1 blocks, which are divided into preambles. At this point, the L1 block header can participate in the interleaving or not. Whether the L1 block header is involved or not can not change the signal structure of the L1 block header, but can change the order of interleaving and transmitting L1 blocks. The L1_XFEC 1015-L1 repeating element may repeat time interleaved L1_XFEC blocks within the preamble frequency bandwidth. At this point, the L1 block header can be either repeated in the preamble or not repeated in the preamble. Time interleaver 1008-L1 can interleave L1 blocks, which are divided into preambles. At this point, the L1 block header can participate in the interleaving or not. Whether the L1 block header is involved or not can not change the signal structure of the L1 block header, but can change the order of interleaving and transmitting L1 blocks. The L1_XFEC 1015-L1 repeating element may repeat time interleaved L1_XFEC blocks within the preamble frequency bandwidth. At this point, the L1 block header can be either repeated in the preamble or not repeated in the preamble. Time interleaver 1008-L1 can interleave L1 blocks, which are divided into preambles. At this point, the L1 block header can participate in the interleaving or not. Whether the L1 block header is involved or not can not change the signal structure of the L1 block header, but can change the order of interleaving and transmitting L1 blocks. The L1_XFEC 1015-L1 repeating element may repeat time interleaved L1_XFEC blocks within the preamble frequency bandwidth. At this point, the L1 block header can be either repeated in the preamble or not repeated in the preamble. but may change the order of interleaving and transmitting L1 blocks. The L1_XFEC 1015-L1 repeating element may repeat time interleaved L1_XFEC blocks within the preamble frequency bandwidth. At this point, the L1 block header can be either repeated in the preamble or not repeated in the preamble. but may change the order of interleaving and transmitting L1 blocks. The L1_XFEC 1015-L1 repeating element may repeat time interleaved L1_XFEC blocks within the preamble frequency bandwidth. At this point, the L1 block header can be either repeated in the preamble or not repeated in the preamble.

[0315] Fig. 91 is another example of an OFDM receiver using data slices. This receiver has an identical design and can perform the same function as the receiver shown in Fig. 81, with the exception of added and modified blocks. The FEC decoding module r1012-L1 can synchronize the L1 headers in the preamble. If the L1 headings are repeated, the L1 headers can be combined to obtain an SNR gain. Then, the FEC header decoding module r712-L1 shown in Fig. 81 can perform FEC decoding. The synchronization process may provide the location of the header using the correlation of the sync word of the header and preambles. For frequency shifts with multiple integers, the correlation range can be determined from cyclic addressing.

[0316] L1_XFEC combining module r1017-L1 can combine L1_XFEC blocks to obtain an SRN gain when divided L1 blocks are received in a preamble. The time deinterleaver r1010-L1 can unravel time blocks L1 in the preamble. Depending on whether the L1 block headers are interleaved after a time in the transmitter or not, the L1 block headers can be respectively de-interleaved in the receiver. The de-interleaving order of L1 blocks can be changed depending on whether the L1 block headers are interleaved after a time in the transmitter or not. For example, when time interleaving is ON, as in Fig. 83, the location of the cell number 33, which is the first cell of the L1 block within the first preamble, may change. In other words, when L1 block headers do not participate in interleaving,

Fig. 83. If the L1 block headers are involved in the interleaving, cell location number 33 needs to be changed to deinterleaved cells that are interleaved diagonally using the first cell of the first L1 block header within the first preamble, as reference . Linker L1_FEC r1018-L1 can combine L1 blocks that are divided into multiple preambles to a single L1 block for FEC decoding.

[0317] Using the additional 1 bit, the PLP_type field of the L1 signaling fields that are transmitted in the preamble can have the following values.

PLP_type = 00 (common PLP)

PLP_type = 01 (PLP of normal data)

PLP_type = 10 (PLP of demultiplexed data)

PLP_type = 11 (reserved) [0318] The PLP of the normal data represents a data PLP in the case where a single service is transmitted in a single data slice. The PLP of the demultiplexed data represents a data PLP when a single service is demultiplexed into multiple data segments. When the user changes the service, if L1 signaling and L2 signaling are stored in the receiver, waiting for the L1 signaling information in the next frame can be eliminated. Therefore, the receiver can effectively change the services, and the user can get the benefit of a lesser delay when changing the service. Fig. 95 is showing a L1 block signal structure which is transmitted in a preamble, a time interleaving flow and a time deinterleaving flow. As can be seen in Fig. 95,

[0319] Fig. 96 is showing an example of L1 time interleaving field of L1 signaling fields processed by FEC header 705-L1 on L1 path, shown in Fig. 90. As illustrated in Fig. 96, one bit or two bits may be used for the time interleaving parameter. If one bit is used, interleaving is not performed when the bit value is 0 and the interleaving with the depth of OFDM symbols used in the preamble symbols can be performed when the bit value is 1. If two bits are used, when the bit value is 00, it is performed interleaving with interleaving depth of 0 or interleaving is not performed, while interleaving with depth of OFDM symbols used in preamble symbols can be performed when bit value is 01.

[0320] The receiver, in particular, the FEC header decoder r1012-L1 on the L1 path shown in Fig. 91 can extract the time interleaving parameters (TI) shown in Fig. 96. Using these parameters, the time deinterleaver r1010-L1 can perform the time interleaving. unraveling according to the interleaving depth. Parameters that are transmitted in the L1 header include the L1 information size (15 bits), time interleaving parameter (maximum 2 bits), and CRC (maximum 2 bits). If the Reed-Muller code RM (16, 32) is used to encode the L1 header field, because the bits that can be transmitted include 16 bits, there are not enough bits. Fig. 97 is an example of L1 signaling field that may be used in this case.

[0321] Fig. 97 shows the processing performed on the FEC header 705-L1 on the L1 path shown in Fig. 90. In Fig. 97a, L1 () in the column of the signaling boxes represents the size L1 and the TI ()

It represents the size for the time interleaving parameters. In the first case or when L1 (15 bits) and TI (1 bit) are transmitted, additional data block filling may not be necessary and significant L1 header decoding performance may be achieved, however, because information is given on whether to perform interleaving after time or not, in the case of a short L1 block, the interleaving effect can not be obtained.

[0322] In the second case or when L1 is reduced to 1/8 of the original size, transmission of information with numbers of bits, such as L1 (12 bits), TI (2 bits), and CRC (2 bits) becomes possible. Thus, for the second case, the best L1 decoding performance and the time interleaving effect can be expected. However, the second case requires an additional fill process to get the magnitude L1 being a multiple of eight if the L1 size is not a multiple of eight. Fig. 97b shows a fill method that can be performed on L1 signal 700-L1 shown in Fig. 90. This illustrates that padding is located after L1 block and coincides with CRC encoding. Consequently, at the receiver, the FEC BCH / LDPC decoding module r715-L1 on the L1 path shown in Fig. 91 can perform FEC decoding,

[0323] In the third case or when the magnitude L1 is expressed as the number of QAM mapped cells rather than the number of bits, the number of bits can be reduced. In the fourth case, L1 is expressed not as the size of the entire L1 block, but as the L1 size for each OFDM symbol. Thus, for the receiver to obtain the size of the entire L1 block, L1 block multiplication in a single OFDM symbol must be multiplied by the number of OFDM symbols used in the preamble. In this case, the actual L1 size must exclude filling. [0324] In the fifth case, by expressing the L1 block not as the number of bits, but as the number of QAM mapped cells, it is possible to obtain a larger reduction in bits. In cases from the third to the fifth, the parameters TI, CRC are shown, and the number of bits to complete. For the case where the L1 block size is expressed as the number of cells, for the receiver to obtain the L1 size in bits, the receiver must multiply the number of bits in which only cells are transmitted by the received L1 size. In addition, the number of filling bits must be excluded. [0325] The last case illustrates an increase in the total number of bits to 32 bits by using two RM code blocks in the header. The total CRC fields become four-bit, because each RM code block needs two bits of the CRC field. The receiver or decoder of the FEC header r1012-L1 on the L1 path, shown in Fig. 91, needs to perform FEC decoding on a total of two FEC blocks to obtain the necessary parameters. Using the received parameters, the receiver, and in particular the time deinterleaver r1010-L1 on the L1 path, shown in Fig. 91, may determine whether to perform de-interleaving, and may receive de-interleaving depth if it is determined that the de-interleaving is to be performed. In addition, the FEC BCH / LDPC decoding module r715-L1 can receive the LDPC block length required to perform FEC decoding and shortening / puncturing parameters. Thus, you can eliminate the unnecessary fill boxes required to send L1 signal to the system controller. the FEC BCH / LDPC decoding module r715-L1 can receive the length of the LDPC block required to perform FEC decoding and the shortening / puncturing parameters. Thus, you can eliminate the unnecessary fill boxes required to send L1 signal to the system controller. the FEC BCH / LDPC decoding module r715-L1 can receive the length of the LDPC block required to perform FEC decoding and the shortening / puncturing parameters. Thus, you can eliminate the unnecessary fill boxes required to send L1 signal to the system controller.

[0326] Fig. 92 is an example of time interleaving (TI) of a data slice. The TI process assumes that all pilot positions are known. The TI process can only output data cells,

Excluding pilot signals. Knowing the positions of the pilot signal it is possible to obtain the correct number of output cells for each OFDM symbol. Also, the TI process can be performed by a single buffer in the receiver.

[0327] Fig. 93 is an example of an efficient implementation of time de-interleaver at a receiver. Fig. 93a illustrates four different de-interleaving schemes according to an embodiment of the present invention. Fig. 93b shows a single buffer memory that performs deinterleaving. Fig. 93c is an example of a scheme for addressing L1 blocks in a 2D matrix or in a 1D sequence.

[0328] As illustrated in Fig. 93a-c, using a single buffer algorithm a more effective implementation of the time de-interleaver can be achieved. The algorithm can be characterized by reading the output cells from the memory at the beginning, and then saving the input cells, where the output cells are read. Diagonal addressing can be considered as cyclic addressing in each column.

[0329] More specifically, referring to Fig. 93a, these four writing and reading methods then apply to C2 frames that are received at the receiver. The first received frame in the receiver is stored in the de-interleaver memory, as in Fig. 93b, in the manner as for the zero block in Fig. 93a and read in the same way as for the first block. The second received frame is stored in the de-interleaver memory in Fig. 93b in the same manner as for the first block and read as for the second block. The third received frame is stored in the memory of the de-interleaver in Fig. 93b in the same manner as for the second block and read in the same manner as for the third block. The fourth received frame is stored in the memory of the de-interleaver in Fig. 93b in a manner as for the third block and read in the same way as for a zero block, and so on. This means that the writing and reading methods shown in Fig. 93a can be successively and cyclically applied to the C2 frames that are subsequently obtained.

[0330] Time interleaving (TI) process can be performed on preambles as shown in Fig. 94. Pilot positions are periodically and easily removed and no interleaving is necessary for the L1 block header. This is due to the fact that the preamble heading carries the TI parameters and both the interleaving and the lack of interleaving have the same results due to the repetition. Thus, only L1 signaling cells are interleaved. A single buffer memory used in the TI data segment can be used.

[0331] Fig. 95 is showing a de-interleaving preamble interleaving flow. The interleaving can be performed in one L1 block, instead of in the entire preamble. At the transmitter, as illustrated in Fig. 128a, the L1 block can be coded (1), then interleaving can be performed in the L1 block (2), and the interleaved L1 block can be repeated in the preamble. At the receiver, as illustrated in Fig. 128b, from the received preamble (1), the L1 block can be combined or synchronized and a single L1 block period can be obtained (2), and the combined L1 block can be unbonded (3).

[0332] Fig. 96 is showing depth parameters of time interleaving in L1 signaling header. For the construction of the L1 header, RM (16, 32) has 16 bits of capacity. A maximum of 2 bits of CRC can improve the performance of RM BER. The required L1 header signaling fields include a L1_info_size (15 bits) field that may require a maximum of 5 OFDM symbols and a TI_depth field (2 bits or 1 bit). However, a total of 18 or 19 bits exceeds the capacity of the L1 header.

[0333] Fig. 97 is an example of an L1 signaling header and structure and a padding method.

[0334] Fig. 98 is an example of L1 signaling block transmitted in a frame header. L1 signaling information can be used as decoding parameters in the receiver. Specifically, the modules on the L1 signal path, shown in Fig. 91, can perform L1 signaling decoding, and the modules on the PLP path, shown in Fig. 91, can use parameters, and thus services can be decoded. The receiver may receive the parameters of the L1 signaling block from L1 path signals that are decoded according to the order of each field and field length. The meaning of each field and its application are explained below. The name of each field, the number of bits for each field, or an example of each field can be modified.

[0335] Num_chbon: This field indicates the number of channels used in channel bonding. By using this field, the receiver can receive the total frequency bandwidth of the channels used. The channel may have 6 MHz, 7 MHz, 8 MHz, or other values ​​of bandwidth.

[0336] Num_dslice: To pole wskazuje liczbę segmentów danych występujących w połączonym kanale. Po dekodowaniu bloku sygnałowego L1, odbiornik uzyskuje dostęp do pętli, w której zawarta jest informacja o segmentach danych, w celu uzyskania informacji o segmencie danych. Przez zastosowanie tego pola, odbiornik może otrzymywać wielkość pętli w celu dekodowania.

[0337] Num_notch: This field indicates the number of indentation bands occurring in the combined channel. After decoding the L1 signaling block, the receiver accesses the loop in which the indention band information is included to obtain information about the indentation band. By using this field, the receiver can receive the size of the loop for decoding.

[0338] For each data slice, dslice_id, dslice_start, dslice_width, dslice_ti_depth, dslice_type, dslice_pwr_allocation, and PLP information may be transmitted in the frame header preamble. The data slice can be considered as a specific bandwidth that contains one or more PLPs. Services can be broadcast in PLPs. The receiver needs to gain access to a data segment that contains a specific PLP to decode services.

[0339] Dslice_id: This field can be used to identify a data slice. Each data segment in the connected channel can have a unique value. When the receiver accesses one of the PLPs to decode services, this field may be used for the receiver to distinguish the data slice in which the PLP is located from the other data segments.

[0340] Dslice_start: This field indicates the initial location of the data slice in the connected channel. By using this field, the receiver can receive the frequency at which the data segment starts. In addition, tuning to access the data segment can be performed by applying this field.

[0341] Dslice_width: This field indicates the bandwidth of the data slice. By using this field, the receiver can receive the size of the data slice. Especially, this field can be used in time deinterleaving to enable decoding. Together with the dslice_start field, the receiver can determine which frequency to decode from the received RF signals. This process can be performed in the tuner r700 shown in Fig. 91. Information such as dslice_start and dslice_width can be used as a tuner control signal (r700).

[0342] Dslice_ti_depth: This field indicates the depth of the interleaver after the time used on the time interleaved data segments. Together with the dslice_width field, the receiver can receive the width and depth of time deinterleaving and can perform time deinterleaving. In Fig. 99

An example of the dslice_ti_depth field is illustrated. In this example, 1, 4, 8, or 16 OFDM symbols are used in the time interleaving process. This process is carried out in the time deinterleaver r710 shown in Fig. 91. Dslice_width and dslice_ti_depth can be used as a control signal.

[0343] Dslice_type: This field indicates the type of the data slice. Data slice type 1 contains a single PLP and this PLP uses CCM (fixed coding and modulation). Type 2 data segment represents all other types of data segments. By using this field, the receiver can perform decoding according to the PLP. PLP type 1 does not have a FECFRAME header, so the receiver does not look for the FECFRAME header. For type 2, the receiver looks for a PLP FECFRAME header to obtain MODCOD information. Fig. 100 is an example of dslice_type. By using this field, the data slice parser r711 shown in Fig. 91 can control the FEC header decoder r712-c, k.

[0344] Dslice_pwr_allocation: This field indicates the power of the data slice. Each data segment can have different power from other data segments. This is due to the adaptation of the connection to the cable network. The receiver may use this field to control the power of the received data segment. The r700 tuner shown in Fig. 91 can adjust the signal gain by applying this field.

[0345] Num_plp: This field indicates the number of PLPs in the data slice. After decoding the L1 signaling block, the receiver obtains access to a loop that includes PLP information. By using this field, the receiver can receive loop size and decode PLPs.

[0346] For each PLP, plp_id, plp_type, PSI / SI reprocessing, plp_payload_type, plp_modcod, and plp_start_addr can be transmitted in the frame header (preamble). Each PLP may transmit one or more streams or packets, such as TS and GSE. The receiver may receive services by decoding PLPs in which services are broadcast.

[0347] Plp_id: This field is the identifier of the PLP and has a unique value for each PLP in the combined channel. By using this field, the receiver can access the PLP in which the service from the decoding is located. This field can be used for the same purpose with the plp_id broadcast in the FECFRAME header. The FEC header decoder r712-c, k in Fig. 91, can access the necessary PLP by using this field.

[0348] Plp_type: This field indicates whether the type of PLP is PLP common or PLP data. By using this field, the receiver can find common PLPs and can receive the information required to decode the TS packet from shared PLPs. Then, the receiver may decode the TS packet within the data PLP. Fig. 101 is an example of plp_type field. [0349] PSI / SI reprocessing: This field indicates whether PSI / SI reprocessing of the received signal was performed or not. By using this field, the receiver can determine whether to invoke the PSI / SI specific service from the broadcasted service. If the receiver can not rely on the PSI / SI specific service from the broadcast service, the PSI / SI to which the specific service may refer may e.g. be transmitted through shared PLPs.

[0350] Plp_payload_type: This field indicates the payload type of data that is transmitted by the PLP. The receiver can use this field before decoding data inside PLPs. If the receiver can not decode a specific data type, it is possible to prevent the decoding of the PLP that contains this specific data type. Fig. 102 is an example of the Plp_payload_type field. If

The data slice has a single PLP and the CCM is applied to the data slice i.e. to the type 1 data slice, additionally, fields such as plp_modcod and plp_start_addr can be transmitted.

[0351] Plp_mode: This field indicates the type of modulation and code rate FEC used on the PLP. By using this field, the receiver can perform QAM demodulation and FEC decoding. Fig. 103 is an example of a Plp_modcod field. The values ​​shown in this figure can be used in modcod, which is transmitted in the header of the FECFRAME frame. The symbol demapping element r713-c, k FEC BCH / LDPC decoding module r715-c, k shown in Fig. 91 can use this field for decoding.

[0352] Plp_start_addr: This field indicates where the first FECFRAME frame of the PLP appears in the transmission frame. By using this field, the receiver can receive the initial location of the FECFRAME frame and perform FEC decoding. By using this field, the data slice parser r711 shown in Fig. 91 can synchronize FECFRAME frames for type 1 of PL PLs. For each indentation band, information such as notch_start and notch_width can be transmitted in the frame header (preamble).

[0353] Notch_start: This field indicates the initial location of the indentation band. Notch_width: This field indicates the width of the indentation bandwidth. Using the notch_start and notch_width fields, the receiver can receive the location and size of the indentation band in the connected channel. In addition, you can receive a tuning location for correct decoding of the service and you can check the existence of the service in a certain bandwidth. The r700 tuner shown in Fig. 91 can perform tuning due to the use of this information.

[0354] GI: This field indicates inter-channeling information used in the system. The receiver may receive information on the inter-channel band by using this field. The time / frequency synchronizing element r702 and the gus removal element r704 depicted in FIG. 91 may use this field. Fig. 104 is an example.

[0355] Num_data_symbols: This field indicates the number of OFDM data symbols, with the exception of the preamble used in the frame. The length of the transmission frame can be defined by this field. By using this field, the receiver can predict the location of the next preamble, and thus, this field can be used to decode L1 signaling. The r708 frame parser shown in Fig. 91 can use this field and predict OFDM symbols that constitute the preamble and send a signal to the preamble decoding path.

[0356] Num_c2_frames: This field indicates the number of frames present in the super frame. By using this field, the receiver can receive a super frame boundary and can provide information repeated by each super frame.

[0357] Frame_idx: This field is a frame index and is reset for each super frame. By using this field, the receiver can receive the current frame number and find the location of the current frame inside the super frame. By using this field, the frame parser r708 shown in Fig. 91 can determine how many frames are at the front of the current frame in the super frame. Together with the num_c2_frames field, it is possible to predict the change taking place in the L1 signaling block and to control the L1 decoding.

[0358] PAPR: This field indicates whether a tone reservation is used to reduce PAPR or not. By using this field, the receiver can process accordingly. Fig. 105 is an example. For example, if a tone reservation is used, the receiver may exclude carriers used

In the reservation of tone, from decoding. In particular, the data slice parser r711 shown in Fig. 91 can use this field to exclude carriers from decoding.

[0359] Reserved: This field indicates additional bits reserved for future use.

[0360] Fig. 106 is another example of L1 signaling transmitted in a frame header. In Fig. 106, the additional information added to Fig. 98 may increase the efficiency of the receiver decoding service. The following fields only explain this additional information. The remaining fields are the same as in Fig. 98.

[0361] Network_id: This field indicates the network to which the transmitted signal belongs. By using this field, the receiver can find the current network. When the receiver tune to another network to find a service on the network, the receiver can process faster because the only use of L1 decoding is enough to make the decision whether the tuned network is the desired network or not.

[0362] C2_system_id: This field identifies the system to which the transmitted signal belongs. By using this field, the receiver can find the current system. When the receiver tunes to another system to find a service in the system, the receiver can process faster because the only use of L1 decoding is enough to decide whether the tuned system is the desired system or not.

[0363] C2_signal_start_frequency: This field indicates the initial frequency of the connected channels. C2_signal_stop_frequency: This field indicates the final frequency of the connected channels. By using the c2_signal_start_frequency and c2_signal_stop_frequency fields, the RF bandwidths of all data slices can be found by decoding the L1 of a certain bandwidth within the connected channels. In addition, this field can be used to obtain the frequency shift amount required in L1_XFEC_FRAME frame synchronization. The connecting element L1 XFEC r1017-L1 shown in Fig. 91 can use this field. In addition, when the receiver receives data segments located at both ends of the connected channel, this field can be used to tune to the appropriate frequency.

[0364] Plp_type: This field indicates whether the PLP is a common PLP, a PLP of normal data, or a PLP of aggregated data. By using this field, the receiver can identify the common PLP and can receive the information required to decode the TS packet with the common PLP, and then can decode the TS packet within the PLP of the grouped data. Here, a common PLP may be a PLP that contains data common to many PLPs. Fig. 107 is an example of this field. The PLP of normal data means a PLP of data that does not have a common PLP. In this case, the receiver does not need to find a common PLP. A shared PLP or PLP grouped can broadcast information such as plp_group_id. For other types of PLP, more efficient broadcasting is possible because no additional information must be broadcast. [0365] Plp_group_id: This field indicates the group to which the current PLP belongs. The PLP of the aggregated data may transmit common TS parameters using a common PLP. By using this field, if the PLP being decoded is PLP grouped, the receiver can find the necessary common PLP, obtain the parameters required for the TS PLP packet grouped, and create a complete TS packet.

[0366] Reserved_1 / reserved_2 / reserved_3: These fields are additional bits reserved for

In the future, it will be used in the future for the data slice loops, the PLP loop, and the transmission frame, respectively.

[0367] Fig. 108 is another example of L1 signaling transmitted in a frame header. Compared to Fig. 106, more optimized information may be transmitted, and thus, a smaller signaling overhead may occur. Accordingly, the receiver can efficiently decode services. Specifically, the modules on the L1 signal path shown in Fig. 91 may perform L1 signaling decoding, and the modules on the PLP path shown in Fig. 91 may use parameters, and thus, services may be decoded. The receiver may receive the parameters of the L1 signaling block from L1 path signals that are decoded according to the order of each field and field length. The name of each field, the number of bits for each field, or an example of each field can be modified. Field descriptions except the dslice_width field are identical to the field descriptions mentioned above. The dslice_width field function according to the example is as follows.

[0368] Dslice_width: This field indicates the bandwidth of the data slice. By using this field, the receiver can receive the size of the data slice. Specifically, this field can be used in a time deinterleaving process to enable decoding. Together with the dslice_start field, the receiver can determine which frequency to decode from the received RF signals. This process can be performed in the r700 tuner shown in Fig. 91. Information such as dslice_start and dslice_width can be used as a tuner control signal r700. At this point, the width of the data slice can be increased up to 64 MHz by using 12 bits for this dslice_width field. By using this field, the receiver can determine whether the currently available tuner can decode the current data segment. If the width of the data slice is greater than the frequency bandwidth of the existing receiver tuner, in order to decode such a data slice, the receiver may use either at least two existing tuners or a tuner with a sufficiently large bandwidth. In this example, the granularity of the values ​​used in the dslice_start, dslice_width, notch_start, and notch_width fields can be 12 OFDM carriers (cells). In other words, the receiver can find the location of the actual OFDM cell by multiplying the transmitted values ​​by 12. In this example, for the granularity of the Plp_start_addr field, one OFDM carrier (cell) can be used. In other words, the receiver can determine how many OFDM symbols and OFDM cells are in front of the initial PLP location in the OFDM symbol. The dslice_start and dslice_width fields can be used for this purpose. Data slice parser r711 shown in Fig. 91 can perform such a process.

[0369] Fig. 109 is an example of processing in FEC header 705-L1 on L1 path shown in Fig. 90. A total of 16 bits may be transmitted in the FEC header of L1. Fourteen bits can be allocated for the L1_info_size field. If the L1_info_size field has a value that is half the length of the actually transmitted L1 block, the receiver can multiply the obtained L1_info_size field for two and obtain the actual L1 block length and start L1 decoding. This obtained L1 block length is a length that includes filling the data block.

[0370] For block L1, which, as specified, does not have an error, despite the CRC check, the receiver may take into account the rest of the bits after L1 decoding as padding. The last two bits, like in the previous methods, can be used to indicate interleaving depth after preamble time. Preamble mapper 1007-L1 shown in Fig. 90 may determine the required OFDM symbols for transmitting L1 blocks. Then, interleaver after time 100849

EP 2 222 007 B1

L1 shown in Fig. 90 can perform time interleaving. By using information about the time interleaving depth and the L1_info_size field, the receiver can determine what L1 block size is transmitted in as many OFDM symbols. The combining, merging, and time-deinterleaving of the L1 blocks can be performed at the L1 XFEC 12417-L1 linking element L1_FEC 12418-L1, respectively, and the time deinterleaver 12410-L1 shown in Fig. 91. [0371] In the receiver shown in Fig. 91, the length of the L1 XFEC block in the OFDM symbol can be obtained by dividing the total L1 block length by the number of OFDM symbols used in the preamble. The number of OFDM symbols can be derived from the values ​​defined in ti_depth. The L1 XFEC 12417-L1 connecting element of the receiver can receive an XFEC L1 block. Next, time-de-interleaving 12410-L1 can be performed using ti_depth. Finally, the XFEC L1 blocks can be combined to obtain the L1_FEC block. After merging using the L1_FEC 12418-L1 joining element, the r714-L1 bit deinterleaving, and the LDPC / BCH r715-L1 decoding, an L1 block can be obtained. L1_info_size field can be multiplied by two, L1 block can be checked CRC, and can decode L1. Excessive filling of the data block can be ignored. and can decode L1. Excessive filling of the data block can be ignored. and can decode L1. Excessive filling of the data block can be ignored.

[0372] Fig. 110 is another example of L1 signaling transmitted in a frame header. Compared to Fig. 108, the number of bits for some fields are modified and some fields are added to improve the receiver's decoding performance of the service. Specifically, the modules on the L1 signal path shown in Fig. 91 may perform L1 signaling decoding, and the modules on the PLP path shown in Fig. 91 may use parameters, and thus, services may be decoded. The receiver may receive the parameters of the L1 signaling block from L1 path signals that are decoded according to the order of each field and field length. The name of each field, the number of bits for each field, or an example of each field can be modified. Except modified fields from the previous figure, field descriptions are identical to the field descriptions mentioned above. RESERVED_1, RESERVED_2, RESERVED_3, and RESERVED_4 mean fields reserved for future use. In this example, the PLP_START field can indicate the same information as the above-mentioned plp_start_addr field.

[0373] L1_PART2_CHANGE_COUNTER wskazuje liczbę ramek od pierwszej ramki do ramki, która wykazuje zmianę w dowolnej informacji o bloku sygnałowym L1, wyłączając zmianę w polu PLP_START, od poprzednich ramek. Oznacza to, że to pole wskazuje liczbę ramek z przodu, gdzie będzie zmieniać się konfiguracja. Przez zastosowanie tego pola, odbiornik może pominąć dekodowanie L1 dla każdej ramki w celu uzyskania informacji o L1. Innymi słowy, poprzez zastosowanie wartości pola L1_PART2_CHAGNE_COUNTER, odbiornik może określać, która ramka wykazuje zmianę w informacji o L1 od poprzednich ramek, a zatem, żadne dekodowanie L1 nie jest przeprowadzane dla ramek przed wystąpieniem ramki wykazującej zmianą w L1, następnie dekodowanie L1 może być przeprowadzane dla ramki, która wykazuje zmianę w L1. A zatem, mogą zostać pominięte zbyteczne operacje. Przez zastosowanie tego pola, odbiornik może uniknąć zbytecznej operacji dekodowania L1. Ta wartość może być także obliczana przez odbiornik z zastosowaniem już zdekodowanej informacji o L1.

[0374] If the L1_PART2_CHANGE_COUNTER field is 0, it means that there has been no change in L1 for at least 256 (2^Λ8, 8 indicates the number of bits used for L1_PART2_CHANGE_COUNTER) frames. In this one of the best cases, the receiver must decode L1 only every 51 seconds. This process can be carried out in the frame parser r708 shown in Fig. 91. The frame parser can determine if the current preamble shows a change in L1 and can control subsequent processes on the path

L1 signaling. The receiver can calculate PLP_START for a specific frame from the already received PLP_START and PLP_MODCOD, without performing L1 decoding to obtain PLP_START. [0375] Fig. 111 shows examples of fields shown in Fig. 110. Blocks of a receiver can perform processes according to the values ​​indicated by the fields in the examples.

[0376] Fig. 112 is another example of L1 signaling transmitted in a frame header. Compared to Fig. 110, some fields are modified and some fields are added to improve the receiver's decoding service. Specifically, the modules on the L1 signal path shown in Fig. 91 may perform L1 signaling decoding, and the modules on the PLP path shown in Fig. 91 may use parameters, and thus, services may be decoded. The receiver may receive the parameters of the L1 signaling block from L1 path signals that are decoded according to the order of each field and field length. The name of each field, the number of bits for each field, or an example of each field can be modified. With the exception of the modified field from the previous figure, the field descriptions are identical to the field descriptions mentioned above.

[0377] The descriptions of the fields DSLICE_START, DSLICE_width, NOTCH_START, and NOTCH_width are identical to the previous descriptions. However, signaling overhead can be minimized by signaling fields with a minimum number of bits according to the GI mode. Accordingly, it can be said that signaling of DSLICE_START, DSLICE_width, NOTCH_ START, and NOTCH_width is based on GI mode. L1 information may be obtained from the L1 signal path of the receiver shown in Fig. 91. The system controller may determine the number of bits used for each field according to the received GI value and may read the fields accordingly. The G1 value must be transmitted before other values.

[0378] Instead of the DSLIC_START and DSLICE_width fields, 12 bits of the tuning position may be transmitted, which indicates an optimized location for receiving a data slice and 11 bits of the offset value from the tuning position to indicate the width of the data slice. Especially, by using 11 bits of offset values, data segments that occupy a maximum of 8 connected channels can be signaled and a receiver that can receive such data segments can function accordingly. The receiver tuner r700 shown in Fig. 91 may determine the RF frequency bandwidth using the tuning position and may receive the data slice width using the offset value to be used for the same purpose as the DSLICE_width field mentioned above.

[0379] DSLICE_CONST_FLAG means a field indicating whether the configuration of a specific data slice is kept constant. By applying this field obtained from L1 from a certain bandwidth, the receiver can determine if a specific data segment has a fixed configuration, and then the receiver can receive PLPs of a specific data slice without additional L1 decoding. This type of process may be useful for receiving a data slice that is located in the frequency bandwidth, where L1 decoding is not available. [0380] A DSLICE_NOTCH_FLAG is a field or a status marker to indicate the indentation band at both edges of a specific data slice. The most significant bit (Most Significant Bit, MSB) can be used as an indicator for the indenting band adjacent to a low bandwidth, and the Least Significant Bit (LSB) can be used as a pointer for the indenting band adjacent to a large bandwidth. By using this field, when the receiver decodes a specific data segment, the receiver can take into account the bandwidth

Indentation by identifying changes in active carriers caused by continuous pilot signals adjacent at both ends of the notch band. This information can also be obtained from the indentation information transmitted in the NOTCH_START and NOTCH_width fields. The time de-interleaver r710 of the receiver shown in Fig. 91 may use the information to find active carrier locations and send data only corresponding to the active carriers to the data slice parser.

[0381] For the PLP_TYPE field, one additional bit is added in Fig. 110. Fig. 113 is an example of the plp_type field shown in Fig. 112. A value may be transmitted indicating data related to PLP beams. A large TS stream with a high data rate can be multiplexed to multiple PLPs. The data PLPs associated in the beams may be used to indicate PLPs in which multiplexed streams are transmitted. For an existing receiver that is unable to decode a specific PLP, this field can prevent the receiver from accessing the PLP, and thus, it is possible to prevent malfunction. [0382] Still as an alternative method, if the dslice_width field mentioned above is used with the dslice_start field and the indentation information, the receiver can determine, which frequency from the received RF signals should be decoded. This process can be performed in the tuner (r700) shown in Fig. 91. Information such as dslice_start, dslice_width, notch_start, and notch_width can be used as tuner control signal r700. Thus, by avoiding the indentation, it becomes possible to obtain a data slice and, at the same time, perform tuning to an RF band in which there are no problems with L1 decoding.

[0383] Considering the L1 signal block shown in Fig. 112, Fig. 114 is a relationship between L1 signaling and L2 signaling when the PLP is of the associated type. In addition, Fig. 114 also illustrates the operation that can be performed by the receiver in such a case. TS 1 can be mapped to PLP37 via c2dsd L2. This TS1 corresponds to a normal PLP L1, thus, the PLP can be decoded by a normal receiver (a single 8 MHz tuner) and an improved receiver (multiple tuner or broadband tuner (> 8 MHz)). TS2 and TS3 are mapped to PLP39 and PLP44 respectively, via c2dsd. They correspond to the associated PLP L1, and thus these PLPs can be decoded by an improved receiver (multiple tuner or broadband tuner (> 8 MHz)), but not by a normal receiver (a single 8 MHz tuner).

[0384] Fig. 115 and Fig. 116 are flow charts describing L1 decoding and L2 decoding operations for a PLP type burst and PLP type normal type in a normal receiver and an improved receiver, respectively. Fig. 117 is an example of a construction c2_delivery_ystem_descriptor and syntax for L2 signaling, simultaneously taking into account Fig. 112. This descriptor can map TS_id to plp_id, as illustrated in Fig. 114. The beam information can be processed at L1 and thus not it must be signaled in L2. The variables shown in Fig. 117 are described in the following way.

[0385] Plp id: This 8-bit field uniquely identifies the data PLP in the C2 system.

[0386] C2_system_id: This 16-bit field uniquely identifies the C2 system. The remaining part of this descriptor, immediately following the C2_system_id field, occurs only once on the C2 system, because the parameters are unambiguously applicable to all data segments carried on

EP 2 222 007 to a particular C2 system. The presence or absence of this part can be derived from the descriptor length field. In the absence of the remaining part, this length is equal to 0x07, otherwise its higher values ​​are assigned.

[0387] C2_System_tuning_frequency: This 32-bit field indicates the frequency value. The coding range can range from a minimum of 1 Hz (0x00000001) to a maximum of 4, 294, 967, 295 Hz (0xFFFFFFFF). This data field may provide a tuning frequency where a complete preamble is transmitted within the tuning window. Generally, the C2_System_tuning_frequency field indicates the center frequency of the C2_System field, but it may deviate from the center frequency in the case of notches located in this area.

[0388] Active_OFDM_symbol_duration: This 3-bit field indicates the duration of the active OFDM symbol. An example of this field is shown in Fig. 118.

[0389] Guard_interval: This 3-bit field indicates the inter-channel interval. An example of this field is shown in Fig. 119.

[0390] In the previous examples of L1 interleaving / deinterlinging in time, in cases where TI_DEPTH is "10" or "11", the pre-restorer mapper 1007-L1 shown in Fig. 90 can evenly divide the original L1 block into four or eight subblocks. However, if the size of the subblock is less than the minimum size required to carry out the FEC coding, then the FEC coding may not be properly performed. A possible solution can be setting the limit value. If the L1 block size is less than the set limit value, the L1 block can be repeated four or eight times in cases where TI_DEPTH is "10" or "11". If the L1 block size is greater than the set limit value then the L1 block can be evenly divided into four or eight subblocks.

[0391] In addition, setting TI_DEPTH as "10" or "11" occurs in cases where the time interleaving effect is not obtained due to the small size of the L1 block. Thus, the limit value can be defined as the size of information bits that can be transmitted by a single preamble symbol. For example, if it is assumed that FEC L1 encoding is to be identical to DVB-T2, then the limit will be 4.772 bits.

[0392] In cases where TI_DEPTH is "10" or "11", using L1 size information, TI depth, and boundary value shared between the transmitter and receiver, receiver modules, from the FEC header decoder r1012-L1 to L1_FEC_Merger r1018-L1 illustrated in Fig. 91 may determine L1 subblock size, combining, and merging L1 subblocks that are transmitted in the preamble OFDM symbol.

[0393] If the magnitude L1 is less than the limit value, L1_FEC_Merger r1018-L1 shown in Fig. 91 does not need to combine divided subblocks, because the original block L1 is transmitted many times according to TI_DEPTH in four or eight OFDM symbols. However, if the magnitude L1 is larger than the limit because the number of symbols is used, which is greater than the number of OFDM symbols required for transmitting L1 block, the FEC header decoder r1012-L1 shown in Fig. 91 can receive a subblock size using TI_DEPTH. Then, the L1_FEC combiner r1017-L1 can connect the FEC L1 blocks, and the time deinterleaver r1010-L1 can perform deinterleaving. Finally, the connecting element L1_FEC r1018-L1 can connect the L1_FEC blocks to restore the original L1 block.

[0394] Fig. 120 is another example of L1 signaling that is transmitted in the frame header. Compared to Fig. 112, some fields have been modified, and some fields have been added to improve the receiver's decoding performance of the service. Specifically, the modules on the L1 signal path shown in Fig. 91 can perform L1 signaling decoding, and the modules on the PLP path shown in Fig. 91 can use parameters, and thus services can be decoded. The receiver may obtain L1 signaling parameters from L1 path signals that are decoded according to the order of each field and field length. The name of each field, the number of bits for each field, or an example of each field can be modified. Except modified fields from the previous figure,

[0395] DSLICE_TUNE_POS indicates a tuning position for the receiver to obtain a data slice. Depending on the GI mode, this value can be expressed in 12 or 11 bits. DSLICE_OFFSET_RIGHT and DSLICE_OFFSET_LEFT, which indicate the amount of the shift from the tuning position or the width of the data segment, can be expressed in 9 or 8 bits, depending on the GI mode. In the case where the offset can have a determined value, i.e., a positive or negative value, the position and width of the data segment having a narrow bandwidth can also be expressed. The receiver tuner r700 illustrated in Fig. 91 can determine the RF band using the tuning position, and then using this determined offset amount, the data slice width can be obtained. Thus, this field can be used for the same purpose as the DSLICE_WIDTH field mentioned above.

[0396] DSLICE_NOTCH_FLAG is a flag indicating that a certain data segment is adjacent to the indentation band. It can be used for the same purpose as the examples mentioned above, but in this case only 1 bit is applied to this field for each data slice. Using this 1-bit information, the receiver can perform the same functions as the above-mentioned examples.

[0397] PLP_BUNDLED_FLAG indicates that PLP is PLP data associated with PLP. This means that PLP_BUNDLED_FLAG indicates whether the PLP is bundled with another PLP within the broadcast system or not. This field can be used for the same purpose as the PLP PLP_TYPE plots referred to above plotted in Fig. 112. PLP_TYPE field is illustrated in Fig. 110.

[0398] Fig. 121 is showing a further two examples of time interleaving that can be applied to the L1 path shown in Fig. 90. As seen in the ON (1) time interleaving process, interleaving can be just block interleaving. Compared to the method shown in Fig. 83, the frequency interleaving performance may not be as good as in the method shown in Fig. 83. However, in cases where TI_DEPTH is "10" or "11", without repeating or dividing blocks L1 according to the limit, the L1 blocks can be expanded in the direction of time regardless of the size of the L1 block, and can then be repeated in the preamble if there is room in the preamble, and thus, this method may be advantageous for simplifying control. The interleaving can be performed by writing the input symbol streams in the time direction and reading the stored symbol streams in the frequency direction. The time deinterleaver r1010-L1 on the L1 path of the receiver of Fig. 91 can perform deinterleaving by recording the input symbol streams in the frequency direction and reading the saved symbol streams in the time direction.

[0399] A second example or time interleaving process ON (2) shown in Fig. 121 includes an additional process for time interleaving ON (1), which is cyclic shifting in a row direction. Using this process, in addition to the advantages of ON (1) time interleaving, an expansion effect in the frequency domain can be obtained. The time deinterleaver r1010L1 on the L1 path of the receiver of Fig. 91 must cyclically re-move in the row direction before performing the ON (1) time interleaving process.

[0400] Fig. 122 is another example of an OFDM transmitter using a data slice. It differs from that shown in Fig. 90 by blocks on the L1 path. Fig. 124 and Fig. 126 are included in order to describe in detail various blocks. The L1 700-L1 signaling module can perform functions identical to the functions of the same block as shown in Fig. 90. The FEC LDPC / BCH 1902-L1 encoder can perform a division into sets and L1 encoding as shown in Fig. 124. Using L1 information bits, which may be transmitted by a single OFDM preamble symbol as a reference, if necessary, L1 may be divided into sets and divided into L1 sets may be FEC coded.

[0401] The time interleaver 1908-L1 can interleave the preamble symbols using the interleaving depth after the L1 time as shown in Fig. 124. Depending on the interleaving depth over time, time interleaving can be performed as in Fig. 126. In the absence of time interleaving (L1_TI_MODE = "00"), interleaving is not performed. In the case where the time interleaving depth is minimally the number of OFDM symbols required to transmit L1 data (L1_TI_MODE = "01"), time interleaving is performed according to the number of OFDM symbols. In contrast, when the time interleaving depth is greater than the minimum number of OFDM symbols required to transmit L1 data (L1_TI_MODE = "10" and depth = 4 OFDM symbols), the time interleaving block may be of such magnitude that it may include as many rows as the amount of interleaving depth over time and such a large number of columns as the quotient resulting from dividing the number of QAM symbols required to transmit L1 data by the interleaving depth over time. Time interleaving can be performed in the row-column matrix memory having the size of the time interleaving block. L1 Header inserter 1905-L1 can insert L1 header into L1 block, which is time-interleaved for each OFDM symbol within the preamble, as shown in Fig. 124. Preamble mapper 1907-L1 can map L1 header and L1 block to a predetermined one. OFDM symbols in the preamble. For each OFDM symbol, L1 repeating module 1915-L1 can repeat the L1 header and the L1 block to fill the preamble frequency bandwidth. Finally, the frequency interleaver 709-L1 can perform functions identical to the functions of the same block shown in Fig. 90.

[0402] Fig. 123 is another example of an OFDM receiver using a data slice. It differs from the one shown in Fig. 91 on the path. Fig. 125 and Fig. 127 are included here for a detailed description of the various blocks. The frequency deinterleaver r709-L1 can perform functions identical to the functions of the same block as shown in Fig. 91. Linking element L1 r1917-L1 can synchronize L1 blocks as shown in Fig. 125. In addition, SNR gain can be obtained by combining the L1 header and the L1 block repeated in the preamble frequency bandwidth. The L1 header decoder r1912-L1 can obtain additional SNR gain by combining the L1 headers that are repeatedly transmitted in the timing direction, referring to the interleaving depth after the L1 time. Additionally, time L1 interleaving parameters and L1 data size can be obtained from FEC decoding of the L1 header. The time deinterleaver r1910-L1 can perform the processes as shown in Fig. 125 and in Fig. 127, which are processes opposite to the processes carried out in the transmitter, as shown in Fig. 124 and Fig. 126.

[0403] The symbol demapper r713-L1 can calculate the LLR bit from the input symbols and the LLR output bit. Using data length L1 and L1 interleaving depth transmitted in L1 header and taking into account the L1 block number which contains the L1 data divided into sets and the number of OFDM symbols in which the L1 blocks are scattered, the L1 r1918-L1 linking element can restore the blocks L1 required to perform FEC decoding. The bits deinterleaver r714-L1 and the FEC BCH / LDPC decoder r715-L1 can perform functions identical to the functions of the same blocks as illustrated in Fig. 91.

[0404] Using the proposed methods and devices, among other advantages, it is possible to implement an efficient digital transmitter, receiver and structure of physical layer signaling.

[0405] By transmitting ModCod information in each BB frame header that is necessary for ACM / VCM and transmitting the rest of the physical layer signaling in the frame header, signaling overhead can be minimized.

[0406] Modified QAM may be implemented for a more energy efficient transmission or a more noise-robust digital broadcasting system. The system may include a transmitter and a receiver for each example disclosed and combinations thereof.

[0407] An improved, non-uniform, modified QAM for a more energy efficient transmission or a more noise-robust digital broadcasting system can be implemented. Also described is the method of applying the error correction code with high code rate in NU-MQAM and MQAM. The system may include a transmitter and a receiver for each example disclosed and combinations thereof.

[0408] The proposed L1 signaling method can reduce overhead by 3-4% by minimizing signaling overhead during channel bonding.

[0409] It will be apparent to those skilled in the art that the present invention may be subjected to various modifications and variations, without departing from the scope of the invention.

EP 2 222 007 B1