Process and device for speech scrambling and unscrambling in speech transmission
Abstract
PCT No. PCT/EP94/03693 Sec. 371 Date May 14, 1996 Sec. 102(e) Date May 14, 1996 PCT Filed Nov. 9, 1994 PCT Pub. No. WO95/15627 PCT Pub. Date Jun. 8, 1995A digitized real voice signal is converted via complex filtering into a complex signal that is subjected to sampling rate reduction, the bandwidth of the respective complex filter corresponding to the sampling rate. The complex signal is phase-modulated by means of a code signal generated by a random-number generator and additively combined with a pilot signal (likewise phase-modulated in a random distribution) to form an encrypted useful signal for transmission. The useful signal is sequentially transmitted together with a preamble for synchronization and signal equalization at the receiver end. At the receiver end, clock synchronization is forced for a phase-modulated pilot signal produced at the receiver end and equalizer coefficients for an equalizer at the receiver end are calculated from the digitized received signal after complex filtering and corresponding sampling rate reduction, during a preamble recognition phase, at which point the phase of the useful signal decryption is initialized. The encrypted, transmitted signal is separated from its phase-modulated pilot signal, which is superimposed at the transmitter end, by linking to the synchronized pilot signal, which is produced at the receiver end, and the phase-modulated, encrypted digital speech signal thus obtained is subsequently decomposed by the code signal produced at the receiving end and clockcontrolled by the preamble.

Term
Term ended
Expired 9 November 2014, 11.9 years ago.
- Priority
- Filed
- Granted
- Expired
- Today
23 claims: 3 independent, 20 dependent
- 1Zastrzeżenia patentowe 1. Sposób szyfrowania i deszyfrowania sygnału mowy, w którym po stronie nadawczej przekształca się analogowy sygnał mowy na postać cyfrową i przesyła się w kanale transmisyjnym równocześnie z sygnałem pilotującym, zaś po stronie odbiorczej sygnały te odbiera się, deszyfrowuje i przekształca na powrót na analogowy sygnał mowy, znamienny tym, że po stronie nadawczej przekształcony na postać cyfrową sygnał mowy przetwarza się na pierwszy sygnał zespolony za pomocąpierwszego zespolonego filtru wejściowego, którego szerokość pasma odpowiada szerokości pasma kanału transmisyjnego, moduluje się fazowo pierwszy sygnał zespolony i sygnał pilotujący za pomocąpierwszego i drugiego sygnałów kodujących, sterowanych liczbami losowymi i następnie zmodulowane fazowo sygnały łączy się addytywnie do postaci zaszyfrowanego sygnału użytecznego, po czym sygnał użyteczny przesyła się sekwencyjnie przez pierwszy zespolony filtr wyjściowy wraz z preambułą, do synchronizacji i korekcji sygnału użytecznego po stronie odbiorczej, jako drugi sygnał zespolony będący rzeczywistym sygnałem wyjściowym, który po przekształceniu na postać analogową przesyła się do układu dopasowującego sygnał nadawany, zaś po stronie odbiorczej sygnał odebrany, po przekształceniu na postać cyfrową, przetwarza się na trzeci sygnał zespolony za pomocą drugiego zespolonego filtru wejściowego, którego szerokość pasma odpowiada szerokości pasma kanału transmisyjnego, następnie na podstawie tego trzeciego sygnału zespolonego i w czasie trwania fazy rozpoznania preambuły dokonuje się synchronizacji zegara dla sygnału pilotującego wytwarzanego i podlegającego modulacji fazowej po stronie odbiorczej, w sekwencji losowej inicjalizowanej przez preambułę, oraz oblicza się współczynniki korekcyjne dla filtru korekcyjnego po stronie odbiorczej i następnie inicjalizuje się fazę deszyfrowania sygnału użytecznego, w -której oddziela się zaszyfrowany sygnał użyteczny od nałożonego po stronie nadawczej zmodulowanego fazowo sygnału pilotującego poprzez łączenie z synchronizowanym modulowanym fazowo sygnałem pilotującym wytwarzanym po stronie odbiorczej, uzyskiwany zmodulowany fazowo, zaszyfrowany cyfrowy sygnał mowy deszyfruje się przy pomocy sygnału kodowego, który powstaje po stronie odbiorczej i jest sterowany impulsami zegarowymi na podstawie preambuły, oraz przesyła się przez drugi zespolony filtr wyjściowy jako czwarty sygnał zespolony będący rzeczywistym sygnałem wyjściowym, który po przekształceniu na postać analogową przesyła się do układu dopasowującego sygnał odbierany.
- 2Sposób według zastrz. 1, znamienny tym, że jako zespolone filtry wejściowe i wyjściowe stosuje się filtry Hilberta wyższego rzędu.
- 3Sposób według zastrz. 1 albo 2, znamienny tym, że po stronach nadawczej i odbiorczej częstotliwość próbkowania zmniejsza się po zespolonych filtrach wejściowych, zaś częstotliwość próbkowania zwiększa się przed zespolonymi filtrami wyjściowymi.
- 4Sposób według zastrz. 3, znamienny tym, że zmniejszenie częstotliwości próbkowania przeprowadza się ze współczynnikiem całkowitoliczbowym, zwłaszcza ze współczynnikiem 1:3, zaś zwiększenie częstotliwości próbkowania przeprowadza się również zgodnie ze współczynnikiem całkowitoliczbowym, zwłaszcza ze współczynnikiem 3:1, przy czym j ako zespolone filtry wejściowe i wyjściowe stosuje się filtry rekursywne wyższego rzędu.
- 5Sposób według zastrz. 1, znamienny tym, że preambułę nadaje się okresowo w ustalonej ramce czasowej, przy czym na czas trwania preambuły wygasza się zaszyfrowany sygnał mowy.
- 6Sposób według zastrz. 5, znamienny tym, że czas trwania ramki czasowej ustala się na kilka sekund, zwłaszcza od 3 do 10 sekund, zaś czas trwania preambuły ustala sięjako wielokrotność 10 milisekund, zwłaszcza około 200 milisekund. 174 895
- 7Sposób według zastrz. 6, znamienny tym, że podczas odbioru preambuły bada się po stronie odbiorczej właściwości kanału transmisyjnego, po czym na tej podstawie określa się współczynniki dla filtru korekcyjnego po stronie odbiorczej.
- 8Sposób według zastrz. 7, znamienny tym, że wykrywa się po stronie odbiorczej koniec każdej nadanej preambuły i ponownej synchronizacji, po czym prowadzi się, z wykorzystaniem uzyskanego sygnału, proces deszyfrowania sygnału użytecznego.
- 9Sposób według zastrz. 1, znamienny tym, że sterowaną liczbami losowymi modulację fazowącyfrowego sygnału mowy oraz sygnału pilotującego przeprowadza się z wykorzystaniem różnych generatorów liczb losowych.
- 10Sposób według zastrz. 1, znamienny tym, że punkt startowy generatora liczb losowych względnie generatorów po stronie odbiorczej dobiera się jako zmienny w obrębie preambuły.
- 11Urządzenie do szyfrowania i deszyfrowania sygnału mowy zbudowane z jednostki czołowej do przekształcania na postać cyfrową sygnału mowy i dopasowania nadawanego sygnału do kanału transmisyjnego zjednej strony i/lub przekształcania na postać cyfrową odebranego sygnału i dopasowania odbieranego sygnału skorygowanego do urządzenia odtwarzającego mowę z drugiej strony, znamienne tym, że po stronie nadawczej zawiera generator sygnału kodowego /23/ z generatorem liczb losowych /34/, którego wyjście jest dołączone do wejścia pierwszego modulatora fazy /33/ i do którego drugiego wejścia jest dołączone wyjście jednostki czołowej /22/, oraz generator sygnału pilotującego /20/, którego wyjście jest dołączone do wejścia drugiego modulatora fazy /32/, przy czym sygnały z wyjść pierwszego modulatora fazy /33/ i drugiego modulatora fazy /32/ sąłączone addytywnie w sumatorze, którego wyjściejest dołączone do pierwszego wejścia przełącznika /25/, generator preambuły /24/ jest dołączony do drugiego wejścia przełącznika /25/ a wyjście przełącznika /25/ jest dołączone do wejścia jednostki czołowej /22/, zaś po stronie odbiorczej zawiera dołączony do wyjścia jednostki czołowej /52/ filtr korekcyjny /51/, do którego z kolei jest przyłączony układ /44/ rozpoznawania preambuły, oraz zawiera następnie układ synchronizacji zegara /55/ z generatorem tonu pilotującego /50/ dołączony do wyjścia filtru korekcyjnego /51/, przy czym jedno wyjście generatora tonu pilotującego /50/jest połączone z wyjściem filtru korekcyjnego /51/ w układzie mnożącym /63/, który dostarcza sygnał korekcji zegara, zaś drugie wyjście generatora tonu pilotującego /50/ i wyjście kolejnego generatora liczb losowych /54/ są dołączone do wejść następnego modulatora fazy /57/, przy czym sygnał z wyjścia tego modulatora fazy /57/jest łączony subtraktywnie z sygnałem z wyjścia filtru korekcyjnego /51/ w kolejnym sumatorze, którego wyjście jest dołączone poprzez demodulator fazy /59/ do wejścia jednostki czołowej /52/.
- 12Urządzenie według zastrz. 11, znamienne tym, że po stronie nadawczej zawiera pierwszy układ /31/ zmniejszania częstotliwość próbkowania, któryjest dołączony do wyjściajednostki czołowej /22/ poprzez pierwszy zespolony filtr wejściowy /30/.
- 13Urządzenie według zastrz. 11, znamienne tym, że po stronie nadawczej zawiera pierwszy układ /36/ zwiększania częstotliwości próbkowania, któryjest dołączony do wejściajednostki czołowej /22/ poprzez pierwszy zespolony filtr wyjściowy /35/.
- 14Urządzenie według zastrz. 11, znamienne tym, że po stronie odbiorczej zawiera drugi układ /43/ zmniejszania częstotliwości próbkowania, któryjest dołączony do wyjścia jednostki czołowej /52/ poprzez drugi zespolony filtr wejściowy /40/.
- 15Urządzenie według zastrz. 11, znamienne tym, że po stronie odbiorczej zawiera drugi układ /61/ zwiększania częstotliwości próbkowania, który jest dołączony do wejścia jednostki czołowej /52/ poprzez drugi zespolony filtr wyjściowy /62/.
- 16Urządzenie według zastrz. 12 i 13, znamienne tym, że współczynnik zmniejszania częstotliwości próbkowania pierwszego układu /31/ zmniejszania częstotliwości próbkowania oraz współczynnik zwiększania częstotliwości pierwszego układu /36/ zwiększania częstotliwości próbkowania sądobrane i równe co do wartości, przy czym wartość tajest lićzbącałkowitą.
- 17Urządzenie według zastrz. 16, znamienne tym, że współczynniki zmniejszania i zwiększania częstotliwości próbkowania mają wartość równą “3. 174 895
- 18Urządzenie według zastrz. 14 i 15, znamienne tym, że współczynnik zmniejszania częstotliwości próbkowania drugiego układu /43/ zmniejszania częstotliwości próbkowania oraz współczynnik zwiększania częstotliwości drugiego układu /61/ zwiększania częstotliwości próbkowania są dobrane i równe co do wartości, przy czym wartość ta jest liczbą całkowitą.
- 19Urządzenie według zastrz. 18, znamienne tym, że współczynniki zmniejszania i zwiększania częstotliwości próbkowania mają wartość równą “3.
- 20Urządzenie według zastrz. 11, znamienne tym, że generator liczb losowych /34/ po stronie nadawczej i generator liczb losowych /54/ po stronie odbiorczej stanowią obwody dostarczania wartości losowych /r(n)/ zgodnie z metodą kongruencji liniowej, według wzoru r(n) = (a · r(n-1) + c) mod m, gdzie n = 1,2,..., są liczbami całkowitymi, a i c oznaczają stałe całkowite oraz m oznacza liczbę dobieraną.
- 21Urządzenie według zastrz. 19, znamienne tym, że wartości stałych całkowitych wynoszą dla a - 1664525 i c = 32767, zaś dla m wartość jest równa 2 32 .
- 22Urządzenie według zastrz. 11, znamienne tym, że do wyjścia układu mnożącego /63/ jest dołączony układ uśredniania /56/.
- 23Urządzenie według zastrz. ' 12 albo 13, albo 14, albo 15, znamienne tym, że zespolony filtr /30,35,40,62/ jest filtrem Hilberta.
Independent claims23
239 paragraphs in 4 sections, as filed
The present invention relates to a method and apparatus for encrypting and decrypting a speech signal.
A number of common solutions are known for encrypting and decrypting a speech signal. In one of them speech signals are converted to digital form, digital values are coded and digital data is sent using a modem. In this solution, usually the same channels must be used for digital data transmission as well as for unencrypted speech. Due to the fact that these channels have limited bandwidth, it is necessary to use data reduction methods. However, after reconstruction of these reduced data in the receiving part, it is not possible to identify the speaker reliably.
In another known solution, speech signal sequences are memorized, the sequences are divided into a number of smaller time intervals, and these sub-sequences are transmitted in a different order than the original one. However, for physiological reasons, the number and duration of sub-compartments can only be changed within strictly limited ranges. This leads to the fact that the transmitted signal can be easily decoded. Transitions between swapped sub-compartments generally cannot be reconstructed in the receiving part in the correct phase, and therefore the signal quality may be audible compared to unencrypted speech. Furthermore, in the known method there is a perceptible delay between speech and signal transmission, which in some types of transmission channels leads to echo effects, disturbing the speaking person.
It is also known to divide the spectral band to be transmitted into smaller subbands and to send a signal that is obtained by exchanging spectral subbands. Also in this case, the physiological causes of the number and bandwidth of spectral sub-ranges are set in strictly limited ranges. This leads to the fact that it is possible to easily decode the transmitted signal. The inevitable overlaps of filter bands required for the production and reconstruction of the sub-spectrum lead to a deterioration in transmission quality.
In the solution in which the frequency band inversion occurs, i.e. the high and low frequencies of the acoustic frequency spectrum to be transmitted are reversed, using a spreading device with a fixed or variable operating nature, the decoding of the transmitted signal is possible by means of relatively low technical expenditure. However, there remains a high residual intelligibility of the encrypted signal, however
174 895 people trained in listening can listen for transmission even without technical support.
In turn, solutions that are a combination of various known solutions achieve an improvement in decryption protection, but also lead to the addition of unfavorable properties such as deterioration of the signal-noise ratio and limitation to a small number of simple transmission channel configurations.
A more specific solution in the field of analog signal encryption is disclosed in the description of the European Patent Office No. 0 313 029. This description presents a device for encrypted transmission of analog signals in a transmission system with at least one wireless subscriber terminal device, in which there is a code setter for generating codes derived from random numbers, and an encryption system for coded conversion of frequency bands of transmitted signals, the code setter is connected to a pilot tone transmitter for transmitting the code to the base station also containing an encryption system, which is only available to authorized personnel and in which it finds a pilot tone receiver, for code analysis and preparation, and an encryption device for deciphering the received signals. In a known device, the pilot tone transmitter works in a continuous mode and the signals transmitted by the base station to the subscriber terminal device are encrypted with the same code that is contained in the pilot tone, with each of the signal inputs of the base station encryption system being connected to convert the signal into a digital analogue converter - digital, to which the digital output is connected a digital signal processor, which in the subscriber's terminal device, contains a code setter, and in the base station contains a pilot tone receiver, which, according to the code, converts the signal's frequency bands and lowers the higher signal frequencies, the output being connected to the digital input of the analog-to-digital converter, whose analog output is the signal output of the encryption systems.
This description also discloses a method of encrypting radio signals transmitted between two stations of speech signals, which on the transmitting side are pre-emphasized, encrypted, de-emphasized and re-pre-emphasized for transmission, and on the receiving side are de-emphasized de-emphasized to compensate for the pre-emphasis pre-emphasized, decrypted and de-emphasized. Higher frequencies of the signal spectrum before encryption or decryption are raised by the pre-emphasis to approximately uniform energy distribution and after encryption or decryption by the de-emphasis are reduced by the same amount.
In turn, German Patent No. 31 29 911 describes a pseudo-random generator that allows for quick code exchange. Pseudo-random strings are used to control phase switches to expand bands. This results in an increase in the increased bandwidth. The synchronization method used is limited to the ways of expanding the bands. Due to the increased bandwidth, more information can be transmitted than in the original signal. As a result, the phase position of the switching signal can be reproduced on the receiving side by a correlation method. However, this facilitates unauthorized recovery of the key signal.
The next description of the European Patent Office No. 0 204 226 discloses a method of recognizing a key-protected telegram in order to prevent intentional interference with the transmission, this known method being suitable as an additional, together with known methods, for encryption and decryption of speech.
The essence of the method of encrypting and decrypting a speech signal, in which the analogue speech signal is converted to digital on the transmitting side and sent in the transmission channel simultaneously with the pilot signal, while on the receiving side these signals are received, decrypted and converted back to the analogue speech signal , it is, that on the transmitting side the digitally converted speech signal is converted into the first composite signal by means of the first composite input filter whose bandwidth corresponds
174 895 of the transmission channel bandwidth, the first composite signal and pilot signal are phase-modulated using the first and second coding signals, controlled by random numbers, and then the phase-modulated signals are combined additively to an encrypted useful signal, after which the useful signal is sent sequentially through the first combined filter output with preamble, for synchronization and correction, and useful signal on the receiving side, as the second composite signal being the real output signal which, after being converted into an analog form, is sent to the matching signal system. On the receiving side, the received signal, after being converted to a digital form, is converted into a third composite signal by means of a second complex input filter whose bandwidth corresponds to the transmission channel bandwidth, then on the basis of this third complex signal and during the preamble recognition phase synchronization is performed clock for pilot signal produced and subject to phase modulation on the receiving side, in a random sequence initiated by the preamble, and correction factors for the correction filter on the receiving side are calculated and then the useful signal decryption phase is initiated, in which the useful signal is separated from the superimposed on the transmission side of the phase-modulated pilot signal by combining with the synchronized phase-modulated signal pilot produced on the receiving side, obtained phase modulated, the encrypted digital speech signal is decrypted with the help of a code signal, which is generated on the receiving side and is controlled by clock pulses based on the preamble, and is transmitted through the second complex output filter as the fourth complex signal, which is the real output signal, which after conversion into analog form is transmitted to the system matching the received signal.
Preferably, higher order Hilbert filters are used as the combined input and output filters.
Preferably on the transmitting and receiving sides, the sampling frequency decreases after the complex input filters, and the sampling frequency increases before the combined output filters, with the sampling frequency being reduced by an integer factor, especially 1: 3, and the sampling frequency being increased. also according to the integer ratio, especially with a 3: 1 ratio, higher recursive filters are used as the combined input and output filters.
Preferably, the preamble is periodically sent in a fixed time frame, with the encrypted speech signal blanking for the duration of the preamble, and the time frame duration has ceased for a few seconds, especially from 3 to 10 seconds, the preamble duration is set to a multiple of 10 milliseconds, especially around 200 milliseconds.
Preferably, during reception of the preamble, the properties of the transmission channel are examined on the receiving side, after which the coefficients for the correction filter on the receiving side are determined on this basis and the end of each preamble transmitted and re-synchronization is detected on the receiving side, followed by the use of the obtained signal , useful signal decryption process.
Preferably, according to the invention, the random number-controlled phase modulation of the digital speech signal and pilot is carried out using different random number generators, and the starting point of the random number generator or generators on the receiving side is selected as variable within the preamble.
The essence of the device for encrypting and decrypting a speech signal, according to the invention, is a built-in frontal unit for converting the speech signal into digital form and matching the transmitted signal to the transmission channel on one side and / or converting the received signal into digital form and matching the received corrected signal to the speech reproducing device on the other side , is that on the transmitting side it contains a code generator with a random number generator, whose output is connected to the input of the first phase modulator and to which second input the output of the unit is connected
174 895 frontal and pilot signal generator, the output of which is connected to the input of the second phase modulator, whereby the signals from the outputs of the first phase modulator and the second phase modulator are combined additively in an adder whose output is connected to the first switch input, the preamble generator is connected to second switch input and the switch output is connected to the front unit input. On the receiving side, it includes a correction filter attached to the head unit output, which in turn is connected to a preamble recognition system, and then includes a clock synchronization system with a pilot tone generator connected to the correction filter output, with one output of the pilot tone generator connected to the filter output correction in the multiplier system that provides the clock correction signal, and the second output of the pilot tone generator and the output of the next random number generator are connected to the inputs of the next phase modulator, whereby the signal from the output of this phase modulator is subtractively connected with the signal from the correction filter output in the next combiner, the output of which is connected via the phase demodulator to the unit input face.
Preferably, the transmitting side includes a first sampling rate reduction circuit that is connected to the front unit output via a first composite input filter, and on the transmitting side includes a first sampling rate increase circuit that is connected to a front unit input through a first composite output filter, wherein the reduction ratio of the first arrangement / 31 / reduction of the sampling frequency and the increase ratio of the first arrangement / 36 / increasing the sampling frequency are selected and equal in value, the value being an integer, preferably equal to "3".
Preferably, the receiving side comprises a second sampling rate reduction system that is connected to the front unit output via a second composite input filter, and on the receiving side includes a second sampling rate increase system that is connected to the front unit input via a second composite output filter, wherein the sampling rate reduction factor of the second sampling rate reduction system and the frequency increase rate of the second sampling rate system are selected and equal in value, said value being an integer, preferably equal to "3".
Preferably, the random number generator on the transmitting side and the random number generator on the receiving side are the circuits for providing random values / r (n) / according to the linear congruence method, according to the formula r (n) = (a · r (n-1) + c) mod m, where n = 1,2, ..., are integers, a and c are integers and m is a matched number, with integers for a = 1664525 and c = 32767, and for m the value is 2<sup>32</sup>.
Preferably, the averaging system is connected to the output of the multiplier and the combined filter is a Hilbert filter.
The subject of the invention is shown in the embodiment in Figure 1, which is a block diagram of the speech encryption / decryption module in the device according to the invention, which is referred to as the SE module in the text below, Figure 2 - the principle of encryption with an arbitrarily selected time profile .3 - block diagram of the SE module transmitting section, Fig. 4 - decryption principle without reference to a specific time correction scale, Fig. 5 - block diagram of the SE module receiving section, Fig. 6 - block diagram of signal processing on the transmitting side of the SE module, Fig. 7 structure of the first complex filter on the transmitting side, Fig. 8 - frequency response of the first complex filter on the transmitting side, according to Fig. 7, Fig. 9 - structure of the first complex output filter, on the transmitting side of the SE module, Fig. 10 - frequency response of the first complex output filter, according to Fig. 9, Fig. 11 - block diagram of the signal processing circuit on the receiving side in the preamble recognition phase (covert mode), Fig. 12 - block diagram of the signal processing on the receiving side in the decryption phase, Fig. 13 - sequence network
174 895 signal processing on the transmitting side according to the block diagram of FIG. 6, and FIG. 14 is a flowchart of sequential signal processing on the receiving side according to the block diagrams of FIGS. 11 and 12.
The speech encryption / decryption module in the speech encryption and decryption device, hereinafter referred to as the SE module, consists essentially of a high-performance processor digital signal processing system and external devices required for operation controlled by the signal processing program. The block diagram of Fig. 1 shows only those components that are important in digital signal processing. To improve transparency, features such as power supply, clock pulse generation, discrete inputs and analogue input and output stages are not depicted.
The main signal processing unit is the ADSP21msp55 signal processor 1. Signal processor 1 already contains an A / D 2 converter and a D / A 3 converter with resolution, for example 16 bit and 8 kHz sampling frequency, and separate RAM memory 4.5, with data (lk x 16) or processing program (2k x 24). In addition, signal processor 1 includes ROM 6 on the algorithm-controlled memory side.
To operate in duplex mode, the SE module also contains another pair of A / D and D / A 8.9 converters, implemented by the AD28msp02 converter system 7, which contains in a separate housing a converter identical to the converter of the signal processor 1. Data transmission between the converter system 7 and signal processor 1 is made through a fast serial interface.
The SE module has an external EEPROM 10. It contains both parts of the program to be loaded, as well as variables whose value rarely changes, such as, for example, code. Signal processor 11 is connected to the radio apparatus 11, whereby the status of the voice key, mute logic of the radio apparatus 11 and the Crypt-ON / OFF switch can be interrogated by the signal processor 1 with discrete input signals.
The sequence of operation, the further details of which will be described in connection with signal processing, is described below. After the operating voltage is applied, a RESET signal is first generated with a duration of several milliseconds. After that, the signal processor 1 loads its internal RAM 5 memory with the content of the external EEPROM 10 memory and the entered program starts. In the case of a SE module prototype, the entire program required at a specific time must still be initially placed in this RAM (2x instructions), while in the production configuration of the SE module, which is shown in Fig. 12k of instructions, is additionally available in ROM 6 The external EEPROM 10 can also be addressed as a data memory, for reading and changing the values of variable parameters, such as code, for example.
The program sequence breaks down due to interruptions on analog interfaces that appear without forcing, with their specific conversion frequency of 8kHz, with each interrupt being triggered whenever the conversion is performed.
All SE module functions are implemented through digital signal processing. First, the signal processing principle will be explained, based on figure 3 showing the block diagram of the transmitting section of the SE module.
The code signal - helpful in coding the input signal from the microphone, i.e. the speech signal - is generated on the transmitting side in the code signal generator 23. The preamble, which is generated in the preamble generator 24, is transmitted immediately before the coded speech signal, as seen in the figure. 2, showing three time-related elements in the diagram.
The preamble is required to synchronize the further code generator 43 (compare Fig. 5) and adjust the equalizer 40 on the receiving side.
174 895
If you intend to be able to include a conversation in an ongoing conversation, the preamble is periodically set within a fixed time frame. The encrypted speech signal is masked in this case for the duration of the preamble (currently about 200 ms).
Pilot Generator 20 provides a special pilot signal that connects additively to the encrypted speech signal and uses on the receiving side to synchronize the sampling clock, as explained in more detail below. The front unit 22a / 22b, which is imaged in two sub-blocks, prepares the analog input signal and. (its) conversion into a digital signal and final preparation of the encrypted speech signal on the transmitting side and matching to a suitable transmission device and transmission channel. Further details are further explained below.
As can be seen in Figure 4, the beginning of the encrypted transmitted signal is determined by the preamble. For this reason, the analysis of the received signal always takes place on the receiving side as long as the receiver is not in decryption mode. In this phase, the received signal, unchanged, is looped by the SE module. If the end of the preamble is recognized, then with this recognition the decryption process begins, i.e. the code generator 43 on the receiving side starts and the received useful signal is decrypted ("speech signal" in Fig. 4).
Figure 5 is a block diagram of the receiving section of the SE module. The received signal is delivered to the preamble recognition system 44, which is designed to recognize and analyze the received signal. If a preamble is received, then using it, the transmission channel properties are first determined and the filter coefficients for the correction filter 51 on the receiving side are determined based on them.
If the end of the preamble is detected, then a correction factor is made available which matches the transmission channel. At the same time, a code generator 43 starts on the receiving side to decrypt the useful signal. The clock synchronization system 55 evaluates the value of the pilot signal superimposed on the useful signal and extracts this pilot signal from the useful signal. The decrypted useful signal is then passed on. Further details are provided in the following detailed descriptions of the transmitting and receiving sections.
Figure 6 is a block diagram of signal processing on the transmitting side for decryption. Separate functional blocks are described in more detail later in the description. All signal processing functions, which are represented in the form of a flowchart in Fig. 13, were introduced with one signal processor 1 (compare Fig. 1). The double lines and double arrows in Fig. 6 are for analytical signals. Real signals are represented by single lines and arrows.
In principle, it is possible to distinguish three types of signal processing: First analog signal processing on the analog front unit 22, digital signal processing at a clock frequency of 8 kHz and digital signal processing at a clock frequency of 2.667 kHz (8/3 kHz). For illustration, the corresponding signals in Fig. 6 are highlighted by the parameters designated as: t = analog, v = digital, clock 8 kHz and in = digital, clock 2, 667 kHz.
Explicit text mode is provided by simple feedback on the digital side of the analog frontal unit 22. The analogue frontal unit 22 on the receiving side is designed to adjust the level, sample the analog input signal c (t) and convert it to the digital signal c (v). In turn, the A / D converter section. the 22 front analog unit consists of two analog input amplifiers and an A / D converter. The A / D converter section of the 22 head unit of the tested prototype SE module has the following parameters:
Sampling frequency: 8 kHz
Word length: 16 btt
Decimation filter
Bandwidth: 0 to 3.7 kHz
174 895
Ripple: +, - 0.2 cB
Back attenuation: 65 dB
The digitally converted input signal c (v) acts on the first complex input filter 30 to suppress the lower sideband. This filter 30 also ensures that the bandwidth of the input signal (digital speech signal) is limited to the bandwidth that corresponds to the width of the transmission channel, i.e. 2.667 kHz in the embodiment. The first complex input filter 30 generates from the real received input signal a complex output signal consisting of a real and imaginary part, for any required frequencies there is a 90 ° phase shift between the real part and the imaginary part. At the same time, spectral elements outside the usable bandwidth of the transmission channel are attenuated. It is recommended to use a higher-order Hilbert filter.
The first Hilbert filter 30 on the receiving side is a recursive filter with a transfer function. defined as:
<img file="PL174895B1_D0001.tif" />
H (z) = ^ X<sup>b</sup>and '<sup>z_i</sup> i = 0
The filter structure is shown in figure 7.
As mentioned, the input signal of the Hilbert filter 30 is the sampled real received signal c (v). The recursive part of this filter has only real coefficients b "so therefore only real operations are desirable. The transversal part has complex coefficients aj.
The design of the first Hilbert 30 filter is based on the design of the low-pass elliptical filter. The low-pass filter has been transformed into a bandpass filter by transformation in the frequency domain. The frequency response of the Hilbert filter 30 is shown in figure 8.
The output signal with limited d (v) band of the first complex input filter (Hilbert filter) works on system 31, which is intended to reduce the sampling frequency. In this block, the sampling clock frequency is reduced to 2.667 kHz by a specific factor which is 3 in the embodiment. An integer factor is recommended. Appropriate dimensioning of the first Hilbert filter 30 on the input side ensures that no aliasing effects occur ("spectrum wrapping").
The combination of the Hilbert filter 30 with the sampling frequency reduction system 31 leads to a randomly selected frequency band with a 2.667 kHz bandwidth containing all useful information.
In fact, only every third output value of the Hilbert filter 30 obtained from the signal on its input side c (v) is used to reduce the sampling frequency. In practice, this occurs in the transversal part of the Hilbert 30 filter, operating at a frequency of 8/3 kHz. This means that the values from the filter output are calculated and processed only at every third clock pulse of the 8 kHz sampling clock.
Pilot Signal Generator 20 is used to generate pilot signal q (n) which is used on the receiving side to control the slave clock. The pilot signal is generated by phase modulation, as described below. The purpose of the random number generator 34 (cf. Fig. 6), which is part of the code signal generator 23, is to generate numbers evenly distributed in a given range, e.g. by 1 to 64. These numbers are used to select random values from a field with 64 complex values (compare the block "data set" in Fig. 6). Two code signals from<sub>3</sub>(n), zp (n) are produced from selected values, one of these code signals (z<sub>s</sub> (n)) is used for phase modulation of the useful signal, and the other (from<sub>p</sub> (n)) is used to generate pilot signal q (n). Random number generator 34, working
174 895
Π based on the linear congruence method. Random values r (n) are calculated according to the formula (2) r (n) = (a • r (nl) + c) mod mn = 1,2, ... (2)
In general, the initial value of r (0) is irrelevant, because all m possible values are generated before the random sequence is repeated, if the constant values of a and c are properly selected. The generated random numbers are evenly distributed in the range from 0 to (m-1).
In the embodiment, m = 2 is selected<sup>3</sup>2. This allows the production of long sequences. In addition, the modulo function in equation (2) can be implemented in signal processor 1 without much difficulty. The selected constants take the values a = 1664525 and c = 32767 according to the rule.
In order to obtain an even distribution of random numbers in the range from 1 to 64, it is enough to consider 6 bits of the relevant random value r (n) and use them further as a random number. In the present embodiment, 6 bits are used to generate random numbers to encrypt the useful signal x (n) and 6 bits to generate random numbers to encrypt the pilot tone p (n). In this way, in each case for each clock cycle, the random number generator 34 provides two random numbers r<sub>g</sub>(n) ir<sub>p</sub>(N). After each preamble transmission, the random number generator 34 is reinitialized with the specified initial value of x (0).
Control values for phase 32 and 33 modulators are represented by a set of data with 64 complex values. Random number generator 34 selects values from this set and produces a random signal for phase modulation.
a, = e<sup>j2ni / 64</sup> 1 = 1,2, ...., 64 (3) complex values are used as the data set. All control or input values from<sub>s</sub>(n) and z_ (n) have the amplitude of "1", but different phases. In the following text, the operation of random phase 32 and 33 modulators will be explained in more detail.
Two units of phase modulators 32 and 33 are required in the transmission section of the SE module (Fig. 6). One phase 33 modulator is required to encrypt the useful signal x (n) by means of the code signal z<sub>s</sub>(n), provided by the random number generator 34. The second phase modulator 32 is used to generate pilot signal q (n) from the pilot tone p (n) provided by the pilot tone generator based on the second tooth code signal). Due to the fact that the code signals from<sub>s</sub>(n) and zp (n) are random complex value sequences having the same amplitude, but different phases, each phase modulator 32.33 performs a complex multiplication of the respective input signal value by the corresponding code value.
If, as shown in Fig. 6, the values of the analytical output signal from the filter are denoted by x (n), and the values of the associated code signal by z<sub>s</sub>(n), then the values of the phase-modulated useful signal are determined as follows:
y (n) = x (n) · Z, (n) (4)
The phase-modulated useful signal y (n) is similar to a noise signal. The information contained in the useful signal is completely scattered in the 2.667 kHz frequency band.
At this point, it should be noted that the phase modulation used has some similarity to 64-step PSK type modulation (phase shift keying) that is used in digital transmission techniques. However, its purpose is completely different. In the case of digital data transmission, using PSK modulation, the carrier phase of the keying signal is from the sampling clock frequency. Thus, the carrier phase contains cy12 information
174 895 freight intended for transmission. On the receiving side, the carrier phase is determined at defined sampling times. The discriminator assigns the corresponding digital information to each specific phase and thus the transmitted information is recovered. On the other hand, with the phase modulation method used herein, the modulated signal carries the information to be transmitted rather than the modulation signal. This information is pre-determined by a quasi-continuous signal profile. The purpose of phase modulation is therefore only to change the signal to be transmitted that it will no longer be possible to deduce what the original signal profile is. The speech signal thus becomes completely incomprehensible. Useful information is encrypted through phase modulation.
On the receiving side, useful information can be recovered by reverse operation of equation (4) (5)
V (n) with<sub>s</sub>(N)
Complete recovery of information is possible only if all conditions are met. First, the received signal y (n) must correspond to the phase-modulated transmitted signal y (n). Secondly, the modulation signal, i.e. the code signal from<sub>s</sub>(n) must be known on the receiving side. The first requirement depends on the correction of the transmission channel on the receiving side. The second requirement depends on the knowledge of the code signal and the exact synchronization of the receiving part.
Due to the number of values of the code signal from<sub>s</sub>(n) is determined by the number of degrees of modulation (in this case 64), the number of possible values for x (n) and y (n) results from the length of the word used in signal processing.
If the values of the generated pilot tone are marked by p (n) and the values of the associated code signal are indicated by zp (n), then the values of the pilot signal are given by the compound q (n) = p (n) · zp (n) (6)
Therefore, due to the properties of the selected random number generator 34 and pilot signal q (n), white noise is generated.
In order to be able to transmit an analytical signal generated at a clock frequency of 2.667 kHz, the transmitted signal must be matched to the transmission channel. In the example shown, due to the use of a predetermined sampling frequency of 8 kHz, the analog front unit 22 must first increase the sampling frequency to 8 kHz. Increasing the sampling frequency to 8 kHz by multiplying by a factor of 3, i.e. from 2.677 kHz to 8 kHz is achieved by inserting in each case two signal values having a value of 0 between two existing signal values, i.e.
d<sub>s</sub>(v) = ..., w (n-1), 0, 0, w (n), 0, 0, w (n + 1), ... (7)
An increase in sampling frequency is obtained in conjunction with the first complex output filter 35 to match the transmitted analytical signal to the transmission channel. The real part of the output analytical signal of the complex output filter 35 is sent to the analog head unit 22.
Initially, the first composite output filter 35 produces from the composite input signal ds (v) an analytical signal whose real and imaginary parts are phase shifted by 90 ° for any given frequency, and then the actual output signal c<sub>s</sub>(V). At the same time, the spectral elements outside the used ule174 895 transmission channel band are suppressed. It is recommended that the first composite output filter 35 on the output side is a second Hilbert filter, i.e. a recursive filter with the structure shown in figure 9.
Input signal d<sub>s</sub>(v) this second Hilbert filter 35 is an analytical signal, on the other hand the output signal c<sub>8</sub>(v) is a real signal.
The frequency response of the second Hilbert filter 35 on the output side of the transmitting part is shown in figure 10.
Digital output signal conversion c<sub>s</sub>(v) the second Hilbert 35 filter to the form of an analog output signal occurs in the output section of the analog head unit 22. This conversion also includes local matching. The D / A converter 3 of Fig. 1 of the analog head unit 22, without a detailed description, consists of a D / A converter, an analog smoothing filter, a programmable amplifier and a differential amplifier.
At the output of the analog head unit 22 in the embodiment, the following are obtained:
Clock frequency: 8 kHz
Word length: 16 bits
Gain: adjustable from -15 cB- to -66 cB
Interpolation filter
Frequency of response: from 0 to 3.7 IHŁz
Ripple: +, - 0.2 cB
Back attenuation: 65 dB
To generate a preamble when starting transmission via radio or telephone channels, a preamble generator 24 is used, whose output is connected alternately with the output of the adder to switch 25 to the input of the front unit 22. In order to obtain the possibility of switching on (in the receiving part) for ongoing transmission, it initiates generating a preamble in set time intervals.
The preamble that was used consists of two consecutive signal parts. The first part is the so-called CPFSK signal, frequency keying with phase continuity). The second part of the signal is a noise-like signal. The first part of the signal is used in the receiver to detect the preamble and synchronize the receiver. The second part is used to correct the transmission channel.
The CPFSK signal is generated by CPFSK modulation with data frequency. For example, the length of this sequence is 240 bits and the bit rate is 1.778 kbit / s. The structure of the data sequence is selected in such a way that preamble detection is particularly reliable using a special method on the receiving side. The total preamble duration in this example is about 230 msec.
On the receiving side, two different modes of operation of the SE module can be distinguished. One of them is recognition of the preamble phase, during which the SE module remains in explicit mode, and the other is the decryption phase. On the same principle, three types of signal processing are distinguished on the transmitting side, i.e. analog signal processing, digital signal processing at 8 kHz clock frequency and digital signal processing at 2.667 kHz clock frequency. In the background calculations of the equalizer coefficients are performed without linking to the sampling clock.
After switching on the device, the SE module always remains in the preamble recognition phase. Figure 11 shows a block diagram of a signal processing circuit. In this circuit, the received signal only passes through the analog frontal unit 52 and its filter. In principle, the received signal is not affected by the SE module.
After filtration, the sampled signal received, with a sampling frequency of 8 kHz and a word length of 16 bits is delivered to the second complex input filter 40 on the receiving side, in particular to the third Hilbert filter (band filter) and to the system 43 to reduce the sampling frequency to 2.667 kHz and to preamble recognition block 44. At the same time, the sample values of the received signal are buffered in buffer 41. The preamble recognition system 44 automatically detects the preamble acceptance automatically.
The operation and structure of the second complex input filter 40 substantially corresponds to the second complex input filter 30 on the transmitting side described above.
174 895
Preamble recognition includes two functions: the first is detection of preamble reception and switching to decryption, the second is the provision by the preamble of an accurate reference time. This is necessary to initiate and synchronize the decryption process.
Therefore, in particular, initialization of the random number generator 34 on the receiving side and pilot generator 50 occurs with preamble recognition. In addition, the process of determining correction factors begins. The calculated set of coefficients is used to set the correction filter 51, which is used in the decryption mode.
The second part of the preamble, the the noise signal is evaluated to determine correction factors. This means waiting for the correct part of this preamble to be in buffer 41. The impulse response and set of coefficients for the 51 correction filter are calculated using Fast Fourier Transform (FFT), with the nominal spectrum present in the receiver stored in RAM 5 (Fig. 1).
After recognizing the preamble, the SE module is in decryption mode. Figure 12 shows the signal processing circuit in this phase. Fig. 14 is a flowchart comprising a functional sequence of signal processing steps in the receiving portion.
The analog frontal unit 52 converts the received signal into a digital signal with a sampling frequency of e.g. 8 kHz and a word length of e.g. 16 bits. This signal passes through a correction filter 51, the purpose of which is to correct the transmission channel, as explained in more detail below. After filtering through the second combined filter 40 and after reducing the sampling frequency in the system 43 three times, an analytical signal with a sampling frequency of 2.667 kHz is created. This signal - s (n) contains an encrypted useful signal and superimposed pilot signal. As described above, the pilot signal is a phase modulated signal. The pilot signal is evaluated and separated from the useful signal, followed by decryption of the useful signal by the phase 59 demodulator.
After increasing the sampling frequency by the system 61 to 8 kHz and after filtering using the second output filter complex 62, conversion to an analog signal takes place on the receiving side of the analog head unit 52. This signal is a decrypted acoustic signal.
The function and design of the second output complex filter 62 essentially corresponds to the operation and design of the first output complex filter 35.
The evaluation of the pilot signal in the clock synchronization system 55 additionally provides controlled variables to adjust the fluctuation in the sampling clock (clock correction). Adjusting the sampling clock is necessary due to the stringent requirements for synchronization during decryption. The reason for the fluctuation in the sampling clock is the dispersion of parameters between devices and slow changes (drifts) of the parameters of the used crystal oscillators.
AND
In order to evaluate the pilot signal, the received signal s (n), at a reduced sampling frequency, passes through the phase 58 demodulator. The output signal q (n) of this phase 58 demodulator includes a carrier signal element and an superimposed noise-like signal element that arises from the useful signal . The carrier signal is converted into a baseband signal using the signal generated by the pilot tone generator 50. After the average system 56, an analytical baseband signal is already available, the real part of which is a measure of the pilot level, and the imaginary part is used as a controlled variable to control the sampling clock.
Using the specified pilot level, pilot tone generator 50 and phase 57 modulator, pilot q (n) is generated on the receiving side and subtracted
Λ Λ it from the signal received s (n). In the ideal case, the generated pilot signal q (n) corresponds exactly to the pilot signal received, whereby the useful signal is completely separated from the pilot signal by subtraction. If the correction is
174 895 optimal, the signal y (n) obtained as a result of the subtraction process corresponds, except for the superimposed noise signal, to the signal y (n) at the output of the phase modulator 33 in the transmitting part (compare Fig. 6).
The phase 57 modulator and two phase demodulators 58, 59 are controlled by a random number generator 54. One signal of this random number generator 54 controls the phase 57 modulator and phase demodulator 58 of the clock synchronization circuit 55, the other signal controls the phase 59 demodulator when decrypting the useful signal y ( n). Random number generators correspond to those on the transmitting side, where they are synchronized by a signal received in the same way as pilot signal generator 50, i.e. by preamble recognition.
The purpose of the individual blocks of the signal processing circuit of Figure 12 is described in detail below.
The input section of the analog head unit 52 adjusts the sampling level of the analog received signal and its conversion into a digital signal. The AD28msp02 integrated circuit is used as the analogue front unit52. This system corresponds exactly to the analog frontal unit used in the ADSP-21msp55 signal processor. The analog front unit 52 consists of two analog input amplifiers, a 20 dB preamplifier that can be connected and an A / D converter. The A / D converter section of the 52nd frontal unit has the following parameters:
Sampling frequency: 8 IHIz
Word length: 16 btt
Decimation filter:
Bandwidth: 0 to 3.7 kHz
Ripple: +, - 0.2 cffi
Back attenuation: 65 dB
A correction filter 51 is used to correct the frequency response of the transmission channel over a transmission bandwidth of, for example, 300 Hz to 3 kHz. The transmission channel includes all components from the first Hilbert complex filter 35 of the transmitting section to the second complex filter 40 of the receiving section. The 51 correction filter is a 128 degree transverse digital filter. The transformation function has the form:
127
E (z) = 2L<sup>e</sup>and ·<sup>ζ_ί</sup> i = 0 (8)
Coefficients ej are determined when receiving a single preamble.
The second composite input filter 40 (Hilbert filter) is used to suppress the lower input signal band to limit the input signal bandwidth (received speech signal) to a width of about 2.66 kHz.
The second composite input filter 40 (Hilbert filter) is a recursive filter whose structure corresponds to the structure of the composite Hilbert filter 30.
The input signal of the second complex filter 40 is the actual output signal c (v) of the correction filter 51.
Three times the sampling frequency by system 43 in the example to 2.667 kHz three times occurs on the receiving side in a manner analogous to that on the transmitting side. Appropriate dimensioning of the second complex input filter 40 ensures that no aliasing effects ("spectrum wrapping") occur.
The combination of an input Hilbert complex filter 40 with a sampling frequency reduction system 43 leads to a randomly selected frequency band with a 2.667 kHz bandwidth containing all useful information.
In practice, the processing of every third output value of the second complex input filter 40 is performed so that the transversal part of this filter operates at a frequency of 8/3 kHz. This means that the values from the filter output are calculated and further processed only in every third cycle of the 8 kHz sampling clock.
174 895
Pilot Signal Generator 50 provides an identical signal to that generated by Pilot Signal Generator 20 on the transmitting side. This signal is necessary in the clock synchronization system 55 to convert the received and demodulated pilot signal q (n) into the baseband signal and to generate on the receiving side the phase-modulated pilot signal p (n).
As it has already been mentioned above, the averaging unit 56 is used to average the signal of the analytical signal q (n) transformed into the baseband so that the level of the received pilot signal is obtained in the form of a real part, while the controlled variable for controlling the subordinate sampling clock (clock correction) as an imaginary part. Averaging is performed so that after every 128 cycles of sampling clock the average for the last 128 values of the input signal q (n), transformed into the baseband signal, is obtained.
The Random Number Generator 54 is designed to produce numbers evenly distributed in the range of 1 to 64, analogous to the random number generator 34 on the transmitting side. These numbers are once again used to select random values from a field with 64 complex values. Once again, two code signals z_ (n) and z, (n) are produced from selected values, one of these code signals (with<sub>s</sub>(n)) is used for phase demodulation, i.e. for signal decryption
A useful y (n) and the other (z<sub>p</sub>(n)) is used in the clock synchronization system 55 on one side to decrypt the received pilot signal and on the other to generate the pilot signal on the receiving side. Due to the clock synchronization, the code signals are of course identical to the code signals from<sub>p</sub>(n) and from<sub>s</sub>(n) on the sending side. The use of the 54 random number generator is identical to that on the transmitting side.
Random numbers are given to the phase 57 modulator and to the phase 58 and 59 demodulators in the form of a set of 64 complex values from which discrete values are selected by the random number generator 54. In the same way as in the transmitting part, the same 64 complex values i = 1<sup>,</sup>2<sup>,</sup>....<sup>,</sup>64 (9) are used as the data set.
The two phase 58 and 59 demodulators already described are used on the receiving side of the SE module.
AND
One phase 59 demodulator is used to decrypt the useful signal y (n) using the z code signal<sub>s</sub>(N). The second phase 58 demodulator is used to recover the pilot tone from the received pilot signal. As mentioned, these code signals must be identical to the code signals on the transmitting side.
If the values of the analytical input signal after decreasing the sampling frequency in the system 60 are marked by s (n), and the values of the pilot tone code signal are marked by z<sub>p</sub>(n), then the signal value at the output of the phase 58 demodulator in the clock synchronization system 55 is:
Λ
<img file="PL174895B1_D0002.tif" />
(10)
If the encrypted usable signal is marked by y (n) and the encrypted code signal is marked by z<sub>s</sub>(n), then for the decrypted signal at the output of the phase 59 demodulator there is the relationship:
(11)
<img file="PL174895B1_D0003.tif" />
174 895
The phase 57 modulator is used to generate the pilot tone from the pilot tone provided by the pilot tone generator 50.
If the values of the generated pilot tone are marked by p (n), then the values of the phase-modulated pilot tone result from the relationship:
q<sup>(N)</sup>= p<sup>(N)</sup> -<sup>from</sup>P<sup>(N)</sup> (<sup>(2</sup>)
In order to be able to convert the analytical digital signal x (n), which is generated with a clock frequency of 2.667 kHz, into an analog signal, it is first necessary to increase the sampling frequency to 8 kHz.
Increasing the sampling frequency by a factor of 3, i.e., as in the example shown from 2.667 kHz to 8 kHz, occurs by inserting two signal values having the value "0" between two signal values, corresponding to the following relationship:
ds (v) = .... x (n -1), 0.0, x (n), 0.0, x (n + 1), ...
((2)
The second Hilbert 62 composite output filter is also used to convert the analytical output signal to the actual output signal. This filter is used to limit the bandwidth of the speech output signal to about 2.667 kHz. The second composite output filter 62 is a recursive filter whose structure corresponds to the structure of the first complex output filter on the transmitting side, which is shown in Fig. 9. The input signal of the second complex output filter 62 is an analytical signal. The output signal is a real signal.
The task of the front end analog unit 52 on the receiving side is to convert the digital output signal to analog output signal (speech signal), which also includes adjusting the signal level.
The D / A converter section, not shown in detail, of the analog front unit 52 consists of an A / D converter, an analog smoothing filter, a programmable amplifier and a differential amplifier. The following parameters are obtained at the output of the analog head unit 52:
Clock frequency: 8 kHz
Word length: 16 btt
Gain: adjustable from -15 dB to +6 dB Interpolation filter:
Response frequency: Ripple:
Reverse attenuation:
from 0 to 3.7 kHz 0.2 cB cB
It should be noted that the essence of the invention is not limited to the example described. Extending options, primarily regarding security and encryption protection, can be identified based on the above description by persons familiar with the technical field associated with the invention. In the case of the exemplary embodiment described, only a single random number generator is used to generate code signals. The use of separate, different generators creates the possibility of further improving security and encryption protection. Furthermore, in the case of the exemplary embodiment described, it was assumed that the random number generator 54 starts at the same point of each resynchronization. Security and encryption protection can be increased if the start point of this generator is changed every time you synchronize again. This can be achieved in such a way that the starting point of the 54 random number generator will be transmitted in the preamble.
174 895
Fig.2
<td>Input signal</td><td>Speech signal</td><td></td>
<td></td><td></td><td>f</td>
<td>Signal generated</td><td>Code signal</td><td></td>
<td>internally</td><td></td><td></td>
<td>Signal <sup>preambut <1</sup></td><td>Encrypted speech signal</td><td></td>
<td>given</td><td></td><td>t</td>
<td></td><td>Fig. 3</td><td></td>
<img file="PL174895B1_D0004.tif" />
174 895
Figure 4
<td>signatories</td><td>---- Preamble</td><td>Encrypted speech signal</td><td></td>
<td>received</td><td></td><td></td><td>t</td>
<td colspan="2">Starting impulse—</td><td></td><td></td>
<td colspan="2">Internal</td><td>Code signal</td><td></td>
<td>signal</td><td></td><td></td><td>t</td>
<td colspan="2">Output signal</td><td>Speech signal</td><td></td>
Fig. 5
<img file="PL174895B1_D0005.tif" />
174 895
<img file="PL174895B1_D0006.tif" />
<img file="PL174895B1_D0007.tif" />
174 895
Figure 8
<img file="PL174895B1_D0008.tif" />
<img file="PL174895B1_D0009.tif" />
174 895
Fig. 10
<td></td><td></td><td>FF</td><td>7 \ Λ</td><td></td>
<td></td><td></td><td></td><td></td><td></td>
<td></td><td></td><td></td><td></td><td></td>
<td></td><td></td><td>ri</td><td></td><td> _</td>
-2 0 2 fCkHz]
Figure 11
<img file="PL174895B1_D0010.tif" />
174 895
<img file="PL174895B1_D0011.tif" />
clock
174 895
<img file="PL174895B1_D0012.tif" />
Fig. 13
174 895
<img file="PL174895B1_D0013.tif" />
Figure 11
Fig. 12
Fig. 14
174 895
ABOUT
<td></td><td>Linear codec</td><td></td>
<td>Converter</td><td>AD28msp02</td><td>Converter</td>
<td>- DA</td><td></td><td>AD -</td>
<td>8kHz</td><td></td><td>8kHz</td>
<td>16bit</td><td> -4</td><td>16bit</td>
2 O
Transducer - AD 8kHz 16Bit
Signal Processor '<sup>-</sup>'ADSP 21msp 55/56 13 MIPS
DA 8kHz 16 Bit converter
Receiver
Rx _ Omit RAM data
1kx16
Program memory type ROM 2kx2A (only for production configuration)
RAM type program memory
2kx24
Transmitter
tx
-and-
EEPROM memory
Memory with 2k bootstrap program (further 3x2k instructions for prototype only)
System parameters, code, ...
2k x8 (max.)
Fig.1
UP Department of Publications. Circulation of 90 copies Price PLN 4.00
Contents4
22 sheets
Sheet 1 Sheet 2 Sheet 3 Sheet 4 Sheet 5 Sheet 6 Sheet 7 Sheet 8 Sheet 9 Sheet 10 Sheet 11 Sheet 12 Sheet 13 Sheet 14 Sheet 15 Sheet 16 Sheet 17 Sheet 18 Sheet 19 Sheet 20 Sheet 21 Sheet 22
24 members in 17 offices
Priority claims8
| Document | Office | Kind | Date |
|---|---|---|---|
| 4339464 | Germany | A | |
| 4339464 | Germany | A | |
| 9403693 | European Patent Office (EPO) | W | |
| 9403693 | European Patent Office (EPO) | W | |
| 4339464 | – | – | – |
| DE19934339464 | – | – | – |
| EP9403693 | – | – | – |
| WO1994EP03693 | – | – | – |
Members24
| Document | Office | Kind | |
|---|---|---|---|
| DE4339464A1 | Germany | A1 | |
| WO9515627A1 | World Intellectual Property Organization (WIPO) | A1 | |
| AU8141394A | Australia | A | |
| TW252241B | Taiwan Province of China | B | |
| ZA949167B | South Africa | B | |
| DE4339464C2 | Germany | C2 | |
| FI962106A | Finland | A | |
| FI962106A7 | Finland | A7 | |
| HU9601333D0 | Hungary | D0 | |
| PL314289A1 | Poland | A1 | |
| EP0729678A1 | European Patent Office (EPO) | A1 | |
| SK63096A3 | Slovakia | A3 | |
| KR960706244A | Republic of Korea | A | |
| CZ143896A3 | Czechia | A3 | |
| HUT74262A | Hungary | A | |
| JPH09501291A | Japan | A | |
| US5778073A | United States of America | A | |
| EP0729678B1 | European Patent Office (EPO) | B1 | |
| AT169787T | Austria | T | |
| ATE169787T1 | Austria | T1 | |
| RU2118059C1 | Russian Federation | C1 | |
| DE59406692D1 | Germany | D1 | |
| PL174895B1This record | Poland | B1 | |
| SG54159A1 | Singapore | A1 |
Numbers
- Publication, DOCDB
- 174895
- Publication, EPODOC
- PL174895B
- Application
- 94314289
- Application, DOCDB
- 31428994
- Application, EPODOC
- PL19940314289
Titles3
- German
- VERFAHREN UND EINRICHTUNG ZUR SPRACHVERSCHLEIERUNG UND ENTSCHLEIERUNG BEI DER SPRACHUBERTRAGUNG
- English
- PROCESS AND DEVICE FOR SPEECH SCRAMBLING AND UNSCRAMBLING IN SPEECH TRANSMISSION
- Polish
- Sposób i urządzenie do szyfrowania i deszyfrowania sygnału mowy
Classification
- CPC, 2
- H04K1/00
- H04K1/006
- IPC, 2
- H04K1 00
- H04K1 04