Video and audio signals synchronising system

The present invention relates to a device for synchronizing audio and video signals, in particular for a digital communication system.

Transmission and reception of acoustic and video signals requires that the acoustic and video components are properly synchronized. ELA standards. RS-250-B limit the time difference between the associated audio and video signals to a time of 25 ms in advance or 40 ms delay, and film standards limit the time difference of the associated audio and visual signals to ± 1/2 of the frame, which corresponds 20.8 ms. The acceptable end parameter for the source of synchronization of acoustic and visual signals received by the viewer is therefore a time difference of ± 20 ms.

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Digital communication systems usually multiply time components of a signal in a single channel, which is used in systems for the transmission of acoustic and video signals used in cable, fiber optic, terrestrial and satellite communications. Multiplying the signal components in time can destroy their normal time relationship between the transmission and reproduction of information, so it is preferred that the critical time components of the transmitted component signals are associated with a time reference prior to the reproduction operation. This is called information tagging, and timing samples are called time stamps.

The receiver must be closely related to the transmitter's time base, which is ensured by the fact that the data output is matched to the receiver's input. If the receiver plays the data too fast, the buffers in the receiver may show an underflow, which will interrupt the output signal. If the receiver reproduces the data too slowly, the buffers may show excess and assuming a finite buffer speed, this results in data loss.

A communication system is known in which the receiver is synchronized with the transmitter by additional SCR time stamps of system reference clock signals associated with predetermined packets of transmitted information. The timing of the SCR timestamp recording of the system reference clock signals has nothing to do with the depiction of PTS timestamps that are associated with video data other than those provided from the same meter. The SCR timestamps of the system reference clock signals are generated by sampling a modulo 2 counterⁿ (N> 32), which counts a clock signal at a substantially constant frequency in the transmitter. The receiver uses a phase locked loop that has a resting frequency substantially equal to the clock frequency of the transmitter. The receiver's clock signal, i.e. the local clock, is also counted in module 2ⁿ and each time the SCR timestamp of the system reference clock signal reaches the receiver, the local counter signal is sampled to provide LCR time stamps of local reference clock signals. No attempts have been made to make the local LCR time stamp equal to the SCR time stamp of the system. Instead, the local clock signal is adjusted based on the processing changes of the difference between the LCR and SCR timestamps. The ERR error signal is produced according to the equation:

ERR = (SCR_n - SCR ,, i) - (LCRn - LCRn-i).

The ERR error signal is used to control the local clock frequency. As a result of this process, the local LCR time stamp becomes arbitrarily close to the clock frequency of the transmitter. Because both clocks, system and local, count modulo N, they have cyclic transitions. When they occur, individual SCRn - SCR expressions_n-1 and LCRn - SCRn-1 will be negative and incorrect. The system controls the polarity of individual differences and when one of the differences is negative, it is ignored.

The video signal encoded in accordance with the MPEG standard, i.e. the image compression standard used for recording video images, contains components representing the PTSvd video markers that are synchronized with the input video frames. The individual PTSvid video time stamps indicate the relative times at which the frames are to be played back at the receiver, with a nominal frequency of 30 Hz, using an NTSC format signal. The acoustic signal is also coded using PTS acoustic time stamps_aUd, based on the same time base as the time base of the system, wherein these time stamps are arranged in a layer of MPEG standard packets including encoded audio data. The system acoustic packet layer contains, for example, several frames of audio data and the individual frames in this example are equal to 24 ms of original audio data. Acoustic frames are approximately six times longer than the transported packet by 127 bytes. The transmitted information, acoustic signals, video signals, data etc. are divided into individual transported packets of specific dimensions, with many different

174 674 control words appended at the end to provide an additional layer of error detection / correction and synchronization. In addition, according to the MPEG protocol, the number of audio frames per layer in the MPEG standard is variable. Therefore, there may be little or no correlation between the presented PTSvid video time stamps and the PTS acoustic time stamps._aUd for audio and video signals. So synchronization of acoustic and video components is difficult if you try to do it by comparing PTSvd visual time stamps with PTS acoustic time stamps_aUThe method and device for securing or restoring synchronization of acoustic signals with respect to video signals are known from US Patent No. 4,313,135. The audio synchronization system includes a delay detector for measuring video delay by a video processing system, such as one or more frame synchronization systems, and for measuring the variable delay of audio signals controlled by the detector so as to compensate for video and audio signal delays.

The method and apparatus for transmitting compressed information on acoustic frequencies in which this information is sampled, digitized and stored in memory is known from US Patent No. 4,429,332. Then it is read from the memory many times faster, for example 400 times faster, converted to analog form, combined with television synchronization signals and transmitted as a television signal frame. This signal is received, converted from analog to digital, remembered at high speed and then read at acoustic frequency to recover the original ten seconds of acoustic frequency information.

The method and device for correction of synchronization of acoustic and video signals are known from US Patent No. 4,703,355, in which these signals are transmitted and resynchronized, with the coding of acoustic synchronization signals in the video signal before transmission and the decoding of the audio synchronization signals from the signal video after transmission. The decoded audio synchronization signals are compared with the synchronization signals generated from the transmitted audio signal and a delay factor is generated representing the relative delay between the transmitted audio signal and the transmitted video signal. Both the transmitted video signal and the transmitted audio signal are then delayed by the value of the delay factor for resynchronizing the two signals.

The method and apparatus for supporting the synchronization of audio and video signals in a television signal read from a digital buffer memory by a reference signal are known from US Patent No. 4,851,909. Both the analog and video component of the television signal are processed to digital form. The acoustic component is processed at a much slower sampling rate of word length, which is an integral multiple of the length of the video word. The digital acoustic component is then compressed using transient memory and read from it at a rate that is half the sampling rate of the digital video component, after which the word length is divided in half and the word rate doubled in the shift register system. In this form, the acoustic component is introduced during the blanking periods of the video component line in a compatible form by the multiplexer whose output signal is read in a single image field or full image memory when controlling the address generator synchronously with the input video component. The buffer memory is read at a speed controlled by a reference signal, which is used for synchronization in a television studio. On the output side, the digital video and acoustic components of the television signal are separated by a demultiplexer, the acoustic word length is doubled and the word transmission speed is divided in half, and the compressed acoustic signal is expanded to provide a substantially continuous digital component. The acoustic component is then processed into analog form and is correctly synchronized for occurrence

174 674 together with the digital video component converted to analog form at the demultiplexer output. Separate audio delay systems are therefore prevented by using relatively simple multiplexing and audio processing systems.

It is known from US Pat. No. 5,202,761 an acoustic signal synchronization device having a delay detector for accurate measurement of the delay introduced by a vision device connected to a controlled, variable delay system of acoustic signals delay for accurate delay of the signal with acoustic frequencies of substantially the same value, like acoustic signal delay. The device works effectively even with video signal delays exceeding one frame, without the need for an auxiliary correlation system. Variable delay of audio signals may also include fine filtering to compensate for adverse effects introduced by the delay.

It is known from U.S. Patent No. 5,231,492 a video and audio signal multiplexing transmission system for multiplexing, transmission and reception of image data and acoustic data, in which image data and acoustic data are balanced for limited transmission capacity so as to obtain better overall quality for effective use of the center transmission capacity. The contents of at least one image and audio data are detected and used to control the content of the transmission. The content of the transmission is controlled by changing the data and sound to correct the difference between the speed of processing image data and acoustic data, as a result of which the quality of the video conference system or the like, where the transmission capacity is insufficient, is improved.

In the device according to the invention, the output of the video decompressor is connected to one input of the first subtraction system, to which the second input is connected to the first latch flip-flop connected to the clock signal generator, and to the output of the acoustic signal decompressor, one input of the second subtractor is connected, to which the second input a second latch is attached to the clock signal generator, and the outputs of both subtraction systems are connected to a third subtraction system of acoustic and video time stamp values ​​attached to the synchronization system.

The synchronization system includes a filter and a processor attached to the time base system of acoustic signals.

The subtraction system has an acoustic timestamp input and video timestamp input and a synchronization error signal output.

Preferably, a local counter for counting cycles of the local clock signal is attached to the latch.

Preferably the local counter is adapted to count modulo N.

The filter and processor are attached to an acoustic signal decompressor for adjusting the hopping and repetition of the acoustic signal.

The time base system is attached to an acoustic signal decompressor to adjust the clock signal frequency.

A filter multiplying the speed of binary data is attached to the filter and processor and clock signal generator.

An advantage of the invention is to provide a synchronization system for audio and video signals that allows simplification of the synchronization process associated with the audio and video components.

The subject of the invention is shown in the embodiments in the drawing, in which Fig. 1 shows the known transmission system of compressed acoustic and video signals in block diagram, Fig. 2 '- receiving device with decompression of acoustic and video signals together with the synchronization system, according to the invention, in the block diagram, Fig. 3 - the system for generating clock signals of the receiver, in the block diagram, Fig. 4 - the flowchart of the system in Fig. 2 and Fig. 5 and 6 - other systems

174 674 for producing clock signals for processing acoustic signals, implemented as one of the components of the system of Fig. 2.

Figure 1 shows a known transmission system of compressed digital video signals for which the system according to the invention can be used. The video signal from the audio and video signal source 10 is fed to the audio signal compressor 11, which includes, for example, a motion-compensated prediction coder using discrete cosine transformants. The compressed video signal from the video signal compressor 11 is fed to the formatter 12. Formatter 12 formats the compressed video signal and other auxiliary data according to a given signal protocol, for example the MPEG standard defined by the International Organization for Standardization. The standard signal is provided to the first transport processor 13, which splits the signal into data packets and adds some organizational data to ensure noise immunity during transmission. Transported packets that normally have a heterogeneous rate are provided by the multiplexer 16 to a rate buffer 14 that provides output at a relatively constant rate appropriate for the efficient use of a relatively narrow band transmission channel. The buffered data is fed to a modulator-demodulator 15 that performs signal transmission.

The system clock 22 provides a clock signal to control a significant portion of the system, including at least a transport processor 13. The clock 22 operates at a constant frequency, e.g., 27 MHz. Here it is used to generate timing information. Clock 22 is connected to the clock input of the counter 23, which is designed, for example, for counting modulo 2. The counting values ​​provided at the output by the counter 23 are fed to two latches 24 and 25. The first latch 24 is set by a source of 10 audio and video signals to block counted values ​​when individual frame intervals occur. These counted values ​​are marked by the PTS video time stamps_Vand d are input into the compressed video stream by the formatter 12 and are used by the receiver to provide synchronization of the associated video and audio signals. The second latch 25 is set by the first transport processor 13 or the system controller 21 to block the counted values ​​according to a specific plan. These counted values ​​are marked by the SCR timestamps of the system reference clock signals and are placed as auxiliary data in individual transported auxiliary packages.

The audio signal associated with the video signal from the 10 audio and video signals source is fed to the compressor 18 of the audio signals. The compressor 18 of the acoustic signals provides frame sampling pulses, regardless of the video frames, to control the latch trigger 19. In response to the sampling pulses, the latch latch 19 receives the counted values ​​provided by the counter 23. These blocked values ​​correspond to the PTSaud acoustic timestamps. PTSaud acoustic time stamps are introduced into the compressed audio signal provided by the compressor 18 audio signals. The compressed audio signal is fed to a second transport processor 17, which divides the signal into data packets and adds some organizational data to provide noise immunity during transmission. The transported acoustic packets provided by the second transport processor 17 are fed to the multiplexer 16, which multiplies the transported audio and video packets with time. The figure shows separate transport processors 13.17 in audio and video signal processing channels. In systems where the data rate is moderate, the functions of two transport processors 13, 17 and multiplexer 16 can be combined in a single transport processor.

The system controller 21 is a variable state device programmed to agree on the work of various processing elements. Driver 21, compressors 11 and 18, transport processors 13 and 17, and speed buffer 14 may or may not work

174 674 synchronously through a common clock system as long as the correct synchronization procedure between processing elements is ensured. Both compressors 11.18 receive the time stamp values ​​PTSvd and PTSaud from the same counter 23, so the compressed output signal ensures the exact synchronization relationship between the two compressed signals.

Figure 2 shows an exemplary receiving device with a synchronization system according to the invention, in which the modulator-demodulator 200 performs the opposite function than the modulator-demodulator 15 in Fig. 1, and the speed buffers 204 and 206 perform the inverse function than the speed buffer 14 of Fig. 1. In Fig. 2 is shown a single inverse transport processor 202 that divides individual transported packets by handling and allocating individual data to a proper processing channel. The individual payloads of the transported packet signal are separated from the auxiliary data and fed to the correct processing channel, and the auxiliary data are fed to the system controller 210. In a different arrangement, a separate transport processor is included in each processing channel, which is adapted to recognize and process only data associated with individual channels.

The compressed video data from the inversion transport processor 202 is fed to a speed buffer 204 that provides the compressed video signal according to the system protocol to the video decompressor 214. Speed ​​buffer 204 receives data at a pulse or non-compliant rate and provides data on demand to the video signal decompressor 214, which produces an uncompressed video signal, then imaged or remembered in imaging or memory devices not shown.

The compressed acoustic data from the inversion transport processor 202 is fed to a speed buffer 206 which provides a compressed acoustic signal according to the system protocol to the acoustic signal decompressor 212 which produces the uncompressed acoustic signal, then reproduced or remembered in loudspeakers or storage devices. which are not shown in the picture.

The inversion transport processor 202 also provides SCR timestamps of the system reference clock signals from the transmitted auxiliary data and control signals to the clock signal generator 208, which generates the clock signals synchronously at least with the operation of the transport processor 202. These clock signals are provided to the system controller 210 that controls the synchronization processing systems.

Figure 3 shows in detail a receiver clock signal generation system comprising a regenerator clock signal generator 208. Data from the receiver modulator-demodulator 200 of Fig. 2 is fed to an inverse transport processor 202 'comprising a detector 31 auxiliary packets. The inverse transport processor 202 'separates the transported header data from the individual payloads of the transported packets. In response to the transported header data, the inverse transport processor 202 'provides usable acoustic signals and video signals for loading, e.g. to a decompression device, which is not shown in the figure, and AUX auxiliary data for the auxiliary data processing systems, which are also not shown in the figure. . The SCR timestamps of the system reference clock signals appearing in the auxiliary data are returned and stored in memory 34.

Auxiliary packet detector 31, which is, for example, a matched filter capable of recognizing the code words defining the transported auxiliary packet, comprising SCR timestamps of system reference clock signals, generates a control pulse when transported packets containing such data occur. The control pulse is used to receive and store in the latch flip 35 the count value currently displayed by the local counter 36 at a time associated exactly with the detection time. The local counter 36 is adapted to count the pulses delivered by a controlled voltage generator 37. The local counter is 36

174 674 adapted to count modulo M, which may or may not be the same number as for counter 23 in Fig. 1. If M is different from N, the difference may be used in the error equation.

LCR timestamps of local reference clock signals are removed from the path connecting latch 35 and local counter 36.

The voltage controlled generator 37 is controlled by an error signal filtered by a lowpass filter 38. This error signal is provided by the clock controller 39 and is generated as follows. Let the timestamp value sCr of the system reference clock signals occurring at time n be SCRn and the LCR timestamp value of local reference clock signals received simultaneously at latch 35, be LCRn. The 39 clock signals controller reads successive SCRn and LCRn values ​​and produces an error signal E proportional to the differences:

E => (SCRn - SCRn-1) - (LCRn - LCRn-1).

The error signal E is used to determine the state of the generator 37 with controlled voltage for a frequency seeking to equalize the differences. As mentioned earlier, the negative differences due to the modulo meter status can be ignored. The error signal generated by the clock signal controller 39 occurs, for example, in the form of a pulse width modulated signal which is converted into an analog error signal by equipping the low-pass filter 38 with analog elements.

The limitation of this system is that the counters at two ends of the system count the same frequency or even its multiples. This requires that the nominal frequency of the voltage controlled generator 37 be fairly close to clock frequency 22.

The above solution ensures fast synchronization, but may introduce a long-term LTE error proportional to the difference:

LTE = »(LCRn - LCR0) - (SCR" - CSR0), where SCR0 and LCR0 are, for example, the first occurring value of the SCR time stamp of the reference clock signal and the blocked value of the receiver counter.

Nominally, the E and LTE error signals change in discrete stages. Then, after synchronizing the system, the error signal fluctuates by one unit around the zero point. A preferred synchronization symbol is the initiation of control of a voltage-controlled generator 37 using an E error signal until a unit oscillation occurs in error signal E, and then switching to the use of the LTE long-term error signal to control a controlled voltage generator 37.

The system clock signal, supplied by the voltage controlled generator 37, is used to run at least a transport processor and speed buffers. Since it is synchronized at least frequency with clock 22, there is generally no possibility of an excess or underflow of the speed buffer due to clock timing errors.

Returning to Fig. 2, to clarify the synchronization of audio and video signals, reference should be made to the fact that the presented PTSwd video time stamp is contained in the compressed video signal associated with the specific video data. The PTSvd video time stamp indicates the relative time at which the video signal is to be imaged. Similarly, the compressed audio signal includes the PTS acoustic time stamps shown_and related to the acoustic signal reproduced at times associated with individual PTS acoustic time stamps "ud. In the receiver, the PTSaud and PTSvd timestamps cannot be compared directly to ensure audio and video synchronization, as individual samples were determined at different times. Individual values ​​of PTS time stamps_and"Di PTSvd are compared with the continuous time base of the clock signal of the receiver, supplied by the generator 37 with controlled voltage. It is

174 674 implemented by sampling the LCR time stamp of a local reference clock signal.

When the data associated with the PTSaud or PTSvid time stamp is presented, the LCR time stamp of the local reference clock signal is sampled. For example, the acoustic signal decompressor 212 sends PTSaud acoustic time stamps when the output frame is to be played. At these times, the control signal determines the state of the latch trigger 220 for sampling the LCR time stamp of a local reference clock signal with LAS values ​​for the local acoustic time stamp. Similarly, when the video signal decompressor 214 provides a video frame for imaging, it provides the PTSvid video time stamp and a control pulse for determining the state of the latch flip-flop 222 to store the current LVS value of the LVS time stamp of the local reference clock signal for local video time markers.

The LAS values ​​and corresponding PTSaud timestamp values ​​are fed to the individual input terminals of the subtraction circuit 218, which receives the signal Δα-pts according to the equation:

Δα-PTS = PTSaud - LAS

The LVS values ​​and corresponding PTSvd time stamp values ​​are connected to the individual input terminals of the subtraction system 217, which receives the signal Δν-pTs according to the equation:

Δυ-pts = PTS_vid - LVS

The Δν-p-rs and Δα-pts signals are fed to the individual input terminals of the next subtractor 219, which receives the ERRpts synchronization error signal for acoustic and video signals according to the equation:

ERRpts - Δυ-pts - Δα-pts

The synchronization of audio and video signals requires that the error of audio and video signals synchronization be reduced to zero. This means that when the difference in PTSaud and PTSvid timestamp values ​​is equal in time, in local reference units, between the occurrence of the respective PTSaud and PTSvid timestamp values, the audio and video signal will be synchronous.

Two mechanisms can be used to control the synchronization of acoustic and video signals based on the ERRpts error signal, namely skipping and repeating data sections, and processing the clock signal deviation. Skipping fixed intervals, i.e. frames of audio signals, results in advance of the audio data stream by a fixed interval relative to the video signal. Repetition, i.e. attenuation without consuming data, delays the stream of audio data by set intervals relative to the video signal. Skipping and repeating audio frames is audible in many conditions and is therefore only used for coarse synchronization control. Even short hopping or repetition can be beneficial for removing audio and video signal synchronization errors. If the acoustic frames are shorter than 40 ms, coarse control by skipping and repeating may cause synchronization errors in the range of ± 20 ms, which is within the industry standards for the synchronization of audio and video signals. However, this synchronization will deteriorate if the time base for audio processing does not match the time base of the signal source. After the coarse synchronization adjustment, changes are made to the clock frequency for processing audio signals to accurately determine the synchronization of audio and video signals.

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The ERRpts error signal is supplied to the filter and processor 216. The filtering function smooths the ERRpts error signal to minimize the effects of deviations that could otherwise be generated by the noise signal. The processing function implemented in the filter and processor 216 then allows the examination of the smoothed error signal and determines whether the hopping and repetition of the audio signal should be used to cause coarse synchronization of the audio and video signals and / or whether the frequency control of the audio signal processing should be used to cause accurate synchronization . If coarse synchronization is deemed necessary, the filter and processor 216 provide a control signal to the decompressor 212 of acoustic signals to determine the condition of the decompressor for skipping or repeating the current frame of the decompressed audio signal. Otherwise, or in addition to coarse control, if fine adjustment is considered necessary, processor 216 provides a control signal to the time base system 215 of acoustic signals to adjust the frequency of the clock signal for processing of acoustic signals.

Figure 4 is a flowchart for the system of Figure 2, detailing the processing algorithm. After starting the device, which was marked by start in step 400, in step 401 the system controls the new acoustic frame in the acoustic signal decompressor, due to the occurrence of the PTS acoustic time stamp_and"Di if the PTS acoustic time stamp_andud is detected, in step 403 it is read and the local reference clock signal is received and written. If the PTSaud audio time stamp has not occurred, in step 402 the system controls the new video frame in the video compressor due to the occurrence of the PTSvid video time stamp. If the PTSvid video time stamp occurred in step 404, this PTS video time stamp is read._Vid and the reception and storage of the LVS value of the local reference clock signal. When both PTSaud and PTS time stamps_Vid were read, in step 405 the ERRpts error signal value is calculated according to the equation:

ERRpts = Δψ-ptre - Δα-pts

The ERRpts error signal value is examined at step 406 to determine if it is greater than half the video frame interval. If it is greater than half the audio frame interval, at step 407 the ERRpts error signal is checked for polarity. If the polarity is positive, the current audio frame is repeated in step 409. If it is negative, the current audio frame skips in step 408. After skipping or repeating the frame, the system returns to the start position in order to wait for the next occurrence of the PTS time stamp.

After step 406, if the error signal value is less than half the audio frame interval, in step 410 the error is tested to determine if the ERRpts error signal value is greater than zero. If the value of this error is greater than zero, step 412 checks if the ERRpts error signal value is less than the previous error signal value. If it is smaller than the previous error signal value, it means that the system is approaching synchronization and synchronization control parameters are not changed. The system returns to the start position to wait for the next PTS timestamps. Conversely, if the error has risen above the previous error signal, in step 414 the clock processing the audio signals is adjusted to reduce its frequency.

After step 410, if the error is less than zero or negative, it is checked in step 411 to determine if the ERRpts error signal value is greater than the previous error signal value. If it is greater than the previous error signal, it also means that the system is approaching synchronization and the synchronization control parameters are not changed. Alternatively, if the current error signal is smaller than the previous error signal, in step 413 the system is still moving away from synchronization and the clock frequency for processing the audio signals is increased. After steps 412 and 413, the system returns to the state of waiting for the next occurrence of PTS timestamps. In this example, the system only performs coarse adjustments by skipping and repeating the audio frames until the audio and video signal synchronization error is reduced to less than half the audio frame interval.

In another embodiment, the filtered error signal is compared to a specific threshold level associated with the dimension of the individual audio frames. If the error signal is less than the threshold level, indicating that the timing error of the audio and video signals is smaller than the audio frame, the error signal is fed to the time base system 215 audio signals, where it is used to adjust the frequency of the clock processing and decompressing the audio signal. Conversely, if the error signal is greater than the threshold level, the error signal may be divided into an audio frame interval to determine the number of audio frames by which the audio signal is shifted relative to the video signal. The total part of the quotient is fed to the acoustic signal decompressor to put the acoustic signal decompressor into the hopping or repetition of this number of acoustic frames. The error signal polarity will determine whether audio frames should be skipped or repeated. Nominally, the decompressed data is entered into the buffer memory before output, so hopping or repeating audio frames is easy to control, allowing memory to read and write commands.

Part of the quotient is fed to the time base system 215 of acoustic signals, where it is used to adjust the clock that processes the acoustic signals to accurately synchronize the audio and video signals.

The speed of producing PTSaud acoustic time stamps is proportional to the speed of processing by the decompressor of acoustic signals. The processing speed of the acoustic signal decompressor is directly proportional to the frequency of the clock signal used to run the acoustic signal decompressor. If the clock frequency of the audio decompressor is independent of the clock used to start the video signal decompressor and is accurately adjusted, then the relative speed of PTS acoustic and video time stamps can be adjusted, and the audio and video signals accurately synchronized.

Figure 5 shows a first embodiment of a system for producing an adjustable clock signal for processing audio signals. In Fig. 5 a voltage controlled generator 503 is included in a phase locked loop comprising a 50θ phase detector and a low pass filter 501. The output of a controlled voltage generator 503 is connected to one input of a phase detector 500. The clock signal generator 208 is connected to the second input of the phase detector 500 via a 505 multiplier of the binary data rate. The phase error signal received by the phase detector 500 is filtered through low-pass filter 501. The smoothed phase error signal is applied to the input control terminal of the 503 generator with controlled voltage to bring it into a state of vibration with the same frequency and phase as the output signal of the multiplier 505 of binary data transfer rate. In this example, the system clock frequency is approximately 27 MHz and the required clock frequency for processing audio signals is approximately 1/380 clock frequency by 27 MHz. The control signal from processor 216 is applied to the input control terminal of the multiplier 505 of the binary data transfer rate to control its output frequency. This control signal is selected to represent a nominal partition coefficient of 1/380, being modulated around this value so as to determine the output state of the multiplier 505 of the binary data rate for generating

174 674 output frequency proportional to the instantaneous, required processing speed of the acoustic signals.

Figure 6 shows a second embodiment of a system for producing an adjustable clock signal for processing audio signals. In this example, the fixed clock frequency from a clock signal generator 208 or other stable generator is fed to one input of the binary data rate multiplier 600, which is controlled by the control signal from processor 216 to produce the nominal clock frequency required for processing audio signals. In response to the error signal, processor 216 changes the control signal to determine the state of the binary data rate multiplier 600, or to increase or decrease the nominal clock frequency for processing audio signals.

In a further embodiment, a controlled clock generating signal processing system, which is not shown in the drawing, includes a generator for providing a nominal, maximum clock frequency for processing the audio signals, and a gating circuit. The generator is connected to a circuit processing acoustic signals through a gating circuit. The gating circuit is controlled by processor 216 to remove some generator output pulses to provide the required average clock frequency for processing of acoustic signals.

In another embodiment, the synchronization system with the connection, indicated by the dashed arrow in Fig. 2, may be adapted to skip or repeat video frames to achieve synchronization. You can skip video frames to advance or delay video signals by audio signals, and you can skip video frames to delay or advance video signals by audio signals. However, in a preferred embodiment, the audio frames are skipped and repeated to delay and advance video signals by the audio signals.

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