Rf receiver; weighted multiple signals null out jamming signal
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1 claim: 1 independent, 0 dependent
- 1What we claim is:2195F 1. Signal processing receiver apparatus comprising: demodulator means which demodulates a plurality of modulated signals to produce a primary information signal and one or more related auxiliary information signals, all of the information signals containing an interference signal;v/eighting means which operates on the one or more auxiliary information signals, to produce a corresponding one or more intermediate signals;and, summing means which sums together the primary information signal and the one or more intermediate signals to produce a sum signal in which the interference signal is substantially nulled out;wherein the weighting means includes correlation means responsive to the one or more auxiliary information signals to produce a corresponding one or more weighting signals, and multiplier means which multiply the one or more auxiliary information signals by their corresponding weighting signals to produce the one or, more intermediate signals. Signal processing apparatus as defined in claim 1, wherein the correlation means includes means which correlates the sum signal with each of the one or more auxiliary information signals corresponding one or more weighting ,.( I 19585 3. Signal processing apparatus as defined in claim 2, wherein the correlation means includes: means which multiply the sum signal by each of the one or more auxiliary information signals to produce a corresponding one or more product signals;and, means which integrate each of the one or more product signals to produce the one or more weighting signals. 4. Signal processing apparatus as defined in claim 1, wherein: the demodulator means includes means which multiply each of the modulated signals by a pair of orthogonal carrier signals, to produce a pair of primary information signals and one or more pairs of related auxiliary information signals;the weighting means includes means which operate on each of the one or more pairs of auxiliary information signals to produce a pair of intermediate signals for each;the summing means sums together one signal of the pair of primary information signals with one signal of each pair of intermediate signals and further sums together the other signal of the pair of primary information signals with the other signal of each pair of intermediate signals, to produce a pair of sum signals;the correlation means is responsive to the pair of sum signals and the one or more pairs of intermediate signals to produce a corresponding one or more pairs of weighting signals;and Ml the multiplier means includes means which multiply each signal in the one or more pairs of auxiliary information signals by its corresponding weighting signal, to produce the one or more pairs of intermediate signals. 5. Signal processing apparatus as defined in claim 1, wherein: the plurality of modulated signals are received from a corresponding plurality of antenna elements, and each modulated signal includes a carrier signal modulated by a predetermined digital code signal;and the demodulator means includes means which multiply each modulated signal by a common local oscillator signal to produce a corresponding plurality of modulated intermediate-frequency signals, and means which multiply each modulated intermediatefrequency signal by a common, locally-generated replica of the predetermined digital code signal, to remove the digital code signal therefrom, and which produce the primary and auxiliary information signals. 6. Signal processing apparatus as defined in claim 5, wherein: the apparatus further includes duty cycle means which alternately enables and disables the correlation means to adjust the weighting signals;and the demodulator means includes means which substitute a '219585 for the signal replica whenever the duty cycle means enables the correlation means to adjust the weighting signals . 7. Signal processing .apparatus as defined in claim 1, wherein the weighting means is configured such that the sum signal produced by the summing means is a low power >' ' signal. 8. Signal processing apparatus as defined in claim 1, wherein the primary and the one or more auxiliary information signals, the one or more weighting signals, the one or more intermediate signals and,the sum signal are all baseband digital code signals. 9. Signal processing apparatus as defined in claim 1, wherein : the weighting means further includes means which operate on the primary information signal to produce a weighted primary information signal;and the summing - means includes means which sums together the weighted primary information signal and the one or more intermediate signals to produce the sum signal. / ’ 10. Signal processing receiver apparatus comprising: antenna means which supplies a plurality of rf signals each including a carrier modulated by a predetermined digital code signal and further including an ( , interference signal;demodulator means including means which multiply each rf signal by a common local oscillator signal to produce a corresponding plurality of first intermediate-frequency signals, means which multiply each first intermediatefrequency signal by a common, locally-generated replica of the predetermined digital code signal, to remove the digital code signal therefrom and produce a corres-. ponding plurality of second intermediate-frequency signals, and means which multiply each of the second intermediate-frequency signals by a pair of orthogonal reference carrier signals, to produce a pair of primary information signals and one or more pairs of related auxiliary information signals;weighting means which operates on each of .the one or more pairs of auxiliary information signals, to produce a pair of intermediate signals for each;and summing means which sums together one signal of the pair of primary information signals with one signal of each pair of intermediate signals and which further sums together the other signal of the pair of primary information' signals with the other signal of each pair of intermediate signals, to produce a pair of sum signals in which the interference signal is substantially absent;wherein the weighting means includes correlation means responsive to the one or more auxiliary information signals, which correlates the pair of sum signals with the one or more pairs of f J;e! -21.1958 intermediate signals to produce a corresponding one or more pairs of weighting signals, and multiplier means which multiplies each signal in the one or more pairs of auxiliary information signals by its corresponding weighting signal, to produce the one or more pairs of intermediate signals. 11. Signal processing apparatus as defined in claim 10, wherein the correlation means includes: means which multiply each of the pair of sum signals by each of the one or more auxiliary information signals to produce a corresponding one or more pairs of product signals;and means which integrate each of the one or more, pairs of product signals to produce the one or more pairs of weighting signals. 12. Signal processing apparatus as defined in claim 10, wherein: the apparatus further includes duty cycle means which alternately enables and disables the correlation means to adjust the weighting signals;and the demodulator means includes means which substitutes a non-replica of the predetermined digital code signal for the signal replica whenever the duty cycle means enables the correlation means to adjust the weighting signals . 13. Signal processing apparatus as defined in claim 10, wherein the weighting means is configured such that the pair of sum signals produced by -the summing means is a low power signal. 14. Signal processing apparatus as defined in claim 10, wherein the pair of primary information signals, the one or more pairs of auxiliary information signals, the one or more pairs of weighting signals, the one or more pairs of intermediate signals, and the pair of sum signals are all baseband digital code signals. 15. A signal processing method comprising steps of: demodulating a plurality of produce a primary information related auxiliary information signals modulated. signal and signals , signals to one or more all of the information containing an interference signal;weighting the one signals, to produce- a intermediate signals;and or more auxiliary information correspond ing one or more. summing together the primary information one or more intermediate signals to signal in which the interefernce substantially nulled out;s ignal and produce a signal the sum is wherein the step of weighting includes steps of producing one or more weighting response to the one or more auxiliary signals, and in signals information information signals, to -23V '21958 16. A signal processing method as defined in claim 15, •wherein the step of producing includes, a step of correlating the sum signal with each of the one or more auxiliary information signals to produce the corresponding one or more weighting signals. 17. A signal processing method as defined in claim 16, wherein the step of correlating includes steps of: multiplying the sum signal by each of the one or more auxiliary information signals to produce a corresponding one or more product signals;and integrating each of the one or more product signals to produce the one or more weighting signals. 18. A signal processing method as defined in claim 15, wherein: the step of demodulating includes a step of multiplying each of the modulated signals by a pair of orthogonal carrier signals, to produce a pair of primary information signals and one or more pairs of related auxiliary information signals;the step of weighting includes a step of operating on each of the one or more pairs of auxiliary information signals, to produce a pair of intermediate signals for each;the step of summing sums together one signal of the pair of primary information signals with one signal of each pair of intermediate signals and further sums together the other signal of each pair of intermediate *· ? -19585 the step of producing responds to the pair of sum signals and the one or more pairs of intermediate signals to produce a corresponding one or more pairs of weighting signals;and the step of multiplying includes a step of multiplying each signal in the one or more pairs of auxiliary information signals by its corresponding weighting signal, to produce the one or more pairs of intermediate signals. 19. A signal processing method as defined in claim 15, wherein: the plurality of modulated signals are received from a corresponding plurality of antenna elements, and each modulated signal includes a carrier signal modulated by a predetermined digital code signal;and the step of demodulating includes steps of multiplying each modulated signal by a common local oscillator signal to produce a corresponding plurality of modulated intermediate-frequency signals, and multiplying each modulated intermediate-frequency signal by a common, locally-generated replica of the predetermined digital code signal, to remove the digital code signal therefrom, and to produce the primary and auxiliary information signals . A signal processing method wherein: as defined in claim 19, . -25:19585 the method further includes steps of alternately enabling and disabling the step of producing to adjust the weighting signals;and the step of demodulating includes a step of substituting a non-replica of the predetermined digital code signal for the signal replica whenever the step of alternately enabling enables the step of producing to adjust the weighting signals. 21. A signal processing method as defined in claim 1.5, wherein the step of weighting is performed such that the sum signal produced in the step of summing is a low power signal. 22. A signal processing method as defined in claim 15, wherein the primary and the one or more auxiliary information signals, the one or more weighting signal, the one or more intermediate signal, and the sum signal are all baseband digital code signals. 23. A signal processing method as defined in claim 15, wherein: the step of weighting further includes a step of weighting the primary information signal to produce a weighted primary information signal;and the step of summing includes a step of summing together the weighted primary information signal and the one or more intermediate signals to produce the sum signal. 24. A signal processing receiver .apparatus substantially as hereinbefore described with reference to the accompanying drawings . 25. A signal processing hereinbefore described accompanying drawings. method substantially as with reference to the --η—·· - ηι—-Τιτή m~~~· 11 r« «i »1» i t r 5y his/their authorised AgMtft, A. J. PARK A SOM. 7,' ’γΤΤν AMWSiFrxW FFGC&SS&j? iV^ACZAC^rx.'K^k-CZX/ ^-\iZ5—k?' t\w*®zv^ <5/α. \55<ζ 33η 2735 ID. /&/ CODE #£#/./<20 In I ! V&151S Ρ VOGn -< λ ι*Αϊ»κ & $ωμ
117 paragraphs in 10 sections, as filed
The present invention fulfills this need..
SUT-O-lARY of the invention
The invention is embodied, in s signal processing receiver apparatus that combines a plurality of received signals « ; in a prescribed fashion, to null out an interference signal contained in each of them, the processing being effected without the need for an amplitude or phase angle adjustment of any rf signals. The apparatus is substantially reduced in size, weight, power consumption and cost·, yet it provides equal if not
L ' improved effectiveness in nulling out the interference signal and it has a substantially improved reliability.
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P03 2209
More particularly, the signal processing receiver apparatus of the invention receives and demodulates a plurality of signals, each for example received from a separate antenna element, to produce a primary information, signal and one or more related auxiliary information signals; The interference signal .
is contained within all of these information signals. Weighting means operates on each of the auxiliary signals, to produce a corresponding number of weighted or intermediate signals, and • summing means sums together the primary signal and the one or more intermediate signals to produce a sum signal in which the interference signal is substantially nulled out. The weighting means includes correlation means responsive to the one or more auxiliary signals, for producing a corresponding number of weighting signals, and multiplier means for multiplying the auxiliary signals by their corresponding weighting signals, to produce the intermediate signals.
In the preferred embodiment, the correlation means includes a plurality of multipliers or mixers and an equal number of integrators. Each mixer multiplies the sum signal by a separate one of the auxiliary information signals, to produce
a. product signal that is integrated by the corresponding integrator to produce one of the weighting signals.
The apparatus of the invention has particular utility where the signals received from the various antenna elements are (e.g., a pseudorandom code). In such, a system, the demodulator means down-converts each modulated signal using a common local oscillator signal and then multiplies each such down-converted carrier signals modulated by a predetermined digital code signal signal by a common, locally-generated replica of the predeter
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P03 2209 mined digital code signal. This removes the digital code signal and ultimately yields the primary and auxiliary information signals.
The apparatus of the invention preferably operates at a / Τ'·· ' predetermined duty cycle. In one part of the cycle, the apparatus functions as described above to null out the interference signal, while in another part of the cycle, the various weighting signals are maintained at their current levels.
During the latter part of the cycle, the resulting sun signal is processed further, to extract certain data from it. To ensure that the apparatus does not null out the desired information signal, a bogey Code can be substituted for the digital code replica during the former part -of the cycle, when nulling is being effected.
In another aspect of the invention, the apparatus operates as quadrature receiver, with each received modulated signal being multiplied by a pair of orthogonal carrier signals. This produces a pair of primary, information signals and one or more pairs of related auxiliary information signals. Each primary signal is summed with a different set of intermediate signals created based cn the entire set of auxiliary signals, in substantially the same manner as described above.
ζ Other aspects and advantages of the present invention will become apparent from the following description of the preferred embodiment, taken in conjunction with the accompanying drawings, which illustrate, by way of example, the principles of the invention.
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P03 2209
BRIEF DESCRIPTTON OF THE DRAWINGS
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FIG. 1 is a simplified block diagram of the receiver portion of a Global Positioning System (GPS), which includes a null processing receiver embodying the present invention; and
FIG. 2 is a simplified block diagram depicting the multiple antenna elements and the null processing receiver circuit of FIG. 1.
DESCRIPTION OF THE PREFERRED EMBODIMENT
With reference now to the drawings, and particularly to FIG. 1, there is shown a simplified block diagram of a portion of a Global Positioning System (GPS) that receives a number of modulated rf .signals from an antenna array 11 and detects one or more binary codes originally transmitted from a corresponding number of orbiting satellites. The detected codes are supplied to a GPS navigation processor, which processes the codes to determine the receiver's precise geographic location. The modulated signals received from the antenna array can sometimes contain interference in the form of a jamming signal. A null processing receiver 13 and tracking and detection circuit 15 suitably processes the modulated signals to substantially eliminate this interference from the codes supplied to the GPS navigation processor.
As shown in FIG. 1, the antenna array 11 includes N elements, designated 17a-17n. The modulated antenna signals are supplied on lines 19a-19n to the null processing receiver 13, which demodulates and combines the signals in a prescribed fashion to produce quadrature I and Q data signals. These data \
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P03 2209 signals are supplied on lines 21 and 23, respectively, to the tracking and detection circuit 15, which extracts certain information from the signals and supplies the information to the GPS navigation processor. The tracking and detection circuit, which is of conventional design, also generates various reference signals used by the null processing receiver to properly demodulate the incoming antenna signals.
In producing the quadrature I and Q data signals output on lines 21 and 23, the null processing receiver 13 combines the various antenna signals together in such a fashion that a strong interference signal (i.e., a jamming signal) contained in the antenna signals is substantially nulled out. In the past, receivers of this kind achieved this nulling by a complex weighting, i.e., amplitude and phase angle adjustment, of the received antenna signals prior to summation. This has necessarily required the use of controllably adjustable rf circuitry for gain and phase matching, which is usually highly sensitive and difficult to use and adjust.
In accordance with the invention, the null processing receiver 13 combines the information contained in the antenna signals received on lines 19a-19n without the need for any complex weighting of the rf signals. Rather, the receiver weights the various signals after demodulation and conversion to digital formats. This greatly simplifies the receiver and significantly reduces its cost, weight and power consumption.
More particularly, and with reference to FIG. 2, it will be observed that the null processing receiver 13 receives the N antenna signals on lines 19a-19n from the antenna array 11 and outputs on lines 21 and 23 the respective orthogonal I and Q data signals. In generating these I and Q signals, the receiver
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P03 2209 removes a spread spectrum pn code and any interference or jamming signal contained in the original antenna signals. The I and Q signals actually are substantially the same as those
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produced by prior receivers. The receiver of the invention, however, produces them in a substantially simpler and more reliable fashion.
The null processing receiver 13 contains both a hardware section and a software section, with a separate, identical hardware channel being provided for each antenna signal. Addressing first the hardware channel for the antenna signal supplied on line 19a from the first antenna element 17a, it will be observed that the signal is initially connected to a mixer 25a. A fixed local oscillator signal is also supplied to the mixer, via line 27 from a reference oscillator 29 (FIG. 1), to down-convert the antenna signal from L-band to approximately 60 MHz. The down-converted or intermediate-frequency (i.f.) signal is supplied on line 31a to a second mixer 33a, where it is multiplied by a locally-generated replica of the modulating pn code. This replica code, which is generated by the tracking and detection circuit 15 (FIG. 1), in a conventional fashion, is supplied to the second mixer on line 35. When the replica code and the incoming pn code are properly synchronized, the second mixer essentially strips the code from the modulated signal, leaving an i.f. carrier signal modulated only by lower data rate position information. Of course, random noise and any jamming signal in the same frequency band are superimposed on the demodulated carrier. The jamming signal can be derived , for example, from a CW jammer, a broadband jammer, a swept-fm jammer, or a pulsed jammer.
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P03 2209
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The demodulated carrier signal is output by the second mixer 33a on line 37a, for connection to both a third mixer 39a and a fourth mixer 41a. These latter two mixers multiply the carrier signal by orthogonal I and Q reference carrier signals supplied on lines 43 and 45, respectively, .from the tracking and detection circuit 15 (FIG. 1). These reference signals are properly synchronized with the incoming carrier, tracking any doppler shift that might be present, such that the two mixers provide orthogonal, analog baseband data signals. For this first channel, these two signals are designated Ιχ and Οχ.
The respective baseband Ιχ and Οχ signals are supplied on lines 47a and 49a to a pair of low pass filters 51a and 53a and, in turn, on lines 55a and 57a to a pair of analog-to-digital converters 59a and 61a. The filtered and digitized Ιχ and Οχ signals are then output on lines 63a and 65a, respectively, for further processing in the software section of the null processing receiver 13.
As previously mentioned, the modulated antenna signals supplied on lines 19a-19n from the antenna elements 17a-17n are each processed in a separate, identical hardware channel. The channels for the second through nth signals are identical to that for the first signal, described above. The various mixers, low pass filters, analog-to-digital converters, and signal lines in each channel are identified by the same reference numerals as the corresponding elements of the first channel, but followed by letters corresponding to the letter of the antenna signal.
The hardware section of the null processing receiver 13 thbs produces n pairs of orthogonal, digitized I and Q data signals, designated Ιχ-Ι<sub>η</sub> and Qj.—Q<sub>n</sub>- These data signals \
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P03 2209
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are supplied on lines 63a-63n and 65a—65n, respectively, to the software section of the receiver.
It will be appreciated that even with the filtering provided by the low-pass filters 51a-51n and 53a-53n, the digitized and Q<sub>1</sub> signals will contain significant amounts of noise, especially when a jamming signal is being received. Demodulation of the pn code provides a certain processing gain (about 40 db), but even considering this, the signal-to-noise ratio can ‘still be as low as -20 to -30 db. By weighting the various I<sub>n</sub> and Q<sub>n</sub> signals and then summing the weighted signals, the software section of the null processing receiver 13 effectively eliminates the jamming signal component from the data and thereby improves the signal-to-noise ratio to about +10 to +20 db. By performing the nulling function after demodulation, the 40 db of processing gain sharply reduces the required dynamic range.
The digitized I<sub>n</sub> and Q<sub>n</sub> signals supplied on lines 63a-63n and 65a-65n, respectively, are further processed in a microprocessor, whose function is depicted schematically in the software section of the block diagram of FIG. 2. The function is depicted using conventional hardware elements, for ease of understanding. Those of ordinary skill in the art will be readily capable of implementing these equivalent hardware functions in a microprocessor.
More particularly, it will be observed that the software section of the block diagram of FIG. 2 can be divided into two identical sections. The upper section includes a summer 67 for producing a digital I<sub>null</sub> signal in which the jamming signal has been nulled out, and the bottom section includes a summer 69 for producing an orthogonal Q<sub>nu</sub>]_j. signal --9\ c
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P03 2209 in which the jamming signal likewise has been nulled out.
Basically, each such section sums one digitized data signal
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derived from the first antenna element 17a with weighted versions of all of the digitized data signals derived from the remaining antenna elements 17b-17n. The former, non-weighted signals (i.e., I<sub>x</sub> and Q<sub>x</sub>) can be termed primary information signals, and the latter, weighted signals (i.e., I<sub>2</sub>-I<sub>n</sub> and Q2“Qn) <sup>can 136 termed</sup> auxiliary information signals.
The weighted signals supplied to the summer 67 are produced by weighting networks 70<sub>χ2</sub>-70<sub>Ιη</sub> and 70φ<sub>2</sub>~72ς<sub>η</sub>. Similarly, the weighted signals supplied to the summer 69 are produced by weighting networks 72<sub>χ2</sub>-72<sub>Ιη</sub> and 72<sub>Q2</sub>-72<sub>Qn</sub>. These networks multiply each of the 2n-2 auxiliary signals by predetermined de weighting signals, which are generated by correlating the auxiliary signals with the summer output signals, i.e., the I<sub>nuXX</sub> signal on line 21 and the Q<sub>nuXX </sub>signal on line 23.
Thus, the weighting network 70<sub>χ2</sub> for the T<sub>2</sub> channel of the upper (i.e., I<sub>nuX1</sub>) section includies a mixer 71<sub>χ2</sub> for multiplying together the I<sub>2</sub> auxiliary signal supplied on line 63b and the I<sub>nu</sub>j_i signal supplied on line 21. The resulting product is supplied on line 73<sub>χ2</sub> to a negative integrator 75<sub>χ2</sub>, integrates the signal to produce a de weighting signal output on line 77<sub>χ2</sub>· A multiplier 79<sub>χ2</sub> multiplies this weighting signal by the I<sub>2</sub> auxiliary signal, to produce the weighted or intermediate signal. The latter is output by the network 70<sub>χ2</sub> on line 81<sub>X2</sub> for coupling to the summer 67, which sums it with the Ι<sub>χ</sub> primary signal and the weighted signals for the remaining auxiliary signal channels, to produce the I<sub>nu</sub>n signal.
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P03 2209
A corresponding mixer, negative integrator and multiplier for each of the remaining weighting networks <sup>70</sup>I3<sup>-70</sup>In <sup>and 70</sup>Q2-<sup>7</sup>°Qn P<sup>rov</sup>i<sup>de</sup> corresponding weighted signals for each auxilliary channel. Thus, 2n-2 sets of ' elements are required to produce the I<sub>nu</sub>n signal. In FIG. 2, only the elements for the I<sub>2</sub>, Q<sub>2</sub> and Q<sub>n</sub> channels are shown.
The lower (i.e., Q<sub>nu</sub>]_]_) section of the right side of FIG. 2 is identical to the upper (i.e., I<sub>nU</sub>]_]_) section, except that the primary signal on line 65a is substituted for the Ij_ primary signal on line 63a. Thus, the summer 69 sums together the Q<sub>x</sub> primary signal with prescribed weighted signals for each of the auxiliary channels (i.e., I<sub>2</sub>-I<sub>n</sub><sup>and </sup>Q2<sup>-</sup>Qn)· In the specific case of the I<sub>2</sub> channel, the weighting network 72<sub>I2</sub> includes a mixer 8 3<sub>I2</sub> for multiplying together the I<sub>2</sub> auxiliary signal and Q<sub>nU</sub>]_x signal, supplied • on lines 63b and 23, respectively, to produce a product signal.
An integrator 85<sub>I2</sub> receives this product signal on line 87<sub>I2 </sub>and integrates it to produce a weighting.signal that is then supplied on line 89<sub>I2</sub> to a multiplier 91<sub>I2</sub>, which appropriately weights the I<sub>2</sub> signal. The resulting Weighted signal is supplied on line 93<sub>I2</sub><sup>to t</sup>^<sup>ie</sup> 69.
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channels, FIG. 2 depicting only the I<sub>2</sub>, Q<sub>2</sub> and Q<sub>n </sub>channels.
Operation of the software portion of the null processing receiver 13 will be better understood with reference f ., -to a particular example, in which a jamming signal is present in the and primary signals and in all of the I<sub>2</sub>-I<sub>n</sub> and Q<sub>2</sub>~Q<sub>n</sub> auxiliary signals. If, for example, all n antenna \
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P03 2209 elements 17a-17n are coplanar and the jamming signal is received from a direction normal to that plane and if the cable lengths and phase delays in the various channels all correspond exactly, then all of the 1' channel signals are equal to each other and all of the Q channel signals are equal to each other. In addition, the I channel signals are all uncorrelated with, i.e., orthogonal to, the Q channel signals· If we assume that the various weighting signals produced by the integrators <sup>75</sup>I2~<sup>75</sup>In <sup>are a3,3</sup>· initially zero, then all of the weighted signals will likewise be zero and the I<sub>nu</sub>n signal will be identical to the Ι<sub>χ</sub> signal. Since the I<sub>null</sub> and r<sub>2 </sub>signals will then both contain the jamming signal, the product signal output by the mixer 71<sub>I2</sub> will be positive and the negative integrator 75<sub>I2</sub> will begin ramping negatively. The multiplier 79<sub>I2</sub> therefore produces ’a weighted signal that is the inverse of the I<sub>2</sub> auxiliary signal, progressively increasing in amplitude. The same progression occurs in the remaining I<sub>n</sub> channels, because the jamming signal is similarly present in the auxiliary signals for those channels. The weighted signals for the Q<sub>2</sub>-Q<sub>n</sub> channels will remain at zero, because the auxiliary signals for these channels are ur.ccrrclated with the I<sub>nu</sub>n signal.
Eventually, contributions of the weighted signals will cancel out the jamming signal component of the 1^ primary signal such that it is completely .eliminated from the I<sub>null </sub>signal. When this occurs, the signal will be uncorrelated with all of the auxiliary signals and the various mixers 71j<sub>2</sub>~71<sub>In</sub><sup>a11</sup> produce product signals that are essentially zero. The weighting signals produced by the corresponding negative integrators 75<sub>I2</sub>~75<sub>In</sub> will therefore remain fixed at their current levels.
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F03 2209
The same process is followed in the Q<sub>nu</sub>n section of •the null processing receiver 13. That is, the weighting of the auxiliary signals is controllably adjusted until the Q<sub>nu</sub>xi section is uncorrelated with each of the I<sub>2</sub>“I<sub>n</sub><sup>and</sup> ®2“®n .auxiliary signals.
It should be noted that if the respective phase angles of the local oscillator signal or I and Q reference signals applied .to the various channels are different (due to cable length variations, etc.), then the resulting magnitudes of the jamming signal components of the Ii“I<sub>n</sub> and Qi~Q<sub>n</sub> signals also will be different. This has no effect on the receiver’s performance, however, because the feedback control provided by the software implemented in the microprocessor will automatically correct for this. In addition, weighting could be provided for the Ι<sub>χ</sub> and Q<sub>x</sub> signals,' as well, with no real effect on the receiver's performance.
The separate elements 17a-17n of the antenna array 11 are arranged with respect to each other such that they provide a predetermined spatial gain, with a known pattern of lobes and nulls. That is, the antenna array's gain varies as a function of direction, with a substantially reduced gain occurri?- in particular directions. The weighting process performed by the microprocessor actually adjusts the antenna null pattern to align a given null or low-gain direction with the detected source of a jamming signal.
The receiver apparatus automatically nulls out a plurality of independent jamming signals. In particular, for an apparatus used with N antenna elements, up to N-l separate jamming signals can be nulled out. The N-l spatial nulls are
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all Independently steerable, to track any relative movement of the sources of. the jamming signals.
In situations where the direction to the source of the jamming signal continuously varies, the weighting of the various <sup>s</sup> signals nust vary correspondingly. The microprocessor must update the correlation between the I<sub>null</sub> and Q<sub>nu</sub>]_i signals and the various auxiliary information signals at a rate sufficiently fast to enable tracking of the jamming source direction.
f As previously mentioned, the null processing receiver operates to null out the strongest signal received within the frequency band of interest. This operating mode is desirable, because when a jamming signal is present it is ordinarily many times stronger than the satellite signal to be detected. When a jamming signal is not present, however, care must be taken to ensure that the receiver does not null out the desired satellite signal.
Preventing the nulling of the desired satellite signal is required only when the signal-to-noise ratio exceeds 0 db and no higher powered jamming signal is present. This can effectively ‘be ensured by periodically substituting a ηαη-replica of the incoming pn code, i.e., a bogey code, for the replica code ordinarily supplied to the receiver 13 on line 35. Each hardware channel therefore will ba unable to properly demodulate the incoming signal and there is no risk that the receiver will inadvertently null it out. This periodic substitution of a non-replica code is preferably performed at a , , duty cycle of, for example, 50 percent. During alternate intervals, when the pn code replica is being supplied, the ^null <sup>and</sup> ®null signals output by the receiver 13 on lines
- 14 \
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and 23, respectively, will contain the desired satellite data.
The microprocessor whose function is represented by the hardware-equivalent elements depicted on the right side of FIG. 2 inherently implements a least mean-square error algorithm. This algorithm minimizes the power level of the I<sub>nu</sub>n and Q<sub>n</sub>ull signals. It will be appreciated that alternative schemes for weighting the various auxiliary signals can also be utilized. In addition, it will be appreciated that low-pass filters can be substituted for the integrators 75<sub>I2</sub>-75Q<sub>n</sub> and <sup>S5</sup>I2“<sup>85</sup>Qn' without a significant effect on performance, and that a dithering process can be substituted for the correlation process performed by the mixers <sup>7</sup>li2<sup>-71</sup>Qn <sup>and 83</sup>I2“<sup>83</sup>Qn·
As an alternative to the multiple feedback loops present in the software section of FIG. 2, the I<sub>nu</sub>ix and Q<sub>nu</sub>ll signals could be produced using computational techniques such as direct matrix inversion. Such techniques could minimize output power, and thus null out any jamming signals, simply by appropriately correlating the various auxiliary information signals.
It should be appreciated from the foregoing description that the present invention provides an improved null processing receiver apparatus that effectively nulls out an rf interference signal without the need for any complex weighting of rf signals. A plurality of L-band antenna signals are down converted, demodulated to baseband, and converted to corresponding digital signals in separate channels. The digital signals are then appropriately weighted and summed in such a fashion as to minimize output power and, thereby, null out any undesired interference signal.
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P03 2209
Although the present invention has been described in detail with reference to the presently preferred embodiment, those of ordinary skill in the art will appreciate that various modifications can be made without departing from the invention. Accordingly, the invention is defined only by the following claims.
Contents10
Every citation, both ways
| Document | Relation | Office | Cited during |
|---|---|---|---|
| US5361404A | Cited by | United States of America | Search report |
18 members in 11 offices
Priority claims1
| Document | Office | Kind | Date |
|---|---|---|---|
| 83892086 | United States of America | A |
Members18
| Document | Office | Kind | |
|---|---|---|---|
| WO8705705A1 | World Intellectual Property Organization (WIPO) | A1 | |
| AU7356487A | Australia | A | |
| IL81864A0 | Israel | A0 | |
| US4734701A | United States of America | A | |
| EP0265482A1 | European Patent Office (EPO) | A1 | |
| KR880701473A | Republic of Korea | A | |
| JPS63503012A | Japan | A | |
| ES2004901A6 | Spain | A6 | |
| NZ219585AThis record | New Zealand | A | |
| AU586388B2 | Australia | B2 | |
| EP0265482A4 | European Patent Office (EPO) | A4 | |
| IL81864A | Israel | A | |
| CA1311529C | Canada | C | |
| KR940002993B1 | Republic of Korea | B1 | |
| EP0265482B1 | European Patent Office (EPO) | B1 | |
| DE3750070D1 | Germany | D1 | |
| DE3750070T2 | Germany | T2 | |
| JP2796713B2 | Japan | B2 |
Numbers
- Application
- 219585
Titles
- English
- RF RECEIVER; WEIGHTED MULTIPLE SIGNALS NULL OUT JAMMING SIGNAL
Classification
- CPC, 2
- H01Q3/2617
- H01Q17/00
- IPC, 4
- G01S19 21
- H01Q3 26
- G01S3 28
- H01Q17 00