Semiconductor device and method of manufacturing the same
Abstract
A plurality of semiconductor chips (23) are attached to an adhesive layer (22) formed on a bottom plate (21). Then, first to third insulating films (31, 35, 39), first and second underlying metal layers (33, 37), first and second wiring (34, 38) and a solder ball (41) are formed together for the number of semiconductor chips (23). In this case, the first and second underlying metal layers (33, 37) are formed by a vacuum evaporation method, and the first and second recaps (34, 38) are formed by an electroplating method. Then, a laminate structure consisting of the three insulating films (39, 35, 31), the adhesive layer (22) and the bottom plate (21) is cut in an area located between the adjacent semiconductor chips (23).
Term
No projected expiry on record.
- Priority
- Filed
- Published
- Today
2 claims: 2 independent, 0 dependent
- 141 41 I 3B 3761 34 ) 34 61 37 40 ) 38
- 222 33 27 25 32 24 26 32 27 25 23
Independent claims2
8 paragraphs in 1 section, as filed
(21) Application number (22) In day (24) Running day (41) Aim. avail.
2003.10.03
2003.02.03
2003.12.03 (86) Int. Entry date and application number (85) Continuation day (30) Priority
2003.02.03, PCT / JP03 / 01061 2003.10.03
2002.02.04, JP, 026808/02 2002.04.19, JP, 117307/02 (71) Seeking (72) Inventor (74) Proxy
Casio Computer Co Ltd,
6-2, Hon-machi 1 chome, Shibuya-ku, Tokyo 151-8543, JP Takeshi Wakabayashi, Sayama-shi, Saitama 350-1305, JP Ichiro Mihara, Tachikawa-shi, Tokyo 190-0022, JP Tandbergs Patent Office AS , 0306 Oslo (54) Designation Semiconductor device and method for producing the same (57) Summary
A plurality of semiconductor chips (23) are attached to an adhesive layer (22) formed on a bottom plate (21). Then, first to third insulating films (31, 35, 39), first and second underlying metal layers (33, 37), first and second re-wires (34, 38) and a solder ball (41) are formed jointly for the number of semiconductor chips (23). In this case, the first and second underlying metal layers (33, 37) are formed by a vacuum evaporation method, and the first and second re-cables (34, 38) are formed by an electroplating method. Then, a laminate structure consisting of the three insulating films (39, 35, 31), the adhesive layer (22) and the bottom plate (21) are cut into an area located between the adjacent semiconductor chips (23).
25 members in 11 offices
Priority claims12
| Document | Office | Kind | Date |
|---|---|---|---|
| 2002026808 | Japan | A | |
| 2002026808 | Japan | A | |
| 2002117307 | Japan | A | |
| 2002117307 | Japan | A | |
| 0301061 | Japan | W | |
| 0301061 | Japan | W | |
| 0301061 | – | – | – |
| 2002026808 | – | – | – |
| 2002117307 | – | – | – |
| JP20020026808 | – | – | – |
| JP20020117307 | – | – | – |
| WO2003JP01061 | – | – | – |
Members25
| Document | Office | Kind | |
|---|---|---|---|
| CA2443149A1 | Canada | A1 | |
| WO03067648A2 | World Intellectual Property Organization (WIPO) | A2 | |
| TW200303609A | Taiwan Province of China | A | |
| AU2003244348A1 | Australia | A1 | |
| NO20034441D0 | Norway | D0 | |
| JP2003298005A | Japan | A | |
| WO03067648A3 | World Intellectual Property Organization (WIPO) | A3 | |
| JP2003318323A | Japan | A | |
| NO20034441LThis record | Norway | L | |
| MXPA03009043A | Mexico | A | |
| TW577160B | Taiwan Province of China | B | |
| KR20040030560A | Republic of Korea | A | |
| EP1472724A2 | European Patent Office (EPO) | A2 | |
| US2005098891A1 | United States of America | A1 | |
| CN1633705A | China | A | |
| KR100548668B1 | Republic of Korea | B1 | |
| US2006202353A1 | United States of America | A1 | |
| US2007042594A1 | United States of America | A1 | |
| US7190064B2 | United States of America | B2 | |
| CN101013684A | China | A | |
| CN100358118C | China | C | |
| CA2443149C | Canada | C | |
| JP4135390B2 | Japan | B2 | |
| CN100461391C | China | C | |
| US7514335B2 | United States of America | B2 |
Numbers
- Publication
- 20034441
- Publication, DOCDB
- 20034441
- Publication, EPODOC
- NO20034441L
- Application
- 4441
- Application, DOCDB
- 20034441
- Application, EPODOC
- NO20030004441
Titles2
- English
- Semiconductor device and method for manufacturing same
- Norwegian
- Halvlederanordning og fremgangsmåte for fremstilling av samme
Classification
- CPC, 54
- H01L21/6835
- H01L23/50
- H01L21/568
- H01L23/3114
- H01L23/5389
- H01L24/19
- H01L24/97
- H01L25/0655
- H01L25/105
- H01L2221/68345
- H01L2224/24226
- H01L2224/2518
- H01L2224/97
- H01L2924/01013
- H01L2924/01029
- H01L2924/01032
- H01L2924/01033
- H01L2924/01075
- H01L2924/01078
- H01L2924/15173
- H01L2924/15174
- H01L2924/15311
- H01L2924/15331
- H01L2924/18161
- H01L2924/19041
- H01L2924/19042
- H01L2924/19043
- H01L2924/19105
- H01L2924/30107
- H01L2924/01006
- H01L2224/16225
- H01L2224/32225
- H01L2224/73204
- H01L24/83
- H01L2225/1035
- H01L2225/1058
- H01L2224/05548
- H01L2224/05567
- H01L2224/13022
- H01L2224/24195
- H01L2224/32245
- H01L2224/73267
- H01L2224/92244
- H01L2924/18162
- H01L2224/83
- H01L24/24
- H01L2224/12105
- H01L2924/07811
- H01L2924/0002
- H01L2224/02166
- H01L2224/0401
- H01L2924/181
- H01L2924/14
- H01L2224/82001
- IPC, 6
- H01L21 58
- H01L21 60
- H01L21 68
- H01L23 31
- H01L23 538
- H01L25 10