Cmos polarity reversal circuit

Two P-channel MOS devices and two N-channel MOS devices are interconnected in a manner to provide a polarity reversal circuit. The circuit contains two input terminals and two output terminals. One of the output terminals is designated as a positive terminal while the other is designated as a negative terminal. Regardless of the polarity of voltage supplied to the input terminals, the positive voltage will always appear on the positive output terminal while the negative voltage will always appear on the negative output terminal.