Method and apparatus for scrambling sequence generation in a communication system.
Abstract
A wireless communications method is provided. The method includes employing a processor executing computer executable instructions stored on a computer readable storage medium to implement various acts. The method also includes generating cyclic shifts for a sequence generator by masking shift register output values with one or more vectors. The method includes forwarding the sequence generator to a future state based in part on the output values and the vectors.

Term
No projected expiry on record.
- Priority
- Filed
- Granted
- Today
12 claims: 12 independent, 0 dependent
- 1NOVEDAD DE LA INVENCION NOVELTY OF THE INVENTION Habiendo descrito el presente invento, se considera como una novedad y, por lo tanto, se reclama como prioridad lo contenido en las siguientes:Having described the present invention, it is considered as a novelty and, therefore, the content of the following is claimed as a priority: CLAIMS REIVINDICACIONES 1. - Un método de comunicaciones inalámbricas, que comprende: one. - A wireless communication method, comprising: emplear un procesador que ejecuta instrucciones ejecutables por computadora almacenadas en un medio de almacenamiento legible por computadora para implementar los siguientes actos: employ a processor that executes computer executable instructions stored on a computer-readable storage medium to implement the following actions: generar desplazamientos cíclicos para un generador de secuencia enmascarando valores de salida del registro de desplazamiento con uno o más vectores;y reenviar el generador de secuencia a un estado futuro con base, en parte, en ios valores de salida y los vectores. generate cyclic offsets for a sequence generator by masking output values from the shift register with one or more vectors;and forwarding the sequence generator to a future state based, in part, on the output values and the vectors.
- 2- The method according to claim 2. - El método de conformidad con la reivindicación 1, caracterizado porque los vectores están asociados con un polinomio de multi-bits. 1, characterized in that the vectors are associated with a multi-bit polynomial.
- 3- The method according to claim 3. - El método de conformidad con la reivindicación 1, que además comprende generar uno o más m-parámetros para el generador de secuencia. 1, which further comprises generating one or more m-parameters for the sequence generator.
- 4- El método de conformidad con la reivindicación Four. - The method according to claim 3, caracterizado porque los m-parámetros son combinados como un conjunto para formar una secuencia Gold. 3, characterized in that the m-parameters are combined as a set to form a Gold sequence.
- 5- The method according to claim 5. - El método de conformidad con la reivindicación 5 4, characterized in that the Gold sequence is formed by an exclusive OR operation of at least two sets of the parameters. 5 4, caracterizado porque la secuencia Gold es formada por una operación OR exclusiva de al menos dos conjuntos de los mparámetros.
- 6- The method according to claim 6. - El método de conformidad con la reivindicación 1, que además comprende generar el desplazamiento cíclico a 1, which also includes generating the cyclical shift to 10 through a modulo-2 adder. 10 través de una sumadora módulo-2.
- 7- The method according to claim 7. - El método de conformidad con la reivindicación 6, que además comprende generar un valor de polinomio adicional a través de la sumadora módulo-2. 6, which also includes generating an additional polynomial value through the modulo-2 adder.
- 8- The method according to claim 8. - El método de conformidad con la reivindicación 15 1, que además comprende aplicar diferentes valores de mascara al menos a dos conjuntos de m-secuencias. fifteen 1, which further comprises applying different mask values to at least two sets of m-sequences.
- 9- The method according to claim 9. - El método de conformidad con la reivindicación 1, que además comprende generar una o más funciones de salto de secuencia. 1, which further comprises generating one or more sequence jump functions. 20 10.- El método de conformidad con la reivindicación twenty 10.- The method according to claim 1, que además comprende generar una o más funciones de salto de secuencia específicas de la célula. 1, which further comprises generating one or more cell specific sequence jump functions. 11.- El método de conformidad con la reivindicación 11.- The method according to claim 1, que además comprende una o más funciones de salto de secuencia especificas del recurso. 1, which further comprises one or more resource specific sequence jump functions. 12. - The method according to claim 12. - El método de conformidad con la reivindicación 1, que además comprende generar una o más funciones de salto de cubierta ortogonal. 1, which further comprises generating one or more orthogonal roof jump functions. 13. - The method according to claim 13. - El método de conformidad con la reivindicación 1, que además comprende habilitar o deshabilitar automáticamente el salto de índice de secuencia. 1, which also includes automatically enabling or disabling the sequence index jump. 14. - A wireless communications apparatus, comprising:14. - Un aparato de comunicaciones inalámbricas, que comprende: a memory that retains instructions for generating cyclic offsets for a sequence generator by combining offset register output values with one or more vectors and starting the sequence generator in a future state based, in part, on the output values and the vectors;and a processor that executes the instructions. una memoria que retiene instrucciones para generar desplazamientos cíclicos para un generador de secuencia combinando valores de salida del registro de desplazamiento con uno o más vectores e iniciando el generador de secuencia en un estado futuro con base, en parte, en los valores de salida y los vectores;y un procesador que ejecuta las instrucciones. 15. - El aparato de conformidad con la reivindicación 14, que además comprende uno o más mparámetros que son empleados para el generador de secuencia. fifteen. - The apparatus according to claim 14, further comprising one or more parameters that are used for the sequence generator. 16. - The apparatus according to claim 15, characterized in that the m-parameters are combined as a set to form a Gold sequence. 16. - El aparato de conformidad con la reivindicación 15, caracterizado porque los m-parámetros son combinados como un conjunto para formar una secuencia Gold. 17. - The apparatus according to claim 16, characterized in that the Gold sequence is formed by an exclusive OR operation of at least two sets of the m-parameters. 17. - El aparato de conformidad con la reivindicación 16, caracterizado porque la secuencia Gold es formada por una operación OR exclusiva de al menos dos conjuntos de los m-parámetros. 18. - The apparatus according to claim 14, further comprising a modulo-2 adder to generate cyclic shifts. 18. - El aparato de conformidad con la reivindicación 14, que además comprende una sumadora módulo-2 para generar los desplazamientos cíclicos. 19. - A communications apparatus, comprising: 19. - Un aparato de comunicaciones, que comprende: Claim 19, characterized in that the m-parameters are associated with a set of sequences that are used to form a Gold sequence. reivindicación 19, caracterizado porque los m-parámetros están asociados con un conjunto de secuencias que son empleadas para formar una secuencia Gold. 21.- A computer readable medium, comprising: 21.- Un medio legible por computadora, que comprende: enmascarar los valores de salida de registro con uno o más vectores;mask the registry output values with one or more vectors;add one or more m-parameters according to the vectors;and setting a sequence generator to the future state based, in part, on the output values, the parameters, and the vectors. agregar uno o más m-parámetros de acuerdo con los vectores;y establecer un generador de secuencia al estado futuro con base, en parte, en los valores de salida, los mparámetros, y los vectores. 22. - The computer readable medium according to claim 21, characterized in that it uses an adder to execute a cyclic shift operation. 22. - El medio legible por computadora de conformidad con la reivindicación 21, caracterizado porque emplea una sumadora para ejecutar una operación de desplazamiento cíclico. 2. 3. - The computer readable medium according to claim 21, further comprising 23. - El medio legible por computadora de conformidad con la reivindicación 21, que además comprende con uno o más vectores;with one or more vectors;secuencias uno o más m-parámetros con los vectores;sequences one or more m-parameters with the vectors;and timing a sequence generator to the future state based, in part, on the output values, the parameters, and the vectors. y cronometrar un generador de secuencia al estado futuro con base, en parte, en los valores de salida, los mparámetros, y los vectores. 25. - The processor according to claim 24, further comprising generating a sequence 25. - El procesador de conformidad con la reivindicación 24, que además comprende generar una secuencia Gold a partir de dos m-secuencias. Gold from two m-sequences. 26. - A wireless communication method, comprising: 26. - Un método de comunicación inalámbrica, que comprende: generar un primer vector de enmascaramiento a partir de un polinomio del generador de secuencia y un primer desplazamiento cíclico;generating a first masking vector from a sequence generator polynomial and a first cyclic shift;generar un segundo vector de enmascaramiento a partir del polinomio del generador de secuencia y un segundo desplazamiento cíclico;y emplear el primer y segundo vectores de enmascaramiento para enmascarar los valores de salida del registro de desplazamiento a fin de obtener un primer valor de salida y un segundo valor de salida, el primer valor de salida y el segundo valor de salida empleados para generar un estado de secuencia futuro. generating a second masking vector from the sequence generator polynomial and a second cyclic shift;and using the first and second masking vectors to mask the shift register output values to obtain a first output value and a second output value, the first output value and the second output value used to generate a future sequence state. 27. - The method according to claim 27. - El método de conformidad con la reivindicación 26, que además comprende agregar los resultados del primer valor de salida para crear una primera secuencia aleatoria. 26, which also includes adding the results of the first output value to create a first random sequence. 28. - The method according to claim 28. - El método de conformidad con la reivindicación 26, que además comprende agregar los resultados del segundo 26, which also includes adding the results of the second enmascaramiento a partir del polinomio del generador de secuencia y un segundo desplazamiento cíclico;y medios para procesar el primer y segundo vectores de enmascaramiento para enmascarar los valores de salida del registro de desplazamiento para obtener un primer valor de salida y un segundo valor de salida que son empleados para generar una secuencia Gold. masking from the sequence generator polynomial and a second cyclic shift;and means for processing the first and second masking vectors to mask the output values of the shift register to obtain a first output value and a second output value that are used to generate a Gold sequence. 30. - The apparatus according to claim 29, further comprising a component for adding the results of the first output value to create a first random sequence and for adding the results of the second output value to create a second random sequence. 30. - El aparato de conformidad con la reivindicación 29, que además comprende un componente para agregar los resultados del primer valor de salida para crear una primera secuencia aleatoria y para agregar los resultados del segundo valor de salida para crear una segunda secuencia aleatoria. 31. - A computer-readable medium that comprises instructions which, when executed by a computer, cause the computer to perform operations including: 31. - Un medio legible por computadora que comprende instrucciones las cuales, cuando son ejecutadas por una computadora, ocasionan que la computadora ejecute las operaciones que incluyen: generar un primer vector de enmascaramiento a partir de un polinomio del generador de secuencia y un primer desplazamiento cíclico;generating a first masking vector from a sequence generator polynomial and a first cyclic shift;generar un segundo vector de enmascaramiento a partir del polinomio del generador de secuencia y un segundo desplazamiento cíclico;generating a second masking vector from the sequence generator polynomial and a second cyclic shift;emplear el primer y segundo vectores de enmascaramiento para enmascarar los valores de salida del registro de desplazamiento para obtener un primer valor de salida y un segundo valor de salida;employing the first and second masking vectors to mask the output values of the shift register to obtain a first output value and a second output value;add components of the first output value to create a first random sequence;and add components of the second output values to create a second random sequence. agregar componentes del primer valor de salida para crear una primera secuencia aleatoria;y agregar componentes de los segundos valores de salida para crear una segunda secuencia aleatoria. 32. - The computer readable medium according to claim 31, further comprising generating a Gold sequence from at least two msequences. 32. - El medio legible por computadora de conformidad con la reivindicación 31, que además comprende generar una secuencia Gold a partir de al menos dos msecuencias. 33. - An apparatus operating in a wireless communication system, comprising: 33. - Un aparato que opera en un sistema de comunicación inalámbrica, que comprende: a processor, configured to: un procesador, configurado para: generar un primer vector de enmascaramiento a partir de un polinomio del generador de secuencia y un primer desplazamiento cíclico;generating a first masking vector from a sequence generator polynomial and a first cyclic shift;second output value;and generating at least one pseudo-random sequence from the masking vector and the shift register output values. segundo valor de salida;y generar al menos una secuencia pseudo aleatoria a partir del vector de enmascaramiento y los valores de salida del registro de desplazamiento. 3. 4. - The apparatus in accordance with 34. - El aparato de conformidad con la 5 Claim 33, further comprising processing at least one m-sequence value according to the first and second masking vectors. 5 reivindicación 33, que además comprende procesar al menos un valor de m-secuencia de acuerdo con el primer y segundo vectores de enmascaramiento. 35. - The apparatus according to claim 34, further comprising generating at least one 35. - El aparato de conformidad con la reivindicación 34, que además comprende generar al menos un
- 1010 Gold sequence value. 10 valor de secuencia Gold. 36. - A communications method, comprising:36. - Un método de comunicaciones, que comprende: emplear un procesador que ejecuta instrucciones ejecutables por computadora almacenadas en un medio de almacenamiento legible por computadora para implementar los employ a processor that executes computer executable instructions stored on a computer-readable storage medium to implement the
- 1115 siguientes actos:fifteen following acts: generar desplazamientos cíclicos para un generador de secuencia;y reenviar secuencias pseudo aleatorias dentro del generador de secuencia estableciendo una etapa del registro generate cyclic offsets for a sequence generator;and forward pseudo-random sequences within the sequence generator establishing a registration stage
- 1220 de desplazamiento a un estado futuro deseado. twenty of displacement to a desired future state. 37. - The method according to claim 37. - El método de conformidad con la reivindicación 36, caracterizado porque el estado futuro depende de la generación de un polinomio, un número de pasos de reenvío requeridos, o un estado inicial. 36, characterized in that the future state depends on the generation of a polynomial, a number of required forwarding steps, or an initial state. 38.- El método de conformidad con la reivindicación 38.- The method in accordance with the claim 36, que además comprende utilizar uno o más m-parámetros para generar una secuencia consecutiva de bits que ocurre antes que el estado futuro deseado y emplear los bits e inicializar 36, which further comprises using one or more m-parameters to generate a consecutive sequence of bits that occurs before the desired future state and employing the bits and initializing 5 the displacement registration stage. 5 la etapa de registro de desplazamiento.
Independent claims12
305 paragraphs in 18 sections, as filed
(54) Title: METHOD AND APPARATUS FOR GENERATION OF MIXING SEQUENCE IN A COMMUNICATION SYSTEM.
(54) Title: METHOD AND APPARATUS FOR SCRAMBLING SEQUENCE GENERATION IN A COMMUNICATION SYSTEM.
(57) Summary
A wireless communication method is provided; the method includes employing a processor that executes computer executable instructions stored on a computer readable storage medium to implement various acts; the method also includes generating cyclic offsets for a sequence generator by masking offset register output values with one or more vectors; the method includes forwarding the sequence generator to a future state based, in part, on the output values and the vectors.
(57) Abstract
A wireless Communications method is provided. The method ineludes employing a processor executing Computer executable instructions stored on a Computer readable storage medium to implement various acts. The method also ineludes generating cyclic shifts for a sequence generator by masking shift register output values with one or more vectors. The method ineludes forwarding the sequence generator to a future State based in part on the output valúes and the vectors.
METHOD AND APPARATUS FOR GENERATION OF MIXING SEQUENCE IN
A COMMUNICATION SYSTEM
FIELD OF THE INVENTION
The following description generally relates to wireless communication systems, and more particularly to the generation of mixing sequences in a wireless communication system.
BACKGROUND OF THE INVENTION
Wireless communication systems are widely deployed to provide various types of communication content such as voice, data, and so on. These systems may be multiple access systems with the ability to support communication with multiple users by sharing available system resources (eg, bandwidth and transmission power). Examples of such multiple access systems include code division multiple access (CDMA) systems, time division multiple access systems (TDMA), frequency division multiple access systems (FDMA), Long Term Evolution systems (LTE)
3GPP including E-UTRA, and Orthogonal Frequency Division Multiple Access (OFDMA) systems.
A frequency division multiplexing (OFDM) communication system effectively divides the bandwidth of the general system into multiples (N<sub>F</sub>) subcarriers, which can also be referred to as frequency subchannels, tones, or frequency repositories.
For an OFDM system, the data to be transmitted (i.e. the information bits) is first encoded with a particular encoding scheme to generate encoded bits, and the encoded bits are grouped into multi-bit symbols which are then mapped to mod symbols. Each modulation symbol corresponds to a point in a signal constellation defined by a particular modulation scheme (eg M-PSK or M-QAM) used for data transmission. In each time interval that may depend on the bandwidth of each frequency subcarrier, a modulation symbol can be transmitted in each of the N<sub>F</sub> frequency subcarriers. Therefore OFDM can be used to combat Inter-Symbol Interference (ISI) caused by frequency selective fading, which is characterized by different amounts of attenuation across the system bandwidth.
Generally, a multiple access wireless communication system can concurrently support communication for multiple wireless terminals that communicate with one or more base stations through transmissions on the forward and reverse links.
The forward link (or downlink) refers to the communication link from base stations to terminals, and the reverse link (or uplink) refers to the communication link from terminals to base stations. This communication link can be established through a single input single output, multiple input single output or multiple input multiple output (MIMO) system.
A MIMO system employs multiple (NT) transmit antennas and multiple (NR) receive antennas for data transmission. A MIMO channel consisting of the NT transmit antennas and NR receive antennas can be decomposed into NS independent channels, which are also referred to as space channels, where N<sub>s</sub> <min {N<sub>T</sub>, N<sub>R</sub>}.
Generally, each of the NS independent channels corresponds to a dimension. The MIMO system can provide improved performance (eg higher output and / or higher reliability) in case the additional dimensions created by the multiple transmit and receive antennas are used. A MIMO system also supports time division duplex (TDD) and frequency division duplex (FDD) systems. In a TDD system, the forward and reverse link transmissions are in the same frequency region so that the principle of reciprocity allows estimation of the forward link channel from the reverse link channel. This allows an access point to extract the transmission beamforming gain on the forward link when multiple antennas are available at the access point.
In Long Term Evolution (LTE) systems, Gold sequences are used for various scrambling purposes such as uplink (UL) VRB-to-PRB mapping, sequence mixing (virtual resource block and physical resource block) , random sequence generation, index jump of UL demodulation reference signal (RS) (DM), and so on. The sequences can be individualized by setting the initial states of the component shift registers to different values. In some cases, such as decoding the physical broadcast channel (PBCH), multiple sequence-time shift hypotheses need to be tested, which requires multiple cyclical shifts of the same sequence to be generated at the same time. Another common problem with the accepted Gold sequence design is that the first few dozen sequence bits are not random enough. Therefore, sequences that are initialized with similar values can produce similar sequence bits up to the length of the shift registers of the component sequence generator. This is compounded by the fact that some of the generated sequences are relatively short, therefore the insufficiently random starting segment is not an insignificant portion of the sequence length.
SUMMARY OF THE INVENTION
The following presents a simplified summary in order to provide a basic understanding of some aspects of the subject matter claimed. This summary is not an extensive overview and is not intended to identify key / critical elements or to delineate the scope of the subject matter claimed. Its sole purpose is to present some concepts in a simplified form as a prelude to the more detailed description below.
Systems and methods provide concurrent random sequence generation for multiple cyclical shift hypotheses. In order to improve scrambling, sequence generators can be fast-forwarded to a specified future state, where respective sequence bits from the generators can be output from there. To execute this fast forward function efficiently, it is beneficial to provide a method that can jump to a future state in a substantially rapid manner. Different cyclic shifts of Gold sequences can be generated by masking the shift register output values with desired vectors and modulo-2 by adding the result, for example. This method can also be used to generate multiple cyclic shift copies of the Gold sequence at approximately the same time, if desired. The masking vector can be derived from the polynomial of the sequence generator and the desired cyclic shift. In general, the mask for two-component m-sequences of the Gold sequence generator may be different. Sequence and scrambling components can also be paralleled to improve system performance.
To achieve the above as well as related purposes, some illustrative aspects are described here in connection with the following description and the attached figures. However, these aspects are indicative of a few of the various ways in which the principles of the claimed subject matter can be employed, and the claimed subject matter is intended to include all of those aspects and their equivalents. Other advantages and novel features may become apparent from the following detailed description when considered in conjunction with the figures.
BRIEF DESCRIPTION OF THE FIGURES
Figure 1 is a high-level block diagram of a system that employs mixing sequence components in a wireless communication environment.
<td colspan="4">Figure 2 is a system illustrating a generator</td>
<td>sequence</td><td>exemplary mixed</td><td>for</td><td>a system</td>
<td>wireless.</td><td></td><td></td><td></td>
<td>The figure</td><td>3 illustrates aspects</td><td colspan="2">of processing</td>
Exemplary sequence for a wireless communication system.
Figure 4 illustrates an alternative mixing sequence generator.
Figure 5 illustrates a wireless communication method for generating mix sequences.
Figure 6 illustrates an exemplary logic module for a wireless protocol.
Figure 7 illustrates an exemplary logic module for an alternative wireless protocol.
Figure 8 illustrates an exemplary communications apparatus employing a wireless protocol.
Figure 9 illustrates a multiple access wireless communication system.
Figures 10 and 11 illustrate exemplary communication systems.
DETAILED DESCRIPTION OF THE INVENTION
Systems and methods are provided to generate random sequences for wireless communications in an efficient manner. In one aspect, a wireless communication method is provided. The method includes employing a processor that executes computer executable instructions stored on a computer readable storage medium to implement various acts. The method also includes generating cyclic offsets for a sequence generator by masking the offset register output values with one or more vectors. The method includes forwarding the sequence generator to a future state based, in part, on the output values and vectors.
Referring now to Figure 1, mixing sequence components are used for a wireless communication system. System 100 includes one or more base stations 120 (also referred to as a node, evolved node B - eNB, femto station, peak station, and so on) which may be an entity with the ability to communicate over a wireless network 110 with a second device 130 (or devices). For example, each device 130 may be an access terminal (also referred to as a terminal, user equipment, mobility management entity (MME), or mobile device). Base station 120 communicates with device 130 through downlink 140 and receives data through uplink 150. Said designation as uplink and downlink is arbitrary, since device 130 can also transmit data through the downlink and receive data through uplink channels. It is observed that although two components are shown
120 and 130, more than two components can be used in the network
110, where said additional components can also be adapted for the wireless protocols described here. As shown, a mixing sequence component 160 and
170 respectively (or components) is provided to generate random Gold (or other type) sequences in an efficient manner. It is noted that as used herein, the term mixing sequence component 160 or 170 may include aspects of the generator and / or decoder. For example, component 160 could be a random sequence generator, while component 170 could be a random sequence decoder, for example.
In general, mixing sequence components 160 and 170 provide concurrent random sequence generation for multiple cyclic shift hypotheses. In order to improve randomization, the sequence generators (or other components) can be fast advanced to a specified future state (as shown and described with respect to Figure 2 below), where respective sequence bits of the generators they can be issued from there. To execute this fast-forward function efficiently, it is beneficial to provide a method that can jump to a future state in a substantially rapid manner. A plurality of different cyclic shifts of Gold sequences can be generated by masking shift register output values with desired vectors and modulo-2 adding the result, for example. This method can also be used to generate multiple cyclic shift copies of the Gold sequence at approximately the same time, if desired. The masking vector can be derived from the polynomial of the sequence generator and the desired cyclic shift. In general, the mask for two-component m-sequences of the Gold sequence generator may be different. The sequence and scrambling components can also be paralleled to improve system performance as illustrated in an exemplary system shown in Figure 4. As will be described in more detail below, various m-codes can be selected to determine a desired fast-forward starting point for sequence generators. Various gcodes can be selected to generate different random sequences for different base stations 120, for example.
It is noted that system 100 can be used with an access terminal or mobile device, and can be, for example, a module such as an SD card, a network card, a wireless network card, a computer (including laptop computers , desktop computers, personal digital assistants (PDAs)), mobile phones, smartphones, or any other convenient terminal that can be used to access a network. The terminal has access to the network through an access component (not shown). In one example, a connection between the terminal and the access components may be wireless in nature, the access components of which may be the base station and the mobile device is a wireless terminal. For example, the terminal and base stations can communicate using any convenient wireless protocol, including but not limited to Access.
Time Division Multiple (TDMA), Multiple Access per
Code Division (CDMA), Multiple Access by Division
Frequency (FDMA), Frequency Division Multiplexing
Orthogonal (OFDM), OFDM FLASH, Multiple Access by Division of
Orthogonal Frequency (OFDMA), or any other convenient protocol.
The access components can be an access node associated with a wireless network or a wired network.
For that purpose, the access components may be, for example, a router, a switch, or the like. The access component may include one or more interfaces, for example, communication modules to establish communication with other network nodes. Additionally, the access component may be a base station (or wireless access point) in a cellular type network, where base stations (or wireless access points) are used to provide wireless coverage areas to a plurality of subscribers. Such base stations (or wireless access points) can be accommodated to provide contiguous coverage areas to one or more cell phones and / or other wireless terminals.
Referring now to Figure 2, a system
200 illustrates an exemplary sequence generator for a wireless system. System 200 illustrates a PRN mix sequence generator structure. System 200 is flexible to allow generation of mixing sequences for current applications and also for new applications that may be added in the future. In various cases of the transmission signal generation process, mixing is applied. This is to avoid persistent interference between different signals and to avoid unwanted signal spectrum properties. For some signals it is beneficial to have mixing associated with the resource element occupying the signal, for other types of mixing sequence applications it is desirable to have the mixing sequence decoupled from the resource element busy. In this regard, mixing sequence generation is provided that can be used for substantially all applications.
A binary m-sequence can be used as the basic mix code. For different purposes, different cyclic shifts of the same sequence are used. The underlying assumption is that the different shifts in the same sequence are sufficiently uncorrelated. The length of the shift register sequence should be long enough. In the example shown at 200, assume a 50-bit shift register, which has the ability to generate a sequence with a period of 2<sup>50</sup> . The generation polynomial G (x) = x<sup>50</sup> + g ^ x<sup>49</sup> + j48 ^<sup>48 </sup>+ ... + g<sub>2</sub>x<sup>2</sup> + gix +1 can be the same for all applications, saving you from having to reconfigure the shift registers. The shift register can be set to the same initial stage for each application, if desired. Different cyclical shifts can be achieved when module-2 adds some register outputs, where the choice of which register outputs to include in the sum controls the selection of the cyclical shift. An exemplary architecture is provided through system 200. It is noted that each of the polynomial coefficients (in the reference number
210) g<sub>49</sub>. . . gr<sub>2</sub>, gi represents a connection in case the coefficient is '1' and no connection in case the coefficient is '0'.
As noted above, the mixing sequences can be individualized by choosing the registry outputs. Because shift registers (or another number) are available, 50 selector bits can be provided, producing 2<sup>50 </sup>different displacements. The allocation of the 50-bit control is defined as follows. The 50 bits are divided into the first 2 bits that are reserved, the next 4 bits that are the channel / signal type, and the remaining 44 bits that are assigned in a channel / signal specific way.
This is shown in Table 1 below.
TABLE 1
Batch Selector Bit Designation
<td>Countryside</td><td>Assignment of selector of sequence</td><td>Number of bits</td>
<td>Reserved</td><td> ^48.. .®49</td><td> 2</td>
<td>Kind of channel / signal</td><td>ffl<sub>44</sub>. . ,®<sub>4</sub>7</td><td> 4</td>
<td>Fields specific to channel / signal</td><td> ®0.. .^43</td><td> 44</td>
The channel / signal types are listed as listed in Table 2 below:
TABLE 2
Channel Type Value Assignment
<td>Channel / Signal</td><td>Channel type value</td>
<td>PRS (CP normal)</td><td> '0000'</td>
<td>PRS (CP extended</td><td> '0001'</td>
<td>CP)</td><td></td>
<td>PDCCH</td><td> '0010'</td>
<td>PCFICH</td><td> '0011'</td>
<td>PHICH</td><td> '00100'</td>
<td>PBCH</td><td> '0101'</td>
<td>PMCH</td><td> '0110'</td>
<td>PDSCH</td><td> '0111'</td>
<td>PUSCH</td><td> '1000'</td>
<td>Other</td><td>Reserved</td>
It is observed that the periodicity of lOms can be assumed for: PRS (normal and extended CP), PDCCH, PDSCH,
PUSCH. Also, the 40ms periodicity can be assumed to
PBCH. For PCFICH, PHICH and PMCH a decision is made on the periodicity of mixing. Channel specific fields can be defined separately for each type of channel as shown below.
TABLE 3
Specific fields of the PRS signal (normal CP)
Specific fields of the PRS signal (normal CP):
<td>Parameter</td><td>Number of bits</td>
<td>SSC ID</td><td> 8</td>
<td>Antenna ID</td><td> 2</td>
<td>Subframe ID</td><td> 4</td>
<td>ID symbol</td><td> 4</td>
<td>Frequency + / -</td><td> 1</td>
<td>Reserved</td><td> 25</td>
TABLE 4
Specific fields of the PRS signal (extended CP)
Specific fields of the PRS signal (extended CP):
<td>Parameter</td><td>Number of bits</td>
<td>Cell ID</td><td> 9</td>
<td>Antenna ID</td><td> 2</td>
<td>Subframe ID</td><td> 4</td>
<td>ID symbol</td><td> 4</td>
<td>Frequency + /</td><td> 1</td>
<td>Reserved</td><td> 24</td>
TABLE 5
Specific fields of the PDCCH Channel
Specific fields of the PDCCH Channel:
<td>Parameter</td><td>Number of bits</td>
<td>Cell ID</td><td> 9</td>
<td>Subframe ID</td><td> 4</td>
<td>ID symbol</td><td> 4</td>
<td>Reserved</td><td> 27</td>
TABLE 6
Specific fields of the PDSCH Channel
Specific fields of the PASCH Channel
<td>Parameter</td><td>Number of bits</td>
<td>Cell ID</td><td> 9</td>
<td>EU MAC ID</td><td> 16</td>
<td>Current ID</td><td> 1</td>
<td>Code block id</td><td> 6</td>
<td>Reserved</td><td> 12</td>
<td>I know</td><td>watch</td><td>that</td><td>table</td><td>previous</td><td>assume</td><td>the</td>
<td>possibility of</td><td>have a</td><td>mixed</td><td>PDSCH</td><td>which is a</td><td>function</td><td>of the</td>
<td>Cell ID as well</td><td>like of</td><td>EU ID_MAC</td><td></td><td></td><td></td><td></td>
TABLE 7
Specific fields of the PBCH Channel
Specific fields of the PBCH Channel:
<td>Parameter</td><td>Number of bits</td>
<td>Cell ID</td><td> 9</td>
<td>Frame ID</td><td> 2</td>
<td>Subframe ID</td><td> 4</td>
<td>ID symbol</td><td> 4</td>
<td>Reserved</td><td> 25</td>
TABLE 8
Specific fields of the PBCH Channel
Specific fields of the PCFICH Channel
<td>Parameter</td><td>Number of bits</td>
<td>Cell ID</td><td> 9</td>
<td>Subframe ID</td><td> 4</td>
<td>Reserved</td><td> 31</td>
TABLE 9
Specific fields of the PBCH Channel
Specific fields of the PHICH Channel:
<td>Parameter</td><td>Number of bits</td>
<td>Cell ID</td><td> 9</td>
<td>XX</td><td>XX</td>
<td>Reserved</td><td>XX</td>
TABLE 10
Specific fields of the PMCH Channel
Specific fields of the PMCH Channel:
<td>Parameter</td><td>Number of bits</td>
<td>Cell ID</td><td> 9</td>
<td>XX</td><td>XX</td>
<td>Reserved</td><td>XX</td>
TABLE 11
Specific fields of the PUSCH Channel
Specific fields of the PUSCH Channel:
<td>Parameter</td><td>Number of bits</td>
<td>EU MAC ID</td><td> 16</td>
<td>Code block id</td><td> 6</td>
<td>Reserved</td><td> 22</td>
The sequence generator can be reset at the start of each mixing application. This can be done once at each symbol for the downlink RS (DL), and once for the code block in the case of PDSCH, for example. For binary encoded bit mixing, one mix bit can be taken for each encoded bit. For the generation of the sequences
PRS, two mixing sequences can be generated, distinguished by the Frequency +/- bit. The first sequence can be used to mix the 'positive frequencies' starting at the smallest positive frequency and mapped to the DL RS tone indices in increasing frequency order. The second sequence can be used to mix the 'negative frequencies' starting from the highest negative frequency (for example, closest to
DC) and mapped to DL RS tone indices in order
<td>opposite.</td><td>This allows</td><td>that the PRS in the</td><td>center</td><td>the</td><td>band</td><td>of the</td>
<td>system</td><td>be the same</td><td>without regard to</td><td>The width</td><td>of</td><td>band</td><td>of the</td>
<td>system.</td><td>Also not</td><td colspan="2">requires generation</td><td>of</td><td>all</td><td>the</td>
<td colspan="2">mixing sequence</td><td>in each symbol</td><td>OFDM that</td><td colspan="2">carries the</td><td>PRS</td>
for the possible length of the PRS. The proposed structure allows the use of a simple shift register to generate the mixing sequences. This assumes that the shift register is timed as many times as required for the longest mix sequence. For shorter sequences, the initial part corresponding to the appropriate length is taken. It is also possible to have multiple cases of the shift register, one for each application, which can adjust some hardware architectures more conveniently.
Returning to Figure 3, aspects of exemplary sequence processing 300 are illustrated. In an LTE system, in particular, the LTE uplink (UL), the resources used for the demodulation reference signal (DM
RS) and the various spreading signals of the control channel are to be scrambled. The following describes mechanisms and techniques to achieve this goal using various pseudo-random sequences and deterministic sequences. Optionally, techniques are described to support easy-to-implement cell planning.
Alternatively, uncoordinated allocation can also be supported by the mechanisms described here.
Various aspects of uplink sequence (UL) hopping are provided. The following design criteria can be applied:
• Simple arithmetic to calculate assignment parameters of the Physical Uplink Control Channel (PUCCH) and Shared Physical Uplink Channel (PUSCH) in each symbol.
• Flexible PUCCH cyclic shift orthogonal coverage assignment. The jump pattern is independent of the general allocation strategy (mapping
CS-OC). The UE determines its own set of initial parameters; It does not need to determine what strategy was used to optimize the cyclic shift and the allocation of the orthogonal cover.
• A single set of rules for the cell specific jump or the resource specific jump case.
At 310 in Figure 3, sequence jump considerations are provided. For PUCCH and PUSCH, a set of possible reference signal sequences (RS) denoted by their sequence index can be defined for each possible resource block allocation (RB) case.
In the case of the PUCCH, the same set of sequences can be used to transmit control information.
Assume the following:
· For N<sub>RB</sub> <5, there are 30 sequence indices available. There are 30 groups of sequences, with one sequence in each group (numbers other than
30) • For N<sub>ñS</sub> > 5, there are 60 sequence indices available. There are 30 sequence groups with two sequences in each group.
Assume that there is a simple downlink signaling (DL) bit informing the user equipment (UE) as to whether or not the sequence jump should be used. In the following, skip and non-skip sequence cases are described separately.
With sequence skip disabled, the UE uses the PUSCH sequence index RS corresponding to the signaled sequence group.
• For N<sub>RB</sub> <5, the UE uses a single sequence index (one of 30).
• For N<sub>RB</sub> > 5, the UE uses the first sequence index in the signaled sequence group in the first slot in the sub-frame and uses the second sequence index in the signaled sequence group in the second slot in the sub-frame. Therefore, the UE alternates between the two sequences defined for the sequence group.
If you want to have more sequences (for example, more than two) per group of sequences for a certain N<sub>RB</sub> > 5 then the UE cycles through the sequence indices in a similar way. If there are m indices per sequence group, for example, the set of indices is {k<sub>Oh</sub> ki ... k<sub>m</sub>-i) in a given sequence group, then in the nth slot of a frame, the UE would use the sequence with the kimodm index · In the first slot of a frame, ko would be used.
When sequence skipping is disabled, the UE uses a simple sequence based on the group of flagged sequences for RS and modulation of control data. The generic mix sequence generator (Gold sequence) can be used to generate the index jump sequence. With sequence skip enabled, the
UE uses the PUSCH sequence index RS as determined by the output of the mix sequence generator. The sequence generator can be initialized at each subframe boundary and timed once in each slot, for example. At initialization, the 33-bit seed sequence is constructed according to the following:
<td>Bits initiator</td><td> &32 . . . ¿30</td><td> ¿2 9 · ¿27</td><td> ¿26· ·</td><td> • ¿13</td><td> ¿12 · · · ¿9</td><td> ¿8-</td><td>. .or</td>
<td>Value</td><td> 0,0,0</td><td> 0,0,1</td><td> 0,0,.</td><td> ..,0</td><td>Subframe ID</td><td>ID</td><td>cell</td>
Note that because the subframe ID is part of the initialization bits, the resulting sequence period is one frame (lOms). Assume that the output of the mixing generator is s<sub>0</sub>, Yes,. . . sg.<sub>or</sub> where u is the number of slots per frame, then the PUSCH sequence index ki in slot i is determined as ı 7
Σ ii + l V / = o • 2 'mod (»í -30) (for example, taking consecutive bytes from the mixing sequence, one for each slot and taking the corresponding integer value modulo the total number of sequence indices) where m is the number of sequence indices per sequence group. Note that:
With sequence skip enabled, the UE uses the RS of the PUCCH and the control sequence index as determined by the mix sequence generator output. The sequence generator is initialized at each sub-frame boundary and timed once for each symbol, for example. At initialization, the 33-bit seed sequence is constructed according to the following:
<td>Bits initializer</td><td> ¿32- . -¿30</td><td> ¿29 - - ¿27</td><td> ¿26- -</td><td> - ¿13</td><td> ¿12· · · ¿9</td><td> ¿8·</td><td> . .¿0</td>
<td>Value</td><td> 0,0,0</td><td> 0,0,1</td><td> 0,0,.</td><td> ..,0</td><td>Subframe ID</td><td>ID_</td><td>cell</td>
Note that the subframe ID is part of the initialization bits, the resulting sequence period is one frame (lOms). Assume that the output of the mixing generator is So, Yes,. .. Sg.<sub>v</sub> where v is the number of symbols per frame, then the CGS sequence index of the PUCCH k¿ in ('λ the symbol i is determined as
<img file="MX2010010221A_D0001.tif" />
mod30. Note v = oy that from the sequence index generation purposes the RS and control symbols within the PUCCH are not distinguished.
At 320 of FIG. 3, cell-specific offset hopping considerations are described. In general, the cyclic offset jump is not provided for the RS of the PUSCH. The cyclic offset is either explicitly signaled in the assignment or is otherwise set to a static value transmitted by higher layer signaling. For the purpose of inter-cell interference randomization, a cell-specific cyclic shift compensation sequence can be provided. In order to simplify implementation, assume that for the purposes of cell-specific cyclic shift application, the RS and control symbols within the PUCCH are not distinguished.
Assume that li is the cyclic shift compensation at symbol i. Assume that li e {0,1,2, ..., 11}. And if the cyclic shift in a symbol is before applying the cell specific cyclic shift compensation, then it will be (li + Ui) modl2 after applying the cell specific cyclic shift compensation. The following section describes two options for generating the li.
In this case, the cyclic shift compensation pattern depends on the cell_ID, the cell specific cyclic shift compensation can be determined through the output of the mix sequence generator. The sequence generator can be initialized at each sub-frame boundary and timed once at each symbol. At initialization, the 33-bit seed sequence can be constructed according to the following:
<td>Bits initializer</td><td>bs2- ·. ¿30</td><td> ¿29 · · ¿27</td><td> ¿26· ·</td><td> ¿13</td><td> ¿12 ... ¿9</td><td> ¿8-</td><td>. .or</td>
<td>Value</td><td> 0,0,0</td><td> 0,1,0</td><td> 0,0,</td><td> ...,0</td><td>Subframe ID</td><td>ID</td><td>cell</td>
Note that because the subframe ID is part of the initialization bits, the resulting sequence period is one frame (lOms). Assume that the output of the mixing generator is s<sub>0</sub>, Yes,. . . s<sub>8</sub>.<sub>v</sub> where v is the number of symbols per frame, then the cell-specific cyclical shift compensation li in symbol i is determined as /, = ^ í<sub>8</sub>,<sub>(+ í)</sub>-2<sup>OR</sup> modl2, for example, U = or J taking consecutive bytes from the mix sequence, one for each symbol and taking the corresponding integer value modulo 12.
Cyclical shift compensation is generally the sum of two components; the first is a pseudo-random sequence that depends on the ID_SSC (secondary sequence) while the second is a deterministic sequence that depends on the ID_PSC (primary sequence).
The purpose of this construct is to minimize cyclic shift alignments in cells with the same ID_SSC. The pseudo-random cyclical shift compensation component ti is determined by the output of the mix sequence generator. The sequence generator is initialized at each sub-frame boundary and timed once at each symbol, for example. At initialization, the 33-bit seed sequence can be constructed according to the following:
<td>Bits initializer</td><td>32- · Άθ</td><td>¿29 · · · h> 27</td><td> -£>26 · ·</td><td> •¿13</td><td>Bl2 · · · & 9</td><td>b<sub>8</sub>.</td><td>. .b<sub>0</sub></td>
<td>Value</td><td> 0,0,0</td><td> 0,1,1</td><td> 0,0,</td><td> ...,0</td><td>Subframe ID</td><td>ID_</td><td>_SSC</td>
Note that because the subframe ID is part of the initialization bits, the resulting sequence period is one frame (lOms). Assume that the output of the mixing generator is s<sub>0</sub>, yes,. . . s<sub>3</sub>.<sub>v</sub> where v is the number of symbols per frame, then the cell-specific cyclic shift compensation in symbol i is determined as /, = ^ s<sub>g</sub>.<sub>í + A</sub>-2<sup>to</sup> modl2, for example, U = o) taking the consecutive bytes of the mixing sequence, one for each symbol and taking the corresponding integer value mod 12. The deterministic cyclic shift compensation value that depends on the ID_PSC rj 0 <j < 12 is defined as:
'(0,0,0,0,0,0,0,0,0,0,0,0) (r<sub>0</sub>, ri, ..., r<sub>21</sub>)= ^(0,1,3,7,2,5,11,10,8,4,9,6) :0,12,10,6,11,8,2,3,5,9,4,7)
If ID PSC = 0
If ID PSC = 1
If ID PSC = 2
Note that a single formula is provided to generate the above sequences. Also note that the sum of rj for ID_PSC = 1 and ID_PSC = 2 is zero modulo 13. For any pair of ID_PSC, the element level offset differences are different. The cell-specific cyclical shift compensation li at symbol i is determined as + c<sub>nillllíl</sub>) modl2
At 330 of Figure 3, the resource specific cyclic shift jump is provided. The resource specific cyclic scroll jump can be executed on a per symbol basis. The jump pattern is based on a decimation of factor 3. The resource-specific cyclic shift Cj in control data symbol j is determined as = 2 - ((J_c<sub>to go</sub>'' 2j + l) -3<sup>r</sup>'<sup>ym</sup>’<sup>d</sup>') niod7 + ¿:<sub>0</sub>mod2. At the first symbol in each box, j = 0. After that, j is incremented by one for each control symbol, but is not incremented for RS symbols. The specific cyclical shift of the resource c<sub>k</sub> in the symbol RS k it is determined as q = 2 - (([_ r<sub>Cl</sub>Z2j + 1) -3 ^^^^^) 111017 + (^ 1110 (12. At the first RS symbol in the box, k = 0. After that, k is incremented by one for each RS symbol but is not incremented for control data symbols.
At each slot boundary, the cyclic shift assignment is compensated according to a deterministic pattern. The purpose of this is to maximize the distance in a new slot between resources that were sharing the same cyclic shift resource in the previous slot. The resource jump is accomplished by adding a slot and the cyclic offset compensation depending on the resource cl; for slot i and orthogonal cover index j. The cyclic shift compensation d, for the slot i and the orthogonal cover index j is determined as:
í 0 if j = 0 i (2 / ü + l)) modl2 <sub>if}> 0</sub>
For which the orthogonal cover index j is mapped to spreading sequences as shown below:
j - 0 +1 + I + 1 +1 j = I +1 -1 +1 -1 1.7 = 2 +1 + 1-ll [/ = 3 + 1-1-1 + 1
The cyclic shift compensation d, for the slot i and the orthogonal cover index j is determined as ¢ 7 / = (4 · i · / ') mod 12
For which the orthogonal cover index j is mapped to spreading sequences as shown below:
fe ° <sup>1</sup> i.
/ -1 le e j-2 I ee
At 340 of Figure 3, orthogonal roof jump aspects are provided. Generally, the orthogonal cover is changed at each slot limit. The relationship between orthogonal covering functions associated with a pair of PUCCH resources is generally the same across slot boundaries, however cell dependent linear compensation can be applied to each orthogonal covering function. Compensation implies that a specific cell envelope function is added
<td>(multiplies at the level</td><td>of</td><td>element) to each function</td><td>of</td><td>cover</td>
<td>15 orthogonal used</td><td>in</td><td>the cell. This approach</td><td colspan="2">preserves the</td>
<td>optimal distribution</td><td>of</td><td colspan="2">orthogonal covers that</td><td>they could</td>
have been used. The cell specific orthogonal cover compensation index is determined by the output of the mix sequence generator. The sequence generator is initialized at each sub-frame boundary and timed once in each slot. At initialization, the 33-bit seed sequence can be constructed according to the following:
<td>Bits initializer</td><td> &32· -¿30</td><td> ¿29 · · · ¿27</td><td> ¿26- </td><td> ¿13</td><td>Bl2 --- 09</td><td> ¿8-</td><td> - -¿0</td>
<td>Value</td><td> 0,0,0</td><td> 1,0,0</td><td> 0,0,</td><td> ..,0</td><td>Subframe ID</td><td>ID_</td><td>cell</td>
Note that because the subframe ID is part of the initialization bits, the resulting sequence period is one frame (lOms). Assume that the output of the mixing generator is s<sub>ür</sub> s<sub>to go</sub> . . . s<sub>s</sub>.<sub>or</sub> where u is the number of slots per frame, then the cell-specific orthogonal cover compensation index di for the data
ACK in slot i is determined as d<sub>:</sub> =
Z<sup>5</sup>«M '<sup>2</sup>j<sup>mOd4</sup>'\ Z> = 0 while the cell specific orthogonal cover compensation index e<sub>2</sub> for the RS in slot i it is determined as e, f <sup>1</sup> λ \ ft = 0 mod3. So the actual applied orthogonal cover is the sum (item level product) of the initial assigned orthogonal cover and the orthogonal cover function indicated by d<sub>2</sub> and e for ACK and RS data of ACK, respectively.
Referring to Figure 4, an exemplary alternate sequence generator 400 is illustrated. For various purposes, pseudo-random sequences can be used in generating the sequence jump pattern.
For that purpose, the structure shown in Figure 4 can be used, where a vector h can be used at 410. A shorter sequence generator could also be used. The advantage of the structure shown in the figure is that a single generator can be used to generate all the pseudo-random sequences. Various UL sequence jump applications have been described. In general, a solution is provided for cell specific and resource specific cyclic displacement hopping.
This includes details of the sequence index skip pattern and coordinate cell cyclic shift skip patterns. A cell specific orthogonal cover compensation index jump pattern can also be provided. Simple arithmetic can be used to calculate the assignment parameters of the PUCCH and PUSCH in the respective symbols. The use of a mixing generator can be employed for various pseudo-random sequences. Cyclic shifting of the flexible PUCCH - orthogonal cover assignment can also be provided. The jump pattern can be independent of the general allocation strategy. The UE needs to determine its own set of initial parameters; It does not need to determine what strategy was used to optimize cyclic displacement and orthogonal cover allocation.
A single set of rules can be provided, either for the cell specific jump or for the specific resource jump. These aspects can be applied to the UL DM RS and the PUCCH scrambling specification in
LTE, for example.
Referring now to Figure 5, a wireless communications methodology 500 is illustrated. Although for purposes of simplicity of explanation, the methodology (and other methodologies described here) are shown and described as a series of acts, it will be understood and appreciated that the methodologies are not limited by the order of the acts, as some acts may, according to one or more modalities, occur in different orders and / or concurrently with other acts than those shown and described here.
For example, those skilled in the art will understand and appreciate that a methodology could alternatively be represented as a series of interrelated states or events, such as in a state diagram. Furthermore, not all the illustrated acts can be used to implement a methodology according to the subject matter claimed.
Proceeding with 510, an m-parameter is determined to select fast forward operations. As previously noted, binary m-sequences can be used as base-level mixing codes. In one example, a 50-digit binary value can be used for other values that are also possible. At 520, different random starting sequences are selected. As previously observed, these values can be assigned for different base stations. Also, gparameters or polynomials can be selected as noted above for random sequences. At 530, the fast forward parameter at 510 applies to a sequence sector. This can be applied through a collection of gates, for example, that apply the fast forward parameter to a modulo-2 adder for example. At 540, multiple m-sequences combine to form a desired Gold sequence. For example, two (or more) m-sequences can be combined through an exclusive OR (XOR) operation to form the sequence
Gold. At 550, a mixing sequence is executed by shifting the combination of the m-parameters and the g-parameters described above.
In some cases, the use of multiple operations
XOR to get each new log output value can represent an undesirable degree of complexity. In these cases, it is convenient to fast-forward the pseudo-random sequences by setting the shift register stage to the desired future state. That state depends on the generation of the polynomial (g-parameter), the number of fast-forward steps required, and the initial state. Because the future registration state depends on the initial state, the future state for each possible initial state should be stored or obtained through some other means. One possible method for this is to use the parameters to generate a consecutive sequence of bits that occurs just before the desired future state, and then to use those bits and use them to initialize the shift registers. In this way, the number of times that the XOR operation controlled by the m-parameter is to be executed, can be reduced from the length of the desired sequence to the length of the shift registers. This method can be efficient because the m-parameter to be used depends on the g-parameter and the time offset value but does not depend on the initial state of the shift register. Therefore, storing a single m-parameter is sufficient for a specified time advance.
The techniques described here can be implemented through various means. For example, these techniques can be implemented in hardware, software, or a combination thereof. For a hardware implementation, the processing units can be implemented within one or more application specific integrated circuits (ASICs), digital signal processors (DSP), digital signal processing devices (DSPD), programmable logic devices (PLDs) ), Field Programmable Gate Arrays (FPGAs), processors, controllers, microcontrollers, microprocessors, other electronic units designed to perform the functions described here, or a combination thereof. With software, implementation can be through modules (eg, procedures, functions, and so on) that execute the functions described here.
Software codes can be stored in a memory unit and can be executed by processors.
Turning now to Figures 6 and 7, a system is provided that relates to wireless signal processing. Systems are represented as a series of interrelated functional blocks, which can represent functions implemented by a processor, software, hardware, hard-wired microprogramming, or any convenient combination thereof.
Referring to FIG. 6, a wireless communication system 600 is provided. System 600 includes a logic module 602 to offset the register output values with one or more vectors and a logic module 604 to generate one or more m-parameters according to the vectors. System 600 also includes a logic module 606 for establishing a future state based, in part, on the output values, m-parameters, and vectors.
Referring to FIG. 7, a wireless communication system 700 is provided. System 700 includes a logic module 702 for generating a first masking vector from a sequence generator polynomial and a first cyclic shift, and a logic module 704 to generate a second masking vector from the sequence generator polynomial and a second cyclic shift. System 700 also includes a logic module 706 to process the first and second masking vectors to mask the shift register output values to obtain a first output value and a second output value that are used to generate a sequence. Gold.
Figure 8 illustrates a communications apparatus
800 which may be a wireless communications apparatus, for example, such as a wireless terminal. Additionally or alternatively, communications apparatus 800 may reside within a wired network. Communications apparatus 800 may include memory 802 which may retain instructions for executing signal analysis at a wireless communications terminal. Additionally, communications apparatus 800 may include a processor 804 that can execute instructions within memory 802 and / or instructions received from another network device, where the instructions may refer to configuring or operating the communications apparatus.
800 or a related communications device.
Referring to FIG. 9, a multiple access wireless communication system 900 is illustrated.
The multiple access wireless communication system 900 includes multiple cells, including cells 902, 904 and
906. In one aspect of system 900, cells 902, 904 and
906 they can include a Node B that includes multiple sectors.
Multiple sectors can be formed by antenna groups where each antenna is responsible for communication with UEs in a portion of the cell. For example, in cell 902, antenna groups 912, 914, and 916 may each correspond to a different sector. In the cell
904, antenna groups 918, 920 and 922 each correspond to a different sector. In cell 906, antenna groups 924, 926, and 928 each correspond to a different sector. Cells 902, 904, and 906 can include various wireless communication devices, for example, User Equipment or UE, which can be in communication with one or more sectors of each cell 902, 904, or 906. For example, UEs 930 and 932 can be in communication with Node B
942, UEs 934 and 936 may be in communication with the
Node B 944, and UEs 938 and 940 can be in communication with Node B 946.
Referring now to Figure 10, a multiple access wireless communication system is illustrated in accordance with one aspect. An Access Point 1000 (AP) includes multiple antenna groups, one includes 1004 and
1006, another includes 1008 and 1010, and an additional one includes 1012 and 1014. In Figure 10, only two antennas are shown for each antenna group; however, a larger or smaller number of antennas can be used for each antenna group. Access terminal 1016 (AT) is in communication with antennas 1012 and 1014, where antennas 1012 and 1014 transmit information to access terminal 1016 on forward link 1020 and receive information from access terminal 1016 on link inverse 1018. Access terminal 1022 is in communication with antennas 1006 and 1008, where antennas 1006 and 1008 transmit information to access terminal 1022 on forward link 1026 and receive information from access terminal 1022 on reverse link 1024. In an FDD system, communication links 1018, 1020, 1024, and 1026 can use different frequencies for communication. For example, forward link 1020 may use a different frequency from that used by reverse link 1018.
Each group of antennas and / or the area in which they are designated to communicate frequently is named with a sector of the access point. The antenna groups are each designated to establish communication with the access terminals in a sector of the areas covered by the access point 1000. In communication over the forward links 1020 and 1026, the transmit antennas of the access point 1000 use beamforming to improve the signal-to-noise ratio of forward links for the different access terminals 1016 and 1024. Also, an access point that uses beamforming to transmit to access terminals randomly scattered through its coverage, causes less interference to access terminals in neighboring cells than an access point that transmits through a single antenna to all its access terminals. An access point may be a fixed station used to establish communication with terminals and may also be referred to as an access point, a Node B, or some other terminology. An access terminal may also be referred to as an access terminal, user equipment (UE), a wireless communication device, terminal, access terminal, or some other terminology.
Referring to FIG. 11, a system 1100 illustrates a transmitter system 210 (also known as the access point) and a receiver system 1150 (also known as an access terminal) in a MIMO 1100 system. In the transmitter system 1110, the traffic data for a number of data streams is provided from a data source 1112 to a transmission data processor (TX) 1114. Each data stream is transmitted over a respective transmission antenna. The TX data processor
1114 formats, encodes and interleaves traffic data for each data stream based on a particular encoding scheme selected for that data stream to provide encoded data.
The encoded data for each data stream can be multiplexed with pilot data using OFDM techniques. Pilot data is usually a known data pattern that can be processed in a known way and can be used in the receiver system to calculate the channel response. The multiplexed pilot and encoded data for each data stream are then modulated (i.e. mapped to symbols) based on a particular modulation scheme (eg BPSK, QSPK, M-PSK, or M-QAM) selected for that data stream in order to provide modulation symbols. The data rate, encoding, and modulation for each data stream can be determined by instructions executed by the 1130 processor.
The modulation symbols for all data streams are then provided to a TX 1120 MIMO processor, which can further process the modulation symbols (eg, for OFDM). The TX 1120 MIMO processor then provides
NT modulation symbol streams to NT transmitters (TMTR) 1122a to 1122t. In some modes, the processor
MIMO TX 1120 applies beamforming weights to the symbols in the data streams and to the antenna from which the symbol is being transmitted.
Each transmitter 1122 receives and processes a respective symbol stream to provide one or more analog signals, and additionally conditions (eg, amplifies, filters, and overconverts) the analog signals to provide a modulated signal suitable for transmission over the MIMO channel. NT modulated signals from transmitters 1122a through 1122t are then transmitted from NT antennas 1124a through 1124t, respectively.
In the receiver system 1150, the transmitted modulated signals are received by NR antennas 1152a to
1152r and the signal received from each antenna 1152 is provided to a respective receiver (RCVR) 1154a to
1154r. Each receiver 1154 conditions (eg, filters, amplifies and sub-converts) a respective received signal, digitizes the conditioned signal to provide samples, and further processes the samples to supply a corresponding received symbol stream.
An RX data processor 1160 then receives and processes the NR symbol streams received from the receiver NRs 1154 based on a particular receiver processing technique to provide NT detected symbol streams. The RX 1160 data processor then demodulates, deinterleaves, and decodes each detected symbol stream to retrieve the traffic data for the data stream. Processing by the RX 1160 data processor is complementary to that performed by the MIMO TX 1120 processor and the TX 1114 data processor in the transmitter system.
1110.
A processor 1170 periodically determines which precoding matrix to use (discussed below). Processor 1170 formulates a reverse link message comprising an array index portion and a range value portion. The reverse link message may comprise various types of information regarding the communication link and / or the received data stream. The reverse link message is then processed by a TX 1138 data processor, which also receives traffic data for a number of data streams from a data source 1136, is modulated by a modulator 1180, conditioned by transmitters 1154a to 1154r, and transmitted back to the 1110 transmitter system.
In transmitter system 1110, the modulated signals from receiver system 1150 are received by antennas 1124, conditioned by receivers 1122, demodulated by demodulator 1140, and processed by an RX 1142 data processor to extract the reverse link message. transmitted by the 1150 receiver system.
Processor 1130 then determines which precoding matrix to use to determine beamforming weights and then processes the extracted message.
In one aspect, logical channels are classified into control channels and traffic channels.
Logical control channels comprise the broadcast control channel (BCCH) which is the DL channel for control information from the broadcast system. The location control channel (PCCH) which is the DL channel that transfers the location information. The multicast control channel (MCCH) which is the point-to-multipoint DL channel used to transmit multimedia broadcasting and multicast service (MBMS) control and scheduling information for one or more MTCHs.
Generally, after establishing the RRC connection, this channel is only used by UEs receiving MBMS (Note: old MCCH + MSCH). Dedicated Control Channel (DCCH) is the bi-directional point-to-point channel that transmits dedicated control information and is used by UEs that have an RRC connection. Logical traffic channels comprise a dedicated traffic channel (DTCH) which is a bi-directional point-to-point channel, dedicated to a UE, for the transfer of user information. Also, a multicast traffic channel (MTCH) for the point-to-multipoint DL channel to transmit traffic data.
Transport channels are classified into DL and
UL. DL transport channels comprise a broadcast channel (BCH), downlink shared data channel (DL-SCH) and a location channel (PCH), the
PCH to support the power saving of the UE (the DRX cycle is indicated by the network to the UE), transmitted over the entire cell and mapped to the PHY resources which can be used for other control / traffic channels. The UL transport channels comprise a random access channel (RACH), a request channel (REQCH), an uplink shared data channel (UL-SDCH) and a plurality of PHY channels. PHY channels comprise a set of DL channels and UL channels.
PHY DL channels include: Common Pilot Channel (CPICH), Synchronization Channel (SCH), Control Channel
Common (CCCH), Shared DL Control Channel (SDCCH), Multicast Control Channel (MCCH), UL Assignment Channel
Shared (SUACH), Recognition Channel (ACKCH), Shared Physical Data Channel DL (DL-PSDCH), Power Control Channel UL (UPCCH), Location Indicator Channel (PICH), and Load Indicator Channel (LICH ), for example.
PHY UL channels include: Access Channel
Physical Random (PRACH), Channel Quality Indicator of
Channel (CQICH), Reconnaissance Channel (ACKCH), Channel
Athens Subset Indicator (ASICH), Channel
Shared Request (SREQCH), Shared Data Channel
Physical UL (UL-PSDCH), and Broadband Pilot Channel (BPICH), for example.
Other terms / components include: 3rd
3G Generation, 3rd Generation Partnership Project
3GPP, adjacent channel leakage ratio ACLR, adjacent channel power ratio ACPR, adjacent channel selectivity ACS, ADS Advanced Design System, adaptive modulation and coding AMC, additional maximum power reduction A-MPR, automatic repeat request ARQ , BCCH broadcast control channel, BTS base transceiver station, CDD cyclic delay diversity, CCDF complementary cumulative distribution function, CDMA code division multiple access, CFI control format indicator, Co-MIMO cooperative MIMO, cyclic prefix
CP, CPICH common pilot channel, CPRI common public radio interface, CQI channel quality indicator, CRC cyclic redundancy check, DCI downlink control indicator, DFT discrete Fourier transform, DFTSOFDM discrete Fourier transform spread , DL downlink (base station to subscriber transmission), DLSCH downlink shared channel, 500Mbps physical layer D-PHY, DSP digital signal processing, DT Development Toolkit, DVSA Digital Vector Signal Analysis, EDA Electronic Design Automation, E-DCH Enhanced Dedicated Channel, Evolved E-UTRAN Terrestrial Radio Access Network, Evolved Multimedia Broadcasting Service eMBMS, Node B evolved eNB, evolved packet core EPC, energy per resource element
EPRE, European Telecommunications Standards Institute
ETSI, UTRA evolved E-UTRA, UTRAN evolved E-UTRAN, EVM error vector magnitude, and FDD frequency division duplexing.
Other terms still include transformed from
Fast Fourier FFT, FRC fixed reference channel, FS1 type 1 frame structure, type frame structure
FS2, Global System for GSM Mobile Communications, HARQ Hybrid Auto Replay Request, HDL Hardware Description Language, Hl HARQ Indicator, HSDPA High-speed Downlink Packet Access, HSPA High-speed Packet Access, HSUPA high-speed uplink, reverse FFT
IFFT, IOT interoperability test, protocol
Internet IP, LO local oscillator, long-term evolution
LTE, MAC media access control, MBMS multimedia broadcast multicast service,
Multicast / broadcast over a single frequency network
MBSFN, MCH multicast channel, multiple input multiple output MIMO, multiple input one output MISO, mobility management entity MME, maximum output power MOP, maximum power reduction MPR, multiple user MIMO MU-MIMO, non-access layer ÑAS, OBSAI open base station architecture interface, OFDM orthogonal frequency division multiplexing, OFDMA orthogonal frequency division multiple access, PAPR peak-to-average power ratio, average peak-to-PAR ratio, PBCH physical broadcast channel, P-CCPCH primary common control physical channel, PCFICH physical control format indicator channel, location channel
PCH, PDCCH physical downlink control channel, PDCP packet data convergence protocol, PDSCH physical downlink shared channel, PHICH physical hybrid ARQ indicator channel, PHY physical layer, PRACH physical random access channel, physical multicast channel PMCH, PMI pre-coding matrix indicator, P-SCH primary sync signal, PUCCH physical uplink control channel, and PUSCH physical uplink shared channel.
Other terms include QAM Quadrature Amplitude Modulation, QPSK Quadrature Phase Shift, RACH Random Access Channel, RAT Radio Access Technology, RB Resource Block, RF Radio Frequency, RF Design Environment RFDE, Link Control RLC radio, RMC reference measurement channel, RNC radio network controller, RRC radio resource control, RRM radio resource management, RS reference signal, RSCP received signal code power, RSRP reference signal received power, RSRQ reference signal received quality, received signal strength indicator
RSSI, evolution of SAE system architecture, SAP service access point, SC-FDMA single carrier frequency division multiple access , SFBC space-frequency block encoding, in-service gate
S-GW, one input multiple SIMO output, one input one SISO output, SNR signal-to-noise ratio, SRS sound reference signal, secondary synchronization signal
S-SCH, User MIMO SU-MIMO, TDD time division duplex, TDMA time division multiple access, TR technical report, TrCH transport channel, TS technical specification, Technology Association of
Telecommunications TTA, transmission time interval
TTI, UCI uplink control indicator, UE user equipment, UL uplink (subscriber to base station transmission), UL-SCH uplink shared channel, UMB ultra mobile broadband, UMTS universal mobile telecommunications system, access universal terrestrial radio, UTRAN universal terrestrial radio access network, VSA vector signal analyzer, W-CDMA broadband code division multiple access.
It is noted that various aspects are described here in connection with a terminal. A terminal may also be referred to as a system, a user device, a subscriber unit, subscriber station, mobile station, mobile device, remote station, remote terminal, access terminal, user terminal, user agent or equipment. user. A user device can be a cell phone, a cordless phone, a
Session Initiation Protocol (SIP), a wireless local loop station (WLL), a PDA, a handheld device that has wireless capabilities, a module within a terminal, a card that can be attached to, or integrated within from a host device (for example, a PCMCIA card) or other processing device connected to a wireless modem.
In addition, aspects of the claimed subject matter may be executed as a manufacturing method, apparatus, or item using standard engineering and / or programming techniques to produce software, hard-wired microprogramming, hardware, or any combination thereof to control a computer or components. of computation to implement various aspects of the subject matter claimed. The term article of manufacture as used herein is intended to encompass a computer program accessible from any computer-readable device, carrier, or medium.
<td>For example,</td><td>the middle</td><td>readable</td><td>by</td><td>computer</td><td>can</td>
<td>include but</td><td>I dont know</td><td>limits</td><td>to,</td><td>devices</td><td>of</td>
<td>storage</td><td>magnetic</td><td colspan="2">(for example,</td><td>HDD,</td><td>disk</td>
floppy, magnetic strips, etc.), optical discs (for example, compact disc (CD), digital versatile disc (DVD), etc.), smart cards, and fast memory devices (for example, EPROM, card, stick memory) , key unit, ...). Additionally, it should be appreciated that a carrier form can be employed to carry computer-readable electronic data such as that used to transmit and receive voice mail or to access a network such as a cellular network. Of course, those skilled in the art will recognize that many modifications can be made to this configuration without departing from the scope and spirit of what has been described herein.
As used in this application, the terms component, module, system, and the like may refer to a computer-related entity, be it hardware, a combination of hardware and software, software, or running software. For example, a component may be, but is not limited to, a process running on a processor, a processor, an object, an executable, a sequence of execution, a program, and / or a computer. By way of illustration, both an application running on a computing device and the computing device may be a component. One or more components may reside within a process and / or sequence of execution and a component may be located on one computer and / or may be distributed between two or more computers.
What has been described above includes examples of one or more modalities. Of course, it is not possible to describe every possible combination of components or methodologies for purposes of describing the aforementioned modalities, but one skilled in the art may recognize that many additional combinations and permutations of various modalities are possible. Accordingly, the described modalities are intended to encompass all such alterations, modifications and variations that fall within the spirit and scope of the appended claims. Furthermore, to the extent that the term includes is used in either the detailed description or the claims, the term is intended to be inclusive in a similar way to the term "comprising" as "comprising" is interpreted when used as a transition word in a claim.
Contents18
12 sheets
Sheet 1 Sheet 2 Sheet 3 Sheet 4 Sheet 5 Sheet 6 Sheet 7 Sheet 8 Sheet 9 Sheet 10 Sheet 11 Sheet 12
23 members in 13 offices
Priority claims3
| Document | Office | Kind | Date |
|---|---|---|---|
| 3971308 | United States of America | P | |
| 41069409 | United States of America | A | |
| 2009038346 | United States of America | W |
Members23
| Document | Office | Kind | |
|---|---|---|---|
| AU2009228241A1 | Australia | A1 | |
| CA2717127A1 | Canada | A1 | |
| US2009249027A1 | United States of America | A1 | |
| WO2009120828A1 | World Intellectual Property Organization (WIPO) | A1 | |
| TW201018168A | Taiwan Province of China | A | |
| MX2010010221AThis record | Mexico | A | |
| KR20100127857A | Republic of Korea | A | |
| EP2266233A1 | European Patent Office (EPO) | A1 | |
| IL207991A0 | Israel | A0 | |
| CN101978628A | China | A | |
| JP2011516007A | Japan | A | |
| UA96393C2 | Ukraine | C2 | |
| RU2010143552A | Russian Federation | A | |
| RU2459381C2 | Russian Federation | C2 | |
| KR101189986B1 | Republic of Korea | B1 | |
| US8923249B2 | United States of America | B2 | |
| JP2015008482A | Japan | A | |
| CN101978628B | China | B | |
| CN105119854A | China | A | |
| JP5840490B2 | Japan | B2 | |
| JP2016026438A | Japan | A | |
| EP2266233B1 | European Patent Office (EPO) | B1 | |
| JP5985726B2 | Japan | B2 |
1 legal event, as the office reported them to INPADOC
Events
| Event | Code | |
|---|---|---|
| Grant or registrationFG | FG |
Numbers
- Application
- 2010010221
Titles2
- English
- METHOD AND APPARATUS FOR SCRAMBLING SEQUENCE GENERATION IN A COMMUNICATION SYSTEM.
- Spanish
- METODO Y APARATO PARA GENERACION DE SECUENCIA DE MEZCLADO EN UN SISTEMA DE COMUNICACION.
Classification
- CPC, 5
- H04L25/03866
- H04L5/0007
- H04B7/0413
- H04J13/0029
- H04J13/10