Semiconductor devices and methods of making same
11 claims: 6 independent, 5 dependent
- 1R £ V Ê N 1) î C A ï I û N S 1. - bans un réseau semi-conducteur le perfectionnement suivant lequel une partie de ce réseau comprend une région épitaxiale.
- 2- Un procédé de fabrication d’un réseau scmi-conducteur comportant les moyens pour former un cristal de matière semi-conductrice, à faire croître une couche épitaxiale sur ce cristal, à diffuser une impureté dans une région de cett< couche épitaxiale, et à enlever une partie de cette couche épi Lcxiale.
- 33« - Un réseau semi-conducteur obtenu par le procédé selon la revendication 2.
- 4- Un procédé de fabrication d'un réseau semi-conducteur comportant les moyens pour fonser un cristal de matière semi-conductrice, à diffuser une impureté dans une région de ee cristal et a faire croître une couche épitaxiale sur le cristal au-dessus de .1 suite région.
- 5- Un réseau semi-conducteur obtenu par le procédé selon la revendication 4.
- 6- Une structure semi-conductrice qui comprend un cristal de matière semi-conductrice à forte résistivité et une région fortement dopée de conductivité du même type formée dans ce cristal, et une couche épitaxiale de conductivité du même type au-dessus de cette région.
- 7- Une structure semi-eondmetrice selon la revendication 6 dans laquelle une région fortement dopée de conductivité du même type est formée dans la couche épitaxiale.
- 8- Un procédé pour former un contact ohsique sur un corps en matière semi-conductrice ayant un certain type de conductivité et une résistivité élevée, comportant les moyens pour doper fortement une région de ee corps avec une impureté ayant une conductivité du même type et à faire croître au-dessus de cette région une couche épitaxiale de matière semi-conductrice de faible résistivité et du même type de conductivité,
- 9- Un procédé selon la revendication 8 dans lequel on dope fortement une région de la couche épitaxiale avec une impureté de conductivité du même type.
- 10- Un réseau semi-conducteur qui comprend un cristal en matière ayant une résistivité relativement élevée et une conductivité d’un certain type de conductibilité, une région fortement dopée de conductivité du même type formée dans la surface de ce cristal, et une couche épitaxiale de conductivité du même type et de résistivité relativement faible à la surface d’au moins une partie de cette région.
- 11- Un réseau semi-conducteur selon la revendication 10, dans lequel une région de conductivité du type opposé est formée dans la couche épitaxiale.
Independent claims11
51 paragraphs, as filed
The present invention relates to semiconductor networks with single crystals and it relates more particularly to semiconductor networks having as integral part an epitaxial semiconductor layer.
In modern electronic presentation, there is an increasing need for electronic devices that are both small in size and light in weight. The discovery of the various semiconductor devices such as the transistor and the diode-tunnel, allowed the manufacturers to group the various elements in much lower volumes than it was possible when using circuits comprising tubes empty. However, in many applications the dimensions and weight of a number of electronic systems comprising semiconductor devices are much greater than is desirable or possible.
In the LUXEMBOURGEOIS patent Sö.âiR- of 5 · 2.ί96θ is described an integrated electronic circuit of an original type, which consists entirely of a single crystal of semiconductor material. As described in this patent, modulator circuits comprising several elements such as transistors, diodes, resistors and capacitors are manufactured from a single semiconductor crystal. These modulator circuits are called semiconductor networks and in the present application, a semiconductor network denotes a structure formed of a single semiconductor crystal comprising at least two interconnected circuit elements of different types.
The discovery of these semiconductor networks constitutes an important opening in the field of circuit miniaturization in the sense that it becomes possible to produce complete modulator circuits than multivibrators, amplifiers or oscillators occupying no more space. and weighing no more than a current transistor.
- 3 - Ί> However, many of these semiconductor networks do not work as well as the same modulator circuits comprising individual elements, and one must therefore make udpompromis between the desired reduction in dimensions and weight and characteristics and desired possibilities for the circuit. The reason why many semiconductor arrays and the prior art do not function as satisfactorily as their counterparts formed from individual elements is that the elements of such a semiconductor array are all formed from the same crystal of semi material -donductrice. The transistors, diodes and capacitors have all closed by diffusing impurities in this crystal and the resistances are obtained by using the resistivity of the semiconductor material of this same crystal. Thus, the specific characteristics of this crystal affecting the properties of all the elements of the circuit formed in the latter. The disadvantages of such a construction method are that for certain elements it may be desirable to have a characteristic in certain parts of the crystal while for other elements it may be advantageous to have the opposite characteristic, Tuai 'example, for resistances, it is generally advantageous that the resistivity of the semiconductor material is high because it is thus possible to obtain more .rends resistances and also a given resistance with an element having a smaller dimension, on the other hand, it is generally advantageous to forming the transistors in a material having a relatively low resistivity, because in this way a low saturation voltage is obtained and the accumulation at the collector is reduced.
h
When one has to face such a pi-oblem of opposite requirements for the characteristics of the crystal forming the semiconductor network,. we are led to make a compromise resulting in a certain sacrifice in the quality of operation of the modulator circuit.
The present invention overcomes this difficulty through the formation or development of an epitaxial layer on the initial single crystal. This epitaxial layer constitutes an extension of the single crystal and its characteristics can be chosen in any desired manner. So for example, we can give it a much lower resistivity than that of the part of the initial crystal and the transistors of the semiconductor network can be formed in this layer while the initial material with high resistivity can be used to form the resistors. . This technique of forming an epitaxial layer also makes it possible to provide more heavily doped regions below more lightly doped regions, because it is possible to diffuse impurities in regions of the initial material before the epitaxial layer is formed. This feature makes it possible to use a material having a much higher resistivity to form the resistances than had previously been possible due to the difficulty of achieving good ohmic contact with a semiconductor material with high resistivity. We can make a good ohmic contact with a semiconductor material with high resistivity by forming
- an epitaxial layer with low resistivity on the surface of a region heavily doped in the semiconductor material with high resistivity, mid consequence, the main objects of the invention are:
- to realize sophisticated semiconductor networks;
- to incorporate an epitaxial region as part of a semiconductor network j,
- to allow better selectivity of the characteristics of the different regions of a semiconductor network;
- allow to form more heavily doped regions under more lightly doped regions of a crystal;
- allow the use of a material with very high resistivity for part of the semiconductor network and une'a material with very low resistivity for another part of this network;
- to facilitate obtaining good ohmic contact with a semiconductor material of high resistivity.
The description which follows with reference to the appended drawing, given by way of nonlimiting example, will make it clear how the invention can be implemented, the
- 6 - b particularities which emerge both from the drawing and from the text forming, of course, part of the said invention.
Figure 1 is a section of a semiconductor network of the prior art here.
FIG. 2 is a diagram of a circuit constituted by the semiconductor network of FIG. 1.
FIG. 3 is a vertical section showing an intermediate stage in the manufacture of a semiconductor network according to the concepts of the present invention for obtaining a circuit like that of FIG. 2.
FIG. 4 is a perspective view of a semiconductor network · according to the invention corresponding to the circuit of FIG. 2.
Figure 5 is a vertical section through line 5-5 of Figure 4.
Figure 6 is a section of a semiconductor network · of the prior art providing an AND conditioner with three inputs.
FIG. 7 is a diagram of the circuit formed by the semiconductor network of FIG. 6.
Figure 3 is a vertical section showing a
- 7 intermediate stage of the manufacture of a semiconductor network according to the present invention providing the circuit of FIG. 7.
FIG. 9 is an elevation view of a semiconductor network according to the invention corresponding to the circuit of FIG. 7.
Figure 10 is a vertical section of the semiconductor network * of Figure 9 by line 10-10 thereof.
The semiconductor network of the prior art shown in FIG. 1 comprises a single crystal 11 made of a relatively high resistivity semiconductor material such as silicon. In the example shown in Figure 1, the conductivity of crystal 11 is of type n and its resistivity is 10 ohm-ern. At one end of the block 11, a region 13 of conductivity p has been formed, by diffusion in the solid state, and a heavily doped region 15 of conductivity n, by diffusion in the solid state in the region 13. The upper part bloe 11 is removed by acid attack to leave a so-called "mesa" table 16 comprising region 13 and region 15 projecting from the body of block 11. The pn junctions between region 15 of conductivity n and the remaining material of region 13 of conductivity p and between the remaining material of conductivity n of block 11 and material of conductivity p of region 13 form
- 8 - 8 - an npn transistor in the mesa 16, the material of conductivity p of region 13 forming the base of the transistor region 15 forming its emitter and the remaining material of conductivity n of block 11 forming the collector. Ohmic contact there? is formed with the material of conductivity p of region 13 and it acts as a lice electrode * the base of the transistor. An ohmic contact 21 with the block 11 if you say something in the mesa 16 forms the electrode of the collector of the transistor and an ohmic contact 23 with the heavily doped region ip constitutes the emitter electrode of the transistor, At the end of block 11 opposite to the mesa l6 is formed an ohmic contact 19. The relatively high resistivity material separating the contacts 19 and 21 on the block 11 in fact constitutes a resistor connected to the collector of the transistor · in the mesa l6.
.The. Figure 2 schematically shows the circuit formed by the network, the semiconductor of Figure 1. As shown, a resistor 25 is connected between a terminal 18 and the collector of an npn transistor 27. A terminal 24 is connected to. the transmitter of Iran sistor 27; a terminal 22 is connected to the. base of transistor 27; and a terminal 20 is connected to the collector of transistor 27, or in other words, at the junction between resistor 25 and the collector of transistor 27. The resistance 25 is provided by the resistivity of the semiconductor material between the contacts 19 and 21, and the transistor 27 is formed by the transistor of the
- 9 mesa 16. The terminals 18, 20, 22 and 24 are formed respectively by the contacts 19, 21, 17 and 23 respectively. Because of the difficulty of forming ohmic contacts on a material to. high resistivity, in practice the resistivity of the block 11 is limited to 10 ohm-cm. As a result, the resistor 25 formed by the base 11 has a maximum value of 40,000 ohms in a practical embodiment of this semiconductor network. In addition, the use of a material having even this high resistivity to form the block 11 has forced certain important compromises during the production of the transistor 27. Or the fact that the relatively high resistivity material of the block II forms the collector of the transistor 27, this transistor 27 has a relatively high value of the saturation voltage. This high saturation voltage is annoying, particularly when the transistor 27 must be used for a switching operation. Indeed, when the transistor is used as a switch, it is desirable that when it is in the conducting state, it behaves as much as possible as a short circuit. Since the transistor 27 has a relatively high saturation voltage, a fairly high voltage appears between its collector and its emitter when it is in the conductive state, and it therefore does not approach the desired short-circuit state. . In addition, the relatively high resistivity of the collector of transistor 27 formed by block 11, also allows increased accumulation at the collector, resulting in a much slower switching time of the device.
The present invention makes it possible to produce the circuit of FIG. 2 using a semiconductor network in which the resistor 25 is formed with a material of much higher resistivity, giving the latter a much greater value. , while the region of the collector of transistor 27 is formed from a material having a much lower resistivity.
The improved semiconductor network supplying the circuit of FIG. 2 is constructed according to the invention, is shown in FIGS. 3 to 5.
In the embodiment of FIG. 3, which represents the semiconductor network at an intermediate manufacturing stage, a single crystal of high resistivity is used, in a semiconductor material in the form of a pellet bearing the reference 29. In the mode of embodiment of FIGS. 3 to 5, the patch 29 has a resistivity of 100 ohm-cm and is of conductivity n. Two n-type regions for doped Ji and j2 (at about 0.1 ohm-cm or less) are formed by diffusion in the upper surface of the patch 29 at opposite ends thereof. On the upper surface of the patch 29, an epitaxial layer 33 is formed of semiconductor material. The layer 33 must form an extension of the single crystal, which is essential. One way of producing the epitaxial layer consists in depositing in the vapor phase semiconductor material on the base 23 as it is described in particular in "Epitaxial Growth of Silicon" by Wajda et al, published in the ISM Journal Of Research and
XX ““
Development, 4, pages 288-295 (i960) and in Impurity introduction During Epitaxial Growth of Silicon ”by dlang et al, published in the same volume of the IBM Journal of Research and Development” on pages 299 to 301 · Characteristics, among which the resistivity and the type of conductivity of the epitaxial layer can be chosen as desired. In the embodiment of FIG. 3, the conductivity of type n has been chosen and a relatively low resistivity, preferably between 0.5 and Ι, ϋ / ohm-cm. A p-type region 35 is formed in the n-type epitaxial layer 33 by diffusion in the solid state. This region 35 is situated above the heavily doped n-type region 31 in the patch 29. A solid-doped n-type region 37 is formed by solid-state diffusion in the p-type region 35. Likewise, a heavily doped n-type region 39 is cormed into the n-type material of the layer 33 next to region 35, also by diffusion in the solid state, and a highly doped n-type region 41 is formed. in the layer 33 above the n-type region 32, by diffusion in the solid state. The epitaxial layer 33 is then attacked with acid to leave the mesas designated in FIGS. 4 and 5 by the references 43 and 45. The layer 33 is entirely removed with the access so that the mesas 43 and 45 are connected only with the resistivity material removed from the pad 29. This attack is carried out so that the mesa 43 contains the region 35 of the p type. in which is formed the n-type region 37 and also the heavily-doped n-type region 39, and that the me sa 45 contains the heavily doped region
4i of type n. The various regions in mesa 43 form a transistor including region 3? of the n type constitutes the emitter, the p type material of the region 35 forms the base and the remaining n type material of the layer 33 in the mesa 43 constitutes the collector. We use the. heavily doped n-type region 39 in mesa 43 to ensure contact with the transistor collector. An ohmic contact 49 is formed with the heavily doped n-type region 57 to form the electrode of the transmitter, an ohmic contact 47 with the remaining p-type material of region 35 to form the base electrode and a Ohmic contact 48 with the region 39 to constitute the collector electrode. An ohmic contact 50 is formed with the heavily doped region 41. This semiconductor network represented in FIGS. 4 and 5 corresponds to the circuit of FIG. 2, the mesa 45 constituting the transistor 27 and the semiconductor material separating the mesas 45 and 43 constituting the resistor 25. The terminals 1a, 20, 22 and 24 are formed respectively by the contacts 50, 48 and 49. Since a material with high resistivity is used to form the pellet 2.9, the value of the resistance 25 can be much higher and also it is unnecessary to give the pellet 29 as long as before to obtain an appropriate value resistance. In. Besides, the<sup>i; 0 of ln re</sup>S<sup>lon du</sup> collector of transistor 27 is significantly reduced being
- 13 13 given that this collector region is formed by the epitaxial layer 53 whose resistivity is relatively low. In this way the saturation voltage of transistor 27 is relatively low, which allows it to behave more like a short circuit when it is in the conductive state and also to obtain a much smaller collector accumulation resulting in a much shorter switching time of the transistor 27 "In addition, the presence of a heavily doped region 41 in the epitaxial layer of low resistivity in the mesa 45, formed above the heavily doped region 32 in the high resistivity base, makes it possible to achieve good ohmic contact with the material of high resistivity. Similarly, the heavily doped region '31 ensures good ohmic contact between the region of the transistor collector and the high resistivity material of the pad 29 and also limits the width of the stripping layer in the collector, which significantly improves The switching characteristics of the transistor. Thus, all the problems which have been studied above concerning the operation of the semiconductor network of the prior art, according to FIG. 1, are overcome by the use of the epitaxial layer 33 during the formation of the semiconductor network.
As we say in Figure 3, the epitaxial layer allows to completely surround, in a monocrystalline structure, a region 31 and 32 heavily doped region such as by the material more lightly
- 14 doped. In the embodiment of FIGS. 4 and 5, these interior regions 31 and 32 make it possible to establish good ohmic contact with the material with high resistivity of the pad 29. It is obvious that such a structure can have many other applications in semiconductor networks and the realization of such a structure greatly widens the technical perspectives in this field.
FIG. 6 shows another semiconductor network of the prior art. This semiconductor network comprises an AND conditioner "the circuit of which is shown in FIG. 7" The semiconductor network of FIG. 6 comprises a block of single crystal 51 made of p-type semiconductor material. Near one end of this block, three regions of conductivity n are formed by solid state diffusion, which are given the references 53, 54 and 55 in FIG. 6. The junctions between the n-type regions 53, 54, 55 and the p-type material of the block 51 form semiconductor diodes. An ohmic contact 56 is established with the block 51 below the regions 53, 54, 55 and an ohmic contact 57 is formed at the opposite end of the base 51 · Ohmic contacts 52, 58 and 62 are formed with the regions n 53, 54 and 55 respectively, The resisitivity of the block 51 between the ohmic contacts 57 and 56 forms a resistance. In this way, the semiconductor network of figure 6 forms a conditioner “AND”, whose circuit is represented in figure 7. In this circuit a resistor 15 - 15 resistance 63 is mounted between a terminal ¢ 4 and three diodes 59, 60, 61 which connect the resistor 63 to the terminals 65,
66, 6? respectively. A terminal 68 is connected to the junction between the diodes 59, 60, 61 and the resistor 63 · The three diodes 59, 60, 6i are the diodes formed by the junctions between the regions of type n 53, 5<sup>z</sup>i, 55 and the p-type material of block 5i, while l<sub>not</sub> resistor 63 is formed by the resistivity of the block 51 between the contacts 57 and 56. The terminals 6 to 68 are formed by the contacts 57, 62, 58, .52 and 56 respectively. Thus, the semiconductor network of FIG. 6 constitutes an AND conditioner with three inputs.
As in the case of the transistor resistance combination, the AND conditioner of FIG. 6 is subject to restrictions in that the resistivity of the material p of the block 51 cannot be very high because the ohmic contacts 56 and 57 must be formed with it, and as already said, it is very difficult to achieve good ohmic contact with a material with high resistivity. Plus, if the material of block 5i has too high a resisitivity, the diodes 59, 60 61 of the circuit of FIG. 7, instead of being connected directly to the resistor 63 will each be connected to the resistor 63 through a resistor series. The inclusion of such series resistors in the circuit of FIG. 7 would have a very unfortunate influence on the operation of the circuit in AND conditioner. Therefore, to impart a suitable high value to the
- 16 resistor 63, it is necessary to give the block 51 a relatively large length.
Thanks to the concept of the present invention consisting in forming part of the semiconductor network by an epitaxial layer which is formed on the initial single crystal, the above problems are overcome. Figures S to. JLO represent a semiconductor network in accordance with the present invention constituting the conditioner ”AND of FIG. 7”
Figure 8 shows an intermediate stage in the manufacture of the semiconductor network. We see that we use a single single crystal patch 71 of high resistivity and conductivity p, Oc each side of this patch, we form n-type regions heavily doped 75 and 75 (having about 0.1 ohra-cm or even minus) by solid state diffusion. Then, on the upper surface of the heavily doped regions 73 and 75, epitaxial layers 77 and 79 are deposited on each side of the patch 71. These epitaxial layers form extensions of the structure of the semiconductor single crystal, and they are formed so as to have relatively low resistivities and a p-type conductivity. In the epitaxial layer 79, several small regions of n-type material are formed by diffusion in the solid state. These regions 81 are arranged in three types. For each group of three n-type regions 81, a region 82 highly doped with
- 17 - 17 typo The structure of FIG. 8 is sectioned so that each group comprising three regions 81 and one region 8h is in a portion, separated from the crystal, FIGS. 9 and 10 show one of these portions after sectioning. As can be seen in these figures, the crystal portion or element comprises a strip of semiconductor material at the ends of which epitaxial layers 91 and 93 of p-type material are formed. Between the epitaxial layers 91 and 93 the bar 95 is made of high p-type resistivity. The eptitaxial layers §i and 93 are combined with the p-type material of high resistivity by the heavily doped regions 97 and 99. in the. epitaxial layer 93 so there are three n-type regions 8i and a heavily doped p-type region 82. The three n-type regions 81 form three diodes with the p-type material of the epitaxial layer 93. A region 9 ^ of heavily doped p-type material is formed, by solid state diffusion, in the epitaxial layer 91. Ohmic contacts 9½ are formed with the n type regions, an olnic contact 98 is formed with the heavily doped p-type region 82 and finally, an ohmic contact 96 is formed with the heavily doped p-type region 92. This structure of FIGS. 9 and 10 constitutes the conditioner "AND" of FIG. 7. The diodes 59 ”80, 61 are formed by the junctions between the regions Si of the n type and the epitaxial layer 93 of the p type, and the resistance 63 is formed by the material of high resistivity of the p type comprised between the epitaxial layers 93 and 91. The bonuses 65, 66, 67 are constituted by the contacts 94, the terminal 68 by the contact 98 and the terminal 64 by the contact 96, As the resistor 65 is made of a material with high resistivity, it is possible to form it by a sufficiently short length of material so that the thickness of the semiconductor wafer is sufficient. For this reason, “AND” conditioners can be produced by cutting a patch as described opposite, in figure 8. The fact that the epitaxial layers 93 and 91 are formed at each end of the high resistivity strip 95 makes it possible to give these regions 91 and 93 a low resistivity. In this way, practically no resistance appears between the diodes 59, 60, 6i and the resistor 63 in the circuit of FIG. 7 and, in addition, good ohmic contacts are obtained with the high resistivity strip 95 "With certain crystal formation, it may be advantageous to only grow layer 93 on the initial crystal and to form region 92 directly by diffusion in layer 95 ·
If one wishes to further increase the speed of return to rest of the transistor in a seffii-conductive network, the epitaxial layer can be doped, during its growth, with an agent suppressing the duration of this return such as gold. Doping during growth provides an almost constant level of doping throughout the epitaxial layer. This constitutes a great improvement with respect to the distribution along the bell-shaped error curve which is commonly obtained with conventional solid state diffusion methods. This
- 19 - 19 technique is of great interest both for individual tors transis, and for semi-conuuter networks.
It appears from the above that the concept fondas entai of the invention consists in forming an epitaxial layer as an integral part of a semiconductor network. The techniques of the present invention can be used for the production of numerous semiconductor networks other than those which have been described and it goes without saying that modifications can be made to the embodiments which have been described, in particular by substitution of technical means. equivalent, without departing from the scope of the present invention.
2 sheets
Sheet 1 Sheet 2
18 members in 8 offices; this record represents the family
Priority claims3
| Document | Office | Kind | Date |
|---|---|---|---|
| 2613560 | United States of America | A | |
| 8725861 | United States of America | A | |
| 37771064 | United States of America | A |
Members18
| Document | Office | Kind | |
|---|---|---|---|
| NL123416C | Netherlands (Kingdom of the) | C | |
| NL274363A | Netherlands (Kingdom of the) | A | |
| LU41205A1This record | Luxembourg | A1 | |
| FR1313638A | France | A | |
| US3130377A | United States of America | A | |
| GB988902A | United Kingdom | A | |
| GB988903A | United Kingdom | A | |
| US3211972A | United States of America | A | |
| CH400370A | Switzerland | A | |
| DE1207014B | Germany | B | |
| CH428008A | Switzerland | A | |
| NL6700241A | Netherlands (Kingdom of the) | A | |
| MY6900289A | Malaysia | A | |
| MY6900294A | Malaysia | A | |
| DE1514842A1 | Germany | A1 | |
| DE1514842B2 | Germany | B2 | |
| NL139417B | Netherlands (Kingdom of the) | B | |
| DE1207014C2 | Germany | C2 |
Numbers
- Application
- 41205
Classification
- CPC, 8
- H10D99/00
- H10D84/0112
- H10D84/038
- H10D84/01
- H10D84/615
- H10D84/406
- H10D84/613
- H10P95/00
- IPC, 7
- H01L21 82
- H01L21 8222
- H01L27 06
- H01L27 07
- H01L29 00
- H03B5 12
- H10P95 00
