A method of detecting the presence of multiple language audio channels in a digital audio signal.
Abstract
During recording, a multiplexed representation is generated when at least two of the audio channels of the digital audio signal are associated with a common program, the multiplexed representation being combined with the digital audio signal. During playback, when the multi-voice indication indicates that at least two of the audio channels included in the digital audio signal are associated with a common program, the display is activated.

Term
Term ended
Expired 12 May 2015, 11.4 years ago.
- Priority
- Filed
- Granted
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- Today
20 claims: 4 independent, 16 dependent
- 1데이터 발생 방법에 있어서, 복수의 오디오 채널을 포함하는 디지털 오디오 신호를 수신하는 단계와;적어도 2개의 오디오 채널들이 공통 프로그램과 연관되어 있을 때 음성다중표시(multilingual indication)를 발생하는 단계와;상기 음성다중 표시를 상기 디지털 오디오 신호와 결합하는 단계를 포함하는, 데이터 발생 방법.
- 2제 1 항에 있어서, 상기 음성다중 표시는 데이터 비트인, 데이터 발생 방법.
- 3제 1 항에 있어서, 상기 음성다중 표시를 다른 오디오 관리 정보와 결합하는 단계를 더 포함하는, 데이터 발생 방법.
- 4제 1 항에 있어서, 상기 음성다중 표시와 결합된 상기 디지털 오디오 신호를 기록 매체상에 기록하는 단계를 더 포함하는, 데이터 발생 방법.
- 5제 4 항에 있어서, 상기 기록하는 단계는 에러 방지를 위해 반복되는, 데이터 발생 방법.
- 6제 1 항에 있어서, 상기 음성다중 표시와 결합된 상기 디지털 오디오 신호를 전송매체에 공급하는 단계를 더 포함하는, 데이터 발생 방법.
- 7데이터 재생 방법에 있어서, 복수의 오디오 채널 및 상기 오디오 채널들중 적어도 2개가 공통 프로그램과 연관되어 있는지의 여부를 표시하는 음성다중 표시를 포함하는 디지털 오디오 신호를 수신하는 단계와;상기 음성다중 표시가 상기 오디오 채널들중 적어도 2개가 상기 공통 프로그램과 연관되어 있음을 표시할때 디스플레이를 활성화시키는 단계를 포함하는, 데이터 재생 방법.
- 8제 7 항에 있어서, 오디오 채널 선택을 수신하는 단계 및 상기 선택된 오디오 채널을 재생하는 단계를 더 포함하는, 데이터 재생 방법.
- 9제 7 항에 있어서, 상기 오디오 채널들중 적어도 2개가 상기 공통 프로그램과 연관되어 있을 때 상기 오디오 채널들중 첫번째 채널을 자동적으로 재생하는 단계를 더 포함하는, 데 이 터 재생 방법.
- 10제 7 항에 있어서, 상기 수신 단계는 상기 음성다중 표시를 반복적으로 수신하고, 상기 반복적으로 수신된 음성다중 표시에 다수결의 규칙(a rule of majority)을 적용하여 상기음성다중 표시의 본래값을 판정하는 단계를 더 포함하는, 데이터 재생 방법.
- 11데이터 발생 장치에 있어서, 복수의 오디오 채널들을 포함하는 디지털 오디오 신호를 수신하기 위한 수단과;상기 오디오 채널들중 적어도 2개가 공통 프로그램과 연관되어 있을 때 음성다중 표시를 발생하기 위한 수단과;상기 음성다중 표시를 상기 디지털 오디오 신호와 결합시키기 위한 수단을 포함하는, 데이터 발생 장치.
- 12제 11 항에 있어서, 상기 음성다중 표시는 데이터 비트인, 데이터 발생 장치.
- 13제 11 항에 있어서, 상기 음성다중 표시를 다른 오디오 관리 정보와 결합시키기 위한 수단을 더 포함하는, 데이터 발생 장치.
- 14제 11 항에 있어서, 상기 음성다중 표시와 결합된 상기 디지털 오디오 신호를 기록 매체상에 기록하는 수단을 더 포함하는, 데이터 발생 장치.
- 15제 14 항에 있어서, 상기 기록 수단은 에러 방지를 위해 상기 음성다중 표시와 결합된 상기 디지털 오디오 신호를 반복적으로 기록하도록 동작하는, 데이터 발생 장치.
- 16제 11 항에 있어서, 상기 음성다중 표시와 결합된 상기 디지털 오디오 신호를 전송 매체에 공급하는 수단을 더 포함하는, 데이터 발생 장치.
- 17데이터 재생 장치에 있어서, 복수의 오디오 채널 및 상기 오디오 채널들중 적어도 2개가 공통 프로그램과 연관되어 있는지의 여부를 표시하는 음성다중 표시를 포함하는 디지털 오디오 신호를 수신하기 위한 수단과;상기 음성다중 표시가 상기 오디오 채널들중 적어도 2개가 공통 프로그램과 연관되어 있음을 표시할 때 디스플레이를 활성화시키기 위한 수단을 포함하는, 데이터 재생 장치.
- 18제 17 항에 있어서, 오디오 채널 선택을 수신하기 위한 수단과, 상기 선택된 오디오 채널을 재생하기 위한 수단을 더 포함하는, 데이터 재생 장치.
- 19제 17 항에 있어서, 상기 오디오 채널들중 적어도 2개가 공통 프로그램과 연관되어 있을 때 상기오디오 채널들중 첫번째 채널을 자동적으로 재생하기 위한 수단을 더 포함하는, 데이터 재생 장치.
- 20제 17 항에 있어서, 상기 수신 수단은 상기 음성다중 표시를 반복적으로 수신하고, 상기 반복적으로 수신된 음성다중 표시에 다수결의 규칙을 적용하여 상기 음성다중 표시의 본래 값을 판정하기 위한 수단을 더 포함하는, 데이터 재생 장치.
Independent claims20
40 paragraphs, as filed
Digital audio channel with voice multiplexing
1A to 1D are diagrams showing a recording format of a digital audio signal;
2 is a table for explaining AUDIO MODE data.
3 is a diagram showing an example of a conventional two-channel recording format;
Fig. 4 is a table indicating possible usages of the channels of Fig. 3;
5A and 5B are diagrams of track recording formats.
6 is a diagram of an ITI area.
Fig. 7 is a detailed view of the track shown in Fig. 5B;
8 is a diagram illustrating a hierarchical structure of application IDs for track areas;
9B is a diagram showing the usage of the track area when AP1 = AP2 = AP3 = 000;
10 is a data structure diagram of a pack;
11 is a pack header hierarchy diagram;
12 is a data structure diagram of an audio area;
13 and 14 are data structure diagrams for a pre-sync block and a post-sync block, respectively;
FIG. 15 is a data structure diagram of one sync block among 14 sync blocks in the audio data portion of the audio region of the tracks shown in FIG. 12;
Fig. 16 is a block diagram of an AAUX unit arranged in a track direction;
Fig. 17 is a data structure diagram of a video area in a track;
FIG. 18 is a data structure diagram of one sync block among 149 sync blocks in the video data portion of the video area of the tracks shown in FIG. 17;
Fig. 19 is a vertical arrangement diagram of 149 sync blocks in the video data portion of the video area of the track shown in Fig. 17;
Fig. 20 is a data structure diagram of a sub code area in a track;
Fig. 21 is a data structure diagram of one of the sync blocks in the sub-code data portion of the sub-code area of the track shown in Fig. 20;
22 is a block diagram of a recording unit of a digital VCR to which the present invention is applied.
Fig. 23 is a block diagram of an AAUX pack data generating circuit;
24A and 24B are block diagrams of a reproduction unit of a digital VCR to which the present invention is applied.
24C is a partial block diagram of a digital VCR to which the present invention is applied.
Fig. 25 is a block diagram of an AAUX pack data reproducing circuit;
26 is a table showing the data arrangement of the AAUX source pack.
Fig. 27 is a table showing AUDIO MODE information values in header byte PC2;
28A-28E are diagrams showing speaker positions of each channel in each stereo mode;
29A to 29D and 30A to 30H are diagrams in which reference is made to explain audio control for SD signals and HD signals, respectively;
Fig. 31 is a diagram showing combinations of control data SM, CHN and PA recorded in an AAUX area among tracks for various audio signal types;
32A and 32B are diagrams showing an AAUX pack with two multi-voice bits and three speech multi-bits, respectively;
33 to 35 are diagrams showing examples of using 1-bit, 2-bit, and 3-bit speech multiplex flags, respectively;
Fig. 36 is a flow chart illustrating the operation of the device of the present invention with multi-voice indication.
* Explanation of the symbols for the main parts of the drawing *
One : Antenna 2: Tuner
4 : External analog video input 5 : External analog audio input
6 : Y/C separation circuit
7a, 7b, 7c: low-pass filter 8a, 8b, 8c: A/D converter
<background-art><p>background of the invention</p><p>The present invention relates to a digital video and audio signal recording and reproducing apparatus, in particular to control data related to a digital audio signal.</p><p>For the past several years, there have been broadcasts of stereo programs and audio bilingual programs or multilingual programs such as Euro Sports channel, and the number of such broadcasts is expected to increase.</p><p>In the current broadcasting system, only a stereo program and an audio dual (main language and sub-language) program can be distinguished. As an example of double audio broadcasting, there is a program in which the primary language is Japanese and the secondary language is English. Another example of an audio dual program is a sports program in which the main "language" is commentary and the secondary language is commentary about a team. As used herein and in the appended claims, "multiple voice" encompasses the aforementioned examples, i.e., audio signals of the same content in different languages and audio signals of different content in the same language.</p><p>In a commercial digital video cassette recorder (VCR) format that has been partially disclosed, a recording/reproducing format of a digital audio signal is defined for both High Definition (HD) video and Standard Definition (SD) video. In the case of the SD signal, a 2-channel mode (SD 2ch) and a 4-channel mode (SD 4ch) were defined. In the case of an HD signal, a 4-channel mode (HD 4ch) and an 8-channel mode (HD 8ch) are defined. These four modes are considered two groups. The amount of data used to represent the SD or HD signal of the first group of modes is twice the amount of data used to represent the signal of the second group of modes.</p><p>The first group includes a 2-channel mode of SD and a 4-channel mode of HD, where 16-bit linear quantization is performed with sampling frequencies of 48KHz, 44.1KHz and 32KHz, respectively, shown in FIGS. 1A and 1C, respectively.</p><p>The second group includes a 4-channel mode of SD and an 8-channel mode of HD, in which 12-bit nonlinear quantization is performed with a sampling frequency of 32 KHz and shown in FIGS. 1B and 1D, respectively.</p><p>According to the NTSC standard (525 lines/60Hz), 10 tracks are used to represent one SD video frame. According to the PAL standard (525 lines/50Hz), 12 tracks are used to represent one SD video frame. Also, 10 tracks (60Hz SD system) or 12 tracks (50Hz HD system) have capacity for 2 channels of digital audio signals in 16-bit mode or 4 channels of digital audio signals in 12-bit mode, respectively.</p><p>20 tracks (1125 lines/60Hz) or 24 tracks (1250 lines/50Hz) are used to express one HD video system. Accordingly, when an HD signal is recorded, an audio signal for 4 channels may be recorded in the 16-bit mode and an audio signal for 8 channels may be recorded in the 12-bit mode.</p><p>Each track is provided with a control data area AAUX for recording control data related to digital audio data. A mode signal called AUDIO MODE is recorded in the AAUX area in order to recognize audio data allocation in multiple channels (audio data is stored in each channel). 2 is a table showing the meaning of AUDIO MODE data values using the following abbreviations.</p><p>CHN: Audio channel number expressed as a group of 5 tracks. That is, the audio signal is recorded using 16 bits or 12 bits.</p><p>L: Left channel of stereo signal</p><p>R: Right channel of stereo signal</p><p>M, M1, M2: mono signal</p><p>C : Center channel of 3-channel stereo (3/0 stereo) or 4-channel stereo (3/l stereo)</p><p>S : Surround channel in 4-channel stereo (3/l stereo)</p><p>LS : Left surround channel of 4-channel stereo (2/2 stereo)</p><p>RS : Right surround channel of 4-channel stereo (2/2 stereo)</p><p>? : Unknown</p><p>- : no information</p><p>AUDIO MODE data is recorded for each track. In each track of one channel, the same AUDIO MODE data is recorded redundantly.</p><p>As shown in FIG. 3, when a multi-voice TV program is recorded in the SD 2-channel recording mode in which the number of quantization bits is 16 and the sampling frequency is 48KHz, mono signals are recorded in CH1 and CH2. The AUDIO MODE of both channels having 5 tracks each is (0010). Each rectangle indicated by a thick line in FIG. 3 represents audio data of five tracks. However, from the recorded AUDIO MODE, it is not possible to determine whether the audio signal is audio multiplexed.</p><p>As shown in FIG. 4, when the AUDIO MODE is recorded as shown in FIG. 3, at least three possibilities exist. A first possibility is that Japanese is recorded on channel 1 and English is recorded on channel 2. A second possibility is that general comments are recorded on channel 1 and specific comments, such as for a team, are recorded on channel 2. A third possibility is that the dialogue is recorded on channel 1 and the background music is recorded on channel 2.</p><p>In the 4-channel mode of SD, 4-channel mode of HD, and 8-channel mode of HD, there is a similar problem in that it is not possible to distinguish whether audio signals recorded in available channels are related.</p><p>When Japanese stereo sound and English stereo sound are recorded on a tape in 4-channel mode, the recorded sounds cannot be distinguished until they are reproduced.</p><p>A VCR capable of recording an audio signal in 8 channels, for example, an HDVCR, can simultaneously record a stereo broadcast program in four languages of the aforementioned Euro sports channel. However, in this case as well, these record formats cannot be distinguished.</p><p>Purpose and outline of the invention</p><p>It is therefore an object of the present invention to provide a digital audio recording and reproducing system that avoids the above disadvantages of the prior art.</p><p>Another object of the present invention is to provide a digital audio signal recording and reproducing apparatus capable of easily determining whether digital audio signals in a plurality of channels represent audio signals of different contents or voice multi-audio signals of related contents. .</p><p>According to one aspect of the present invention, the above object is met by providing a data generation method and system in which a digital audio signal comprising a plurality of audio signals is received. A multiplexed representation is created when two or more audio channels are associated with a common program, and the multiplexed representation is combined with a digital audio signal.</p><p>According to another aspect of the present invention there is provided a method and apparatus for reproducing data in which a digital audio signal is received comprising a plurality of audio channels and an audio multiplex indication indicating whether two or more of said audio channels are associated with a common program. . The display is activated when the multi-voice indication indicates that two or more audio channels are associated with a common program.</p><p>According to the present invention, a recorded multi-voice program can be recognized without reproducing all channels of the program. The main audio signal can be played automatically without selecting one channel. Additionally, if multiple voice channels are recorded, the user can select one of the languages.</p><p>The above and other objects, features and advantages of the present invention will become apparent from the following detailed description of a preferred embodiment of the present invention, when taken with reference to the accompanying drawings, in which corresponding parts are denoted by the same reference numerals.</p><p>Description of the preferred embodiment</p><p>A preferred embodiment of the present invention will be described with reference to the accompanying drawings. In a preferred embodiment, the present invention is applied to a digital VCR that compresses a digital video signal and records and reproduces the signal to data. However, the present invention can also be applied to a recording/reproducing apparatus using another recording medium such as an optical disc. Furthermore, the present invention may be applied to a system for transmitting a digital audio signal through a communication line.</p><p>In a digital VCR that compresses digital video data, composite digital color video data is separated into a luminance signal Y and color difference signals (RY) and (BY). The separated signals are compressed using, for example, a discrete cosine transform (DCT) and a variable length coding method. The compressed signals are recorded on magnetic tape by rotating the head in SD system (525 lines/60Hz or 652 lines/50Hz) or HS system (1125 lines/60Hz or 1250 lines/50Hz).</p><p>In the case of such a digital VCR that can be used as a general-purpose recording/reproducing device, the applicant of the present invention has proposed a data management system including an application ID. In the proposed system, the cassette has video auxiliary data (VAUX), audio auxiliary data (AAUX), sub code data, and a memory (MIC) of the cassette. Post-recording of video data, video data insertion, and recording of superimposed data in a vertical blanking period (eg, a management signal and a medical signal of a broadcasting station) are performed in a data unit to be described in detail later, referred to herein as a pack.</p><p>With the application ID system, the cassettes, mechanisms, servo systems, ITI area generation/detection circuits, etc. of a home digital VCR can be used in completely different products such as data streamers and multitrack digital tape recorders. In addition, the content of one predetermined area may be defined corresponding to the application ID of the area. Depending on the value of the application ID, various data such as video data, video data + audio data and computer data can be designated.</p><p>Hereinafter, a data structure of a recording format to which the present invention can be applied will be described with reference to FIGS. 5 to 21 .</p><p>Here, the application ID of the proposed system will be described.</p><p>Fig. 5A shows an inclined track formed on a tape for use in the digital VCR of the present invention. Fig. 5B shows one of the tracks illustrated in Fig. 5A. A timing block is formed to reliably perform a post-write operation. This timing block is called ITI (Insert and Track Information). ITI is used to precisely arrange the area of data to be rewritten in the post-write operation. The ITI should always be formed so that the track can be rewritten.</p><p>In the ITI area, a plurality of sync blocks with a short sync length are used. Sync numbers are successively assigned to the sync blocks starting from the track entry side. When performing a post-write operation, the current track position can be precisely determined if any sync block is detected. The area of the post-write operation is thus defined in relation to the current track position. In general, since the head cannot stably contact the track entry side due to the mechanical precision of the head, the sync length is shortened and many sync blocks are used to increase the detection capability.</p><p>6 is a diagram of an ITI area. As shown in FIG. 6, the ITI includes a preamble, a Start Sync Block Area (SSA), a Track Information Area (TIA), and a postamble.</p><p>The preamble has 1400 bits and functions as a run-in area for phase locked loop used during reproduction.</p><p>SSA has 61 blocks of 30 bits each.</p><p>TIA has 3 blocks with a total of 90 bits, and information about all tracks, namely, a 3-bit Track Application ID (Application ID of a Track; APT), SP/LP bits (expressing track pitch and It is used to store the pilot frame (PF) representing the reference frame of the servo system as well as the spare bit.</p><p>The postamble is a margin with 280 bits.</p><p>A MIC cassette includes a circuit board with integrated circuit (IC) memory. When the MIC cassette is mounted in the VCR, data recorded in the memory IC is read. The memory IC can store Table of Contents (TOC) information, Index information, character information, playback control information, and timer record information, as well as unique information such as tape length, tape thickness, and tape type. . In accordance with the data read from the MIC, predetermined operations such as skipping of a specific program, setting of a program reproduction order, and reproduction of a photo image by a specific program, and a timer recording operation can be executed.</p><p>The application ID is stored in the upper 3 bits of address 0 of the MIC as APM (Application ID of MIC) defining the data structure of the MIC, and in the TIA area as APT (Application ID of Track) defining the data structure of the track. is stored in The application ID defines the data structure of a region rather than an application.</p><p>Fig. 7 is a more detailed diagram of the track shown in Fig. 5B. After the ITI area, the track is divided into several areas, area 1, area 2, ... area n. APT indicates a data structure such as the position of a divided area on a track, a structure of a synchronization block, and a structure of an error correction code (ECC). Moreover, the regions, region 1, region 2, ... region n each have application IDs AP1, AP2, ... APn that define their own data structures.</p><p>8 is a diagram illustrating a hierarchical structure of application IDs for the track area. APT is a main track application ID, and defines the number of track areas. In FIG. 8 , two hierarchical levels are shown, but additionally lower hierarchical levels may be provided. APM, as an application ID of MIC, always indicates one hierarchical level. The value of APT is also recorded in the APM by the digital VCR.</p><p>Fig. 9A shows the track structure when APT = 000. Region 1, Region 2, and Region 3 are defined on the track. Furthermore, the location of the region, the structure of the sync block, the structure of the ECC, a gap for protecting each region, and an overwrite margin for protecting overwrite data are defined. Region 1, Region 2, and Region 3 each have application IDs, AP1, AP2, and AP3 defining their own data structures. When APT = 000, each area of AAUX, VAUX, sub-code, and MIC is recorded in the common pack structure.</p><p>9B shows the track area usage when AP1 = AP2 = AP3 = 000. When AP1 = 000, area 1 represents the data structure for audio of consumer digital VCR (CVCR) audio auxiliary data (AAUX). When AP2 = 000, area 2 indicates a data structure for video of CVCR video auxiliary data (VAUX). When AP3 = 000, area 3 uses the data structure of the sub-code of the CVCR sub-code ID. Furthermore, the value of APM is 000.</p><p>10 is a diagram showing the data structure of a pack. A pack generally contains 5 bytes (PC0 to PC4). A pack is the smallest unit of data group. One pack consists of related data. The first byte is the header and the remaining 4 bytes are data. However, only when character data is written to the MIC, the variable length pack structure is utilized to make more effective use of the limited buffer memory.</p><p>11 is a pack header hierarchy diagram. The upper 4 bits and the lower 4 bits of the pack header are hierarchically structured as an upper header and a lower header, respectively, and include a pack header table with a capacity of 256 entries. Furthermore, the number of levels can be increased by bit allocation. In this hierarchical structure, the contents of the pack are clearly organized and easily expandable. The pack header table is provided along with the contents of each pack. Each area is recorded by the pack header table.</p><p>12 is a diagram showing the data structure of an audio region of one track, referred to as an audio sector, and includes a preamble, a data portion, and a postamble. The preamble has 500 bits, a 400-bit run-up region used as an example run-up pattern for a phase locked loop, and two pre-syncs used to pre-detect an audio sync block. It consists of (pre-sync) blocks. The data part consists of 10500 bits of audio data. The postamble has 550 bits, one post-sync block indicating the end of the audio sector with the sync number of the ID, and 500 bits of protection used to prevent the audio sector being recorded from entering the next video sector. It consists of a guard area.</p><p>13 and 14 are diagrams showing data structures of a pre-sync block and a post-sync block, respectively. Each pre-sync block and post-sync block has 6 bytes. The 6th byte of the pre-sync block is the SP/LP identification byte. When the value of the SP/LP identification byte is FFh, it indicates the SP mode. When the value of the SP/LP identification byte is 00h, it indicates the LP mode. The 6th byte of the post-sync block is dummy data, FFh. The SP/LP identification byte is also present in the TIA area as an SP/LP flag. The SP/LP identification byte of the pre-sync block is used as a reserve of the SP/LP flag in the TIA area. In other words, when the value of the TIA area is read, the value is used. Otherwise, the SP/LP identification byte of the pre-sync block is used. 6 bytes of the pre-sync block and post-sync block are recorded after 24-25 conversion is performed, respectively. The 24-25 conversion is a modulation system in which 24-byte data is converted into 25-bit data. Accordingly, each bit length of the pre-sync block and the post-sync block is as follows.</p><p>Pre-Sync Block (6 x 2 x 8 x 25)/24 = 100 bits</p><p>Post-Sync Block (6 x 1 x 8 x 25)/24 = 50 bits</p><p>FIG. 15 is a diagram showing the data structure of one sync block (referred to as an audio sync block) out of 14 sync blocks in the audio data portion of the audio region of the track shown in FIG. 12; One audio sync block has 90 bytes. The first 5 bytes of the audio sync block have the same structure as those of the pre-sync block and post-sync block. The data portion of one audio sync block has 77 bytes protected by horizontal parity C1 (8 bytes) and vertical parity C2 (5 sync blocks). These audio sync blocks are recorded after 24-25 conversion is performed. Therefore, the total bit length of the audio sync block in one track is</p><p>(90 x 14 x 8 x 25)/24 = 10500 bits.</p><p>The first 5 bytes of the data portion are used for AAUX and contain 1 pack. Each track has 9 packs. In FIG. 15, numbers 0 to 8 indicate pack numbers of tracks.</p><p>As shown in Fig. 15, the audio region of one track contains 9 sync blocks providing a capacity for 72 x 9 = 648 bytes. Five tracks have an audio data capacity of 648 x 5 = 3240 bytes, and the audio data capacity is a digitized audio signal amount for one video frame. In other words, this is the amount of digital audio data on one channel for every 5 tracks (60 Hz system) or every 6 tracks (50 Hz system) in 16-bit mode.</p><p>Fig. 16 is a schematic diagram showing AAUX units arranged in the track direction; Audio data and sub-code data are recorded and reproduced as video frames. In Fig. 16, numbers 50 to 55 denote pack header values (hexadecimal). As shown in Fig. 16, the same pack is overwritten in each of the 10 tracks to prevent errors. Accordingly, data in the main area can be reproduced even if horizontal scratches and channel clogging occur during tape transfer. The part in which the pack header is recorded is called a main area and is used to store basic items necessary for audio data reproduction, such as a sampling frequency and the number of quantization bits.</p><p>The remaining packs are successively connected and used as selection areas. In Fig. 16, the remaining packs are connected in the direction of the arrows indicated by a, b, c, d, e, f, g, h... while skipping the packs in the main area. One video frame has 30 packs (525 lines/60Hz system) or 36 packs (625 lines/50Hz system) in the selection area. In the selection area, packs can be freely selected from the pack header table corresponding to each specific digital VCR format.</p><p>FIG. 17 is a diagram showing the data structure of a video area of one track, referred to as a video sector, and includes a preamble, a video data portion of 149 sync blocks, and a postamble. The video sector preamble and postamble data structures are as shown in FIGS. 13 and 14 . On the other hand, the number of bits in the protection area of the video sector postamble is larger than that of the audio sector postamble.</p><p>FIG. 18 is a diagram showing the data structure of one of 149 sync blocks in the video data portion of the video area of the track shown in FIG. 17, which is referred to as a video sync block. As with the audio sync block, one video sync block has 90 bytes. The first 5 bytes of the video sync block have the same structure as the pre-sync block and the post-sync block. The video sync block data portion has 77 bytes protected by horizontal parity C1 (8 bytes) and vertical parity C2. The video sync block is recorded after 24-25 conversion is performed.</p><p>The total bit length of a video sync block in one track is</p><p>(90 x 149 x 8 x 25)/24 = 11175O bits.</p><p>FIG. 19 is a diagram showing the vertical arrangement of 149 sync blocks in the video data portion of the video area of the track shown in FIG. 17; Two upper sync blocks and one sync block immediately preceding C2 parity are VAUX-only sync blocks. 77 bytes of data are used as VAUX data. DCT-compressed video data is stored in a sync block different from the VAUX sync block and the C2 sync block, that is, 135 sync blocks in the middle of FIG. Each of BUFO to BUF26 represents a buffering unit. One buffering unit is composed of 5 sync blocks. Each track has 37 buffering units. Accordingly, 10 tracks corresponding to one video frame have 270 buffering units.</p><p>In general, an effective image area is sampled from image data for one frame. The composite digital data is shuffled, and 270 groups are collected from different parts of the real picture. One of these 270 groups is the buffering unit. Each group is compressed according to a compression technique, such as a DCT technique, a quantization technique, or a variable length code encoding technique, in such a way that the amount of data representing all the groups becomes a predetermined compression value. Typically, a quantization step in which the amount of data generated is at or below a desired value is determined and used to encode the data. The encoded and generated data is packed into one buffering block with 5 sync blocks.</p><p>20 is a diagram showing the data structure of a sub-code region of one track, referred to as a sub-code sector, and includes a preamble, a sub-code data portion, and a postamble. The sub-code sector preamble and postamble data structures do not have pre-sync blocks and post-sync blocks, and are therefore different from audio and video sector preambles and postambles. Moreover, the length of the sub-code sector is shorter than that of other sectors, because the sub-code sector is frequently used for index recording such as high-speed search operations up to 200 times. Moreover, since the sub-code sector is formed in the last part of the track, it is affected by errors occurring at the beginning of the track.</p><p>FIG. 21 is a diagram showing the data structure of one of the sync blocks in the sub-code data portion of the sub-code region of the track shown in FIG. 20, which is referred to as a sub-code sync block. The length of the sub-code sync block is 12 bytes. The structure of the first 5 bytes of the sub-code sync block is the same as that of the audio-sync block and the video-sync block. The next 5 bytes are the data part containing the enemy. Horizontal parity C1 has 2 bytes and protects the data part. Unlike the audio sector and the video sector, in the sub-code sector, the product code structure using Cl and C2 is not utilized. This is because the sub-code sector is mainly used for high-speed search operations. C2 parity is often not reproduced with Cl parity. Each track has 12 sub-code sync blocks. The sub-code sync block is written after 24-25 transformation is performed.</p><p>The total bit length of a sub-code sync block in one track is</p><p>(12 x 12 x 8 x 25)/24 = 1200 bits.</p><p>A digital VCR using the data structure described with reference to FIGS. 5 to 21 is described with reference to FIGS.</p><p>22 is a block diagram of a recording unit of a digital VCR to which the present invention is applied. In the digital VCR according to the present invention, the digital luminance signal (Y) and the chrominance signals (RY), (BY) are compressed and recorded on a video sector. A digital audio signal is recorded on the audio sector. Furthermore, VAUX and AAUX are recorded in a pack structure.</p><p>The antenna 1 in Fig. 22 receives a broadcast television signal and supplies it to a tuner 2 that demodulates the TV signal into a composite color video signal (corresponding to the NTSC system or the PAL system) and an audio signal. The tuner 2 supplies a composite video signal to the switch 3a and an audio signal to the switch 3h.</p><p>The external video input terminal 4 receives the analog composite video color video signal and supplies it to the switch 3a. The external audio input terminal 5 receives an analog audio signal and supplies it to the switch 3b.</p><p>The switch 3a selects one of the composite video signal received from the tuner unit 2 and the composite video signal received from the external video input terminal 4 . The output of the switch 3a is supplied to the Y/C separation circuit 6 and the synchronization separation circuit 11 .</p><p>The Y/C separation circuit 6 separates the luminance signal Y and the color difference signals RY and BY from the synthesized video signal, and passes these signals to the low-pass filters 7a, 7b, and 7c, respectively. to limit the bandwidth of the input signal to eliminate loop-back distortion. The cutoff frequencies of the low-pass filters 7a, 7b and 7c are respectively 5.75 MHz, 1.45 HHz and 1.45 MHz in the NTSC 4:1:1 system, respectively. The cutoff frequency is changed when another system such as a PAL or SECAM 4:2:0 system is used.</p><p>A/D converters 8a, 8b, and 8c receive the low-pass filtered signal, respectively, at 13.5 MHz according to a clock signal supplied from a phase locked loop (PLL) circuit 12 and a frequency divider 13 . A luminance signal (Y) at a sampling frequency of (4 x rate), a chrominance signal (RY) at a sampling frequency of 3.375 MHz (1 x rate), and a chrominance signal (BY) at a sampling frequency of 3.75 MHz (1 x rate) is adapted to sample</p><p>The synchronization separation circuit 11 generates a vertical synchronization signal (V sync) and a horizontal synchronization signal (H sync) and supplies them to the PLL circuit 12 . The PLL circuit 12 generates a clock signal at a 4 x rate sampling frequency of 13.5 MHz locked to the input video signal by applying these signals to the A/D converter 8a and the divider 13. do. The divider 13 generates a clock signal at 1/4 of the 13.5 MHz frequency, that is, a 1 x rate sampling clock signal at 3.375 MHz, and sends this 1 x rate click signal to the A/D converters 8b and 8c. approve</p><p>Digital component video signals (Y), (RY), and (BY) are supplied from A/D converters 8a, 8b, and 8c to a blocking circuit 9, which is a raster scanned The data is converted into a block of 8 samples x 8 lines, and the blocked video data is supplied to the shuffling circuit 10 . The shuffling circuit 10 shuffles blocks. The shuffling process is performed in order not to lose data written on the tape due to horizontal scratching and head clogging of the tape. Furthermore, the shuffling circuit 10 changes the order of blocks so that the luminance signal and the chrominance signal are more easily processed in a subsequent circuit.</p><p>The shuffled blocks are a compression circuit that performs DCT compression, an estimator that determines whether data is compressed to a predetermined level, and a quantization device that quantizes the compressed data in a quantization step according to the determination by the estimator. is supplied to the data compression and encoding unit 14 having The compressed video data is packed into a predetermined sync block by a framing circuit 15 according to a predetermined rule. The output of the framing circuit 15 is fed to a combining circuit 16 .</p><p>The switch 3b selects the audio signal received from the tuner 2 or the audio signal received from the external audio signal input terminal 5, and supplies the selected analog audio signal to the A/D converter 21, this A The /D converter 21 converts the selected analog audio signal into a digital audio signal and applies this signal to the shuffling circuit 22 . The shuffling circuit 22 shuffles the digital audio data. The output of the shuffling circuit 22 is supplied to a framing circuit 23 . The framing circuit 23 aggregates audio data into an audio sync block. The output of the framing circuit 23 is supplied to the combining circuit 24 .</p><p>The mode processing microcomputer 34 for managing the modes of the VCR has a user interface. The mode processing microcomputer 34 operates in response to the field frequency of the TV image (60 Hz or 50 Hz). The mode processing microcomputer 34 generates pack data consisting of video auxiliary data VAUX, audio auxiliary data AAUX and sub-codes.</p><p>The signal processing microcomputer 20 operates in synchronization with the rotation of the drum, ie at 9000 rpm and 150 Hz. The signal processing microcomputer 20 includes video auxiliary data (VAUX), audio auxiliary data (AAUX), sub-code data, "end of title" It generates an absolute track number included in the pack and a time title code (TTC) that is stored in the sub-code. The video auxiliary data VAUX is supplied to the VAUX circuit 17 . The audio auxiliary data AAUX is supplied to the AAUX circuit 19 .</p><p>Combining circuit 16 combines the output of framing circuit 15 with the VAUX data from circuit 17 . Combining circuit 24 combines the output of framing circuit 23 with the AAUX data from circuit 19 . The outputs of the coupling circuits 16 and 24 are supplied to the switch 26 as WDATA and ADATA, respectively.</p><p>The sub-code circuit 18 generates the ID portion, namely, the data SID of AP3 and the sub-code pack data SDATA corresponding to the output of the signal processing microcomputer 20 . The generated data is supplied to the switch 26 . The sync (syuc) generating circuit 25 generates each ID part of the audio and video sync block including AP1 and AP2, pre-sync and post-sync for each ID part, and sends the generated data to the switch 26 ) is supplied to</p><p>The switch 26 selects one of the outputs, ADATA, VDATA, SID and SDATA of the circuit 25 at a predetermined timing. The output of the switch circuit 26 is supplied to an error correction code generating circuit 27, this circuit 27 adds a predetermined parity to the output of the switching circuit 26 and supplies information to which the parity is to be added to a randomizing circuit 29 . The random numbering circuit 29 randomizes the output of the error correction code generating circuit 27 to prevent a data string having the same value (0 or 1) and exceeding a predetermined length from being generated. The output of the random numbering circuit 29 is supplied to a 24/25 conversion circuit 30, which converts 24-bit data into 25-bit data to obtain a DC component for magnetic recording and reproducing operations. to remove In addition, PRIV (partial response, class 4) coding processing (1/1-D2) (not shown) suitable for digital recording is performed.</p><p>The output of the 24/25 conversion circuit 30 is supplied to a combining circuit 31, which combines the output of the 24/25 conversion circuit with the sync pattern of audio, video and sub-code. The output of the coupling circuit 31 is supplied to a switch 32 .</p><p>The mode processing microcomputer 34 applies the data APT, SP/LP and PF to the ITI circuit 33, which generates ITI sector data, and transmits the ITI sector data to the switch 32. supply</p><p>The switch 32 selects one of the output of the combining circuit 31, the ITI sector data, and the amble pattern at a predetermined timing. The data selected by the switch 32 is supplied to the switch 35, which at the head switching timing sends the selected data to the head amplifier 36a or the head amplifier 36b. Amplifiers 36a and 36b amplify selected data, and apply the amplified data to heads 37a and 37b, respectively.</p><p>The VCR has an external switch block 40 used by the user to select various modes such as recording and playback. The switch block 40 has an SP/LP recording mode setting switch. The switch signals of the switch block 40 are provided to the mechanical control microcomputer 28 and the signal processing microcomputer 20 .</p><p>23 is a block diagram of an AAUX pack data generating circuit. The circuits 201 to 207 may be a microcomputer program executed by the mode processing microcomputer 34 .</p><p>The data collection generation circuit 201 for the main area includes some copy management system data (SCMS) from the digital bus, audio mode data, sampling frequency (SMP), number of quantization bits (QU) and, Receives the CP from the tuner and generates a main area data group assembled into the bit/byte structure of the main pack. The main area data group contains multilingual indications, which are discussed in detail below. The switch 202 adds the appropriate main region pack header to the main region data group and supplies the resulting data to the parallel-to-serial (PS) conversion circuit 208 via the switch 206 .</p><p>A data collection circuit 203 for an optional area receives the digital audio music program title of the PCM broadcast together with the TV program title from the tuner, and generates an optional area data group. For the so-called A-mode and B-mode digital audio signals received from the tuner, the sampling frequency, the quantization bit number, and the like may be predetermined. To generate the AAUX closed caption pack 55h, a closed caption signal is received from the tuner within the vertical erase period. Audio information is extracted by the decoder 210 . Audio information is stored in each pack of addresses 50h and 5lh. Packs recorded in the selection area may differ depending on the type of VCR. The setting circuit 204 generates a selection area pack header and supplies this header to the switch 205 . The switch 205 adds the header to the selection area data group, and supplies the resulting data to the PS conversion circuit 208 through the switch 206 in accordance with the timing signal provided by the timing adjustment circuit 207;</p><p>The PS conversion circuit 208 converts the AAUX data into serial data, and supplies the serial data to the signal processing microcomputer 20 in a predetermined inter-microcomputer communication protocol. The signal processing microcomputer 20 converts serial data into parallel data, and stores the converted data in a buffer. Corresponding to the command generated in the AAUX circuit 19, parallel data is successively read and transmitted to the combining circuit 24 at predetermined timing.</p><p>24A and 24B are block diagrams of a reproduction unit of a digital VCR adapted to the present invention.</p><p>The heads 101a and 101b generate reproduced data signals, and supply these signals to the head amplifiers 102a and 102b, respectively. The head amplifiers amplify the reproduced data signals and apply the amplified signals to the switch 103 . The data selected by the switch 103 is supplied to an equalization circuit 104 that performs de-emphasis processing. When data is written, a so-called emphasizing process (eg, partial response, class 4) is performed to improve the electromagnetic conversion characteristics of the tape and the magnetic head.</p><p>The output of the equalization circuit 104 is applied to an A/D converter 106 and a click extraction circuit 105 . The clock extraction circuit 105 extracts a clock signal from the reproduction signal. The output of the equalization circuit 104 is digitized by the A/D converter 106 at a timing determined by the extracted clock signal. The resulting 1-bit data is written into a first-in-first-out (FIFO) memory 107, and read from this memory to a sync pattern detection circuit 108.</p><p>The sync pattern of each region is supplied to the sync pattern detection circuit 108 through the switch 109 . The switch position of the switch 109 changes corresponding to the timing circuit 113 . The sync pattern detection circuit 108 has a so-called flywheel configuration in order to prevent errors that occur accidentally. In the flywheel configuration, whenever a sync pattern is detected, it is determined whether the same sync pattern has been received for a period of a predetermined length. For example, if the result of this determination is "Yes" three or more times, the circuit 108 detects that the sync pattern is reliable.</p><p>When a reliable sync pattern is detected, the amount of movement for composing one sync block extracted from each stage of the FIFO 107 is determined. Corresponding to the amount of movement, required bits are applied to the sync block lock latch 111 through the switch 110 .</p><p>The sync number of the acquired sync is extracted by the extraction circuit 112 and applied to the timing circuit 113 . Since the head position on the track corresponds to the sync number, the switch positions of switches 109 and 114 change.</p><p>For the ITI sector, switch 114 is located downstream. The separation circuit 115 separates the ITI sink pattern. The ITI sync pattern is supplied to the ITI decoder 116 . In the ITI area, encoded data is recorded. Therefore, by decoding data in the ITI area, APT, SP/LP and PF data can be obtained. The decoded data is supplied to a mode processing microcomputer 117, which determines the operation mode and the like of the VCR and is connected to an external operation key 118. The mode processing microcomputer 117 controls the reproduction unit of the VCR in cooperation with the mechanical control microcomputer 128 and the signal processing microcomputer 151 .</p><p>In the case of an audio or video sector or a sub-code sector, the switch 114 is located above it. The separation circuit 122 extracts the sync pattern of each sector, and supplies the extracted sync pattern to the inverse randomization circuit through the 24/25 inverse transform circuit 123 to restore the original data sequence. The restored data is supplied to the error correction circuit 125 .</p><p>The error correction circuit 125 detects and corrects erroneous data. If there is data that cannot be corrected, an error flag is added to this data. The output of circuit 125 is applied to switch 126 .</p><p>The circuit 127 processes the ID portion of the A/V sector, pre-sync and post-sync. The circuit 127 provides a sync number, track number, and SP/ stored in each sync of pre-sync and post-sync. LP is extracted, and this extracted data is supplied to a timing circuit 113 that generates various timing signals. Further, the circuit 127 extracts the application IDs AP1 to AP2 and supplies them to all the processing microcomputers 117, and the microcomputer 117 determines the formats corresponding to the AP1 to AP2. When AP1 to AP2 are 000, the mode processing microcomputer 117 defines AREA2 (refer to FIGS. 7 and 8) as an image data area, and assumes that a normal operation will occur.</p><p>Otherwise, the mode processing microcomputer performs warning processing.</p><p>The mode processing microcomputer 117 determines the SP/LP information stored in the ITI area. In the TIA area of the ITI area, the SP/LP information is written three times. By the rule of majority vote, the reliability of SP/LP information is improved. In the audio sector and the video sector, there are a total of four sync blocks in which SP/LP information is written. By the rule of majority vote, reliability is further improved. If the SP/LP information written in the ITI area does not match that written in the pre-sync block, the information written in the ITI area is preferentially used.</p><p>The video sector and reproduction data are separated into video data and VAUX data by a switch 129 shown in Fig. 24B.</p><p>The video data is supplied to the deframing circuit 130 along with the error flag. The deframing circuit 130 decompresses a frame of video data to supply image data, and the image data is supplied to a data decompression and decoding unit including the dequantization circuit 131 and the decompression circuit 132 . The circuit 131 inverse quantizes the image data from the deframing circuit 130 and supplies the inverse quantized data to the circuit 132 . The circuit 132 inverse orthogonally transforms the inverse quantized data to generate inverse compressed data, and supplies the inversely compressed data to the deshuffling circuit 133 . The deshuffling circuit 133 deshuffles the decompressed data, and the deshuffled data is applied to the block de-segmenting circuit 134 as luminance and chrominance data. The block de-segmenting circuit recovers the original image sequence.</p><p>The de-segmented luminance and chrominance signals are supplied to D/A converters 135a, 135b, and 135c, respectively, and the converters generate analog signals according to clock signals of 13.5 MHz, 3.375 MHz, and 3.375 MHz, respectively (NTSC signal case).</p><p>The oscillator 139 generates a 13.5 MHz clock signal based on the output of the crystal oscillator 138 , and supplies the 13.5 MHz clock signal to the frequency divider 140 . Frequency divider 140 generates clock signals at 6.75 MHz and 3.375 MHz. In addition, the oscillator 139 applies a 13.5 MHz signal to the synchronization signal generator circuit 141 , and the synchronization signal generator circuit generates synchronization signals such as vertical and horizontal synchronization signals according to NTSC standards and supplies them to the combining circuit 137 .</p><p>The analog luminance and chrominance signals are supplied to the Y/C combining circuit 136 , which combines these signals and sends the combined signal to the combining circuit 137 .</p><p>The combining circuit 137 combines the combined signal and the synchronization signal, and supplies the resulting composite analog video signal to the output terminal 142 .</p><p>Data reproduced from the audio sector is supplied to a switch 143, which separates the data into audio data and AAUX data. Audio data is supplied to the deshuffling circuit 145 . The deshuffling circuit 145 recovers the raw base of the audio data. At this time, if necessary, the audio data is interpolated according to the error flag. The output of the deshuffling channel 145 is supplied to the D/A converter 146, and the D/A converter 146 recovers the analog audio signal and supplies it to the output terminal 147 in synchronization with the video data.</p><p>The VAUX and AAUX data selected by the switches 129 and 143 are supplied to the VAUX circuit 148 and the AAUX circuit 150, respectively. The VAUX circuit 148 and the AAUX circuit 150 perform pre-processing such as rule-of-majority processing for multiple write situations according to the error flag. The ID portion and data portion of the sub-code sector are supplied to the sub-code circuit 149 . The sub-code circuit 149 performs pre-processing such as majority rule processing according to the error flag.</p><p>The output of the sub-code circuit 149 is supplied to a signal processing microcomputer 151, which performs a final read operation.</p><p>25 is a block diagram of the AAUX pack data reproducing circuit 150. As shown in FIG.</p><p>The AAUX data received through the switch 143 is divided into main area data and selection area data by the switch 301 controlled by the write-side controller 302 at predetermined timing.</p><p>The pack header detection circuit 303 reads the main area pack data header, and controls the switch 304 according to the read main area pack data header. When the pack data has no error, the pack data is written to the main area memory 305, and the main area memory 305 stores 8 bits of data and 1 bit of an error flag for each data word. The initial setting of the data content for each video frame in the main area memory 305 is, for example, "1' (no information). If an error is detected, no action is taken. If no error is detected, error-free data and error flag "0" are written. Since the same pack is written No. 10 (NTSC) or No. 12 (PAL) in the main area, when one video frame is completed, data with an error flag "1" is finally recognized as data in which an error occurred.</p><p>Since one pack is written to the selection area, an error flag is written to the selection area FIFO 308 along with the data.</p><p>The contents of the memory 305 and FIFO 308 are supplied to the signal processing microcomputer 151 through switches 306 and 307 controlled by the read timing controller 309. The signal processing microcomputer 151 analyzes the data for the main area and the selection area corresponding to the received pack data and the error flag. After the parallel data is converted into serial data, this converted signal is supplied to the mode processing microcomputer 117 . The mode processing microcomputer 117 stores parallel data, separates pack data, and analyzes the separated data.</p><p>The multi-voice display of the recording format according to the present invention will be described later.</p><p>Fig. 15 shows nine sync blocks (0 ... 8) in the audio data portion of the audio region of the track shown in Fig. 12, reminding that each of these nine sync blocks contains a 5-byte AAUX pack. lets do it. As shown in FIG. 10, the first byte (PC0) of each pack is a header.</p><p>Fig. 26 shows the data arrangement of the AAUX pack for the source material to be written when the header byte PC0 = 50h. There are packs of many data structure types corresponding to the header, and the data structure shown in FIG. 26 shows multiple bits of voice as an embodiment of the present invention. Data byte PC1 contains the following information.</p><p>LF (1 bit): This indicates whether the video sampling frequency and audio sampling frequency are locked or not. Since the video sampling frequency is not a simple multiple of the audio sampling frequency, the number of audio samples per frame of video samples must be varied for the video and audio sampling frequencies to be fixed.</p><p>AFSIZE (6 bits): Indicates the size of an audio frame (the number of audio samples) in one video frame. When video and audio sampling frequencies are locked, AFSIZE is different in size per video frame.</p><p>Data byte PC2 has the following information.</p><p>SM (1 bit): Indicates whether a lumped audio signal is recorded. (SM = "1"). The lumped audio signal represents an HD audio signal recorded using the two audio blocks in the front and the two audio blocks in the back, so the recorded audio signal will be output at the same time.</p><p>CHN (2 bits) Indicates the number of audio channels in an audio block spanning 5 or 6 tracks. CHN = "00" indicates that one channel is recorded in the audio block, CHN = "01" indicates that both channels are recorded in the audio block, and the other values of CHN are reserved.</p><p>PA (1 bit): Indicates whether both channels are played simultaneously (PA = "0").</p><p>AUDIO MODE (4 bits): Indicates the order of the audio data being recorded.</p><p>Data byte PC3 has the following information:</p><p>ML (1 bit): Indicates whether or not the data is recorded in voice multiplex. ML= "0" indicates that the data was recorded as multiplex. ML ="1" indicates that the data was not recorded as multiplex.</p><p>50/60 (1 bit): Indicates the frame frequency of the video signal.</p><p>STYPE (5 bits): Indicates whether the video signal is SD or HD.</p><p>Data byte PC4 has the following information.</p><p>EF (1 bit): Indicates whether an accent is present.</p><p>TC (1 bit): Represents a time integer.</p><p>SMP (3 bits): Indicates the sampling frequency.</p><p>QU (3 bits): Indicates the number of quantization bits.</p><p>27 is a table showing the value of AUDIO MODE information of the header byte PC2. The definition of the table of FIG. 27 is similar to the definition of the table of FIG. 2 and includes the following.</p><p>Wo: woofer channel</p><p>LC: Left center channel in 8-channel stereo</p><p>RC: Right center channel in 8-channel stereo</p><p>28A to 28E are diagrams showing the speaker positions of each channel in each stereo mode. The listener position was assumed to be in the center of each circle.</p><p>Fig. 28A shows a 3/0 stereo mode with 3 speakers (L, C and R) in front of the listener and no speakers behind the listener. The center speaker is located directly in front of the listener. The right and left speakers are positioned 45° away from the center speaker.</p><p>Fig. 28B is a 3/1 stereo mode with 3 speakers (L, C and R) in front of the listener and the surround speakers S behind the listener. The surround speakers are located directly behind the listener.</p><p>Fig. 28C is a 2/2 stereo mode in the case where the two speakers L and R are in front of the listener and the two speakers LS (Left Surround and RS; Right Surround) are located at the listener's side.</p><p>Figure 28D is a 3/4 + Wo stereo mode where 3 speakers (L, C and R) are located in front of the listener and 4 speakers (Ls1, Ls2, Rs1, Rs2) are located behind the listener. The position of the woofer speaker is not an issue, as it cannot detect the direction of low-frequency sound.</p><p>28E is a 5/2 + Wo stereo mode with 5 speakers (L, Lc, C, Rc, R) in front of the listener and 2 speakers (Ls, Rs) behind the listener.</p><p>Audio control data having AUDIO MODE, PA, SM and CHN information for SD and HD signals, respectively, will be described with reference to FIGS. 29A to 29D and 30A to 30H.</p><p>29A-29D show SM = 0 in all cases since standard quality signals are shown.</p><p>Fig. 29A shows audio control data when a stereo signal is recorded in the stereo two-channel mode. Since the left audio signal and the right audio signal are output simultaneously, PA is "0".</p><p>29B is an example in which two monaural signals having different contents (eg, programs in two languages) are recorded. Since the two monaural signals are output separately, PA is "1".</p><p>29C is an example of a case in which a 3/1 stereo signal is recorded in the SD 4-channel mode. Since LR (left and right audio signals) and CS (center and surround audio signals) can be output simultaneously, PA is "0" am. Since both audio signals are recorded in one audio block spanning 5 or 6 tracks, CHN is "01".</p><p>29D is an example of a case in which two independent stereo audio signals (LR and L'R') are recorded. PA is "1" because both stereo audio signals are output separately. CHN is "01" because both audio signals are recorded in one audio block.</p><p>In Figures 30A-30C, the HD 4-channel mode is shown. Since one audio signal is recorded in one audio block in these cases, CHN = "00". In these cases, since the audio signals of the previous two audio blocks and the audio signals of the latter two audio blocks are respectively output, SM = 0.</p><p>30A shows an example of a case in which a stereo signal is recorded when using the previous two audio blocks in the HD 4-channel mode. Since L (left audio signal) and R (right audio signal) can be output simultaneously, PA is "0".</p><p>30B shows an example of a case in which two stereo signals (LR and L'R') are recorded in the HD 4-channel mode. Since L and R of the previous two audio blocks are output simultaneously, the PA of the previous two audio blocks is "0". Since L' and R' of the latter two audio blocks are output simultaneously, the PA of the latter two audio blocks is "0" am.</p><p>30C shows an example of a case in which a stereo signal and two monaural signals are recorded in the HD 4-channel mode. Since L and R are output at the same time, PA among the previous two channels is "0". Since the two monaural audio signals are respectively output, the PA of the two audio blocks in the back is "1".</p><p>30D and 30E, the HD lumped mode 4ch is shown. In the case of a lumped audio signal, it is not necessary to record the PA as PA = "1" (no information). In these cases, since the audio signals are all output at the same time, that is, these signals are lumped, SM = 1.</p><p>30D shows an example of a case where a 3/0 stereo signal is recorded in the HD 4-channel mode.</p><p>30E shows an example of a case where a 3/1 stereo signal is recorded in the HD 4-channel mode.</p><p>In Figures 30F-30G, the HD-8 channel mode is shown.</p><p>30F is an example of a case where a pair of 3/1 stereo signals is recorded in HD 8-channel mode. Since L, R, C and S of the previous two audio blocks are output simultaneously, PA = "0" for the previous two audio blocks. Since L', R', C' and S' of the latter two audio blocks are output simultaneously, PA = "0" for the latter two audio blocks. Since the audio signals of the previous two blocks (LRCS) and the audio signals of the latter two blocks (L'R'C'S) are not output at the same time, this audio signal is not a lumped audio signal and SM = 0.</p><p>30G shows an example of a case where 4 sets of stereo signals are recorded in the HD 8-channel mode. Since L1R1 of the first audio block and L2R2 of the second audio block are output separately, PA="1" for the previous two audio blocks. Since L3R3 of the third audio block and L4R4 of the fourth audio block are output separately, PA="1" for the latter two audio blocks.</p><p>30H describes the HD lumped mode 8ch. 30H shows an example of a case where a 5/2 stereo signal and a woofer signal are recorded in the HD 8-channel mode. Since all recorded signals are output simultaneously, this signal is a lumped audio signal and SM = "1" am. PA = "1" (no information) because this signal is a lumped audio signal.</p><p>Fig. 31 is a table showing combinations of control data SM, CHN and PA recorded in the track AAUX area for various types of audio signals.</p><p>It will be recalled that Figure 26 shows an AAUX pack with one voice multiple bit (ML) in data byte PC3. The one-bit voice multiplex flag ML is defined as follows.</p><p>0 : The same program is recorded in voice multiplex.</p><p>One : The same program is not recorded or is unknown.</p><p>"Multi-voice" indicates audio having different content in the same language or audio having the same content in different languages.</p><p>Fig. 32A shows an AAUX pack with two multi-voice bits ML2, ML1, in data byte PC3. The 2-bit speech multiplex flag ML is defined as follows.</p><p>00; The same program is recorded in voice multiplex. However, there are no other programs recorded as voice multiplexes.</p><p>01; The same program is recorded in voice multiplex. However, it is one program recorded in voice multiplex.</p><p>10; The same program is recorded in voice multiplex. However, there are two or more programs recorded in voice multiplex.</p><p>11; The same program is not recorded or known as a multiplex (this definition is requested for post-recording).</p><p>Figure 32B shows an AAUX pack with 3 bits ML2, ML1, ML0 being voice multiplexed. Bits ML2, MLI are in data byte PC3. Bit MLO is in data byte PC1. The 3-bit speech multiplex flag ML is defined as follows.</p><p>000 : There is one channel with the same program recorded in different languages.</p><p>001 : There are 2 channels where the same program is recorded in different languages.</p><p>010 : There are 3 channels with the same program recorded in different languages.</p><p>011 : There are 4 channels with the same program recorded in different languages.</p><p>100 : There are 5 channels with the same program recorded in different languages.</p><p>101 : There are 6 channels with the same program recorded in different languages.</p><p>110 : There are 7 channels with the same program recorded in different languages.</p><p>111 : The same program is not recorded or known as a multiplex (this definition is requested for post-recording).</p><p>33 to 35 show examples of using 1-bit, 2-bit, and 3-bit speech multiplex flags, respectively.</p><p>33A to 33G show examples of using a 1-bit multi-voice flag.</p><p>33A shows an example in which two monaural signals Ml and M2 are recorded in the SD 4-channel format. When M1 is a music signal and M2 is a story signal, ML = 1.</p><p>33B shows an example in which two monaural signals Ml and M2 are recorded in the SD 4-channel format. When M1 is Japanese audio and M2 is English audio (in the case of bilingual audio), ML = 0. In this multi-voice recording mode, the Japanese sound is the main sound recorded in 5 tracks before the English sound. This relation applies to other recording examples.</p><p>In the case of the multi-voice recording mode, when the recording channel of the main note is allocated, the channel of the main note may be selectively reproduced. As shown in Fig. 24C, the channel selector 180 for selecting the channel of the audio signal is between the desuffling circuit 145 of the VCR reproducing circuit and the D/A conversion circuit 146 shown in Fig. 24B. is located in The selector 180 indicates to the user whether a multiplex signal has been recorded or not by activating a display 182, which may be an alphanumeric display or a lamp on the console or a remote device. The user selects among the available channels using a switch block 181 or other suitable data entry device.</p><p>Accordingly, the user can easily determine whether or not the signal has been recorded as a multi-voice flag in response to the multi-voice flag ML. For example, when the value of the flag ML is displayed, the user can know whether the signal is multiplexed or not, and can select the desired channel.</p><p>In the above discussion, the primary audio is recorded before the secondary audio in one video frame. However, the present invention is not limited to such a method. Instead, the user can assign a recording location for each language (eg, first channel for English and second channel for French). Optionally, both an automatic mode for recording the main audio prior to the secondary audio and a manual mode for allowing the user to assign the location of each language may be provided.</p><p>33C shows an example of the case in which four monaural signals Ml, M2, M3, and M4 are recorded in the SD 4-channel format. When M1 is a Japanese sound and M2 is an English sound, ML = 0 for M1 and M2 (channel 1 and channel 2). When M3 is a classical music note and M4 is a rock music note, ML = 1 for M3 and M4 (channel 3 and channel 4).</p><p>33D shows an example in which two stereo signals (Ll, Rl and L2, R2) are recorded in the SD 4-channel format. When Ll and Rl are classical music, ML = 1 for Ll and Rl, and when L2 and R2 are rock music, ML = 1 for L2 and R2.</p><p>Fig. 33E shows another example in which two stereo signals (Ll, Rl and L2, R2) are recorded in SD 4-channel format. When L1 and R1 are Japanese cinematic languages, ML = 0 for L1 and R1. When L2 and R2 are English film language, ML = 0 for L2 and R2, Japanese language (main audio) is recorded before English language (secondary audio).</p><p>33F shows an example of an HD 8-channel format. When 4 stereo notes are recorded and L1 and R1 are English film language, ML = 0 for L1 and R1. When L2 and R2 are French cinematic languages, ML = 0 for L2 and R2. When L3 and R3 are Dutch cinematic languages, ML=0 for L3 and R3. ML = 0 for L4 and R4 when L4 and R4 are German film language negatives. Accordingly, the recorded four-language stereo signal can be easily determined corresponding to the flag ML.</p><p>33G shows another example of an HD 8-channel format in which two stereo signals and four monaural signals are recorded. When L1 and R1 are English cinematic language, ML = 0 for L1 and R1 (channel A and channel B). When L2 and R2 are classical notes, ML = 1 for L2 and R2 (channel C and channel D). In this case, the English language is treated as the main audio. When M1, M2, M3 and M4 are Dutch, German, Japanese and Spanish languages, respectively, ML = 0 for these signals (channel EH).</p><p>The number of languages recorded in one video frame can be determined by counting the multi-voice flag ML = 0, which is 1 bit in one video frame. Audio with the recording number selected by the user is automatically selected and played. When the user selects the second audio, the language of the second audio is selected and played.</p><p>34A to 34D show an example of using a 2-bit multi-voice flag in the HD 8-channel format.</p><p>Fig. 34A shows an example of a case in which four language film languages (English, French, Dutch, German) are recorded. In this case, the multi-voice flag ML of all 2-bits is "00", indicating that there is no other program recorded as a multi-voice even if the same program is recorded as a multi-voice.</p><p>34B shows an example of the case in which the film languages (English, Dutch and German) of three countries and classical music (L2 and R2) are recorded. In this case, the multiplex flags for L2 and R2 indicate "11", which means that the same program has not been recorded or known as multiplex. Another multi-voice flag is "00".</p><p>34C is a case in which two film languages (Japanese, English) are recorded as Ll and, Rl, and L2 and R2, respectively, and a Japanese news program and an English news program are recorded as L3 and R3 and L4 and R4 respectively. An example is shown. In this case, the multi-voice flag (ML) for all channels is "01" indicating that there is another program recorded in the multi-voice, even if the same program is recorded in the multi-voice.</p><p>34D shows that bilingual movie languages in Japanese and English are recorded as L1 and R1 and L2 and R2, respectively, and bilingual news programs in Japanese and English are recorded as M3 and M4, respectively, and Japanese and an example in which bilingual comic dialogues in English are recorded as M3 and M4, respectively. The primary audio is recorded before the secondary audio. In this case, the multiplex audio flag (ML) for all channels is "10" indicating that there are two or more different programs recorded in the multiplex audio even if the same program is recorded in the audio multiplex.</p><p>35A to 35F show examples of using a 3-bit voice multiplex flag in HD 8-channel format.</p><p>Fig. 35A shows an example in which movie audio in four languages, in English, French, Dutch and German, is recorded as a stereo signal. In this case, ML = 010 for all channels indicates that there are three channels in which the same program is recorded in different languages.</p><p>Fig. 35B shows an example in which trilingual movie audio in English, French and German is recorded as a stereo signal and classical music is recorded as L2 and R2. In this case, ML = 111 for the classical music channel indicates that the same program is not recorded or is unknown. Also, ML = 001 for different channels indicates that there are two channels in which the same program is recorded in different languages.</p><p>35C shows that bilingual film audio in Japanese and English is recorded as L1 and R1 and L2 and R2, respectively, and bilingual news programs in Japanese and English are recorded as L3 and R3 and L4 and R4, respectively. An example of what has been done is shown. In this case, the voice multiplex flag ML = 000 for all channels indicates that there is one channel in which the same program is recorded in different languages.</p><p>35D shows bilingual movie audio in Japanese and English recorded as Ll and Rl and L2 and R2, respectively, and a bilingual news program in Japanese and English as M1 and M2, respectively; and an example in which bilingual comic dialogue programs in English are recorded as M3 and M4, respectively. The multi-voice flag ML = 000 for all channels indicates that there is one channel in which the same program is recorded in different languages.</p><p>35E shows an example in which monaural signals Ml to M8 are recorded on eight channels. Audio of a baseball game broadcast program consisting of a general commentary in Japanese, a commentary on a specific team in Japanese, a general commentary in English, and a commentary on a specific team in English is recorded as Ml, M2, M3 and M4, respectively. The multi-voice flag ML = 010 for their signal (channel AD) indicates that there are three channels in which the same program is recorded in different languages. News in Japanese and English is recorded as M5 and M6, while comic dialogue in Japanese and English is recorded as M7 and M8. The multi-voice flag ML = 000 for these signals (channels E to H) indicates that there are two channels in which the same program is recorded in different languages.</p><p>35F shows another example in which monaural signals Ml to M8 are recorded on eight channels. The audio multiplex movie audio is recorded as monaural signals Ml to M8. A Japanese movie voice as the main note is recorded before the movie voice sound in another language. Film audio sounds in other languages in English, German, Dutch, French, Russian, Italian and Spanish are recorded as M2 to M8, respectively. The multi-voice flag ML = 110 set for all 8 channels indicates that there are 7 channels in which the same program is recorded in different languages.</p><p>Fig. 36 is a flow chart illustrating the operation of a device according to the present invention with multi-voice indication. The flowchart of FIG. 36 shows the program executed by the VCR of FIG. Assume that the system notifies the user of the number of unrelated programs represented in the recorded audio channel and that the user has selected one of their programs according to prior art which is not part of the present invention. That is, the flowchart of FIG. 36 relates to a situation in which the selected program has or does not have a multi-voice channel associated with it.</p><p>In step 610, N is initialized to 1. The parameter N indicates which of the set of related audio channels is evaluated. In a four-channel system, the maximum value of N is 4 (e.g., an audio program in four languages), whereas in an eight-channel system, the maximum value of N is 8 (e.g., an audio program in eight languages),</p><p>In step 620, the Nth audio block is played.</p><p>At step 630, it is determined whether the ML indicator has a value of zero. If it does not have a zero value, for example, when ML = "1", then, in step 670, the multi-voice display is released, and in step 680, the program ends.</p><p>In step 630, ML = "0" Once this has been determined, in a next step 640, the multi-voice display is activated to inform the user that at least one other language or narration may be used for the program to be viewed. The multi-voice display may be, for example, a message displayed on a television set, or a lamp on a console or remote device.</p><p>In step 650, it is determined whether the user has selected the next channel, either by pressing a button on the portable remote control or by entering a specific channel number. If the next channel has not been selected, The user is deemed satisfied with the currently played language or commentary, and at step 680, the program ends.</p><p>If it is determined in step 650 that the user has selected the next channel, then in step 660 N is incremented and the program returns to step 620 . In step 660, if the value of N just incremented exceeds the number of relevant audio channels of the selected program, then the number of relevant audio channels of the selected program is subtracted from the just incremented value of N, whereby the user can select the voice of the selected program. Allow multiple channels to loop.</p><p>According to the present invention, it is determined whether or not the transmitted digital audio signal is multiplexed. In other words, the user can know the language of the recorded sound without having to play all channels for it. When the audio signal of the Zhuyin is recorded on the front sound channel in a predetermined area, for example, one video frame, the Zhuyin can be automatically initially reproduced without the need to switch channels. In addition, since the user can select a channel of a language recorded in voice multiplex, an audio channel to be initially reproduced can be selected.</p><p>While the illustrative embodiments of the present invention and various modifications thereof have been described in detail herein with reference to the accompanying drawings, it is to be understood that the present invention is not limited to the specific embodiments and modifications described above, as defined in the appended claims. It should be understood that various changes and modifications may be made by those skilled in the art without departing from the scope or spirit of the present invention as described.</p></background-art>
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Every citation, both ways
| Document | Relation | Office | Cited during |
|---|---|---|---|
| EP0374433A1 | Cites | European Patent Office (EPO) | Examiner |
9 members in 5 offices
Priority claims5
| Document | Office | Kind | Date |
|---|---|---|---|
| 12299794 | Japan | A | |
| 12299794 | Japan | A | |
| 94122997 | Japan | – | |
| 94122997 | – | – | – |
| JP19940122997 | – | – | – |
Members9
| Document | Office | Kind | |
|---|---|---|---|
| EP0682421A1 | European Patent Office (EPO) | A1 | |
| JPH07307062A | Japan | A | |
| KR950034068A | Republic of Korea | A | |
| US2001015863A1 | United States of America | A1 | |
| US6344939B2 | United States of America | B2 | |
| EP0682421B1 | European Patent Office (EPO) | B1 | |
| DE69529696D1 | Germany | D1 | |
| DE69529696T2 | Germany | T2 | |
| KR100417552B1This record | Republic of Korea | B1 |
8 legal events, as the office reported them to INPADOC
Over the term
Point at a mark for the eventEvents
| Event | Code | |
|---|---|---|
| Lapse due to unpaid annual feeLapsedLAPS | LAPS | |
| Annual fee paymentFPAY | FPAY | |
| Publication of correctionG170 | G170 | |
| Written decision to grantGRNT | GRNT | |
| Decision to grant or registration of patent rightE701 | E701 | |
| Notification of reason for refusalE902 | E902 | |
| Notification of reason for refusalE902 | E902 | |
| Request for examinationA201 | A201 |
Numbers
- Publication
- 1004175520000
- Publication, DOCDB
- 100417552
- Publication, EPODOC
- KR100417552B
- Application
- 100011653
- Application, DOCDB
- 19950011653
- Application, EPODOC
- KR19950011653
Titles4
- Korean
- 음성다중표시를갖는디지탈오디오채널
- English
- Digital audio channel with voice multiplexing
- Unlabeled
- 음성 다중 표시를 갖는 디지털 오디오 채널
- Unlabeled
- Digital audio channel with voice multiplexing
Classification
- CPC, 15
- H04N9/8233
- G11B5/09
- G11B20/10527
- G11B27/032
- G11B27/11
- G11B27/3027
- G11B27/3063
- G11B2020/10592
- G11B2220/655
- G11B2220/90
- H04H20/28
- H04H20/86
- H04N5/78266
- H04N9/8047
- H04N9/8063
- IPC, 13
- G11B5 09
- G11B20 10
- H04N5 928
- G11B20 12
- G11B27 032
- G11B27 11
- G11B27 30
- H04H20 28
- H04N5 7826
- H04N5 91
- H04N9 804
- H04N9 806
- H04N9 82