Memory control system

[Detailed Description of the Invention]

[Application of the Invention] Especially the present invention relates to the memory control method for the exclusive main storage access control which occupies and uses a certain time main memory with a certain suitable device with respect to an information processor. [Background of the Invention] When the lock method of the conventional main memory unit is accessed from other devices for the object exclusively used for the main memory unit locked by a certain device (with a lock), The device which locks the access demand now is IJ jJ about a main memory unit. - A main memory unit control part Scouring until it carries out A (occupancy release), After a locking agency device releases a lock, the field demanded is read and a reply signal and republican data * are sent out to an access source-of-request device. Therefore, when the field locked is accessed, I always waited is carried out until a locking agency device cancels a lock (until a reply signal comes on the contrary). This does not need the special logic for vanity being under lock completely similarly to the Responding waiting of the usual main memory unit access, if it sees for an access request device. However, also when the lock source-of-request device has a plurality of work which should be processed by the conventional method, thing K it waits until it will become the response waiting of main memory unit access and other devices will Release the lock, if K with other processings which do not need the lock for a source-of-request device is not concerned, either but it sees from a source-of-request device, when the demand lock field is locked by other devices -- it becomes. Therefore, the a part of processing is canceled, when it is going to carry out occupancy use of the main memory field occupancy in use with other devices and [lock collides, if it cannot shift to other processings which do not need the lock, it is, and it is .. it obtained and there was an inconvenient point. [Objects of the Invention] thing K the present invention coped with the above-mentioned problem, and was made, and when a certain device occupies and uses a main memory unit, the memory control method whose processing performance improves is provided -- be. [Summary of the Invention] To achieve the above objects, in the present invention, it is going to access a main memory unit which is under lock, and a main memory unit or a main memory control device does not Cooking the access demand, but access is made possible also in a field under lock, and a It is case returns a reply signal which shows that it is under lock. Therefore, it makes it identifiable for the main memory unit to be under lock to - and an access source-of-request device, it waits until a lock is canceled, or other work is done, or suppose that it is selectable with a source-of-request device. [Example] - Below detailed [ using a drawing ] in one example of the 1 present invention. It is alike and explains. Drawing 1 is a block diagram in which the present invention shows the composition of the target information processing system. One or more sets of one or more sets (IOP) of command Processing equipment ff1(IP) 2 and input-and-output processing units 5 share main memory unit (M8) 1. Main memory control device (8C) 4 controls access to main memory unit (MS) 1 from IP2 and IOP 5. Drawing 2 is a block diagram showing the composition of the lock side Bankruptcy provided in main memory control device (8C) a. The main storage access demand from IP2 and l0P5 is inputted into priority determination circuit 10, and the only demand is chosen according to a predetermined priority. The selected demand is set to lock demand register 11 with the demand of a lock. The address from the processing unit with which address selection of the address from the processing unit selected in priority determination circuit 10 was made is chosen by address selection circuit 12, and a main memory address is set to address register 15. . If a main memory address is set as address register 15, a situation word will be read from lock array 14 to lock situation register 15. a main memory field is divided into a plurality of segments -- these -- segment Busy correspondence is carried out and a lock situation word is assigned, respectively. Each lock situation word includes the information which shows from which processing unit it is locked, when a corresponding main memory segment is locked and it is locked whether it is There. If a demand is set to lock demand register 11, the relation between the contents of this demand and the contents of lock situation register 15 will be investigated in lock decision circuit 16. If the selected demand is a thing to the main memory segment already locked by other processing units, As for a demand, Acceptance is attached, and if a receptionist signal (ACPT) is outputted from lock decision circuit 16, as for the simultaneous VC and access field, the signal (ONLOCK) which shows that it is under lock with other devices will be outputted. In this case, even if the lock or the unlocking demand has followed Acceptance on the made access demand, in order to write a lock situation word in lock array 14, lock situation data (DATA) and a lock array write-in signal (WRT) are deterred, and the Cook array 14 is not updated. The demand is although Acceptance is attached and a receptionist signal (ACFT) is outputted from lock decision circuit 16 to the main memory segment which the thing to the main memory-segment by which the selected demand is not yet locked, and the self-processing unit locks, if, If the signal (ONLOCK) which shows that it is under lock is deterred, and the lock or the unlocking demand has followed on the made demand, in order that Acceptance may write a new lock situation word in lock array 14, More which lock situation data (DATA) and a lock array write-in signal (WRT) are outputted, and is a lock situation word which Busy lock array 14. new is performed. being locked by other devices -- [ -- even if the access demand is with a lock to an access demand to the field which is Even if there is nothing, from receptionist signal (ACPT) K from lock judging * circuit 16, access to main memory unit 1 is started, and the reply signal from main memory unit 1 is returned to an access source of request, but this reply signal is accompanied, 0NLOCK signal output which shows under the lock by other devices from lock decision circuit 16 is outputted to an access source-of-request device at the a!. Drawing 5 is a figure for explaining the main memory control part and micro program part of IOP which are main memory field lock sources of request. When IOP in this example has the work which should be processed within IOP since the microprogram control system is taken, When a micro program is started and a main memory field lock demand (main memory FLgad demand with a lock) is published by Step 50 of a micro program, it is a main storage access demand signal (ftEQ) of main memory control part 21 in IOP, Address CADDH and a lock demand signal (LOCK) are set, and a demand is sent out main memory control part [20. Next, when Read Datalpha read-out directions are published at Step 51, it is a reply signal (execution of Step 52 is deterred until ADVIR A [A appearance Lf-1 (DATA) reaches.) from main memory control device 2o. Therefore, if the reply signal (ADV) over a main memory R6with lock a demand comes on the contrary like the above-mentioned, execution of Step 52 will be resumed, Step 52 tests 0NLOCK signal which shows that the other devices from main memory control device 2D added by the present invention are locking the field, and judges with other devices whether the field is [ or not ] under lock. When 0NLOCK signal is not set, it is shown that the lock of the field can be gained and it can be used exclusively. In this case, a micro program progresses to Step 55 by 0NLOCK test =0, and continues the processing henceforth. In under lock (exclusively under use), the field is set to 0NLOCK test:1 of Step 32 with a device besides -, and branches to Step 54. At Step 34, in order that the processing concerned may be exclusively in use with other devices, a part of processing concerned is canceled (re-Scouring), and when other processing demands exist, this processing routine is ended that other processings should be performed. It becomes possible performing other processings by this, and total processing performance improves. On the other hand, with a main memory control device, in the case of the conventional lock method, a demand is Scouring(ed) until other devices cancel a lock, and as for an access demand to the main memory field under lock of other devices, a reply signal does not return to it. until other devices cancel a lock as this IOP in execution of Step 32 and this IOP access demand is processed -- Wait for necessity -- it becomes things. According to this example, the main memory field under lock is also made accessible with other devices, Thing K for which 0NLOCK signal which shows that the system of the main storage access by the side of IOP is simplified, and it is under lock is added When the field makes a judgment possible in whether it is under [ lock ] or not with other devices and the field is exclusively in use with other devices, it waits, or shifts to other processings, or a source-of-request device becomes selectable. That is, if there are other processings which should be performed when the main memory field required for the processing which should be performed is exclusively used by other devices, execution of other processings will be attained and processing performance's will improve. The effect of a mouth invention] In the present invention, a main memory field under lock can be made accessible with other devices so that clearly from the above explanation. Therefore, execution of other processings is attained and an effect that processing performance improves is acquired.

[Brief Description of the Drawings]

The block diagram in which Drawing 1 shows the composition of an information processing system, the block diagram in which Drawing 2 shows the composition of a lock controlling circuit part, and Drawing 5 are figures for explaining the main memory control part and micro program part in IOP. 1 ... main memory unit (MS), 2 ... command processing unit (IP), 5 ... input-output control unit (IOP), 4 ... main memory control device (SC), 10 ... priority determination circuit, 11 ... lock demand register, 12 ... address selection circuit, 15 ... an address register and 1419. lock array, 15 ... lock situation register, 16 ... lock decision circuit, 21 ... main memory control part in IOP. Representative patent attorney Katsuo Ogawa - Drawing 1 The 2nd Tomoe