Semiconductor device
Abstract
PURPOSE:To prevent deterioration of characteristic of a titled device by contamination by the resin of a resin sealed type bipolar MOSIC by employing a double-layer structured film where a film for trapping metal ion as an insulating film is used as the lower layer while an organic insulating film as the upper layer. CONSTITUTION:In the figure, the numeral 12 indicates the Al wiring of a second layer; 13 is a polyimide resin film for the final passivation; 14 is a resin sealing body; 15 is a metal plate mounting an Si substrate forming a part of lead frame; 16 is a brazing material for mounting Si, for example, Au-Si eutectic crystal alloy metal. Thereby, deterioration of characteristic can be prevented because contamination due to metal ion (Na ion) from the resin sealing body is trapped by the phosphorus of PSG and thermal resistant surface flatness characteristic can be acquired by polyimide resin through application of DVD PSG film and polyimide resin film as the interlayer insulating film between the Al wiring of the first layer and the Al wiring of the second layer.

Term
Term ended
Projected expiry passed 25 January 2002, 24.7 years ago.
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- Published
- Projected expiry
- Today
3 claims: 3 independent, 0 dependent
- 1【特許請求の範囲】 1、半導体素子の形成された基板上に導体配線が形成され、その配線が絶縁膜を介して樹脂封止体により覆われて成る半導体装置において、上記絶縁膜として金属イオンをトラップする膜な下層とし、有機性絶縁j[す上層とする2層構造膜より成ることを特徴とする半導体装置。
- 22、上記有機性絶縁膜はポリイミド系樹脂膜雪ある特許請求の範囲第1項に記載の半導体装置。
- 33、上記半導体素子はバイポーラ素子とMO8素子とを含む特許請求の範囲第1項又は第2項に記載の半導体装置。
Independent claims3
4 paragraphs, as filed
[Detailed Description of the Invention]
The present invention relates to a semiconductor device and plastic molding form by bow ffM08 semiconductor device which has two-layer wiring in variant. As a manufacturing process of the semiconductor device (henceforth bipolar MO8-IO) with which a bipolar transistor and MO8 run District were constituted, the method was able to be considered below. making into a bipolar field a part of N'''' type epitaxial layer formed on the To-Stitch and PJl18i (silicon *) board -- the surface -- P pace diffusion and an N+ Engineering i ivy -- diffusion -- carrying out In that case, the glass membrane (Phosphor glass) containing P (Lynn) oxide formed in the semiconductor surface is removed completely. On the other hand, gate oxide (8i0. film) is formed by making the other parts of an epitaxial layer into MO8 field, A contact hole is made in the S10 * film which performed surface Lynn processing after performing B (boron) ion placing to a channel, and it lets this hole pass, and is An the 1st layer. Wiring (aluminum) is formed. forming the polyimide system organicity resin film which was besides excellent in heat-resistant 0 surface flat voltinism as an interlayer insulation film -- a this top -- the 2nd layer A! making two-layer wiring structure by forming wiring, and passing polyimide system organicity resin film * on it -- the time -- To you -- closure by a resin mold is performed. However, bipolar 8 (08IO) obtained in this process From being the structure closed by the family register with °C resin object via the polyimide system resin film including two-layer wiring on the Lynn processing glass membrane thin at the MOS side, There was a fault which the ion of alkaline metals, such as the contaminant from a sealing resin object, for example, Na etc., (sodium), fluctuates V□ (spreading and being voltage) of eight MO surface through polyimide resin M, and causes characteristic degradation. the tapir which carries out characteristic degradation prevention according [ are made in order that the present invention may remove the above-mentioned fault, and / the object ] to the contamination from resin of plastic molding type bipolar M08IO -- it is in offer of Sibezi ii / structure. the semiconductor device of Drawing 1 which has the two-layer wiring by the present invention is theoretic -- structure -- it is shown. P base 4.N+ Enstita 5. N+ collector contact s6 which 2 formed 1 in P-model 81 semiconductor substrate (substraight), formed it in N+ buried layer, and formed 3 in the surface in the N-epitaxial layer t layer constitutes NPN run District. As for a surface 8i0. film and 8, in 7, the Lynn processing film and 9 are A of the 1st layer! It is Arrangement If (electrode). The P2O (silicate glass containing Lynn) film according [ 10 ] to law 0 VD (gaseous phase chemical reaction precipitation) and 11 are polyimide system resin films, and Insulated genus between layers is constituted by these. The Poly system resin film for Passive Behavior of last [ 12 / 13 / 2nd layer Aj Association and ] and 14 are resin seal bodies. In the metal plate in which, as for 15, 8 Beam board was attached, it makes and 16 is [ part leadframe ] the low material for SN attachment, for example, a Beam u-8i eutectic crystal alloy. Thus, according to the present invention, they are non-IFflkl wiring and the 2nd layer person! It is K as if 0VD-P8Gll[and a polyimide system resin film are used as an interlayer insulation film with wiring, While Lynn of P2O carries out the trap of the contamination by the metal ion (Na ion) from a resin seal body and preventing characteristic degradation, it has the effect that the heat-resistant surface flat voltinism by polyimide system resin is securable. jlEZ figure (al~ (hl shows the manufacturing process about the example at the time of carrying out Iji1from book v by bow tMO8I OK application.)) (a) It is N+ Takinagi stratum t by a bipolar IO process usual to P-118i board (wafer) 1 top. - It passes and forms N-epitaxial layer 3. P diffusion Iso rage A key 17 * connected to P-board from the surface in a part of N-epitaxial layer 3 is formed. It is considered as a Death and field It-bipolar part in the figure, and it explains, after setting Segment key to MO8s. (0 which performs base B (boron) diffusion using the mask by 70 bl surface oxide film (8i0. film) Treasest processing, and forms field 111KPIli base 4, and it forms in P type sauce and Dorain 17 11M, respectively) cl -- it ranks next, emitter P (Lynn) Deodoshisi l A diffusion is performed, and field ■ side 'KN+ emitter 5. N+ collector contact s6 is formed. It is thinly formed in 8i0 and the 1117 surface by this emitter Deodoshisi tuber A in the glass containing a phosphorylation thing and what is called Lynn glass membrane 18. (Phosphor glass of whole dl surface is removed, oxidization Il! of a gate section is removed by Segment key, and it forms gate oxide 19V by thermal oxidation, and carries out B(boron) t ion placing after this at the channel section under a gate.) This Phosphor glass removal and B placing are performed for control of the threshold (■Tl1) which M08FETJC can set. the oxide film of portions other than A and a gate -- or [ this / carrying out i moat survival ] -- or all may be removed and a new 8i01. film may be formed in about 0.2micro in thickness by the OVD method. (Lynn processing is newly performed to el 8i0. film 7, and the thin Lynn processing film 8 for ion traps, such as alkali, is formed.) Contact Photo etch is performed after this and window opening of the contact parts, such as a pace, an emitter, sauce, and Dorain, is carried out. the 1st skin AA of fl -- aluminum for Association 9 formation -- Photoetching 1 skin -- it carries out. (g) Form 0VDP8Gi[10 in lj1m thickness by the OVD method, and form polyimide system resin 11, for example, Poly iso indolo cinchona bark Zolingio, in thickness more than 2 or 2-/Am by the rotation applying method after forming a part of 1st layer A.I. Artificial Intelligence Arrangement - in exposure Touched through hole 20 after this. Then, through hole 20b of the above-mentioned through hole 20azK 2nd [ in all ] is formed. (h) 1l. of 2nd layer A.I. Artificial Intelligence arrangement formed 12, and also form polyimide system resin 13 in a thickness of 2.2 micrometers or more as the last Bashi bayishi film. A mold is carried out with epoxy whole fruit tree & at the end to make resin seal body 14. the present invention is not limited to the above-mentioned example -- except [ this ] -- many (it has a modification.) For example, if the trap of the metal ion is carried out, it may replace with a PaG film and they may be other Insulated genus.
[Brief Description of the Drawings]
Drawing 1 is an expanded sectional view showing the theoretic structure of a semiconductor device of having two-layer Arrangement liI by the present invention. Drawing 2 (Jll~ (hl is a manufacturing process sectional view of one example of the present invention.)) A l...P-board, 2 [ ... N+ emitter, 6 / ... N+ collector contact part 7 / ... Surface &ip. ] ... N+ Filling in stratum 3 ... N-epitaxial layer, 4 ... P base, 5 A film, 8 ... Lynn place 3! 1j1.9 ... The 1st layer person! Wiring, lO...OVD-P 2O, 11 ... Poly is a Do system resin film, 12 ... The 2nd layer person! Wiring, 13 [ ... A leadframe, 16 / ... A person u-8i eutectic alloy layer 17 / ... P sauce A. ] ... A polyimide system resin film, 14 ... A resin seal body, 15 Reign, 18 ... The Lynn glass membrane, 19 ... Gate oxide, 20m, 20b ... Through hole. Representative Patent attorney Thin 1 profit Seasonal 1 figure Drawing 2
2 sheets
Sheet 1 Sheet 2
Every citation, both ways
| Document | Relation | Office | Cited during |
|---|---|---|---|
| US6989566B2 | Cited by | United States of America | Applicant |
Numbers
- Publication
- 58-127361
- Application
- 578893
Titles2
- Japanese
- 【発明の名称】半導体装置
- English
- SEMICONDUCTOR DEVICE
Classification
- CPC, 2
- H10W74/137
- H10W74/147
- IPC, 3
- H10D84 03
- H01L23 31
- H10D84 40