Controller
Abstract
PURPOSE:To reduce the power consumption more at power failure for a controller inporporated in a processor, by increasing the period of an interruption time at power failure and its waiting time. CONSTITUTION:The system in provided with a power failure clock CL2 and a clock switching circuit 9. When a power failure is detected with a power failure detecting circuit 5, a detection signal DE is given to a clock switching circuit 9, which switches the clock of a clock generating circuit 1 from CL1 to CL2. The period of the clock CL2 is taken longer than the period of the clock CL1, resulting that the WAIT state of a microprocessor is ketp longer, allowing to reduce the power consumption. Further, the signal DE is given to the microprocessor 2 via an I/O device 4, allowing the processor 2 to reduce the power consumption more with the power failure processing which has shorter processing time than the normal processing.
Term
Term ended
Projected expiry passed 26 June 2001, 25.2 years ago.
- Priority and filed
- Published
- Projected expiry
- Today
1 claim: 1 independent, 0 dependent
- 1[Claim(s)] 【特許請求の範囲】 平常時には所定周期の割込信号によって起動され、所定の処理動作が終了すると待機状態となり、次の割込信号で該待機状態を解除して所定の処理動作を行ない1停電時には平常時とは別の予備電源から電力の供給を受けて平常時と同様の手順にて動作を行なう処理装置を有してなる制御装置において、前記割込信号の時間周期を平常時と停電時とに応じて切替える手段を設け1停電時には該手段によって割込信号の時間周期を平常時よりも長くすることにより1前記処理装置の待機時間を長くするようにしたことを特徴とする制御装置0
4 paragraphs, as filed
[Detailed Description of the Invention]
This invention relates to control device 1 using processing units, such as a microprocessor which always operate by an exchange power supply and operates with a battery etc. at the time of 1 power failure, especially the power consumption reduction-ized book type at the time of the power failure in that control device. It is Tremor rare To that there is little power consumption at relations, such as 1 compensation time and battery Rice, to the time of 1 power-failure compensation as much as possible in the device which generally performs power failure compensation with a battery etc. Block diagram 1 figure 2 showing the conventional example of the control device with which Drawing 1 used the microprocessor is a flow chart for explaining the operation. In the 1st wI, l is a clock generation machine and 2 is microphone 4 A p Sessa, As for a WA I T circuit (standby) and 4, in 3, an input/output device (Ilo) and s are power failure detector circuits, 6 is Electricity j11 circuit, and as for 7, a battery and 8 are (■) when microphone lob rice field Sessa 2 is started by in Tarabud (interruption) signal IN emitted for every constant period from O clock generation circuit 1 which is a change circuit, As for my Crypt rice field Sessa 2, Acceptance performs predetermined processing based on a program predetermined in (■) 0 microphone p A p Seta 2 which repeals interruption after attaching this in Tarabud signal IN ((Ri)). When a WAIT command is executed, they are (■), data bus DB, and address bus AB, While zero microprocessor 2 by which WA I T order signal WTI is sent to WA I T@ way 3 via l10(input/output device)4 will be in a WAIT state with WA I T signal WT from the circuit 3 If it investigates whether a receptionist changes primary in Tarabud signal IN into a possible state, and there is any (0) 1 interrupt request and there are ro and an interrupt request, it will return to ■ and the same operation as the above will be repeated, and it stands by until there is the next demand, if there is nothing. With - which can be power-consumption-expense-reduced by there being little power consumption in case micro Presenter 2 is in a WA I T state compared with other operating states, therefore carrying out like the above, and time, microphone 4 which performs such processing operation -- at the time of usual, if a power failure is detected in 1 power-failure detector circuit 5 although it is operating with the electric power from exchange snowy field circuit 6, A a Set ?2 will change Electricity j16 to battery 7 A charter by change circuit 8, and they will supply electric power from the battery 7. For this reason, by 0, however 1 this gentleman type which can act as Takayuki of the Pregram at the time of a power failure as well as the above, and can perform 1 predetermined processing, Mike shive rho Sena 2 is the same, therefore in order to lengthen power failure compensation time, the time of energization and power consumption's of power failure-1 needs to increase battery capacity. However, increasing 1 capacity has a layer, while saying that a space becomes large and 1 and a charge circuit become complicated. Therefore, the object of this invention is to reduce further the power consumption at the time of the power failure of the control device having processing units, such as a microprocessor. In the 1 present invention, the above-mentioned object operates with a constant periodic interruption signal, lengthens an interruption time period at the time of a power failure of a control device having a processing unit which it comes to drive by battery compensation at the time of a power failure, and lengthens standby time of a processing unit, that is, lengthens low-power-consumption time. Therefore, it is attained. the [ hereinafter, / which are a block diagram in which <>ssm which describes the example of this invention with reference to drawings shows the example of this invention, and a flow chart Drawing 4 explains operation of Drawing 3 to be / Q / S ] -- the same amount of A mark is attached and shown about the same thing as 132 figure. clear also from these figures -- as -- a sake -- this invention -- the 1.! the conventional system explained by [-- the time of a power failure -- Ri W Poke CL, While adding Vengeance change circuit 9, the judgement function (see flow chart ■ of Drawing 4) of being the Meeting power failure which enabled it to detect 1 power-failure Detection tDll by microphone stomach Powered by Translate 7 Thu+2 via l10(input/output device)4 is given. That is, since Experiment detection signal DB beam p Poke change circuit 9 will be given if one power failure is detected by power failure detection-way 5 although the same operation as Above is performed at the time of Tortoise wedding (usual), clock change circuit 9 changes a clock generation circuit 1 paste p ivy to CL from CL. if the cycle of critter CL, is lengthened rather than the cycle of Rice field ivy CL, here at the time of a power failure at the time of 1 energization -- 1 -- the WAIT state of a microprocessor becomes long so much, therefore power consumption can be reduced. Pass I 10@ Place 4 for this power failure detection signal DI! If it is made for processing time to change to short paddle power failure processing (see sigma which is the 3rd mW) rather than processing in one microprocessor 2 at the time of energization by giving Microphone p Palm gesture Seth f2, power consumption can be reduced further. Since it is the same as that of explanation of Drawings 1 or 2 about other points, it omits. above -- 1 -- since low-power-consumption-ization much more than 1 can be attained in the control device to which operate a microprocessor and made it make predetermined processing perform by battery compensation at the time of a power failure according to this invention, When carrying out power failure compensation of the same time as the former, the battery capacity can be lessened. If it puts in another way and 1 battery capacity is the same, power failure compensation time can be made longer than before. 1 -- this invention is applicable to the general device which needs to operate a place ii device at the time of the same composition as the above, i.e., a power failure.
[Brief Description of the Drawings]
0 numerals explanation of the control device with which mansion tg used the microprocessor which conventional-example C Is a flow chart for the Peng Tuku figure in which flow chart 1 figure 3 for explaining the shown block diagram and the 2nd g of operation of Drawing 1 shows the example of this invention, and the 4th wJ to explain operation of Drawing 3 l ...... A clock generation circuit, 2 ...... Microphone lob stomach Sessa, 3 .... - and a WAI dish circuit, 4 ...... l10 (input/output device), 5 ...... The amount way 6 of power failure detection ...... A power supply circuit, 7 ...... A battery, 8 ...... A change M way, 9 ...... Ri 4 Poke change circuit-IN ...... an in Tarabud signal, a WT......WA I T signal (standby), a WTI......WA I T order signal, and DB ...... a data bus and AB ...... an address bus and DB .... - and a power failure detection signal, CL, CL, and .... a - Ri p ivy signal Representative Patent attorney Akio Namiki Representative Patent attorney Drawing 1 of Kiyoshi Matsuzaki Drawing 2 Drawing 3
Every citation, both ways
| Document | Relation | Office | Cited during |
|---|---|---|---|
| JPS61113806A | Cited by | Japan | Search report |
| US6909922B2 | Cited by | United States of America | Search report |
Numbers
- Publication
- 58-1202
- Application
- 5698333
Titles2
- Japanese
- 【発明の名称】制御装置
- English
- CONTROLLER
Classification
- IPC, 2
- G05B9 02
- G06F1 32