Nova Patents
JPS558104A

Analoggdigital converting device

Abstract

PURPOSE:To realize a high-accuracy and high-speed conversion through a simple circuit constitution for the triple integrating converter by finishing the 2nd integrating period in synchronization with the clock pulse and at the same time varying the output level of the integrator. CONSTITUTION:Input voltage Ex is integrated through the integrator comprising differential amplifier circuit A, capacitor C and resistance R1 in the 1st integrating period T1 and by the command of controller K. And 1st reference voltage +Er featuring the opposite polarity to Ex is integrated in the 2nd integrating period T2. Then the integration is finished in synchronization with clock pulse b after the output level of the integrator passed through the reference level. In the 3rd integrating period T3, voltage +Er is divided, and then the voltage of, for example, 1/10 is applied to circuit a from resistance R4 in the form of the 2nd reference voltage to carry out the integration until the output level reaches the reference level. The clock pulses are counted at the lower 2nd digit of counter N in the lapse of the period set according to voltage E0 at the start of period T2 and also at the lowest digit in period T3 each, thus obtaining the digital quantity corresponding to input Ex.

JPS558104A, drawing sheet 1
Sheet 1 of 1

Term

Term ended

Projected expiry passed 3 July 1998, 28.2 years ago.

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