Formation of semiconductor chip connecting bump

Description: TECHNICAL FIELD [Detailed description of the invention]

【0001】

[Technical field to which the invention belongs]

The present invention relates to a semiconductor chip connection bump forming method. More specifically, the present invention relates to a semiconductor chip connection bump forming method capable of preventing a defect during bump formation due to a test probe mark remaining on an electrode of a semiconductor chip component.

【0002】

[Conventional technology]

Various methods have been proposed for COB (CHIPON BOARD) technology for mounting semiconductor chip components (bare chips) directly on a substrate, depending on the purpose and application, and one of them is a flip chip mounting method. This mounting method directly mounts the semiconductor chip component on the substrate without using a wire between the semiconductor chip component and the substrate, and is also called a wireless bonding mounting method.

【0003】

The mounting process of the conventional flip chip mounting method will be described with reference to FIGS. 7 and 8. First, as shown in FIG. 7 (a), a gold wire (gold wire) 2 passed through the capillary 1 of the bonding tool. A high voltage is applied between the tip of the gold wire and the discharge electrode 3 to discharge the metal, and the discharge energy melts the tip of the gold wire 2 as shown in FIG. 7 (b), and the surface tension of the gold ball (this gold ball). Is called the initial ball.) 4 is formed.

【0004】

Next, as shown in FIG. 7 (c), the gold ball 4 is pressed by the capillary 1 against the electrode pad 6 formed on the surface of the semiconductor chip component 5, and at the same time, ultrasonic vibration is applied to FIG. 7 (d). ), The gold ball 4 is crimped to the pad 6. At this time, the gold ball 4 is plastically deformed by the concave shape formed on the inner surface of the tip of the capillary 1 to form a two-stage bump 7 composed of a large-diameter portion and a small-diameter portion as shown in FIG. 7 (e).

【0005】

Next, as shown in FIG. 7 (e), the gold wire 2 is clamped by the clamper 8 and pulled upward to cut the gold wire 2 above the bump 7. After the bumps 7 are formed on each pad 6 in this way, the heights of the bumps 7 vary. Therefore, as shown in FIG. 7 (f), the semiconductor chip component 5 is turned over and a glass plate having good flatness is obtained. Press on 9 to plastically deform the tip of each bump 7 to make the height uniform.

【0006】

Next, as shown in FIG. 8 (g), the bump 7 is pressed against the conductive paste 10 coated on a flat plate to a thickness of several microns, and the conductive paste 10 is transferred to the bump 7 as shown in FIG. 8 (h). This conductive paste 10 more reliably conducts electrical conduction between the bump 7 and the pad of the substrate when the semiconductor chip component 5 is mounted on the substrate, and a large number of silver fillers are dispersed in the epoxy resin. Things are used.

【0007】

Next, the conductive paste 10 is semi-cured so as not to flow out in a subsequent step (resin bonding step). Next, as shown in FIG. 8 (i), the thermosetting resin adhesive 12 is placed at a predetermined position on the substrate 11 on which the semiconductor chip component 5 is mounted, and the pad is connected to the wiring pattern formed on the surface of the substrate 11. The bump 7 of the semiconductor chip component is aligned and placed on the 13 and then pressurized and heated by the pressurizing and heating jig 14 from above the semiconductor chip component 5 as shown in FIG. 8 (j) to form a resin adhesive. 12 is cured to complete.

【0008】

In this case, when the resin adhesive 12 is spread by the semiconductor chip component 5, the resin adhesive 12 is prevented from entering between the conductive paste 10 applied to the bump 7 and the pad 13 of the substrate 11. The conductive paste 10 applied to the bump 7 does not reach the bump 7 until it comes into contact with the pad 13 of the substrate 11, and after that, it reaches the end of the semiconductor chip component 5 and seals the semiconductor chip component 5. It has become like.

【0009】

[Problems to be Solved by the Invention]

According to the present invention, in the conventional method of mounting a semiconductor chip component on a substrate, when forming a semiconductor chip connection bump, as shown in FIG. 9A, the surface of the aluminum pad 13 which is an electrode of the semiconductor chip component is formed. When the indentation 15 is formed, when the bump 7 is formed, as shown in FIG. 9 (b), the surface of the initial ball does not reach the bottom of the indentation 15 and a void 16 is formed, and diffusion between gold and aluminum is generated. It does not proceed and the alloy layer is not formed. Therefore, there is a problem that bumps do not arrive. One of the causes of such indentation 15 is considered to be the probe mark caused by the probe coming into contact with the pad 13 when the performance test of the semiconductor chip component is performed by itself.

【0010】

In view of the above-mentioned conventional problems, an object of the present invention is to realize a semiconductor chip connection bump forming method capable of reliably forming bumps even if there are indentations such as probe marks on the pads of the semiconductor chip component.

【0011】

[Means for solving problems]

The invention of claim 1 of the present invention is a semiconductor chip connection bump forming method in which a fine gold wire is melted by discharge energy to form a gold ball, and the gold ball is bonded onto a pad of the semiconductor chip to form a bump. When there is an indentation on the pad, the discharge energy is adjusted to form a gold ball having a soft hardness. By adopting this configuration, since the gold ball is soft, it reaches the bottom of the probe mark and complete bonding can be performed.

【0012】

The invention of claim 2 is the method for forming a semiconductor chip connection bump in which a fine gold wire is melted by discharge energy to form a gold ball, and the gold ball is bonded onto a pad of the semiconductor chip to form a bump. When there are indentations on the pad, the bump formation position is selected in the portion where there is no indentation. By adopting this configuration, the gold ball is bonded to the portion without the probe mark, so that reliable bonding can be performed.

【0013】

The invention of claim 3 is the method for forming a semiconductor chip connection bump in which a fine gold wire is melted by discharge energy to form a gold ball, and the gold ball is bonded onto a pad of the semiconductor chip to form a bump. When there are indentations on the pad, the lower surface of the gold ball is roughened. By adopting this configuration, the bonding area between the gold ball and the pad 21 is increased, and even if the pad 21 has a probe mark, reliable bonding can be performed.

【0014】

The invention of claim 4 is the method for forming a semiconductor chip connection bump in which a fine gold wire is melted by discharge energy to form a gold ball, and the gold ball is bonded onto a pad of the semiconductor chip to form a bump. When there are indentations on the pad, the surface of the pad is roughened. By adopting this configuration, the bonding area between the gold ball and the pad is increased, so that reliable bonding can be performed even if the pad 21 has a probe mark.

【0015】

The invention of claim 5 is the method for forming a semiconductor chip connection bump in which a fine gold wire is melted by discharge energy to form a gold ball, and the gold ball is bonded onto a pad of the semiconductor chip to form a bump. When there are indentations on the pad, the pad surface is smoothed by a fluttering tool. By adopting this configuration, indentation by the probe is eliminated and bumps can be reliably bonded.

【0016】

BEST MODE FOR CARRYING OUT THE INVENTION

FIG. 1 is a diagram for explaining a first embodiment of the semiconductor chip connection bump forming method of the present invention. In the figure, 20 is a semiconductor chip, 21 is a pad made of aluminum formed on the semiconductor chip, 22 is a wiring pattern connected to the pad, 23 is a bump, and 24 is a pad by a probe of a testing machine during a performance test. It is a probe mark left on the top. In the present embodiment, when the initial ball is bonded to the pad 21 having the probe mark 24 to form the bump 23, the initial ball is softly formed in advance and bonded to the pad 21 to form the bump 23.

【0017】

It is possible to form the initial ball softly by adjusting the magnitude and discharge time of the discharge current flowing between the gold wire and the discharge electrode. Figure 2 shows the discharge current value and discharge time dependence on the softness of the initial ball. The horizontal axis shows the current value and discharge time, and the vertical axis shows the softness (the amount of change when the initial ball is pressed with 20 g). Shown. From the figure, it can be seen that the softening is achieved by increasing the discharge current value and shortening the discharge time. In the present embodiment, a hardness having a change amount of 1 μm or more is effective.

【0018】

In the present embodiment configured in this way, the initial ball is softly formed, so that the plasticity is increased, and at the time of bonding, the bottom of the probe mark 24 of the pad 21 can be reached and alloyed as shown in FIG. It is possible to form a reliable bump.

【0019】

FIG. 3 is a diagram for explaining a second embodiment of the semiconductor chip connection bump forming method of the present invention. In the figure, 21 is a pad made of aluminum formed on the semiconductor chip, 23 is a bump, and 24 is a probe mark. In the present embodiment, when the initial ball is bonded to the pad 21 having the probe mark 24 to form the bump 23, as shown in the figure, the initial ball is bonded to a position avoiding the probe mark 24. In order to avoid the probe mark 24, for example, image processing by a television camera can be performed.

【0020】

In the present embodiment configured as described above, since the initial ball is bonded to the portion without the probe mark, the bonding can be performed without being affected by the probe mark, and a reliable bump 23 can be formed.

【0021】

FIG. 4 is a diagram for explaining a third embodiment of the semiconductor chip connection bump forming method of the present invention. In the figure, 20 is a semiconductor chip, 21 is a pad formed on the semiconductor chip, 22 is a wiring pattern connected to the pad, and 23 is a bump. In the present embodiment, when the initial ball is bonded to the pad 21 having the probe mark to form the bump 23, the lower surface of the initial ball is roughened in advance before bonding the initial ball, and this rough surface is formed. The surfaced surface is pressed against the pad 21 for bonding.

【0022】

In the present embodiment configured in this way, the bonding area between the initial ball and the pad 21 is increased, and reliable bonding can be performed even if the pad 21 has a probe mark. The lower surface of the initial ball can be made jagged by pressing it against a jig having a jagged surface and transferring the jaggedness before bonding.

【0023】

FIG. 5 is a diagram for explaining a fourth embodiment of the semiconductor chip connection bump forming method of the present invention. In the figure, 20 is a semiconductor chip, 21 is a pad formed on the semiconductor chip, 22 is a wiring pattern connected to the pad, and 23 is a bump. In the present embodiment, when the initial ball is bonded to the pad 21 having the probe mark to form the bump 23, the surface of the pad 21 is roughened in advance before bonding, and the surface of the pad 21 is roughened in advance. The initial balls are bonded.

【0024】

In the present embodiment configured in this way, as in the previous embodiment, the bonding area between the initial ball and the pad 21 is increased, and reliable bonding can be performed even if the pad 21 has a probe mark. It is possible to make the surface of the pad 21 a jagged surface by pressing a jig having a jagged surface.

【0025】

FIG. 6 is a diagram for explaining a fifth embodiment of the semiconductor chip connection bump forming method of the present invention. In the figure, 20 is a semiconductor chip, 21 is a pad formed on the semiconductor chip, 22 is a wiring pattern connected to the pad, 23 is a bump, 24 is a probe mark, and 25 is a fluttering tool. In this embodiment, when the initial ball is bonded to the pad 21 having the probe mark as shown in (a) to form a bump, the surface of the pad 21 is previously fluttered as shown in (b) before bonding. After fluttering with 25 to flatten the unevenness, the bump 23 is formed as shown in Fig. (C).

【0026】

In the present embodiment configured as described above, since the initial ball can be bonded to the flattened pad 21, a reliable bump 23 can be formed.

【0027】

[Effect of the invention]

According to the semiconductor chip connection bump forming method of the present invention, the initial ball is formed softly, the initial ball is bonded while avoiding probe marks, or the lower surface of the initial ball or the surface of the pad is roughened to a jagged surface. Alternatively, by flattening the surface of the pad with a fluttering tool, the initial ball can be reliably bonded to the pad, and a reliable bump can be formed.

[Simple explanation of drawings]

[Figure 1]

It is a figure for demonstrating 1st Embodiment of the semiconductor chip connection bump formation method of this invention.

[Figure 2]

It is a figure which shows the discharge current value and the discharge time dependence with respect to the softness of an initial ball.

[Fig. 3]

It is a figure for demonstrating the 2nd Embodiment of the semiconductor chip connection bump formation method of this invention.

[Fig. 4]

It is a figure for demonstrating the 3rd Embodiment of the semiconductor chip connection bump formation method of this invention.

[Fig. 5]

It is a figure for demonstrating the 4th Embodiment of the semiconductor chip connection bump formation method of this invention.

[Fig. 6]

It is a figure for demonstrating the 5th Embodiment of the semiconductor chip connection bump formation method of this invention.

[Fig. 7]

It is a figure for demonstrating the mounting process of the conventional flip chip mounting method.

[Fig. 8]

It is a figure for demonstrating the mounting process of the conventional flip chip mounting method.

[Fig. 9]

It is a figure for demonstrating the problem which the invention tries to solve.

[Explanation of symbols]

20 ... Semiconductor chip parts 21 ... pad 22 ... Wiring pattern 23 ... bump 24 ... probe scars 25 ... Fluttering tool