Transmitter

Description: TECHNICAL FIELD [Detailed description of the invention]

【0001】

[Technical field to which the invention belongs]

The present invention relates to an ATM transmission device that terminates a transmission line that performs packet communication to packetize a packet, and terminates a transmission line that performs ATM communication to packetize an ATM cell.

【0002】

[Conventional technology]

Conventionally, an ATM transmission device that terminates a transmission path that performs packet communication, converts a packet into an ATM cell and transmits it to the ATM network, and terminates a transmission path that performs ATM communication, converts the ATM cell into a packet, and transmits it to the packet network. In, all the processing of the input signal is performed by using the processor provided in the transmission device.

【0003】

FIG. 4 is a block diagram showing an example of such a conventional ATM transmission device. In FIG. 4, the packet control unit 203 processes a packet received from the packet network receiving line 201 and a packet transmitted from the packet network transmitting line 202 to the packet network. Processor 205 controls data link termination, ATM cellization, and packetization.

【0004】

The ATM cell disassembly / assembly unit 206 performs a process of disassembling the ATM cell received from the ATM network or assembling the packet received from the packet network into the ATM cell. The ATM cell transmission unit 207 transmits an ATM cell from the ATM transmission line 209 to the ATM network. The ATM cell receiving unit 208 receives the ATM cell from the ATM network receiving line 210. Bus 204 is used for data transfer between packet control unit 203, ATM cell disassembly / assembly unit 206, and processor 205.

【0005】

Next, the operation of the conventional example will be described. When a packet transmitted by packet communication from the packet network is input to the packet control unit 203, if the packet is a protocol control signal, it is sent to the processor 205 via the bus 204 in order to terminate the data link. Transferred. The processor 205 performs a process of terminating the data link of the protocol, transfers the data link to the packet control unit 203 via the bus 204, and transmits the protocol control signal to the packet network.

【0006】

Further, even when the packet input to the packet control unit 203 is user data, it is transferred to the processor 205 via the bus 204 in order to perform the process of converting the packet into an ATM cell. The processor 205 transfers the user data to the ATM cell disassembly / assembly unit 206 via the bus 204, performs the ATM cell conversion process, and transmits the user data from the ATM cell transmission unit 207 to the ATM network.

【0007】

Further, when the ATM cell transmitted from the ATM network by ATM communication is input to the ATM cell receiving unit 208, this ATM cell is transferred to the ATM cell disassembling / assembling unit 206. The ATM cell disassembly / assembly unit 206 transfers to processor 205 via bus 204 to terminate the input ATM cell. The packet control unit 203 packetizes the data read from the processor 205 and transmits the packetized data to the packet network.

【0008】

As described above, in the ATM transmission device of FIG. 4, each process of data link termination processing, ATM cell formation, and packetization is performed using the centralized processor 205.

【0009】

[Problems to be Solved by the Invention]

In this way, in the conventional ATM transmission device, each process of data link termination processing, ATM cell formation, and packetization is performed using a centrally installed processor, so that the load on the processor becomes extremely large. , When the transmission line becomes high speed, the processing by the processor cannot keep up.

【0010】

An object of the present invention is to provide an ATM transmission device that can be sufficiently adapted to high-speed transmission by providing means for reducing the load on the processor in view of the above-mentioned problems.

【0011】

[Means for solving problems]

In the present invention, if the signal input as a packet from the packet network is user data, it is converted into an ATM cell and transmitted to the ATM network, if it is a protocol control signal, it is processed by a processor and transmitted to the packet network, and further input from the ATM network. The ATM cell is configured so that each processing unit performs the processing of packetizing and transmitting it to the packet network via the bus. Therefore, a header indicating the processing destination address is attached to the data to be processed. As a frame format, it is characterized by having a means for sending to a common bus.

【0012】

Specifically, if the packet transmitted from the packet network is user data, it is converted into an ATM cell without being transferred to the processor, and a header is attached to transfer the packet to the processing unit that transmits the ATM cell. A means for removing the above header in the processing unit for transmitting the ATM cell, and a means for attaching a header for transferring to the processor to terminate the data link when the packet transmitted from the packet network is a protocol control signal. A means for removing the above-mentioned header at the processing unit for terminating the data link, a means for attaching a header for transferring the protocol control signal to the processing unit for transmitting to the packet network, and a means for transmitting the protocol control signal to the packet network. A means for attaching a header for transferring an ATM cell transmitted from an ATM network to a packetizing processing unit without transferring it to a processor, and a means for removing the above two headers in the packetizing processing unit. It is characterized by having.

【0013】

That is, in the present invention, among the packets transmitted from the packet network, only those that require data link processing are processed by the centrally installed processor, and only routing is performed based on the result of the data link processing. -Data packets reduce the load on the processor by bypassing the processor.

【0014】

BEST MODE FOR CARRYING OUT THE INVENTION

FIG. 1 is a block diagram showing an embodiment of a bus configuration in which packets and ATM cells are mixed in the ATM transmission device of the present invention. The ATM transmission device of the present invention has a packet processing unit 100 that receives a packet transmitted from a packet network and transmits a packet or a protocol control signal to the packet network, and a data link process that terminates a data link by the protocol control signal. A unit 110, an ATM cell processing unit 120 that receives an ATM cell transmitted from the ATM network and transmits the ATM cell to the ATM network, a packet processing unit 100, a data link processing unit 110, and an ATM cell processing unit 120. It is composed of a bus 130 connecting between them.

【0015】

The packet processing unit 100 receives a packet transmitted from the packet network, determines whether the packet is a protocol control signal or user data, and a packet receiving unit 101, and an ATM that converts the packet as user data into an ATM cell. Cellification unit 102, adding a header to the ATM cell and protocol control signal to transfer to the data link processing unit 110 and ATM cell processing unit 120 Header addition unit 103, transmitting packets and protocol control signals to the packet network Packet transmission unit 104, packetization unit 105 that packetizes ATM cells transferred from the ATM processing unit, data link processing unit 110, and hedder of frames transferred from the ATM cell processing unit 120. It is composed of a header detection unit 106 that removes the packet.

【0016】

The data link processing unit 110 identifies the header of the frame transferred from the packet processing unit 100 and removes the header. The header detection unit 111 and the protocol control signal from which the header has been removed terminate the data link. It is composed of a processor 112 that processes the data, and a header addition unit 113 that attaches a header to the protocol control signal of the terminated data link and transfers it to the packet processing unit 100. Further, the signal line 114 sets the routing information to the packet network or the ATM cell network obtained by the protocol control signal.

【0017】

The ATM cell processing unit 120 distinguishes the header of the packet transferred from the packet processing unit 100 and removes the header. The header detection unit 121 and the ATM cell transmission unit 122 that transmits the ATM cell from which the header has been removed to the ATM network. , The ATM cell receiver 124 that receives the ATM cell transmitted from the ATM network, and the header addition unit 123 that attaches a header to transfer the received ATM cell to the packet processing unit 100 in order to packetize it. ..

【0018】

FIG. 2 is a more detailed block diagram of the packet processing unit 100. The packet receiving unit 101 includes a selector 301 that distributes the received packet to the user data and the protocol control signal, and a determination unit 302 that determines whether the received packet is the user data or the protocol control signal. The header addition unit 103 includes a multiplexer 304 that multiplexes an ATM cell or a protocol control signal, and a frame generation unit 305 that generates a frame to be transferred onto the bus 130.

【0019】

The header detection unit 106 includes a frame decomposition unit 306 that decomposes the frame transferred from the bus 130, a determination unit 307 that determines the header of the frame to be decomposed, and a packetization unit that packets the data in the decomposed frame. It consists of a selector 308 that distributes to 105 or the packet transmitter 104. The packet transmitter 104 is composed of a multiplexer that multiplexes a packet or a protocol control signal.

【0020】

FIG. 3 shows an example of a frame format transferred onto the bus 130, in which the header including the address instructing the transfer between each processing unit is 1 byte, the packet length is 1 byte, and FCS (frame check). -Sequence) is composed of 2 bytes and a protocol control signal or ATM cell as data.

【0021】

Next, the operation of the present invention will be described with reference to FIGS. 1 to 3. In FIG. 1, when receiving a packet from the packet network, the packet input from the packet network receiving line 1 to the packet receiving unit 101 may be a protocol control signal or user data. First, the case where the packet is a protocol control signal will be described.

【0022】

The packet receiving unit 101 determines in the selector 301 whether it is a protocol control signal or user data from the packet header and distributes it. At the same time, the determination unit 302 sets a flag in the case of the protocol control signal in order to transmit the information of the protocol control signal or the user data to the frame generation unit 305. The distributed protocol control signal is input from the selector 301 to the multiplexer 304 of the header addition unit 103, and is transferred to the frame generation unit 305.

【0023】

The frame generation unit 305 confirms the flag of the determination unit 302, sets the address 1, the packet length to 1 byte, and the FCS (frame check sequence) as a header for forwarding to the data link processing unit 110. 2 bytes are added to the protocol control signal and transferred onto the bus 130 in the frame configuration shown in FIG.

【0024】

The frame transferred onto the bus 130 is transferred by the bus 130 to the packet processing unit 100, the data link control unit 110, and the ATM cell processing unit 120, and the header detection unit 106 that determines the header of the frame. , 111, 121 detect only the frame with the header of its own address, and discard the others. Therefore, the frame with the above address "1" added to the header is the header detection unit of the data link processing unit 110. Is detected by, and is taken into the data link processing unit 110.

【0025】

When the data link processing unit 110 detects the frame with the header address 1 by the header detection unit 111, the frame is decomposed, the protocol control signal is taken out, and the frame is transferred to the processor 112. This protocol control signal terminates the data link in the processor 112, generates a protocol control signal for transmission to the packet network, and has an address 3 as a header in the header addition unit 113 for forwarding to the packet processing unit 100. The packet length is 1 byte and the FCS is 2 bytes attached to the protocol control signal. The frame configuration is as shown in Fig. 3, and the data is transferred onto the bus 130. Further, each routing information to the ATM network and the packet network obtained from the protocol control signal is transmitted to the ATM cell conversion unit 102 and the packetization unit 105 by the signal line 114.

【0026】

When a frame with a header 3 is input to the header detection unit 106, the packet processing unit 100 determines from the frame header whether it is a protocol control signal or an ATM cell by the frame decomposition unit 306, and determines whether the frame is a protocol control signal or an ATM cell. If it is a control signal, the determination unit 307 is flagged. The selector 308 confirms the flag of the determination unit 307 and transfers the protocol control signal to the packet transmission unit 104. The multiplexer 309 in the packet transmission unit 104 transmits the protocol control signal to the packet network by the packet network transmission line 2.

【0027】

Next, the case where the packet is user data will be described. When the selector 301 determines from the header of the packet that it is user data, the determination unit 302 does not set a flag, and this packet is transferred from the selector 301 to the ATM cellization unit 102. The transferred user data is converted into an ATM cell based on the routing information obtained from the signal line 114, controlled by the multiplexer 304, and transferred to the frame generator 305.

【0028】

In the frame generation unit 305, the flag of the determination unit 302 is confirmed, and the address 2, the packet length of 1 byte, and the FCS of 2 bytes are attached to the ATM cell as a header for forwarding to the ATM cell processing unit 120. Transfer to bus 130 with a frame configuration like 3.

【0029】

When the ATM cell processing unit 120 detects a frame with a header "2" by the header detection unit 121, this frame is taken into the ATM cell processing unit 120, the header is removed, and the frame is disassembled. It becomes an ATM cell. Then, the ATM cell is transferred to the ATM cell transmission unit 122, and is transmitted to the ATM network from the ATM network transmission line 3.

【0030】

On the other hand, when an ATM cell is input from the ATM network receiving line 4 and the ATM cell is received by the ATM cell receiving unit 124, this ATM cell is transferred to the header addition unit 123. In order to transfer this ATM cell to the packet processing unit 100, the header addition unit 123 has a frame configuration in which the address 4, the packet length is 1 byte, and the FCS is 2 bytes as a header, and is sent to the bus 130. Forward.

【0031】

In the packet processing unit 100, when a frame with a header 4 is input to the header detection unit 106, the frame decomposition unit 306 determines from the header of the frame whether it is a protocol control signal or an ATM cell, and performs protocol control. If it is a signal, the judgment unit 307 is flagged, but since it is an ATM cell, it is not flagged.

【0032】

The selector 308 confirms the flag of the determination unit 307 and transfers the ATM cell to the packetization unit 105. The packetizing unit 105 packets the ATM cell based on the routing information obtained from the signal line 114 and transfers it to the multiplexer 309. The multiplexer 309 controls the packet and transmits it to the packet network by the packet network transmission line 2.

【0033】

[Effect of the invention]

The present invention determines whether the signal input as a packet from the packet network is user data or a protocol control signal, converts the user data into an ATM cell and transmits it to the ATM network, and if it is a protocol control signal, a processor. Since each processing unit performs the process of processing in and transmitting to the packet network, and further packetizing the ATM cell input from the ATM network and transmitting it to the packet network, the load on the processor is reduced and the speed is higher. It can also be applied to transmission devices.

【0034】

[Simple explanation of drawings]

[Figure 1]

It is a block diagram which shows the structure of the ATM transmission apparatus of this invention.

[Figure 2]

It is explanatory drawing which shows the detail of the packet processing part of the ATM transmission apparatus of this invention.

[Fig. 3]

It is explanatory drawing which shows the frame format transferred on the bus in the ATM transmission apparatus of this invention.

[Fig. 4]

It is a block diagram which shows the structure of the conventional ATM transmission apparatus.

[Explanation of symbols]

1,201 packet network receive line 2,202 Packet network transmission line 3,209 ATM network transmission line 4,210 ATM network receiving line 100 Packet processing unit 101 Packet receiver 102 ATM Cellization Department 103 Header addition part 104 Packet transmitter 105 Packetization section 106 Header detector 301, 308 selector 302, 307 Judgment unit 303 signal line 304, 309 multiplexer 305 Frame generator 306 Frame disassembly part 110 Data link processing unit 111 Header detector 112, 205 processors 113 Header addition part 114 signal line 120 ATM cell processing unit 121 Header detector 122, 207 ATM cell transmitter 123 Header Addition