Manufacturing method of semiconductor device

Description: TECHNICAL FIELD [Detailed description of the invention]

【0001】

[Technical field to which the invention belongs]

The present invention relates to a method for manufacturing a semiconductor device having a gate electrode having a substantially T-shaped cross section, and its applications include, for example, MESFET (MEtal Semiconductor Field Effect Transistor) and HEMT (High Electron Mobility Transistor). There is a method for manufacturing a semiconductor device having a shot key gate used for MMIC (Monolithic Microwave Integrated Circuit) or the like, which is an integrated circuit using the above.

【0002】

[Problems to be Solved by the Invention]

For semiconductor devices used for microwave band signal amplification, it is common to use T-type gate electrodes that can achieve both a shortened gate length and a low gate resistance value, which are advantageous for high-frequency operation. It has become. After the T-shaped gate electrode is formed, a protective insulating film is formed on the surface of the T-shaped gate electrode. However, if the height from the surface of the semiconductor substrate to the head of the T-shaped gate electrode is insufficient, A protective insulating film is filled between the two, and in such a state, the parasitic capacitance increases as compared with the case where a gap exists between the two.

【0003】

In order to prevent this increase in parasitic capacitance, if the legs are lengthened to ensure a sufficient height to the head of the gate electrode, the part of the gate electrode that is involved in determining the gate length, that is, the legs come into contact with the semiconductor substrate. The microfabrication of the width dimension of the portion to be processed is reduced. Further, since the leg portion of the gate electrode is formed in a shape in which the joint portion with the semiconductor substrate is shorter than the joint portion with the head portion, there is a problem that disconnection is likely to occur between the head portion and the leg portion. There is.

【0004】

As a conventional technique for solving such a problem, for example, Japanese Patent Application Laid-Open No. 5-109778 describes a tapered opening in the resist layer in which the surface portion is wider than the bottom portion by one electron beam exposure. A technique has been disclosed in which the cross-sectional shape of a leg formed by metal deposition in this opening is rectangular, that is, both sides of the leg are substantially perpendicular to the semiconductor substrate. However, in such a technique, there is a problem in the reproducibility of the bottom dimension, that is, the gate length at the opening of the resist layer.

【0005】

Further, in Japanese Patent Application Laid-Open No. 6-302617, an intermediate portion having a width dimension narrower than the width of the head and wider than the width of the leg is formed at the joint portion between the head and the leg of the T-shaped gate electrode. The technology to be used is disclosed. By forming such an intermediate portion, the strength of the joint portion can be ensured even when the height of the T-shaped gate electrode is sufficiently secured. However, in this case, since the developing process for determining the width dimension between the intermediate portion and the leg portion is performed collectively, the resist film thickness is increased so as not to increase the parasitic capacitance, and the leg portion of the gate electrode is formed. If the length is increased, it is inevitable that the fine workability of the portion related to the determination of the gate length will be lowered.

【0006】

The present invention solves the above problems, and an object of the present invention is a semiconductor capable of ensuring a sufficient height of a gate electrode having a T-shaped cross section and also ensuring microfabrication of the gate electrode. The purpose is to provide a method for manufacturing the device.

【0007】

[Means for solving problems]

According to the method for manufacturing a semiconductor device according to claim 1, in the first step, a first lower layer resist film, a second lower layer resist film, an intermediate layer resist film, and an upper layer resist having predetermined sensitivities are placed on the semiconductor substrate. The upper layer opening and the upper layer opening having an overhang shape are formed by sequentially applying the films, and then sequentially exposed and developed under predetermined conditions in the second, third and fourth steps, respectively. A second lower layer opening having an opening size smaller than that of the portion and a first lower layer opening having an opening size smaller than that of the second lower layer opening and reaching the surface of the semiconductor substrate are formed, respectively. Then, after the metal material for the electrode is vapor-deposited in the fifth step, each layer resist film is dissolved and removed in the sixth step to form a joint portion between the head and the leg in a substantially T-shaped cross section. A gate electrode having a shape having an intermediate portion is formed, and a protective insulating film is formed on the gate electrode and the semiconductor substrate in the seventh step.

【0008】

Therefore, after the resist films of each layer are collectively formed in the first step, each opening can be formed by repeating the simple steps of exposure and development. Then, by separately performing the steps of determining the opening dimensions of the second and first lower layer openings, which are the cross-sectional width dimensions of the intermediate portion and the leg portion of the gate electrode, the gate electrode of the semiconductor device can be finely processed. At the same time, since the height of the gate electrode can be sufficiently secured, it is possible to reduce the parasitic capacitance generated between the head of the gate electrode and the semiconductor substrate when the protective insulating film is formed.

【0009】

According to the method for manufacturing a semiconductor device according to claim 2, in the first step, a lower layer resist film, an intermediate layer resist film, and an upper layer resist film having predetermined sensitivities are sequentially applied onto the semiconductor substrate. Then, by sequentially exposing and developing under predetermined conditions in the second, third, and fourth steps, the upper layer opening having an overhang shape and the opening size smaller than the upper layer opening can be obtained. Each of the recesses has a recess and an opening having an opening size smaller than that of the recess and reaches the surface of the semiconductor substrate. Then, after the metal material for the electrode is vapor-deposited in the fifth step, each layer resist film is dissolved and removed in the sixth step to form a joint portion between the head and the leg in a substantially T-shaped cross section. A gate electrode having a shape having an intermediate portion is formed, and a protective insulating film is formed on the gate electrode and the semiconductor substrate in the seventh step. Therefore, the number of resist films can be reduced by one layer, and the first step can be simplified.

【0010】

BEST MODE FOR CARRYING OUT THE INVENTION

(First Example) Hereinafter, the first embodiment of the present invention will be described with reference to FIGS. 1 to 7. 1 to 7 are schematic cross-sectional views showing a process of manufacturing a semiconductor device provided with a T-shaped gate electrode. In FIG. 1, a high-resolution electron beam (EB) resist film is sequentially applied and formed in layers on a semiconductor substrate (hereinafter, simply referred to as a substrate) 1 on which an operating layer is formed as follows. There is.

【0011】

First, a relatively low-sensitivity first lower layer resist film 2a is formed at a thickness of, for example, 250 nm, and a second lower layer resist film having higher sensitivity than the first lower layer resist film 2a is formed on the first lower layer resist film 2a. 2b is formed, for example, at a thickness of 150 nm. Next, an intermediate layer resist film 3 having a higher sensitivity than the second lower layer resist film 2b is formed at a thickness of, for example, 300 nm, and an upper layer resist film 4 having a lower sensitivity than the intermediate layer resist film 3 is formed, for example, with a thickness of 250 nm. (First step).

【0012】

In this case, for example, the first lower layer resist film 2a and the upper layer resist film 4 are polymethyl methacrylates that act as positive EB resists, and the second lower layer resist film 2b and the intermediate layer resist film 3 are polyalkyl methacrylate systems. Use a resist that is more sensitive than polymethylmethacrylate.

【0013】

Next, as shown in FIG. 2, exposure is performed by the first electron beam irradiation, and an opening (upper layer opening) 5 is formed in the upper layer resist film 4 and the intermediate layer resist film 3 by the subsequent development. For example, the acceleration voltage of the electron beam at this time is 25 KV, and the exposure amount is 20 μC / cm.²Develop with a mixed solution of methyl isobutyl ketone and isopropanol (second step). At this time, since the second lower layer resist film 2b uses an EB resist having a sufficiently lower sensitivity than the intermediate layer resist film 3, the opening 5 can be formed with good reproducibility.

【0014】

When such a second step is performed, the shape of the opening 5 has an opening size (for example, 0.5 to 0.8 μm) of the upper resist film 4 due to the sensitivity difference between the upper resist film 4 and the intermediate resist film 3. ) Is slightly smaller than the opening size of the intermediate layer resist film 3 portion, so that the upper layer resist film 4 is formed so as to have an overhanging shape with respect to the intermediate layer resist film 3.

【0015】

Subsequently, as shown in FIG. 3, by developing after exposure by the second electron beam irradiation, an opening (second lower layer opening) 6 is formed in the second lower layer resist film 2b, for example, the opening size is 0.3. It is formed to be ~ 0.4 μm. The exposure amount at this time is, for example, 10 μC / cm.²Develop with a mixed solution of methyl isobutyl ketone and isopropanol (third step).

【0016】

Further, as shown in FIG. 4, the opening (first lower layer opening) 7 that reaches the surface of the substrate 1 by developing after being exposed by the third electron beam irradiation is formed on the first lower layer resist film 2a. Form (fourth step). The exposure amount at this time is, for example, 200 μC / cm.²Alternatively, by developing with a mixed solution of methyl isobutyl ketone and isopropanol at about 2 nC / cm, an opening size capable of achieving a gate length of 0.15 μm or less can be obtained. In this case, it is considered that a finer gate length can be realized by increasing the acceleration voltage of the electron beam.

【0017】

After forming the opening 7 in the first lower layer resist film 2a as described above, if necessary for the structure of the semiconductor device, the substrate 1 is etched using the first lower layer resist film 2a as a mask.

【0018】

After that, as shown in FIG. 5, the metal material 8 for the electrode is deposited on the surface of the substrate 1 facing the opening 7 and on the resist films 2a, 2b, 3, and 4 of each layer (fifth step). Subsequently, by immersing the semiconductor device in the solution, as shown in FIG. 6, the unnecessary portion of the metal material 8 is removed (lifted off) together with the remaining resist films 2a, 2b, 3 and 4. As a result, a substantially T-shaped gate electrode 9 having an intermediate portion 9c having a cross-sectional width dimension smaller than that of the head portion 9a and larger than that of the leg portion 9b is formed between the head portion 9a and the leg portion 9b. (6th step).

【0019】

At this time, as described above, in the opening 5 portion, the upper layer resist film 4 has a shape overhanging with respect to the intermediate layer resist film 3, so that the gate electrode 9 and the metal material 8 are unnecessary portions. Can be reliably separated.

【0020】

After the gate electrode 9 is formed, the protective insulating film 10 is formed on the gate electrode 9 and the substrate 1 as shown in FIG. 7 (7th step). In FIG. 7, the film thicknesses of the first and second lower layer resist films 2a and 2b are designed in advance when the resist film is applied in FIG. 1 so that the gap 11 is generated between the head portion 9a and the substrate 1. Set with reference to the film thickness value. By providing such a gap portion 11 between the head portion 9a and the substrate 1, the parasitic capacitance of the gate electrode 9 is increased as compared with the case where the gap between the two is filled with the protective insulating film 10 having a large dielectric constant. It will be reduced.

【0021】

As described above, according to the present embodiment, after the resist films 2a, 2b, 3 and 4 having a predetermined sensitivity difference are coated and formed in layers on the substrate 1, different exposure amounts are applied to these resist films. By irradiating the electron beam three times to develop each of them to form openings 5, 6 and 7 having different opening dimensions, depositing the metal material 8 and then lifting off, the head portion 9a and the leg portion 9b are separated from each other. A T-shaped gate electrode 9 having an intermediate portion 9c was formed between them, and a protective insulating film 10 was formed on the T-shaped gate electrode 9.

【0022】

Therefore, after determining the opening size of the opening 6 in the second electron beam irradiation, that is, the size of the intermediate portion 9c of the gate electrode 9, the opening size of the opening 7, that is, the gate electrode in the third electron beam irradiation. Since the width dimension (gate length dimension) of the leg portion 9b of 9 can be determined, the leg portion 9b can be finely processed, and by forming the intermediate portion 9c, the metal material 8 and the head portion 9a at the time of vapor deposition can be formed. It is possible to prevent disconnection from the leg 9b.

【0023】

Further, the head portion 9a of the gate electrode 9 can be designed to be high, and even if the protective insulating film 10 is formed, the increase in parasitic capacitance can be suppressed, and even in that case, the third electron beam irradiation is performed. Since the film thickness of the first lower layer resist film 2a can be made smaller than the height of the head portion 9a, it becomes possible to sufficiently secure its fine processability, and the gate length, which is important for high frequency characteristics, can be made fine. It becomes possible to design.

【0024】

Further, according to the present embodiment, in the first electron beam irradiation, the gate electrode 9 and the gate electrode 9 are formed by forming an overhang shape in the opening 5 due to the sensitivity difference between the upper layer resist film 4 and the intermediate layer resist film 3. Since the unnecessary portion of the metal material 8 can be reliably separated from the unnecessary portion, the unnecessary portion can be easily removed after the metal material 8 is vapor-deposited.

【0025】

(Second Example) FIGS. 8 to 14 are schematic cross-sectional views showing a process of manufacturing a semiconductor device according to the second embodiment of the present invention. The same parts as those in the first embodiment are designated by the same reference numerals. In FIG. 8, a high-resolution EB resist film is sequentially coated and formed on the substrate 1 in the same manner as in the first embodiment, but the first and second lower layer resist films 2a and 2b in the first embodiment are formed. It is replaced with the lower resist film 12 (first step). The lower resist film 12 is formed at a thickness of 400 nm using, for example, the same polymethyl methacrylate as the upper resist film 3.

【0026】

Next, as shown in FIG. 9, the opening 5 is formed (second step) in the same manner as in the second step in the first embodiment. At this time, since the lower layer resist film 12 has sufficiently lower sensitivity than the intermediate layer resist film 3, the opening 5 can be formed with good reproducibility.

【0027】

Subsequently, as shown in FIG. 10, the recess 13 having a depth up to the middle of the lower layer resist film 12 is formed by developing after exposure by the second electron beam irradiation (third step). ). For example, the exposure amount at this time is 100 μC / cm.²Develop with a mixed solution of methyl isobutyl ketone and isopropanol.

【0028】

Further, by developing after exposure by the third electron beam irradiation, as shown in FIG. 11, an opening having an opening size smaller than that of the recess 13 and reaching the substrate 1 (lower layer opening). ) 14 is formed on the lower resist film 12 (fourth step). For example, the exposure amount at this time is 200 μC / cm.²Alternatively, an opening 14 capable of achieving a gate length of 0.15 μm or less can be obtained by developing at about 2 nC / cm with a mixed solution of methyl isobutyl ketone and isopropanol.

【0029】

The subsequent steps are carried out in the same manner as in the first embodiment, and after the metal material 15 for the electrode is vapor-deposited as shown in FIGS. 12 to 14 (fifth step), the unnecessary portion of the metal material 15 is removed. , The remaining layer resists 3, 4 and 12 are removed (lifted off) to form a gate electrode 16 having a substantially T-shaped cross section (sixth step).

【0030】

Then, after the gate electrode 16 is formed, the protective insulating film 17 is formed on the gate electrode 16 and the substrate 1 (seventh step). Also in this case, by setting the film thickness of the lower resist film 12 in advance with reference to the design value of the insulating film when applying the resist film in FIG. 8, the gap between the head 16a and the substrate 1 is formed. 18 can be made to occur.

【0031】

As described above, according to the second embodiment, the cross-sectional shape is substantially T-shaped due to the smaller number of layers of the resist film than in the first embodiment, and the intermediate portion 16c is formed between the head portion 16a and the leg portion 16b. The gate electrode 16 having the gate electrode 16 can be formed, and the first step can be simplified.

【0032】

The present invention is not limited to the examples described above and shown in the drawings, and the following modifications or extensions are possible. The intermediate layer resist film 3 and the upper layer resist film 4 are replaced with a single upper layer resist film having a higher sensitivity than the second lower layer resist film 2b, and the upper layer resist film is exposed to the first electron beam. By developing after irradiation, an opening having a shape in which the opening size of the surface of the upper resist film is smaller than the opening size inside the upper resist film is used as the upper opening, instead of the opening 5. It may be formed. By appropriately changing the material of the resist, exposure may be performed with light such as ultraviolet rays, an ion beam, X-rays, or the like. The thickness of each resist film formed in each embodiment and the size of the opening due to exposure may be appropriately changed according to the design specifications of the gate electrode and the gate length. Further, the material of each resist film may be appropriately changed as long as the magnitude relationship of the sensitivity difference between the layers is maintained.

[Simple explanation of drawings]

[Figure 1]

A schematic cross-sectional view showing a manufacturing process of a semiconductor device in the first embodiment of the present invention (No. 1). [Figure 2]

Figure 1 equivalent figure (Part 2) [Fig. 3]

Figure 1 equivalent figure (3) [Fig. 4]

Figure 1 equivalent figure (4) [Fig. 5]

Figure 1 equivalent figure (No. 5) [Fig. 6]

Figure 1 equivalent figure (No. 6) [Fig. 7]

Figure 1 equivalent figure (7) [Fig. 8]

FIG. 1 equivalent diagram (No. 1) in the second embodiment of the present invention. [Fig. 9]

Figure 8 equivalent figure (Part 2) [Fig. 10]

Figure 8 equivalent figure (3) [Fig. 11]

Figure 8 equivalent figure (4) [Fig. 12]

Figure 8 equivalent figure (No. 5) [Fig. 13]

Figure 8 equivalent figure (No. 6) [Fig. 14]

Figure 8 equivalent figure (7) [Explanation of symbols]

1 is a semiconductor substrate, 2a is a first lower layer resist film, 2b is a second lower layer resist film, 3 is an intermediate layer resist film, 4 is an upper layer resist film, and 5, 6 and 7 are openings (upper layer opening, second lower layer). (Opening and first lower layer opening), 8 is metal material (metal material for electrodes), 9 is gate electrode, 9a is head, 9b is leg, 9c is intermediate, 10 is protective insulating film, 11 is Void part, 12 is lower resist film, 13 is recess, 14 is opening (lower layer opening), 15 is metal material (metal material for electrode), 16 is gate electrode, 16a is head, 16b is leg, 16c Indicates an intermediate portion, 17 indicates a protective insulating film, and 18 indicates a void portion.