Memory snap shot method and information processing unit having memory snap shot function
Abstract
[Purpose] It enables you to quickly find the required memory page from the huge amount of stored memory contents. [Constitution] At the time of the gth snapshot, the main memory storage device 16 searches only the contents of the dirty pages whose contents have changed since the g-1st snapshot among the pages of the main memory 12, and the main memory storage area 13 After saving to, setting the save location of the page content to the area in the final storage location list 14 unique to that page, and saving all the dirty page contents in main memory 12, at that point in time. The final storage position list 14 is stored in the g-th area of the final storage position list storage area 15, and when the g-th snapshot is restored, the main storage position list is according to the final storage position list stored in the g-th area of the storage area 15. The main memory restoration device 17 restores the page contents stored in the storage storage area 13 to the original page position of the main memory 12.

Term
Term ended
Projected expiry passed 29 December 2013, 12.7 years ago.
- Priority and filed
- Published
- Projected expiry
- Today
10 claims: 10 independent, 0 dependent
- 1【特許請求の範囲】 【請求項1】主記憶を備えた情報処理装置に適用されるメモリ・スナップショット方法であって、 スナップショット採取時には、 ページ単位で管理される主記憶の各ページのうち前回のスナップショット採取時以降で内容の変化のあったページの内容を保存すると共に、そのページ内容の保存位置をそのページに固有の最終格納位置リスト内領域に設定し、 前記主記憶内の前記変化のあったすべてのページの内容が保存された後に、前記最終格納位置リストを保存し、 スナップショット復元時には、 前記保存されている最終格納位置リストに従って、前記保存されているページ内容を前記主記憶の元のページ位置に復元することを特徴とするメモリ・スナップショット方法。
- 2【請求項2】主記憶と、この主記憶の一部の写しを保持するためのライト・スルー型のキャッシュとを備えた情報処理装置に適用されるメモリ・スナップショット方法であって、 スナップショット採取時には、 前記キャッシュ上のキャッシュブロックのうち有効なキャッシュブロック中のアドレス情報を保存すると共に、前記主記憶の内容を保存し、 スナップショット復元時には、 前記保存されている主記憶の内容を復元した後、 前記保存されているキャッシュブロックのアドレス情報を使って、前記キャッシュの内容を前記復元された主記憶から復元することを特徴とするメモリ・スナップショット方法。
- 3【請求項3】主記憶と、この主記憶の一部の写しを保持するためのコピー・バック型のキャッシュとを備えた情報処理装置に適用されるメモリ・スナップショット方法であって、 スナップショット採取時には、 前記キャッシュ上のキャッシュブロックのうちダーティ状態を示す状態フラグを持つキャッシュブロックの内容を状態を変化させずに前記主記憶に書き戻すと共に、 前記キャッシュ上のキャッシュブロックのうちダーティまたはクリーン状態を示す状態フラグを持つ有効なキャッシュブロック中のアドレス情報及び当該状態フラグを保存し、 前記キャッシュから前記主記憶への書き戻し後に当該主記憶の内容を保存し、 スナップショット復元時には、 前記保存されている主記憶の内容を復元し、 前記保存されているキャッシュブロックのアドレス情報を使って、前記キャッシュの内容を前記復元された主記憶から復元し、前記保存されているキャッシュブロックの状態フラグを使って、前記キャッシュの状態を復元することを特徴とするメモリ・スナップショット方法。
- 4【請求項4】主記憶と、この主記憶の一部の写しを保持するための、スヌープ型のキャッシュ・コヒーレンシ・プロトコルを有するキャッシュをそれぞれ内蔵する複数のプロセッシング・ユニットとを備えた情報処理装置に適用されるメモリ・スナップショット方法であって、 前記キャッシュ上の各キャッシュブロックに、そのブロックが前記主記憶に書き戻されたか否かを示す書き戻し済みフラグを設け、 スナップショット採取時には、 前記各プロセッシング・ユニットにおいて、自キャッシュ上のすべてのキャッシュブロックの前記書き戻しフラグを解除した後、自キャッシュ上のキャッシュブロックのうち前記書き戻し済みフラグが設定されておらず、且つダーティ状態を示す状態フラグを持つ有効なキャッシュブロックの内容を状態を変化させずに前記主記憶に書き戻すと共に、自キャッシュ上に、他キャッシュから前記主記憶に書き戻されたキャッシュブロックに相当するキャッシュブロックが保持されている場合、当該キャッシュブロックに書き戻し済みフラグを設定し、 前記各プロセッシング・ユニットにおいて、自キャッシュ上のキャッシュブロックのうちダーティまたはクリーン状態を示す状態フラグを持つ有効なキャッシュブロック中のアドレス情報及び当該状態フラグを保存し、 前記各プロセッシング・ユニットの前記各キャッシュから前記主記憶への書き戻し後に当該主記憶の内容を保存し、 スナップショット復元時には、 前記保存されている主記憶の内容を復元し、 前記各プロセッシング・ユニットにおいて、 前記保存されているキャッシュブロックのアドレス情報を使って、自キャッシュの内容を前記復元された主記憶から復元し、前記保存されているキャッシュブロックの状態フラグ使って、自キャッシュの状態を復元することを特徴とするメモリ・スナップショット方法。
- 5【請求項5】主記憶と、この主記憶の一部の写しを保持するための、ディレクトリ型のキャッシュ・コヒーレンシ・プロトコルを有するキャッシュをそれぞれ内蔵する複数のプロセッシング・ユニットと、前記各キャッシュ上のキャッシュブロックについて、アドレス、状態フラグ及び当該キャッシュブロックを持つキャッシュのリストを含むディレクトリ情報を保持するディレクトリとを備えた情報処理装置に適用されるメモリ・スナップショット方法であって、 スナップショット採取時には、 前記ディレクトリを参照して、ダーティ状態を示す状態フラグを持つキャッシュブロックの書き戻しを行うキャッシュを選択し、そのキャッシュから当該キャッシュブロックの内容を状態を変化させずに前記主記憶に書き戻すと共に、 前記ディレクトリで管理されているダーティまたはクリーン状態を示す状態フラグを持つ有効なディレクトリ情報を保存し、 前記キャッシュから前記主記憶への書き戻し後に当該主記憶の内容を保存し、 スナップショット復元時には、 前記保存されている主記憶の内容を復元すると共に、前記保存されているディレクトリ情報から前記ディレクトリを復元し、 この復元した前記ディレクトリの有効なディレクトリ情報中のアドレス情報を使って、当該ディレクトリ情報中のキャッシュリストの示す各キャッシュの内容を前記復元された主記憶から復元することを特徴とするメモリ・スナップショット方法。
- 6【請求項6】主記憶を備えた情報処理装置において、 ページ単位で管理される主記憶の各ページ毎の内容の最終保存位置を保持する最終格納位置リストと、 前記主記憶の各ページのうち前回のスナップショット採取時以降で内容の変化のあったページの内容を保存すると共に、前記最終格納位置リストを保存する主記憶保存手段と、 前記主記憶保存手段によって保存された前記最終格納位置リストに従って、当該主記憶保存手段によって保存された前記ページ内容を前記主記憶の元のページ位置に復元する主記憶復元手段とを具備することを特徴とする情報処理装置。
- 7【請求項7】主記憶と、この主記憶の一部の写しを保持するためのライト・スルー型のキャッシュとを備えた情報処理装置において、 前記キャッシュ上のキャッシュブロックのうち有効なキャッシュブロック中のアドレス情報を保存するキャッシュアドレス保存手段と、 前記主記憶の内容を保存する主記憶保存手段と、 前記主記憶保存手段によって保存された前記主記憶の内容を復元する主記憶復元手段と、 前記キャッシュアドレス保存手段によって保存された前記キャッシュブロックのアドレス情報を使い、前記キャッシュの内容を、前記主記憶復元手段によって復元された前記主記憶から復元するキャッシュ復元手段とを具備することを特徴とする情報処理装置。
- 8【請求項8】主記憶と、この主記憶の一部の写しを保持するためのコピー・バック型のキャッシュとを備えた情報処理装置において、 前記キャッシュ上のキャッシュブロックのうちダーティ状態を示す状態フラグを持つキャッシュブロックの内容を状態を変化させずに前記主記憶に書き戻すキャッシュ内容書き戻し手段と、 前記キャッシュ上のキャッシュブロックのうちダーティまたはクリーン状態を示す状態フラグを持つ有効なキャッシュブロック中のアドレス情報及び当該状態フラグを保存するキャッシュ情報保存手段と、 前記主記憶の内容を保存する主記憶保存手段と、 前記主記憶保存手段によって保存された前記主記憶の内容を復元する主記憶復元手段と、 前記キャッシュ情報保存手段によって保存された前記キャッシュブロックのアドレス情報を使って、前記キャッシュの内容を、前記主記憶復元手段によって復元された前記主記憶から復元し、前記保存された前記キャッシュブロックの状態フラグを使って、前記キャッシュの状態を復元するキャッシュ復元手段とを具備することを特徴とする情報処理装置。
- 9【請求項9】主記憶と、この主記憶の一部の写しを保持するための、スヌープ型のキャッシュ・コヒーレンシ・プロトコルを有するキャッシュをそれぞれ内蔵する複数のプロセッシング・ユニットとを備えた情報処理装置において、 前記キャッシュ上の各キャッシュブロックに付される、当該キャッシュブロックが前記主記憶に書き戻されたか否かを示す書き戻し済みフラグと、 前記各プロセッシング・ユニットに設けられ、自キャッシュ上のすべてのキャッシュブロックの前記書き戻しフラグを解除した後、自キャッシュ上のキャッシュブロックのうち前記書き戻し済みフラグが設定されておらず、且つダーティ状態を示す状態フラグを持つ有効なキャッシュブロックの内容を状態を変化させずに前記主記憶に書き戻すと共に、自キャッシュ上に、他キャッシュから前記主記憶に書き戻されたキャッシュブロックに相当するキャッシュブロックが保持されている場合、当該キャッシュブロックに書き戻し済みフラグを設定するキャッシュ内容書き戻し手段と、 前記各プロセッシング・ユニットに設けられ、自キャッシュ上のキャッシュブロックのうちダーティまたはクリーン状態を示す状態フラグを持つ有効なキャッシュブロック中のアドレス情報及び当該状態フラグを保存する、キャッシュ情報保存手段と、 前記主記憶の内容を保存する主記憶保存手段と、 前記主記憶保存手段によって保存された前記主記憶の内容を復元する主記憶復元手段と、 前記各プロセッシング・ユニットに設けられ、前記キャッシュ情報保存手段によって保存された前記キャッシュブロックのアドレス情報を使って、自キャッシュの内容を、前記主記憶復元手段によって復元された前記主記憶から復元し、前記保存された前記キャッシュブロックの状態フラグを使って、自キャッシュの状態を復元するキャッシュ復元手段とを具備することを特徴とする情報処理装置。
- 10【請求項10】主記憶と、この主記憶の一部の写しを保持するための、ディレクトリ型のキャッシュ・コヒーレンシ・プロトコルを有するキャッシュをそれぞれ内蔵する複数のプロセッシング・ユニットと、前記各キャッシュ上のキャッシュブロックについて、アドレス、状態フラグ及び当該キャッシュブロックを持つキャッシュのリストを含むディレクトリ情報を保持するディレクトリとを備えた情報処理装置において、 前記ディレクトリを参照して、ダーティ状態を示す状態フラグを持つキャッシュブロックの書き戻しを行うキャッシュを選択する書き戻しキャッシュ選択手段と、 前記各プロセッシング・ユニットに設けられ、前記書き戻しキャッシュ選択手段により選択されたキャッシュ上のキャッシュブロックの内容を状態を変化させずに前記主記憶に書き戻すキャッシュ内容書き戻し手段と、 前記ディレクトリ上でダーティまたはクリーン状態を示す状態フラグを持つ有効なディレクトリ情報を保存するディレクトリ保存手段と、 前記主記憶の内容を保存する主記憶保存手段と、 前記主記憶保存手段によって保存された前記主記憶の内容を復元する主記憶復元手段と、 前記ディレクトリ情報手段によって保存されたディレクトリ情報からディレクトリを復元するディレクトリ復元手段と、 このディレクトリ復元手段によって復元された前記ディレクトリの有効なディレクトリ情報中のアドレス情報を使って、当該ディレクトリ情報中のキャッシュリストの示す各キャッシュの内容を前記復元された主記憶から復元するキャッシュ復元手段とを具備することを特徴とする情報処理装置。
Independent claims10
408 paragraphs, as filed
Description: TECHNICAL FIELD [Detailed description of the invention]
【0001】
[Industrial application field]
The present invention relates to a cache memory snapshot method suitable for taking and restoring a snapshot of a storage device, particularly a storage device having a cache, and an information processing device having a memory snapshot function.
【0002】
[Conventional technology]
Generally, in order to reproduce the execution of a program, a snapshot of the contents of memory etc. is taken so that the state of the system can be restored.
【0003】
Conventionally, this snapshot collection operation, that is, the operation of saving memory contents and the like, has been performed on the idea that it is only necessary to satisfy the condition that execution from a certain point in time is normally performed.
【0004】
For this reason, with the conventional snapshot method, it was possible to resume program execution from a certain point in time, but the behavior of the program after that may be different from the previous execution.
【0005】
However, when trying to debug a non-deterministic program, regular snapshots not only require saving a huge amount of memory contents, but also need to speed up the reproduction of the program.
【0006】
Further, in the conventional snapshot method, in an information processing apparatus equipped with a cache, the contents of the cache are flushed to write back the memory contents to the main memory, and only the snapshot of the main memory is taken. In this case, there is a problem that the behavior of the cache changes depending on whether the snapshot is taken or not.
【0007】
In addition, in non-deterministic program execution, there is a problem that a change in cache behavior causes a change in system behavior. In other words, even if the cache state changes by taking a snapshot, it is possible to restart the program execution, but it cannot be used to reproduce the program. When applied to debugging etc., the instruction code that is executed when taking a snapshot is different from the instruction code that is normally executed without taking a snapshot, and a bug appears only in a specific case. Has the potential to become.
【0008】
[Problems to be Solved by the Invention]
As described above, conventionally, there has been a problem that it is necessary to save a huge amount of memory contents by periodic snapshots, and therefore it takes time to restore the snapshots.
【0009】
In addition, in an information processing device equipped with a cache, conventionally, by flushing the contents of the cache, the memory contents are written back to the main memory and only a snapshot of the main memory is taken. There was a problem that the behavior of the cache changed when it was not there, and the behavior of the program also changed.
【0010】
The present invention has been made in consideration of the above circumstances, and an object of the present invention is information having a memory snapshot method and a memory snapshot function capable of quickly finding a necessary memory page from a huge amount of stored memory contents. The purpose is to provide a processing device.
【0011】
Another object of the present invention is information having a memory snapshot method and a memory snapshot function that can prevent a change in the behavior of a program even if a snapshot of a storage device having a cache is taken. The purpose is to provide a processing device.
【0012】
Still another object of the present invention is to provide an information processing apparatus having a memory snapshot method and a memory snapshot function that can be applied not only to restarting a program but also to reproducing and executing a program.
【0013】
[Means and Actions for Solving Problems]
The information processing apparatus having the memory snapshot method and the memory snapshot function according to the first aspect of the present invention provides a final storage position list for holding the final storage position of the contents of each memory page of the main memory. When taking a snapshot, the contents of each page in main memory whose contents have changed since the last snapshot was taken are saved, and the save position of the page contents is set as the final storage position list unique to that page. The final storage position list is saved after the contents of all changed pages in the main memory are saved after being set in the inner area, and when the snapshot is restored, the final storage position list is saved according to the saved final storage position list. It is characterized in that the saved page contents are restored to the original page position in the main memory.
【0014】
In such a configuration, at the time of taking a snapshot, only the memory page changed from the previous snapshot is saved, and the save position information of the memory page in the final storage position list is updated. Then, after the contents of all the changed pages are saved, this final storage position list is also saved.
【0015】
When reproducing the memory contents, the storage position information of each memory page is obtained from this saved final storage position list, and the above saved page contents are taken out based on the position information and the main memory is stored. Restored to the corresponding page in.
【0016】
The information processing device having the memory snapshot method and the memory snapshot function according to the second aspect of the present invention is among the cache blocks on the cache when taking a snapshot of the storage device including the write-through type cache. The address information in the valid cache block is saved, the contents of the main memory are saved, and at the time of snapshot restoration, after the contents of the saved main memory are restored, the address information of the above-mentioned saved cache block is saved. It is characterized in that the contents of the cache are restored from the restored main memory by using.
【0017】
In such a configuration, the main memory contents are saved at the time of taking a snapshot, and the address information of a valid cache block on the cache is also saved at that time.
【0018】
When reproducing the contents of the memory, first, the contents of the stored main memory are restored. Then, an entry for the cache block is generated from the address information of the stored cache block, and the contents of the cache block are restored from the restored main memory.
【0019】
The information processing device having the memory snapshot method and the memory snapshot function according to the third aspect of the present invention is among the cache blocks on the cache when taking a snapshot of the storage device including the copy-back type cache. The contents of a cache block with a state flag indicating a dirty state are written back to main memory without changing the state, and the address in a valid cache block having a state flag indicating a dirty or clean state among the cache blocks on the cache. The information and the status flag are saved, the contents of the main memory are saved after writing back from the cache to the main memory, and when the snapshot is restored, the contents of the saved main memory are restored and then saved as described above. The contents of the cache can be restored from the restored main memory by using the address information of the cache block, and the state of the cache can be restored by using the state flag of the stored cache block. It is a feature.
【0020】
In such a configuration, when a snapshot is taken, the contents of a cache block in a dirty state on the cache are written back to main memory without changing its state, and in a valid cache block in a dirty or clean state. Address information and status flags are saved. Further, after writing back from the cache to the main memory, the contents of the main memory are saved.
【0021】
When reproducing the contents of the memory, first, the contents of the stored main memory are restored. Then, an entry of the cache block is generated from the address information of the saved cache block, the contents of the cache block are restored from the restored main memory, and the state of the cache block is the cache in which the cache block is stored. Restored from the block state flag.
【0022】
The information processing apparatus having the memory snapshot method and the memory snapshot function according to the fourth aspect of the present invention is each cache having a snoop-type cache coherency protocol built in a plurality of processing units. The cache block has a written-back flag that indicates whether or not the block has been written back to main memory (shared by each processing unit), and at the time of taking a snapshot, each processing unit has a write-back flag on its own cache. After clearing the write-back flags of all cache blocks in, the contents of valid cache blocks that have no write-back flag set and have a state flag indicating a dirty state among the cache blocks on the own cache are in the state. Is written back to the main memory without changing, and if a cache block corresponding to the cache block written back to the main memory from another cache is held in the own cache, the write-back flag is set in the cache block. In addition, each processing unit saves the address information in a valid cache block that has a status flag indicating a dirty or clean state among the cache blocks on its own cache and the status flag, and each of the processing units. After writing back from the cache to the main memory, the contents of the main memory are saved, and at the time of snapshot restoration, after the contents of the saved main memory are restored, in each processing unit, the saved cache is described. The feature is that the contents of the own cache are restored from the restored main memory by using the address information of the block, and the state of the own cache is restored by using the state flag of the stored cache block. Is.
【0023】
In such a configuration, when taking a snapshot, each processing unit first clears the write-back flag of all cache blocks on its own cache, and then sets the write-back flag on its own cache. The contents of a valid cache block in a dirty state are written back to the main memory without changing the state, and the write back from the other cache to the main memory is snooped, and the main cache is on the own cache. When a cache block corresponding to the cache block written back to the memory is held, the write-back flag is set in the cache block. By setting this flag, it is possible to prevent waste that the contents written back to the main memory from another cache are written back to the main memory from the cache.
【0024】
Furthermore, in each processing unit, the address information and the state flag in the valid cache block in the dirty or clean state among the cache blocks in the own cache are saved, and after writing back from the cache of each processing unit to the main memory. Stores the contents of the main memory.
【0025】
When reproducing the contents of the memory, first, the contents of the stored main memory are restored. Then, in each processing unit, an entry for the cache block is generated from the address information of the cache block stored, the contents of the cache block are restored from the restored main memory, and the state of the cache block is further restored. Is restored from the state flag of the cache block saved above.
【0026】
The information processing apparatus having the memory snapshot method and the memory snapshot function according to the fifth aspect of the present invention includes each cache having a directory-type cache coherency protocol built in a plurality of processing units. When taking a snapshot of the storage device, for each cache block on the above cache, the status flag indicating the dirty state is set by referring to the directory that holds the directory information including the address, status flag, and the list of caches that have the cache block. Select the cache to write back the cache block to have, write back the contents of the cache block from that cache to the main memory without changing the state, and the state flag indicating the dirty or clean state managed in the above directory. Saves valid directory information with, and saves the contents of the main memory after writing back from the cache to the main memory, and when restoring a snapshot, the contents of this saved main memory are restored and the above Restore the directory from the saved directory information, and use the address information in the valid directory information of this restored directory to change the contents of each cache indicated by the cache list in the directory information from the above restored main memory. It is characterized by being restored.
【0027】
In such a configuration, when a snapshot is taken, a directory is referenced, and each cache block is a cache that writes back a valid cache block in a dirty state based on the state flag and cache list in the directory information. Selected for each. As a result, the contents of the cache block are written back from the selected cache to the main memory without changing the state. In addition, the dirty or clean valid (cache block) directory information managed in the above directory is saved, and the contents of the main memory are saved after writing back from the cache to the main memory.
【0028】
When reproducing the memory contents, first, the contents of the stored main memory are restored, and the directory is restored from the stored directory information, that is, the address of the cache block, the state flag, and the cache list. ..
【0029】
Then, using the address information and the status flag in the valid directory information of this restored directory, a corresponding cache block is generated on each cache indicated by the cache list in the directory information, and the contents of the cache block are displayed. It is restored from the restored main memory.
【0030】
[Example]
Hereinafter, examples of the present invention will be described with reference to the drawings. For the sake of simplicity, the snapshots are numbered in order. Here, it is assumed that the g-th snapshot is processed.
【0031】
[First Example] FIG. 1 is a block configuration diagram of an information processing apparatus to which the memory snapshot method showing the first embodiment of the present invention is applied.
【0032】
The information processing device of FIG. 1 has a processor 11 that executes various programs and the like, and a main memory 12 that stores the programs and the like executed by the processor 11.
【0033】
The main memory 12 is managed in units of memory pages, for example. Each page of main memory 12 is flagged as dirty. This dirty flag indicates whether or not the content of the corresponding page has changed since the last snapshot, and is set to the on state when the content is changed. This dirty flag is released when the content of the corresponding page is saved in the main storage storage area 13 described below, and is in the off state.
【0034】
The information processing apparatus of FIG. 1 also determines the storage area (main storage storage area) 13 used to store the contents of the main memory 12 in page units, and the final storage position in the main storage storage area 13 of each memory page. It has a final storage position list 14 held for each page and a storage area (final storage position list storage area) 15 used for storing the final storage position list (14) at the time of each snapshot.
【0035】
The main storage storage area 13 and the final storage position list storage area 15 are secured on an external storage device (nonvolatile storage device) such as a disk device.
【0036】
The information processing device of FIG. 1 is further stored in the main memory storage device 16 for storing the contents of the main memory 12 in page units based on the dirty flag, and in the final storage position list storage area 15. It has a main memory restoration device 17 that restores the contents of the main memory 12 stored in the main memory storage area 13 according to the final storage position list.
【0037】
Next, in the configuration of FIG. 1, the operation when taking a snapshot will be described.
【0038】
When taking a snapshot, the main memory storage device 16 is activated.
【0039】
The main memory storage device 16 searches each memory page of the main memory 12 for a page in which the dirty flag is set to the on state, that is, a dirty page whose contents have been changed since the last snapshot.
【0040】
In this example, it is assumed that only pages Pi and Pj have changed since the last snapshot, so only the dirty flags of memory pages Pi and Pj are in the on state as shown in Figure 1.
【0041】
In this case, the main storage storage device 16 secures a new storage area Sg1 on the main storage storage area 13 in order to store the memory content MPi of the memory page Pi on the main storage 12.
【0042】
Next, the main storage storage device 16 stores the content MPi of the page Pi in the reserved area Sg1 on the main storage storage area 13.
【0043】
At this time, the main memory storage device 16 turns off (cancels) the dirty flag of the memory page Pi on the main memory 12.
【0044】
The main memory storage device 16 further stores Sg1 as the final storage position information on the main storage storage area 13 of the contents of the page Pi in the area i corresponding to the page Pi on the final storage position list 14.
【0045】
The main storage storage device 16 performs the above processing for the memory page Pj in the same manner.
【0046】
In this way, if the storage of all the dirty main memory contents is completed, that is, if there are no pages in the main memory 12 in which the dirty flag is set to the on state, the main memory storage device 16 can be used. The contents of the final storage position list 14 at the time point are stored in the gth entry of the final storage position list storage area 15.
【0047】
As described above, when the process of taking a snapshot in the situation of FIG. 1 is completed, the main memory 12 is shown in the state shown in FIG. 2 (a), and the final storage position list 14 is shown in FIG. 2 (b). The main memory storage area 13 transitions to the state shown in FIG. 2 (c), and the final storage position list storage area 15 transitions to the state shown in FIG. 2 (d).
【0048】
Even if the dirty flag is released (off operation) individually when saving the contents of the memory page as described above, it is performed collectively after all the dirty main memory contents have been saved. It doesn't matter.
【0049】
Next, the operation when restoring the g-th snapshot will be described.
【0050】
When restoring the snapshot, the main memory restorer 17 is activated.
【0051】
The main memory restoration device 17 searches for the final storage position list of the g-th snapshot stored in the final storage position list storage area 15.
【0052】
Next, the main memory restoration device 17 uses the storage position information of each memory page stored in the final storage position list of the g-th snapshot searched, and the main memory is stored from the main memory storage area 13 as described below. Restore memory contents to 12.
【0053】
First, in this example, the final storage position list of the g-th snapshot stored in the final storage position list storage area 15 is in the area i corresponding to the memory page Pi (memory page) as shown in FIG. The final storage position information Sg1 (on the main storage storage area 13 of the contents of the Pi) is saved, and the final storage (on the main storage storage area 13 of the contents of the memory page Pj) is also stored in the area j corresponding to the memory page Pj. Location information Sg2 is saved.
【0054】
The main memory restoration device 17 retrieves the contents of the memory pages Pi and Pj stored in the areas Sg1 and Sg2 of the main memory storage area 13 according to the final storage position information Sg1 and Sg2, and the page Pi and Pj of the main memory 12 Write to Pj. As a result, the contents of the main memory 12 are restored.
【0055】
[Second Example] FIG. 3 is a block configuration diagram of an information processing apparatus to which the memory snapshot method showing the second embodiment of the present invention is applied.
【0056】
The information processing device of FIG. 3 holds a processor 21 that executes various programs and the like, a main memory 22 that stores the programs and the like executed by the processor 21, and a copy of a part of the main memory 22. Has a cache of 23 and.
【0057】
The main memory 22 is managed in units of memory pages, and each page is given a dirty flag. Since the structure of the main memory 22 is the same as that of the main memory 12 in FIG. 1, it is omitted in FIG. Therefore, if necessary, refer to the main memory 12 in FIG.
【0058】
The cache 23 is, for example, a write-through type cache, and includes an address, a copy (contents) of data of a block of a certain size on the main memory 22 specified by the address, and a cache block in which a state flag is set. This state flag indicates whether the corresponding cache block is valid. Here, the state flag indicating that the cache block is valid is represented by V (valid), and the state flag indicating that the cache block is invalid is represented by I (invalid).
【0059】
In the example of FIG. 3, for the sake of simplicity, it is assumed that the block data held in the cache block and the page size are the same. In addition, the cache block Bm that holds the data (copy) Cm of the block (memory page) on the main memory 22 specified by the address (page address) Am and the main memory 22 specified by the address (page address) An. It is assumed that only the cache block Bn that holds the data (copy) Cn of the upper block (memory page) is valid, and the others are invalid (the invalid cache block is omitted in Fig. 3).
【0060】
The information processing device of FIG. 3 is also used to store the contents of the main memory 12 (similar structure to the main memory storage area 13 of FIG. 1) and a valid cache on the cache 23. It has a storage area (address storage area) 25 used for storing the address information in the block.
【0061】
In the address storage area 25, an address table 251 composed of an entry group that holds an address for each snapshot and a search table 252 that holds the head storage position (entry position) of the address table 251 for each snapshot are placed.
【0062】
The main storage storage area 24 and the address storage area 25 are secured on an external storage device such as a disk device.
【0063】
The information processing device of FIG. 3 further stores the contents of the main memory 12 in the main memory storage area 24 (similar to the main memory storage device 16 in FIG. 1) and the main memory storage area 24. Addresses the main memory restorer 27 (similar to the main memory restorer 17 in FIG. 1) that restores the contents of the main memory 22 and the address (valid address) in the valid cache block held in the cache 23. A cache address storage device 28 that stores in the storage area 25, and a cache restore device 29 that restores the contents of the cache 23 (address information of the cache block and its contents) based on the contents of the address storage area 25 and the main memory 22. have.
【0064】
In addition to the above configurations, the information processing apparatus of FIG. 3 includes the same configurations as those of the final storage position list 14 and the final storage position list storage area 15 of FIG. 1, but are omitted in the drawings. ing.
【0065】
Next, in the configuration of FIG. 3, the operation when taking a snapshot will be described.
【0066】
First, the cache 23 in FIG. 3 is a write-through type cache as described above. Therefore, when the cache data on the cache 23 is updated, the corresponding data on the main memory 22 is also updated, and the contents of the cache 23 and the contents of the main memory 22 are always consistent. For example, the contents (block data) Cm and Cn of the cache blocks Bm and Bn match the data (on the memory page) on the main memory 32 specified by the addresses Am and An.
【0067】
Now, when taking a snapshot, the cache address storage device 28 is activated.
【0068】
The cache address storage device 28 searches for a valid cache block in which the state flag is set to the V state in each cache block of the cache 23.
【0069】
In this example, only two cache blocks Bm, Bn are valid, as shown in Figure 3.
【0070】
In this case, the cache address storage device 28 first stores the address Am in the valid cache block Bm on the cache 23 in the entry g1 of the address table 251 in the address storage area 25. The entry g1 in this address table 251 is located by the contents of the gth entry in the search table 252 (set during the last snapshot).
【0071】
The cache address storage device 28 then stores the address An in the valid cache block Bn on the cache 23 in, for example, the next entry g2 in the address table 251.
【0072】
When all valid cache blocks (address information in them) have been saved in this way, the cache address saver 28 will use the g + 1th entry in lookup table 252 for the next snapshot process. Is set to the value (g + 1) 1 that points to the next entry in the address table 251.
【0073】
When taking a snapshot, the main memory storage device 26 is also activated.
【0074】
The contents of the main memory storage device 26 are the same as those performed by the main memory storage device 16 in the first embodiment in each memory page on the main memory 22 since the last snapshot. Look for modified pages (ie dirty pages). This dirty page has the data Cm at address Am because in the example in Figure 3, cache 23 is a write-through cache and the page size matches the size of the cache block (block data inside). And the data Cn at the address An. This is also the case when the page size is larger than the cache block size (usually this is often the case). If the cache block size is larger, all the corresponding pages in the main memory 12 may be regarded as dirty pages.
【0075】
Next, the main memory storage device 26 stores the dirty page data Cm and Cn in the gth (two areas Sg1 and Sg2 managed as snapshot areas) of the main memory storage area 24. The handling of the final storage position list (not shown) at this time is the same as that of the first embodiment.
【0076】
As described above, when the process of taking a snapshot in the situation of FIG. 3 is completed, the address storage area 25 is in the state shown in FIG.
【0077】
Next, the operation when restoring the g-th snapshot will be described.
【0078】
First, whether or not the same cache block as when saving is used at the time of restoration depends on the cache configuration. In the case of the direct map method, the position of the cache block is the same as that at the time of saving, but in the case of the set associative method or the complete associative method, the position of the block may change. Here, in order to simplify the explanation of the restoration process, it is assumed that the cache 23 is a direct map method.
【0079】
At the time of snapshot restoration, the main memory restoration device 27 and the cache restoration device 29 are activated.
【0080】
The main memory restoration device 27 stores the g-th main memory content stored in the main memory storage area 24 in the main memory 22 in the same manner as that performed by the main memory restoration device 17 in the first embodiment. Restore.
【0081】
On the other hand, the cache restoration device 29 first invalidates (I) the states of all cache blocks in the cache 23.
【0082】
Next, the cache restorer 29 refers to the g-th entry in the search table 252 of the address storage area 25 to obtain the first storage position (entry position) g1 in the address table 251 of the g-th snapshot.
【0083】
Then, the cache restore device 29 restores the cache block Bm from the address Am in the entry (that is, entry g1) in the address table 251 of the obtained head storage position g1 to the cache 23, and makes the state valid (V). .. The cache restorer 29 also restores the content Cm of its address Am from the main memory 22 (after restoration by the main memory restorer 27).
【0084】
Subsequently, the cache restore device 29 restores the cache block Bn from the address An in the next entry (that is, entry g2) in the address table 251 to the cache 23 and makes the state valid (V). Further, the cache restore device 29 restores the content Cn of the address An from the main memory 22 (after restoration by the main memory restore device 27).
【0085】
The next entry in the address table 251 is specified by the g + 1th entry in the search table 252 as the first storage position (g + 1) 1 in the address table 251 of the g + 1th snapshot. Therefore, it is not the target of restoration of the gth snapshot.
【0086】
[Third Example] FIG. 5 is a block configuration diagram of an information processing apparatus to which the memory snapshot method showing the third embodiment of the present invention is applied.
【0087】
The information processing device of FIG. 5 has a processor 31 that executes various programs and the like, a main memory 32 that stores the programs and the like executed by the processor 31, and a cache 33 for holding a copy of a part of the main memory 32. And have.
【0088】
The main memory 32 is managed in units of memory pages, and each page is flagged as dirty. Since the structure of the main memory 32 is the same as that of the main memory 12 in FIG. 1, it is omitted in FIG. Therefore, if necessary, refer to the main memory 12 in FIG.
【0089】
The cache 33 is, for example, a copyback type cache, and like the write-through type cache 23 in FIG. 3, the address and contents (however, in the copyback type cache, the data on the main memory 32 specified by the address). (Not necessarily the same as), and a cache block with a state flag set. This state flag is different from the cache 23 in FIG. 3, in addition to whether or not the corresponding cache block is valid, if it is valid, its contents (data) and the corresponding part on the main memory 32 are further set. Indicates whether the data match. Here, the state flag indicating that the above two data match is represented by C (clean), and the state flag indicating that the two data do not match is represented by D (dirty). In addition, the state flag indicating that the cache block is invalid is represented by I (invalid).
【0090】
In the example of FIG. 5, for the sake of simplicity, it is assumed that the block data held in the cache block and the page size are the same. In addition, the cache block Bm that holds the content Cm corresponding to the data of the block (memory page) on the main memory 32 specified by the address (page address) Am is dirty, and the main memory specified by the address (page address) An. It is assumed that the cache block Bn that holds the content Cn corresponding to the data of the block (memory page) on 32 is clean, and the other cache blocks are invalid (the invalid cache block is omitted in Fig. 5).
【0091】
Here, the content (block data) Cm in the dirty cache block Bm does not match the content of the corresponding address Am on the main memory 32. In order to show the situation, in FIG. 3, the content of the address (page address) Am on the main memory 12 is not Cm but blank. On the other hand, the content (block data) Cn in the clean cache block Bn matches the content of the corresponding address An on main memory 12.
【0092】
The information processing device of FIG. 5 is also used to store the contents of the main memory 32 (similar structure to the main memory storage area 13 of FIG. 1) and a valid cache on the cache 33. It has a storage area (cache information storage area) 35 used for storing a set of address information and a state (state flag) in a block.
【0093】
In the cache information storage area 35, an information table 351 consisting of an entry group that holds an address and a state (state flag) for each snapshot, and a search that holds the start storage position (entry position) of the address table 351 for each snapshot. Table 352 is placed.
【0094】
The main storage storage area 34 and the cache information storage area 35 are secured on an external storage device such as a disk device.
【0095】
The information processing device of FIG. 5 also stores the contents of the main memory 32 in the main memory storage area 34 (similar to the main memory storage device 16 in FIG. 1) and the main memory storage area 34. It has a main memory restoration device 37 (similar to the main memory restoration device 17 in FIG. 1) that restores the contents of the main memory 32.
【0096】
The information processing device of FIG. 5 further includes a cache information storage device 38 that stores a set of addresses and states (state flags) in a valid cache block held in the cache 33 in the cache information storage area 35, and a cache information storage device 38. It has a cache restore device 39 that restores the contents of the cache 33 (address information, state, and contents of the cache block) based on the contents of the area 35 and the main memory 32, and a cache content write-back device 40. The cache content write-back device 40 controls the operation of writing back the contents of the dirty cache block held in the cache 33 to the main memory 32 when taking a snapshot.
【0097】
In addition to the above configurations, the information processing apparatus of FIG. 5 includes the same configurations as those of the final storage position list 14 and the final storage position list storage area 15 of FIG. 1, but are omitted in the drawings. ing.
【0098】
Next, in the configuration of FIG. 5, the operation when taking a snapshot will be described.
【0099】
First, the cache 33 in FIG. 5 is a copyback type cache as described above. Therefore, when the data (contents) of the cache block on the cache 33 is updated, the corresponding data on the main memory 32 is not updated immediately, but becomes a dirty (D state) cache block, which is the same as the contents of the cache 33. The contents of main memory 32 do not always match. This cache block becomes clean (C state) when its contents are written back to the main memory 32 by a copyback mechanism (not shown) in the normal state (without taking a snapshot).
【0100】
Now, when taking a snapshot, the cache content write-back device 40 is activated.
【0101】
The cache content write-back device 40 searches each cache block of the cache 33 for a valid cache block set in the D state, that is, a cache block whose cache state is dirty.
【0102】
In this example, only the cache block Bm is dirty, as shown in Figure 5.
【0103】
In this case, the cache content write-back device 40 does not change the content (block data) Cm of the dirty cache block Bm based on the address Am in the block Bm without changing the state (cache state) of the cache block Bm. Write back to main memory 32. As a result, the correct updated data Cm is set in the address Am (page) on the main memory 32, but the state of the corresponding cache block Bm remains dirty. This is different from normal write-back (copyback).
【0104】
When taking a snapshot, the cache information storage device 38 is also activated.
【0105】
The cache information storage device 38 searches for a valid cache block in which the state flag is set to the D or C state in each cache block of the cache 33.
【0106】
In this example, only two cache blocks Bm, Bn are valid, as shown in Figure 5.
【0107】
In this case, the cache information storage device 38 first stores the pair of the address Am and the state D in the valid cache block Bm on the cache 33 in the entry g1 in the information table 351 of the cache information storage area 35. The entry g1 in this information table 351 is located by the contents of the gth entry in the lookup table 352 (set during the last snapshot).
【0108】
Next, the cache information storage device 38 stores the pair of the address An and the state C in the valid cache block Bn on the cache 33 in, for example, the next entry g2 of the information table 351.
【0109】
In this way, when all the valid cache blocks (address information and state pairs in it) have been saved, the cache information storage device 38 g + in the search table 352 for the next snapshot processing. Set the first entry to the value (g + 1) 1 that points to the next entry in information table 351. ..
【0110】
When the write-back operation described above by the cache content write-back device 40 is completed, the main memory storage device 36 is activated.
【0111】
The contents of the main memory storage device 36 have changed since the last snapshot in each memory page on the main memory 32 in the same manner as that performed by the main memory storage device 16 in the first embodiment. Look for pages that have been (ie, dirty pages). In the example of FIG. 5, the data of this dirty page is the data Cn of the address An corresponding to the cache block Bn in the C state on the cache 33 and the address corresponding to the cache block Bm in the D state on the cache 33. Am data (that is, data Cm that has just been written back to main memory 32 by the cache content write-back device 40).
【0112】
Next, the main storage storage device 36 stores the dirty page data Cm and Cn in the gth (two areas Sg1 and Sg2 managed as snapshot areas) of the main storage storage area 34. The handling of the final storage position list (not shown) at this time is the same as that of the first embodiment.
【0113】
As described above, when the process of taking a snapshot in the situation of FIG. 5 is completed, the main memory 32 is in the state shown in FIG. 6 (a), and the cache 33 is in the state shown in FIG. 6 (b). The cache information storage area 35 is in the state shown in FIG. 6 (c).
【0114】
Next, the operation when restoring the g-th snapshot will be described.
【0115】
When the snapshot is restored, the main memory restoration device 37 and the cache restoration device 39 are activated.
【0116】
The main storage restoration device 37 stores the g-th main storage content stored in the main storage storage area 34 in the main storage 32 in the same manner as that performed by the main storage restoration device 17 in the first embodiment. Restore.
【0117】
On the other hand, the cache restoration device 39 first invalidates (I) the states of all cache blocks in the cache 33.
【0118】
Next, the cache restoration device 39 refers to the g-th entry in the search table 352 of the cache information storage area 35, and obtains the first storage position (entry position) g1 in the information table 351 of the g-th snapshot.
【0119】
Then, the cache restore device 39 restores the cache block Bm from the pair of the address Am and the state D in the entry (that is, entry g1) in the information table 351 of the obtained head storage position g1 to the cache 23, and further (main memory restoration). Restores the content Cm of its address Am from main memory 32 (after restoration by device 37).
【0120】
The cache restorer 39 then restores the cache block Bn onto the cache 23 from the pair of address An and state C in the next entry (ie entry g2) in the information table 351 and further (by the main memory restorer 37). Restores the content Cn of its address An from main memory 32 (after restoration).
【0121】
[Fourth Example] FIG. 7 is a block configuration diagram of an information processing apparatus to which the memory snapshot method showing the fourth embodiment of the present invention is applied.
【0122】
The information processing device of FIG. 7 is used to store the processing unit group including the processing units 41j and 41k, the main memory 42 shared by the processing unit group, and the contents of the main memory 42 (Fig. 7). The contents of the main memory storage area 43 (which has the same structure as the main memory storage area 13 of 1) and the main memory 42 are stored in the main memory storage area 43 (similar to the main memory storage device 16 in FIG. 1). The device 44, the main memory recovery device 45 (similar to the main memory recovery device 17 in FIG. 1) that restores the contents of the main memory 42 stored in the main memory storage area 43, and each processing unit and the main memory 42 It has a connected bus 46.
【0123】
The processing units 41j and 41k have processors 411j and 411k that execute various programs and the like, and caches 412j and 412k for holding a copy of a part of the main memory 42.
【0124】
The caches 412j and 412k consist of a cache block consisting of an address, contents, a state flag, and a write-back flag. In this way, the cache blocks of caches 412j and 412k have a structure in which the write-back flag is added to the cache block of cache 33 in FIG. This write-back flag indicates whether or not the contents of the corresponding cache block (block data) have been written back to main memory 42 (in the on state) (in the off state) when taking a snapshot. Shown.
【0125】
Processing units 41j, 41k are also used to store pairs of address information and states (state flags) in a valid cache block on caches 412j, 412k (similar to cache information storage area 35 in Figure 5). ) Cache information storage device 414j that stores the set of the cache information storage area 413j, 413k and the address and state (state flag) in the valid cache block held in the cache 412j, 412k in the cache information storage area 413j, 413k. , 414k, cache restoration device 415j, 415k that restores the contents of cache 412j, 412k (address information, state and contents of cache block) based on the contents of cache information storage areas 413j, 413k and main storage 42. It has cache contents write-back devices 416j and 416k.
【0126】
When taking a snapshot, the cache content write-back devices 416j and 416k are the contents (block) of the cache block held in the cache 412j and 412k and for which the write-back flag is not set (off state). It controls the operation of writing back the data) to the main memory 42 via the bus 46. The cache content write-back devices 416j and 416k monitor the cache behavior of other processing units on the bus 46.
【0127】
Although not shown in FIG. 7, the configurations of other processing units are the same as those of the processing units 41j and 41k.
【0128】
In addition, the information processing device shown in FIG. 7 is equipped with a mechanism for making the contents of the main memory 42 consistent with each cache including the caches 412j and 412k using the well-known snoop-type cache coherency protocol. However, it is omitted in the figure.
【0129】
Further, in addition to the above configurations, the information processing apparatus of FIG. 7 includes the same configurations as those of the final storage position list 14 and the final storage position list storage area 15 of FIG. 1, but are omitted in the drawings. ing.
【0130】
Next, in the configuration of FIG. 7, the operation when taking a snapshot will be described. For the sake of simplicity, it is assumed that the block data held in the cache block and the page size are the same.
【0131】
It is assumed that the caches 412j and 412k are in the state shown in FIGS. 8 (a) and 8 (b). That is, in the cache 412j, as shown in Fig. 8 (a), the cache block Bq that holds the address Aq and its content Cq is dirty (state D), and the others are invalid (the invalid cache block is omitted in the figure). Suppose there is. In the cache 412k, as shown in Fig. 8 (b), the cache block Bp that holds the address Ap and its contents Cp is clean (state C), and the others are invalid (invalid cache blocks are omitted in the figure). Suppose that. In addition, it is assumed that the written-back flags in the cache blocks Bq and Bp are all off.
【0132】
When taking a snapshot, the cache content write-back devices 416j and 416k in each processing unit 412j and 412k are activated.
【0133】
The cache content write-back devices 416j and 416k first clear (turn off) the write-back flag of all cache blocks of the cache 412j and 412k. This operation is performed collectively for all cache blocks including cache blocks for which the write-back flag has already been cleared, and selectively for cache blocks for which the write-back flag is on. It doesn't matter.
【0134】
Next, the cache content write-back devices 416j and 416k are valid cache blocks in which the (state flag) D state is set and the write-back flag is not set in each cache block of the cache 412j and 412k. that cache state Zehnder find cache block and write-back flag in Ti is in the off state.
【0135】
In this example, in the cache 412j, only the cache block Bq is applicable as shown in FIG. 8 (a), and in the cache 412k, there is no corresponding cache block as shown in FIG. 8 (b).
【0136】
In this case, only the cache content write-back device 416j sets the contents (block data) Cq of the cache block Bq in the cache 412j that is dirty and the write-back flag is off based on the address Aq in the block Bq. The state of the block Bq (state flag indicating the cache state) is not changed and is written back to the main memory 42 via the bus 46. At this time, the cache content write-back device 416j sets the write-back flag of the block Bq to the on state.
【0137】
The cache content write-back devices in the processing units, such as the cache content write-back devices 416j and 416k, monitor the cache behavior of other processing units on the bus 46 when taking a snapshot. For example, the cache content write-back devices 416j and 416k update the main memory 42 that matches the address in the cache block held on the caches 412j and 412k in the own units 41j and 41k from other processing units. Is performed, that is, whether or not the main memory update operation of another processing unit hits the caches 412j and 412k in the own unit is monitored. Then, when the cache content write-back devices 416j and 416k hit the corresponding cache block of the cache 412j and 412k in the own unit when the main memory update operation of the other processing unit hits, the write-back flag in the block is set. Set to the on state. However, in this example, the cache block Bq is written back to the main memory 42 by the cache content write-back device 416j. Is not held in the cache of other processing units, so the write-back flag is not turned on in any of the other processing units.
【0138】
As a result, the correct updated data Cq is set in the address Aq on the main memory 42, but the state of the corresponding cache block Bq remains dirty.
【0139】
Next, the cache information storage devices 414j and 414k are started. The cache information storage devices 414j and 414k perform cache information storage processing in the same manner as the cache information storage device 38 in FIG. 5 described above.
【0140】
That is, the cache information storage device 414j stores the pair of the address Aq and the state D in the valid cache block Bq (see Fig. 8 (a)) in the cache 412j in the cache information storage area 413j, and stores the cache information storage device. The 414k stores the pair of address Ap and state C in the valid cache block Bp (see Figure 8 (b)) in the cache 412k in the cache information storage area 413k. Here, the address information storage position in the cache information storage areas 413j and 413k is specified by the contents of the gth entry in the search table 418j and 418k as shown in FIGS. 9 (c) and 9 (d). It is an entry in the information table 417j, 417k.
【0141】
When the cache information storage devices 414j and 414k are started, the main memory storage device 44 is also started.
【0142】
The contents of the main memory storage device 44 have changed since the last snapshot in each memory page on the main memory 42 in the same manner as that performed by the main memory storage device 16 in the first embodiment. Look for pages that have been (ie, dirty pages). In the example of FIGS. 8 (a) and 8 (b), the data of this dirty page is mainly stored by the data of the address Aq corresponding to the cache block Bq in the D state on the cache 412j (that is, the cache content write-back device 416j). The data Cq) just written back to 42) and the data Cp at the address Ap corresponding to the cache block Bp in the C state on the cache 412k.
【0143】
Next, the main storage storage device 44 stores the data Cq and Cp of the above dirty page in the gth position of the main storage storage area 43.
【0144】
As described above, when the process of taking a snapshot in the situation shown in FIGS. 8 (a) and 8 (b) is completed, the caches 412j and 412k are in the state shown in FIGS. 9 (a) and 9 (b). The information storage areas 413j and 413k are in the states shown in FIGS. 9 (c) and 9 (d).
【0145】
The above is the case where there is no common cache block between each cache of each processing unit. As shown in FIGS. 10 (a) and 10 (b), for example, the cache block Bq is not only the cache 412j but also the cache 412k. If it also exists, the behavior at the time of snapshot is slightly different as described below.
【0146】
First, the cache content write-back device 416j in the processing unit 41j clears the write-back flag of all cache blocks of cache 412j, and then the cache block whose cache state is dirty and whose write-back flag is off. Suppose you are looking for Bq. In this case, the cache content write-back device 416j writes back the content (block data) Cq of the cache block Bq to the main memory 42 based on the address Aq in the block Bq without changing the state of the block Bq. , Set the write-back flag of the block Bq to the on state.
【0147】
On the other hand, when the cache content write-back device 416k in the processing unit 41k performs a write-back operation to the main memory 42 by the cache content write-back device 416j, the cache content write-back device 416k is written back by the address on the bus 46. Detects that block Bq is also held in cache 412k in its own unit 41k. That is, the cache content write-back device 416k snoops the write-back of the cache block Bq held in the cache 412k in its own unit 41k. In this case, the cache content write-back device 416k sets the write-back flag of the cache block Bq in the cache 412k to the on state. This flag operation is to prevent the cache content write-back device 416k from being wasted writing back to the main memory 42 for the same cache block Bp that was written back to the main memory 42 by the cache content write-back device 416j. Is.
【0148】
If the cache content write-back device 416k first writes back the cache block Bq held in the cache 412k in its own unit 41k, the cache content write-back device 416j will use the above cache. The same write-back flag operation as the content write-back device 416j is performed.
【0149】
If the cache content write-back devices 416j and 416k try to write back the cache block Bq at the same time, the person who can acquire the bus 46 first may perform the processing, or both may perform the same processing. Absent. Further, the cache content write-back device itself that has written back the cache block does not necessarily have to turn on the write-back flag of the cache block.
【0150】
Subsequent operations are the same as for snapshots in the situations shown in FIGS. 8 (a) and 8 (b), and when the process of taking snapshots in the situations shown in FIGS. 10 (a) and 10 (b) is completed, The caches 412j and 412k are in the states shown in FIGS. 11 (a) and 11 (b), and the cache information storage areas 413j and 413k are in the states shown in FIGS. 11 (c) and 11 (d).
【0151】
Next, the operation when restoring the snapshot of FIGS. 8 (a) and 8 (b) will be described.
【0152】
When the snapshot is restored, the main memory restoration device 45, the cache restoration devices 415j, 415k, etc. are activated.
【0153】
First, the main memory restoration device 45 performs the g-th main memory content stored in the main memory storage area 43 in the same manner as that performed by the main memory restoration device 17 in the first embodiment. Restore to.
【0154】
On the other hand, the cache restoration device 415j is in the information table 417j specified by the g-th entry of the search table 418j of the cache information storage area 413j in the same manner as that performed by the cache restoration device 39 in the third embodiment. Restores cache block Bq on cache 412j from the pair of address Aq and state D stored in the entry, and then restores the content Cq of that address Aq from main memory 42 (after restoration by main memory 45). ..
【0155】
Similarly, the cache restorer 415k obtains the pair of address Ap and state C from the cache information storage area 413k, restores the cache block Bp on the cache 412k, and further (after restoration by the main memory restorer 45) main memory 42. Restore the content Cp of that address Ap from.
【0156】
[Fifth Example] FIG. 12 is a block configuration diagram of an information processing apparatus to which the memory snapshot method showing the fifth embodiment of the present invention is applied.
【0157】
The information processing device of FIG. 12 is used to store the processing unit group including the processing units 51j and 51k, the main memory 52 shared by the processing unit group, and the contents of the main memory 52 (FIG. 12). The contents of the main memory storage area 53 (which has the same structure as the main memory storage area 13 of 1) and the main memory 52 are stored in the main memory storage area 53 (similar to the main memory storage device 16 in FIG. 1). It has a device 54 and a main memory recovery device 55 (similar to the main memory recovery device 17 in FIG. 1) that restores the contents of the main memory 52 stored in the main memory storage area 53.
【0158】
The information processing device of FIG. 12 also indicates the address in the cache block Bi held in the cache in each processing unit, the state (state flag), and the cache number indicating which cache the cache block Bi exists in. It has a directory 56 consisting of a group of entries Ei that holds a set of lists, and a write-back cache selection device 57 that selects the cache to be written back to the main memory 52.
【0159】
The information processing device of FIG. 12 further has a cache information storage area used to store a set of addresses, states (state flags), and corresponding cache number lists in a valid cache block on the cache in each processing unit. 58, a cache information storage device 59 that stores a set of addresses, states (state flags), and cache number lists in valid entries held in the directory 56 in the cache information storage area 58, a cache restore device 60, and a cache restore device 60. Each processing unit has a main memory 52 and a bus 61 to which the directory 56 is connected.
【0160】
The processing units 51j and 51k have processors 511j and 511k that execute various programs, caches 512j and 512k for holding a copy of a part of the main memory 52, and cache contents write-back devices 513j and 513k.
【0161】
In the information processing device shown in FIG. 12, the directory-type cache coherency protocol is used consistently by a mechanism (not shown). Therefore, the above-mentioned directory 56 is used for the state of each cache including the caches 512j and 512k. It is logically managed in one place.
【0162】
The caches 512j and 512k consist of cache blocks that include an address and its contents (block data).
【0163】
The cache content write-back devices 513j and 513k are started by the cache selection device 57 and write back the contents (block data) of the specified cache block held in the cache 512j and 512k to the main memory 42 via the bus 46. Controls the movement.
【0164】
Although not shown in FIG. 12, the configurations of other processing units are the same as those of the processing units 51j and 51k.
【0165】
Further, in addition to the above configurations, the information processing apparatus of FIG. 12 includes the same configurations as those of the final storage position list 14 and the final storage position list storage area 15 of FIG. 1, but are omitted in the drawings. ing.
【0166】
Next, in the configuration of FIG. 12, the operation when taking a snapshot will be described. For the sake of simplicity, it is assumed that the block data held in the cache block and the page size are the same.
【0167】
It is assumed that the caches 512j and 512k are in the state shown in Fig. 13 (a) and (b), and the directory 56 is in the state shown in Fig. 13 (c). That is, as shown in FIG. 13 (a), the cache 512j has cache blocks Br and Bs holding the addresses Ar and As and their contents Cr and Cs, and the cache 512k has the cache blocks Br and Bs as shown in FIG. 13 (b). Thus, it is assumed that the same cache block Br exists on the cache 512j. In addition, the entry Er of the directory 56 holds a list of cache numbers (having cache numbers j and k) of the caches 512j and 512k in which the address Ar, the state D, and the cache block Br in the cache block Br exist, and the entry is made. Es holds a list of cache numbers (with cache number j) of the cache 512j in which the address As, state C, and the cache block Bs in the cache block Bs exist.
【0168】
When taking a snapshot, the cache selection device 57 is activated.
【0169】
Then, the cache selection device 57 performs the cache selection operation described below so that the processing of writing back the contents (block data) of the dirty cache block to the main memory 52 is performed.
【0170】
First, the cache selector 57 looks in directory 56 for entry Ei indicating cache block Bi with the D state (state flag) set. Then, the cache selection device 57 selects one of the caches holding the corresponding cache block Bi from the cache number list in the searched entry Ei. In the example of FIG. 13 (c), the cache number list of the entry Er in the directory 56 shows that the corresponding cache block Br is held in the caches 512j and 512k, so that the cache selection device 57 caches. Select either 512j or 512k. Here, the explanation will be continued assuming that the cache 512j is selected. Of course, if only one cache is shown, that cache will be selected.
【0171】
When the cache selection device 57 selects the cache 512j, the cache selection device 57 requests the corresponding cache content write-back device 513j to write back the contents of the cache block Br to the main memory 52.
【0172】
In response to this, the cache content write-back device 513j writes back the content (block data) Cr of the specified cache block Br held in the cache 512j to the main memory 52 based on the address Ar in the block Br.
【0173】
When there is nothing to write back to the main memory 52 from the cache of each processing unit, the cache information storage device 59 is activated.
【0174】
The cache information storage device 59 stores a set of addresses, states, and a cache number list of valid entries (entries in the D or C state) in the directory 56 at the gth position of the cache information storage area 59. That is, the cache information storage device 59 shows the set of the address Ar, the state D, and the cache number list (j, k) in the valid entry Er in the directory 56 shown in FIG. 13 (c) in FIG. 13 (d). As described above, the cache information storage area 58 is stored in the entry in the information table 581, which is located by the g-th entry in the search table 582. Subsequently, the cache information storage device 59 shows a set of the address As, the state C, and the cache number list (j) in the valid entry Es in the directory 56 shown in FIG. 13 (c) as shown in FIG. 13 (d). It is saved in the next entry of the information table 581 in the cache information storage area 58.
【0175】
When the cache information storage device 59 is activated, the main memory storage device 54 is also activated.
【0176】
The contents of the main memory storage device 54 have changed since the last snapshot in each memory page on the main memory 52 in the same manner as that performed by the main memory storage device 16 in the first embodiment. Look for pages that have been (ie, dirty pages). In the example of FIGS. 13 (a) to 13 (c), the data of this dirty page is the data Cs of the address As corresponding to the cache block Bs in the C state and the address Ar corresponding to the cache block Br in the D state. (That is, the data Cr that has just been written back to the main memory 42 by the cache content write-back device 513j).
【0177】
Then, the main storage storage device 54 stores the data Cr and Cs of the dirty page in the gth position of the main storage storage area 53.
【0178】
Next, the operation when restoring the snapshot will be described.
【0179】
At the time of snapshot restoration, the main memory restoration device 55 and the cache restoration device 60 are activated.
【0180】
First, the main memory restoration device 55 performs the g-th main memory content stored in the main memory storage area 53 in the same manner as that performed by the main memory restoration device 17 in the first embodiment. Restore to.
【0181】
On the other hand, the cache restoration device 60 is the g-th entry in the search table 582 of the cache information storage area 58 shown in FIG. 13 (d) in the same manner as the cache restoration device 39 in the third embodiment performed. Restores entry Er to directory 56 from the set of address Ar, state D, and cache number list (j, k) stored in the entry in the specified information table 581. Further, the cache restoration device 60 is entered from the set of the address As, the state C, and the cache number list (j) stored in the next entry of the information table 581 in the cache information storage area 58 shown in FIG. 13 (d). To directory 56.
【0182】
Further, the cache restoration device 60 creates a cache block Br having an address Ar and a cache block Bs having an address As on the cache 512j based on the restored contents of the directory 56, and the contents Cr of each cache block Br and Bs. , Cs is restored from the main memory 52 (after restoration by the main memory restoration device 55).
【0183】
Similarly, the cache restorer 60 creates a cache block Br having an address Ar on the cache 512k, and restores the content Cr of the block Br from the main memory 52 (after restoration by the main memory restorer 55).
【0184】
[Effect of the invention]
As described in detail above, according to the present invention, the final storage position of each memory page is stored in the final storage position list, which is saved for each snapshot, and this list is used when restoring the memory contents. By doing so, it is possible to quickly find the necessary memory page from the huge amount of stored memory contents, and it is possible to speed up the reproduction of the program.
【0185】
Further, according to the present invention, in a storage device having a cache, the behavior of the program is set by writing back to the main memory without changing the state of the cache and storing the address and state of the cache block. Can be prevented from changing.
【0186】
As described above, the present invention can be applied not only to restarting a program but also to reproducing and executing a program, and a great effect can be expected in practical use.
[Simple explanation of drawings]
[Figure 1]
A block configuration diagram of an information processing apparatus to which a memory snapshot method having a page final storage position list showing a first embodiment of the present invention is applied.
[Figure 2]
The figure which shows the state of the main memory 12, the final storage position list 14, the main storage storage area 13 and the final storage position list storage area 15 after taking a snapshot in the state of FIG.
[Fig. 3]
The block block diagram of the information processing apparatus to which the memory snapshot method of the write-through type cache which shows the 2nd Example of this invention is applied.
[Fig. 4]
The figure which shows the state of the address storage area 25 after taking a snapshot in the state of FIG.
[Fig. 5]
The block block diagram of the information processing apparatus to which the memory snapshot method of the copy-back type cache which shows the 3rd Example of this invention is applied.
[Fig. 6]
The figure which shows the state of the main memory 32, the cache 33, and the cache information storage area 35 after taking a snapshot in the state of FIG.
[Fig. 7]
The block block diagram of the information processing apparatus to which the memory snapshot method of the cache which has the snoop type cache coherency protocol which shows the 4th Example of this invention is applied.
[Fig. 8]
The figure which shows an example of the state of the caches 412j and 412k before a snapshot in the configuration of FIG. 7 when the same cache block does not exist in both caches.
[Fig. 9]
The figure which shows the state of the cache 412j, 412k and the cache information storage area 413j, 413k after taking a snapshot in the state of FIG.
[Fig. 10]
The figure which shows an example of the state of the caches 412j and 412k before a snapshot in the configuration of FIG. 7 when the same cache block exists in both caches.
[Fig. 11]
The figure which shows the state of the cache 412j, 412k and the cache information storage area 413j, 413k after taking a snapshot in the state of FIG.
[Fig. 12]
FIG. 6 is a block configuration diagram of an information processing apparatus to which a memory snapshot method of a cache having a directory-type cache coherency protocol showing a fifth embodiment of the present invention is applied.
[Fig. 13]
The figure which shows the state of the cache 512j, 512k before the snapshot, the directory 56, and the cache information storage area 58 after the snapshot in the configuration of FIG.
[Explanation of symbols]
12 ... main memory, 13, ... main memory storage area, 14 ... final storage position list, 15 ... final storage position list storage area, 16 ... main memory storage device, 17 ... Main memory restorer, 22 ... main memory, 23 ... cache (write-through cache), 24 ... main memory storage area, 25 ... address storage area, 26 ... main memory storage device, 27 ... main memory restorer, 28 ... cache address saver, 29 ... cache restorer, 32 ... main memory, 33 ... cache (copyback type cache), 34 ... main Storage storage area, 35 ... cache information storage area, 36 ... main memory storage device, 37 ... main memory recovery device, 38 ... cache information storage device, 39 ... cache recovery device, 40. .. Cache content write-back device, 41j, 41k ... Processing unit, 42 ... Main memory, 43 ... Main memory storage area, 44 ... Main memory storage device, 45 ... Main memory restore Device, 46 ... Bus, 412j, 412k ... Cache (cache with snoop-type cache coherency protocol), 413j, 413k ... cache information storage area, 414j, 414k ... cache information storage device, 415j, 415k ... cache recovery device, 416j, 416k ... cache content write-back device, 51j, 51k ... processing unit , 52 ... main memory, 53 ... main storage storage area, 54 ... main memory storage device, 55 ... main memory restorer, 56 ... directory, 57 ... write-back cache selection device , 58 ... cache information storage area, 59 ... cache information storage device (directory storage means), 60 ... cache recovery device (directory recovery means), 61 ... bus, 512j, 512k ... cache (Cache with directory-type cache coherency protocol), 513j, 513k ... Cache content write-back device.
14 sheets
Sheet 1 Sheet 2 Sheet 3 Sheet 4 Sheet 5 Sheet 6 Sheet 7 Sheet 8 Sheet 9 Sheet 10 Sheet 11 Sheet 12 Sheet 13 Sheet 14
Every citation, both ways
| Document | Relation | Office | Cited during |
|---|---|---|---|
| US9251049B2 | Cited by | United States of America | Applicant |
| JP2010538354A | Cited by | Japan | Search report |
| US10296237B2 | Cited by | United States of America | Applicant |
| WO2019193620A1 | Cited by | World Intellectual Property Organization (WIPO) | International search |
| US7404102B2 | Cited by | United States of America | Applicant |
| JP2008108257A | Cited by | Japan | Examiner |
| US10067712B2 | Cited by | United States of America | Applicant |
| US7493514B2 | Cited by | United States of America | Applicant |
| US7398418B2 | Cited by | United States of America | Applicant |
| US8601035B2 | Cited by | United States of America | Applicant |
| JP2012058842A | Cited by | Japan | Examiner |
| US7574622B2 | Cited by | United States of America | Applicant |
| US7613945B2 | Cited by | United States of America | Applicant |
Numbers
- Publication
- 7-200367
- Application
- 5349616
Titles2
- Japanese
- メモリ・スナップショット方法及びメモリ・スナップショット機能を持つ情報処理装置
- English
- [Title of the Invention] An information processing device having a memory snapshot method and a memory snapshot function.
Classification
- CPC, 1
- G06F11/1407
- IPC, 3
- G06F11 34
- G06F11 14
- G06F12 08