Image decoding display device

Description: TECHNICAL FIELD [Detailed description of the invention]

【0001】

[Industrial application field]

The present invention relates to an image decoding display device that decodes a compressed code of a moving image and displays the decoded moving image signal at the same time as a graphic, and in particular, synthesizes the moving image signal and graphic information in the same frame memory. The present invention relates to an image decoding display device for which the scale of the device has been reduced.

【0002】

[Conventional technology]

In a device that stores or transmits images and displays them on a screen, the extremely large amount of information of natural images has been an obstacle to economical storage and transmission. Therefore, a technique of compressing and encoding the amount of information in an image by using various methods is becoming common. In order to display this compressed coded signal, a procedure for decoding the code is required. The device for this is a compressed image decoding device. There is also a need to display characters and figures at the same time as natural images. Conventionally, in order to synthesize and display a natural image with characters and figures, it is necessary to provide a character figure drawing device, a compressed image decoding device, and a device for synthesizing both output images.

【0003】

FIG. 2 is an example of an image display device using a conventional image decoding device and a graphic drawing device. The character or figure drawing command 214 is given to the drawing device 200 via the CPU bus 216. The figure drawing device 200 specifies a position in the drawing frame memory 201 by the drawing frame memory address 203, writes the drawing frame memory data 202, and generates a figure. The generated figure is sent as a figure image signal 208 to the synthesizer 217 together with the figure image synchronization signal 209. On the other hand, the compressed image signal 215 is also given to the compressed image decoding device 204 through the CPU bus 216. After decoding the image, the compressed image decoding device 204 specifies the decoding frame memory address 207 in the decoding frame memory 205, reads out the decoding frame memory data 206, changes it, and writes it. The generated image is sent as a decoded image signal 210 to the synthesizer 217 together with the decoded image synchronization signal 211. The synthesizer synthesizes the graphic image signal 208 and the decoded image signal 210, and generates and outputs the output image signal 212 and the output image synchronization signal 213. As a result, the figure and the natural image are displayed on the same screen.

【0004】

[Problems to be Solved by the Invention]

In the conventional image processing apparatus, since the frame memory for drawing a figure and the frame memory for image decoding are provided separately, the number of parts at the mounting level increases. Further, in the conventional image processing device, a processing circuit that performs each unique processing of graphic drawing and image decoding is separately provided, but a graphic or an image is written (or read) to the frame memory by an instruction from each processing circuit. The frame memory control unit that performs control has overlapping parts having similar functions, such as including the address on the frame memory of a figure (or image) specified by the CPU in the instruction word.

【0005】

An object of the present invention is to reduce the number of parts at the mounting level by sharing a frame memory for drawing a figure and a frame memory for image decoding in the same frame memory, and to create an image or a figure on the frame memory. It is an object of the present invention to provide an image decoding display device having a small circuit scale by forming a series of circuits of the above on an integrated circuit of one chip.

【0006】

[Means for solving problems]

In order to achieve the above object, the image decoding display device of the present invention has a frame memory for synthesizing image information and graphic information, and a single frame memory connected via an address line and a data line. It is a signal processing unit configured on an integrated circuit, and includes a signal processing unit that synthesizes and controls image information and graphic information in response to a command from the central processing unit. The signal processing unit is the central processing unit. An instruction interpretation unit for interpreting an instruction received from, a graphic drawing processing unit for converting graphic information into pixels on a frame memory in response to an instruction from the instruction interpretation unit, and an instruction from the instruction interpretation unit. A compressed image code decoding unit for converting a compressed image code received from the central processing unit into pixels on the frame memory, and graphic information and image information created in a predetermined display area on the frame memory. A display control unit for reading a composite image in which Address conversion control is performed so that it is created in the work area, and the pixels of the image information created in the work area are transferred to the area corresponding to the address on the display area instructed by the central processing unit at a predetermined cycle. It is characterized in that it is composed of a frame memory control unit for performing control.

【0007】

[Action]

The above-mentioned frame memory control unit directly creates pixel signals from the graphic drawing processing unit such as geometric figures and characters without address conversion to the display area of the frame memory corresponding to the display screen, but compresses moving images and the like. The pixel signal from the image code decoding unit is created in a predetermined work area regardless of the address specified by the central processing unit, and is transferred to the display area based on the specified address after creation, so that the frame memory Even if there is only one, you can always get the completed composite image at each time on the display screen. However, a frame memory having a size larger than that of the conventional individual frame memory is required, but the number of address lines between the frame memory control unit and the frame memory is the same as in the conventional frame memory for images and frames for figures. Since it is much less than the address lines required for both memories, it is easy to integrate the signal processing unit at the mounting level. Further, by reducing the number of parts, it is possible to reduce the size of the entire device.

【0008】

[Example]

FIG. 1 shows an example of an image decoding display device according to the present invention. The portion surrounded by the dotted line in the figure is the signal processing portion 120. The image decoding display device according to the present invention comprises this and a frame memory 139. The operating principle of this example is shown below.

【0009】

Information is exchanged between this device and the outside through the CPU bus 101. External commands and image compression codes are stored in the command buffer 130 until they are processed. The instruction interpretation unit 131 reads the instructions in order from the instruction buffer 130, interprets them, and if it is a display control instruction 102 related to display control, it goes to the display control unit 134. If the decoding instruction 104 controls the decoding of the image code, the instruction is transferred to the compressed image decoding unit 135, and if the image code 117, the instruction is transferred to the image code buffer 132.

【0010】

The figure drawing unit 133 mainly generates geometric figures and characters according to the drawing command 103. Examples of commands included in drawing command 103 include drawing commands such as points, straight lines, curves, rectangles, circles, ellipses, and fills, parameters such as their colors, coordinates, and line thickness, and image data. There are transfer instructions, area movement / copying, transformation instructions, etc. that are directly exchanged with the CPU bus 101. The graphic drawing unit 133 calculates the pixels that need to be rewritten according to these commands, and sends the position to the frame memory control unit 137 as the drawing address 112. The frame memory control unit outputs the position corresponding to the frame memory 139 as the memory address 114, and reads out the memory data 113. This is used as reference image data 105, and is combined with the graphic data 106 generated by the graphic drawing unit in the arithmetic / logical operation unit 136 by arithmetic or logical operation, and sent to the frame memory control unit again. The frame memory control unit 137 writes this back to the frame memory as memory data 113. By the above operation, the drawing unit 133 generates characters and geometric figures in the frame memory.

【0011】

The display control unit 134 generates an image signal 109 and a synchronization signal 110 to be output to an external display device. The display control command 102 includes commands for turning on / off the display, setting the resolution, and setting the number of colors. The display control unit 134 has a synchronization signal generation unit inside, and generates a synchronization signal at the image resolution specified by the display control command. Based on this synchronization signal, the display address 108 is generated and sent to the frame memory control unit 137. The frame memory control unit reads the corresponding memory data 113 from the frame memory 139 and sends it to the display control unit 134 as display data 107. The display control unit 134 converts this into an image signal format and outputs it as an image signal 109. At this time, since the graphic and the decoded image are stored in the frame memory 139 in a combined state, they are also combined and displayed on the display device.

【0012】

The compressed image decoding unit 135 generates an image from the compressed coded code string. The compressed image decoding unit 135 reads the image code data 111 in order from the image code buffer 132 according to the decoding instruction 104, and decodes the image code data 111 according to the procedure described later. The decoding result of the image code and the portion of the image to be decoded from the decoding instruction 104 are calculated and designated as the decoding address 115 in the frame memory control unit 137. The frame memory control unit 137 reads the corresponding image data from the frame memory 139, passes through the filter 138 as the reference image data 105, sends it to the arithmetic / logical operation unit 136, and decodes the decoded image difference decoded by the compressed image decoding unit 135. Is combined with and sent to the frame memory control unit 137 again as a decoded image 118. The frame memory control unit 137 stores this in the frame memory 139. The image composition method in the arithmetic / logical operation unit 136 and the characteristics of the filter 138 are also specified by the control information attached to the image signal decoded by the compressed image decoding unit.

【0013】

Decoding the compressed image will be described in a little more detail. Image compression methods include methods that use quadrature conversion, methods that use vector quantization, and image frequency bands, as represented by H.261 standardized by CCITT and JPEG methods standardized by ISO. A method of dividing into and encoding each of them is already known. The present invention can be configured to support any one or more of these coding schemes. An example in which the H.261 method, which is a typical example of the moving image coding method, is adopted will be described below, but other methods can be similarly applied. FIG. 3 shows the details of the compressed image decoding unit 135 and its surroundings. The control unit 300 receives the decoding instruction 104, generates the decoding start signal 30, and specifies the memory position 39 for storing the image. The variable-length code analysis unit 301 extracts the quantized DCT coefficient 31 and the block attribute information 33, which are image information, from the column of the image code data 111 with reference to the code table 302. The block attribute information 33 includes information on the quantization index 34, the intra-frame / inter-frame coding selection information 35, the motion compensation vector 36, the block position 37, and the filter switch 38. In the inverse quantization 303, the quantization DCT coefficient 31 is inversely quantized according to the quantization index 34 to generate the DCT coefficient 32. The inverse DCT 304 reverse transforms the DCT coefficient 32 and outputs the decoded image difference 116. In-frame / inter-frame coding If the selection signal 35 indicates in-frame coding, the selector 306 selects the decoded image difference 116, and if it indicates inter-frame coding, filters to the decoded image difference 116 and the reference image 105. A signal to which the signal on which 138 is applied is added is selected and output as a decoded image 118. The address translation unit 307 generates a decoding address 115 indicating the decoding position from the memory position 39 in the frame memory given by the control unit 300 and the block position information indicating the block position in the decoded image. At this time, H.

【0014】

Figure 4 shows an example of image data arrangement on the frame memory and how to use it. In the present invention, the compressed image is decoded and the graphic drawing is performed on the shared frame memory. In the moving image coding method such as H.261, since the correlation in the time direction of the image is used, it is necessary to accumulate the past decoding frames on the decoding side as well. In the example of FIG. 4, in addition to the display portion 40 in the frame memory 139, the decoded old frame image 41 and the decoded new frame image 42 are stored. In decoding interpolation between frames, the decoded image difference 116 obtained by decoding the image code data 111 by the compressed image decoding unit 135 and the signal obtained by applying the filter 138 to the old frame image 41 are added 44 to the new frame image 42 storage area. Store. For addition 44, the arithmetic / logical operation unit 136 in FIG. 1 is used. To decode the image of the next frame, the new frame image 42 is newly used as the old frame image for interpolation between frames. When the decoding is completed, the block transfer is performed to a desired area in the display area. In many cases, the graphic display screen is represented by three primary colors, and the compression coding method is represented by color-luminance separation representation. Therefore, conversion is required to display the decoded image. This conversion is done by arithmetic operation 45. This also uses the arithmetic / logical operation unit 136 in FIG. At this time, the transfer is performed by the area movement function of the drawing unit 106. As a result, it is possible to transfer the figure to an arbitrary shape position while synthesizing it with the figure in the same manner as drawing the figure. At this time, in addition to the color, it is easy to change the size, aspect ratio, direction, etc. of the image.

【0015】

FIG. 5 shows some examples of command words given from the outside to the image decoding display device of the present invention. 50 is an example of a line drawing command which is one of the usual drawing commands. Command words are composed of a variable number of words. In the case of a line, following the line drawing instruction code indicating that it is a line drawing instruction, parameters such as the coordinates of the start point and the end point of the line, the color of the line, and the calculation method with the background are described. 51 is an instruction word created by the frame memory control unit, and is an example of a block transfer instruction for moving an image of one area on the frame memory to another area. In this case as well, following the transfer instruction code, parameters such as the coordinates of the transfer source area, the coordinates of the transfer destination area, and the logical operation method with the background are described. 52 is an example of an instruction for setting the decoding operation of the image compression code. This sets a new decoding channel, reserves an area of frame memory used for decoding, and specifies the decoding algorithm. This specifies parameters such as the decoding channel allocation number, the coordinates of the used frame memory area, and the decoding algorithm, following the decoding setting instruction code. The decoding channel number is a number assigned to distinguish and identify a plurality of images for each image when the images are decoded at the same time. The decoding algorithm specifies a plurality of coding methods when they correspond to each other. 53 is an example of an image decoding instruction. This describes the decoding channel number, the number of bits of the code included, and includes a variable-length image code string, following the image decoding instruction code. This instruction starts decoding of the code string included in the instruction.

【0016】

FIG. 6 is a configuration example of an image reproduction device to which the image decoding display device of the present invention is applied. This example has a configuration similar to that of a conventional small computer. The central arithmetic processing unit 600 controls the entire device through the bus 601. As a basic configuration, in addition to the central arithmetic processing unit 600, a main memory unit 602, a file control unit 603, a file device 605 controlled by the file control unit 604, an image decoding / playback device 607 according to the present invention, and a display device 608 are configured. Will be done. Except for the image decoding / playback device 607, the operation is the same as that of a normal small computer. By combining this with the image decoding display device 607 of the present invention, it becomes possible to easily display moving images and the like, which have been difficult to handle with a huge amount of information in the past. In addition, the image information can be stored in the file 605 in a compressed state, which saves the file capacity. Further, when reading and displaying, the data transfer speeds of the central arithmetic processing unit 600, the bus 601, the file control unit 603, and the file bus 604 can be reduced, and the burden can be reduced. In addition to this, by providing the communication interface unit 606 connected to the transmission line 611, it is possible to receive and display the compressed image from the outside. Further, by providing the image coding unit 609, the image information from the image input 610 is compressed and encoded and stored in the file device 605, transmitted from the communication interface unit 606 to the transmission line 611, or by the image decoding display device 607. It is also possible to decrypt and display it again.

【0017】

[Effect of the invention]

By implementing the present invention, the frame memory of the drawing unit and the image decoding unit and the control unit thereof can be shared, and the scale of the apparatus can be reduced. In addition, the degree of freedom in the form of synthesizing the graphic and the decoded image is improved, and the usability is improved.

[Simple explanation of drawings]

[Figure 1]

It is a block diagram of the image decoding display apparatus of this invention.

[Figure 2]

It is a block diagram of the image display apparatus which combined the conventional image decoding apparatus and the graphic drawing apparatus.

[Fig. 3]

It is a block diagram of the compressed image decoding part and its surroundings.

[Fig. 4]

It is a figure for demonstrating the storage arrangement of an image in a frame memory.

[Fig. 5]

It is a figure for demonstrating the example of the instruction word given from the outside to the image decoding display apparatus of this invention.

[Fig. 6]

It is a block diagram of the image reproduction apparatus which applied the image decoding display apparatus of this invention.

[Explanation of symbols]

101 ... CPU bus, 102 ... display control command, 103 ... drawing command, 104 ... decoding command, 105 ... reference image data, 106 ... graphic data, 107 ... display data , 108 ... Display address, 109 ... Image signal, 110 ... Sync signal, 111 ... Image code data, 112 ... Drawing address, 113 ... Memory data, 114 ... Memory address , 115 ... Decrypted address, 116 ... Decrypted image difference, 117 ... Image code, 118 ... Decrypted image, 120 ... Image decoding display device processing unit, 130 ... Instruction buffer, 131. .. instruction interpretation unit, 132 ... image code buffer, 133 ... drawing unit, 134 ... display control unit, 135 ... compressed image decoding unit, 136 ... arithmetic logic calculation unit, 137. .. Frame memory control unit, 138 ... filter, 139 ... frame memory, 200 ... drawing device, 201 ... drawing frame memory, 202 ... drawing frame memory data, 203 ... drawing Frame memory address, 204 ... compressed image decoder, 205 ... frame memory for decoding, 206 ... frame memory data for decoding, 207 ... frame memory address for decoding, 208 ... graphic image signal, 209 ... Graphic image synchronization signal, 210 ... Decoded image signal, 211 ... Decoded image synchronization signal, 212 ... Output image signal, 213 ... Output image synchronization signal, 214 ... Drawing command, 215 ... compressed image signal, 216 ... CPU bus, 217 ... synthesizer, 30 ... decoding start signal, 31 ... quantization DCT coefficient, 32 ... DCT coefficient, 33 ... Block attribute information, 34 ... quantization index, 35 ... intra-frame / inter-frame coding selection signal, 36 ... motion compensation vector, 37 ... block position, 38 ... filter switch signal, 39 ... memory position, 300 ... control unit, 301 ... variable length code analysis unit, 302 ... variable length code code table, 303 ... inverse quantization unit, 304 ... inverse DCT unit , 305 ...Adder, 306 ... Selector, 307 ... Address translator, 40 ... Display area in frame memory, 41 ... Old frame image area, 42 ... New frame image area, 43 .. Decoded image display area, 44 ... adder, 45 ... arithmetic arithmetic unit, 50 ... example of command word of line drawing command, 51 ... example of command word of block transfer command, 52 .. Example of command word of instruction to set decoding, 53 ... Example of command word of image decoding command, 600 ... Central arithmetic processing unit, 601 ... CPU bus, 602 ... Main memory unit, 603 ... file control unit, 604 ... file bus, 605 ... file device, 606 ... communication interface unit, 607 ... image decoding display device, 608 ... display device, 609 ... image Encoding unit, 610 ... image input, 611 ... transmission line.