Semiconductor pressure sensor and manufacture thereof
Abstract
(57) A summary and the purpose The present invention is a thing about the semiconductor pressure sensor which formed pressure-sensitive resistance in what pasted two semiconductor boards together and was used as one substrate, The variation in the thickness of a diaphragm is reduced and the variation in the pressure characteristic aims at miniaturizing few semiconductor pressure sensors easily. Composition The present invention pastes the two semiconductor boards 11 and 13 together with the oxide film 12 for the above-mentioned purpose, To one substrate 11 side, the isolation 16a and embedding Read 14b, 16b is formed, it forms so that the above-mentioned oxide film 12 may expose the diaphragm 19 to substrate 13 side of one of the two, and it is made to form so that the pressure-sensitive resistance 20 may be connected to above-mentioned one substrate 11 side of the bottom of the diaphragm 19 at above-mentioned embedding Read 14b.
Term
No projected expiry on record.
- Priority and filed
- Published
- Today
2 claims: 2 independent, 0 dependent
- 1[Claims] 1. A diaphragm provided so as to expose the oxide film on the side of the first semiconductor substrate of one substrate in which a first semiconductor substrate and a second semiconductor substrate are bonded via an oxide film. The pressure-sensitive resistance provided on the second semiconductor substrate side of the bottom surface of the diaphragm and the pressure-sensitive resistance are electrically connected to the embedded leads provided on the second semiconductor substrate. A featured semiconductor pressure sensor. 【特許請求の範囲】 【請求項1】 第1の半導体基板と第2の半導体基板とを酸化膜を介して接合した1つの基板の、前記第1の半導体基板側に前記酸化膜が露出するように設けられたダイアフラムと、該ダイアフラムの底面の前記第2の半導体基板側に設けられた感圧抵抗と、該感圧抵抗が前記第2の半導体基板に設けられた埋め込みリードと電気的に接続されていることを特徴とする半導体圧力センサ。
- 2(a) A first semiconductor substrate and a second semiconductor substrate are joined via an oxide film to form a single substrate, and at least a transistor or the like is electrically separated from the second semiconductor substrate. An isolation layer for forming an isolation layer, and a step of forming an embedded lead for making an electrical connection with a piezoresistive resistance formed in a subsequent process. (b) A step of forming a diaphragm on the second semiconductor substrate so that the oxide film is exposed. (c) A step of forming a pressure-sensitive resistor on the second semiconductor substrate side of the bottom surface of the diaphragm so as to be connected to the embedded lead. A method for manufacturing a semiconductor pressure sensor, which comprises the above steps. 【請求項2】 (a)第1の半導体基板と第2の半導体基板とを酸化膜を介して接合して1つの基板とし、前記第2の半導体基板に、少なくともトランジスタなどを電気的に分離するためのアイソレーション層、および後工程で形成する感圧抵抗と電気的接続をするための埋め込みリードとを形成する工程、 (b)前記第2の半導体基板に、前記酸化膜が露出するようにダイアフラムを形成する工程、 (c)前記ダイアフラムの底面の前記第2の半導体基板側に、前記埋め込みリードと接続するように感圧抵抗を形成する工程、 以上の工程を含むことを特徴とする半導体圧力センサの製造方法。
Independent claims2
63 paragraphs, as filed
Description: TECHNICAL FIELD [Detailed description of the invention]
【0001】
[Industrial application field]
The present invention relates to a semiconductor pressure sensor in which a pressure sensitive resistor is provided on a semiconductor substrate and a method for manufacturing the same.
【0002】
[Conventional technology]
Single crystal silicon is excellent as a semiconductor material for making various semiconductor devices, and as is well known, it has almost ideal high elasticity with no history of mechanical strain and stress characteristics, and Since a strain gauge (piezoresistive element) having a very high gauge factor can be easily built in the strain gauge (piezoresistive element) by diffusion of impurities, a compact and highly accurate semiconductor pressure sensor can be constructed. FIGS. 3 and 4 show conventional examples of such a semiconductor pressure sensor, respectively. Examples of documents are those disclosed in Japanese Patent Application Laid-Open No. 2-100372.
【0003】
In Example 1 of Fig. 3, a plurality of strain gauges 207, which are resistance layers, are first formed from the upper surface of the n-type single crystal silicon substrate 220 by diffusion of p-type impurities in an elongated strip-shaped pattern, and an oxide film is formed as shown in the figure. A connecting film 210 made of aluminum or the like is connected to both ends of each strain gauge 207 via a window of 205, and then the entire surface is covered with a protective film 211 such as a nitride film as usual. Although only two strain gauges 207 are shown in the figure, usually four strain gauges are constructed in such an arrangement that they form a square as a whole, and are bridge-connected via a connecting film 210. .. A window is opened on the multi-ended protective film 211 of the connecting film 210 to which one end is connected to each apex of the bridge, and a connection pad CP for connecting to an external circuit is provided as shown in the figure. ..
【0004】
Further, in the conventional example 2 shown in FIG. 4, the single crystal silicon substrate 330 is n-type as in the above-mentioned example, but has a high impurity concentration, and the p-type layer 331 is first formed on the surface thereof. After diffusing with a high impurity concentration, the epitaxial layer 332 is grown in an n-type, and a strain gauge 307 is built in it. In this example, integrated circuits 308 to 309 including transistors that amplify the detection signal are built. Is done.
【0005】
Therefore, the p-type separation layer 306 is deeply diffused from the surface of the n-type epitaxial layer 332 so as to reach the p-type layer 331 at a high impurity concentration, and it is formed in one of a plurality of semiconductor regions as described above. In addition, the circuit elements of the electronic circuit are built in the other semiconductor region, and at the same time, they are connected to the strain gauge 307 to supply a constant voltage or current to the bridge circuit, and the bridge circuit amplified by the electronic circuit. The signal can be taken out.
【0006】
As is well known, the etching portions 222 and 334 below the strain gauges 207 and 307 are diaphragms in the pressure sensor in both FIGS. 3 and 4.
【0007】
[Problems to be Solved by the Invention]
In any of the above-mentioned semiconductor pressure sensors, the high elasticity of single crystal silicon makes it possible to obtain a pressure detection value with good reproducibility, and the high gauge factor of the semiconductor strain gauge makes it possible to detect pressure with high sensitivity. The conventional example of FIG. 3 has a drawback that the pressure detection characteristics tend to vary.
【0008】
This is because it is difficult to accurately control the etching depth when the hole 222 is anisotropically etched on the substrate 220 of FIG. 3, and as a result, the thickness of the diaphragm tends to vary. As a matter of course, the variation becomes larger as the diaphragm 222 becomes deeper. Therefore, it is possible to suppress the variation to some extent by using a thin substrate 220 and reducing the etching depth. Since the metal thin film and the solder for connecting the base and the base are susceptible to thermal stress due to the difference in the coefficient of thermal expansion from silicon, the temperature dependence of the pressure detection characteristic becomes large.
【0009】
Further, in the conventional example of FIG. 4, the above-mentioned problem can be solved by using electrolytic etching for anisotropic etching of the diaphragm 334 on the substrate 330. Regarding this electrolytic etching, first, a chemical etching using a potassium hydroxide solution is performed to etch most of the thickness of the substrate 330, and finally, an electrolytic etching is performed using a boiling acid-based aqueous solution to perform etching as shown in the figure. It can be automatically stopped on the lower surface of the mold layer 331. That is, the p-type layer is formed by pn junction with the n-type substrate 330 when the etching reaches the lower surface of the p-type layer 331 by etching the substrate 330 with the electrolytic solution connected positively and negatively. Etching stops because no current flows through.
【0010】
As described above, in the conventional example of FIG. 4, even if a thick substrate 330 is used, the etching of the diaphragm 334 can be automatically stopped at the p-type layer 331 to control the thickness of the diaphragm with high accuracy. There is a problem that two steps are required and electrolytic etching takes a considerable amount of time. Further, crystal defects are likely to occur in the epitaxial layer 332 grown on the p-type layer 331 having a high impurity concentration, and when a strain gauge 307 is formed therein, the gauge of the gauge is due to the leakage current based on the crystal defects. Since the factor tends to decrease, there is a problem that the yield of the semiconductor pressure sensor decreases. Further, the same applies to the case of forming a circuit such as a transistor, and the withstand voltage value of the transistor and the current amplification factor tend to decrease due to crystal defects.
【0011】
In recent years, semiconductor pressure sensors equipped with electronic circuits as shown in FIG. 4 have begun to be manufactured, and along with this, miniaturization of the semiconductor pressure sensor unit is desired. However, even with any of the methods described above, since the strain gauge is formed before the diaphragm is formed when the diaphragm is miniaturized, the plane direction of anisotropic etching due to an off-angle error in the crystal direction of the wafer or the like. The shape of the diaphragm and the pattern of the strain gauge are misaligned because they are greatly affected by the variation of the diaphragm and the alignment error of adjusting the pattern of the diaphragm according to the pattern of the strain gauge 307. There is a problem that the pressure characteristic variation becomes large when the size is reduced.
【0012】
In the present invention, since the conventional diaphragm described above is formed after forming the pressure-sensitive resistance which is a strain gauge, the diaphragm and the strain gauge are displaced due to the influence of the deviation of the alignment and the crystal orientation, so that the diaphragm becomes particularly small. In order to eliminate the problem that the pressure characteristic variation becomes very large when it becomes, and the problem that the diaphragm thickness variation becomes large due to the variation in the etching rate of anisotropic etching and the pressure characteristic variation becomes very large. , Silicon dioxide film is used as a stop layer for anisotropic etching to reduce the thickness variation of the diaphragm, and after forming the diaphragm, a pressure sensitive resistance pattern that becomes a strain gauge is formed, so that it can be easily reduced in size. It is an object of the present invention to provide a semiconductor pressure sensor having a small variation in pressure characteristics.
【0013】
[Means for solving problems]
For the purpose described above, in the semiconductor pressure sensor, the present invention is formed by physically stopping the etching with an anisotropic etching stop layer such as silicon dioxide, and the stop layer side is matched with the diaphragm formed there. The pressure-sensitive resistance pattern is formed so as to be connected to the embedded lead formed at the same time as the isolation step provided in advance.
【0014】
[Action]
As described above, in the present invention, a diaphragm having suppressed thickness variation is first formed by using an oxide film as a stopper for anisotropic etching, and a pressure-sensitive resistance is formed on the anisotropically etched surface according to the shape of the diaphragm. Since the pressure-sensitive resistance and electrical connection are made at the same time as the isolation process, which is the basic process of the IC, the diaphragm can be made smaller and thinner, and at the same time, a semiconductor pressure sensor with less variation in pressure characteristics can be manufactured. Is possible.
【0015】
[Example]
1 and 2 are process sectional views of an embodiment of the present invention, which will be described in order below.
【0016】
First, as shown in FIG. 1 (a), an n-type or p-type single crystal silicon substrate 13 having a (100) or (110) plane orientation and an n-type single crystal silicon substrate having a (100) or (110) plane orientation. The substrate obtained by melting and bonding the silicon dioxide film 12 formed on each surface of 11 is optically polished until the n-type semiconductor substrate 13 has a predetermined thickness. Further, the bonded substrate may be an SOI substrate in which n-type single crystal silicon is epitaxially grown on the silicon dioxide film 12.
【0017】
As shown in FIG. 1 (b), the isolation layer 14a for electrically separating the transistor to be formed later on the n-type silicon 11 and the embedded lead layer 14b for electrically connecting the pressure sensitive resistance pattern. Boron diffused to a high concentration P<sup>+ </sup>Form a layer.
【0018】
Next, as shown in Fig. 1 (c), the above P<sup>+ </sup>The epitaxial layer 15 is formed by epitaxially growing n-type single crystal silicon on the surface on which the layer is formed. At this time, the total thickness A of the n-type silicon layer 11 and the epitaxially grown n-type silicon layer 15 is set to be the substantial thickness of the diaphragm. Next, boron is diffused on the surface of the epitaxially grown silicon by using a technique such as ion implantation or thermal diffusion, and a vertical type is used to electrically connect the separation layer 14a and the embedded lead 14b to the substrate surface. P<sup>+ </sup>Layers 16a and 16b are formed, respectively.
【0019】
Here, as shown in FIG. 1 (d), when the diaphragm is formed in the subsequent process, the thin portion is epitaxially grown in order to have a certain strength so as not to be deformed or broken by the stress applied in the subsequent process. A polysilicon layer 17a of about 100 μm is provided in advance on the surface of the single crystal silicon. Immediately after that, the silicon nitride film 18 that serves as a mask for anisotropic etching is formed to a thickness of about 2000 Å by the CVD (chemical vapor phase growth) method, and anisotropic etching is performed in consideration of the size of the diaphragm. The silicon nitride film 18 of the above is removed, and anisotropic etching is performed using an alkaline etching such as an aqueous potassium hydroxide solution. At this time, the anisotropic etching stops by forming a gap 19 at the portion of the silicon dioxide film 12, and the portion where the silicon dioxide film is exposed at the gap 19 becomes the diaphragm 19.
【0020】
Next, as shown in FIG. 2 (e), the silicon dioxide film 12 is exposed to the shape of the pressure-sensitive resistance pattern, which is a strain gauge, by photolithography and etching of the silicon dioxide film 12 exposed by anisotropic etching. Boron is diffused to a high concentration in the n-type silicon layer 11 to form a piezoresistive effect. When the sum of the diffusion depth of boron of the pressure sensitive resistor 20 formed at this time and the diffusion depth of boron of the embedded lead 14b formed in FIG. 1 (b) is made larger than the thickness of the n-type silicon layer 11, the pressure sensitive resistor 20 is formed. And the embedded lead 14b are electrically connected as shown in Fig. (E). After that, in order to prevent deformation and destruction of the diaphragm formed as described in FIG. 1 (d) in order to provide a transistor in the n-type epitaxial layer 15, the void 19 is filled with polysilicon 17b via a silicon dioxide film 21. After that, the polysilicon layer 17a formed on the n-type epitaxial layer 15 is removed.
【0021】
FIG. 2 (f) shows an electric circuit composed of transistors and the like by a known semiconductor process after removing the polysilicon layer 17a formed on the n-type epitaxial layer 15 as described above in the final embodiment of this embodiment. After the aluminum wiring 24 is provided, the passivation film 25a is formed. On the other hand, after removing the polysilicon 17b that filled the void 19, anisotropic etching is performed to protect the piezoresistive resistance 20 and to relieve the stress on the diaphragm by the passivation film 25a for protecting the electric circuit. A passivation film 25b is also provided on the surface of the surface by plasma CVD.
【0022】
[Effect of the invention]
As described in detail above, according to the present invention, (1) a diaphragm having suppressed thickness variation is first formed by using an oxide film as a stopper for anisotropic etching, and (2) an anisotropic etching surface. A pressure-sensitive resistance is formed according to the shape of the diaphragm, and (3) the diaphragm is made smaller and thinner because it is electrically connected to the pressure-sensitive resistance at the same time as the isolation process, which is the basic process of the IC. At the same time, it is possible to manufacture a semiconductor pressure sensor with small variation in pressure characteristics.
[Simple explanation of drawings]
[Figure 1]
Example of the present invention (No. 1).
[Figure 2]
Example of the present invention (No. 2).
[Fig. 3]
Conventional example # 1.
[Fig. 4]
Conventional example # 2.
[Explanation of symbols]
11, 13 Semiconductor substrate 12 Silicon dioxide film 14a, 16a isolation 14b, 16b embedded leads 18 Silicon nitride 19 Diaphragm 20 Piezoresistive resistance
Every citation, both ways
| Document | Relation | Office | Cited during |
|---|---|---|---|
| CN102365540A | Cited by | China | Search report |
| WO2010093502A2 | Cited by | World Intellectual Property Organization (WIPO) | International search |
| WO2010093502A3 | Cited by | World Intellectual Property Organization (WIPO) | International search |
| US7900521B2 | Cited by | United States of America | Applicant |
3 priority claims, no other members on record
Priority claims3
| Document | Office | Kind | Date |
|---|---|---|---|
| 565592 | Japan | A | |
| 4005655 | – | – | – |
| JP19920005655 | – | – | – |
Numbers
- Publication
- 5-190872
- Publication, DOCDB
- H05190872
- Publication, EPODOC
- JPH05190872
- Application
- 4005655
- Application, DOCDB
- 565592
- Application, EPODOC
- JP19920005655
Titles3
- English
- SEMICONDUCTOR PRESSURE SENSOR AND MANUFACTURE THEREOF
- English
- A semiconductor pressure sensor and its production method
- Japanese
- ????????????????????????
Classification
- CPC, 4
- B81C1/00246
- B81C2203/0728
- G01L9/0055
- Y10S438/978
- IPC, 5
- G01L9 04
- G01L9 00
- H01L21 302
- H01L21 3065
- H01L29 84