Photoelectric conversion device
Abstract
This record has no abstract on file.
Term
Term ended
Expired 2 July 2003, 23.2 years ago.
- Priority and filed
- Granted
- Expired
- Today
1 claim: 1 independent, 0 dependent
- 1【特許請求の範囲】 1 第1導電型の第1半導体領域と、前記第1導電型とは異なる第2導電型の第2半導体領域と、高抵抗半導体領域と、第1導電型の第3半導体領域と、第2導電型の第4半導体領域と、を有し、前記第1半導体領域と前記第2半導体領域とは隣接して配設されており、前記第3半導体領域と前記第4半導体領域とは隣接して配設されており、前記高抵抗半導体領域は前記第2半導体領域と前記第3半導体領域との間に配設されており、前記第1半導体領域と前記第2半導体領域と前記第3半導体領域と前記高抵抗半導体領域とで第1トランジスタを構成し、前記第2半導体領域と前記第3半導体領域と前記第4半導体領域と前記高抵抗半導体領域とで第2トランジスタを構成し、光励起により発生したエレクトロンとホールとで構成されるキヤリアのうち前記第2半導体領域と前記第3半導体領域のうちどちらか一方がホールを蓄積し、他方がエレクトロンを蓄積する光電変換装置であつて、前記第2半導体領域と容量結合された第1の電極と、前記第3半導体領域と容量結合された第2の電極と、を有し、該第2及び第3の半導体領域にそれぞれ蓄積されたエレクトロンとホールとに基づいて信号を読み出す為の読み出し手段を具備し、前記読み出し手段は、前記第2半導体領域と前記第3半導体領域とのそれぞれに、前記第1及び第2の電極により、前記第1及び第4半導体領域に対して独立的に電位を与え、前記第2半導体領域と前記第1半導体領域との接合部と、前記第3半導体領域と前記第4半導体領域との接合部とをそれぞれ順方向にバイアスし、前記信号を読み出す手段であることを特徴とする光電変換装置。
10 paragraphs, as filed
[Detailed Description of the Invention]
[Industrial Application] The present invention relates to the photoelectric conversion device which accumulates the career which started the photoelectric conversion device, especially occurred by optical incidence, and reads a signal based on the accumulated career.
[Description of the Prior Art] In recent years, research on a solid imaging device is positively done with progress of semiconductor technology to Photoelectric converter special, and, partly, is beginning to be put in practical use. If these solid imaging devices are roughly divided, they will be classified into two, a CCD type and a MOS type. A CCD type imaging device forms a potential well under a MOS capacitor electrode, accumulates the electric charge which occurred by incidence of light in this well, and is at the time of read-out, The principle of moving one by one by the pulse which applies these potential wells to an electrode, and transmitting and reading the accumulated electric charge to an output amplifier section is used. In a CCD type imaging device, a light sensing portion uses pn junction diode structure, and a transfer part also has a thing of the type of carrying out with CCD structure. On the other hand, a MOS type imaging device accumulates the electric charge which occurred by incidence of each light of the photo-diode which consists of pn junction which constitutes a light sensing portion, and is at the time of read-out, The principle of reading the electric charge accumulated by turning on the MOS switching transistor connected to each photo-diode one by one to an output amplifier section is used. Since only a capacity value of an electric charge detector which consists of floating diffusion in a final stage in view of noise which has a comparatively easy structure and may occur contributes to random noise, a CCD type imaging device is an imaging device of comparatively low noise. Low illumination photography is possible. However, since MOS type amplifier is formed into on-A tip as output amplifier from the process restrictions which make a CCD type imaging device, it is [ silicon and ] SiO.<sub>2</sub>The 1/f noise which stands out easily occurs on a picture from an interface with a film. Therefore, the limit exists in the performance, calling it low noise. Since the maximum charge quantity that can be accumulated in one potential well is decreased and it becomes impossible to take a dynamic range when the number of cells is made to increase and it becomes high-density, in order to attain high resolution-ization, it becomes a big problem when the solid imaging device will be high-resolution-ized from now on. the intermediary extremely bad in electric charge transmission stopping there, even if a defect exists in one of the cells since it divides and comes out who transmits the accumulation electric charge while a CCD type imaging device moves a potential well one by one -- it also has the fault that the end and the manufacture yield do not go up. On the other hand, although a MOS type imaging device is somewhat complicated structurally as compared with a CCD type imaging device, especially a frame transmission type device, it can be constituted so that accumulation capacity can be enlarged, and has the predominancy that a large dynamic range can be taken. Even if a defect exists in one of the cells, there will be no influence of the cell on others by the defect for a X-Y addressing scheme, and it will be advantageous in manufacture yield. However, since wiring capacity is connected to each photo-diode in this MOS type imaging device at the time of signal read-out, Very big signal voltage drops are generated and, in output voltage, the bottom is intermediary striped A result, There are mixing of the fixed pattern noise by the variation in the parasitic capacitance of that wiring capacity is large and generating of the random noise by this is large, each photo-diode, and the MOS switching transistor for a level scan, etc., As compared with the CCD type imaging device, low illumination photography has faults, such as a difficult thing. The size of each cell is reduced in high-resolution-izing of a future imaging device, and the accumulation electric charge decreases. On the other hand, even if decision pine To come wiring capacity makes line width thin from a chip size, it will seldom fall. For this reason, a MOS type imaging device becomes disadvantageous in S/N increasingly. As for a CCD type and a MOS type imaging device, though it has the above merits and demerits, You are getting closer is in a utilization level gradually. However, when advancing high resolution-ization needed in the future, it can be said that it essentially has a big problem. On the other hand, a new method is proposed by JP,56-150878,A "semiconductor imaging device", JP,56-157073,A "semiconductor imaging device", and JP,56-165473,A "semiconductor imaging device" about the solid imaging device. The method proposed here to accumulating the electric charge which the CCD type and the MOS type imaging device generated by optical incidence in a main electrode (for example, sauce of a MOS transistor), The electric charge which accumulated the electric charge which occurred by optical incidence in the control electrode (for example, the base of a bipolar transistor, SIT (static induction transistor), or the gate of a MOS transistor), and occurred by light, the new view of controlling the flowing current -- a basis -- it is a Sly thing. That is, a method proposed here reads an electric charge accumulated after carrying out electric charge amplification by an amplifying function of each cell to reading a CCD type, a MOS type, and the electric charge itself that were accumulated to the exterior. If a view is changed, it will read as a low impedance output by impedance conversion. Therefore, methods proposed here are high power, an extensive dynamic range, and low noise. And since a career (electric charge) excited by a lightwave signal is accumulated in a control electrode, it has some merits, like nondestructive readout is possible. It can be said that it is a method which has possibility also to future high-resolution-izing.
This method is a X-Y addressing scheme fundamentally, carrying out only [the technical issue which an invention tends to solve]. Element structure described in the above-mentioned gazette is making with basic composition what compounded amplification elements, such as a bipolar transistor and a SIT transistor, each cell of the conventional MOS type imaging device. Therefore, it is having comparatively complicated structure, and though it has the possibility of a raise in resolving, a limit exists in high resolving-ization as it is. The limit exists also in the point described below. Above-mentioned JP,56-150878,A, JP,56-157073,A, As for JP,56-165473,A, and "the application and the Institute of Television Engineers of Japan technical report (TV academic journal is called below)" to a SIT (Static Injection Transistor) image sensor, inner one of the artificers of the invention in this application shows the example of 1 representation of Engaged conventional technology. In JP,56-150878,A and JP,56-157073,A, it is N.<sup>+</sup>P<sup>+</sup>I (or P)<sup>-</sup>N<sup>-</sup>N<sup>+</sup>P of the Hook structure which consists of fields<sup>+</sup>N which accumulates an electric charge in a field and forms the capacitor between earth potentials<sup>+</sup>The composition of the method which reads the potential of a field by a switching transistor is indicated. However, in this composition, good read-out of linearity cannot be performed at high speed, but there is a limit also in sensitivity. On the other hand, in JP,56-165473,A, it is N.<sup>+</sup>P of a field and a floating state<sup>+</sup>N connected to the transparent electrode in which a field, a high resistance field, and pulse voltage are impressed<sup>+</sup>N which comprises a field<sup>+</sup>P<sup>+</sup>I (or P)<sup>-</sup>N<sup>-</sup>N<sup>+</sup>The Hook structure of the field is shown. And N of a floating state<sup>+</sup>N which the transistor turned on the field simultaneously at the time of one and the intermediary cage of the main electrode field of the transistor for read-out, and read-out operation, and was just charged<sup>+</sup>An electron flows into a field and it reads by making the voltage change into a signal. However, this cannot perform good read-out of linearity at high speed, either, but there is a limit also in sensitivity. And gate accumulation type Photocell and base accumulation type Photocell are shown in TV academic journal. Among these, gate accumulation type Photocell is composition which carries out reverse bias of the gate field to predetermined voltage beforehand via the refreshment line which passed the insulating film by changing a gate into a floating state, and it reads to the output circuit of sauce ground resistance load. On the other hand, base accumulation type Photocell is N.<sup>+</sup>P<sup>+</sup>N<sup>-</sup>N<sup>+</sup>The base (P) which has photo-transistor structure and it changed into the floating state<sup>+</sup>The collector (N) by whom voltage is impressed in pulse<sup>+</sup>The emitter (N) to which the output circuit of emitter Holoa including capacity and switching MOSFET was connected<sup>+</sup>it is come out and constituted. These cannot perform good read-out of linearity anyway at high speed, but there is a limit also in sensitivity. Aside from the above conventional technology, the output circuit of grounded emitter resistance load is connected to the transistor which provided the electrode in the base via the insulating layer at a U.S. Pat. No. 3624428 specification or JP,50-38531,B, The composition which uses reverse bias, performs accumulation operation and performs current read-out in the output circuit of the grounded emitter resistance load is shown in the base. However, after all, since it is current read-out of a destroyed type sensor, linearity and the afterimage characteristic are bad. It is not highly sensitive.
[Objects of the Invention] Also extremely to which the object of the present invention has an amplifying function in each cell -- it is an easy structure. It is in providing a photoelectric conversion device with which a career accumulation method which can also cope with future high resolution-ization enough was improved. The another object of the present invention is to provide the photoelectric conversion device excellent in rapidity [ that it is possible to acquire the good output signal of linearity very much for a short time to the light with which it was irradiated, and high / very / sensitivity ]. The 2nd electric conduction type 2nd semiconductor field which differs in this object from the 1st electric conduction type 1st semiconductor field and the above-mentioned 1st electric conduction type, It has a high resistance semiconductor field, the 1st electric conduction type 3rd semiconductor field, and the 2nd electric conduction type 4th semiconductor field, and the above-mentioned 1st semiconductor field and the above-mentioned 2nd semiconductor field adjoin, and are arranged. The above-mentioned 3rd semiconductor field and the above-mentioned 4th semiconductor field adjoin, and are allocated, The above-mentioned quantity resistance semiconductor field is allocated between the above-mentioned 2nd semiconductor field and the above-mentioned 3rd semiconductor field, The 1st transistor consists of the above-mentioned 1st semiconductor field, above-mentioned 2nd semiconductor field, above-mentioned 3rd semiconductor field, and an above-mentioned quantity resistance semiconductor field, The 2nd transistor consists of the above-mentioned 2nd semiconductor field, above-mentioned 3rd semiconductor field, above-mentioned 4th semiconductor field, and an above-mentioned quantity resistance semiconductor field, Either accumulates a hole among careers which comprise an electron generated by light excitation, and a hole among the above-mentioned 2nd semiconductor field and the above-mentioned 3rd semiconductor field, The 1st electrode by which capacitive coupling was carried out to Then and the above-mentioned 2nd semiconductor field with a photoelectric conversion device with which another side accumulates an electron, It has the 2nd electrode by which capacitive coupling was carried out to the above-mentioned 3rd semiconductor field, and provides a reading means for reading a signal based on an electron and a hole which were accumulated in the 2nd and 3rd semiconductor fields, respectively, The above-mentioned reading means gives potential independently to each of the above-mentioned 2nd semiconductor field and the above-mentioned 3rd semiconductor field to the above-mentioned 1st and 4th semiconductor field with the 1st and 2nd above-mentioned electrodes, and is a joined part of the above-mentioned 2nd semiconductor field and the above-mentioned 1st semiconductor field, Bias of the joined part of the above-mentioned 3rd semiconductor field and the above-mentioned 4th semiconductor field is carried out to a forward direction, respectively, and it is attained by photoelectric conversion device being a means which reads the above-mentioned signal.
[Function] According to the present invention, accumulating both the electrons as a career and holes which occur by light excitation, and making a gain increase, since it can read, high [ very ] sensitivity photoelectric conversion can be performed.
[Example] The outline of the suitable example of an embodiment by the present invention is explained below. The most characteristic composition is expressed by the example shown in Drawings 1 thru/or 13, and the example especially shown in Drawings 10 thru/or 13. The outline is explained as that for which the details are mentioned below, taking up Drawing 1 as the example first. n as the 1st semiconductor field [ in / in the NPN transistor as the 1st transistor shown with numerals 360 of Drawing 1 c / Drawing 1 b ]<sup>+</sup>n as field 7, p field 6 as the 2nd semiconductor field, and the 3rd semiconductor field<sup>+</sup>n as field 351 and a high resistance semiconductor field<sup>-</sup>It comprises field 5. PNP transistor 361 as the 2nd transistor is n as p field 6 and the 3rd semiconductor field as the 2nd semiconductor field.<sup>+</sup>p as field 351 and the 4th semiconductor field<sup>+</sup>n as field 350 and a high resistance semiconductor field<sup>-</sup>It comprises field 5. Here, p field 6 accumulates a hole among the careers which comprise an electron generated by light excitation, and a hole, and is n.<sup>+</sup>Field 351 accumulates an electron. In order to make easy below an understanding about the photoelectric conversion device by the present invention, the thing of the type which accumulates only a hole among the careers which comprise an electron and a hole first is explained including a peripheral circuit. First, reference of Drawings 14 and 15 connects the output circuit to one side (emitter) of the main electrode field of the photoelectric conversion cell containing a transistor as shown with numerals 30 of Drawing 14. this output circuit -- perpendicular line 38, 38', 38'', level shift register 39, MOS transistor 40, 40', and 40'', Comprising output line 41, MOS transistor 42, output transistor 44, and a load resistance 45 grade, perpendicular line 38, 38', and 38'' have wiring capacity like Cs respectively shown with numerals 21 of Drawing 15 as capacity load. It is I am taking about the circuit composition provided with perpendicular shift register 32, buffer MOS transistor 33, 33', 33'', terminal 34, level line 31, 31', and 31'' as a reading means for reading the signal by which photoelectric conversion was carried out based on the accumulated electric charge. At the time of accumulation operation, an emitter is grounded and bias of another main electrode field (collector) is carried out to right potential. Although it changes a control electrode field (base) into a reverse bias state to an emitter, saturation voltage can be determined by controlling the base potential at this time. In this way, a switching operation can be given to the cell itself if bias voltage is set up suitably. At the time of read-out operation, it changes an emitter into a floating state and bias of the collector is carried out to right potential. The potential is controlled by a reading means independently [ a control electrode field / a main electrode field ]. High-speed read-out can be performed, securing good linearity, if bias of the base is carried out to a forward direction to an emitter here. The operation at this time is explained with reference to Drawing 15. It is voltage V more positive than wiring 10 independently to the collector currently held at the emitter and the positive potential which are in a floating state at the time of read-out.<sub>R</sub>By carrying out bias of the base potential to a forward direction to emitter potential by impressing, bias of the emitter base joined part is deeply carried out to a forward direction. Thus, the time which current flows until emitter potential becomes equal to base potential, i.e., the accumulation voltage which occurred by light irradiation, but is required at this time is voltage V.<sub>R</sub>The linearity which was further shortened by Action and was excellent also in high-speed read-out is securable. The refreshment operation is as follows. an emitter -- MOS transistor 48 as a switching means, 48', and 48'' -- a ground sign -- with, it is connected and grounded in the 1st source of reference voltage shown. At this time, a collector is made into connection, i.e., right potential, or earth potentials in the 2nd source of reference voltage. The case where a collector is grounded here is shown in Drawing 16. In such a state, it is right potential V.<sub>RH</sub>even if there is no few But by impressing the becoming voltage and controlling the potential of the base as a control electrode field, the electric charge by which forward bias of between base emitters was carried out, and it was accumulated in base area and which was accumulated by carrying out hole flow appearance or an electron flowing in base area disappears. It comprises providing MOS transistor 48, 48', 48'', buffer MOS transistor 35 and 35', 35'', terminal 36, and 37 grades as an order bias means for giving such order bias. A drawing is used for below and the example of the present invention is described to it in detail. First, the basic structure of a photosensor cell and operation which constitute the photoelectric conversion device of point Stand up and the present invention in explanation of the photoelectric conversion device of the present invention are explained. Drawing 17 is a figure explaining the basic structure of a photosensor cell and operation which constitute the photoelectric conversion device concerning the present invention. Drawing 17 a shows the top view of a photosensor cell, Drawing 17 b shows the sectional view of the AA' portion of a The 17th figure a top view, and Drawing 17 c shows the equivalent circuit of that, respectively. In each part, the same number is given about the thing common to Drawing 17 a, b, and c. In Drawing 17, although the top view of the alignment arrangement method was shown, in order to make horizontal resolution high, it carries out [ Pixel ] and, of course, can arrange also to a method (interpolation arrangement method). As shown in Drawings 17 a and b, this photosensor cell dopes impurities, such as Lynn (P), antimony (Sb), and arsenic (As), and is n type or n.<sup>+</sup>Passivation membrane 2 which usually comprises a PSG film etc. on silicon substrate 1 used as the model; silicon oxide film (SiO)<sub>2</sub>Insulating oxide film 3 which changes; SiO for insulating electrically between the photosensor cells which become each other<sub>2</sub>Or Si<sub>3</sub>N<sub>4</sub>From etc -- n with low impurity density formed with the element isolation region 4; epitaxial technique etc. which comprise a becoming insulating film or a polysilicon film<sup>-</sup>Field 5; n used as the emitter of the bipolar transistor formed with the p field 6; impurity diffusion art used as the base of the bipolar transistor which doped impurities, such as boron (B), using for example, the impurity diffusion art or ion implantation art of a moreover, ion implantation art, etc.<sup>+</sup>Field 7; Wiring 8 formed with electric conduction materials, such as aluminum (aluminum) for reading a signal to the exterior, aluminum-Si, and aluminum-Cu-Si; Electrode 9 for impressing a pulse to p field 6 which let insulating film 3 pass and it changed into the floating state; wiring 10 of that; n with high impurity density formed with impurity diffusion art etc. in order to take ohmic contact at the back of substrate 1<sup>+</sup>Field 11; It comprises electrode 12; which gives the potential of a substrate, namely, is formed with electric conduction materials, such as aluminum for giving the collector potential of a bipolar transistor. 19 of Drawing 17 a is n.<sup>+</sup>It is a contact portion for taking connection of field 7 and wiring 8. The portions wiring 8 and wiring 10 of carry out alternation are what is called two-layer wiring and an intermediary cage, and SiO.<sub>2</sub>In the insulating field formed by the insulating material of etc, it is insulated mutually, respectively. namely, metaled two-layer wiring structure -- intermediary To have. Capacitor Cox13 of the equivalent circuit of Drawing 17 c comprises MOS structure of electrode 9, insulating film 3, and p field 6, and bipolar transistor 14 is n as an emitter.<sup>+</sup>n with field 7, p field 6 as a base, and small impurity density<sup>-</sup>n or n as field 5 and a collector<sup>+</sup>It comprises each portion of field 1. p field 6 is made to the floating field so that clearly from these drawings. The 2nd equivalent circuit of Drawing 17 c, Bipolar transistor 14 is expressed using junction capacity Cbe15 of a base emitter, pn junction diode Dbe16 of a base emitter, junction capacity Cbc17 of a base collector, and pn junction diode Dbc18 of a base collector. Here, the sign which originally shows the current source of two different direction which should be described as pn junction diode Dbe16 and pn junction diode Dbc18 in parallel as a representative circuit schematic is omitted. Hereinafter, the basic motion of a photosensor cell is explained using Drawing 17. Basic motion of this photosensor cell comprises: Electric charge accumulation operation by optical incidence, Read-out operation and refreshment operation. First, electric charge accumulation operation is explained. In electric charge accumulation operation, an emitter is grounded through wiring 8 and bias of the collector is carried out to right potential through wiring 12, for example. It shall change the base into a reverse bias state to negative potential, i.e., emitter 7, by impressing positive pulse voltage to capacitor Cox13 through wiring 10 beforehand. The operation which impresses a pulse to this Cox13 and carries out bias of the base 6 to negative potential is later explained in detail at the time of explanation of refreshment operation. In this state, if light 20 enters from the front side of a photosensor cell as shown in Drawing 17, a Retek TRON hole pair will occur in a semiconductor. Among this, since bias of the n field 1 is carried out to right potential, the electron is flowing into the n field 1 side, and as for the hole, intermediary Cause is rapidly accumulated in p field 6. The potential of p field 6 carries out intermediary change in Mukai gradually by accumulation to p field of this hole at right potential. Most acceptance surface undersurfaces of each sensor cell are occupied in p field even in Drawings 17 a and b, and it is n in part.<sup>+</sup>Field 7 and intermediary To have. The electron hole excited by light with a natural thing versus concentration is so large that it is close to the surface. For this reason, many electron hole pairs are excited by light also all over p field 6. It flows out of p field 6 immediately, without the electron by which light excitation was carried out all over p field re-joining together, and if it is made structure which is absorbed by n field, the hole excited in p field 6 will be accumulated as it is, and will change p field 6 in the right potential direction. The electron excited with light when the impurity density of p field 6 was made uniformly is diffusion, and are p field 6 and n.<sup>-</sup>pn with field 5<sup>-</sup>It flows to a joined part and is n after that.<sup>-</sup>a field -- Are joining -- it is absorbed by n collector region 1 by the drift by a strong electric field. Of course, if the run of the electron in p field 6 is constituted so that it goes to an inside from the surface, and the impurity density of p base may decrease although a line intermediary is also a good reason only in diffusion, they will be the other electric field Ed and Ed=1/W from an inside to the surface in a base by this impurity density difference.<sub>B</sub>- kT/q-lnN<sub>AS</sub>/N<sub>Ai</sub>It Occurred. It is here and is W.<sub>B</sub>As for a Boltzmann constant and T, in the depth from the optical incidence side surface of Is p field 6, and k, the absolute temperature and q are a unit electric charge and N.<sub>AS</sub>Surface impurity density of Is p base area 6, N<sub>Ai</sub>n of Is p field 6<sup>-</sup>It is the impurity density in an interface with high resistance field 5. It is here and is N.<sub>AS</sub>/N<sub>Ai</sub>If referred to as >3, a run of the electron in p field 6 will come to be performed by the drift rather than diffusion. namely, intermediary To have [ as ] in which the impurity density of p field 6 is carrying out Okay. reduction inside from the optical incidence side surface in order to operate effectively the career excited by light in p field 6 as a signal -- things are desirable. If p field 6 is formed by diffusion, the impurity density will decrease, so that it goes to an inside compared with the optical incidence side surface. The part under the acceptance surface of a sensor cell is n.<sup>+</sup>They are fortune-telling Being done by field 7. n<sup>+</sup>Since it is usually designed by about 0.2~0.3 micrometer or less than it, the depth of field 7 is n.<sup>+</sup>Since there is seldom much quantity of the light absorbed in field 7 from the first, it is so much satisfactory. However, to the light by the side of short wavelength, especially blue light, it is n.<sup>+</sup>Existence of field 7 causes a sensitivity fall. n<sup>+</sup>The impurity density of field 7 is usually 1x10.<sup>20</sup>cm<sup>-3</sup>It is designed more than a grade or it. n by which impurities were doped by such high concentration<sup>+</sup>The diffusion length of the hole in field 7 is about 0.15~0.2 micrometer. Therefore, n<sup>+</sup>It is n in order to pour effectively into p field 6 the hole by which light excitation was carried out in field 7.<sup>+</sup>the structure where Okay. impurity density decreases inside from an optical entrance surface also in field 7 -- intermediary To have -- things are desirable. n<sup>+</sup>The strong drift field by which impurity density distribution of field 7 goes to an inside from the above intermediary If you go and the optical incidence side surface occurs, and it is n.<sup>+</sup>The hole by which light excitation was carried out to field 7 flows into p field 6 immediately by a drift. n<sup>+</sup>n which exists in the optical incidence side surface side of a sensor cell if it is constituted so that each impurity density of field 7 and p field 6 may carry out Okay. reduction inside from the optical incidence side surface<sup>+</sup>All the careers by which light excitation was carried out in field 7 and p field 6 work effectively as a lightwave signal. By the impurity diffusion from a silicon oxide film or a polysilicon film which doped As or P to high concentration, it is this n.<sup>+</sup>n which has a desirable impurities inclination as stated above when field 7 is formed<sup>+</sup>It is possible to obtain a field. Eventually, base potential will change with accumulation of a hole to emitter potential, and it will change to earth potentials in this case, and will clip there. When it says more strictly, bias of between base emitters is deeply carried out to a forward direction, and the hole accumulated in the base clips on the voltage which begins to flow into an emitter. That is, the saturation potential of the photosensor cell in this case is an abbreviated Given reason in the potential difference of bias potential when bias of the p field 6 is first carried out to negative potential, and earth potentials. n<sup>+</sup>Field 7 is not grounded, but when accumulating the electric charge which occurred by an optical input in the floating state, p field 6 can accumulate an electric charge to n field 1 and abbreviated At the same potential. The above is explained somewhat concretely and quantitatively below, although it is a qualitative approximate account of electric charge accumulation operation. Spectrum sensitivity distribution of this photosensor cell is given with a following formula. S(lambda) =lambda/1.24, andexp(-alphax) x {1-exp (-alphay)} -T [A/W] However, lambda is a wavelength [mum] of light and alpha is damping coefficient [ of the light of a under / a silicon crystal ] [mum.<sup>-1</sup>Thickness of "deed layer" (insensible field) which ] and x cause the recombination loss in the semiconductor surface, and does not contribute to sensitivity [mum], The rate of the light volume which y receives the thickness [mum] of an epitaxial layer, and T receives transmissivity, i.e., the entering light volume, and enters into a semiconductor effectively in consideration of reflection etc. is shown, respectively. Photoelectric current Ip is calculated with a following formula using spectrum sensitivity S (lambda) and radiation illumination Ee (lambda) of this photosensor cell. Ip=integral<sup>infinity</sup><sub>0</sub>S (lambda), Ee (lambda), and dlambda[muA/cm<sup>2</sup>] However, radiation illumination Ee(lambda) [muW-cm<sup>-2</sup>- nm<sup>-1</sup>] is given with a following formula. Ee(lambda) =E<sub>V</sub>- P(lambda) /6.80integral<sup>infinity</sup>/<sub>0</sub>V(lambda) P(lambda) -dlambda [muW-cm<sup>-2</sup>- nm<sup>-1</sup>] However, E<sub>V</sub>The illumination [Lux] of the acceptance surface of a Is sensor, the spectral distribution of the light with which P (lambda) has entered into the acceptance surface of a sensor, and V (lambda) are the relative luminosity of man's eyes. When these formulas are used, it glares by A light source (2854 degrees K) in a photosensor cell with 4 micrometers of layers of Epi thickness and sensor acceptance surface illumination is 1 [Lux], it is about 280 nA/cm.<sup>-2</sup>The number of photons or the number of the generated electron hole objects which Photocurrent flows and enters is 1.8x10.<sup>12</sup>Ke/cm<sup>2</sup>- It is a sec grade. At this time, potential Vp which occurs when the hole excited by light is accumulated in a base is given by Vp=Q/C. Q is the charge quantity of the hole accumulated and C is the junction capacity adding Cbe15 and Cbc17. Now, n<sup>+</sup>It is the impurity density of field 7 10<sup>20</sup>cm<sup>-3</sup>It is the impurity density of p field 6 5x10<sup>16</sup>cm<sup>-3</sup>n<sup>-</sup>It is the impurity density of field 5 10<sup>13</sup>cm<sup>-3</sup>n<sup>+</sup>It is 16 micrometers about the area of field 7.<sup>2</sup>It is 64 micrometers about the area of p field 6.<sup>2</sup>n<sup>-</sup>It is 56 micrometers about the area in which junction capacity became about about 0.014 pF when the thickness of field 5 was 3 micrometers, and the number of the hole accumulated in p field 6 on the other hand pulled the area of electrodes 8 and 9 from 1/60 sec of accumulation time, and an effective acceptance surface product, i.e., the area of p field 6.<sup>2</sup>When it is a grade, it is 1.7x10.<sup>4</sup>It becomes Ke. Therefore, potential Vp which occurs by optical incidence will be about 190 mV. Although the light volume which what should be observed here is high-resolution-ized, and cell size is reduction-ized, and enters into per photosensor cell when at the time of It was decreases and both accumulation charge quantity Q decreases, Since junction capacity also decreases in proportion to cell size with reduction-izing of a cell, I hear that potential Vp which occurs by optical incidence is kept almost constant. This is because it is having very easy structure and the effective acceptance surface has a possibility that it can take very greatly, as optical Sansasael in the present invention shows in Drawing 17. As compared with the case of interline type CCD, here is one of the reasons with an advantageous photoelectric conversion device in the present invention, Since the area of a transfer part will become large relatively and effective acceptance surfaces will decrease in number for this reason if it is going to secure the charge quantity to transmit with an interline type CCD type imaging device with resolution[ optical ]-izing, sensitivity, i.e., the generating voltage by optical incidence, will decrease. With an interline type CCD type imaging device, In a photosensor cell [ in / to that of intermediary Cause / saturation voltage is restricted by the size of a transfer part, and it is falling rapidly, and / the present invention ], As written also in advance, saturation voltage is decided by bias voltage when bias of the p field 6 is first carried out to negative potential, and big saturation voltage can be secured. The operation which reads to the exterior the voltage which occurred by the electric charge accumulated in p field 6 as mentioned above is explained below. In a read-out operating state, an emitter and wiring 8 are held at collector positive potential Vcc at a floating state. An equivalent circuit is shown in Drawing 15. Here, the sign which originally shows the current source of two different direction which should be described as pn junction diode Dbe16 and pn junction diode Dbc18 in parallel as an equivalent circuit is omitted. Potential before irradiating with light now, when bias of the base 6 is carried out to negative potential - V<sub>B</sub>It is V about the accumulation voltage which was carried out and occurred by light irradiation.<sub>P</sub>Base potential is -V when carrying out it.<sub>B</sub>+V<sub>P</sub>the becoming potential -- intermediary To have. It reads to electrode 9 through wiring 10 in this state, and is positive voltage V of business.<sub>R</sub>When it impresses, it is this positive potential V.<sub>R</sub>Capacity division is carried out by Is an oxide film Cox13, base-emitter junction capacity Cbe15, and base-collector junction capacity Cbc7, and it is voltage Cox/Cox+Cbe+Cbc-V in a base.<sub>R</sub>It Is added. Therefore, base potential - V<sub>B</sub>-V<sub>P</sub>+ Cox/Cox+Cbe+Cbc-V<sub>R</sub>It becomes. It is here and is -V.<sub>B</sub>+ Cox/Cox+Cbe+Cbc-V<sub>R</sub>=0 Accumulation voltage V which generated base potential by light irradiation when it was made for the becoming conditions to be satisfied<sub>P</sub>It becomes the very thing. thus -- when bias of the base potential is carried out for Masakata to emitter potential, an electron is poured into a base from an emitter -- collector potential -- right potential -- it is that of intermediary To have, and a drift field accelerates and a collector is reached. The current which flows at this time is given with a following formula. i=A<sub>j</sub>- q-Dn-n<sub>pe</sub>/W<sub>B</sub>(1+lnN<sub>Ae</sub>/N<sub>Ac</sub>x{expq/kT (V)<sub>P</sub>-V<sub>e</sub>)-1} However, A<sub>j</sub>The bonded surface product between Is base emitters and q are unit charge quantity (1.6x10).<sup>-19</sup>Coulomb, D<sub>o</sub>The diffusing constant of the electron in a Is base, n<sub>pe</sub>Electron concentration as a a small number of carrier in the emitter end of a Is p base, W<sub>B</sub>Is base width, N<sub>Ae</sub>Emitter single Acceptor in concentration of a Is base, N<sub>Ac</sub>As for the Acceptor concentration in the collector end of a Is base, and k, a Boltzmann constant and T are the absolute temperature and V.<sub>e</sub>It is Is emitter potential. This current is emitter potential V.<sub>e</sub>But base potential, i.e., accumulation voltage V which occurred by light irradiation here<sub>P</sub>Flowing is clear from an upper type until it is alike and becomes equal. At this time, it is emitter potential V.<sub>e</sub>Changes in time is calculated with a following formula. Cs-dV<sub>e</sub>/dt=i=A<sub>j</sub>- q-Dn-n<sub>pe</sub>/W<sub>B</sub>(1+lnN<sub>Ae</sub>/N<sub>AC</sub>x{expq/kT (V)<sub>P</sub>-V<sub>e</sub>)-1} However, wiring capacity Cs is capacity 21 which wiring 8 connected to the emitter has here. Drawing 18 shows an example of time change of the emitter potential calculated using the upper type. In order for emitter potential to become equal to base potential according to Drawing 18, about about 1 second will be required. This is emitter potential V.<sub>e</sub>ButV<sub>P</sub>If it is alike and becomes near, it originates in current seldom flowing. Therefore, a means to solve this is right voltage V to electrode 9 previously.<sub>R</sub>It is -V when impressing.<sub>B</sub>+ Cox/Cox+Cbe+Cbc-V<sub>R</sub>=0 Although the becoming conditions were set up, it is a substitute of this condition. - V<sub>B</sub>+ Cox/Cox+Cbe+Cbc-V<sub>R</sub>=V<sub>Bias</sub>The becoming conditions are put in and it is V about base potential.<sub>Bias</sub>Only and the method of carrying out bias to a forward direction too much can be considered. The current which flows at this time is given with a following formula. i=A<sub>j</sub>- q-Dn-n<sub>pe</sub>/W<sub>B</sub>(1+lnN<sub>Ae</sub>/A<sub>AC</sub>x{expq/kT (V)<sub>P</sub>+V<sub>Bias</sub>-V<sub>e</sub>)-1} To Drawing 19 a, it is V.<sub>Bias</sub>= V which was being impressed to electrode 9 after a certain definite period of time when referred to as 0.6V<sub>R</sub>Accumulation voltage V at the time of returning to a zero bolt and making it stop the flowing current<sub>P</sub>It is alike and the relation of the receiving read-out voltage, i.e., emitter potential, is shown. However, in Drawing 19 a, read-out voltage is plotting the value which put and pulled a part for the wooden clogs, although the fixed potential depending on the read-out time by a bias voltage ingredient is certainly added. Right voltage V currently impressed to electrode 9<sub>R</sub>Contrary to [ when it returns to a zero bolt ] the time of impressing, it is -Cox/Cox+Cbe+Cbc-V.<sub>R</sub>Since the becoming voltage is added to base potential, base potential is right potential V.<sub>R</sub>(A state, i.e., -V, before impressing)<sub>B</sub>It comes to be alike, and since reverse bias is carried out to an emitter, a current flow stops. According to Drawing 19 a, it is the read-out time for about 100 ns or more (namely, V).<sub>R</sub>If the time currently impressed to electrode 9 is taken, it will be accumulation voltage V.<sub>P</sub>It reads, and cotton intermediary linearity is secured to the range of about 4 figures, and voltage shows that high-speed read-out is possible. Accumulation voltage V which occurred to p field 6 although a 45-degree line is a result at the time of spending sufficient time for read-out in Drawing 19 a, capacity Cs of wiring 8 was 4 pF in the above-mentioned example computation and this was about 300 times large as compared with 0.014 pF of the junction capacity of Cbe+Cbc<sub>P</sub>But -- Drawing 19 a shows that any attenuation is not responded to, either and it is read by the effect of bias voltage at very high speed. The amplifying function which the photosensor cell which requires this for the above-mentioned composition has, i.e., an electric charge amplifying function, is from Working effectively. On the other hand, with the conventional MOS type imaging device, it is accumulation voltage V.<sub>P</sub>In Is and such a read-out process, it is influence of wiring capacity Cs, and is Cj-V.<sub>P</sub>becoming / (Cj+Cs) (however, Cj pn junction capacity of the light sensing portion of a MOS type imaging device), and reading about double figures -- a voltage value -- the bottom -- intermediary stripes -- I might be unacquainted and it had a fault. For this reason, in the problem that a S/N ratio cannot be taken, in a MOS type imaging device, Oh greatly the random noise which occurs according to it being large, the fixed pattern noise by variation or wiring capacity, i.e., the output capacity, of parasitic capacitance of a switching MOS transistor for reading to the exterior, In the photosensor cell of composition of that Drawing 17 a, b, and c shows, It is possible for the accumulation voltage itself which occurred to p field 6 to be read outside, for fixed pattern noise and the random noise resulting from output capacity to become small relatively, since this voltage is quite large, and to acquire a signal with a very sufficient S/N ratio. Previously, it is bias voltage V.<sub>Bias</sub>When it was set as 0.6V, it was shown that the linearity of about 4 figures is acquired in high-speed read-out time which is about 100 ns, but it is this linearity and read-out time, and bias voltage V.<sub>Bias</sub>The result of having calculated connection of is shown in Drawing 19 b in more detail. In Drawing 19 b, a horizontal axis is bias voltage V.<sub>Bias</sub>Come out, and it is and a vertical axis is intermediary To have in read-out time. The parameter shows time dependency until it becomes 80% whose read-out voltage is 1 mV, 90%, 95%, and 98%, when accumulation voltage is 1 mV. As shown in Drawing 19 a, in the accumulation voltage of 1 mV, it is clear [ at the time of intermediary To have ] 80%, 90%, and 95% respectively that the still better value is shown in the accumulation voltage beyond it 98%. According to this Drawing 19 b, it is bias voltage V.<sub>Bias</sub>In But 0.6V, as for it being 0.54 microsecond and 98% to become 0.27 microsecond and 95%, it is understood that it is 1.4 microseconds that read-out time will be 0.12 microsecond and 90% that read-out voltage turns into 80% of accumulation voltage. Bias voltage V<sub>Bias</sub>If it is made larger than 0.6V, it is shown that high-speed read-out is possible. Thus, bias voltage V needed when it reads from the design of the whole imaging device and time and required linearity are determined<sub>Bias</sub>It can determine by using the graph of But 19th figure b. Another advantage of the photosensor cell concerning the above-mentioned composition is that read-out is nondestructively possible from the hole accumulated in p field 6 having the very small re-joint establishment of an electron and a hole in p field 6. Namely, voltage V which was being impressed to electrode 9 at the time of read-out<sub>R</sub>When it returns to a zero bolt, the potential of p field 6 is voltage V.<sub>R</sub>Accumulation voltage V which changed into the reverse bias state before impressing, and occurred by light irradiation<sub>P</sub>Unless it is newly irradiated with light, it is saved [ Is and ] as it is. This means that a new function can be provided on a system action, when the photosensor cell concerning the above-mentioned composition is constituted as a photoelectric conversion device. It is accumulation voltage V to this p field 6.<sub>P</sub>The greatest reserve time in which time to be able to hold is very long receives restriction rather according to the dark current which occurs thermally in the depletion layer of junction. That is, it is because a photosensor cell will be saturated according to this dark current that occurs thermally. However, n whose Wide of a depletion layer of the photosensor cell concerning the above-mentioned composition is a low impurity density field in an intermediary To have field<sup>-</sup>It is field 5 and is this n.<sup>-</sup>Field 5 is 10.<sup>12</sup>cm<sup>-3</sup>~10<sup>14</sup>cm<sup>-3</sup>A grade and since impurity density is very low, the crystallinity is good and there are few electron hole pairs which occur thermally as compared with a MOS type and a CCD type imaging device. For this reason, dark current is small as compared with other conventional devices. That is, the photosensor cell concerning the above-mentioned composition is essentially having small structure of dark current noise. Subsequently, the operation refreshed for the electric charge accumulated in p field 6 is explained. As the photosensor cell concerning the above-mentioned composition already described, the electric charge accumulated in p field 6 does not carry out disappearance in read-out operation. For this reason, in order to input optical new information, it needs to be refreshment operated for extinguishing the electric charge accumulated before. It is necessary to electrify simultaneously the potential of p field 6 which it is in the floating state in predetermined negative voltage. In the photosensor cell concerning the above-mentioned composition, when refreshment operation as well as read-out operation impresses right voltage to electrode 9 through wiring 10, it carries out. At this time, an emitter is grounded through wiring 8. The collector uses grounding or right potential through electrode 12. The equivalent circuit of refreshment operation is shown in Drawing 16. However, the example in the state where the collector side was grounded is shown. It is in this state and is right voltage V.<sub>RH</sub>When the becoming voltage is impressed to electrode 9, in base 22, it is Cox/Cox+Cbe+Cbc-V by capacity division of oxide film capacity Cox13, base-emitter junction capacity Cbe15, and base-collector junction capacity Cbc17.<sub>RH</sub>The becoming voltage is built in instant like the time of pre- read-out operation. With this voltage, forward bias of junction diode Dbe16 between base emitters and junction diode Dbc18 between base collectors will be carried out, they will be in switch-on, current begins to flow, and base potential falls gradually. At this time, change of potential V of the base in a floating state is approximately denoted by a following formula. (Cbe+Cbc)dV/dt=-(i<sub>1</sub>+i<sub>2</sub>) However, i<sub>1</sub>=Ab(qD<sub>P</sub>p<sub>oe</sub>/Lp+qD<sub>o</sub>n<sub>pe</sub>/W<sub>B</sub>) x {exp(q/kTV)-1} i<sub>2</sub>=AeqD<sub>o</sub>n<sub>pe</sub>/W<sub>B</sub>x {exp(q/kTV)-1} i<sub>1</sub>Current, i which flow through Is diode Dbc<sub>2</sub>It is current which flows through Is diode Dbe. A<sub>b</sub>The diffusing constant of being able to set a Is base surface product and Ae in emitter area, and there being a hole [ Dp ] in a collector, p<sub>oe</sub>The hole concentration of the thermal equilibrium state in a Is collector, the average free path of the hole [ Lp ] in a collector, n<sub>pe</sub>It is the electron concentration in the thermal equilibrium state in a Is base. i<sub>2</sub>It comes out, and since the impurity density of an emitter is high enough compared with the impurity density of a base, the current by hole pouring to an emitter from the base side can be disregarded. A formula shown above is a thing of stage junction approximation, and has shifted from stage junction by actual day bus. Since thickness of a base has complicated concentration distribution thinly, it is not strict, but remarkable approximation can explain refreshment operation. Current i which flows among the base collectors in an upper type<sub>1</sub>Inside of of, q-Dp-p<sub>oe</sub>/Lp shows the current by a hole, i.e., the ingredient of which a hole flows out of a base into the collector side. In the photosensor cell which starts the above-mentioned composition so that it may be easy to flow through the current by this hole, a collector's impurity density is somewhat designed by slight lowness as compared with the usual bipolar transistor. An example of the time dependency of the base potential calculated using this formula is shown in Drawing 20. A horizontal axis is refreshment voltage V.<sub>RH</sub>A vertical axis shows base potential, respectively, the time progress, i.e., the refresh time, from the moment of being impressed by Is an electrode 9. Initial potential of the base is made into the parameter. The initial potential of a base is refreshment voltage V.<sub>RH</sub>It is the potential which the base which is in a floating state at The moment when shows, and is V.<sub>RH</sub>It is decided by the electric charge accumulated in Cox, Cbe, Cbc, and a base. When seeing this Drawing 20, the potential of the base was not based on initial potential, but it was always made one straight line on the semilogarithmic graph after a certain time progress, but the bottom of an intermediary is intermediary To go. The experimental value of the base electrical change to refresh time is shown in Drawing 20 b. Since the test device used in this experiment has the quite large dimension as compared with the example computation shown in Drawing 20 a, although that absolute value is not in agreement, it is proved to be example computation that the base electrical change to refresh time is changing linearly on a semilogarithmic graph. This example of an experiment shows the value when a collector and both of an emitter are grounded. Accumulation voltage V by now and light irradiation<sub>P</sub>They are 0.4 [V]s and refreshment voltage V about Maximum value of.<sub>RH</sub>When voltage V which is alike and is impressed more to a base is made into 0.4 [V]s, as shown in Drawing 20, the maximum of initial base potential serves as 0.8 [V]s, and is 10 after refreshment voltage impression.<sup>-15</sup>[sec] Behind, According to base potential begins to fall in a straight line, and it is 10.<sup>-5</sup>[sec] Behind, when light does not hit, it is in agreement with an electrical change in case initial base potential is 0.4 [V]s. In p field 6, two kinds of methods are one of a certain methods which will be charged in negative potential if time impression is carried out and the right voltage is removed about right voltage through MOS capacitor Cox. One is operation in which a minus electric charge is accumulated, when a hole with positive charge flows out of p field 6 into n field 1 which is mainly in a grounding state. In order for a hole to flow into a target from p field 6 on the other hand to n field 1 and to keep the electron of n field 1 from flowing in in p field 6 not much, impurities density of p field 6 may be made higher than the impurities density of n field 1. On the other hand, it is n.<sup>+</sup>When the electron from field 7 or n field 1 flows into p field 6 and re-combines with a hole, operation which accumulates a minus electric charge in p field 6 can also be performed. In this case, the impurities density of n field 1 is made more highly than p field 6. When a hole flows out of p field 6, an electron flows into p field 6 base and the direction of the operation which a minus electric charge accumulates re-combines with a hole, it is farther [ than the operation which a minus electric charge accumulates ] quick. However, according to the old experiment, it is checked that the refreshment operation which pours an electron into p field 6 also shows a time response quick enough to operation of a photoelectric conversion device. When a large number can be located in a line in the XY direction in the photosensor cell which grows into the above-mentioned composition and a photoelectric conversion device is constituted, it is accumulation voltage V in each sensor cell by a picture.<sub>P</sub>Although it differs in Is and the above-mentioned example between 0~0.4 [V]s, it is refreshment voltage V.<sub>RH</sub>After-impression 10<sup>-5</sup>Accumulation voltage V by a picture although the fixed voltage about about 0.3 [V] remains in [sec] in the base of all the sensor cells<sub>P</sub>It turns out that the amount of [ all ] change of disappears. With namely, the photoelectric conversion device by the photosensor cell concerning the above-mentioned composition, (The example of Drawing 20 a taking 10 [sec] at this time) with the full refreshment mode which brings the base potential of all the sensor cells to a zero bolt by refreshment operation, accumulation voltage V of that by which a certain fixed voltage remains in base potential<sub>P</sub>Two of the transitional refreshment modes in which the fluctuation components boiled and depended disappear exist (at the example of Drawing 20 a, it is a refreshment pulse of 10[musec]~10 [sec] at this time). At the above example, it is refreshment voltage V.<sub>RH</sub>Voltage V which is alike and is impressed more to a base<sub>A</sub>Although it was considered as 0.4 [V], it is this voltage V.<sub>A</sub>At very high speed, if it is considered as 0.6 [V], according to Drawing 20, the above and transitional refreshment mode can be started by 1 [nsec], and can be refreshed. Selection of whether it is made to operate in full refreshment mode or to make it operate in transitional refreshment mode is determined by the purpose of using a photoelectric conversion device. It is V about the voltage which remains in a base in this transitional refreshment mode.<sub>K</sub>When it carries out, it is refreshment voltage V.<sub>RH</sub>After impression, V<sub>RH</sub>In the transient state of the moment of returning to a zero bolt, it is -Cox/Cox+Cbe+Cbc-V.<sub>RH</sub>Base potential after the refreshment operation by a refreshment pulse since the becoming negative voltage is added to a base V<sub>K</sub>- Cox/Cox+Cbe+Cbc-V<sub>RH</sub>A next door and a base will be in a reverse bias state to an emitter. Although explanation that a base was performed in the state of reverse bias in the state of accumulation was given at the time of the accumulation operation which accumulates the career previously excited by light, refreshment and two operations of bringing a base to a reverse bias state are simultaneously performed by this refreshment operation. It is refreshment voltage V to Drawing 20 c.<sub>RH</sub>Base potential V after the refreshment operation which is alike and receives<sub>K</sub>- Cox/Cox+Cbe+Cbc-V<sub>RH</sub>The experimental value of change of is shown. It is [ 5 to 100 pF, and ] intermediary To have about the value of Cox as a parameter. A round mark is an experimental value and a solid line is V.<sub>K</sub>- Cox/Cox+Cbe+Cbc-V<sub>RH</sub>The calculated value calculated more is shown. At this time V<sub>K</sub>= It is 0.52V and is Cbc+Cbe=4pF. However, the Pro-G capacity of 13 pF of the oscilloscope for observation is connected in parallel with Cbc+Cbe. Thus, the calculated value and the experimental value are completely in agreement, and, also experimentally, refreshment operation is checked. In the above refreshment operation, as shown in Drawing 16, the example when the collector was grounded was explained, but it is also possible to perform a collector, where right potential is used. Even if junction diode Dbc18 between base collectors is impressed to a refreshment pulse at this time, Since it continues being non-switch-on when the right potential currently impressed to the collector is larger than the potential impressed to a base by this refreshment pulse, current flows only through junction diode Dbe16 between base emitters. For this reason, although the fall of base potential becomes what was slowly made more relative than the time of grounding a collector, high-speed refreshment operation completely same with having explained above fundamentally is performed. That is, the straight line of slant when the base potential of Drawing 20 a falls will shift the relation of the base potential to the refresh time of Drawing 20 a in right-hand side one, i.e., the direction which time requires more. Therefore, the same refreshment voltage V as the time of grounding a collector<sub>RH</sub>Although Use and refreshment will take time, it is refreshment voltage V.<sub>RH</sub>High-speed refreshment operation is possible like the time of grounding small higher The and a Leave collector. The above is explanation of the basic motion of the photosensor cell concerning the above-mentioned composition which consists of the electric charge accumulation operation by optical incidence, read-out operation, and refreshment operation. As explained above, basic structure of a photosensor cell concerning the above-mentioned composition is a very easy structure as compared with JP,56-150878,A, JP,56-157073,A, and JP,56-165473,A which were already raised. While being able to respond to future high resolution-ization enough, merits which come from an amplifying function which are those outstanding features it has, such as low noise, high power, an extensive dynamic range, and nondestructive readout, are saved as they are. Next, the photosensor cell concerning the composition explained above is explained using a drawing about the example of 1 composition of the photoelectric conversion device of the present invention arranged and constituted in two dimensions. The circuit lineblock diagram of a photoelectric conversion device which arranged basic photosensor cell structure to 3x3 in two dimensions is shown in Drawing 14. Basic photosensor cell 30 (the collector of the bipolar transistor shows that it is connected to a substrate and a substrate electrode at this time.) surrounded by the already explained dotted line, Level line 31 for impressing a read-out pulse and a refreshment pulse, 31', 31'', Read-out pulse Terminal 34 for impressing a pulse to the gate of perpendicular shift register 32 for making it generate, perpendicular shift register 32, buffer MOS transistor 33 between level line 31, 31', and 31'', 33', and 33'', and a refreshment pulse Buffer MOS transistor 35 for impressing, 35', 35'', Perpendicular line 38 for reading accumulation voltage from terminal 36 for impressing a pulse to the gate of that, terminal 37 for impressing a refreshment pulse, and basic photosensor cell 30, 38', 38'', MOS transistor 40 for gates for opening and closing level shift register 39 and each perpendicular line which generate the pulse for choosing each perpendicular line, 40', 40'', MOS transistor 42 for refreshing the electric charge accumulated in the output line after output line 41 for reading accumulation voltage to an amplifier part, and read-out, The bipolar for amplifying terminal 43 for impressing a refreshment pulse to MOS transistor 42, and an output signal, MOS, FET, Set in terminal 46 for connecting transistor 44, load resistance 45, a transistor, and power supplies, such as J-FET, output terminal 47 of a transistor, and read-out operation. This photoelectric conversion device is constituted by terminal 49 for impressing a pulse to the gate of MOS transistor 48 for refreshing the electric charge accumulated in perpendicular line 40, 40', and 40'', 48', 48'', MOS transistor 48, 48', and 48''. Operation of this photoelectric conversion device is explained using the pulse timing figure showing in Drawings 14 and a 21. In Drawing 21 a, section 61 corresponds to refreshment operation, section 62 corresponds to accumulation operation, and section 63 corresponds to read-out operation, respectively. Time t<sub>1</sub>Although it is alike, it sets and substrate potential, i.e., collector potential 64 of a photosensor cell part, is maintained at earth potentials or right potential, Drawing 21 a shows what is maintained at earth potentials. As earth potentials or right potential already explained anyway, the time which refreshment takes is only different intermediary come, and it is changeless to basic motion. Potential 65 of terminal 49 is in a high state, MOS transistor 48, 48', and 48'' are maintained at switch-on, and each photosensor cell is grounded through perpendicular line 38, 38', and 38''. Voltage through which a buffer MOS transistor flows is impressed to terminal 36 like waveform 66. Buffer MOS transistor 35 for full screen package refreshment, 35', and 35'' are switch-on and intermediary To have. If a pulse is impressed to terminal 37 like waveform 67 in this state, voltage will be built over the base of each photosensor cell through level line 31, 31', and 31'', As already explained, it goes into refreshment operation, and although the electric charge accumulated before it set it in full refreshment mode or transitional refreshment mode, intermediary refreshment of it is carried out. It is determined by the pulse width of waveform 67 whether it becomes full refreshment mode or it becomes transitional refreshment mode. t<sub>2</sub>In time, as already explained, the base of the transistor of each photosensor cell will be in a reverse bias state to an emitter, and it will move from it to the next accumulation section 62. In this refreshment section 61, as shown in a figure, all other impress pulses are maintained at the low state. In accumulation operation section 62, collector potential waveform 64 of substrate voltage, i.e., a transistor, is made into right potential. An electron can be early poured to the collector side among the electron hole pairs generated by light irradiation by this. However, since a base is made into an opposite direction bias state, i.e., negative potential, to an emitter and is picturized [ to maintain this collector potential at right potential ], even if it changes into a negative potential state not an indispensable condition but earth potentials, or a little, it is changeless in fundamental accumulation operation. In an accumulation operating state, potential 65 of gate terminal 49 of MOS transistor 48, 48', and 48'' is kept being the same as that of the refreshment section to high, and each MOS transistor is maintained at switch-on. For this reason, the emitter of each photosensor cell is grounded through perpendicular line 38, 38', and 38''. If a hole is accumulated in a base by irradiation of a strong light and it is saturated, namely, -- base potential receives emitter potential (earth potentials) -- a forward bias state -- it will flow through intermediary come and a hole through perpendicular line 38, 38', and 38'', and a base electrical change will be stopped and clipped there. Therefore, even if connected in common by emitter perpendicular line 38 of the photosensor cell which becomes each other perpendicular, 38', and 38'', a blooming phenomenon will not be produced if perpendicular line 38, 38', and 38'' are grounded to this appearance. Even if the method of avoiding this blooming phenomenon makes MOS transistor 48, 48', and 48'' non-switch-on and it is changing perpendicular line 38, 38', and 38'' into the floating state, When substrate potential, i.e., collector potential 64, is made into nature potential a little and base potential has changed with accumulation of a hole in the right potential direction, it is also possible to attain by making it flow into the direction of the collector side ahead of an emitter. It ranks second to accumulation section 62, and is time t.<sub>3</sub>It becomes read-out section 63 more. This time t<sub>3</sub>It is alike, it sets and sets potential 65 of gate terminal 49 of MOS transistor 48, 48', and 48'' to low, And set potential 68 of the gate terminal of buffer MOS transistor 33 of level line 31, 31', and 31'', 33', and 33'' to high, and let each MOS transistor be switch-on. However, the timing which sets potential 68 of this gate terminal 34 to high is time t.<sub>3</sub>It comes out and a certain thing should just be not an indispensable condition but time earlier than it. Time t<sub>4</sub>What was connected to level line 31 among the outputs of perpendicular shift register 32 serves as high like waveform 69, and since MOS transistor 33 is switch-on at this time, read-out of each three photosensor cells connected to this level line 31 is performed. This read-out operation is as having already explained above, and the signal voltage which occurred by the signal electric charge accumulated in the base area of each photosensor cell appears in perpendicular line 38, 38', and 38'' as it is. The pulse width of the pulse voltage from perpendicular shift register 32 at this time is set as the pulse width from which the read-out voltage to accumulation voltage becomes a relation which maintains linearity enough, as shown in Drawing 19. Pulse voltage is V as explained previously.<sub>Bias</sub>It is adjusted so that only a part may require forward bias to an emitter. Subsequently, time t<sub>5</sub>It is alike, it sets and only the output to the gate of MOS transistor 40 connected to perpendicular line 38 among the outputs of level shift register 39 serves as high like waveform 70, MOS transistor 40 will be in switch-on, an output signal lets output line 41 pass, and current amplification is entered and carried out to output transistor 44, and it is outputted from output terminal 47. Thus, the signal electric charge which originates in wiring capacity at output line 41 after a signal is read is that of I have left, and it is time t.<sub>6</sub>It is alike, it sets and a pulse is impressed to gate terminal 43 of MOS transistor 42 like pulse shape 71, MOS transistor 42 is made into switch-on, output line 41 is grounded, and this signal electric charge that remained is refreshed. Like the following, the electrical connection of switching MOS transistor 40, 40', and 40'' is carried out one by one, and the signal output of perpendicular line 38, 38', and 38'' is read. In thus, perpendicular line 38, 38', and 38'' after reading the signal from each photosensor cell for one line located horizontally, Since the signal electric charge resulting from the wiring capacity of that remains like output line 41, As shown to gate terminal 49 of that by waveform 65, high is used, the electrical connection of MOS transistor 48 connected to each perpendicular line 38, 38', and 38'', 48', and 48'' is carried out, and this remains signal electric charge is refreshed. Subsequently, time t<sub>8</sub>It is alike, it sets, the output connected to level line 31' among the outputs of perpendicular shift register 32 serves as high like waveform 69', and the accumulation voltage of each photosensor cell connected to level line 31' is read to each perpendicular line 38, 38', and 38''. Hereinafter, a signal is read from output terminal 47 one by one by the same operation as a front. Although the operating state applied to the applicable field, for example, the still video to which research and development are done positively these days, that it reads with accumulation section 62 and section 63 is clearly classified in the above explanation was explained, It is applicable by changing the pulse timing of Drawing 21 also about the applicable field that it reads with the operation in accumulation section 62 like a television camera, and operation in section 63 is performed simultaneously. However, the refreshment at this time needs not full screen package refreshment but the refresh feature in every line. For example, time t after the signal of each photosensor cell connected to level line 31 was read<sub>7</sub>In order to eliminate the electric charge which was alike, set and remained on each perpendicular line, MOS transistor 48, 48', and 48'' are made into an electrical connection, but a refreshment pulse is impressed to level line 31 at this time. That is, in waveform 69, it is time t.<sub>7</sub>It is alike, it also sets and is time t.<sub>4</sub>It can attain by using the perpendicular shift register of composition so that the pulse from which pulse voltage and pulse width differ may be generated similarly. Thus, instead of [ of the apparatus which impresses the package refreshment pulse installed in the right-hand side of Drawing 14 in addition to double pulse operation ], It is possible to also make it attain by making it operate, being able to shift with the perpendicular register which the 2nd same perpendicular Shifud register as left-hand side was provided also in right-hand side, and was provided with timing on left-hand side. At this time, the flexibility of operation of operating each potential of the emitter of each photosensor cell and a collector, and pressing down blooming decreases in an accumulation state which was already explained. However, as the place of basic motion explained, in a read-out state, it is V to a base.<sub>Bias</sub>It is V so that the graph of Drawing 18 may show, since it has composition which can perform high-speed read-out when the becoming bias voltage is impressed.<sub>Bias</sub>When not impressing, by saturation of each photosensor cell, the amount of [ which flows into perpendicular line 28, 28', and 28'' ] signal electric charge is very small, and a blooming phenomenon does not become a problem at all. The photoelectric conversion device concerning this example of composition can acquire the extremely outstanding characteristic also to a smear phenomenon. A smear phenomenon is a problem which generates a place where it is irradiated with light on operation and structure where electric charge transmission is carried out in a CCD type imaging device, especially a frame transmission type. Especially in the Inta line type, it is a problem which occurs since a career which occurred in the depths of a semiconductor by light of long wavelength is accumulated in a charge transfer section. In a MOS type imaging device, it is a problem which arises since the career which occurred in the semiconductor depths by the light of long wavelength too is accumulated in the Dorain side of the switching MOS transistor grounded by each photosensor cell. On the other hand, in the photoelectric conversion device concerning this example of composition, the phenomenon in which the career which the smear phenomenon which occurs on operation and structure does not have, and occurred in the semiconductor depths by the light of long wavelength is accumulated does not arise at all, either. However, it is although it worries about the development that an electron is accumulated, among the electron comparatively generated near the surface in the emitter of a photosensor cell, and a hole, Since, as for this, the emitter is grounded in the accumulation operating state at the time of package refreshment operation, an electron is not accumulated and a smear phenomenon does not produce it. At the time of the line refreshment operation applied at the time of the usual television camera In the period of level blanking, since a perpendicular line is grounded and refreshed before reading accumulation voltage to a perpendicular line, the electron simultaneously accumulated in the emitter during the 1 horizontal scanning at this time flows out, and, for this reason, a smear phenomenon hardly occurs. Thus, in the photoelectric conversion device concerning this example, a smear phenomenon is one of the big advantages of the photoelectric conversion device which almost generates only the grade which can essentially be disregarded but is built over the example of optical composition on that structure and operation. In an accumulation operating state, although each potential of the emitter and the collector was operated and being before mentioned above about operation of pressing down a blooming phenomenon, it is also possible to control gamma characteristic using this. That is, in the middle of accumulation operation, potential of an emitter or a collector is temporarily made into a certain fixed negative potential, and operation of passing the hole accumulated more mostly than the number of careers which gives this negative potential among the careers accumulated in the base to the emitter or collector side is carried out. By this, when the incidence light volume of the relation to accumulation voltage and incidence light volume is small, the characteristic of gamma= 1 which a silicon crystal has is shown, and the place where incidence light volume is large shows the characteristic that gamma becomes smaller than 1. That is, it is possible to give the characteristic of gamma= 0.45 usually required of a broken line approximation target with a television camera. If it will become 1 broken-line approximation once it does the above-mentioned operation in the middle of accumulation operation, and it carries out by changing suitably twice the negative potential impressed to an emitter or a collector, it is also possible to give 2 broken-line type gamma characteristic. Although the silicon substrate is made into the common collector in the above example of composition, it is usually embedded [ n ] like a bipolar transistor.<sup>+</sup>It is good also as a structure where a field is provided and a collector is made to divide for every line. Actual operation requires the clock pulse for driving perpendicular shift register 32 and level shift register 39 in addition to the pulse timing shown in Drawing 21 a. The equivalent circuit related to an output signal is shown in Drawing 22. Capacity C<sub>V</sub>80 is the wiring capacity of perpendicular line 38, 38', and 38'', and is capacity C.<sub>H</sub>81 shows the wiring capacity of output line 41, respectively. It is resistance R about resistance [ in / an equivalent circuit can be set in the read-out state on the right-hand side of 9th / The / figure, and MOS transistor 40 for switching, 40', and 40'' are switch-on, and / the switch-on of that ].<sub>M</sub>82 shows. It is resistance r about transistor 44 for amplification.<sub>e</sub>The equivalent circuit using 83 and current source 84 shows. MOS transistor 42 for refreshing electric charge accumulation resulting from wiring capacity of output line 41 is non-switch-on in the state of read-out. Since impedance is high, it is omitting in a right-hand side equivalent circuit. Each parameter of an equivalent circuit is capacity C, for example, although determined by the size of the actually constituted photoelectric conversion device.<sub>V</sub>80 is capacity C about about 4 pF.<sub>H</sub>81 is resistance R of the switch-on of a MOS transistor about about 4 pF.<sub>M</sub>82 shows the example which calculated about 3Kohm and the output signal waveform by which current gain beta of bipolar transistor 44 is observed in output terminal 47 as about about 100 in Drawing 23. A vertical axis is wiring capacity C of perpendicular line 38, 38', and 38'' about the time [mus] from the moment switching MOS transistor 40, 40', and 40'' flowed through the horizontal axis in Drawing 23.<sub>V</sub>Output voltage [V] which appears in output terminal 47 in case a signal electric charge is read from each photosensor cell to 80 and the voltage of 1 v is once is shown, respectively. Output signal waveform 85 is load resistance R.<sub>E</sub>10Kohm and 86 are [ 45 ] load resistance R.<sub>E</sub>5Kohm and 87 are [ 45 ] load resistance R.<sub>E</sub>A peak value is [ in / it is a thing in case 45 is 2Kohm, and / any ] C.<sub>V</sub>80 and C<sub>H</sub>a part for the capacity of 81 -- comparatively -- more -- about 0.5V -- intermediary To have. With a natural thing, it is load resistance R.<sub>E</sub>an output waveform that the amount of attenuation has the small one where 45 is larger, and desirable -- intermediary To have. Standup time is about 20 ns and a high speed at the time of the above-mentioned parameter value. Resistance R in the switch-on of switching MOS transistor 40, 40', and 40''<sub>M</sub>Making it small and wiring capacity C<sub>V</sub>C<sub>H</sub>By making it small, still more nearly high-speed read-out is also possible. Since the voltage which appears in an output by the amplifying function which each photosensor cell has in the photoelectric conversion device using the photosensor cell concerning the above-mentioned composition is large, the amplification amplifier of a final stage may also be quite easy as compared with a MOS type imaging device. Although the above-mentioned example explained the example which uses the thing of the type of one step of bipolar transistor, the thing of two-step composition, etc. are possible also for using other methods with a natural thing. If a bipolar transistor is used like this example, it is possible for the problem of the 1/f noise which is easy to attach to the picture upward glance which occurs from the MOS transistor of the amplifier of the final stage in a CCD imaging device not to occur in the photoelectric conversion device of this example of composition, but to obtain image quality with a very sufficient S/N ratio. A drawing is used and explained below about the photoelectric conversion device of the still more highly sensitive present invention rather than the example shown in Drawing 17 with the control electrode of a negative number. One example is shown in Drawing 1. A part of top view in case Drawing 1 a arranges many basic photosensor cells with a plurality of control electrodes in two dimensions Drawing 1 b shows the sectional view of the A-A' section in Drawing 1 a, respectively about an example of an internal potential state of the direction [ in / Drawing / 1 c / for the circuit composition of a basic photosensor cell / in Drawing 1 d / a 1st / The / figure b figure ] of a B-B' section. In the example shown in Drawing 17, it is high resistance n on n board 1.<sup>-</sup>Field 5, p field 6, n<sup>+</sup>Field 7 is constituted and it is n.<sup>+</sup>pn<sup>-</sup>In the example which the photo-transistor and intermediary There was of n structure show in Drawing 1, they are p.<sup>+</sup>n field of the substrate in the example which was constituted on substrate 350 and shown in Drawing 17 is n.<sup>+</sup>Field 351, intermediary To have, and intermediary To have with different time. At the example shown in this Drawing 1, it is n.<sup>+</sup>Field 7, p field 6, n<sup>-</sup>Field 5, n<sup>+</sup>To the 1st photo-transistor that comprises field 351, they are p field 6 and n.<sup>-</sup>Field 5, n<sup>+</sup>Field 351, p<sup>+</sup>The 2nd photo-transistor that comprises field 350 overlapped, was created, and has constituted thyristor structure. for this reason, the direction of [ from the semiconductor surface ] an inside -- a horizontal axis -- the internal potential state over the electron at the time of Ivy becomes as it is shown in Drawing 1 d -- this appearance -- p of a substrate<sup>+</sup>When light enters in the state where bias of the field 350 is carried out to right potential through wiring 12 of the back of a substrate, the hole among the careers which occurred inside the semiconductor by light excitation is p of the 1st photo-transistor, as the example of Drawing 17 explained.<sup>+</sup>It is accumulated in a field, i.e., base area 6. n whose electron is a high resistance field in the front example at this time<sup>-</sup>At the example which is accelerated by the electric field which has occurred to field 5, flows into substrate 1 which is a collector, and striped intermediary There was shows in Drawing 1, it is substrate p.<sup>+</sup>n which becomes a potential well to an electron in front of field 350<sup>+</sup>A field exists. That is, this n<sup>+</sup>The electron which generated the field by light excitation the Bex field of the 2nd photo-transistor, an intermediary cage, and here will be accumulated. In a CCD type image sensor or a MOS type image sensor, Although only career of one of the two was used among the electron hole pairs generated by light excitation so that it might say that a hole is accumulated in a control electrode field in the example which was accumulating the electron in the main electrode among the careers which occurred by light excitation, and was shown in Drawing 13, Two control electrode fields are provided in the example shown in Drawing 1, and it is a hole to the control electrode field of the 1st photo-transistor, The electron was accumulated in the control electrode field of the 2nd photo-transistor, respectively, and high sensitivity-ization is attained by using the career of both which occurred by light excitation. Detailed operation is described later. Unlike the example shown in Drawing 17, the pMOS transistor for refreshment is further added to the basic sensor cell shown in Drawing 1 at each photosensor cell. That is, it is a pMOS transistor which comprises base area 6 of the 1st photo-transistor, n field 353 of which the channel dope was done, p field 354 formed newly, gate dielectric film 3, and gate electrode 352, respectively, This is made into switch-on at the time of refreshment, and carries out operation which draws out the hole accumulated in base area 6. Wiring 355 is for connecting with a negative power supply via contact hole 359 to p field 354 which is the Dorain field of this pMOS transistor. Gate electrode 352 spreads greatly on base area 6, and constitutes a MOS capacitor here. Intermediary To have [ as ] to which potential of base area 6 is changed at the time of read-out as an example of Drawing 17 showed. Base area 351 of the 2nd photo-transistor is exposed to the semiconductor surface in contact with element isolation region 4, Intermediary To have [ as ] from which a MOS capacitor comprises insulating film 3 and electrode 356, and the potential of the base area of the 2nd photo-transistor also changes via this MOS capacitor like the base area of the 1st photo-transistor on this base area 351. Wiring 357 is for supplying a pulse to this MOS capacitor electrode. It is for wiring 358 supplying a pulse to a gate and a MOS capacitor. Emitter field 7 of the 1st photo-transistor and wiring 8 are completely the same as the example of Drawing 17. Drawing 1 c is a circuit lineblock diagram of the photosensor cell explained above. Transistor 360 is n.<sup>+</sup>Field 7, p field 6, n<sup>-</sup>Field 5, n<sup>+</sup>About the 1st photo-transistor that comprises field 351, transistors 361 are p field 6 and n.<sup>-</sup>Field 5, n<sup>+</sup>Field 351, p<sup>+</sup>MOS transistor 362 is about the 2nd photo-transistor that comprises field 350, Capacitor 364 is n about the MOS capacitor which capacitor 363 comprises from p field 6, insulating film 3, and electrode 352 in p channel MOS transistor which comprises p field 6, n field 353, p field 354, gate dielectric film 3, and gate electrode 352.<sup>+</sup>The MOS capacitor which comprises field 351, insulating film 3, and electrode 356 is shown, respectively. Below, operation of this basic photosensor cell is explained in detail using the pulse shape and internal potential figure showing in the circuit lineblock diagram showing in Drawing 2 which arranged the photosensor cell in two dimensions, and Drawing 3. Drawing 2 arranges the basic photosensor cell shown in Drawing 1 c to 2x2, Although a perpendicular shift register and light shift register, output amplifier, the MOS transistor for perpendicular line refreshment, the MOS transistor for perpendicular line selection, etc. are added around this like Drawing 14, it is omitting by a diagram. The gate of MOS capacitor 363 and pMOS transistor 362 is connected in common, as already explained, it is constituted so that a pulse may be impressed via level line 358, but this can also provide and impress wiring separately. In Drawing 3, waveform A is a pulse shape impressed to level line 357, and waveform B is a pulse shape impressed to level line 358. Waveform C is a waveform which shows the potential of perpendicular line 8, and is time t.<sub>4</sub>Although not shown in a figure, the MOS transistor connected to the perpendicular line is made into switch-on, earth potentials are maintained, and until is time t.<sub>4</sub>change Or and others into a floating state -- the state where the signal output from the emitter field of each photosensor cell is outputted -- intermediary To have -- things are shown. However, time t<sub>4</sub>it is not inconvenient on operation to ground the emitter field of until each sensor cell at all, even if it is in not an indispensable condition but the floating state, especially since it refreshes [ the composition of this Drawing 1 ] using pMOS transistor 362. Hereinafter, the operation is explained for every time using a pulse shape and an internal potential figure. At this time, the emitter field of the 2nd photo-transistor shall be connected to a right power supply through electrode 12 on the back of a substrate. Time t among the pulse shapes of Drawing 3<sub>1</sub>Or time t<sub>3</sub>Until is time t to refreshment operation.<sub>3</sub>Or time t<sub>4</sub>Until is time t to the accumulation operation of a career by which light excitation was carried out.<sub>4</sub>Or time t<sub>8</sub>Until corresponds to read-out operation, respectively. Time t<sub>1</sub>It is a time of Read(ing) and operation being completed, and is time t of internal potential.<sub>1</sub>As shown in the figure which can be boiled and set, it responds to p field, i.e., the 1st base area, at the strength of light, and a hole is n again.<sup>+</sup>The electron according to the strength of light is accumulated in the field, i.e., the 2nd base area, respectively. Time t<sub>2</sub>It is alike and sets, and like waveform B, a negative pulse starts the gate of pMOS transistor 362 for refreshment through level line 358, and the pMOS transistor is made into switch-on. Therefore, the hole accumulated in the 1st base area flows out, and is time t.<sub>2</sub>As shown in a Inside potential figure, the 1st base area is made by the negative voltage currently supplied via wiring 355. Although a negative pulse is simultaneously supplied to the 1st base area via MOS capacitor 363 at this time, since pMOS transistor 362 is made by switch-on, influence does not do at all. Time t<sub>2</sub>It is alike, it sets and a refreshment pulse is impressed to the base area of the 2nd photo-transistor via level line 357 and MOS capacitor 364 like waveform A. The voltage at this time impressed, the voltage relation concerning the 2nd base area, and refreshment operation are completely equivalent to what was already explained as refreshment operation in the example of Drawing 17. Namely, time t<sub>2</sub>As shown in the internal potential figure which can be boiled and set, it becomes intermediary A cow [ gradually / built-in voltage ] like an arrow as time is formed as for that to which forward bias of the base area 351 was carried out to emitter field 350, at the same time a pulse is impressed. However, in this 2nd photo-transistor, as shown in the sectional view of Drawing 1 b, since the bonded surface product of base area 351 of the 2nd photo-transistor and emitter field 350 is very loud, refreshment operation is made at high speed than the time of the example shown in Drawing 17. Subsequently, when the voltage currently impressed to the 2nd base area returns to earth potentials, it changes the potential of the 2nd base area into a reverse bias state to an emitter field. This is also already equivalent to explanation and refreshment operation completely. Time t<sub>3</sub>Or time t<sub>4</sub>Until is an accumulation period of a career which occurred by light excitation. As already explained, a hole is accumulated in base area of the 1st photo-transistor among careers which occurred by light excitation, and an electron is accumulated in base area of the 2nd photo-transistor. If the electron etc. in which the charge quantity accumulated in both at this time disappears with a To give up electron to the emitter field of the 1st photo-transistor, and it disappears by re-combination when coming out only and running the inside of a certain usual state resistance field are disregarded, an equivalent amount will be mostly accumulated in each base area. Accumulation voltage which occurs in each base area at this time, It is equivalent to having explained in the example already shown in Drawing 17 to become a Divided value about the accumulated charge quantity with the value which the capacity between base emitters of each photo-transistor and the capacity between base collectors added. Thus, although multiple base areas which are control electrodes exist in the photosensor cell shown in Drawing 1, the thing of a certain thing considered independently is possible for the difference between an electron and a hole completely like one thing. Time t<sub>4</sub>The internal potential figure which can be boiled and set shows the state where the career by light excitation is accumulated in each base area. This time t<sub>4</sub>Then, like waveform C, it will be the emitter field of the 1st photo-transistor in a floating state, and it will go into the read-out state of the following signal. First, time t<sub>5</sub>Since a pulse is impressed to the base of the 2nd photo-transistor via level line 357 and MOS capacitor 364 as it is alike, it sets and it is shown in waveform A, it is time t.<sub>5</sub>As shown in a Inside potential figure, forward bias will be carried out and a hole will be poured into the base area of the 1st photo-transistor like an arrow from the emitter field of the 2nd photo-transistor in proportion to the voltage accumulated according to light intensity. The hole proportional to the electron accumulated in the 2nd base area in the hole which occurred by light excitation is added to the 1st base area by this, Since it depends on the time when the 2nd base area is made into forward bias, the number of the holes poured in from the emitter field of this 2nd photo-transistor can control the gain to desire here. The 2nd amount of forward bias and time of a base at this time are controlled by the optimal value in order to secure a number of a hole of linearity poured in. The view at this time is completely the same as the example of Drawing 17 already explained. Time t<sub>6</sub>Then, the voltage currently impressed to the 2nd base is in a Said state also at a basis, and it is time t.<sub>6</sub>As shown in a Inside potential figure, the 2nd base area will return to the reverse bias state over the 2nd emitter before a pulse is impressed, and pouring of a hole stops here. Time t<sub>7</sub>As shown in waveform B, voltage is impressed via level line 358 and MOS capacitor 363, and forward bias of the 1st base area is carried out to the 1st emitter. Although voltage will be impressed also to the gate electrode of a pMOS transistor which this pulse shape is a positive pulse and was connected in parallel with MOS capacitor 363, a pMOS transistor will not be in switch-on for right voltage, and inconvenient operation does not arise at all. Since it is the 1st emitter field in the floating state if forward bias of the 1st base area is carried out, pouring of an electron will take place from here and the signal voltage which the potential of the emitter field changed and was accumulated in the 1st base area will be read. This operation is completely as the same as the example shown in Drawing 17 explained. However, it is although thyristor operation will occur in part and also the phenomenon in which a gain increases will happen in the example shown in this Drawing 1, if the electron poured in from the 1st emitter field is accumulated in the 2nd base area and there is much this charge quantity, Since this becomes the cause of giving a non-straight line to a signal output, each bias conditions are set up so that thyristor operation may not occur. It is a desirable thing to make a gain increase by this thyristor operation to the application which does not require linearity in particular. Time t which read-out completed<sub>8</sub>Then, since the voltage currently impressed to the 1st base area via MOS capacitor 364 is removed, it is time t.<sub>8</sub>As shown in a Inside potential figure, the 1st base area returns to the same reverse bias state as pulse impression before to the 1st emitter field, and pouring of the electron from an emitter field stops. In this state, each signal output is read on the perpendicular line, as explained using Drawing 14, a level shift register will start operation, each perpendicular line will be chosen, the rest will let output amplifier pass, and a signal will be outputted outside. At the structure shown in Drawing 1, it is time t.<sub>5</sub>Since p field 354 of the pMOS transistor is connected to the negative power supply when it is alike, it sets and a hole is poured into the 1st base, the phenomenon poured into this p field produces a part of hole. If this p field 354 is formed small, this quantity is not so big a quantity, but this is decreased further, It is solvable by using SOI (Silicon On Insulator) art and forming this pMOS transistor on an element isolation region. The pulse voltage value of waveform A and waveform B is set as the respectively optimal value in refreshment operation read-out operation, as it explained in the example of Drawing 17. As mentioned above, as explained, for an intermediary To have reason, in the example shown in Drawing 1, the photoelectric conversion device of very high sensitivity can be provided in the method read while accumulating the career of both the electron generated by light excitation, and a hole in a plurality of control electrode fields and making a gain increase from each. Other examples of the structure which has a plurality of control electrode fields shown in Drawing 1 in Drawing 4 are shown. Composition and intermediary To have which are refreshed for the base area of the 2nd photo-transistor in the example shown in Drawing 4 using a pMOS transistor although the base area of the 1st photo-transistor was refreshed in the example in Drawing 1 using the pMOS transistor. For a part of top view of what arranged the basic photosensor cell in two dimensions, Drawing 4 b shows the sectional view inside the semiconductor of the A-A' section of a 4th [ The ] figure a figure, and, in Drawing 4 c, Drawing 4 a shows the equivalent circuit of the basic photosensor cell, respectively. In Drawing 4, an nMOS transistor uses SOI art, It is formed into the silicon substrate which re-crystallized polysilicon deposited by the amorphous silicone or CVD which used and formed sputtering etc. on element isolation region 4 by laser beam Annealing or electron beam Annealing. This nMOS transistor is n.<sup>+</sup>Field 365 and n<sup>+</sup>It comprises field 367, p field 366 of which the channel dope was done, gate dielectric film 3, and gate electrode 368, and is n.<sup>+</sup>n whose field 365 is the base area of the 2nd photo-transistor<sup>+</sup>It is connected with field 351 and is another n.<sup>+</sup>It is connected with wiring 370 via contact hole 371, and field 367 is made as [ supply / from a right voltage source / right voltage ]. Gate electrode 368 is n.<sup>+</sup>It is once also on field 365 and the MOS capacitor consists of this portion. It is made as [ impress / via level line 370 / to this gate electrode 368 / a pulse ]. At the time of refreshment of the base area of the 1st photo-transistor, and read-out Insulating film 3 of the electrode for impressing pulse voltage to base area, the MOS capacitor which consists of base area 6, Every, such as contact hole 19 for connecting emitter field 7 with emitter field 7 of the 1st photo-transistor, perpendicular line 8 which takes a signal from this, and a perpendicular line, are equivalent to what was shown in Drawings 17 or 1. Although not shown by a diagram, p field, i.e., channel field 366 of an nMOS transistor, is n.<sup>+</sup>It is connected to the field, i.e., sauce field 365. Drawing 4 c is an equivalent circuit of a basic photosensor cell, and is n.<sup>+</sup>Field 7, p field 6, n<sup>-</sup>Field 5, n<sup>+</sup>The 1st photo-transistor 372 that consists of field 351, p field 6, n<sup>-</sup>Field 5, n<sup>+</sup>Field 351, p<sup>+</sup>The 2nd photo-transistor 373 that consists of field 350, electrode 9, insulating film 3, MOS capacitor 374 that consists of p field 6, electrode 368, insulating film 3, n<sup>+</sup>MOS capacitor 375, n which consist of field 365<sup>+</sup>Field 365, p field 366, n<sup>+</sup>n which comprises field 367, gate dielectric film 3, and gate electrode 368<sup>-</sup>It comprises MOS transistor 376, respectively. Drawing 5 is a circuit lineblock diagram of what arranged the basic photosensor cell shown in Drawing 4 to 2x2, Although perpendicular shift register, level shift register, and output amplifier, the MOS transistor for perpendicular line refreshment, the MOS transistor for perpendicular line selection, etc. are added around the lineblock diagram shown in Drawing 5, This is fundamentally the same as what was shown in Drawing 14, and it is omitting in this figure. Operation of this basic photosensor cell and operation of the photoelectric conversion device shown in Drawing 5 are explained in detail below using the pulse shape and internal potential figure showing in Drawing 6. In Drawing 6, waveform A is a pulse shape impressed to level line 370, and waveform B is a pulse shape impressed to level line 10. Waveform C is a waveform which shows the potential of perpendicular line 8, and is time t.<sub>5</sub>Although not shown in a figure, the MOS transistor for refreshing the electric charge of a perpendicular line connected to the perpendicular line is made by switch-on, earth potentials are maintained, and until is time t.<sub>5</sub>the state where will be Or and others in a floating state, and the signal from the emitter field of each sensor cell is outputted -- intermediary To have -- things are shown. Hereinafter, operation is explained for order later on for every time using a pulse shape and an internal potential figure. Time t among the pulse shapes shown in Drawing 6<sub>1</sub>t, Or et al.<sub>4</sub>Until is time t to refreshment operation.<sub>4</sub>Or time t<sub>5</sub>Accumulation operation of the career to which light excitation of until was carried out, time t<sub>5</sub>Or time t<sub>8</sub>Until corresponds to read-out operation of a signal, respectively. Time t<sub>1</sub>It is time t, when it is alike, it sets, a negative pulse is impressed through level line 370 like waveform A and negative voltage is impressed to the base area of the 2nd photo-transistor through MOS capacitor 375.<sub>1</sub>Since it is alike, and forward bias of the base area is carried out to the emitter field of the 2nd photo-transistor as shown in the shown internal potential figure, from an emitter field, a hole is poured in and operation which carries out intermediary change of the potential of the base area of the 1st photo-transistor in Mukai for Masakata is carried out. At this time, it is the operation completely same with having explained above that the 2nd base potential approaches built-in voltage gradually from a forward bias state with time progress. It is for operating more certainly the transitional refreshment already explained in the example of Drawing 17 to pour a hole into the 1st base and to change potential in the right potential direction at this time. Since common connection of the gate of MOS capacitor 375 and nMOS transistor 376 is made at the time of impression of this negative pulse, a negative pulse is impressed also to nMOS transistor 376, but an nMOS transistor will not be in switch-on and inconvenience in particular does not arise. Subsequently, time t<sub>2</sub>In the moment the 2nd base becomes earth potentials from negative potential here although Is and a negative pulse also become earth potentials at the Said time, it is time t.<sub>2</sub>As shown in a Inside potential figure, the 2nd base will be in an opposite direction bias state to the 2nd emitter, and pouring of the hole from the 2nd emitter will stop. Time t<sub>3</sub>Like waveform A, a positive pulse is impressed to the gate of nMOS transistor 376 through wiring 370, it is made by switch-on, and, for this reason, the 2nd base is made equal to the potential of the right voltage source currently supplied from perpendicular line 369. At this time, although a positive pulse is impressed also to MOS capacitor 375 in common, an inconvenient phenomenon in particular does not arise. Time t<sub>3</sub>Then, as shown in waveform B, right voltage is impressed to the 1st base through wiring 10 and MOS capacitor 374. At this time, it is time t.<sub>3</sub>As shown in a Inside potential figure, forward bias of the 1st base is carried out to the 1st emitter, and since a hole flows out from this 1st base, Mukai or intermediary potential changes to built-in voltage in the right potential direction gradually. This is the completely same operation as a time of already explaining the refreshment operation in an example of Drawing 17. Full refreshment mode or transitional refreshment mode is used according to the application. Since the 2nd base is connected to the right power supply via nMOS transistor 376 at this time as already explained, the usual bipolar operation will be carried out. Time t<sub>4</sub>Then, each pulse returns to earth potentials and is time t.<sub>4</sub>As shown in a Inside potential figure, the 1st base and 2nd base will be in a reverse bias state to each emitter, and will go into accumulation operation of the career by light excitation. Time t<sub>4</sub>Or time t<sub>5</sub>Until is an accumulation period of a career which occurred by light excitation. Operation which a hole is accumulated in the 1st base area among careers which occurred by light excitation, and is accumulated in the 2nd base area as for an electron is completely the same as that of an example shown in Drawing 1. Time t<sub>5</sub>The internal potential figure which can be boiled and set shows the state where the career by light excitation is accumulated in each base area. This time t<sub>5</sub>Then, like waveform C, the MOS transistor connected to the perpendicular line is made into non-switch-on, and it changes the emitter field of the 1st photo-transistor into a floating state, and it goes into the read-out state of the following signal. First, time t<sub>6</sub>Since a negative pulse is impressed to the base area of the 2nd photo-transistor through level line 370 and MOS capacitor 375 like waveform A, it is time t.<sub>6</sub>As shown in a Inside potential figure, it changes the 2nd base into a forward bias state to the 2nd emitter, and is proportional to the voltage accumulated according to light intensity, From the 2nd emitter field, a hole will be poured in and a hole will be accumulated in the 1st base area like the illustrated arrow in addition to the hole which occurred by light excitation. This is the same with having explained in the example of Drawing 1. Time t<sub>7</sub>Like waveform A, right voltage is impressed to the gate of nMOS transistor 376 through level line 370, and it is made switch-on. For this reason, the 1st photo-transistor becomes completely the same as the usual bipolar transistor operation shown in the example of Drawing 13, since the 2nd base is connected to a right power supply through nMOS transistor 376 and perpendicular line 369, and it is time t.<sub>7</sub>It is alike and sets, and since it is completely the same as that of the example which impressed right voltage to the 1st base area through level line 10 and MOS capacitor 374, and also showed signal read-out operation like waveform B in Drawing 17, explanation is omitted. Time t<sub>8</sub>Since the internal potential figure which can be boiled and set is the same as the example shown in Drawing 17, explanation is omitted. As explained above, according to this example, it differs from the example shown in Drawing 1, Without completely caring about the thyristor operation at the time of read-out, operation like the example shown in Drawing 17 is possible, and it can provide a high [ very ] sensitivity photoelectric conversion device like the example moreover shown in Drawing 1. Next, the equivalent circuit of the basic photosensor cell of the example which added the pMOS transistor for refreshment shown in the base area of the 1st photo-transistor in Drawing 1 to Drawing 7, and added the nMOS transistor for refreshment to the base area of the 2nd photo-transistor is shown. A top view as shown in Drawings 1 and 4, and a sectional view are omitted in the example shown in Drawing 7 for structure which compounded both. The circuit lineblock diagram arranged to 2x2 is shown in Drawing 8. Here, the surrounding circuit as well as a front is omitted. The waveform impressed to each line and an internal potential figure are shown in Drawing 9, respectively. In Drawing 9, waveform A is a pulse shape impressed to the gate of pMOS capacitor 381, and MOS capacitor 382 through level line 377, and it is waveform B, It is a pulse shape impressed to a gate of nMOS capacitor 385, and MOS capacitor 386 through level line 378. Waveform C is a waveform which shows a potential state of perpendicular line 8 like a front example. At this time, perpendicular line 379 shown in Drawing 8 shall be connected to a negative power supply, and perpendicular line 380 shall be connected to a right power supply, respectively. Time t which is read-out operation in the example shown in this Drawing 7th [ the ] and 8<sub>4</sub>Or time t<sub>6</sub>Until is completely the same as that of the example shown in Drawing 4. A different point from two front examples is refreshment operation, and is time t.<sub>2</sub>It is alike, it sets, pMOS transistor 381 and nMOS transistor 385 are simultaneously made into switch-on, in a hole, the electron from the 2nd base flows out of the 1st base, respectively, and refreshment operation is completed very simply. Therefore, in waveform C, although it is the emitter field of the 1st photo-transistor in the grounding state in the state of refreshment, in this refreshment operation, there is no necessity of using grounding and it is clear that in what kind of state may be sufficient. As mentioned above, the example shown in Drawing 1, Drawing 4, and Drawing 7 as explained, In a photosensor cell of thyristor structure which adjoined and established two main electrode fields which comprise an opposite conductivity type region, and these main electrode fields in a main electrode field of each of two control electrode fields which comprise an opposite conductivity type region, respectively, A hole is accumulated in the 1st control electrode field among electron hole pairs generated by light excitation, and an electron is accumulated in the 2nd control electrode field. As compared with having used only one of the two conventionally among careers which occurred by light excitation, it has the big feature, and provides a high [ very ] sensitivity photoelectric conversion device. Thus, Double Base Stove since it has two control electrode fields and a career is accumulated in each in the photoelectric conversion device by the present invention The initial of Image Senser is taken and it is called D-BASIS. The photoelectric conversion device provided with the function which amplifies above the career by which internal light excitation was carried out was described. Although the thing of the structure which generates a photoexcited carrier in a single crystal chiefly has been explained until now, the transistor only for euphotic can also consist of amorphous layers on the surface of the read-out transistor provided in the single crystal. Hereinafter, the structure is described. Drawing 10 is the typical example and the top view of a read-out transistor by which a was provided in abbreviated Single crystal, the sectional view to which b meets the A-A' line, and c are the circuit lineblock diagrams in the state where such a cell was provided in the shape of an array. The top view of Drawing 10 a is fundamentally the same as the top view shown in Drawing 17 a. However, p which should become a collector of the transistor provided for light-receiving in the amorphous layer stacked on it<sup>+</sup>Intermediary To have with different polysilicon field 401 being provided. p<sup>+</sup>Polysilicon field 401 lets contact hole 410 pass, and touches p base area of the transistor for read-out. In fact, amorphous silicone is stacked on this surface. This situation is shown in b figure. 402 is the operating state and is the high resistance field completely made if possible by the depletion layer at low impurities density. Fundamentally, it is n.<sup>-</sup>But p<sup>-</sup>But one field may be sufficient. This thing is applicable to all the examples described so far. n field 403, p<sup>+</sup>Field 404 is the base area and the emitter field of the transistor for light-receiving. It is n base area in the floating state, and the potential control is electrode 407 and SiO.<sub>2</sub>It is carried out by the MOS capacitor formed from insulating layer 406 and n base area 404 of etc. p<sup>+</sup>The impurity density of field 404 is usually 1x10.<sup>20</sup>cm<sup>-3</sup>It is set up more than a grade or it. The impurity density of n base area 403 is 1~50x10.<sup>17</sup>cm<sup>-3</sup>It is made by the grade and set up not to carry out punch through by an operating state. It is determined that the thickness of high resistance field 402 will have desired euphotic sensitivity-spectrum distribution. 405 is an insulator field for separation of a euphotic transistor. SiO<sub>2</sub>Si<sub>3</sub>N<sub>4</sub>Non-doped polysilicon etc. are formed by these composite layers. 406 is the thin oxide film provided on amorphous silicone. 408 is a PSG film or CVD SiO.<sub>2</sub>It is a film. 409 is p.<sup>+</sup>It is an electrode of emitter field 404 and is SnO simultaneously.<sub>2</sub>In<sub>2</sub>O<sub>3</sub>It may be transparent electrodes, such as InTiO (ITO), and the structure which covers all the surfaces may be sufficient. Although it was presupposed that it was 8 and 10 the metal which made aluminum the subject until now, they stack amorphous silicone on it in the example of Drawing 10, and they are n field 403 and p further.<sup>+</sup>Since field 404 is formed, it must be a wiring material which bears a certain amount of high temperature process. Usually, a high melting point metal or MoSi(s), such as Mo and W<sub>2</sub>WSi<sub>2</sub>TiSi<sub>2</sub>Or TaSi<sub>2</sub>The material which bears the high temperature of etc is chosen. The metal which made aluminum or aluminum the subject may be sufficient as electrode 407. Since it is easy, 407 presupposes that it is also a number of the wiring for driving this MOS capacitor. The circuit lineblock diagram of the photoelectric conversion device of the structure shown in Drawings 10 a and b turns into Drawing 10 c. Operation of the photoelectric conversion device of the present invention is explained below. Since it is described enough by having already Description(ed) fundamentally, it explains simple. First, refreshment operation is explained. A negative pulse is impressed to MOS capacitor 407 through wiring 407. p<sup>+</sup>(404) The electron which bias of the n (403) point of contact was carried out to the forward direction by this negative pulse impression, and was superfluously accumulated in n field 403 flows out, and also is charged to predetermined voltage (right voltage). At this time, it is p simultaneously.<sup>+</sup>A hole flows out of field 404 and it is p.<sup>+</sup>It flows into field 401 and p base 6 is covered with a hole as a result. Next, a positive pulse is impressed to wiring 10 and p base area 6 is set as predetermined negative voltage. This photosensor cell goes into accumulation operation of a photoexcited carrier after this state. The hole by which light excitation was carried out in the amorphous field is p.<sup>+</sup>It flows into field 401 and an electron flows into n field 403. These careers are accumulated as a lightwave signal. Next, although it goes into read-out operation, negative voltage is first impressed to wiring 407, and it is p.<sup>+</sup>(404) Carry out bias to n (403) point of contact for example, in 0.5~0.65V forward direction. By carrying out like this, the hole proportional to the electronic charge which was excited enough by the lightwave signal and accumulated in n field 403 with about [ 1microsec~0.1microsec ] pulse width flows out of 404, and it is p.<sup>+</sup>It flows into field 401. That is, the hole not only proportional to the hole directly excited by light but the electron by which light excitation was carried out superimposes p base area 6, and it is accumulated. Such an internal amplification operation is operated, after accumulating the hole proportional to a lightwave signal in p base area, the positive read-out voltage of MOS capacitor 9 is applied through wiring 10, and the voltage signal proportional to a lightwave signal is read to perpendicular line 8. the explanation about such operation -- already -- 10 -- minute line Sticks. Since the voltage read is large and an amplifier can be constituted very simple, the situation that division read-out can be performed easily is as having already explained. 12,409 just gives the same right voltage and different Noodle right voltage may be sufficient as it depending on the case. Drawing 10 -- both p base area 6 of a read-out transistor, and n base area 403 of a euphotic transistor -- although -- it will be in a floating state. Structure of providing the MOS transistor which uses p base 6 as a main electrode in order to refresh more completely, as already explained, either the structure of providing the MOS transistor which uses n base area 403 as a main electrode, or the structure of providing these both simultaneously -- although -- it cannot be overemphasized that it is applicable to the structure which separated such a transistor for read-out and the transistor for separation. The example is shown in Drawing 11, Drawing 12, and Drawing 13. Drawing 11 is the example in which refreshment of p base area of the transistor for read-out was provided with the pMOS transistor (written to the leftmost in a cell by a diagram), and one main electrode of this transistor is set as predetermined negative voltage. Since negative voltage is impressed to the gate of the pMOS transistor for refreshment and it operates, it can drive in common with level line 10. Drawing 12 is a structure refreshed by providing the nMOS transistor which uses n base 403 of the transistor for light-receiving as a main electrode. Since it carries out by impressing positive pulse voltage to the gate, the drive of the gate can be performed in refreshment of an nMOS transistor in common with level line 407. One main electrode of an nMOS transistor is set as predetermined right voltage (it is large from the right voltage of 409). Drawing 13 is the example in which the MOS transistor for refreshment was provided in p base 6 and n base 403, respectively. These operations are as having already explained. A transistor amorphous to light-receiving being able to enlarge an effectual acceptance surface product as for the example of Used and an amorphous band gap have the advantage that the euphotic sensitivity by the side of short wavelength becomes high with 1.7~1.8 eV since it is large. The wiring embedded inside is Thilly Said of a high melting point metal or a high melting point metal who already stated. Moreover, they are a PSG film and CVD SiO.<sub>2</sub>A film or sputtering SiO<sub>2</sub>A film is provided. If an insulating film is made flat, it will be sputtering SiO to the last.<sub>2</sub>The voltage (direct-current bias) between electrodes is changed within To and the same chamber, and it is SiO on a sample.<sub>2</sub>It can carry out by switching to the mode by which But sputtering is carried out. Then, p after opening contact hole 410<sup>+</sup>depositing polysilicon by CVD -- patterning -- after I got it and high resistance amorphous silicone -- predetermined thickness (2~7 micrometers) grade deposition -- it carries out. The low temperature deposition [ deposition / of Amfaluas silicon ] in an ultrahigh vacuum, for example, the spot by Ar atmosphere, SiH<sub>4</sub>Or Si<sub>2</sub>H<sub>6</sub>It may be based on Was used CVD (plasma CVD is also included) etc. MOCVD using organic metal sauce gas is also one method. After insulating isolation field 405 formation, n base 403, p<sup>+</sup>Emitter 404 may be created with diffusion art, ion implantation art, etc. With the photoelectric conversion device using the photosensor cell which starts the composition mentioned above as already stated, Since the amplification amplifier of a final stage may be very easy, it is also possible to install multiple not a type but the amplification amplifier like the example of composition which showed the amplification amplifier of the final stage in Drawing 14 provided only one, and to have composition which divides one screen into plurality and reads it. An example of a division read-out method is shown in Drawing 24. The example of composition shown in Drawing 24 is an example which considered it horizontally as trichotomy and installed three final stage amplifier. Although fundamental operation is almost the same as what was explained using the example of composition of Drawing 14, and the timing diagram of Drawing 21, If a starting pulse goes into terminal 103 for providing three equivalent level shift registers 100,101,102, and impressing these starting pulses in the example of composition of this Drawing 24, The output of each sensor cell connected to eye a sequence [ the 1st row and ] (n+1) and eye a sequence (2n+1) (n is an integer and a horizontal picture prime number is a 3n piece in this example.) will be read simultaneously. In the next time, eye a sequence [ the 2nd row and ] (n+2) and eye a sequence (2n+2) will be read. When time to read one level line is being fixed according to this example of composition, As compared with the method which attached one final stage amplifier, one third of frequency may be sufficient, and a level shift register becomes easy, and horizontal scanning Ning frequency carries out analog digital conversion of the output signal from a photoelectric conversion device, The high-speed analog-to-digital conversion machine is unnecessary for a use which carries out signal processing, and it is a big advantage of a division read-out method. Oh is able to give the same function at least one level shift register by the method which provided three equivalent level shift registers in the example of composition shown in Drawing 24. The example of composition in this case is shown in Drawing 25. The example of composition of Drawing 25 writes only the level switching MOS transistor of the examples of composition shown in Drawing 24, and the middle portion of final stage amplifier, and since it is the same as the example of composition of Drawing 24, other portions are omitted. He connects the output from one level shift register 104 to the gate of the switching MOS transistor of eye a sequence [ the 1st row and ] (n+1) and eye a sequence (2n+1), and is trying to read those lines simultaneously in this example of composition. At the next time, eye a sequence [ the 2nd row and ] (n+2) and eye a sequence (2n+2) are read. According to this example of composition, although wiring to the gate of each switching MOS transistor increases, as a level shift register, it can operate only by one. As for this number, although the example of Drawing 24 and Drawing 25 showed the example which formed three output amplifier, it is needless to say that it may be made still larger according to that object. Although the starting pulse and clock pulse of a level shift register and a perpendicular shift register are omitting by all in the example of composition of Drawing 24 and Drawing 25, These are supplied like other refreshment PALs from the clock pulse generator formed in the same A tip, or the crossing pulse generator formed on other A tip. When level line package or full screen package refreshment is performed in this division read-out method, it is between the photosensor cells of eye n sequence and eye a sequence (n+1), Although accumulation time differs only and a possibility of slight discontinuity arising for a dark current ingredient and a signal ingredient, and coming to them about picture upward glance by this is also considered, such quantity is slight and it is satisfactory practically. this -- more than a tolerance limit -- it is easily possible to amend it also by an intermediary Came case using an external circuit by using the conventional amendment art which is made to generate a Kiyoshi-like wave and is performed in subtraction with this and a dark current ingredient, and the multiplication and division of this and a signal ingredient. When picturizing a color picture using such a photoelectric conversion device, it is possible by forming a stripe filter or a mosaic filter into on-A tip, or pasting a Made color filter together independently on a photoelectric conversion device, to acquire a color signal. As an example, when the stripe filter of R, G, and B is used, it is possible to acquire R signal, G signal, and B signal from respectively separate final stage amplifier in the photoelectric conversion device using the photosensor cell concerning the above-mentioned composition. The example of 1 composition of this is shown in Drawing 26. Only the surroundings of the level shift register are shown like [ this Drawing 26 ] Drawing 25. Others are the same as Drawings 14 and 24, and only the 1st row assumes that the color filter sticks like [ the color filter of R and the 2nd row call the 3rd row G color filter, and it calls it the color filter of B, and / the 4th row ] the color filter of R. As shown in Drawing 26, each perpendicular line of ... is connected to output line 110 the 7th row, and this takes out the 1st row of the R signal [ the 4th row of ]. Each perpendicular line of ... is connected to output line 111 the 8th row, and this takes out the 2nd row of the G signal [ the 5th row of ]. Each perpendicular line of ... takes out similarly the 3rd row of the B signal [ the 6th row of / the 9th row of ] connected to output line 112. Output line 110,111,112 is connected to the bipolar transistor of the MOS transistor for refreshment formed into on-A tip, respectively, and final stage amplifier, for example, an emitter follower type, and each color signal is outputted separately. The figure for explaining the basic structure of other examples of a photosensor cell and operation which constitute the photoelectric conversion device concerning other examples of composition of the present invention is shown in Drawing 27. The equivalent circuit of that and the whole circuit lineblock diagram are shown in Drawing 28 a. The photosensor cell shown in Drawing 27 is a photosensor cell which made it possible to perform read-out operation and line refreshment simultaneously by the same level scan pulse. A different point from the composition already shown in Drawing 17 in Drawing 27, MOS capacitor electrode 120 is connected also to the photosensor cell side which a Oh thing adjoins up and down only by one in MOS capacitor electrode 9 which is connected to level line wiring 10 in the case of Drawing 17, the time of seeing from one photosensor cell -- a double capacitor type and intermediary To have -- emitter 7 of a thing and the photosensor cell which adjoins up and down in a figure, wiring 8 which was carried out to two-layer wiring as for 7', and wiring 121 (although a perpendicular line is visible to one in Drawing 27), two lines are arranged via an insulating layer -- Listen -- intermediary To have with different emitter 7' being connected to wiring 121 through contact hole 19' at wiring 8 through contact hole 19, respectively by turns as for connection, i.e., emitter 7. This will become clearer if the equivalent circuit of Drawing 28 a is seen. That is, MOS capacitor 150 connected to the base of photosensor cell 152 is connected to level line 31, and MOS capacitor 151 is connected to level line 31'. MOS capacitor of photosensor cell 152' which adjoins downward in figure of photosensor cell 152 150' is connected to common level line 31'. The emitter of photosensor cell 152 is connected to perpendicular line 38 by turns, respectively like [ the emitter of photosensor cell 152' / line / 138 / perpendicular / the emitter of photosensor cell 152'' ] perpendicular line 38. In the equivalent circuit of Drawing 28 a, the imaging devices of Drawing 14 differ except the photosensor cell part of the foundations described above, Perpendicular line 38 Perpendicular line 138 besides switching MOS transistor 148 for refreshing perpendicular line 138 other than switching MOS transistor 48 for refreshing, and switching MOS transistor 40 which chooses perpendicular line 38 Switching MOS transistor 140 for choosing is added, and one output amplifier system is extended. Composition of this power range system is considered as the composition that switching MOS transistors 48 and 148 for refreshing each line are connected, The composition which sets output amplifier only to one as shows in Drawing 28 b using the switching MOS transistor for a level scan is also possible. Drawing 28 b shows only perpendicular line selection of Drawing 28 a, and the portion of an output amplifier system. According to the example of composition shown in the photosensor cell of this Drawing 27, and Drawing 28 a, the following operations are possible. That is, read-out operation of each photosensor cell connected to level line 31 now is completed, When it is in the level blanking period in television operation, the output pulse from perpendicular shift register 32 lets MOS capacitor 151 outputted to level line 31' pass, and is refreshed for photosensor cell 152 which read-out ended. At this time, switching MOS transistor 48 is made into switch-on, and perpendicular line 38 is grounded. The output of photosensor cell 152' is read to perpendicular line 138 through MOS capacitor 150' connected to level line 31'. Switching MOS transistor 148 is made by non-switch-on with a thing natural at this time, and perpendicular lines 138 are a floating state and an intermediary To have reason. Thus, read-out of the photosensor cell of refreshment of the photosensor cell which already ended read-out, and the following line is able to carry out intratemporally by the same pulse by one perpendicular scan pulse. At the time of read-out, since bias voltage is applied from the necessity for high-speed read-out, different intermediary come voltage as already explained at this time, when it refreshes, and the voltage at the time of read-out, This is attained by taking composition which requires different voltage for the base of each photosensor cell, even if the same voltage is impressed to each electrode by changing the area of MOS capacitor electrode 9 and MOS capacitor electrode 120, as shown in Drawing 27. That is, it compares with the MOS capacitor area for read-out, and the area of the MOS capacitor for refreshment is small intermediary To have. When package refreshment is not carried out but it refreshes all the sensor cells of one line at a time like this example, As shown in Drawing 17 b, a collector may be constituted from an n type or an n board, but there is that it is more desirable to separate and provide a collector for every level line. a collector -- a substrate -- an intermediary To have case -- the collector of all the photosensor cells -- a common field and intermediary To have sake -- bias voltage fixed in the state of accumulation and euphotic read-out to a collector -- Condition involved -- intermediary To have. Of course, as already explained, bias voltage can perform refreshment of a floating base to a collector between emitters also by Condition involved. However, in this case, useless current flows among the emitter collectors of the cell to which the refreshment pulse was impressed, and the fault of enlarging power consumption follows at the same time refreshment of base area is performed. In order to conquer such a fault, the collector of the sensor cell on a par with each level line becomes common, without making the collector of all the sensor cells into a common field, but the collector for every level line makes it the structure separated mutually. Namely, n which used the substrate as p type and was mutually separated for collector each level line of every into p type board when making it relate to the structure of Drawing 17 and explaining<sup>+</sup>It is made the structure which provided the embedded field. n of an adjacent level line<sup>+</sup>The structure of making p field intervening in between may be sufficient as separation of an embedded field. In order to decrease a Along embedded rare To collector's capacitor on a level line, the direction of insulator separation is excellent. In Drawing 17, since the collector comprises a substrate, all the separation fields surrounding a sensor cell are provided by almost same Mr. Fukashi. On the other hand, in order to separate the collector of each other for every level line, only the value more nearly required than the separation field of the direction of a perpendicular line will make deep the separation field of the direction of a level line. If read-out grounds the voltage of the collector of the level line when Finally refreshment operation will start, if the collector is separated for every level line, current between emitter collectors which was mentioned above will not flow, and will not bring about the increase in power consumption. When refreshment goes into the electric charge accumulation operation by a Finally lightwave signal, predetermined bias voltage is again impressed to a collector region. According to the equivalent circuit of Drawing 28 a, an output will be outputted to output terminals 47 and 147 by turns for every level line. This can also take out an output from one amplifier by having composition as shown in Drawing 28 b, as already explained. As explained above, according to this example of composition, with comparatively easy composition, line refreshment is attained and it can apply also to applicable fields, such as the usual A television camera. The type which takes out a plurality of outputs from one photosensor cell can be considered by the composition which formed a plurality of emitters in the photosensor cell as other examples of composition of the present invention, or composition which provided a plurality of contacts in one emitter. Since this has [ each photosensor cell of the photoelectric conversion device by the present invention ] an amplifying function, in order that a plurality of outputs may be taken out from one photosensor cell, Even if a plurality of wiring capacity is connected to each photosensor cell, it originates in accumulation voltage Vp which occurred inside the photosensor cell being able to read to each output, without completely decreasing. Thus, it is possible to add many advantages from each photosensor cell to signal processing or the measure against noise by composition which can take out a plurality of outputs to the photoelectric conversion device which arranges a majority of each photosensor cells. Next, the example of 1 process of the photoelectric conversion device concerning the present invention is explained. To Drawing 29, it is selection epitaxial growth (N. Endo et al). "Novel device isolation An example of the process using technology with selected epitaxial growth"Tech.Dig.of 1982 IEDM and pp.241 -244 reference is shown. 1~10x10<sup>16</sup>cm<sup>-3</sup>n for contact to the back side of n form Si substrate 1 of the impurity density of a grade<sup>+</sup>Field 11 is provided by diffusion of As or P. n<sup>+</sup>In order to prevent the autodoping from a field, although not shown in a figure, the oxide film and the nitriding film are usually provided in the back. That by which impurity density and oxygen concentration were controlled uniformly is used for substrate 1. That is, a career line time uses a uniform crystal wafer long enough and with a wafer. As such a thing, the crystal for example, by the MCZ method is suitable. An about [ abbreviated Every1micrometer ] oxide film is formed in the surface of substrate 1 by wet oxidization. Namely, H<sub>2</sub>O atmosphere -- or (H)<sub>2</sub>+O<sub>2</sub>It oxidizes in atmosphere. In order to obtain an oxide film good for not producing a stacking fault etc., high-pressure oxidization at the temperature about 900 degreeC is suitable. Moreover, it is SiO about 2~4 micrometers thick, for example.<sub>2</sub>A film is deposited in CVD. (N<sub>2</sub>+SiH<sub>4</sub>+O<sub>2</sub>SiO of the thickness of a request [ by a gas system ] with the temperature about 300~500 degreeC<sub>2</sub>A film is deposited. O<sub>2</sub>/SiH<sub>4</sub>Although a of molar ratio is based also on temperature, it is set about to 4~40. According to a photo lithography process, it leaves the oxide film of the portion used as the separation field between cells, and is an oxide film (CF) of other fields,<sub>4</sub>+H<sub>2</sub>C<sub>2</sub>F<sub>4</sub>CH<sub>2</sub>F<sub>2</sub>10x10 micrometers removed by the reactive ion etching using the gas of etc (process a of Drawing 29)<sup>2</sup>When it is alike and provides 1 pixel, it is SiO to the mesh state of 10-micrometer Pitch.<sub>2</sub>It leaves a film. SiO<sub>2</sub>Membranous width is chosen as about 2 micrometers. It is the surface damage layer and pollution layer by reactive ion etching Ar/Cl<sub>2</sub>the vapor deposition in the ultrahigh vacuum after gas system plasma etching or wet etching removes -- or the sputtering into which atmosphere was fully purely made in load lock form or SiH<sub>4</sub>It is CO to gas.<sub>2</sub>CBrF which deposits amorphous silicone 301 with decompression light CVD which irradiates with laser beams (process b of Drawing 29)<sub>3</sub>CCl<sub>2</sub>F<sub>2</sub>Cl<sub>2</sub>In a similar manner [ before removing the amorphous silicone except having deposited on the SiO layer side by anisotropic Etchi by the reactive ion etching using the gas of etc (process c of Drawing 29) ], after removing a damage layer and a pollution layer enough, a silicon substrate surface is washed purely enough (H),<sub>2</sub>+SiH<sub>2</sub>C<sub>2</sub>+ A HCl gas system performs selection growth of a silicon layer. Growth is performed in the state of decompression of several 10 Torr(s), and substrate temperature sets the molar ratio of 900~1000degreeC and HCl as a high value above to some extent. If there is too little quantity of HCl, selection growth will not take place. It is SiO although a silicon crystal layer grows on a silicon substrate.<sub>2</sub>Since HCl will etch, the silicon on a layer is SiO.<sub>2</sub>Silicon is not deposited on a layer (Drawing 29 d). n<sup>-</sup>The thickness of layer 5 is about 3~5 micrometers. Impurity density is 10 preferably.<sup>12</sup>~10<sup>16</sup>cm<sup>-3</sup>It sets to a grade. Of course, it is pn although this range may be shifted.<sup>-</sup>Where it Depletion-ized completely with the diffusion potential of junction or voltage of operation is impressed to a collector, it is at least n.<sup>-</sup>It is desirable to choose it as impurity density and thickness which a field Depletion-izes completely. Usually, since a lot of moisture is contained in the HCl gas which can be obtained, quality epitaxial growth cannot be expected at all by [ so that it may say that an oxide film is always formed in a silicon substrate surface ]. watery HCl reacts to the material of a cylinder in the state of ON intermediary To have, and contains the heavy metal centering on iron in a cylinder in large quantities -- it is easy to become an intermediary and an epitaxial layer with much metal contamination. Since the epitaxial layer used for a photosensor cell is such a desirable reason that there are few dark current ingredients, it is necessary to suppress the contamination by a heavy metal to a limit. SiH<sub>2</sub>Cl<sub>2</sub>although the material of Super quantity purity is used of course, especially HCl has little moisture -- moisture content uses a thing of 0.5 ppm or less at least desirably. Of course, little moisture content is so good that there is. For making an epitaxial growth layer still more nearly quality, Oxygen is first removed near the surface for a substrate by high temperature processing about 1150~1250 degreeC, It is also very effective to make it the substrate which can perform Yingde lyssic gettering which generates many micro defects inside a substrate by prolonged heat treatment about 800 degreeC after that, and has a Denutetto zone. SiO as a separation field<sub>2</sub>Since epitaxial growth in the state where layer 4 existed is performed, it is SiO.<sub>2</sub>Growth temperature is so desirable that it is low in order to lessen taking in of oxygen of Or and others. Usually, in the high-frequency-induction-heating method often used, much more low-temperature-izing that has much contamination from a carbon susceptor is difficult. The wafer direct heating method by lamp heating which does not carry a carbon susceptor etc. into the reaction interior of a room can make a growth atmosphere the cleanest, and is grown up at low temperature in a quality epitaxial layer. Super-high purity fusion sapphire with lower steam pressure is [ wafer support in a reaction room ] suitable. Being easy to equalize the degree of wafer side internal temperature also in the state where raw-material gas can be preheated easily and the gas of the large flow is flowing, the wafer direct heating method by lamp heating which thermal stress hardly generates is suitable for obtaining a quality epitaxial layer. The ultraviolet exposure on the surface of a wafer further raises the quality of an epitaxial layer at the time of growth. SiO used as separation field 4<sub>2</sub>Amorphous silicone has accumulated on the side wall of a layer (process c of Drawing 29). Since itis [ single-crystal-] easy toize amorphous silicone by solid phase growth, it is SiO.<sub>2</sub>The crystal near the interface with separation field 4 becomes the very outstanding thing. High resistance n<sup>-</sup>Surface concentration 1~20x10 after forming layer 5 by selection epitaxial growth (process d of Drawing 29)<sup>16</sup>cm<sup>-3</sup>P field 6 of a grade is formed by predetermined Mr. Fukashi by diffusion which used the diffusion from doped oxide, or the ion implantation layer of low Dose as sauce. The depth of p field 6 is about 0.6~1 micrometer. Impurity density is determined as the thickness of p field 6 in the following ideas. If it is going to raise sensitivity, it is desirable to lower the impurity density of p field 6 and to make Cbe small. Cbe -- abbreviated Every -- it is given as follows. Cbe=Aeepsilon (q-N)<sub>A</sub>/2epsilonVbi<sup>1/2</sup>However, Vbi is the diffusion potential between emitter bases, and is Vbi=kT/q1nN.<sub>D</sub>N<sub>A</sub>/n<sub>i</sub><sup>2</sup>It is come out and given. Here, epsilon is a dielectric constant of a silicon crystal, and N.<sub>D</sub>Impurity density of a Is emitter, N<sub>A</sub>Impurities density of the portion which adjoins the emitter of a Is base, n<sub>i</sub>It is Is true career concentration. N<sub>A</sub>An intermediary with small Cbe and sensitivity rise so that it is made small, but it is N.<sub>A</sub>a Ah ball -- if it is made small too much, base area will Depletion-ize completely by an operating state -- a punching through state -- an intermediary Cause sake cannot do not much low. It sets up to such an extent that base area Depletion-izes completely and will not be in a punching through state. To then, a silicon substrate surface (H)<sub>2</sub>+O<sub>2</sub>Thermal oxidation film 3 of about [ number 100A ] thickness is formed at the temperature about 800~900 degreeC from several 10= by gas system steam oxidization. Moreover (SiH),<sub>4</sub>+NH<sub>3</sub>a system -- CVD of gas -- a nitriding film (Si)<sub>3</sub>N<sub>4</sub>302 is formed by about [ 500~1500A ] thickness. Formation temperature is a 700~900 degreeC grade. NH<sub>3</sub>The product which can also usually obtain gas along with HCl gas contains moisture in large quantities. Watery NH<sub>3</sub>It is subsequent SiO, while becoming a nitriding film with much oxygen concentration and becoming scarce at reproducibility, if gas is used for raw material.<sub>2</sub>The result that a selection ratio cannot be taken by selective etching with a film is caused. NH<sub>3</sub>Moisture content also makes gas at least a thing of 0.5 ppm or less. It cannot be overemphasized that little moisture content is so desirable that there is. PSG film 300 is further deposited by CVD on nitriding film 302. a gas system -- for example (N)<sub>2</sub>+SiH<sub>4</sub>+O<sub>2</sub>+PH<sub>3</sub>It uses and deposits the PSG film of about [ 2000~3000A ] thickness by CVD at the temperature about 300~450 degreeC (process e of Drawing 29). By the photo lithography process of including the mask Matching process of 2 times, it is n.<sup>+</sup>On field 7, polysilicon film 304 of As dope is deposited on refreshment and a read-out pulse impression electrode. In this case, Use is also good in the polysilicon film of p dope. For example, emitter tops are a PSG film and Si by 2 times of photo lithography processes.<sub>3</sub>N<sub>4</sub>A film, SiO<sub>2</sub>In the portion which removes all films and provides refreshment and a read-out pulse impression electrode, it is SiO of a ground.<sub>2</sub>It leaves a film and they are a PSG film and Si.<sub>3</sub>N<sub>4</sub>Only a film is etched. Then, polysilicon (N) of As dope,<sub>2</sub>+SiH<sub>4</sub>+AsH<sub>3</sub>or (H)<sub>2</sub>+SiH<sub>4</sub>+AsH<sub>3</sub>It deposits with a CVD method by gas. Deposition temperature is a 550 degrees C~700 degreeC grade, and film thickness is 1000~2000A. It is easy to be natural, even if non-doped polysilicon is deposited with the CVD method and it diffuses As or P after that. The polysilicon film of other portions except an emitter, refreshment, and read-out pulse impression electrode top is removed by post-etching of a mask Matching photo lithography process. Etching of a PSG film will remove the polysilicon deposited on the PSG film by liftoff in A self line (process f of Drawing 29). Etching of a polysilicon film is C.<sub>2</sub>Cl<sub>2</sub>F<sub>4</sub>, (CBrF)<sub>3</sub>+Cl<sub>2</sub>etc. -- etching by a gas system -- Si<sub>3</sub>N<sub>4</sub>A film is CH.<sub>2</sub>F<sub>2</sub>It etches by the gas of etc. Next, after depositing PSG film 305 with the CVD method of a gas system which was already described, a contact hole is opened according to a mask Matching process and an etching process on a refreshment pulse and the polysilicon film for read-out pulse electrodes. or [ depositing metal, such as aluminum, aluminum-Si, and aluminum-Cu-Si, by vacuum deposition or sputtering in such the state ] -- or (CH)<sub>3</sub>)<sub>3</sub>aluminum and AlCl<sub>3</sub>aluminum is deposited with the plasma CVD method made into raw-material gas, or the light irradiation CVD method which cuts directly the aluminum-C bond and aluminum-Cl bond of the above-mentioned raw-material gas by light irradiation again. (CH<sub>3</sub>)<sub>3</sub>aluminum and AlCl<sub>3</sub>In performing the above CVD methods as raw-material gas, it passes hydrogen to the overlarge. In order to deposit aluminum on a thin and steep contact hole, the CVD method which raised substrate temperature to 300~400 degreeC film thickness is excellent in moisture or the clean atmosphere of oxygen mixing which is not. After finishing patterning of metallic wiring 10 shown in Drawing 17, interlayer insulation film 306 is deposited with a CVD method. A PSG film which 306 mentioned above, or CVD method SiO<sub>2</sub>When it is necessary to carry out in consideration of a film or water resistance (SiH),<sub>4</sub>+NH<sub>3</sub>Si formed with the plasma CVD method of a gas system<sub>3</sub>N<sub>4</sub>It is a film. Si<sub>3</sub>N<sub>4</sub>In order to stop the content of hydrogen in a film low (SiH),<sub>4</sub>+N<sub>2</sub>The plasma CVD method in a gas system is used. Si which made carry out the phenomenon of the damage by a plasma CVD method, and was formed<sub>3</sub>N<sub>4</sub>Si enlarge membranous electric resisting pressure and according to an optical CVD method for making leakage current small<sub>3</sub>N<sub>4</sub>The film is excellent. There are two kinds of methods in an optical CVD method. (SiH<sub>4</sub>+NH<sub>3</sub>+ How (SiH) to irradiate with the ultraviolet rays of 2537A of a mercury lamp from the exterior by Hg gas system,<sub>4</sub>+NH)<sub>3</sub>It is the method of irradiating a gas system with the ultraviolet rays of 1849A of a mercury lamp. Substrate temperature is a 150~350 degreeC grade in each case. According to a mask Matching process and an etching process, polysilicon on emitter 7 deposits metal, such as aluminum, aluminum-Si, and aluminum-Cu-Si, by the method mentioned above, after opening the contact hole which penetrated insulating film 305,306 by reactive ion Etchi. In this case, since the aspect ratio of a contact hole is large, the direction of deposition by a CVD method is excellent. Si as a last Patshibation film after finishing patterning of metallic wiring 8 in Drawing 17<sub>3</sub>N<sub>4</sub>A film or PSG film 2 is deposited with a CVD method (Drawing 29 g). Also in this case, the film is excellent with the optical CVD method. 12 is a metal electrode by aluminum on the back, aluminum-Si, etc. There is a very variegated process in the process of the photoelectric conversion device of the present invention, and Drawing 29 only described a mere example. The important points of the photoelectric conversion device of the present invention are p field 6 and n.<sup>-</sup>Between fields 5 and p field 6, and n<sup>+</sup>There is how the leakage current between fields 7 is stopped small. n<sup>-</sup>Separation field 4 and n which consist of oxide films etc. although quality of field 5 is made good and dark current is lessened of course<sup>-</sup>The interface of field 5 is just a problem. Drawing 29 therefore explained how to grow epitaxially by depositing the amorphous silicon on the side wall of separation field 4 beforehand. In this case, an amorphous silicon is single-crystal-ized by the solid phase growth from substrate Si during epitaxial growth. Epitaxial growth is performed at an 850 degrees C~1000 degreeC grade and a comparatively high temperature. Therefore, before an amorphous silicon is single-crystal-ized by the solid phase growth from substrate Si, micro crystallite begins to grow into an amorphous silicon in many cases, and it becomes a cause which worsens crystallinity. If the single crystal of the amorphous silicon is carried out by the low-temperature processing about 550 degrees C~700 degreeC before performing selection epitaxial growth since the speed in which the one where temperature is lower carries out solid phase growth becomes [ a relative target ] large with every from the speed at which micro crystallite begins to grow into an amorphous silicon, the characteristic of an interface will improve. If layers, such as an oxide film, are between substrate Si and an amorphous silicon, in order that the start of solid phase growth may be overdue at this time, both boundary requires the super-highly pure process that such a layer is not contained. everything but the Furnas growth mentioned above for solid phase growth of the amorphous silicon -- a substrate -- a certain amount of temperature -- Please keep it. -- the rapid Annealing art for several to about several 10 seconds is also effective according to Futsushi lamp heating or an infrared lamp. It is SiO when using such art.<sub>2</sub>Many crystals may be sufficient as Si deposited on a layer side wall. However, it is necessary to carry out a product-proof in a very clean process, and to make it many crystals Si in which oxygen, carbon, etc. are not contained on the crystal grain community of many crystallines. Such SiO<sub>2</sub>After Si of the side is single-crystal-ized, selection growth of Si will be performed. SiO<sub>2</sub>Separation field 4 and high resistance n<sup>-</sup>When the leakage current of field 5 interface surely becomes a problem, it is high resistance n.<sup>-</sup>If only the portion which adjoins SiO separation field 4 of field 5 makes impurity density of n form high, the problem of this leakage current will be avoided. For example, separation SiO<sub>2</sub>n in contact with field 4<sup>-</sup>Only a field with a thickness of about 0.3~1 micrometer of field 5 is 1~10x10, for example.<sup>16</sup>cm<sup>-3</sup>Impurity density of n form is made high at a grade. This composition can be formed comparatively easily. After forming an about [ abbreviated Every1micrometer ] thermal oxidation film on substrate 1, it deposits with a CVD method on it. SiO<sub>2</sub>SiO in which only necessary thickness contained P of a predetermined quantity for the film first<sub>2</sub>The film is used. It is SiO on it.<sub>2</sub>I hear that it deposits with a CVD method, and it is Keep it about separation field 4. SiO containing the phosphorus which exists in the shape of sandwiches all over separation field 4 in a subsequent high temperature process<sub>2</sub>A film to phosphorus is high resistance n.<sup>-</sup>It is spread all over field 5 and an interface makes the good impurity distribution that impurity density is the highest. That is, it constitutes in structure as shown in Drawing 30. Separation field 4 is attained by the three-tiered structure, and 308 is thermal oxidation film SiO.<sub>2</sub>CVD method SiO with which 309 contained phosphorus<sub>2</sub>A film and 301 are CVD methods SiO.<sub>2</sub>It is a film. Separation field 4 is adjoined and it is n.<sup>-</sup>SiO in which n field 307 contained phosphorus between the inside of field 5<sub>2</sub>It is formed by the diffusion from film 309. 307 is formed on all outskirts of a cell. If this structure is used, capacity Cbc between base collectors will become large, but the leakage current between base collectors decreases sharply. Drawing 29 -- beforehand -- insulating field 4 for separation -- Make -- although the example which performs selection epitaxial growth was explained -- high resistance n required on a substrate<sup>-</sup>U group separator art which cuts deeply the portion which should serve as a separation field to mesh state by reactive ion etching, and forms a separation field since epitaxial growth of the layer is carried out (A. Hayasaka et al) "U-groove isolation technique for high speed bipolar VLSI'S'' and Tech.Dig.of IEDM.P.62, 1982, and reference -- To do with -- things are also made. To the field enclosed by the separation field to which the photoelectric conversion device concerning the present invention comprises an insulator, The base area where the field of the most adjoins the semiconductor wafer surface forms the bipolar transistor which it changed into the floating state, By controlling by the electrode which provided the potential of the base area which it changed into the floating state in a part of above-mentioned base area via the thin insulating film, it is a device which carries out photoelectric conversion of the optical information. The emitter field which consists of a high impurity density field is established in a part of base area, and this emitter is connected to the MOS transistor which operates by a level scan pulse. The electrode provided via the thin insulating layer in a part of floating base area mentioned above is connected to the level line. The collector provided in the inside of a wafer may comprise a substrate, and may comprise a high concentration impurities embedding field divided into the opposite electric conduction type high resistance board for every level line depending on the object. When reading a signal to pulse voltage when refreshing floating base area with the electrode provided via the insulating layer, impress-pulses voltage is substantially large. As the train of impulses which waits for two kinds of voltage may actually be used and double capacitor structure explained, it is capacity C of the MOS capacitor electrode for refreshment.<sub>px</sub>It is alike, it compares and is capacity C of the MOS capacitor electrode for read-out.<sub>px</sub>It may enlarge. Accumulate the career in which light excitation was carried out to the floating base area which it changed into the reverse bias state by refreshment pulse impression, the signal based on a lightwave signal is made to memorize, and it is at the time of the signal read-out, The pulse voltage for read-out is impressed so that bias of between base emitters may be deeply carried out to a forward direction, and it is high-speed, and it is the feature to have enabled it to read a signal. If it has such a feature, of course, it is not limited to the structure which could realize the photoelectric conversion device of the present invention with what kind of structure, and was stated to the above-mentioned example. For example, of course, it is the same also with the structure explained in the above-mentioned example, and the structure which the conducted type of current completely reversed. However, it is necessary to reverse the polarity of impressed electromotive force completely at this time. In the structure which the conducted type of current completely reversed, a field becomes n type. That is, the impurities which constitute a base are set to As or P. As and P are Si/SiO when the surface of the field containing As and P is oxidized.<sub>2</sub>A pileup is carried out to the Si side of an interface. That is, the strong drift field which goes to an inside arises from the surface inside a base, it escapes from the hole by which light excitation was carried out from a base to the collector side immediately, and an electron is efficiently accumulated in a base. When a base is p type, the impurities usually used are boron. Since boron will be taken in into an oxide film if thermal oxidation of the p field surface containing boron is carried out, it is Si/SiO.<sub>2</sub>The boron concentration in Si near the interface becomes slightly lower than the boron concentration of an inside. Although this depth is based also on oxide film pressure, it is usually number 100A. Near [ this ] the interface, the electron by which the reverse drift field to an electron arose and light excitation was carried out to this field is in a thicker To be tendency on the surface. In case of as it is, the field which has produced this reverse drift field is n to Along part in the surface, although it becomes an insensible field.<sup>+</sup>Since the field exists in the photoelectric conversion device of the present invention, it is Si/SiO of p field.<sub>2</sub>A I gathered electron is this n to an interface.<sup>+</sup>It flows in, before being re-combined with a field. Therefore, boron is Si/SiO, for example.<sub>2</sub>It is decreasing near the interface, and even if a field which a reverse drift field produces exists, it hardly becomes an insensible field. Rather, such a field is Si/SiO.<sub>2</sub>It is the accumulated hole when it exists in an interface Si/SiO<sub>2</sub>In order to pull away from an interface and to make it make it exist in an inside, the effect that a hole disappears by an interface is lost, the hole storage effect in the base of p layer becomes good, and it is very desirable. Besides [ of the solid imaging device which described the photoelectric conversion device concerning the present invention above ], For example, it is applicable to the photoelectric conversion photographic subject detecting device for autofocus, such as image readers, such as an image reader, a facsimile, a workstation, a digital copier, and a word processor, OCR, a bar code reading device, a camera, a video camera, and an 8-mm camera, etc. As explained above, the photoelectric conversion device of the present invention accumulates the career excited by light by the base area which is a control electrode field which it changed into the floating state. Namely, Base Store Image It is a device which should be called Sensor and calls it BASIS for short. Since the photoelectric conversion device of the present invention can constitute 1 pixel from one transistor, it is very easy to develop, The large dynamic range which there are few Brie ming and smears and is high sensitivity can be simultaneously taken from the structure, and since it is not based on wiring capacity since it has an internal amplifying function, but big signal voltage is generated, it is low recording and has the feature that a peripheral circuit becomes easy. For example, as a future quality solid imaging device, the industrial value is very high.
[Effect of the Invention] According to the present invention, a photoelectric conversion output [ that gain control is possible and high sensitivity ] can be obtained.
[Brief Description of the Drawings]
Drawing 1 shows one example of the present invention, and, as for a sectional view and b, a circuit lineblock diagram and d of the representative circuit schematic and c are [ a ] potential constitutional diagrams. Drawing 2 is a circuit lineblock diagram using the photosensor cell shown in Drawing 1. Drawing 3 and Drawing 6 show the example of others [ Drawing / a pulse shape figure and / 4 ], and Drawing 5 is a circuit lineblock diagram. The circuit lineblock diagram and Drawing 9 of the representative circuit schematic and Drawing 8 showing the example of others [ Drawing / 7 ] are pulse shape figures. From Drawing 10 up to Drawing 13, it is an explanatory view concerning the example of the present invention. Drawing 14 is a circuit diagram of the example of 1 composition of the photoelectric conversion device concerning the present invention. From Drawing 15 up to Drawing 20, it is a figure for explaining the main structure and basic motion of a photosensor cell concerning the present invention. Drawing 15 is a representative circuit schematic at the time of read-out operation, and Drawing 16 is a representative circuit schematic at the time of refreshment operation, The graph which a sectional view and c of a top view and b are representative circuit schematics, and Drawing 17 a reads Drawing 18 with read-out time, and shows a relation with voltage, The graph which Drawing 19 a is read with accumulation voltage, and Drawing 19 b reads a relation with time with bias voltage, and shows a relation with time, respectively, and The 20th figure a~C are graphs which show the relation between refresh time and base potential. From Drawing 21 up to Drawing 23, it is an explanatory view of the photoelectric conversion device of Drawing 14, and is a graph Drawing 21 a shows a pulse timing figure, and Drawing 21 b indicates potential distribution to be at the time of each operation. Drawing 22 is a graph which shows the output voltage from the moment of flowing through the representative circuit schematic related to an output signal, and Drawing 23, with a relation with time. The 24th, 25, and Drawing 26 are circuit diagrams showing other photoelectric conversion devices. Drawing 27 is a top view for explaining the main structures of the modification of the present invention. Drawing 28 is a circuit lineblock diagram of the photoelectric conversion device constituted by the photosensor cell shown in Drawing 27. Drawing 29 and 30 figures are sectional views for the example of 1 manufacturing method of the photoelectric conversion device of the present invention to be shown. 1 ...... silicon, 2 ...... PSG film, 3 ...... insulating oxide film, 4 ...... element isolation region, 5 ...... n<sup>-</sup>A field (collector region), 6 ...... p field (base area), 7, 7' ...... n<sup>+</sup>A field (emitter field), 8 [ ...... n ] ...... Wiring, 9 ...... An electrode, 10 ...... Wiring, 11<sup>+</sup>A field, 12 ...... An electrode, 13 ...... A capacitor, 14 ...... A bipolar transistor, 15, 17 ...... Junction capacity, 16, 18 ...... A diode, 19, 19' ...... A contact part, 20 ...... Light, 28 ...... A perpendicular line, 30 ...... A photosensor cell, 31 ...... A level line, 32 ...... A perpendicular shift register, 33, 35 ...... A MOS transistor, 36, 37 ...... A terminal, 38 ...... A perpendicular line, 39 ...... A level shift register, 40 ...... A MOS transistor, 41 ...... An output line, 42 ...... A MOS transistor, 43 ...... A terminal, 44 ...... A transistor, 45 ...... Load resistance, 46 ...... A terminal, 47 ...... A terminal, 48 ...... A MOS transistor, 49 ...... [ ...... A waveform, 80, 81 / ...... Capacity, 82, 83 / ...... Resistance, 84 / ...... A current source, 100,101,102 / ...... Level shift register, ] A terminal, 61, 62, 63 ...... The section, 64 ...... Collector potential, 67 111,112 ...... An output line, 138 ...... A perpendicular line, 140 [ ...... A photosensor cell 202,203,205 / ...... Base potential, 220 / ...... Embedded / p ] ...... A MOS transistor, 148 ...... A MOS transistor, 150,150' ...... A MOS capacitor, 152,152'<sup>+</sup>A field, 222,225 ...... Wiring, 251 ...... p<sup>+</sup>A field, 252 ...... n<sup>+</sup>A field, 253 ...... Wiring, 300 ...... Amorphous silicone, 302 [ ...... A PSG film, 306 / ...... An interlayer insulation film, 372 / ...... The 1st photo-transistor, 372 / ...... Photo-transistor. ] ...... A nitriding film, 303 ...... A PSG film, 304 ...... Polysilicon, 305
31 members in 5 offices
Members31
| Document | Office | Kind | |
|---|---|---|---|
| EP0132076A1 | European Patent Office (EPO) | A1 | |
| JPS6012759A | Japan | A | |
| JPS6012760A | Japan | A | |
| JPS6012761A | Japan | A | |
| JPS6012762A | Japan | A | |
| JPS6012763A | Japan | A | |
| JPS6012764A | Japan | A | |
| JPS6012765A | Japan | A | |
| US4686554A | United States of America | A | |
| EP0252529A2 | European Patent Office (EPO) | A2 | |
| EP0252530A2 | European Patent Office (EPO) | A2 | |
| EP0252529A3 | European Patent Office (EPO) | A3 | |
| EP0252530A3 | European Patent Office (EPO) | A3 | |
| US4791469A | United States of America | A | |
| CA1257922A | Canada | A | |
| US4916512A | United States of America | A | |
| EP0391502A2 | European Patent Office (EPO) | A2 | |
| EP0391502A3 | European Patent Office (EPO) | A3 | |
| US5128735A | United States of America | A | |
| JPH0447981B2 | Japan | B2 | |
| JPH0447982B2 | Japan | B2 | |
| JPH0447983B2This record | Japan | B2 | |
| JPH0448025B2 | Japan | B2 | |
| JPH0448026B2 | Japan | B2 | |
| JPH0448027B2 | Japan | B2 | |
| US5210434A | United States of America | A | |
| US5563431A | United States of America | A | |
| US5604364A | United States of America | A | |
| EP0132076B1 | European Patent Office (EPO) | B1 | |
| DE3486462D1 | Germany | D1 | |
| DE3486462T2 | Germany | T2 |
Numbers
- Application
- 12075783
Classification
- CPC, 1
- H10F39/197
- IPC, 4
- H01L27 146
- H01L29 76
- H01L29 772
- H04N25 00