Capacitor bank switching unit
Abstract
PURPOSE:To suppress influence of prearc and overcurrent onto the interrupting performance at the time of throw-in by throwing in one phase earlier by a predetermined time than two other phases with no-load and interrupting one phase out of three phases at first. CONSTITUTION:When a throw-in command is provided from a command circuit 9 to a switching unit 7 based on a phase detection output provided from a phase detecting circuit 8, phase A main contact is thrown in at first. At the time of interruption, the command circuit 9 provides an interruption command having a phase controlled to open the phase A contact of the switch unit 7 and phase A is interrupted at first zero point followed by interruption of two other phases with 1/4 cycle time lag. Since phase A is thrown in with no-load, prearc or overcurrent arc is not produced at the time of throw-in and thereby the contact is not damaged. Consequently, influence of withstand voltage drop of switching unit due to prearc or overcurrent at the time of throw-in can be suppressed.
Term
Term ended
Projected expiry passed 4 September 2010, 16.1 years ago.
- Priority and filed
- Published
- Projected expiry
- Today
2 claims: 2 independent, 0 dependent
- 1[Claim(s)] 【特許請求の範囲】
- 23相の電力系統に設置されたコンデンサバンクの投入、遮断に用いるコンデンサバンク開閉用開閉装置であって、 主回路電源における各相間の位相を検出する位相検出回路と、該位相検出回路からの位相検出出力により動作し投入時には3相のうちの1相のみを他の2相よりも所要時間だけ早く投入する投入指令を出力し遮断時には前記早く投入された1相が最初に遮断される遮断指令を出力する指令回路とを有することを特徴とするコンデンサバンク開閉用開閉装置。 In closing mechanism for capacitor bank opening and closing used for an injection of a capacitor bank installed in an electric power system of 3 phases, and interception, Closing mechanism for capacitor bank opening and closing characterized by comprising the following, A phase detector circuit which detects a phase between each phase in a main circuit power supply, An instruction circuit for which 1 phase which outputted injection instructions to which it operates by the phase detection output from the phase detector circuit, and only the time required supplies only 1 phase of the 3 phases early rather than other 2 phases at the time of an injection, and was supplied early [ said ] at the time of interception outputs interception instructions intercepted first.
Independent claims2
6 paragraphs, as filed
[Detailed Description of the Invention]
The object Co of [invention (Field of the Invention) This invention is To use to the injection of the capacitor bank circuit installed as an object for the Power factor improvement of an electric power system, and interception. (PRIOR ART) In order to aim at efficient employment of an electric power system, generally the capacitor bank circuit for Tsunodu Rate is installed. It is important for the closing mechanism used for this capacitor bank circuit to make it not generate in re-Ignition to the voltage built between the closing mechanism electrodes after circuit current interception. This is because there should be a possibility of a Earth fault accident occurring with the surge voltage accompanying it, and resulting in a phase short circuit accident when re-Ignition occurs between electrodes after circuit current interception. It is necessary to apply the closing mechanism of the outstanding performance which re-Ignition does not generate [ Did it carry out? ] in such a capacitor bank circuit. Drawing 4 shows the basic composition of the main circuit when the capacitor bank for a Power factor improvement is installed in the electric power system of 3 phases. In the value of resistance 2 of an electric power system, when L1 closing mechanism is set to 6, the single phase equivalent circuit is shown [ value / of R1 short-circuit reactance 3 / capacity / of Lo and load side capacitor (capacitor for a bank) 4 / inductance / of C1 in-series reactor 5 ] by Drawing 5. When closing mechanism 6 is thrown in here at the time of the voltage maximum of system power supply ], transitional current serves as the maximum, and current 1 is shown by the following formula. i = I m [-5inch omegat+ (epsilon(LIO/omega)-" and sinomegao t] ... (1) here, omega= 1/(0+ -)) Im: The maximum of stationary current alpha: Attenuation factor (-R/2L) Drawing 6 shows each waveform of above-mentioned transitional current, stationary current, and these both composite current. If the ratio of the transitional current wave high price at the time of a closing mechanism injection to a stationary current wave high price is made into an over-current multiple and a relation with the setting capacity (%) of this and an in-series reactor is shown, it will become as it is shown in Drawing 7. In our country, since 6% of in-series reactor 5 of capacitor 4 capacity is inserted, when the peak of stationary current and transitional current overlaps, the maximum current will be about 5 times the stationary current, and the frequency will also usually be about 4 times the fundamental frequency (refer to electric calculation and the August, 1989 item "difficulty of capacitor opening and closing"). Neither a European and American capacitor bank nor the small capacity capacitor opening-and-closing intermediary in the country may install an in-series reactor, and flows into maximum umbrellas in this case in the fault a current whose frequency it is large and is high. For this reason, it is easy to be added in the damage of a closing mechanism main contact fusing, and becomes large in the influence of the interception performance on closing mechanism by the resisting pressure fall accompanying it. In order not to ground the capacitor bank side neutral point at the time of interception of 3 phase capacitor bank circuit, Extinguishing conditions or the satisfied phase is intercepted first, and other two phases form a single phase circuit, pass 1/4 cycle after the 1st phase interception, and are intercepted in the 2nd phase and the 3rd phase. Recovery voltage eR between closing mechanism poles of the 1st phase of interception at this time becomes like a following formula. eR-(3/2) Em (1-CO3c+, +t) - (2) -- here -- Em:phase voltage wave high price -- above the -- although 1/4 cycle passes after 1 phase interception and it is intercepted in the 2nd phase and the 3rd phase, the recovery voltage of each phase becomes as it is shown in Drawing 8 -- the [ interception ] -- 1 phase The reaches in 1/2 cycles at maximum 2.5Em. (An invention or the issue which it is going to solve) As mentioned above, in the conventional closing mechanism, a difference is in the value by circuit composition of a capacitor bank circuit, or it flows in excessive transitional current at the time of an injection, and generates in the phenomenon of the capacitor bank circuit characteristic that the voltage of 2.5 times or more of a phase voltage wave high price takes between the closing mechanism electrodes of the 1st phase of interception at the time of interception. And at the time of an injection, the case where the phase into which the greatest transitional current flowed into among 3 phase, and the greatest transitional current flowed turns into the 1st phase of interception serves as the severest conditions for closing mechanism, and the influence on the interception performance by the transitional current at the time of an injection becomes the largest. Then, an object of this invention is to provide the influence on the interception performance by the transitional current at the time of an injection, or the few and reliable closing mechanism for capacitor bank opening and closing.
[Elements of the Invention] (Means for solving problem) A phase detector circuit where it is the closing mechanism for capacitor bank opening and closing used for an injection of a capacitor bank installed in an electric power system of 3 phases, and interception in order that this invention may solve the above-mentioned subject, and at least that between each phase in a main circuit power supply detects mouth 1, 1 phase which outputted injection instructions only whose 1 phase of the 3 phases operate by the phase detection output from the phase detector circuit, and only the time required supplies early rather than other 2 phases at the time of an injection, and was supplied early [ the ] at the time of interception makes it a gist to have an instruction circuit which outputs interception instructions intercepted first. (OPERATION) By the above-mentioned composition, at the time of an injection, 2 phases of others [ phase / of the 3 phases / 1 ] are supplied, and it twists, and it is no-load, and is supplied, micro current tries to flow through the Storey capacitance, and excessive transitional current does not flow. Therefore, there is no generating of an arc by the Blair~Ri and transitional current, and this does not receive damage to a point of contact. Since it is considered as 1 phase of this 3 phase, or the 1st phase of interception, and the biggest voltage of 2 or 5 times or more of a phase voltage wave high price takes at the time of interception or this 1st phase of interception does not receive damage by transitional current etc. as mentioned above, influence on interception performance by fault a current at the time of an injection as the whole closing mechanism is suppressed few. (EXAMPLE) Hereinafter, an example of this invention is described based on Drawings 1 thru/or 3. In Drawing 1, the same explanation as circuit apparatus, a circuit element, etc. in the Drawings 4 and 5 that showed an equivalent thing by the same numerals as the above by being and carrying out, and overlapped is omitted. A phase detector circuit which detects a phase between each phase [ in / 7 can be set on a main part of closing mechanism, and / in 8 / three-phase alternating current from system power supply (main circuit power supply) 1 ] in Drawing 1, 9 is 1 phase which outputted injection instructions only whose 1 phase of the 3 phases operate by the phase detection output from this phase detector circuit 8, and only the time required supplies early rather than other 2 phases at the time of an injection, and was supplied early [ above ] at the time of interception, or an instruction circuit which outputs interception instructions intercepted by the beginning, Each main contact of A phase in main part 7 of closing mechanism, B phase, and C phase is controlled by an instruction output from instruction circuit 9. Drawing 2 shows the opening-and-closing characteristic of main part 7 of closing mechanism by an instruction output from instruction circuit 9, and each main contact of B phase and C phase which is other 2 phases is supplied [ 10~15 m5 ] to A phase main contact whose main contact operation at the time of an injection is 1 phase of the 3 phases. Next, an operation of closing mechanism for capacitor bank opening and closing constituted as mentioned above is explained. If it is taken out from instruction circuit 9 in injection instructions by main part 7 of closing mechanism based on a phase detection output from phase detector circuit 8 in Drawing 1, A phase main contact will be supplied first. In this case, since a main contact of other 2 phases of B phase and C phase is not supplied, A phase is no-load, it is supplied, and transitional current does not flow only by micro current flowing through the Storey capacitance. There is nothing in generating of an arc according to a pre arc and transitional current once carried out, and this does not receive damage to a main contact. After A phase main contact is supplied, when a main contact of other 2 phases of B phase and C phase is supplied after 10~15-m5, while a pre arc occurs, it flows in circuit current which transitional current superimposed, but it will already be in an injection state and a ing A phase is that circuit current flows. At the time of interception, A phase main contact in main part 7 of closing mechanism or interception instructions by which phase control was carried out to main part 7 of closing mechanism so that it might open are issued between time [ to be shown in Drawing 3 from instruction circuit 9 ] tl-t2. Generally circuit current of a capacitor hanging circuit is a comparatively small value, the first zero point The A phase is intercepted, and other 2 phases are intercepted after 1/4 cycles. As shown in Drawing 8, voltage between A phase poles of the 1st phase of interception turns into the biggest recovery voltage in 3 phases after 1/2 cycles at maximum 2.5Em (the maximum of other 2 phases is 1.87Em). However, since A phase is no-load, it is supplied, there is no generating of a pre arc at the time of an injection and an arc by transitional current and there is no damage to a point of contact by this, as mentioned above, As a whole, good capacitor bank opening-and-closing performance in which there is no influence for interception performance due to a resisting pressure fall of closing mechanism by generating of a pre arc at the time of an injection, transitional current, etc. is got. In an above-mentioned example, the no-load injection of the A phase is carried out, and if a phase which explained a case where it was considered as the 1st phase of interception, and carried out the no-load injection also of the In phase of each-other gap is made into the 1st phase of interception, it will be obtained in good performance like the above.
Effect Co of [invention As explained above, in order according to this invention only the time required is early more nearly no-load than other 2 phases, to supply 1 phase of the 3 phases at the time of an injection and to make 1 phase of that 3 phase into the 1st phase of interception at the time of interception, It can do [ getting good capacitor bank opening-and-closing performance with little influence for a pre arc at the time of an injection, and interception performance by transitional current, or ].
[Brief Description of the Drawings]
Drawings 1 thru/or 3 show the example of the closing mechanism for capacitor bank opening and closing concerning this invention, The circuit lineblock diagram in which Drawing 1 shows a main circuit and a control circuit, the timing chart Drawing 2 indicates the no-load opening-and-closing characteristic of A phase main contact to be, In the wave form chart and Drawings 4 or 8 showing 3 phase current wave type for explaining a barrier property, Drawing 3 shows the conventional closing mechanism, The wave form chart in which the circuit diagram and Drawing 5 in which Drawing 4 shows a main circuit show the single phase equivalent circuit of a main circuit, and Drawing 6 shows the transitional current at the time of an injection, etc., the characteristic figure in which Drawing 7 shows the relation between in-series reactor Installation volumeM (%) and an over-current multiple, and Drawing 8 are figures showing the relation between the lapsed time at the time of 3 phase circuit interception, and a recovery voltage. 1: A system power supply (main circuit power supply), 7, main part of closing mechanism 8: A phase detector circuit, 9: Instruction circuit.
Every citation, both ways
| Document | Relation | Office | Cited during |
|---|---|---|---|
| US6367246B1 | Cited by | United States of America | Applicant |
| US6367246B1 | Cited by | United States of America | Applicant |
| JP2004180401A | Cited by | Japan | Search report |
3 priority claims, no other members on record
Priority claims3
| Document | Office | Kind | Date |
|---|---|---|---|
| 23241390 | Japan | A | |
| 2232413 | – | – | – |
| JP19900232413 | – | – | – |
Numbers
- Publication
- 4-117136
- Publication, DOCDB
- H04117136
- Publication, EPODOC
- JPH04117136
- Application
- 2232413
- Application, DOCDB
- 23241390
- Application, EPODOC
- JP19900232413
Titles2
- English
- CAPACITOR BANK SWITCHING UNIT
- Japanese
- 【発明の名称】コンデンサバンク開閉用開閉装置
Classification
- CPC, 2
- F02B2075/027
- Y02E40/30
- IPC, 2
- H02J3 18
- F02B75 02