Electronic device manufacturing system

CROSS-REFERENCE TO RELATED APPLICATIONS [0001] This application claims priority to U.S. Provisional Patent Application No. 61/882,795, filed September 26, 2013, entitled "MIXED-PLATFORM APPARATUS, SYSTEMS, AND METHODS FOR SUBSTRATE PROCESSING" (Docket No. 21215/L), the contents of which are incorporated herein by reference for all purposes.

[0002] The present invention relates generally to electronics manufacturing, and more specifically to mixed platform apparatus, systems, and methods for substrate processing.

[0003] A conventional electronics manufacturing system may include a mainframe around which a number of processing chambers and load lock chambers are arranged. The mainframe may have several side walls (commonly referred to as "facets") to which a typically equal number of generally equal-sized processing chambers and/or load lock chambers are coupled. For example, the mainframe may have four facets, a first facet may have two load lock chambers coupled thereto, and the other three facets may each have two generally equal-sized processing chambers coupled thereto. Such a mainframe configuration is typically provided to allow for the various processing chambers and/or load lock chambers to be selectively and interchangeably arranged around the mainframe. However, the types and sequences of substrate processing that may be performed within the electronics manufacturing system may be limited by such a mainframe configuration.

[0004] Therefore, there is a need for an apparatus, system, and method for providing alternative substrate processing mainframe configurations.

According to a first aspect, an electronics manufacturing system is provided, the electronics manufacturing system comprising: a mainframe comprising a transfer chamber and a plurality of facets defining sidewalls of the transfer chamber, each of the plurality of facets configured to be coupled to one or more processing chambers or load lock chambers, each of the plurality of facets having one or more substrate access ports, a first facet of the plurality of facets having a first number of substrate access ports and a second facet of the plurality of facets having a second number of substrate access ports, the second number different from the first number.

According to a second aspect, another electronics manufacturing system is provided, the electronics manufacturing system including a mainframe including a transfer chamber and a plurality of facets defining a sidewall of the transfer chamber, a first processing chamber coupled to a first facet of the plurality of facets and having a first facet-side dimension, and a second processing chamber coupled to a second facet of the plurality of facets and having a second facet-side dimension different than the first facet-side dimension.

According to a third aspect, there is provided a method of assembling an electronics manufacturing system, the method including providing a mainframe including a transfer chamber and a plurality of facets defining sidewalls of the transfer chamber, coupling a first chamber to a first facet of the plurality of facets, the first chamber having a first facet-side dimension, and coupling a second chamber to a second facet of the plurality of facets, the second chamber having a second facet-side dimension different from the first facet-side dimension.

[0008] Further aspects, features, and advantages of embodiments of the present invention may become readily apparent from the following detailed description, in which numerous exemplary embodiments and implementations, including the best mode contemplated for carrying out the invention, are described and illustrated. The present invention may further include other and different embodiments, and its several details may be modified in various aspects, all without departing from the scope of the present invention. Accordingly, the drawings and description should be regarded as illustrative in nature, and not as restrictive. The present invention includes all modifications, equivalents, and alternatives falling within the scope of the present invention.

[0009] The drawings described below are for illustration purposes only and are not necessarily to scale. They are not intended to limit the scope of the present disclosure in any way.

<figref num="1">FIG. 1 shows a schematic top view of an electronics manufacturing system according to the prior art.</figref><figref num="2">FIG. 1 illustrates a schematic top view of a mixed platform electronics manufacturing system according to an embodiment.</figref><figref num="3">FIG. 3 illustrates a simplified partial orthographic view of the mainframe facet of FIG. 2 according to an embodiment.</figref><figref num="4">1 illustrates a flow diagram of a method for assembling an electronics manufacturing system according to an embodiment.</figref>

[0014] Reference will now be made in detail to the exemplary embodiments of the present disclosure, which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers will be used throughout the drawings to refer to the same or like parts.

In one aspect, an electronics manufacturing system may include a mainframe having a number of facets that define a transfer chamber and sidewalls of the transfer chamber. In some embodiments, the mainframe may have a square or rectangular shape. One or more load lock chambers may be coupled to one facet of the mainframe, and one or more processing chambers may be coupled to each of the other facets of the mainframe. The processing chambers may perform various substrate processes, and the processing chambers coupled to different facets need not be the same size. Furthermore, each mainframe facet may not be configured to be coupled to an equal number of processing chambers and/or load lock chambers. For example, one facet may be configured to be coupled to only one processing chamber of a first size, a second facet may be configured to be coupled to two processing chambers, each of the second sizes being different from the first size, etc. One or more substrate access ports on each facet may interface each of the load lock chambers and processing chambers with the transfer chamber, thereby allowing substrates to be transferred therebetween. Substrate access ports may be sized and positioned on each facet to accommodate the number and size of chambers that may be coupled to each facet. An electronics manufacturing system having such a mainframe may enable a wider range and more diverse sequences of substrate processing to be performed in a single system, thus increasing the versatility, capacity, and/or efficiency of such an electronics manufacturing system. In another aspect, a method of assembling an electronics manufacturing system is provided, as described in more detail below in connection with Figures 1-4.

[0016] Figure 1 illustrates an example of a known electronics manufacturing system 100 according to the prior art. The electronics manufacturing system 100 may include a main frame 102 configured to process substrates and having four facets 104a-d. The main frame 102 may include a transfer chamber 106, and the facets 104a-d may define sidewalls of the transfer chamber 106. The facets 104a-d may each have a pair of substrate access ports 105 and are configured to allow horizontally oriented substrates to pass through. The substrates 108 may be semiconductor wafers, glass plates or panels, and/or other workpieces used to make electronic devices or circuit components. Each substrate access port 105 may be, for example, an elongated slot or slit formed in a sidewall of the transfer chamber 106 and may include, for example, a slit valve or other suitable device for opening and closing the substrate access port 105.

[0017] Each of the facets 104a-d may be coupled to a respective set of processing chambers 110 or load lock chambers 114. Each processing chamber 110 and load lock chamber 114 may have a chamber port corresponding to the respective substrate access port 105. The transfer chamber 106, processing chambers 110, and/or load lock chambers 114 may each operate at vacuum pressure. Each processing chamber 110 may perform the same or different processes on the substrate 108, including, for example, deposition, oxidation, nitridation, etching, polishing, cleaning, lithography, etc. Other processes may also be performed therein.

[0018] The mainframe 102 may further include a robot assembly 118 in the transfer chamber 106. The robot assembly 118 may be configured to transfer one or more substrates 108 to and from each of the processing chambers 110 and the load lock chambers 114. The load lock chambers 114 may be coupled to a factory interface 120 that may be coupled to one or more FOUPs (Front Opening Unified Pods) 122. The FOUPs 122 may each be a container with a cassette mounted therein for holding multiple substrates. The FOUPs 122 may each have a front opening interface configured for use with the factory interface 120. The factory interface 120 may include a buffer chamber 124 and one or more robot assemblies (not shown) configured to transfer substrates via linear, rotational, and/or vertical motion between the FOUPs 122 and the load lock chambers 114. Substrates may be transferred between the FOUPs 122 and the load lock chambers 114 in any order or orientation. The load lock chamber 114 may be a batch or single substrate load lock chamber. A controller 126 may control the operation of the robot assembly 118 and/or the electronic manufacturing system 100.

[0019] As shown, the mainframe 102 has approximately equal sized processing chambers 110 coupled to the facets 104a-c, equal in number to the number of processing chambers coupled to each facet 104a-c, as well as a load lock chamber 114 typically coupled to facet 104d. The substrate access ports 105 are also typically the same size, and each facet 104a-d typically has the same number of substrate access ports 105. In other known electronics manufacturing systems, the mainframe may be configured with other equal numbers of chambers coupled to each facet, such as, for example, three load lock chambers coupled to one facet and three processing chambers coupled to each of the other facets. Such known electronics manufacturing systems having a generally symmetrical mainframe configuration of load lock chambers and processing chambers may be limited in the types and sequences of substrate processing that may be performed in a single electronics manufacturing system.

2 illustrates an electronics manufacturing system 200 according to one or more embodiments. The electronics manufacturing system 200 may be configured to process multiple substrates 108 simultaneously. The electronics manufacturing system 200 may include a main frame 202 having four facets 204a-d. The main frame 202 may include a transfer chamber 206, and the facets 204a-d may define sidewalls of the transfer chamber 206. The main frame 202 may have a generally square or rectangular shape. In other embodiments, the main frame 202 may have other suitable shapes and/or numbers of facets.

[0021] In some embodiments, facet 204a may have a set of substrate access ports 205a, facet 204b may have three substrate access ports 205b (only one is labeled), facet 204c may have one substrate access port 205c, and facet 204d may have three substrate access ports 205d (two are labeled). Each substrate access port 205a-d is configured to allow a horizontally oriented substrate 108 to pass therethrough. Each substrate access port 205a-d may be, for example, an elongated slot or slit formed in a sidewall of transfer chamber 206. Each substrate access port 205a-d may include a slit valve configured to open and close the substrate access port 205a-d, respectively. The slit valve may be any suitable conventional structure, such as, for example, an L-motion slit valve. Other suitable devices may be used to open and close the substrate access ports 205a-d.

[0022] Each substrate access port 205a-d may be of different sizes. For example, as shown in Figures 3A-3D, each substrate access port 205a may have a width W305a, each substrate access port 205b may have a width W305b, and each substrate access port 205c may have a width W305c. Width W305a may be different from width W305b, and width W305c may be different from width W305a and different from width W305b. Each substrate access port 205d, labeled 305d1-d6 in Figure 3D (and as further described below in connection with load lock chambers 214, 215, and 216), may have a respective width W305d. Width W305d may be the same as or different from width W305b. The width of each substrate access port 205a-d is at least wide enough to allow a substrate 108 to pass through. Substrate access ports of different sizes may allow the robot assembly 218 to reach different areas within a chamber coupled to one of the facets 204a-d. In some embodiments where a facet has more than one substrate access port, the substrate access ports may not be centered laterally within the facet and/or may not be spaced equidistant from each other as shown in Figures 3A and 3B. In some embodiments where a facet has a single substrate access port, the substrate access port may be centered laterally within the facet, for example, or may be offset as shown in Figures 2 and 3C.

[0023] In other embodiments, each facet 204a-d may have other numbers, sizes, and/or combinations of substrate access ports than those shown in Figures 2 and 3A-3D, provided that the width of the facet is appropriate to accommodate the number, size, and/or combination of substrate access ports. For example, in some embodiments, facet 204b may have one substrate access port 205c instead of three substrate access ports 205b. In other embodiments, one facet may have one substrate access port 205a and one substrate access port 205b, while another facet may have one substrate access port 205b and one substrate access port 205c. Various combinations of substrate access ports may be possible, provided the facets have appropriate widths. This allows the mainframe 202 to be customized to couple to the specific types and numbers of desired processing and load lock chambers, as described below.

[0024] Returning to Figure 2, each facet 204a-d may be coupled to one or more processing chambers or load lock chambers. The transfer chamber 206 and each processing chamber and load lock chamber may operate at vacuum pressure. In some embodiments, each processing chamber may represent a different stage or aspect of substrate processing. In other embodiments, two or more processing chambers may perform the same process for simultaneous parallel substrate processing, thereby improving substrate throughput within the electronics manufacturing system 200.

[0025] In some embodiments, the facet 204a may be coupled to a set of processing chambers 210, which may be similar to or identical to the processing chambers 110. The processing chambers 210 may each be approximately the same size and may perform the same or different substrate processes, such as, for example, etching, chemical vapor deposition, or physical vapor deposition. Other processes may be performed by one or both of the processing chambers 210. Each processing chamber 210 may have a chamber port corresponding to the respective substrate access port 205a. The processing chambers 210 may each have a facet-side dimension, which in some embodiments may be the width W204a of the processing chamber 210 (only one processing chamber 210 is labeled). In some embodiments, the width W204a may be, for example, about 1.2 meters. The facet-side dimension may alternatively be a width W305a (FIG. 3A), which may correspond to the chamber port width of the processing chamber 210.

[0026] In some embodiments, the facet 204b may be coupled to a processing chamber 211. The processing chamber 211 may be a triple pedestal chamber (i.e., may accept up to three substrates 108 for simultaneous parallel processing). The processing chamber 211 may have three chamber ports corresponding to the three substrate access ports 205b, respectively. The processing chamber 211 may have a facet-side dimension, which in some embodiments may be a width W204b of the processing chamber 211. In some embodiments, the width W204b may be, for example, about 2.4 meters, and the width of the facet 204b may also be at least about 2.4 meters. The facet-side dimension of the processing chamber 211 may alternatively be a width W305b (FIG. 3B), which may correspond to the chamber port width of the processing chamber 211. In some embodiments, the processing chamber 211 may be a DSM (dielectric systems and modules). The processing chamber 211 may be a processing chamber of any other suitable type.

[0027] In an alternative embodiment, facet 204b may be coupled to three processing chambers (as indicated by the dotted line dividing processing chamber 211 into three processing chambers 211a, 211b, and 211c). In such an alternative embodiment, each one of the three processing chambers 211a, 211b, and 211c may have a facet-side dimension that may be about one-third of width W204b, which may be about 800 mm in some embodiments. The facet-side dimension of each of processing chambers 211a, 211b, and 211c may alternatively be width W305b (FIG. 3B), which may correspond to the chamber port width of processing chambers 211a, 211b, and 211c. Each of the three processing chambers 211a, 211b, and 211c may perform the same substrate process or different substrate processes.

[0028] In some embodiments, facet 204c may be coupled to processing chamber 212. Processing chamber 212 may be larger than processing chambers 210 and/or 211 and may have a chamber port corresponding to substrate access port 205c. Processing chamber 212 may have a facet-side dimension, which in some embodiments may be width W204c of processing chamber 212. In some embodiments, width W204c may be greater than about 1.2 meters and less than the width of facet 204c, which in some embodiments may be about 2.4 meters. The facet-side dimension of processing chamber 212 may alternatively be width W305c (FIG. 3B), which may correspond to the chamber port width of processing chamber 212. In some embodiments, processing chamber 212 may be an epitaxial chamber. In other embodiments, processing chamber 212 may be any other suitable type of processing chamber.

In some embodiments, facet 204d may be coupled to load lock chambers 214, 215, and 216. Load lock chambers 214, 215, and 216 may be batch or single substrate load lock chambers. In some embodiments, load lock chamber 214 may be a stacked load lock chamber, load lock chamber 215 may be a triple stacked load lock chamber, and load lock chamber 216 may be a single volume load lock chamber. Each load lock chamber 214, 215, and 216 may have one or more chamber ports corresponding to the respective substrate access port 205d. For example, as shown in FIG. 3D, stacked load lock chamber 214, which may have two separate substrate volumes, may have two vertically oriented chamber ports corresponding to substrate access ports 305d1 and 305d2, respectively. Triple stacked load lock chamber 215, which may have three separate substrate volumes, may have three vertically oriented chamber ports corresponding to substrate access ports 305d3, 305d4, and 305d5, respectively. Single volume load lock chamber 216 may have a single chamber port corresponding to substrate access port 305d6. In other embodiments, any one or more of load lock chambers 214, 215, and/or 216 may be stacked load lock chambers, triple stacked load lock chambers, and/or single volume load lock chambers. Additionally, in some embodiments, any one or more of the load lock chambers 214, 215, and/or 216 may be chambers with processing capabilities, i.e., any one or more of the load lock chambers 214, 215, and/or 216, or any one of the volumes located therein, may be capable of performing substrate pre-heating, mitigation, or cooling processes.

[0030] The main frame 202 may further include a robot assembly 218 within the transfer chamber 206. The robot assembly 218 may be configured to transfer one or more substrates 108 to/from each of the process chambers 210, 211 (alternatively 211a-c), and 212, and the load lock chambers 214, 215, and 216. The robot assembly 218 may be configured to transfer the substrates 108 directly from any one chamber to any other chamber of the main frame 202. In some embodiments, the substrates 108 may be transferred by the robot assembly 218 in any order or direction. In some embodiments, the robot assembly 218 may have dual transport blades that can extend and retract independently into/out of any chamber of the main frame 202, allowing for simultaneous parallel substrate transfers, thereby increasing system throughput. In some embodiments, the robot assembly 218 may have only a single transport blade and/or may be a SCARA (Selectively Adaptive Articulated Robot Arm) robot. Alternatively, the robot assembly 218 may be any suitable mechanism for transferring substrates between the chambers of the mainframe 202 .

[0031] In some embodiments, the processing chambers 210, 211 (alternatively 211a-c), and 212 may be positioned relative to one another to minimize the movement of the robot assembly 218 and the transfer time of the substrate 108 moving from one chamber to the next. Such positioning may increase substrate throughput and improve yield by reducing the time between subsequent processes and the potential for particulate contamination during substrate transfer.

[0032] The load lock chambers 214, 215, and 216 may be coupled to a factory interface 220, and a first vacuum interface may be provided between the factory interface 220 and the transfer chamber 206. In some embodiments, the load lock chambers 214, 215, and 216 may increase substrate throughput by alternately communicating with the transfer chamber 206 and the factory interface 220, respectively. That is, one load lock chamber 214, 215, or 216, or any one volume of the stacked or triple stacked load lock chambers, may communicate with the transfer chamber 206, while the other load lock chamber 214, 215, or 216, or any other volume of the stacked or triple stacked load lock chambers, may communicate with the factory interface 220. Substrate transfer between the factory interface 220, the load lock chambers 214, 215, or 216, and the transfer chamber 206 may be performed in any other suitable manner.

[0033] The factory interface 220 may be coupled to one or more FOUPs (Front Opening Unified Pods) 222. The FOUPs 222 may each be a container with a cassette mounted therein for holding a number of substrates. The FOUPs 222 may each have a front opening interface configured for use with the factory interface 220. In other embodiments, any suitable type of pod and/or load port may be used in place of the FOUPs 222. The factory interface 220 may include a buffer chamber 224 and one or more robot assemblies (not shown) configured to transfer substrates via linear, rotational, and/or vertical motion between the FOUPs 222 and the load lock chambers 214, 215, and 216. Substrates may be transferred between the FOUPs 222 and the load lock chambers 214, 215, and 216 in any order or orientation.

[0034] Electronics manufacturing system 200 may have other suitable numbers of FOUPs 222 and/or load lock chambers. In some embodiments, the number of load lock chambers coupled to facet 204d may be independent of the number of processing chambers coupled to any one of facets 204a-c. For example, the number of load lock chambers may be different from the maximum number of processing chambers coupled to a facet. Further, in some embodiments, up to four processing chambers may be coupled to a single facet, depending on the size of main frame 202 relative to the size of the four processing chambers. In some embodiments, main frame 202 may not have a chamber coupled to each chamber location located on facets 204a-d.

[0035] The controller 226 may control the processing and transfer of substrates 108 in and through the electronics manufacturing system 200. The controller 226 may be, for example, a general purpose computer and/or may include a microprocessor or other suitable CPU (Central Processing Unit), memory for storing software routines that control the electronics manufacturing system 200, input/output peripherals, and supporting circuitry (e.g., power supplies, clock circuits, robot assembly 218 drive circuitry, cache, and/or the like). The controller 226 may be programmed to process one or more substrates sequentially, for example, through each of the processing chambers 210, 211 (alternatively, 211a-c), and 212. In other embodiments, the controller 226 may be programmed to process substrates in any desired order through the processing chambers 210, 211 (alternatively, 211a-c), and 212. In still other embodiments, controller 226 may be programmed to omit and/or repeat processing of one or more substrates in one or more of processing chambers 210, 211 (alternatively, 211a-c), and 212. Controller 226 may alternatively be programmed to process one or more substrates in electronics manufacturing system 200 in any suitable manner.

[0036] In some embodiments, two electronics manufacturing systems 200 may be clustered, i.e., one facet of each mainframe 202, e.g., facet 204b of the first mainframe 202 and facet 204d of the second mainframe 202, may be coupled to the same pass-through chamber for transferring substrates between the two electronics manufacturing systems 200. This may further increase the versatility, capacity, and/or efficiency of such an electronics manufacturing system.

[0037] Figure 4 illustrates a method 400 of assembling an electronics manufacturing system according to one or more embodiments. At process block 402, the method 400 may include providing a mainframe having a transfer chamber and a number of facets that define sidewalls of the transfer chamber. For example, the mainframe may be the mainframe 202 of Figure 2 having facets 204a-d that define sidewalls of the transfer chamber 206.

[0038] In processing block 404, a first chamber may be coupled to a first facet of the main frame. The first chamber may have a first facet-side dimension. The first facet-side dimension may be, for example, a facet-side width of the chamber or a width of a substrate access port for the first chamber. In some embodiments, the first chamber may be, for example, a processing chamber 210 coupled to facet 204a, and the first facet-side dimension may be a width W204a of the processing chamber 210 or a width W305a of the substrate access port 205a.

[0039] In processing block 406, the method 400 may include coupling a second chamber to a second facet of the mainframe. The second chamber may have a second facet-side dimension that is different from the first facet-side dimension. The second facet-side dimension may be, for example, a facet-side width of the chamber or a width of a substrate access port for the second chamber. In some embodiments, the second chamber may be, for example, a processing chamber 212 coupled to facet 204c, and the second facet-side dimension may be a width W204c of the processing chamber 212 or a width W305c of the substrate access port 205c.

[0040] The above processing blocks of method 400 may be executed or performed in any order or sequence not limited to that shown and described. For example, in some embodiments, processing block 404 may be executed after processing block 406 or simultaneously with processing block 406.

[0041] Those skilled in the art should readily appreciate that the embodiments of the invention described herein are susceptible of a wide range of utility and applications. Numerous embodiments and adaptations of the invention other than those described herein, as well as numerous variations, modifications, and equivalent arrangements, will be apparent or reasonably suggested from the invention and the above description of the invention, without departing from the spirit or scope of the invention. For example, although an exemplary mixed platform electronics manufacturing system is shown in FIG. 2, other suitable configurations of mixed platform processes and load lock chambers may be used in an electronics manufacturing system in accordance with one or more embodiments of the invention. Thus, while the invention has been described in detail herein with reference to specific embodiments, it should be understood that the disclosure is by way of example only and is made merely to present examples of the invention and to provide a complete and enabling disclosure of the invention. The disclosure is not intended to be limited to the particular apparatus, equipment, assemblies, systems, or methods disclosed, but on the contrary, is intended to cover all modifications, equivalents, and alternatives falling within the scope of the invention.

<u style="Single">The present application also includes the aspects described below.</u><u style="Single">(Aspect 1)</u><u style="Single"> An electronics manufacturing system, comprising:</u><u style="Single"> a mainframe comprising a transfer chamber and a plurality of facets defining sidewalls of the transfer chamber, each of the plurality of facets configured to be coupled to one or more processing chambers or load lock chambers, each of the plurality of facets having one or more substrate access ports;</u><u style="Single"> a first facet of the plurality of facets having a first number of substrate access ports; and</u><u style="Single"> An electronics manufacturing system, wherein a second facet of the plurality of facets has a second number of substrate access ports, the second number different from the first number.</u><u style="Single">(Aspect 2)</u><u style="Single"> 2. The electronics manufacturing system of claim 1, wherein a third facet of the plurality of facets has a third number of substrate access ports, the third number different from the first number and different from the second number.</u><u style="Single">(Aspect 3)</u><u style="Single"> The electronics manufacturing system of aspect 1, wherein a first substrate access port of a first facet of the plurality of facets has a first size and a second substrate access port of a second facet of the plurality of facets has a second size, the second size being different from the first size.</u><u style="Single">(Aspect 4)</u><u style="Single"> The electronic device manufacturing system of claim 3, wherein a third substrate access port of a third facet of the plurality of facets has a third size, the third size being different from the first size and different from the second size.</u><u style="Single">(Aspect 5)</u><u style="Single"> An electronics manufacturing system, comprising:</u><u style="Single"> a main frame including a transfer chamber and a plurality of facets defining sidewalls of the transfer chamber;</u><u style="Single"> a first processing chamber coupled to a first of the plurality of facets and having a first facet-side dimension; and</u><u style="Single"> a second processing chamber coupled to a second of the plurality of facets and having a second facet-side dimension different than the first facet-side dimension;</u><u style="Single">An electronic device manufacturing system comprising:</u><u style="Single">(Aspect 6)</u><u style="Single"> The electronics manufacturing system of aspect 5, further comprising a third processing chamber coupled to a third facet of the plurality of facets, the third processing chamber having a third facet-side dimension different from the first facet-side dimension and different from the second facet-side dimension.</u><u style="Single">(Aspect 7)</u><u style="Single"> 6. The electronics manufacturing system of embodiment 5, wherein a first facet of the plurality of facets is coupled to a different number of processing chambers than a second facet of the plurality of facets.</u><u style="Single">(Aspect 8)</u><u style="Single"> 8. The electronics manufacturing system of claim 7, wherein the second facet of the plurality of facets is coupled to a different number of processing chambers than the third facet of the plurality of facets, and the third facet of the plurality of facets is coupled to a different number of processing chambers than the first facet of the plurality of facets.</u><u style="Single">(Aspect 9)</u><u style="Single"> The electronics manufacturing system of aspect 5, wherein a fourth processing chamber and a fifth processing chamber are coupled to the first facet of the plurality of facets, and the fourth processing chamber and the fifth processing chamber each have a facet-side dimension approximately equal to the first facet-side dimension of the first processing chamber.</u><u style="Single">(Aspect 10)</u><u style="Single"> The electronics manufacturing system of aspect 5, wherein a plurality of load lock chambers are coupled to a fourth facet of the plurality of facets, and at least one of the plurality of load lock chambers is a stacked load lock chamber, a triple stacked load lock chamber, or a load lock chamber having processing capabilities.</u><u style="Single">(Aspect 11)</u><u style="Single"> 1. A method of assembling an electronics manufacturing system, comprising:</u><u style="Single"> providing a main frame comprising a transfer chamber and a plurality of facets defining sidewalls of the transfer chamber;</u><u style="Single"> coupling a first chamber to a first facet of the plurality of facets, the first chamber having a first facet-side dimension; and</u><u style="Single"> coupling a second chamber to a second facet of the plurality of facets, the second chamber having a second facet-side dimension different than the first facet-side dimension;</u><u style="Single">A method comprising:</u><u style="Single">(Aspect 12)</u><u style="Single"> 12. The method of embodiment 11, wherein the first chamber and the second chamber are each processing chambers for processing one or more substrates.</u><u style="Single">(Aspect 13)</u><u style="Single"> The method of embodiment 11, further comprising connecting a third chamber to a third facet of the plurality of facets, the third chamber having a third facet-side dimension different from the first facet-side dimension and different from the second facet-side dimension.</u><u style="Single">(Aspect 14)</u><u style="Single"> The method of embodiment 11, further comprising coupling a plurality of load lock chambers to a fourth facet of the plurality of facets, at least one of the load lock chambers being a stacked load lock chamber, a triple stacked load lock chamber, or a load lock chamber having processing capabilities.</u><u style="Single">(Aspect 15)</u><u style="Single"> coupling a fourth chamber and a fifth chamber to the first facet of the plurality of facets, the fourth chamber and the fifth chamber each having a facet-side dimension approximately equal to the first facet-side dimension of the first chamber; and</u><u style="Single"> coupling a sixth chamber to the second facet of the plurality of facets, the sixth chamber having a sixth facet-side dimension approximately equal to the second facet-side dimension of the second chamber;</u><u style="Single">12. The method of embodiment 11, further comprising:</u>