Electronic device and electronic apparatus
2 claims: 2 independent, 0 dependent
- 1基 板と、 前 記基 板上の、第1のトランジスタと、第2のトランジスタと、容量素子と、EL素子と、を有する画素と、 前記画素を挟んで前 記基 板と対向する カバー材 と、を有し、 前記EL素子は、前記第1のトランジスタのソース又はドレインの一方と電気的に接続され、 前記第1のトランジスタのソース又はドレインの他方は、 電流供給 線と電気的に接続され、 前記第2のトランジスタのソース又はドレインの一方は、前記第1のトランジスタのゲートと電気的に接続され、 前記容量の一方の端子は、前記第2のトランジスタのソース又はドレインの一方と電気的に接続され、 前記容量の他方の端子は、前記 電流供給 線と電気的に接続され、 前記第2のトランジスタは、第1の多結晶シリコン領域と、前記第1の多結晶シリコン領域上の第1の絶縁膜と、前記第1の絶縁膜上のゲートと、を有し、 前記第1の多結晶シリコン領域は、第2の多結晶シリコン領域と同一の半導体膜に含まれ、 前記第2の多結晶シリコン領域は、前記第1の絶縁膜を介して、第1の導電膜と重なり、 前記第1の導電膜は、前記容量の他方の端子として機能し、 前記画素内において、前記第1の導電膜は、前記第1の導電膜上に位置する前記電流供給線と重なる領域を有し、 前記画素内において、 前記第1の導電膜は、前記 電流供給 線と 接する領域を有する ことを特徴とするEL表示装置。
- 2基 板と、 前 記基 板上の第1のトランジスタと、第2のトランジスタと、容量素子と、EL素子と、を有する画素と、 前記画素を挟んで前 記基 板と対向する カバー材 と、を有し、 前記EL素子は、前記第1のトランジスタのソース又はドレインの一方と電気的に接続され、 前記第1のトランジスタのソース又はドレインの他方は、 電流供給 線と電気的に接続され、 前記第2のトランジスタのソース又はドレインの一方は、前記第1のトランジスタのゲートと電気的に接続され、 前記容量の一方の端子は、前記第2のトランジスタのソース又はドレインの一方と電気的に接続され、 前記容量の他方の端子は、前記 電流供給 線と電気的に接続され、 前記第2のトランジスタは、第1の多結晶シリコン領域と、前記第1の多結晶シリコン領域上の第1の絶縁膜と、前記第1の絶縁膜上のゲートと、を有し、 前記第1の多結晶シリコン領域は、第2の多結晶シリコン領域と同一の半導体膜に含まれ、 前記第2の多結晶シリコン領域は、前記第1の絶縁膜を介して、第1の導電膜と重なり、 前記第1の導電膜は、前記容量の他方の端子として機能し、 前記画素内において、 前記第1の導電膜は、前記第1の導電膜上の第2の絶縁膜を介して、前記 電流供給 線と重なる領域を有し、 前記画素内において、 前記第1の導電膜は、 前記第2の絶縁膜が有するコンタクトホールを介して、 前記 電流供給 線と 接する領域を有する ことを特徴とするEL表示装置。
Independent claims2
57 paragraphs, as filed
The present invention relates to an electronic device formed by manufacturing a semiconductor element (element using a semiconductor thin film) on a substrate and an electric appliance using the electronic device as a display unit. In particular, the present invention is an effective technique to be applied to an EL (electroluminescence) display device as an electronic device.
In recent years, the technology for forming TFTs on a substrate has made great progress, and application development to active matrix type display devices is being promoted. In particular, a TFT using a polysilicon film has higher field effect mobility (also referred to as mobility) than a TFT using a conventional amorphous silicon film, so that high-speed operation is possible. Therefore, it is possible to control the pixels by the drive circuit formed on the same substrate (insulator) as the pixels, which has been conventionally performed by the drive circuit outside the substrate.
Such an active matrix type display device can obtain various advantages such as reduction of manufacturing cost, miniaturization of display device, increase in yield, and reduction in throughput by incorporating various circuits and elements on the same substrate. It is attracting attention as.
However, circuits and element portions having various functions are formed on the substrate of the active matrix type display device. Therefore, when forming a circuit or element with a TFT, the performance of the TFT required by each circuit or element also differs. For example, a shift register that forms a timing signal is required to have a TFT with a high operating speed, and a switching element for charge storage has a sufficiently low off-current value (drain current value that flows when the TFT is in the off-operation). TFT is required.
In such a case, it becomes difficult to secure the performance required by all the circuits or elements only by the TFT having the same structure, which is a great adverse effect in improving the performance of the active matrix type display device.
<p> The present invention is an active matrix type electronic device having a pixel unit and a drive circuit unit on the same insulator, using a TFT having an appropriate structure according to the performance required by a circuit or element formed by the TFT, and operating performance. An object of the present invention is to provide a highly reliable electronic device.</p><p> Then, by improving the image quality of the electronic device (particularly the active matrix type EL display device), it is an object to improve the quality of the electronic device (electrical appliance) using the electronic device (display for display).</p>
<p> In order to solve the above problems, it is an object of the present invention to allocate a TFT having an optimum structure in consideration of the functions required by the elements included in each pixel of the EL display device. That is, TFTs having different structures exist in the same pixel.</p><p> Specifically, for an element (switching element, etc.) for which the most important issue is to sufficiently lower the off-current value, it is desirable that the TFT structure focuses on reducing the off-current value rather than the operating speed. In addition, elements (current control elements, etc.) whose most important issue is to pass a large current are due to hot carrier injection, which is a significant problem at the same time as passing a large current, rather than reducing the off-current value. A TFT structure that focuses on suppressing deterioration is desirable.</p><p> The present invention makes it possible to improve the operating performance and reliability of the EL display device by properly using the TFTs as described above on the same insulator. The idea of the present invention is not limited to the pixel portion, but is also characterized in that the TFT structure is optimized including the pixel portion and the drive circuit portion that drives the pixel portion.</p>
<p> By using the present invention, it is possible to arrange TFTs with appropriate performance according to the specifications required by the element on the same insulator, and it is possible to greatly improve the operating performance and reliability of the EL display device. it can.</p><p> Specifically, the TFT structure that emphasizes the operating speed and the TFT structure that emphasizes the low off-current value can be used properly on the same insulator. As a result, the switching TFT placed in the pixel of the EL display device can sufficiently lower the off-current value, and the current control TFT can prevent deterioration due to hot carrier injection and sufficiently lower the off-current value. ..</p><p> Further, by using such an EL display device as a display display, it becomes possible to produce an applied product (electrical appliance) having good image quality and durability (high reliability).</p>
<figref num="1">The figure which shows the cross-sectional structure of the pixel part of an EL display device.</figref><figref num="2">The figure which shows the top surface structure of the pixel part of an EL display device.</figref><figref num="3">The figure which shows the manufacturing process of the active matrix type EL display device.</figref><figref num="4">The figure which shows the manufacturing process of the active matrix type EL display device.</figref><figref num="5">The figure which shows the manufacturing process of the active matrix type EL display device.</figref><figref num="6">The figure which shows the cross-sectional structure of the pixel part of an EL display device.</figref><figref num="7">The figure which shows the element composition of the pixel part of an EL display device.</figref><figref num="8">The figure which shows the element structure of the sampling circuit of an EL display device.</figref><figref num="9">The figure which shows the cross-sectional structure of the pixel part of an EL display device.</figref><figref num="10">The figure which shows the cross-sectional structure of the pixel part of an EL display device.</figref><figref num="11">The figure which shows the top surface structure and the cross-sectional structure of an EL display device.</figref><figref num="12">The figure which shows the circuit structure of the pixel part of an EL display device.</figref><figref num="13">The figure which shows the circuit structure of the pixel part of an EL display device.</figref><figref num="14">The figure which shows the circuit structure of the pixel part of an EL display device.</figref><figref num="15">The figure which shows the specific example of an electric appliance.</figref><figref num="16">The figure which shows the specific example of an electric appliance.</figref>
Embodiments of the present invention will be described with reference to FIGS. 1 and 2. FIG. 1 shows a cross-sectional view of the pixels of the EL display device of the present invention, FIG. 2 (A) is a top view thereof, and FIG. 2 (B) is a circuit configuration thereof. In reality, a plurality of such pixels are arranged in a matrix to form a pixel portion (image display portion).
The cross-sectional view of FIG. 1 shows the cut surface cut at A-A'in the top view shown in FIG. 2 (A). Here, since the common reference numerals are used in FIGS. 1 and 2, it is advisable to refer to both drawings as appropriate. Further, although the top view of FIG. 2 shows two pixels, both have the same structure.
In FIG. 1, 11 is a substrate and 12 is a base film (insulator). As the substrate 11, a glass substrate, a glass ceramics substrate, a quartz substrate, a silicon substrate, a ceramics substrate, a metal substrate or a plastic substrate (including a plastic film) can be used.
Further, the base film 12 is particularly effective when a substrate containing movable ions or a substrate having conductivity is used, but it does not have to be provided on the quartz substrate. As the base film 12, an insulating film containing silicon may be provided. In the present specification, the "silicon-containing insulating film" specifically includes silicon, oxygen or nitrogen such as a silicon oxide film, a silicon nitride film or a silicon nitride film (denoted by SiOxNy) in a predetermined ratio. Refers to the insulating film.
Here, two TFTs are formed in the pixel. 201 is a TFT that functions as a switching element (hereinafter referred to as a switching TFT), and 202 is a TFT that controls the amount of current flowing through the EL element (hereinafter referred to as a current control TFT), both of which are formed of n-channel TFTs. ing.
The switching TFT 201 includes a source region 13, a drain region 14, an LDD region 15a to 15d, an active layer including a high-concentration impurity region 16 and a channel forming region 17a and 17b, a gate insulating film 18, a gate electrode 19a, a gate electrode 19b, and a third. It is formed with one interlayer insulating film 20, a source wiring 21, and a drain wiring 22. As shown in FIG. 2, the gate electrodes 19a and 19b have a double gate structure with the same gate wiring 211 as the trunk.
The active layer is formed of a semiconductor film containing a crystal structure. That is, it may be a single crystal semiconductor film, a polycrystalline semiconductor film, or a microcrystal semiconductor film. Further, the gate insulating film 18 may be formed of an insulating film containing silicon. Further, any conductive film can be used as the gate electrode, the source wiring or the drain wiring.
In addition, a holding capacity (straining capacity) 203 is connected to the switching TFT 201 (see Fig. 2). The holding capacitance 203 includes a capacitance forming semiconductor region 23 electrically connected to the drain region 14, a gate insulating film 18 (which functions as a capacitance forming dielectric in the region forming the holding capacitance 203), and a capacitance forming electrode. Formed with 24. The connection wiring 25 is a wiring for giving a fixed potential (here, a ground potential) to the capacitance forming electrode 24, is formed at the same time as the source wiring 21 and the drain wiring 22, and is connected to the current supply line 212. ..
At this time, in the switching TFT 201, the LDD regions 15a to 15d are provided so as not to overlap the gate electrodes 19a and 19b with the gate insulating film 18 interposed therebetween. Such a structure is generally called an LDD structure.
The switching TFT 201 accumulates the charge corresponding to the video signal (signal including image information) in the holding capacity 203 at the time of selection. And since the charge must be retained at all times when not selected, charge leakage due to the off-current value must be prevented as much as possible. In that sense, the switching TFT 201 must be designed with the most important issue being to reduce the off-current value.
It is more preferable to provide an offset region (a region having a semiconductor layer having the same composition as the channel formation region and to which a gate voltage is not applied) between the channel formation region and the LDD region in order to reduce the off-current value. Further, in the case of a multi-gate structure having two or more gate electrodes, a high-concentration impurity region provided between the channel forming regions is effective in reducing the off-current value. It is desirable to have a multi-gate structure as in this embodiment, but a single-gate structure is also possible.
Next, the current control TFT 202 includes an active layer including a source region 31, a drain region 32, an LDD region 33, and a channel forming region 34, a gate insulating film 18, a gate electrode 35, a first interlayer insulating film 20, a source wiring 36, and the like. It is formed with a drain wiring 37. Although the gate electrode 35 has a single gate structure, it may have a multi-gate structure.
As shown in FIG. 2, the gate electrode 35 is electrically connected to the drain region 14 of the switching TFT 201 via a drain wiring (which can also be called a connection wiring) 22. Further, the source wiring 36 is integrated with the connection wiring 25 and is similarly connected to the current supply line 212.
The feature of this current control TFT 202 is that the LDD region 33 is provided between the drain region 32 and the channel formation region 34, and the LDD region 33 overlaps the gate electrode 35 with the gate insulating film 18 interposed therebetween. It is a point having a non-overlapping region.
The current control TFT 202 supplies a current for causing the EL element 204 to emit light, and at the same time, controls the supply amount to enable gradation display. Therefore, it is necessary to take measures against deterioration by hot carrier injection so that the deterioration does not occur even if a large current is applied. Further, when displaying black, the current control TFT202 is turned off, but at that time, if the off current value is high, a clean black display cannot be performed, which causes a decrease in contrast. Therefore, it is necessary to suppress the off-current value as well.
It is known that a structure in which the LDD region overlaps the gate electrode is very effective for deterioration due to hot carrier injection. However, if the entire LDD region is overlapped with the gate electrode, the off-current value will increase. Therefore, the present inventors have adopted a new structure of providing an LDD region that does not overlap with the gate electrode to prevent hot carrier countermeasures and the off-current value. The measures are being solved at the same time.
At this time, the length of the LDD region overlapping the gate electrode may be 0.1 to 3 μm (preferably 0.3 to 1.5 μm). If it is too long, the parasitic capacitance will be increased, and if it is too short, the effect of preventing hot carriers will be weakened. The length of the LDD region that does not overlap the gate electrode may be 1.0 to 3.5 μm (preferably 1.5 to 2.0 μm). If it is too long, sufficient current cannot flow, and if it is too short, the effect of reducing the off-current value is weakened.
Further, in the above structure, since a parasitic capacitance is formed in the region where the gate electrode and the LDD region overlap, it is preferable not to provide the parasitic capacitance between the source region 31 and the channel formation region 34. Since the current control TFT always has the same carrier (electron in this case) flow direction, it is sufficient to provide the LDD region only on the drain region side.
As described above, two types of TFTs having different structures are arranged in the pixel depending on the function. In the example shown here, both the switching TFT 201 and the current control TFT 202 are formed of an n-channel TFT. Since the TFT size of the n-channel TFT can be made smaller than that of the p-channel TFT, it is very advantageous in increasing the effective light emitting area of the EL element.
The p-channel type TFT has advantages that hot carrier injection is hardly a problem and the off-current value is low, and examples of using it as a switching TFT and an example of using it as a current control TFT have already been reported. However, in the present invention, by adopting a structure in which the positions of the LDD regions are different, the problem of hot carrier injection and the problem of off-current value are solved even in the n-channel type TFT, and all the TFTs in all the pixels are n-channel type. Another feature is that it is a TFT.
Reference numeral 41 denotes a passivation film, which uses a silicon nitride film or a silicon oxide film. 42 is a color filter, and 43 is a phosphor (also called a fluorescent dye layer). Both are a combination of the same color and contain red (R), green (G) or blue (B) pigments. The color filter 42 is provided to improve the color purity, and the phosphor 42 is provided to perform color conversion.
The EL display device is roughly divided into four color display methods: a method of forming three types of EL elements corresponding to RGB, a method of combining an EL element that emits white light and a color filter, and an EL that emits blue light. There is a method of combining an element and a phosphor (fluorescent color conversion layer: CCM), and a method of superimposing an EL element corresponding to RGB using a transparent electrode on a cathode (opposite electrode).
The structure of FIG. 1 is an example of using a method in which an EL element that emits blue light and a phosphor are combined. Here, as the EL element 204, a light emitting layer that emits blue light is used to form light having a wavelength in the blue region including ultraviolet light, and the light excites the phosphor 43 to generate red, green, or blue light. Then, the color filter 42 raises the color purity and outputs the color.
However, the present invention can be carried out regardless of the light emitting method, and all the above four methods can be used in the present invention.
Further, after forming the color filter 42 and the phosphor 42, flattening is performed with the second interlayer insulating film 43. As the second interlayer insulating film 44, an organic resin film is preferable, and polyimide, acrylic resin or BCB (benzocyclobutene) is preferably used. Of course, an inorganic film may be used as long as sufficient flattening is possible.
Reference numeral 45 denotes a pixel electrode (anode of the EL element) made of a transparent conductive film, which is connected to the drain wiring 37 of the current control TFT 202 after making contact holes in the second interlayer insulating film 44 and the passivation film 41. It is formed.
An EL layer (preferably an organic material) 46, a cathode 47, and a protective electrode 48 are sequentially formed on the pixel electrode 45. The EL layer 46 can be used in a single layer or a laminated structure, but is often used in a laminated structure. The EL layer, originating Various laminated structure by combining an electron transport layer and a hole transport layer in addition to light layer have been proposed, the present invention may have any structure.
Further, as the cathode 47, a material containing magnesium (Mg), lithium (Li) or calcium (Ca) having a small work function is used. Preferably, an MgAg electrode may be used. Further, the protective electrode 48 is an electrode provided to protect the cathode 47 from external moisture, and a material containing aluminum (Al) or silver (Ag) is used.
It is desirable that the EL layer 46 and the cathode 47 are continuously formed without being released to the atmosphere. That is, it is desirable that the EL layer and the cathode are all continuously formed regardless of the laminated structure. This is because when an organic material is used as the EL layer, it is very sensitive to moisture and therefore avoids moisture absorption when it is released to the atmosphere. Further, it is further preferable to continuously form not only the EL layer 46 and the cathode 47 but also the protective electrode 48 on the EL layer 46 and the cathode 47.
The EL display device of the present invention has a pixel portion composed of pixels having the above structure, and TFTs having different structures are arranged in the pixels according to their functions. As a result, a switching TFT with a sufficiently low off-current value and a current control TFT that is resistant to hot carrier injection can be formed in the same pixel, and an EL display device that has high reliability and can display a good image can be obtained. Can be formed.
Further, the present invention is not limited to the pixel portion of the EL display device, and the same can be said for the drive circuit portion of the active matrix type EL display device in which the drive circuit unit and the pixel unit are formed on the same substrate. That is, it is one of the gist of the present invention that TFTs having different structures are arranged in all the drive circuit unit and the pixel unit according to the function required by the circuit or the element.
The present invention can also be implemented when other signal processing circuits are formed in addition to the drive circuit unit or the pixel unit. Other signal processing circuits include signal division circuits, D / A converters, γ correction circuits, booster circuits or differential amplifier circuits.
The present invention having the above configuration will be described in more detail with reference to the following examples.
<p> Examples of the present invention will be described with reference to FIGS. 3 to 5. Here, a method of simultaneously producing the TFTs of the pixel portion and the drive circuit portion provided around the pixel portion will be described. However, for the sake of simplicity, a CMOS circuit, which is a basic circuit, will be shown as a drive circuit.</p><p> First, as shown in FIG. 3A, the base film 301 is formed on the glass substrate 300 to a thickness of 300 nm. In this embodiment, a silicon nitride film is laminated and used as the base film 301. At this time, the nitrogen concentration of the side in contact with the glass substrate 300 should be set to 10 to 25 wt%.</p><p> Next, an amorphous silicon film (not shown) having a thickness of 50 nm is formed on the base film 301 by a known film forming method. It is not necessary to limit the film to an amorphous silicon film, and any semiconductor film containing an amorphous structure (including a microcrystalline semiconductor film) may be used. Further, a compound semiconductor film containing an amorphous structure such as an amorphous silicon germanium film may be used. The film thickness may be as long as 20 to 100 nm.</p><p> Then, the amorphous silicon film is crystallized by a known technique to form a crystalline silicon film (also referred to as a polycrystalline silicon film or a polysilicon film) 302. Known crystallization methods include a thermal crystallization method using an electric heating furnace, a laser annealing crystallization method using laser light, and a lamp annealing crystallization method using infrared light. In this example, crystallization is performed using excimer laser light using XeCl gas.</p><p> In this embodiment, the pulse-oscillating type excimer laser light processed into a linear shape is used, but it may be rectangular, or a continuous-oscillating type argon laser light or a continuous-oscillating type excimer laser light may be used. ..</p><p> Next, as shown in FIG. 3 (B), a protective film 303 made of a silicon oxide film is formed on the crystalline silicon film 302 to a thickness of 130 nm. This thickness may be selected in the range of 100 to 200 nm (preferably 130 to 170 nm). Further, another film may be used as long as it is an insulating film containing silicon. The protective film 303 is provided to prevent the crystalline silicon film from being directly exposed to plasma when impurities are added and to enable delicate concentration control.</p><p> Then, resist masks 304a to 304c are formed on the resist masks, and an impurity element that imparts n-type (hereinafter referred to as n-type impurity element) is added via the protective film 303. As the n-type impurity element, an element belonging to Group 15 is typically used, and phosphorus or arsenic is typically used. In this embodiment, phosphine (PH)<sub>3</sub>) Is plasma-excited without mass separation, and phosphorus is 1 × 10<sup>18</sup>atoms / cm<sup>3</sup>Add at the concentration of. Of course, an ion implantation method for mass separation may be used.</p><p> The n-type impurity elements 305 to 307 formed by this step contain 2 × 10 n-type impurity elements.<sup>16</sup>~5×10<sup>19</sup>atoms / cm<sup>3</sup>(Typically 5 × 10<sup>17</sup>~5×10<sup>18</sup>atoms / cm<sup>3</sup>) Is included in the dose amount. The n-type impurity region 306 corresponds to the capacitance forming semiconductor region 23 shown in FIG.</p><p> Next, as shown in FIG. 3C, the protective film 303 is removed, and the added elements belonging to Group 15 are activated. A known technique may be used as the activating means, but in this embodiment, the activating means is activated by irradiation with excimer laser light. Of course, it may be a pulse oscillation type or a continuous oscillation type, and it is not necessary to limit the light to excimer laser light. However, since the purpose is to activate the added impurity elements, it is preferable to irradiate with energy that does not melt the crystalline silicon film. The laser beam may be irradiated with the protective film 303 attached.</p><p> When activating the impurity element by this laser light, activation by furnace annealing or lamp annealing may be used in combination. When activating by furnace anneal, heat treatment at about 450 to 550 ° C may be performed in consideration of the heat resistance of the substrate. Further, activation may be carried out only by furnace anneal or lamp anneal.</p><p> By this step, the boundary portion (joint portion) with the end portion of the n-type impurity region 305 to 307, that is, the region around the n-type impurity region 305 to 307 to which the n-type impurity element is not added is clarified. .. This means that the LDD region and the channel formation region can form a very good junction when the TFT is completed later.</p><p> Next, as shown in FIG. 3D, unnecessary portions of the crystalline silicon film are removed to form island-shaped semiconductor films (hereinafter referred to as active layers) 308 to 311.</p><p> Next, as shown in FIG. 3 (E), the gate insulating film 312 is formed by covering the active layers 308 to 311. As the gate insulating film 312, an insulating film containing silicon having a thickness of 10 to 200 nm, preferably 50 to 150 nm may be used. This may be a single layer structure or a laminated structure. In this example, a 110 nm-thick silicon nitride film is used.</p><p> Next, a conductive film having a thickness of 200 to 400 nm is formed and patterned to form gate electrodes 313 to 317 and capacitance forming electrodes 318. In this specification, the gate electrode and the gate wiring may be described separately, but the part that functions as the electrode is only called the gate electrode, and it is considered that the gate electrode is included in the gate wiring. Good. This also applies to the capacitance forming electrode, and the portion that does not function as the electrode may be referred to as the capacitance forming wiring.</p><p> The gate electrode may be formed of a single-layer conductive film, but is preferably a laminated film having two or three layers, if necessary. Any known conductive film can be used as the material for the gate electrode.</p><p> Specifically, a thin film containing tantalum (Ta), titanium (Ti), molybdenum (Mo), tungsten (W), chromium (Cr) or conductive silicon (Si), or a thin film obtained by nitriding them (typically). Specifically, a tantalum nitride film, a tungsten nitride film or a titanium nitride film), an alloy film combining the above elements (typically a Mo-W alloy or a Mo-Ta alloy), or a silicide film containing the above elements (typically). A tantalum alloy film or a tantalum alloy film) can be used for this. Of course, these may be used as a single layer or laminated.</p><p> In this embodiment, a laminated film composed of a 50 nm thick tantalum nitride (TaN) film and a 350 nm thick Ta film is used. This may be formed by a sputtering method. Further, when an inert gas such as Xe or Ne is added as the sputter gas, the film peeling due to stress can be prevented.</p><p> At this time, the gate electrodes 314 and 317 are formed so as to overlap the gate insulating film 312 with a part of the n-type impurity regions 305 and 307, respectively. This overlapping portion later becomes the LDD region that overlaps the gate electrode. Although the gate electrodes 315 and 316 appear to be two in cross section, they are actually formed from one continuously connected pattern.</p><p> Further, a capacitance forming electrode 318 is formed on the n-type impurity region 306 with a gate insulating film 312 interposed therebetween. At this time, the insulating film provided as the gate insulating film 312 is used here as a dielectric of the holding capacitance, from the n-type impurity region (semiconductor region for capacitance formation) 306, the gate insulating film 312, and the capacitance forming electrode 318. Retention capacity is formed.</p><p> Next, as shown in FIG. 4 (A), an n-type impurity element (phosphorus in this embodiment) is added in a self-aligned manner using the gate electrodes 313 to 317 and the capacitance forming electrodes 318 as masks. The impurity regions 319 to 325 thus formed are adjusted so that phosphorus is added at a concentration of 1/2 to 1/10 (typically 1/3 to 1/4) of the n-type impurity regions 305 to 307. To do. Specifically, 1x10<sup>16</sup>~5×10<sup>18</sup>atoms / cm<sup>3</sup>(Typically 3x10<sup>17</sup>~3×10<sup>18</sup>atoms / cm<sup>3</sup>) Is preferable.</p><p> Next, as shown in FIG. 4 (B), resist masks 326a to 326c are formed so as to cover the gate electrode and the like, and an n-type impurity element (phosphorus in this example) is added to contain phosphorus at a high concentration. It forms impurity regions 327 to 334. Again Phosphin (PH<sub>3</sub>) Is used for the ion doping method, and the phosphorus concentration in this region is 1 × 10.<sup>20</sup>~1×10<sup>21</sup>atoms / cm<sup>3</sup>(Typically 2x10<sup>20</sup>~5×10<sup>21</sup>atoms / cm<sup>3</sup>).</p><p> Although the source region or drain region of the n-channel type TFT is formed by this step, the switching TFT leaves a part of the n-type impurity regions 322 to 324 formed in the step of FIG. 4 (A). This remaining region corresponds to the LDD regions 15a to 15d of the switching TFT in FIG.</p><p> Next, as shown in FIG. 4C, the resist masks 326a to 326c are removed to form a new resist mask 325. Then, a p-type impurity element (boron in this example) is added to form impurity regions 336 and 337 containing boron at a high concentration. Here diborane (B<sub>2</sub>H<sub>6</sub>) By the ion doping method using 3 × 10<sup>20</sup>~3×10<sup>21</sup>atoms / cm<sup>3</sup>(Typically 5 × 10<sup>20</sup>~1×10<sup>21</sup>atoms / cm<sup>3</sup>C) Add boron to the concentration.</p><p> It should be noted that the impurity regions 319 and 320 are already 1 × 10.<sup>20</sup>~1×10<sup>21</sup>atoms / cm<sup>3</sup>Phosphorus is added at the concentration of, but the boron added here is added at a concentration at least three times that concentration. Therefore, the previously formed n-type impurity region is completely inverted to P-type and functions as a P-type impurity region.</p><p> Next, as shown in FIG. 4 (D), after removing the resist mask 335, the first interlayer insulating film 338 is formed. As the first interlayer insulating film 338, an insulating film containing silicon may be used as a single layer, or a laminated film in which an insulating film containing silicon is combined may be used. The film thickness may be 400 nm to 1.5 μm. In this embodiment, the structure is such that an 800 nm-thick silicon oxide film is laminated on a 200 nm-thick silicon nitride film.</p><p> Then, the n-type or p-type impurity element added at each concentration is activated. As the activating means, a furnace anneal method, a laser anneal method, or a lamp anneal method can be used. In this embodiment, heat treatment is performed at 550 ° C. for 4 hours in a nitrogen atmosphere in an electric heating furnace.</p><p> Further, in an atmosphere containing 3 to 100% hydrogen, heat treatment is performed at 300 to 450 ° C. for 1 to 12 hours to perform hydrogenation treatment. This step is a step of hydrogen-terminating the unpaired bond of the semiconductor film with thermally excited hydrogen. As another means of hydrogenation, plasma hydrogenation (using hydrogen excited by plasma) may be performed.</p><p> The hydrogenation treatment may be carried out while the first interlayer insulating film 338 is formed. That is, after forming a 200 nm-thick silicon nitride film, the hydrogenation treatment may be performed as described above, and then the remaining 800 nm-thick silicon oxide film may be formed.</p><p> Next, as shown in FIG. 5A, a contact hole is formed in the first interlayer insulating film 338 to form source wiring 339 to 342, drain wiring 343 to 345, and connection wiring 346. In this embodiment, these wirings are laminated films having a three-layer structure in which a Ti film is 100 nm, an aluminum film containing Ti is 300 nm, and a Ti film is 150 nm continuously formed by a sputtering method. Of course, other conductive films may be used.</p><p> Next, the passivation film 347 is formed with a thickness of 50 to 500 nm (typically 200 to 300 nm). In this embodiment, a silicon nitride film having a thickness of 300 nm is used as the passivation film 347. This may be replaced by a silicon nitride film.</p><p> At this time, H prior to the formation of the silicon nitride film.<sub>2</sub>, NH<sub>3</sub>It is effective to perform plasma treatment using a gas containing isohydrogen. Hydrogen excited by this pretreatment is supplied to the first interlayer insulating film 338, and heat treatment is performed to improve the film quality of the passivation film 347. At the same time, the hydrogen added to the first interlayer insulating film 338 diffuses to the lower layer side, so that the active layer can be effectively hydrogenated.</p><p> Next, as shown in FIG. 5 (B), a color filter 348 and a phosphor 349 are formed. As these materials, known materials may be used. Further, these may be individually patterned and formed, or may be continuously formed and collectively patterned and formed. Each film thickness is selected in the range of 0.5 to 5 μm (typically 1 to 2 μm). In particular, the optimum film thickness of the phosphor 349 differs depending on the material used. That is, if it is too thin, the color conversion efficiency deteriorates, and if it is too thick, the step becomes large and the amount of transmitted light decreases. Therefore, the optimum film thickness must be determined in consideration of both characteristics.</p><p> In this embodiment, a color conversion method for color-converting the light generated from the EL layer is described as an example, but when a method for individually producing an EL layer corresponding to RGB is adopted, a color filter or fluorescence is used. The body can be omitted.</p><p> Next, a second interlayer insulating film 350 made of an organic resin is formed. As the organic resin, polyimide, polyamide, acrylic resin or BCB (benzocyclobutene) can be used. In particular, since the second interlayer insulating film has a strong meaning of flattening, an acrylic resin having excellent flatness is preferable. In this embodiment, the acrylic resin is formed with a film thickness capable of flattening the steps of the color filter 348 and the phosphor 349.</p><p> Next, a contact hole reaching the drain wiring 345 is formed in the second interlayer insulating film 350 and the passivation film 347, and the pixel electrode 351 is formed. In this embodiment, a conductive film (ITO film) made of a compound of indium oxide and tin oxide is formed to a thickness of 110 nm, and patterning is performed to obtain a pixel electrode. This pixel electrode serves as the anode of the EL element.</p><p> Next, as shown in FIG. 5C, the EL layer 352, the cathode (MgAg electrode) 353, and the protective electrode 354 are continuously formed without being released to the atmosphere. However, a known material can be used as the EL layer 352. As a known material, an organic material is known, and it is preferable to use an organic material in consideration of a driving voltage. In this embodiment, the EL layer is a four-layer structure consisting of a hole injection layer, a hole transport layer, a light emitting layer, and an electron injection layer. Further, although the MgAg electrode is used as the cathode of the EL element in this embodiment, other known materials may be used.</p><p> Further, the protective electrode 354 is provided to prevent deterioration of the MgAg electrode 353, and an aluminum film (a conductive film containing aluminum) is suitable. Of course, other materials may be used. Further, since the EL layer 352 and the MgAg electrode 353 are sensitive to moisture, it is desirable to continuously form the protective electrode 354 up to the protective electrode 354 without releasing it to the atmosphere to protect the EL layer from the outside air.</p><p> The film thickness of the EL layer 352 may be 800 to 200 nm (typically 100 to 120 nm), and the thickness of the MgAg electrode may be 180 to 300 nm (typically 200 to 250 nm).</p><p> In this way, an active matrix type EL display device having a structure as shown in FIG. 5 (C) is completed. Actually, when completed up to FIG. 5C, it is preferable to package with a highly airtight protective film (laminated film or the like) so as not to be further exposed to the outside air. At that time, the reliability of the EL layer is improved by creating an inert atmosphere inside the protective film.</p><p> In addition, after improving the airtightness by packaging processing, a connector (flexible printed circuit: FPC) for connecting the terminal routed from the element or circuit formed on the board and the external signal terminal is attached as a product. Complete. An EL display device in such a state is referred to as an EL module in the present specification.</p><p> By the way, the active matrix type EL display device of this embodiment shows extremely high reliability and can improve the operating characteristics by arranging the TFTs having the optimum structure in the drive circuit unit and the pixel unit.</p><p> First, a TFT having a structure that reduces hot carrier injection is used as an n-channel TFT 205 of a CMOS circuit that forms a drive circuit. The drive circuit referred to here includes a shift register, a buffer, a level shifter, a sampling circuit (sample and hold circuit), and the like. For digital drive, a D / A converter or latch may also be included.</p><p> In the case of this embodiment, as shown in FIG. 5C, the active layer of the n-channel type 205 includes a source region 355, a drain region 356, an LDD region 357, and a channel formation region 358, and the LDD region 357 is gate-insulated. It overlaps the gate electrode 314 with the film 312 in between.</p><p> The fact that the LDD region is formed only on the drain region side is a consideration not to slow down the operating speed. In addition, this n-channel type TFT205 does not need to worry about the off-current value so much, and it is better to emphasize the operating speed rather than that. Therefore, it is desirable that the LDD region 357 is completely overlapped with the gate electrode and the resistance component is reduced as much as possible. That is, it is better to eliminate the so-called offset.</p><p> In addition, the p-channel type TFT206 of the CMOS circuit does not need to be provided with an LDD region because deterioration due to hot carrier injection is hardly noticeable. Therefore, the active layer includes a source region 359, a drain region 360 and a channel formation region 361. Of course, it is also possible to provide an LDD region and take hot carrier countermeasures as in the case of n-channel TFT205.</p><p> Among the drive circuits, the sampling circuit is a little special as compared with other circuits, and a large current flows in both directions in the channel formation region. That is, the roles of the source region and the drain region are switched. Further, it is necessary to keep the off-current value as low as possible, and in that sense, it is desirable to arrange a TFT having a function intermediate between the switching TFT and the current control TFT.</p><p> Therefore, it is desirable that the n-channel TFT forming the sampling circuit has a TFT having a structure as shown in FIG. As shown in FIG. 8, a part of the LDD regions 71a and 71b overlaps the gate electrode 73 with the gate insulating film 72 interposed therebetween. This effect is as described in the description of the current control TFT 202, and differs in that the sampling circuit is provided so as to sandwich the channel formation region 74.</p><p> Further, a pixel having a structure as shown in FIG. 1 is formed to form a pixel portion. Since the structures of the switching TFT and the current control TFT formed in the pixel have already been described with reference to FIG. 1, the description thereof will be omitted here.</p>
<p> In this embodiment, a case where the pixel portion of the active matrix type EL display device has a structure different from that of FIG. 1 will be described.</p><p> First, Fig. 6 (A) shows an example in which the structure of the switching TFT is different from that of Fig. 1. However, since the current control TFT 202, the holding capacity 203, and the EL element 204 shown in FIG. 6 (A) have exactly the same structure as in the first embodiment, the description thereof will be omitted. Also, for the switching TFT, a new code will be added only to the necessary parts, and the explanation in Fig. 1 will be used as it is for the other parts.</p><p> The switching TFT 201 shown in FIG. 1 and the switching TFT 207 shown in FIG. 6 (A) differ in the formation position of the LDD region. The LDD regions 15a to 15d in FIG. 1 are formed so as not to overlap the gate electrodes 19a and 19b, but in this embodiment, they are formed so as to partially overlap the gate electrodes.</p><p> That is, as shown in FIG. 6A, a part of the LDD regions 50a to 50d of the switching TFT 207 overlaps the gate electrodes 51a and 51b with the gate insulating film interposed therebetween. In other words, the LDD regions 50a to 50d have regions that overlap the gate electrodes 51a and 51b with the gate insulating film in between.</p><p> As a result, the off-current value can be reduced as much as possible, and deterioration due to hot carrier injection can be prevented. However, since a parasitic capacitance is formed between the gate electrode and the LDD region, the operating speed may be slightly slower than that of the structure shown in FIG. However, if it is designed with this in mind, it is possible to form a highly reliable switching TFT.</p><p> Next, Fig. 6 (B) shows an example in which the structure of the current control TFT is different from that of Fig. 1. However, since the switching TFT 201, the holding capacity 203, and the EL element 204 shown in FIG. 6 (B) have exactly the same structure as in the first embodiment, the description thereof will be omitted. Also, for the current control TFT, a new code will be added only to the necessary parts, and the explanation in Fig. 1 will be used as it is for the other parts.</p><p> The current control TFT 202 shown in FIG. 1 and the current control TFT 208 shown in FIG. 6 (B) differ in the formation position of the LDD region. The LDD region 33 in FIG. 1 is formed so as to partially overlap the gate electrode 35, but in this embodiment, it is formed so as to completely overlap the gate electrode 35.</p><p> That is, as shown in FIG. 6B, the LDD region 52 of the current control TFT 208 completely overlaps the gate electrode 53 via the gate insulating film. In other words, the LDD region 52 does not have a region that does not overlap the gate electrode 53.</p><p> When the minimum voltage of the video (image) signal is applied to the gate voltage of the current control TFT, the EL element emits light unless the off-current value is sufficiently low, causing a decrease in contrast. The structure of FIG. 1 is provided with an LDD region that does not overlap the gate electrode in order to reduce the off-current value at that time.</p><p> However, since the LDD region that does not overlap with the gate electrode acts as a resistance component, the operating speed and the on-current value will drop to some extent. Therefore, if the structure is not provided as in this embodiment, such a resistance component can be eliminated, so that a larger current can easily flow. However, as described above, it is premised that a TFT having a sufficiently low off-current value is used when the minimum voltage of the video (image) signal is applied to the gate voltage of the current control TFT.</p><p> It is also possible to use the switching TFT 207 of FIG. 6 (A) and the current control TFT of FIG. 6 (B) in combination. In addition, the manufacturing process may be performed with reference to Example 1.</p>
<p> In this embodiment, FIG. 7 shows an example in which the pixel configuration is different from the configuration shown in FIG. 2 (B).</p><p> In this embodiment, the two pixels shown in FIG. 2B are arranged so as to be symmetrical with respect to the current supply line 212 for giving the ground potential. That is, as shown in FIG. 7, the number of required wirings is reduced by sharing the current supply line 213 between two adjacent pixels. The TFT structure and the like arranged in the pixel may be left as they are.</p><p> With such a configuration, it is possible to produce a higher-definition pixel portion, and the quality of the image is improved. The configuration of this example can be easily realized according to the manufacturing process of Example 1, and the TFT structure may be combined with Example 2.</p>
<p> In this embodiment, a case where a pixel portion having a structure different from that of FIG. 1 is formed will be described with reference to FIG. In addition, the step of forming the second interlayer insulating film 44 may be followed in Example 1. Further, since the switching TFT 201, the current control TFT 202, and the holding capacity 203 covered with the second interlayer insulating film 44 have the same structure as that of FIG. 1, the description thereof will be omitted.</p><p> In the case of this embodiment, after the contact hole is formed in the second interlayer insulating film 44, the pixel electrode 60, the cathode 61 and the EL layer 62 are formed. For these, each material may be continuously formed without being released to the atmosphere, and the patterns may be formed by etching all at once.</p><p> In this embodiment, a 150 nm thick aluminum alloy film (aluminum film containing 1 wt% titanium) is provided as the pixel electrode 60. The material of the pixel electrode may be any metal material, but a material having high reflectance is preferable.</p><p> Further, a 230 nm-thick MgAg electrode is used as the cathode 61, and the film thickness of the EL layer 62 is 120 nm. Regarding the formation of the EL layer 62, the material described in Example 1 may be used.</p><p> Next, an insulating film containing silicon is formed to a thickness of 200 to 500 nm (typically 250 to 300 nm), and a protective film 63 having an opening is formed by patterning. Then, an anode 64 made of a transparent conductive film (ITO film in this embodiment) is formed on the anode 64 to a thickness of 110 nm. As the transparent conductive film, a compound of indium oxide and zinc oxide, tin oxide, indium oxide or zinc oxide can also be used. Further, those to which gallium is added may be used.</p><p> Further, the phosphor 65 and the color filter 66 are formed on the anode 64 to complete the pixel portion as shown in FIG.</p><p> In the structure of this embodiment, the generated red, green, or blue light is emitted to the side opposite to the substrate on which the TFT is formed. Therefore, almost the entire area in the pixel, that is, the region where the TFT is formed can also be used as the light emitting region. As a result, the effective light emitting area of the pixel is significantly improved, and the brightness and contrast of the image are improved.</p><p> The configuration of this embodiment can be freely combined with any of the configurations of Examples 2 and 3.</p>
<p> In Example 1, laser crystallization is used as a means for forming the crystalline silicon film 302, but in this example, a case where a different crystallization means is used will be described.</p><p> In this example, after forming an amorphous silicon film, crystallization is performed using the technique described in JP-A-7-130652. The publication discloses a technique for obtaining a highly crystalline silicon film using nickel as a catalytic element that promotes (promotes) crystallization.</p><p> Further, after the crystallization step is completed, a step of removing the catalytic element used for crystallization may be performed. In that case, the catalyst element may be gettered by the technique described in JP-A No. 10-270363 or JP-A-8-330602.</p><p> Further, the TFT may be formed by using the technique described in the specification of Japanese Patent Application No. 11-076967 by the applicant. In the specification of Japanese Patent Application No. 11-076967, the holding capacity different from that in FIG. 1 is explained, but it is sufficient to refer to the part forming the TFT.</p><p> As described above, as described in Example 1 and FIG. 1, the present invention aims to arrange a TFT having an appropriate structure according to the function required by the device, and is not limited to the manufacturing method thereof. Absent. That is, the manufacturing process shown in Example 1 is one example, and if the structure of FIG. 1 or FIG. 5 (C) of Example 1 can be realized, there is no problem even if another manufacturing process is used. ..</p><p> In addition, even when the structure of FIG. 1 or FIG. 5 (C) is combined with any of the configurations of Examples 2 to 4, the manufacturing steps as shown in this Example are combined in manufacturing such a structure. It is possible.</p>
<p> In Example 1, a step of etching the gate insulating film 312 may be added between the steps of FIG. 4 (A) and the step of FIG. 4 (B). That is, after adding the n-type impurity element as shown in FIG. 4 (A), the gate insulating film 312 is self-consistently etched using the gate electrodes 313 to 317 and the capacitance forming electrodes 318 as masks. This etching is performed until the active layer is exposed.</p><p> In this example, since the gate insulating film used in Example 1 is a silicon nitride film, CHF is used as the etching gas.<sub>3</sub>Perform dry etching using gas. Of course, other etching conditions are not limited to this.</p><p> Then, an n-type impurity element is added to the exposed active layer as shown in FIG. 4 (B). In this step, phosphorus is directly added to the active layer without passing through the gate insulating film, so that the treatment can be performed in a very short time. Moreover, since the acceleration voltage at the time of addition can be low, damage to the active layer can be reduced.</p><p> After that, the EL display device may be completed according to the process of the first embodiment. The configuration of this embodiment can be freely combined with any of the configurations of Examples 1 to 5.</p>
<p> In this embodiment, an active matrix type EL display device in which pixels having a structure different from that of the first embodiment are formed will be described.</p><p> FIG. 10 (A) shows the EL display device of this embodiment, but the TFT structure is the same as that of Example 1 (see FIG. 5 (C)). In this embodiment, the pixel electrode 1001, the cathode 1002, the EL layer 1003 and the anode 1004 are formed, and the EL element 1000 is formed by the cathode 1002, the EL layer 1003 and the anode 1004. At this time, any known conductive film may be used for the pixel electrode 1001. Further, in this embodiment, an MgAg film is used as the cathode 1002, and a transparent conductive film obtained by adding gallium oxide to zinc oxide is used as the anode 1004. The EL layer 1003 may be formed by combining known materials.</p><p> In this embodiment, a recess (recess) formed in the contact portion of the pixel electrode 1001 (the portion where the pixel electrode 1001 and the current control TFT 202 are connected) is embedded with the insulator 1005, and further, the end portion of the pixel electrode 1001. Is characterized by being covered with insulation 1006.</p><p> By embedding the recesses in the insulator 1005, poor coating of the EL layer due to the step is prevented. If the contact hole formed in the second interlayer insulating film 350 is deep (high step), poor coating of the EL layer may occur and the cathode 1002 and the anode 1004 may be short-circuited. Therefore, in this embodiment, the recess is embedded with the insulator 1005 to prevent the EL layer from being poorly coated.</p><p> Similarly, since the end portion of the pixel electrode 1001 has a step corresponding to the film thickness of the pixel electrode 1001, the insulator 1006 is formed for the same reason as the insulator 1005. As a result, it is possible to reliably prevent a short circuit between the cathode 1002 and the anode 1004 at the end of the pixel electrode 1001. Further, since the end portion of the pixel electrode 1001 causes electric field concentration and the deterioration of the EL layer 1003 easily progresses, there is also an object of preventing the electric field from concentrating on the EL layer 1003 by providing the insulator 1006.</p><p> Further, FIG. 10B shows an example in which the LDD region is not formed in the active layer of the current control TFT. When the voltage applied to the EL element is 10 V or less, preferably 5 V or less, deterioration due to hot carriers hardly causes a problem, so such a structure can be adopted. That is, in the structure of FIG. 10B, the active layer of the current control TFT is composed of a source region 1010, a drain region 1011, and a channel formation region 1012.</p><p> The configuration of this embodiment can be freely combined with any of the configurations of Examples 1 to 6.</p>
<p> The EL display device of the present invention can be driven by analog driving using an analog signal as an image signal, or can be digitally driven by using a digital signal.</p><p> When analog driving is performed, an analog signal is sent to the source wiring of the switching TFT, and the analog signal including the gradation information becomes the gate voltage of the current control TFT. Then, the current flowing through the EL element is controlled by the current control TFT, and the emission intensity of the EL element is controlled to display the gradation.</p><p> On the other hand, when digital drive is performed, unlike analog gradation display, gradation display called time division drive is performed. That is, by adjusting the length of the light emission time, it is visually made that the color gradation is changed.</p><p> Since the EL element has a much faster response speed than the liquid crystal element, it can be driven at a high speed. Therefore, it can be said that it is an element suitable for time-division driving in which one frame is divided into a plurality of subframes to display gradation.</p><p> As described above, since the present invention is a technique relating to the element structure, any driving method may be used.</p>
<p> In Example 1, it is preferable to use an organic EL material as the EL layer, but the present invention can also be carried out by using an inorganic EL material. However, since the current inorganic EL material has a very high drive voltage, when performing analog drive, it is necessary to use a TFT having a withstand voltage characteristic that can withstand such a drive voltage.</p><p> Alternatively, if an inorganic EL material having a lower drive voltage is developed in the future, it can be applied to the present invention.</p><p> Further, the configuration of this embodiment can be freely combined with any of the configurations of Examples 1 to 7.</p>
<p> The external view of the EL display device of the present invention will be described. 11 (A) is a top view of the EL display device of the present invention, and FIG. 11 (B) is a cross-sectional view thereof.</p><p> In Fig. 11 (A), 4001 is the board, 4002 is the pixel part, 4003 is the source side drive circuit, 4004 is the gate side drive circuit, and each drive circuit reaches FPC (flexible printed circuit) 4006 via wiring 4005. , Connected to an external device.</p><p> At this time, the first sealing material 4101, the cover material 4102, the filling material 4103, and the second sealing material 4104 are provided so as to surround the pixel portion 4002, the source side drive circuit 4003, and the gate side drive circuit 4004.</p><p> Further, FIG. 11 (B) corresponds to a cross-sectional view obtained by cutting FIG. 11 (A) with A-A', and the drive TFT included in the source side drive circuit 4003 on the substrate 4001 (however, here, the n-channel type). The TFT and the p-channel type TFT are illustrated.) The current control TFT 4202 included in the 4201 and the pixel unit 4002 is formed.</p><p> In this embodiment, the drive TFT 4201 uses a TFT having the same structure as the n-channel TFT 205 and the p-channel TFT 206 shown in FIG. 5 (C), and the current control TFT 4202 has the same structure as the n-channel TFT 202 shown in FIG. TFT is used. Further, the pixel unit 4002 is provided with a holding capacity (not shown) connected to the gate of the current control TFT 4202.</p><p> An interlayer insulating film (flattening film) 4301 made of a resin material is formed on the driving TFT 4201 and the pixel TFT 4202, and a pixel electrode (cathode) 4302 that is electrically connected to the drain of the pixel TFT 4202 is formed on the interlayer insulating film (flattening film) 4301. As the pixel electrode 4302, a conductive film having a small work function is used. As the metal film, a conductive film containing an element belonging to Group 1 or Group 2 of the periodic table (typically, a conductive film obtained by adding an alkali metal element or an alkaline earth metal element to aluminum, copper or silver) is used. be able to.</p><p> An insulating film 4303 is formed on the pixel electrode 4302, and the insulating film 4303 has an opening formed on the pixel electrode 4302. In this opening, an EL (electroluminescence) layer 4304 is formed on the pixel electrode 4302. A known organic EL material or inorganic EL material can be used for the EL layer 4304. Further, the organic EL material includes a low molecular weight (monomer) material and a high molecular weight (polymer) material, and either of them may be used.</p><p> As a method for forming the EL layer 4304, a known vapor deposition technique or coating method technique may be used. Further, the structure of the EL layer may be a laminated structure or a single layer structure by freely combining a hole injection layer, a hole transport layer, a light emitting layer, an electron transport layer or an electron injection layer.</p><p> An anode 4305 made of a transparent conductive film is formed on the EL layer 4304. As the transparent conductive film, a conductive film containing a compound of indium oxide and tin oxide, a compound of indium oxide and zinc oxide, indium oxide, tin oxide, zinc oxide or a compound obtained by adding gallium to them can be used.</p><p> In addition, it is desirable to eliminate water and oxygen existing at the interface between the anode 4305 and the EL layer 4304 as much as possible. Therefore, it is necessary to take measures such as continuously forming both in a vacuum or forming the EL layer 4304 in a nitrogen or noble gas atmosphere to form the anode 4305 without being exposed to oxygen or moisture. In this embodiment, the above-mentioned film formation is possible by using a multi-chamber type (cluster tool method) film-forming apparatus.</p><p> The anode 4305 is then electrically connected to the wiring 4005 in the region indicated by 4306. The wiring 4005 is a wiring for applying a predetermined voltage to the anode 4305, and is electrically connected to the FPC 4006 via the anisotropic conductive film 4307.</p><p> As described above, the EL element composed of the pixel electrode (cathode) 4302, the EL layer 4304, and the anode 4305 is formed. This EL element is surrounded by a cover material 4102 bonded to the substrate 4001 by the first sealing material 4101 and the first sealing material 4101, and is sealed by the filler 4103.</p><p> As the cover material 4102, a glass material or a plastic material (including a plastic film) can be used. As the plastic material, an FRP (Fiberglass-Reinforced Plastics) plate, a PVF (polyvinyl fluoride) film, a mylar film, a polyester film or an acrylic resin film can be used.</p><p> Further, as the filler 4103, an ultraviolet curable resin or a thermosetting resin can be used, and PVC (polyvinyl chloride), acrylic, polyimide, epoxy resin, silicone resin, PVB (polyvinyl butyral) or EVA (ethylene vinyl acetate) can be used. Can be used. Deterioration of the EL element can be suppressed by providing a hygroscopic substance (preferably barium oxide) inside the filler 4103.</p><p> Further, a spacer may be contained in the filler 4103. At this time, if the spacer is formed of barium oxide, the spacer itself can be made hygroscopic. Further, when the spacer is provided, it is also effective to provide a resin film on the anode 4305 as a buffer layer for relieving the pressure from the spacer.</p><p> Further, the wiring 4005 is electrically connected to the FPC 4006 via the anisotropic conductive film 4307. The wiring 4005 transmits the signal sent to the pixel unit 4002, the source side drive circuit 4003, and the gate side drive circuit 4004 to the FPC 4006, and is electrically connected to the external device by the FPC 4006.</p><p> Further, in this embodiment, the second sealing material 4104 is provided so as to cover the exposed portion of the first sealing material 4101 and a part of the FPC 4006, and the structure is such that the EL element is thoroughly shielded from the outside air. In this way, the EL display device having the cross-sectional structure shown in FIG. 11 (B) is obtained. The EL display device of this embodiment may be manufactured by combining any of the configurations of Examples 1 to 9.</p>
<p> In this embodiment, examples of the pixel structure of the EL display device of the present invention are shown in FIGS. 12A to 12C. In this embodiment, 4601 is the source wiring of the switching TFT 4602, 4603 is the gate wiring of the switching TFT 4602, 4604 is the current control TFT, 4605 is a capacitor, 4606 and 4608 are current supply lines, and 4607 is an EL element. ..</p><p> FIG. 12A shows an example in which the current supply line 4606 is shared between the two pixels. That is, it is characterized in that the two pixels are formed so as to be line-symmetrical with respect to the current supply line 4606. In this case, since the number of current supply lines can be reduced, the pixel portion can be further refined.</p><p> Further, FIG. 12B shows an example in which the current supply line 4608 is provided in parallel with the gate wiring 4603. In FIG. 12B, the current supply line 4608 and the gate wiring 4603 are provided so as not to overlap each other, but if the wirings are formed in different layers, they overlap each other via an insulating film. It can also be provided as follows. In this case, since the occupied area can be shared between the current supply line 4608 and the gate wiring 4603, the pixel portion can be further refined.</p><p> Further, in FIG. 12 (C), the current supply line 4608 is provided parallel to the gate wiring 4603 as in the structure of FIG. 12 (B), and the two pixels are line-symmetrical with respect to the current supply line 4608. It is characterized by the fact that it is formed in. It is also effective to provide the current supply line 4608 so as to overlap with either one of the gate wiring 4603. In this case, since the number of current supply lines can be reduced, the pixel portion can be further refined.</p><p> The configuration of this embodiment can be freely combined with any of the configurations of Examples 1 to 10.</p>
<p> In this embodiment, examples of the pixel structure of the EL display device of the present invention are shown in FIGS. 13 (A) and 13 (B). In this embodiment, 4701 is the source wiring of the switching TFT 4702, 4703 is the gate wiring of the switching TFT 4702, 4704 is the current control TFT, 4705 is the capacitor (can be omitted), and 4706 is the current supply line. 4707 is a TFT for power supply control, 4708 is a gate wiring for power supply control, and 4709 is an EL element. For the operation of TFT4707 for power control, refer to Japanese Patent Application No. 11-341272.</p><p> Further, in this embodiment, the power supply control TFT 4707 is provided between the current control TFT 4704 and the EL element 4708, but as a structure in which the current control TFT 4704 is provided between the power supply control TFT 4707 and the EL element 4708. Is also good. Further, it is preferable that the power supply control TFT4707 has the same structure as the current control TFT4704, or is formed in series with the same active layer.</p><p> Further, FIG. 13A shows an example in which the current supply line 4706 is shared between the two pixels. That is, it is characterized in that the two pixels are formed so as to be line-symmetrical with respect to the current supply line 4706. In this case, since the number of current supply lines can be reduced, the pixel portion can be further refined.</p><p> Further, FIG. 13B is an example in which the current supply line 4710 is provided in parallel with the gate wiring 4703 and the power supply control gate wiring 4711 is provided in parallel with the source wiring 4701. In FIG. 13B, the current supply line 4710 and the gate wiring 4703 are provided so as not to overlap each other, but if the wirings are formed in different layers, they overlap each other via an insulating film. It can also be provided as follows. In this case, since the occupied area can be shared between the current supply line 4710 and the gate wiring 4703, the pixel portion can be further refined.</p><p> The configuration of this embodiment can be freely combined with any of the configurations of Examples 1 to 10.</p>
<p> In this embodiment, examples of the pixel structure of the EL display device of the present invention are shown in FIGS. 14 (A) and 14 (B). In this embodiment, 4801 is the source wiring of the switching TFT 4802, 4803 is the gate wiring of the switching TFT 4802, 4804 is the current control TFT, 4805 is the capacitor (can be omitted), and 4806 is the current supply line. 4807 is a TFT for erasing, 4808 is a gate wiring for erasing, and 4809 is an EL element. For the operation of TFT4807 for erasing, refer to Japanese Patent Application No. 11-338786.</p><p> The drain of the erasing TFT4807 is connected to the gate of the current control TFT4804 so that the gate voltage of the current control TFT4804 can be forcibly changed. The erasing TFT 4807 may be an n-channel TFT or a p-channel TFT, but it is preferable that the erasing TFT 4807 has the same structure as the switching TFT 4802 so that the off-current can be reduced.</p><p> Further, FIG. 14A shows an example in which the current supply line 4806 is shared between the two pixels. That is, it is characterized in that the two pixels are formed so as to be line-symmetrical with respect to the current supply line 4806. In this case, since the number of current supply lines can be reduced, the pixel portion can be further refined.</p><p> Further, FIG. 14B shows an example in which the current supply line 4810 is provided in parallel with the gate wiring 4803 and the erasing gate wiring 4811 is provided in parallel with the source wiring 4801. In FIG. 14B, the current supply line 4810 and the gate wiring 4803 are provided so as not to overlap each other, but if the wirings are formed in different layers, they overlap each other via an insulating film. It can also be provided as follows. In this case, since the occupied area can be shared between the current supply line 4810 and the gate wiring 4803, the pixel portion can be further refined.</p><p> The configuration of this embodiment can be freely combined with any of the configurations of Examples 1 to 10.</p>
<p> The EL display device of the present invention may have a structure in which any number of TFTs are provided in the pixels. Although Examples 13 and 14 show an example in which three TFTs are provided, four or six TFTs may be provided. The present invention can be implemented without being limited to the pixel structure of the EL display device.</p><p> The configuration of this embodiment can be freely combined with any of the configurations of Examples 1 to 10.</p>
<p> The EL display device formed by carrying out the present invention can be used as a display unit of various electric appliances. For example, in order to watch TV broadcasts and the like, it is preferable to use a display in which the EL display device of the present invention having a diagonal length of 20 to 60 inches is incorporated in a housing. The display in which the EL display device is incorporated in the housing includes all information display displays such as a personal computer display, a TV broadcast reception display, and an advertisement display display.</p><p> Other electrical appliances of the present invention include video cameras, digital cameras, goggles-type displays (head-mounted displays), navigation systems, music playback devices (car audio, audio components, etc.), notebook-type personal computers, game devices, and the like. Examples include a mobile information terminal (mobile computer, mobile phone, portable game machine or electronic book), and an image reproduction device (a device provided with a display unit that reproduces an image recorded on a recording medium and displays the image). Specific examples of these electric appliances are shown in FIGS. 15 and 16.</p><p> FIG. 15A shows a display in which an EL display device is incorporated in a housing, and includes a housing 2001, a support base 2002, and a display unit 2003. The EL display device of the present invention can be used for the display unit 2003. Since such a display is a self-luminous type, it does not require a backlight and can be a display unit thinner than a liquid crystal display.</p><p> FIG. 15B shows a video camera, which includes a main body 2101, a display unit 2102, an audio input unit 2103, an operation switch 2104, a battery 2105, and an image receiving unit 2106. The EL display device of the present invention can be used for the display unit 2102.</p><p> FIG. 15C shows a part (right side) of the head-mounted EL display, which includes a main body 2201, a signal cable 2202, a head fixing band 2203, a display unit 2204, an optical system 2205, and a light emitting device 2206. The present invention can be used in the EL display device 2206.</p><p> FIG. 15 (D) shows an image playback device (specifically, a DVD playback device) provided with a recording medium, which includes a main body 2301, a recording medium (DVD, etc.) 2302, an operation switch 2303, a display unit (a) 2304, and a display unit. (b) Includes 2305. The display unit (a) mainly displays image information, and the display unit (b) mainly displays character information, and the EL display device of the present invention can be used for these display units (a) and (b). The image reproduction device provided with the recording medium also includes a home-use game device and the like.</p><p> FIG. 15 (E) is a portable (mobile) computer, which includes a main body 2401, a camera unit 2402, an image receiving unit 2403, an operation switch 2404, and a display unit 2405. The EL display device of the present invention can be used for the display unit 2405.</p><p> FIG. 15 (F) is a personal computer, which includes a main body 2501, a housing 2502, a display 2503, and a keyboard 2504. The EL display device of the present invention can be used for the display unit 2503.</p><p> If the emission brightness is further increased in the future, it will be possible to magnify and project the light including the output image information with a lens, an optical fiber, or the like and use it for a front type or a rear type projector.</p><p> Further, since the light emitting portion of the light emitting device consumes electric power, it is desirable to display the information so that the light emitting portion is reduced as much as possible. Therefore, when a light emitting device is used for a mobile information terminal, particularly a display unit mainly containing character information such as a mobile phone or a music playback device, it is driven so as to form character information in the light emitting portion against a background of the non-light emitting portion. It is desirable to do.</p><p> Here, FIG. 16A is a mobile phone, which includes a main body 2601, a voice output unit 2602, a voice input unit 2603, a display unit 2604, an operation switch 2605, and an antenna 2606. The EL display device of the present invention can be used for the display unit 2604. The display unit 2604 can reduce the power consumption of the mobile phone by displaying white characters on a black background.</p><p> Further, FIG. 16B shows a music playback device, specifically a car audio system, including a main body 2701, a display unit 2702, and operation switches 2703 and 2704. The EL display device of the present invention can be used for the display unit 2702. Further, although the car audio for in-vehicle use is shown in this embodiment, it may be used for a portable type or a home-use music playback device. The display unit 2704 can reduce power consumption by displaying white characters on a black background. This is particularly effective in portable music playback devices.</p><p> As described above, the scope of application of the present invention is extremely wide, and it can be used for electric appliances in all fields. Further, as the electric appliance of this embodiment, the EL display device having any configuration shown in Examples 1 to 14 may be used.</p>
16 sheets
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Every citation, both ways
| Document | Relation | Office |
|---|---|---|
| WO9912394A1 | Cites | World Intellectual Property Organization (WIPO) |
| WO9813811A1 | Cites | World Intellectual Property Organization (WIPO) |
| JP3288824A | Cites | Japan |
| JP244317A | Cites | Japan |
| JP36974A | Cites | Japan |
48 members in 3 offices
Priority claims2
| Document | Office | Kind | Date |
|---|---|---|---|
| 1999119466 | Japan | – | |
| 11946699 | Japan | A |
Members48
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| US6512504B1 | United States of America | B1 | |
| US2003132900A1 | United States of America | A1 | |
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| EP1049176A3 | European Patent Office (EPO) | A3 | |
| JP3656819B2 | Japan | B2 | |
| US2005184936A1 | United States of America | A1 | |
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| US7274349B2 | United States of America | B2 | |
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| JP2009080491A | Japan | A | |
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| US7843407B2 | United States of America | B2 | |
| EP2259328A2 | European Patent Office (EPO) | A2 | |
| US2011090209A1 | United States of America | A1 | |
| JP4885194B2 | Japan | B2 | |
| EP2259328A3 | European Patent Office (EPO) | A3 | |
| JP2012058742A | Japan | A | |
| EP1049176B1 | European Patent Office (EPO) | B1 | |
| JP2012168548A | Japan | A | |
| JP2013190824A | Japan | A | |
| JP2013200569A | Japan | A | |
| JP2013200570A | Japan | A | |
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| JP6502600B2This record | Japan | B2 | |
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8 legal events, as the office reported them to INPADOC
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Numbers
- Publication
- 6502600
- Application
- 51578
Titles2
- Japanese
- EL表示装置
- English
- EL display device
Classification
- CPC, 20
- H10D86/481
- G09G2300/0426
- G09G2300/0842
- G09G2300/0861
- H10K59/38
- H10K59/1213
- H10K59/1216
- H10K59/131
- H10K2102/3026
- H10D86/441
- H10D86/60
- H10D30/0314
- H10D30/0321
- H10D30/6719
- H10D30/6715
- H10K59/12
- H10D86/00
- H10D86/40
- H10D86/471
- H10D86/80
- IPC, 14
- G09G3 3233
- G09G3 20
- G09G3 30
- H01L51 50
- H05B33 14
- G09F9 30
- H01L21 336
- H01L21 77
- H01L27 12
- H01L27 13
- H01L27 32
- H01L29 786
- H05B33 12
- H05B44 00
