Semiconductor circuit, method for driving the same, storage device, register circuit, display device, and electronic device
6 claims: 4 independent, 2 dependent
- 1第1のトランジスタと、第2のトランジスタと、容量素子と、を有し、 前記第1のトランジスタのゲートは、前記第1のトランジスタのソース又はドレインの一方と電気的に接続され、 前記第1のトランジスタのソース又はドレインの一方は、前記第2のトランジスタのバックゲートと直接接続され、 前記第1のトランジスタのソース又はドレインの一方は、前記容量素子と電気的に接続され、 前記第1のトランジスタは、チャネル形成領域にIn、Ga、Zn及びOを有し、 前記第2のトランジスタは、チャネル形成領域にIn、Ga、Zn及びOを有することを特徴とする半導体装置。
- 2第1のトランジスタと、第2のトランジスタと、容量素子と、を有し、 前記第1のトランジスタのゲートは、前記第1のトランジスタのソース又はドレインの一方と電気的に接続され、 前記第1のトランジスタのバックゲートは、前記第1のトランジスタのソース又はドレインの一方と電気的に接続され、 前記第1のトランジスタのソース又はドレインの一方は、前記第2のトランジスタのバックゲートと直接接続され、 前記第1のトランジスタのソース又はドレインの一方は、前記容量素子と電気的に接続され、 前記第1のトランジスタは、チャネル形成領域にIn、Ga、Zn及びOを有し、 前記第2のトランジスタは、チャネル形成領域にIn、Ga、Zn及びOを有することを特徴とする半導体装置。
- 3第1のトランジスタと、複数の第2のトランジスタと、容量素子と、を有し、 前記第1のトランジスタのゲートは、前記第1のトランジスタのソース又はドレインの一方と電気的に接続され、 前記第1のトランジスタのソース又はドレインの一方は、前記複数の第2のトランジスタのバックゲートと直接接続され、 前記第1のトランジスタのソース又はドレインの一方は、前記容量素子と電気的に接続され、 前記第1のトランジスタは、チャネル形成領域に 酸化インジウムガリウム亜鉛系化合物 を有し、 前記複数の第2のトランジスタは、チャネル形成領域に 酸化インジウムガリウム亜鉛系化合物 を有することを特徴とする半導体装置。
- 4第1のトランジスタと、複数の第2のトランジスタと、容量素子と、を有し、 前記第1のトランジスタのゲートは、前記第1のトランジスタのソース又はドレインの一方と電気的に接続され、 前記第1のトランジスタのバックゲートは、前記第1のトランジスタのソース又はドレインの一方と電気的に接続され、 前記第1のトランジスタのソース又はドレインの一方は、前記複数の第2のトランジスタのバックゲートと直接接続され、 前記第1のトランジスタのソース又はドレインの一方は、前記容量素子と電気的に接続され、 前記第1のトランジスタは、チャネル形成領域に 酸化インジウムガリウム亜鉛系化合物 を有し、 前記複数の第2のトランジスタは、チャネル形成領域に 酸化インジウムガリウム亜鉛系化合物 を有することを特徴とする半導体装置。
- 5請求項1又は請求項2において、 前記第1のトランジスタを介して前記第2のトランジスタのバックゲートに供給される電圧に応じて、前記第2のトランジスタのしきい値電圧を制御することが可能であることを特徴とする半導体装置。
- 6請求項3又は請求項4において、 前記第1のトランジスタを介して前記複数の第2のトランジスタのバックゲートに供給される電圧に応じて、前記複数の第2のトランジスタのしきい値電圧を制御することが可能であることを特徴とする半導体装置。
Independent claims6
151 paragraphs, as filed
The present invention relates to a semiconductor circuit and a method for driving the same. The present invention is a storage device, a display device, and an electric device. Regarding child devices.
Field effect transistors (FETs, hereinafter also referred to as transistors) are source, gate, and de. It has three electrodes of rain, and it is connected between the source and drain by applying a voltage to the gate. Controls the flow of flowing electrons or holes. The semiconductor used as the active layer is Group IV elements such as silicon and germanium, gallium arsenide, indium phosphide, gallium nitride, etc. Group III-V compounds, group II-VI compounds such as zinc sulfide and cadmium telluride can be mentioned. To.
In recent years, oxides such as zinc oxide and indium gallium oxide zinc-based compounds have been used as semiconductors. FETs have been reported (Patent Document 1 and Patent Document 2). Using these oxide semiconductors FETs provide relatively high mobilities and their materials are at least 3 electron volts. Because it has a large bandgap, it displays transistors using oxide semiconductors. -And it is being discussed to apply it to power devices.
By the way, the transistor is greatly enhanced by the difference in its threshold voltage. It is classified into two types, a type (normally off type) and a depression type (normally on type). To. In general, the enhancement type is off when the potential difference between the gate and source is 0V. On the other hand, the depletion type is different in that it is in the on state.
<p num="0005"><patcit num="1"><text>U.S. Patent Publication 2005/0199879</text></patcit><patcit num="2"><text>U.S. Patent Publication 2007/0149379</text></patcit></p>
<p num="0006"> The threshold voltage of a transistor tends to fluctuate according to the manufacturing process of the transistor. It is difficult to control strictly. Also, depending on the circuit operation and usage environment, it may deteriorate. It may fluctuate. Therefore, the threshold voltage of the transistor is controlled and held to the desired value. It is desired to do.</p><p num="0007">In addition, it controls the threshold voltage of the transistor, and when there is one transistor, it is enhaged. It is desirable to use it properly as an installation type and sometimes as a depression type. ing.</p><p num="0008"> For example, when a transistor is used as a switching element, it is enhaged when it is not operating. As an instrument type, it suppresses leakage current and reduces power consumption. On the other hand, a large current during operation It is used as a depletion type to flow. Such proper use is to erase the transistor. It is very effective in reducing power consumption and improving power efficiency.</p><p num="0009"> In particular, a storage device having a memory cell having a transistor and a holding capacity, and an electronic device In display devices such as par and liquid crystal display devices, the transistor has an extremely high leakage current. Prolonging the holding time by using a reduced enhancement type transistor Is possible.</p><p num="0010"> Also, for example, an ESD (ElectroStatic Discharge) protection circuit When using it for any purpose, keep it in a depletion type so that the surge current can be efficiently released. Is effective.</p><p num="0011"> As a method of controlling the threshold voltage of the transistor, it is provided so as to face each other across the channel. By applying a bias voltage to one of the two gate electrodes A method of shifting the threshold voltage of a transistor is known. Bias voltage here One of the gate electrodes to be applied may be called a back gate.</p><p num="0012"> However, in the above method, the transistor is used while no voltage is applied to the back gate. The threshold voltage of is not kept at the desired value. Also, always send electricity to the back gate Since it is necessary to input the pressure, problems such as increased power consumption and complicated circuit operation was there.</p><p num="0013"> An object of the present invention is to provide a semiconductor circuit capable of holding the threshold voltage of a transistor at an optimum value. One of the issues is to provide. In addition, a semiconductor circuit that can control the threshold voltage of the transistor , And to provide a driving method thereof. In addition, the description to which the above semiconductor circuit is applied One of the challenges is to provide storage devices, display devices, and electronic devices.</p>
<p num="0014"> In order to achieve the above object, the present invention is a half that inputs a voltage to the back gate of a transistor. I focused on the conductor circuit. Transistor threshold as a semiconductor circuit connected to the back gate It is possible to apply the desired voltage so that the value voltage is optimized, and maintain that voltage. A semiconductor circuit that can be used may be used. Furthermore, the voltage of the back gate is temporarily changed. A semiconductor circuit can be used.</p><p num="0015"> That is, in one aspect of the present invention, one electrode is connected to the back gate of the first transistor. Then, a diode in which a signal is input to the other electrode and one electrode in which one electrode is a diode A first capacitive element that is connected to and the other electrode is grounded, and a first that is connected in parallel with the diode. In a semiconductor circuit that has two capacitive elements and can control the threshold value of the first transistor. is there.</p><p num="0016"> Further, in one aspect of the present invention, the first input signal is input from the input unit via a diode, and the first input signal is input. The first capacitive element holds the first voltage, and the back gate of the transistor is the first. 1st step where the voltage of is applied and the threshold voltage of the transistor is set as the 1st threshold voltage. The second input signal is input via the second capacitive element connected in parallel to the diode. A second voltage is applied to the back gate of the transistor to set the threshold voltage of the transistor to the second. It is a method of driving a semiconductor circuit having a second step of setting the threshold voltage of.</p><p num="0017"> The output terminal of the semiconductor circuit of the present invention is a backing of a controlled transistor (first transistor). Connected to the gate, the semiconductor circuit is a diode at the output node to the backgate. A first capacitive element with the other electrode grounded is connected, and a second capacitance is connected in parallel with the diode. The elements are connected. As will be described in detail later, the orientation of the diode is the pole of the transistor. Select as appropriate according to the characteristics and the positive / negative of the input voltage.</p><p num="0018"> Since the voltage input from the other electrode of the diode is held by the first capacitive element, The bias voltage (voltage of the output node) output to the back gate of the controlled transistor is the same. It is retained even if the voltage input is stopped. Therefore, the controlled transition connected to the semiconductor circuit The threshold voltage of the star is maintained at an appropriate value even after the voltage input is stopped.</p><p num="0019"> In addition, when a voltage with the opposite polarity to the above voltage is input to the input section of the semiconductor circuit, it becomes a diode. The voltage of the output node changes temporarily due to the capacitive coupling of the second capacitive element connected in parallel. To do. Therefore, the threshold voltage of the controlled transistor connected to the output node is temporarily set. Can be changed to.</p><p num="0020"> Further, in one aspect of the present invention, the diodes constituting the above semiconductor circuit form a channel. It is composed of a second transistor using an oxide semiconductor for the semiconductor layer.</p><p num="0021"> The diode that constitutes the above semiconductor circuit is an oxide semiconducting to the semiconductor layer that forms the channel. Transistors using the body can be applied. Oxidation produced through an appropriate production process Transistors using physical semiconductors have the characteristic that the off-current is extremely small, so the above half It is possible to extremely lengthen the holding time of the voltage held in the conductor circuit.</p><p num="0022"> Further, in one aspect of the present invention, the first transistor to which the above semiconductor circuit is connected is An oxide semiconductor is used for the semiconductor layer forming the flannel.</p><p num="0023"> The above oxide semiconductor is used for the semiconductor layer that forms the channel of the controlled transistor, and this is used. By applying it to storage devices and display devices, the retention time of data and display images can be extremely extended. It becomes possible.</p><p num="0024"> Further, the semiconductor circuit according to one aspect of the present invention includes a storage device including a register circuit, a display device, and a display device. , Can be applied to various electronic devices.</p><p num="0025"> By applying the semiconductor device of the present invention to a storage device such as a register circuit, the power supply is interrupted. Data can be retained even if it is turned off, and refresh (reset) operation is possible. It can be a storage device with extremely reduced power consumption. Such a storage device is a CPU Personal computers and mobile phones equipped with this by applying it to any arithmetic unit Electronic devices such as the above can temporarily cut off the power supply, consume low power, and restart. It can be a fast electronic device.</p><p num="0026"> In addition, by applying it to display devices such as electronic paper and liquid crystal display devices, power can be supplied. The display image can be retained even if it is cut off, and the refresh operation is possible, and the power consumption is extremely low. It can be a reduced display device.</p>
<p num="0027">According to the present invention, a semiconductor circuit capable of holding the threshold voltage of a transistor at an optimum value is provided. it can. In addition, a semiconductor circuit that can control the threshold voltage of the transistor and its driving method Can be provided. We also provide storage devices, display devices, and electronic devices to which the above semiconductor circuits are applied. Wear.</p>
<figref num="1">The figure explaining the semiconductor circuit of one aspect of this invention.</figref><figref num="2">Transistor characteristics when using a semiconductor circuit according to one aspect of the present invention.</figref><figref num="3">The figure explaining the semiconductor circuit of one aspect of this invention.</figref><figref num="4">The figure explaining the register circuit of one aspect of this invention.</figref><figref num="5">The figure explaining the memory circuit of one aspect of this invention.</figref><figref num="6">The figure explaining the display device of one aspect of this invention.</figref><figref num="7">The figure explaining the manufacturing process of the transistor of one aspect of this invention.</figref><figref num="8">The figure explaining the electronic device of one aspect of this invention.</figref>
The embodiment will be described in detail with reference to the drawings. However, the present invention is limited to the following description. In addition, the form and details of the present invention may be changed in various ways without departing from the spirit and scope of the present invention. What can be done is easily understood by those skilled in the art. Therefore, the present invention is an embodiment shown below. It is not limited to the contents described in. It should be noted that the structure of the invention described below Therefore, the same reference numerals are used in common between different drawings for the same parts or parts having similar functions. , The description of the repetition is omitted.
In addition, in each figure described in this specification, the size of each structure, the thickness of a layer, or a region is defined as a region. May be exaggerated for clarity. Therefore, it is not necessarily limited to that scale. I.
A transistor is a type of semiconductor element that controls current and voltage amplification and conduction or nonconduction. It is possible to realize the switching operation that is controlled. Transistors in this specification are , IGFET (Insulated Gate Field Effect Trans) istor) and thin film transistor (TFT) )including.
Also, the "source" and "drain" functions are when transistors with different polarities are used. Or, it may be replaced when the direction of the current changes in the circuit operation. others Therefore, in this specification, the terms "source" and "drain" may be used interchangeably. It should be possible.
Further, in the present specification and the like, either the source or the drain of the transistor is used. Is sometimes called the "first electrode", and the other of the source or drain is also called the "second electrode". To. At this time, the gate is also referred to as a "gate" or a "gate electrode".
Further, in the present specification and the like, transistors are provided so as to face each other with the semiconductor layer interposed therebetween. If you have two gate electrodes, these are the "first gate electrode" and the "second gate electrode". One of them is sometimes called "back gate".
Further, in the present specification and the like, of the two electrodes of the diode, the direction in which the current flows. The input side (anode side) is the "first electrode" and the output side (cathode side) is the "second electrode". Will be called.
Further, in the present specification and the like, one of the two electrodes of the capacitive element is referred to as a "first electrode". , The other is referred to as "second electrode". For clarification, when explaining with reference to a circuit diagram, etc. Of the two electrodes, the electrode located on the upper side or the left side of the paper surface is the first electrode and the lower side of the paper surface. Alternatively, the electrode located on the right side is called the second electrode.
Further, in the present specification and the like, "electrically connected" means "having some electrical action". Includes cases where it is connected via ". Here, "although it has some electrical action "No" is not particularly limited as long as it enables the exchange of electrical signals between connection targets. .. For example, "things that have some kind of electrical action" include electrodes, wiring, and transitions. Has switching elements such as data, resistance elements, inductors, capacitors, and various other functions Elements and the like are included.
In addition, in this specification and the like, a node enables an electrical connection of elements constituting a circuit. An element (for example, wiring). Therefore, what is "the node to which A is connected"? , A wiring that is electrically connected to A and can be regarded as having the same potential as A. In addition, in the middle of wiring Elements that allow electrical connections inside (eg switches, transistors, capacitive elements, ins) Even if one or more ducts, resistance elements, diodes, etc. are arranged, if they have the same potential as A , The wiring can be regarded as the node to which A is connected.
Further, in the present specification and the like, an element constituting a circuit or a structural unit composed of a plurality of elements When there are a plurality of devices and they have a common function, the element or configuration thereof. When explaining the configuration, functions, etc. common to each unit, add (n) to the code. There is. In addition, elements having these common functions, or a part of the constituent units, or When referring to all, the code may be added with (1 to n).
(Embodiment 1) In the present embodiment, one of the semiconductor circuits capable of controlling the threshold voltage of the transistor of the present invention. An example will be described with reference to FIGS. 1 to 3.
<Configuration example> FIG. 1A shows the control circuit 100 illustrated in this embodiment and the transition connected to the control circuit 100. It is a figure explaining the star 111.
Transistor 111 has a back gate (second gate electrode) at the back gate. Is input with the output voltage from the control circuit 100. In this embodiment, with the transistor 111 The case where an n-channel type transistor is used will be illustrated as an example. An engineer can also be used.
The control circuit 100 includes a diode 101, a capacitive element 103, and a capacitive element 105. .. An input terminal IN is connected to the control circuit 100. The diode 101 has a second electrode It is connected to the force unit, and the first electrode is connected to the first electrode of the capacitive element 103. No. 1 of capacitive element 103 2 Electrodes are grounded. Further, the capacitance element 105 is connected in parallel with the diode 101. There is. Here, the first electrode of the diode 101, the first electrode of the capacitive element 103, and the capacitive element The node to which the second electrode of 105 is connected corresponds to the output section of the control circuit 100, and will be a node in the future. Notated as (A).
<Circuit operation example> Next, how to control the threshold voltage of the transistor 111 using the control circuit 100. This will be described with reference to FIG. 2 in addition to FIG. Fig. 2 (A) and Fig. 2 (B) are shown in Fig. 1 (A). When a certain source-drain voltage (Vds) is applied to the transistor 111 shown. Schematic representation of source-drain current (Ids) with respect to gate-source voltage (Vgs) It is a figure shown.
The curve 151 shown in FIG. 2 (A) shows the Vgs-Id in the initial state of the transistor 111. s characteristic. In this embodiment, the threshold voltage Vth of the transistor in the initial state ( 0) will be described as 0V.
First, from the input terminal IN of the control circuit 100, the amplitude voltage smaller than 0V (negative amplitude voltage) ) Is input. The first power of the diode 101 by the first input signal A current flows from the pole to the second electrode, and the voltage of node (A) drops accordingly. The voltage is held by the capacitive element 103.
After that, the input of the first input signal is stopped (the voltage of the first input signal is 0V). here And since the voltage of node (A) is lower than 0V, the diode 101 is marked with a reverse bias. Since it is in the added state, only a small leak current flows, and the electricity of node (A) The pressure is held by the capacitive element 103.
Therefore, the back gate of the transistor 111 connected to the output section of the control circuit 100 The negative voltage held in the node (A) is always applied to the node (A). resulting in, The Vgs-Ids characteristic of the transistor 111 is Vgs as shown in curve 152 shown in FIG. 2 (A). Shifts in the positive direction. The threshold voltage of the transistor 111 in this state is set to Vth (1). And.
By adjusting the amplitude voltage of the first input signal as appropriate, the transistor 111 can be arranged on the curve 1. It can be an enhancement type transistor having the characteristics shown in 52.
As described above, the voltage of node (A) is held by the capacitive element 103. Since the charge held here is reduced only by the small leakage current of the diode 101, Keeping the threshold value of transistor 111 at the optimum value even after the input of the input signal is stopped. Can be done.
Next, the transistor 111, which has the enhanced characteristics as described above, is described as one. Temporarily depletion type, that is, the threshold voltage is temporarily negatively shifted. I will explain how to make it.
From the input terminal IN, it has an amplitude voltage (positive amplitude voltage) larger than 0V and a positive voltage. A second input signal with a gradient is input. When the second input signal is input, the capacitive element 10 Capacitive coupling phenomenon occurs due to 5, and the voltage of node (A) rises temporarily.
Therefore, a positive voltage is temporarily applied to the back gate of the transistor 111. Therefore, the Vgs-Ids characteristic is temporarily determined by Vgs, as shown in curve 153 in Fig. 2 (B). Shift in the negative direction. Let the threshold voltage of the transistor 111 at that time be Vth (2). To.
Adjust the amplitude voltage and positive voltage gradient of the second input signal as appropriate.Transistor 1 by 11 is a depletion type transistor that temporarily has the characteristics shown in curve 153. Can be.
Here, as described above, in order to temporarily raise the voltage of node (A), the capacitive element It uses the capacitive coupling phenomenon of 105. Therefore, the magnitude of the voltage fluctuation of node (A) is , It is proportional to the size of the capacitive element 105 and the size of the voltage gradient of the waveform of the second input signal. Therefore, the waveform of the second input signal sets the threshold voltage of the transistor 111 to a desired value. It may be set appropriately so as to be used. Also, the threshold voltage of the transistor 111 can be quickly set. In order to shift well, the waveform of the second input signal has a positive voltage gradient that is as steep as possible. It is preferable to do so. In addition, the waveform of the second input signal includes a square wave, a triangular wave, a sine wave, etc. A waveform with a gradient can be used.
In the above, the Vth of the transistor 111 is positively shifted by the first input signal. A configuration and method in which Vth is temporarily negatively shifted by the second input signal while holding it as it is. The method has been described, but as shown in FIG. 1 (B), the first electrode and the first electrode of the diode 101 By connecting the two electrodes in opposite directions, it is possible to reverse the direction in which Vth is shifted. It becomes Noh. In that case, the first control signal is a signal having a positive amplitude voltage, and the second control signal No. is a signal with a negative amplitude voltage and a negative voltage gradient.
Further, in the present embodiment, an n-channel transistor is used as the controlled transistor. However, it is not limited to this, and can be applied to p-channel type transistors. For example, Figure 1 (A When a p-channel type transistor is applied to the transistor 111 shown in), the first input The threshold voltage is positively shifted by the force signal to make it a depletion type, and the second control It has an enhancement type characteristic by temporarily negatively shifting the threshold voltage by a signal. It can be a p-channel type transistor. In addition, the opposite characteristic was realized. For this purpose, the diode connection may be reversed to the configuration shown in Fig. 1 (B), and the above method may be used. ..
<Modification example> Here, the diode 101 constituting the control circuit 100 is configured by using a transistor. Can be Fig. 3 (A) and Fig. 3 (B) show the diodes that make up the control circuit. An example of applying Gista is shown.
For example, as shown in the transistor 107 in the control circuit 100 shown in FIG. 3 (A), the first electrode is Connect to the input terminal IN, and connect the second electrode and gate electrode to node (A). As a result, the transistor 107 can be used as a diode. Also, Figure 3 ( A back gate is provided as shown in transistor 109 shown in B), and two gate electrodes are nod. It may be configured to connect with e (A). In addition to the gate electrode, node the back gate (A ), The current value when forward bias is applied can be made larger, and the first The input time of the input signal can be shortened. Furthermore, the leak current when reverse bias is applied It is possible to keep it lower, and it is possible to lengthen the holding time of the voltage of node (A). come.
To reverse the diode characteristics, input the gate electrode (and back gate). Just connect to the node on the terminal IN side.
In addition, the diodes that make up the control circuit and the semiconductor layers that form the channels are oxide semiconductors. Transistors using the above can be applied. Appropriate work, as shown in later embodiments Transistors using oxide semiconductors manufactured through the manufacturing process have extremely small off-currents. Due to its characteristics, it is possible to extremely lengthen the holding time of the voltage held in the control circuit. Will be.
In particular, among oxide semiconductors, those with a bandgap of 3 electron volts or more are donors. Or the acceptor concentration is 1x10<sup>12</sup>cm<sup>-3</sup>By setting the following, the resistance at the time of off Can be extremely high. For example, such transistors are used to optimize the gate voltage. The resistance between the source and drain is 1 × 10<sup>24</sup>It can be Ω or more. Therefore Even if it is a diode-connected transistor, for example, a transistor using silicon for the semiconductor layer The leakage current when off can be made extremely small compared to the Jista.
By applying such a transistor to the diodes that make up the control circuit, n The leakage current due to the diode is extremely small while the voltage is held in ode (A). The threshold voltage of the controlled transistor is maintained for an extremely long time because it can be used. You can do it. Also, since the leak current is extremely small, the voltage of node (A) can be changed. It is possible to reduce the size of the capacitive element for holding, and the circuit scale can be reduced. It also has secondary effects such as shortening the charge / discharge time to node (A). ..
By using the control circuit illustrated in this embodiment, the threshold voltage of the transistor can be set. It can be controlled to the optimum value, and even if the power supply voltage is stopped, the threshold voltage of the transistor is increased. The pressure can be retained. Also, by temporarily shifting the threshold voltage. , Different transistor characteristics can be realized.
This embodiment shall be carried out in combination with other embodiments described in the present specification as appropriate. Can be done.
(Embodiment 2) In the present embodiment, the threshold voltage of the transistor illustrated in the first embodiment can be controlled. Fig. 4 is used for an example of a configuration in which a semiconductor circuit is applied to a register circuit, which is one of storage devices. I will explain.
<Configuration example> FIG. 4 (A) shows a 1-bit cash register to which the control circuit 100 illustrated in the first embodiment is connected. A configuration example of the star circuit is shown. The register circuit 200 includes a transistor 201 and a capacitive element 203. , And a flip-flop circuit 205. In this embodiment, with transistor 201 Then, an n-channel type transistor is used.
The transistor 201 is a back game like the transistor 111 shown in the first embodiment. The back gate has an output voltage from the control circuit 100. Entered. Further, the transistor 201 has an input terminal Sig1 at its first gate electrode. Also, the input terminal Sig2 is connected to the first electrode, and the input signals from these two input terminals can be used. Therefore, it is controlled. The second electrode of the transistor 201 is the first electrode of the capacitive element 203 and the second electrode. It is connected to the flip-flop circuit 205. In addition, the second electrode of the capacitive element 203 is grounded. There is. Here, the second electrode of the transistor 201 and the first electrode of the capacitive element 203 are connected. The node to be used is called node (b).
The flip-flop circuit 205 includes an inverter 205a and an inverter 205b. To. The inverter 205a is connected in parallel and in the opposite direction to the inverter 205b, and is an inverter. The node to which the output side of the data 205a is connected corresponds to the output terminal OUT of the register circuit 200. To do.
The register circuit 200 receives data from the input signals from the input terminals Sig1 and Sig2. Is stored and output. For example, higher level voltage than Sig1 and higher than Sig2 When the bell voltage is input, the transistor 201 is turned on and the node (b) is hired. The bell voltage is input. As a result, the inverter 20 is transmitted from the output terminal of the register circuit 200. Flip-flop circuit 2 at the same time as the low level voltage inverted by 5a is output. Low level voltage data is stored in 05. On the other hand, low level voltage is input from Sig2. When forced, a high level voltage is output from the output terminal of the register circuit 200 in the same way. At the same time, high level voltage data is stored in the flip-flop circuit 205.
The capacitive element 203 has a function of holding the voltage of the node (b). As explained later In addition, the control circuit 100 enhances the transistor 201 with extremely low leakage current. Input to node (b) by providing capacitive element 203 when held in the state of The generated voltage can be maintained even if the supply of the power supply voltage is stopped.
In this embodiment, the flip-flop circuit included in the register circuit 200 is used as an example. The simple configuration using two inverter circuits was shown, but the configuration is not limited to this. Configuration using a clocked inverter capable of clock operation, NAND circuit and inverter Can be appropriately used in a configuration in which the above are combined. For example, RS type, JK type, D type, T type, etc. , A known flip-flop circuit can be used as appropriate.
<Circuit operation example> Next, the circuit operation of the register circuit 200 to which the control circuit 100 is connected will be described.
First, by the method shown in the first embodiment, 0V is obtained from the input terminal IN of the control circuit 100. Input the first input signal with a very small amplitude voltage (negative amplitude voltage), and transistor 2 Transistor 201 is enhanced by changing the threshold voltage of 01. Control and hold so that it becomes a data.
Next, a signal is input from the input terminals Sig1 and Sig2 of the register circuit 200, and the signal is displayed. Stores and outputs data. Transistor from Sig1 when writing data to register circuit Input a voltage higher than the threshold voltage of 201, and a higher level voltage than Sig2 or Data is assigned to the flip-flop circuit 205 by inputting a low-level voltage signal. I can pay.
Also, before stopping the signal input to Sig2, the signal of Sig1 is transferred to transistor 2. By setting the voltage at which 01 turns off (for example, 0V or a voltage smaller than 0V), Sig Even after the input signal from 2 is stopped, a voltage close to the input voltage is held in the capacitive element 203. To.
Here, the control circuit 100 causes the transistor 201 to have an extremely small leakage current. It is held in a suspension type transistor. Therefore, it is high in node (b) Node due to leakage from transistor 201 even when bell voltage is held The voltage drop in (b) can be made extremely small.
Moreover, even when the power supply to the control circuit 100 and the register circuit 200 is stopped, the transistor Gista 201 is held by an enhancement type transistor with extremely low leakage current. Therefore, it is possible to maintain the voltage of node (b). Turn off the power supply In the meantime, by holding the voltage information in node (b), the register circuit 200 Power is supplied as data stored in the register circuit 200 at the same time when the power is turned on again. Since the same data as the one immediately before stopping is confirmed, the data is stored and output instantly. It becomes possible.
Here, a semi-conduct that forms a channel on the transistor 201 as shown in the first embodiment. It is possible to apply a transistor with an extremely small off-current that uses an oxide semiconductor for the body layer. come. Applying such a transistor with extremely small off-current to transistor 201 This makes it possible to maintain the voltage of node (b) for an extremely long time. Therefore, the register circuit 200 can be used as a so-called non-volatile register circuit. Wear.
Next, the operation of resetting the data stored in the register circuit 200 will be described.
As in the first embodiment, the amplitude voltage (positive) higher than 0V from the input terminal of the control circuit 100. Transistor 201 temporarily by inputting a second input signal with (amplitude voltage) The threshold voltage of is negatively shifted, and the transistor 201 is temporarily depleted. Transistor.
Sig1 is an enhancement type transition before the second input signal is input. The voltage that turns off the star 201 is input, but when the second input signal is input, , Transistor 201 temporarily shifts to the ON state. Therefore, node (b) is one It can be a voltage close to the voltage input from Sig2. For example, the second input message If a high level voltage is input to Sig2 when inputting the number, node (b) will also be c. If the level voltage is input and the low level voltage is input to Sig2, nod as well. The data of e (b) is also reset by inputting a low level voltage.
After that, when the input of the second input signal is stopped, the threshold voltage of the transistor 201 becomes the second. Since the control signal of is returned to the value before it was input, the enhancement with extremely small leakage current. It becomes a type transistor. Therefore, it is reset and input by the second input signal. The data will be retained again.
By such a method, the register circuit 200 is rated without using the input signal from Sig1. It is possible to reset the delivered data. This method is more than one, as will be explained later. In a storage device having a register circuit of, it is stored in a plurality of register circuits in one operation. This is especially effective when resetting data.
<Application example> Next, the control circuit of the present invention is applied to a storage device having a plurality of register circuits 200 described above. An example of application will be described.
In FIG. 4 (B), a plurality of register circuits 200 shown in FIG. 4 (A) are arranged vertically and horizontally in a matrix. The stored storage device 210 is shown. The storage device 210 is provided in addition to the plurality of register circuits 200. It has a first drive circuit 211, a second drive circuit 213, and a plurality of control circuits 100. Book In the embodiment, the plurality of register circuits 200 have m rows and n columns (m and n are integers of 1 or more). It is arranged in a lix shape, and one control circuit 100 is provided for each line, for a total of m. To do.
The first drive circuit 211 is the first gate of transistor 201 in the register circuit 200. It has m control lines Sig1 (1) to Sig1 (m) connected to the electrodes, and each control Transistors in a register circuit lined up in a row using lines Sig1 (1) to Sig1 (m) Controls the on / off operation of 201. In addition, the first drive circuit 211 is the first to the mth. It has m control lines IN (1) to IN (m) connected to each of the control circuits of Controls the input signal to the control circuit 100 connected to.
The second drive circuit 213 is in contact with the first electrode of the transistor 201 in the register circuit 200. It has n control lines Sig2 (1) to Sig2 (n) that are continued, and each control line Si Data to be input to the register circuits 200 arranged in a row using g2 (1) to Sig2 (n) Control the signal of.
An output signal line is connected to each register circuit 200, and the output of the register circuit 200 The signal is output to the output signal line. In this embodiment, m × n output signal lines are used. However, the output signal lines from multiple register circuits are shared, and data is selectively read. It may be configured as a Also, a serial signal or several bits in parallel at the end of the output signal line. A circuit having various functions such as a conversion circuit for converting into a signal may be provided.
The control circuit 100, which is arranged one by one in each row, is connected to the control lines IN (1) to IN (m). From the first drive circuit 211, the first input signal as shown in the first embodiment, and the second The input signal is input. It is connected to each control circuit 100 by the first input signal. Controls and holds the threshold voltage of the transistor 201 in the n register circuits to the optimum value. Can be Furthermore, when the second control signal is input, the tiger in the n register circuits To temporarily change the engineer 201 from the enhancement type to the depletion type Therefore, the data stored in each register circuit can be reset simultaneously with one signal. Can be done.
In the present embodiment, one control circuit is arranged in each line, but this is limited to this. However, one or more control circuits may be provided. For example, one control circuit for all register times The threshold value of the path 200 may be controlled, one may be provided in a plurality of lines, and each register circuit 2 may be provided. The control circuit 100 may be provided one by one at 00.
By applying the control circuit of the present invention as described above, the threshold voltage is maintained at the optimum value. A storage device having a plurality of register circuits that can be easily reset. it can. In addition, even though it is a register circuit, data can be retained even if the power supply is stopped. A register circuit having so-called non-volatility can be realized.
This embodiment shall be carried out in combination with other embodiments described in the present specification as appropriate. Can be done.
(Embodiment 3) In the present embodiment, the threshold voltage of the transistor illustrated in the first embodiment can be controlled. An example in which a semiconductor circuit is applied to a storage device having a configuration different from that illustrated in the second embodiment. This will be described with reference to FIG.
<Configuration example> FIG. 5A is a 1-bit memo to which the control circuit 100 illustrated in the first embodiment is connected. A configuration example of the resell 250 is shown. The memory cell 250 includes a transistor 251 and a capacitance element 25. It has 3 and a transistor 255. In this embodiment, it is actually a transistor 251. Similar to the transistor 201 shown in the second embodiment, an n-channel transistor is used.
The output voltage from the control circuit 100 is input to the back gate of the transistor 251. .. Further, the transistor 251 has an input terminal Sig3 at its first gate electrode, and the first one. Input terminal Sig4 is connected to the electrode and controlled by control signals from these two input terminals. Be controlled. The second electrode of the transistor 251 is the first electrode of the capacitive element 253 and the transition. It is connected to the gate electrode of the star 255. The second electrode of the capacitive element 253 has an input end. The child Sig5 is connected. The second electrode of transistor 255 is grounded and the first electrode is connected. The node corresponds to the output part of the data from the memory cell. Here, transistor 251 The node to which the second electrode of the capacitance element 253 and the first electrode of the capacitive element 253 are connected is called a node (c). I will do it.
The capacitance element 253 is attached to the node (c) in the same manner as the capacitance element 203 illustrated in the second embodiment. It has a function to hold the input voltage. Also, to the voltage input from the input terminal Sig5 Therefore, the voltage of node (c) can be changed.
The transistor 255 is provided to read the data (voltage) held in the memory cell. Be done. The first electrode of the transistor 255 is connected to the power input terminal VD via the resistance element 257. D is connected, and the output terminal OU is connected between the resistance element 257 and the first electrode of the transistor 255. T is connected. Here, in the present embodiment, the transistor 255 is an n-channel type. Use a transistor. For example, when node (c) has a high level voltage, the transition The star 255 is turned on, and the ground voltage is output to the output terminal OUT. Meanwhile, nod When e (c) has a low level voltage, the transistor 255 is ten compared to the resistor element 257. It becomes an off state with high resistance, and the power supply voltage input to the power supply terminal is output to the output terminal OUT. Is done. In this way, the voltage value of node (c) can be read out.
In this embodiment, an n-channel transistor is applied to the transistor 255, A p-channel type transistor can also be used. In this case, the number of transistor 255 To connect the power input terminal VDD to the two electrodes and ground the second electrode of the resistance element 257. Therefore, the read operation can be performed.
<Circuit operation example> Next, the circuit operation of the memory cell 250 to which the control circuit 100 is connected will be described.
First, as described in the first and second embodiments, the first input signal is input to the control circuit 100. Then, the threshold voltage of the transistor 251 is adjusted to the optimum value, and the enhancement type transistor is used. Control and hold in the engineer.
When writing data to the memory cell 250, the input terminal Si is the same as in the second embodiment. The voltage held in node (c) by the input signal from g3 and input terminal Sig4 Write by inputting. Here, node (c) has a high level voltage and Holds low level voltage.
Here, as in the second embodiment, the transistor 251 is as shown in the first embodiment. An oxide semiconductor is used for the semiconductor layer that forms the channel, and the transition with extremely small off-current Stars can be applied. Transistor such a transistor with extremely small off-current By applying to Gista 251 it holds the voltage of node (c) for an extremely long time. The memory cell 250 is a so-called non-volatile storage device because it can be stored. Can be used.
The read operation can be performed by inputting the power supply voltage from the power supply input terminal VDD. come. As mentioned above, if the voltage at node (c) is a high level voltage, then the transition Since the data 255 is turned on and the resistance is sufficiently low compared to the resistance element 257, it is output. The ground voltage is output to the power terminal OUT. On the other hand, the voltage of node (c) is the low level voltage. If, the transistor 255 is in the off state, which is sufficiently higher than the resistance element 257. Since it becomes a resistor, the power supply voltage is output to the output terminal OUT.
Here, by inputting a high level voltage from the input terminal Sig5, node (c) Transistor 255 can be forcibly turned on regardless of the voltage information held in It becomes Noh. Such an operation is described later when arranging a plurality of memory cells in the column direction. , Read the data of any memory cell when connecting transistors 255 in series You will need it to get it out. For example, when reading a single memory cell, serialize it. A high level voltage is input to the second electrode of the capacitive element 253 in another connected memory cell. By forcibly turning on the Langista 255, the node (c) of the memory cell is concerned. ) Can be selectively read out. Also, transistor 25 When a p-channel type transistor is used for 5, the voltage input from the input terminal Sig5 By inputting a voltage smaller than 0V, the transistor 255 is forcibly turned on. It can be voiced.
Next, a method for refreshing the data stored in the memory cell 250 will be described. To.
Similar to Embodiment 2, a second input having an amplitude voltage higher than 0V in the control circuit 100. By inputting a signal, the threshold voltage of the transistor 251 is temporarily negatively shifted. The transistor 251 is temporarily used as a depletion type transistor. Tran Since the Gista 251 temporarily becomes a depletion type transistor, it is input to Sig4. By inputting the voltage to node (c), the input signal from Sig3 is not used. It is possible to refresh the data in the memory cell 250. This behavior is especially after In a storage device having a plurality of memory cells as described in the above, a plurality of memos are performed in one operation. This is effective when refreshing the data stored in the resell.
<Application example> Next, the control circuit of the present invention is suitable for a storage device having a plurality of memory cells 250 described above. An example used will be described.
In FIG. 5 (B), a plurality of memory cells 250 shown in FIG. 5 (A) are arranged vertically and horizontally in a matrix. The storage device 260 is shown. In addition to the plurality of memory cells 250, the storage device 260 has a number of memory cells 250. It has one drive circuit 261 and a second drive circuit 263, and a plurality of control circuits 100. Real In the embodiment, a plurality of memory cells 250 are used, as in the storage device 210 exemplified in the second embodiment. Are arranged in a matrix of m rows and n columns (m and n are integers of 1 or more), and the control circuit 100 A total of m will be provided, one for each row.
The first drive circuit 261 is the first gate electric power of the transistor 251 in the memory cell 250. Connect to m control lines Sig3 (1) to Sig3 (m) connected to the pole and capacitive element 253 It has m control lines Sig5 (1) to Sig5 (m), and each control line Sig Using 3 (1) ~ Sig3 (m) and control lines Sig5 (1) ~ Sig5 (m) in one line Controls the on / off operation of transistors in the lined up memory cells and the voltage of node (c) To. Further, the first drive circuit 261 is connected to the first to mth control circuits, respectively. It has m control lines IN (1) to IN (m), and to the control circuit 100 connected to each. Control the input signal.
The second drive circuit 263 is connected to the first electrode of the transistor 251 in the memory cell 250. It has n control lines Sig4 (1) to Sig4 (n), and each control line Sig Data input to memory cells 250 arranged in a row using 4 (1) to Sig4 (n) Control the number.
Transistors 255 in a row of memory cells are connected in series and a single output signal. It is connected to the wire. Although not shown, the resistor shown in FIG. 5 (A) is located at the end of the output signal line. The element 257, the power input terminal, and the like are provided. For example, multiple memory sets lined up in a row When reading data from any memory cell, Sig5 (1) as described above. ) ~ Using the input signal from Sig5 (m), the memory cells in other memory cells that do not read By turning on all the Langista 255, the data stored in any memory cell Can be read. Here, the resistance element 257 for reading, the power input terminal, etc. May be incorporated in the second drive circuit 263.
The control circuit 100 is the first through the control line IN (m) as illustrated in the second embodiment. N pieces connected to the control circuit 100 according to the input signal input from the drive circuit 261 Controls and holds the threshold voltage of the transistor 251 in the memory cell to the optimum value, and The threshold voltage can be changed over time to form a depletion type transistor. Temporarily deplete n transistors 251 connected to control circuit 100 at the same time By changing the data, the data stored in each memory cell is the same as one signal. Sometimes it can be refreshed.
As described above, one or more control circuits 100 may be provided in the storage device 260.
In this embodiment, the transistors 255 connected to the output signal line are connected in series. Although it was configured, the selected transistor was selected in series with the read transistor 255 as a memory cell. It may be provided inside and the data may be selectively read out by this on / off operation.
As described above, by applying the control circuit of the present invention to the storage device, the threshold voltage is maximized. A memory device that has multiple memory cells that are held at appropriate values and can be easily refreshed. It can be placed. In addition, it is non-volatile so that data can be retained even if the power supply is stopped. Can realize a storage device.
This embodiment shall be carried out in combination with other embodiments exemplified herein as appropriate. Can be done.
(Embodiment 4) In the present embodiment, the threshold voltage of the transistor illustrated in the first embodiment can be controlled. An example of a configuration in which a semiconductor circuit is applied to a display device will be described with reference to FIG.
<Configuration example> FIG. 6A is applied to a display device to which the control circuit 100 illustrated in the first embodiment is connected. A configuration example of possible pixels 270 is shown. Pixel 270 is transistor 271, capacitive element 273 , And a display element 275. In the present embodiment, the transistor 271 is used. Similar to the transistor 201 shown in the second embodiment, an n-channel type transistor is used.
The configuration and function of the transistor 271 and the capacitive element 273 are the same as those in the second embodiment. Therefore, detailed description thereof will be omitted. Here, the first gate electrode of the transistor 271 and the first The terminals connected to each of the electrodes are the input terminal Sig6 and the input terminal Sig7. In addition, the second electrode of the transistor 271 and the first electrode of the capacitive element 273 are connected to each other. Let's call it node (d).
In the display element 275, one electrode is connected to node (d) and the other is grounded. To. The optical characteristics of the display element 275 are changed by applying a voltage to the electrodes at both ends of the display element 275. Dielectric elements can be used. For example, for liquid crystal elements, electronic paper, etc. The electrophoretic element, twist ball element, etc. used can be applied. Form of this implementation In the state, it can be a pixel that can hold the voltage in node (d), so it is in the node. The optical characteristics can be retained while the voltage is retained.
<Circuit operation example> Next, the circuit operation of the pixel 270 to which the control circuit 100 is connected will be described.
First, the first input signal is input to the control circuit 100 in the same manner as described in the above embodiment. Then, the threshold voltage of the transistor 271 is adjusted to the optimum value, and the enhancement type transistor is used. Control and hold in the engineer.
When writing to the pixel 270, the input terminal Sig6 and Input the voltage held in node (d) by the input signal from the input terminal Sig7. By writing. Here, node (d) has a high level voltage or low level. The voltage is maintained.
Here, the transistor 271 forms a channel as described in the first embodiment. It is possible to apply a transistor with an extremely small off-current that uses an oxide semiconductor for the conductor layer. You can. Applying such a transistor with extremely small off-current to transistor 271 By doing so, the voltage of node (d) can be maintained for an extremely long time. , It is possible to maintain the optical characteristics of the display element 275 even if the supply of power supply voltage is stopped. .. For example, it does not have the memory property of TN (Twisted Nematic) type liquid crystal. Even when a liquid crystal element is used, the state in which a voltage is always applied to the element is maintained. Because it can be done, it is possible to eliminate the rewriting operation or extremely reduce its frequency. It becomes Noh.
Next, a method of refreshing the voltage written in the pixel 270 will be described.
Similar to the above embodiment, the control circuit 100 has an amplitude voltage higher than 0V (positive amplitude voltage). Temporarily the threshold of transistor 271 by inputting a second input signal with The voltage is negatively shifted to make a depletion type transistor. At this time, nod Since the voltage is input from Sig7 to e (d), the input signal from Sig6 is used. Refreshes the voltage in pixel 270, that is, the optical characteristics of display element 275, without It becomes possible. Such an operation is a display device having a plurality of pixels as described later. When refreshing the data held in multiple pixels with one operation It is especially effective.
<Application example> Next, the control circuit of the present invention was applied to a display device having a plurality of pixels 270 described above. An example will be described.
In FIG. 6 (B), a plurality of pixels 270 shown in FIG. 6 (A) are arranged vertically and horizontally in a matrix. The display device 280 is shown. The display device 280 has a first drive circuit in addition to the plurality of pixels 270. It has 281, a second drive circuit 283, and a plurality of control circuits 100. In this embodiment , Similar to the storage device 210 illustrated in the second embodiment, the plurality of pixels 270 are m rows and n columns (m, n). Are arranged in a matrix of 1 or more integers), and m control circuits 100 are provided per line. The configuration is as follows.
The first drive circuit 281 has the same configuration as the first drive circuit 211 illustrated in the second embodiment. , Has a function. Therefore, the transistor 271 in each pixel 270, and it Each control circuit 100 has control lines Sig6 (1) to S by the first drive circuit 281. It is controlled using ig6 (m) and control lines IN (1) to IN (m).
Similarly, the second drive circuit 283 is also the second drive circuit 213 illustrated in the second embodiment. It has the same configuration and function as. Therefore, through the transistor 271 in each pixel The data input is the control line Sig7 (1) ~ Si by the second drive circuit 283. It is controlled using g7 (n).
The optical characteristics of the display element in pixel 270 change depending on the voltage input to node (d). To do. For example, when a liquid crystal display element is applied, the light from the backlight is transmitted or transmitted. An image is displayed by changing the optical characteristics so as to block light. Also, the electrophoresis element When applied, the optical characteristics (reflectance, etc.) of the element with respect to (outside) light change. Display the image. Furthermore, pixel 270 is by changing the voltage input to node (d). Therefore, it is also possible to perform multi-step gradation display.
The control circuit 100 is input from the first drive circuit 281 as illustrated in the above embodiment. Transistor 271 in n pixels 270 connected to it according to the force signal The voltage is controlled and held at the optimum value, and the threshold voltage is temporarily changed to depress. It can be a transistor of the type. N transitions connected to control circuit 100 Stored in each pixel by temporarily changing the star to a depletion type at the same time The voltage to be generated (that is, the displayed image) can be refreshed simultaneously with one signal.
As described above, one or more control circuits 100 may be provided in the display device 280.
As described above, by applying the control circuit of the present invention to the display device, the threshold voltage is maximized. A display device having a plurality of pixels that are held at an appropriate value and can be easily refreshed. Rukoto can. In addition, it is possible to realize a display device that can retain the displayed image even if the power supply is stopped. To.
This embodiment shall be carried out in combination with other embodiments exemplified herein as appropriate. Can be done.
(Embodiment 5) In the present embodiment, the semiconductor layer forming a channel, which is applicable to the above embodiment, is oxidized. Transistors using a physical semiconductor layer, transistors applicable to peripheral circuits, and capacitance An example of the configuration and manufacturing method of the device will be described with reference to FIG. 7.
<Configuration example> FIG. 7 (D) shows the transistor 325 and the transistor 3 on the single crystal semiconductor substrate 301. 27 is a schematic cross-sectional view in which 27 and a capacitance element 329 are formed.
The transistor 325 is a transition using a single crystal semiconductor for the semiconductor layer forming the channel. It is a star and constitutes a circuit other than the diode in the control circuit 100 illustrated in the above embodiment. It can be applied to the transistor to be used. In this embodiment, the transistor 325 is used. Although the configuration uses a single crystal semiconductor, a thin film transistor provided on an insulating substrate such as glass Gista can also be used. When applied to the display device illustrated in the fourth embodiment, light transmission It is preferably formed on a transient insulating substrate.
The transistor 327 is a transition using an oxide semiconductor for the semiconductor layer forming the channel. It is a star and has two gate electrodes facing each other with a semiconductor layer in between. This transistor is A transistor applicable to the diode in the control circuit 100 illustrated in the above embodiment. To. It can also be applied to a transistor to which the control circuit 100 is connected.
The oxide semiconductor used for the semiconductor layer of the present embodiment has hydrogen acting as an n-type impurity removed. By purifying it so that it does not contain impurities as much as possible, type I (intrinsic) oxide semiconductors, Alternatively, it is an oxide semiconductor that is as close to type I (intrinsic) as possible.
In the highly purified oxide semiconductor, the number of carriers is extremely small, and the carrier concentration is 1. × 10<sup>14</sup>/cm<sup>3</sup>Less than, preferably 1x10<sup>12</sup>/cm<sup>3</sup>Less than, more preferably 1x Ten<sup>11</sup>/cm<sup>3</sup>Control so that it is less than. Also, because there are few carriers like this , The current in the off state (off current) becomes sufficiently small.
Specifically, in the transistor provided with the oxide semiconductor layer described above, the source in the off state The leakage current density (off current density) per 1 μm of channel width between the source and drain is the source and The voltage between the drains is 3.5V, and under the temperature conditions during use (for example, 25 ° C), 100 zA / μm (1 × 10)<sup>-19</sup>A / μm) or less, or 10 zA / μm (1 × 10)<sup>-20</sup>A / μm) or less, and even 1zA / μm (1 × 10)<sup>-21</sup>A / μm) or less Wear.
Further, the transistor provided with the highly purified oxide semiconductor layer depends on the temperature of the on-current. Little property is seen, and the off-current remains very small even at high temperatures.
The capacitive element 329 is included in the control circuit 100 exemplified in the above embodiment and other circuits. It is a capacitive element that can be applied to a capacitive element. In this embodiment, it is used for the transistor 327. An example in which the first wiring, the gate insulating layer, and the second wiring are configured is shown, but the configuration is limited to this configuration. Formed on the second wiring, the second interlayer insulating layer, the third wiring, or the single crystal semiconductor substrate. It may be composed of the formed impurity region, the first interlayer insulating layer, and the first wiring.
In the present embodiment, the transistor 327 and the capacitive element 329 are the data in the control circuit 100. Assuming transistors and capacitive elements used for iodes, transistor 3 Connect the second wire connected to the source or drain of 27 and the upper electrode of the capacitive element 329. The configuration was set. In addition, the connection between each transistor other than that, and between the transistor and the capacitive element , 1st wiring, 2nd wiring or 3rd wiring, and contour formed in the interlayer insulating layer that separates them. It is possible to connect appropriately according to the circuit configuration by using a couto plug.
<Example of manufacturing process> Next, an example of the manufacturing process will be described in order with reference to FIGS. 7 (A) to 7 (D). First, public One of the substrates 301 of single crystal semiconductors such as silicon and gallium arsenide using known semiconductor processing technology An element separation layer 303 is formed on the surface, and further, an impurity region 307a and an impurity region 307b. , And the gate 305 of the transistor 325. Further, the first interlayer insulating layer 309 To form the first contact plug 311 (see Figure 7 (A)). Here, impurities Silicide layers and the like are provided on the surfaces of the region 307a and the impurity region 307b to improve conductivity. You can buy it. Also, when the contact plug 311 is formed, the contact that reaches the impurity region A plug (not shown) is formed as appropriate.
Next, the first wirings 313a to 313c are formed. Here, the first wiring 313b will be later It functions as the first gate electrode of the Langista 327, and the first wiring 313c is the capacitive element 3 Functions as the lower electrode of 29. As a material used for the first wiring, it can withstand the subsequent heat treatment. , Conductive materials can be used. For example, Mo, Ti, Cr, Ta, W, Nd, S A single layer or product using a metal such as c or an alloy or conductive oxide containing these as the main components. It can be formed in layers. If the metal can withstand the heat treatment in the subsequent process, the above metal Al and Cu can also be used as. When using these, there are problems with heat resistance and corrosiveness. To avoid this, it is recommended to use it in combination with a high melting point material. Also, Cu is used for the first wiring. In this case, if a Cu-Mg-Al alloy is provided in the underlying layer and Cu is formed on it, it will oxidize. This is preferable because the adhesion between the base film such as a film and Cu is improved.
In addition, indium tin oxide, indium oxide containing tungsten oxide, etc. Indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, acid Indium tin oxide containing titanium oxide, indium zinc oxide, and indium added with silicon oxide A conductive material having translucency such as diatin oxide can also be applied. Also, the above It is also possible to form a laminated structure of a conductive material having translucency and the above-mentioned metal element.
In addition, in the part that becomes the first gate electrode of the transistor 327, the gate electrode and the game A material layer in contact with the gate insulating layer may be provided between the insulating layer and the insulating layer. In contact with the gate insulating layer In-Ga-Zn-O film containing nitrogen and In-Sn-O containing nitrogen can be used as the material layer. Membranes, In-Ga-O membranes containing nitrogen, In-Zn-O membranes containing nitrogen, Sn containing nitrogen -O film, Nitrogen-containing In-O film, or metal nitride film (InN, ZnN, etc.) can be used. it can. These membranes have a work function of 5 eV or higher, preferably 5.5 eV or higher. By using a material with a high work function, the threshold voltage of transistor 327 is increased. It is preferable because it can be used. For example, when using an In-Ga-Zn-O film containing nitrogen , Nitrogen concentration higher than oxide semiconductor layer, specifically In-Ga-Zn-O film with 7 atomic% or more Is used.
After that, the gate insulating layer covering the first wirings 313a to 313c and the first interlayer insulating layer 309 Form 315. The gate insulating layer 315 includes silicon oxide, silicon oxide nitride, and aluminum oxide. Nium, aluminum nitride, hafnium oxide, tantalum oxide, gallium oxide, zirco oxide A single layer made of nium or the like, or a laminate can be used. In addition, its thickness is 6 nm It is good to set it to 200 nm.
Next, the oxide semiconductor layer 317 is formed (see FIG. 7 (B)). As an oxide semiconductor It is preferable to use indium in which the ratio of indium to the metal element is 20 atomic% or more. At the time of formation It is necessary to be careful not to mix hydrogen, and the film formation of oxide semiconductors has an atmosphere and a target. By a sputtering method that sufficiently reduces hydrogen and water during the operation and on the surface of the target and equipment. It is preferable to do it. Also, in an atmosphere where water and hydrogen are reduced after the oxide semiconductor is formed. The water and hydrogen in the membrane may be desorbed by heat treatment with.
In addition, the oxide semiconductor layer is formed in two steps and heat-treated in two steps. The material of the ground member is oriented in the c-axis perpendicular to the film surface regardless of the material such as oxide, nitride, or metal. An oxide semiconductor layer having a crystal region may be formed. For example, 3 nm or more and 15 nm or less A first oxide semiconductor layer is formed and 45 in an atmosphere of nitrogen, oxygen, noble gas, or dry air. Perform the first heat treatment of 0 ° C or more and 850 ° C or less, preferably 550 ° C or more and 750 ° C or less. A first oxide semiconductor layer having a crystal region (including a plate-like crystal) is formed in a region including a surface. .. Then, a second oxide semiconductor layer thicker than the first oxide semiconductor layer is formed, and the temperature is 450 ° C or higher. Upper 850 ° C or less, preferably 600 ° C or more and 700 ° C or less The second heat treatment is performed, and the first Using the oxide semiconductor layer as a seed for crystal growth, crystal growth is performed upward, and the entire second oxide semiconductor layer is formed. The body may be crystallized to form an oxide semiconductor layer having a thick crystal region as a result. I. In this case, the material used for the contact plug and wiring can withstand the temperature of the heat treatment. Use material.
Further, when the oxide semiconductor layer is formed, the substrate is added to the temperature at which the oxide semiconductor is oriented on the c-axis. Oxide having a crystal region oriented perpendicular to the film surface by c-axis orientation by forming a film while heating A semiconductor layer may be formed. By using such a film forming method, the process can be shortened. Rukoto can. This is because the temperature at which the substrate is heated differs depending on the film forming apparatus. It may be set appropriately according to this, but for example, the substrate temperature when forming a film with a sputtering apparatus. The film may be formed with a degree of 250 ° C or higher.
The oxide semiconductor layer exemplified in this embodiment is a non-single crystal and the entire oxide semiconductor layer. Is not in an amorphous state (amorphous state). The entire oxide semiconductor layer is non- Since it is not in a crystalline state (amorphous state), the formation of amorphous with unstable electrical characteristics is suppressed. Is done.
Next, the second wiring 319a and the second wiring 319b are formed (see FIG. 7 (C)). Second distribution The wire is, for example, a metal film containing an element selected from Al, Cr, Cu, Ta, Ti, Mo, and W. , Or an alloy containing the above-mentioned elements, or a metal nitride film (titanium nitride film, nitrocarburizer It can be formed as a single layer or laminated by using a butene film, a tungsten nitride film, etc. .. In addition, metal films such as Al and Cu are placed on the lower side or in order to avoid problems of heat resistance and corrosiveness. Melting point metals such as Ti, Mo, W, Cr, Ta, Nd, Sc, Y on one or both upper sides Membranes or their metal nitride films (titanium nitride films, molybdenum nitride films, tungsten nitride films) ) May be laminated. Further, it may be formed of a conductive metal oxide. Conductivity Metal oxides include indium oxide, tin oxide, zinc oxide, and indium tin oxide. Combined oxides, indium oxide mixed oxides or zinc oxide mixed oxides or metal oxide materials with silicon Can be used which contains silicon oxide. The second wiring 319a and the second Since the lower part of the wiring 319b is in direct contact with the oxide semiconductor layer 317, it is a preferable material for that purpose. It is good to use.
Subsequently, the second interlayer insulating layer 321 is formed. The second interlayer insulating layer 321 is an oxide semiconductor layer. Since it is in contact with the upper surface of 317, the insulating film used for this contains as much water and impurities such as hydrogen as possible. It is desirable not to use it, and it may be composed of a single layer or a laminate of a plurality of insulating films. For example, Silicon nitride film, silicon oxide film, aluminum nitride film, acid nitride, which are highly realistic insulating films. Aluminum oxide film, aluminum oxide film, gallium oxide film, etc. can be used. To.
Finally, the third wiring 323 is formed on the second interlayer insulating layer 321 (see FIG. 7 (D)). No. 3 Wiring 323 is appropriately formed by selecting from the materials illustrated in the first wiring or the second wiring. can do.
In the present embodiment, the transistor 327 has a back gate. When this is applied to the diode of the control circuit 100, it may not be provided if it is not necessary.
As described above, the transistor 325, the transistor 327, and the capacitive element 329 are It is formed.
The transistor 327 formed in this way has extremely reduced leakage current when off. It can be a transistor. Such a transistor is illustrated in the above embodiment. To apply to diodes in control circuits and transistors in storage devices and display devices Therefore, it is possible to hold the voltage of the nodes connected to them for an extremely long time. To.
(Embodiment 6) In this embodiment, the threshold voltage of the transistor described in the above-described embodiment can be controlled. Fig. 8 is used to explain the case of applying a semiconductor device having a capable semiconductor circuit to an electronic device. I will reveal. In this embodiment, a computer and a mobile phone (also referred to as a mobile phone and a mobile phone device). C), personal digital assistants (including portable game machines, audio playback devices, etc.), digital cameras, digital cameras Cameras such as digital video cameras, electronic paper, television devices (televisions, or televisions) When applying the above-mentioned semiconductor device to electronic devices such as revision receivers) I will explain.
Fig. 8 (A) shows a notebook-type personal computer, which includes a housing 701 and a housing 702. It is composed of a display unit 703, a keyboard 704, and the like. Inside the housing 701, housing 70 The semiconductor device shown in the above-described embodiment is provided in 2 and at least one of the display units 703. Has been done. Therefore, even if the power supply voltage supply is stopped, the data and displayed images in the circuit are retained. As a result, power consumption is sufficiently reduced, and reset or refresh operation is possible easily. A notebook-type personal computer is realized.
FIG. 8B shows a personal digital assistant (PDA), and the main body 711 has a display unit 713 and an outside. A part interface 715, an operation button 714, and the like are provided. Also, the mobile information end It is equipped with a stylus 712 that operates the end. Inside the main unit 711 and the small number of the display unit 713 At least one is provided with the semiconductor device shown in the above-described embodiment. Therefore, the power supply Sufficient power consumption by retaining the data and displayed images in the circuit even if the voltage supply is stopped A mobile information terminal that can be reduced and easily reset or refreshed is realized. ..
Figure 8 (C) shows an electronic book 720 with electronic paper mounted on it, which is the housing 721 and the housing 72. It consists of two housings of 3. The display unit 7 is attached to the housing 721 and the housing 723, respectively. 25 and a display unit 727 are provided. The housing 721 and the housing 723 are based on the shaft portion 737. It is connected to each other and can be opened and closed with the shaft portion 737 as an axis. In addition, housing 7 The 21 is equipped with a power supply 731, operation keys 733, a speaker 735, and the like. Housing 721 , The housing 723, the display unit 725, and at least one of the display unit 727 have the above-described embodiment. The semiconductor device shown in is provided. Therefore, even if the supply of power supply voltage is stopped, the data in the circuit Power consumption is sufficiently reduced by retaining the data and display image, and it can be easily reset or reset. An e-book that can be refreshed will be realized.
Figure 8 (D) shows a mobile phone, which consists of two housings, a housing 740 and a housing 741. There is. Furthermore, the housing 740 and the housing 741 are slid and unfolded as shown in Fig. 8 (D). It can be changed from a normal state to an overlapping state, and miniaturization suitable for carrying is possible. Also , Housing 741, display panel 742, speaker 743, microphone 744, point Equipped with a ting device 746, camera lens 747, external connection terminal 748, etc. .. In addition, the housing 740 includes a solar cell 749 that charges a mobile phone and an external memory slot. It is equipped with a 750 and so on. The antenna is built in the housing 741. Housing 74 At least one of 0, the housing 741, and the display panel 742 is the half shown in the above-described embodiment. A conductor device is provided. Therefore, even if the power supply voltage supply is stopped, the data and display in the circuit By retaining the image, the power consumption is sufficiently reduced and it is easy to reset or refresh. A mobile phone that can be operated is realized.
Figure 8 (E) shows a digital camera, which includes the main body 761, the display unit 767, the eyepiece unit 763, and the operation. It consists of a switch 764, a display unit 765, a battery 766, and so on. Body In 761, at least one of the display unit 765 and the display unit 767 is shown in the above-described embodiment. A semiconductor device is provided. Therefore, even if the power supply voltage supply is stopped, the data in the circuit and By retaining the displayed image, the power consumption is sufficiently reduced, and it is easy to reset or riff. A digital camera capable of resh operation is realized.
Figure 8 (F) shows the television device 770, which includes the housing 771, the display 773, and the stand. It is composed of 775 and so on. The operation of the television device 770 is performed by the housing 771. It can be done by the switch or the remote control controller 780. Housing 771, remote control device At least one of the 780 and the display unit 773 is equipped with the semiconductor device shown in the above-described embodiment. It is listed. Therefore, even if the power supply voltage supply is stopped, the data and displayed images in the circuit are retained. As a result, power consumption is sufficiently reduced, and reset or refresh operation is possible easily. A capable television device is realized.
As described above, the electronic device shown in the present embodiment includes the semiconductor device according to the above-described embodiment. Is installed. Therefore, even if the power supply voltage supply is stopped, the data and displayed images in the circuit are retained. Power consumption is sufficiently reduced by holding it, and reset or refresh operation is easy. Electronic devices that can be used are realized.
100 control circuit 101 diode 103 Capacitive element 105 Capacitive element 107 transistor 109 transistor 111 transistor 151 curve 152 curve 153 curve 200 register circuit 201 transistor 203 Capacitive element 205 flip-flop circuit 205a Inverter 205b inverter 210 storage device 211 First drive circuit 213 Second drive circuit 250 memory cells 251 transistor 253 Capacitive element 255 transistor 257 Resistor element 260 storage device 261 First drive circuit 263 Second drive circuit 270 pixels 271 transistor 273 Capacitive element 275 Display element 280 Display device 281 First drive circuit 283 Second drive circuit 301 board 303 element separation layer 305 Gate 307a Impurity area 307b Impurity region 309 First interlayer insulation layer 311 contact plug 313a 1st wiring 313b 1st wiring 313c 1st wiring 315 Gate insulating layer 317 Oxide semiconductor layer 319a 2nd wiring 319b 2nd wiring 321 Second interlayer insulation layer 323 3rd wiring 325 transistor 327 transistor 329 Capacitive element 701 chassis 702 housing 703 Display 704 keyboard 711 body 712 stylus 713 Display 714 Operation button 715 external interface 720 ebook 721 housing 723 housing 725 Display 727 Display 731 power supply 733 Operation keys 735 speaker 737 shaft 740 housing 741 housing 742 Display panel 743 speaker 744 microphone 746 pointing device 747 Camera lens 748 External connection terminal 749 solar cell 750 external memory slot 761 body 763 Eyepiece 764 Operation switch 765 Display 766 battery 767 Display 770 Television device 771 housing 773 Display 775 stand 780 remote control device
8 sheets
Sheet 1 Sheet 2 Sheet 3 Sheet 4 Sheet 5 Sheet 6 Sheet 7 Sheet 8
Every citation, both ways
| Document | Relation | Office |
|---|---|---|
| JP09113879A | Cites | Japan |
| JP2010283338A | Cites | Japan |
| JP2008181634A | Cites | Japan |
| JP2010266490A | Cites | Japan |
| JP2006323376A | Cites | Japan |
| JP2003186421A | Cites | Japan |
| JP2009278115A | Cites | Japan |
| US20100279474A1 | Cites | United States of America |
| US20060238135A1 | Cites | United States of America |
| US20030075733A1 | Cites | United States of America |
| US05956011A | Cites | United States of America |
| EP02120267A1 | Cites | European Patent Office (EPO) |
20 members in 4 offices
Priority claims5
| Document | Office | Kind | Date |
|---|---|---|---|
| 2010287598 | Japan | A | |
| 2010287598 | Japan | A | |
| 2010287598 | Japan | – | |
| 2010287598 | – | – | – |
| JP20100287598 | – | – | – |
Members20
| Document | Office | Kind | |
|---|---|---|---|
| US2012161139A1 | United States of America | A1 | |
| KR20120073127A | Republic of Korea | A | |
| JP2012146965A | Japan | A | |
| TW201241932A | Taiwan Province of China | A | |
| US9024317B2 | United States of America | B2 | |
| US2015171117A1 | United States of America | A1 | |
| JP5876284B2 | Japan | B2 | |
| TWI539530B | Taiwan Province of China | B | |
| JP2016119486A | Japan | A | |
| TW201640587A | Taiwan Province of China | A | |
| JP6129365B2 | Japan | B2 | |
| TWI584386B | Taiwan Province of China | B | |
| JP2017130690A | Japan | A | |
| TW201727765A | Taiwan Province of China | A | |
| US9735179B2 | United States of America | B2 | |
| TWI620252B | Taiwan Province of China | B | |
| JP6368397B2This record | Japan | B2 | |
| KR101947823B1 | Republic of Korea | B1 | |
| KR20190017836A | Republic of Korea | A | |
| KR102081529B1 | Republic of Korea | B1 |
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Numbers
- Publication
- 6368397
- Publication, DOCDB
- 6368397
- Publication, EPODOC
- JP6368397B
- Application
- 77927
- Application, DOCDB
- 2017077927
- Application, EPODOC
- JP20170077927
Titles2
- Japanese
- 半導体装置
- English
- Semiconductor device
Classification
- CPC, 13
- H10D86/60
- H10D86/423
- H10D86/40
- G09G2300/043
- G09G2300/0819
- G09G2320/0214
- G09G3/3648
- H10D1/68
- H10D30/6704
- H10D30/6713
- H10D30/6755
- H10D30/6757
- H10D86/481
- IPC, 5
- H01L29 786
- H01L21 8242
- H01L27 108
- G11C11 405
- H10N97 00
