Pileup rejection in an energy-dispersive radiation spectrometry system

The present invention relates to an energy dispersive radiation spectroscopic analysis system such as an X-ray spectroscopic analysis system or a gamma ray spectroscopic analysis system, and more particularly to a method for improving pile-up removal in an energy dispersive radiation spectroscopic analysis system.

Without limitation, energy dispersive radiation spectroscopic analysis systems such as X-ray spectroscopic analysis systems or gamma-ray spectroscopic analysis systems emit radiation such as X-ray radiation or gamma-ray radiation from a scanning electron microscope (SEM), for example. Used for detection, measurement, and analysis. A typical energy dispersive radiospectroscopic analysis system includes four main components: (1) detector, (2) preamplifier, (3) pulse processor, and (4) computer-based analyzer. For convenience only and not for limited purposes, the following description describes X-ray spectroscopic analysis systems and X-rays (eg, compared to gamma-ray shaped photons detected in gamma-ray spectroscopic analysis systems). Do with the shaped photons.

A detector, usually in the form of some semiconductor sensor, emits incident X-rays into very small current pulses, typically about tens of thousands of electrons, over a period of about tens to hundreds of nanoseconds. Convert. The magnitude of each current pulse is proportional to the energy of the X-ray.

The preamplifier amplifies the current pulse output by the detector and typically converts the current pulse into a voltage signal in the range of tens of tens of millivolts to hundreds of millivolts. There are two main types of preamplifiers: "tail pulse" or RC coupled preamplifiers and pulse reset preamplifiers. The subjects described elsewhere herein are applicable to both types of preamplifiers.

In a pulse-reset preamplifier, the charge generated in the sensor is integrated in the feedback capacitor so that the resulting voltage increases in variable height and interval steps until the resulting voltage reaches the upper limit. When the upper limit is reached, a "reset" pulse is applied to expel the accumulated charge from the feedback capacitor, restoring the preamplifier to near the minimum output voltage of the preamplifier in a short period of time, typically within a few microseconds. Next, the charge due to the interaction between the X-ray and the detector accumulates in the feedback capacitor again, and the cycle repeats. The tail pulse preamplifier, on the other hand, acts as a high pass filter on the voltage step signal output by the detector, exponentially to baseline with a time constant longer than the charge integration time in the preamplifier's feedback capacitor. Return.

The pulse processor receives the preamplifier signal and produces a numerical representation of the energy of the X-rays throughout the integration process. In a conventional energy dispersive radiospectroscopic analysis system, the pulse processor includes two separate components: a "shaping amplifier" and an analog-to-digital converter. Modern energy dispersive radiospectroscopic analysis systems, on the other hand, typically combine these functions to digitize the preamplifier signal as-is and use digital signal processing to perform all pulse detection and filtering functions. Accompanied by the latest design.

The computer utilization analyzer stores the X-ray energy output by the pulse processor in the spectrum of the detected X-rays with respect to the energy of the X-rays, or in a plot diagram of the number of detected X-rays. This spectrum is divided into a small range of any number, called "channels" or "bins". In older systems, a hardware component called a multi-channel analyzer (MCA) accumulates X-rays in the spectral channels and the computer reads the summed result. In modern systems, MCA functions are operated by software, either by computer or within a pulse processor.

The work of the pulse processor is complicated by several factors. For example, electronic noise is superimposed on the underlying signal received from the preamplifier. For X-rays near the lowest detectable energy level, the preamplifier output step height is significantly smaller than the peak-to-peak excursion of electronic noise. In such cases, X-rays can be detected only by filtering the signal for a relatively long period of time before and after the step in order to average out the noise contribution. The amount of such noise averaging is a basic operating parameter of all pulse processors. This averaging time is technically referred to as "shaping time" or "peaking time".

Second, the preamp output step is not instantaneous. In the absence of noise, the signal is a sigmoid (S-shaped) curve. This is due to bandwidth limitation, equipment capacity, and the time required for all the electrons generated by the X-ray to reach the sensor anode. These electrons can be visualized as small clusters or clouds moving towards the anode in the sensor material under the influence of the bias voltage field inside the semiconductor sensor. With a tail pulse preamplifier, the initial rise of the signal has the same sigmoid shape and varies by design, but is followed by exponential decay, which always has a longer time constant than the initial rise.

In conventional detectors called lithium drift silicon, or Si (Li) detectors, which have simple planar electrodes on each side, the bias field line is straight (in the first approximation, Ignore the edge effect), spread back and forth. As a result, the electron cloud collection time is approximately constant, and the "rise time" (width of the sigmoid step) of the preamplifier signal is dominated by bandwidth limitations due to the relatively large capacitance of the device. To.

A new type of sensor known as a Silicon Drift Detector (SDD) has been developed in recent years. A striking new feature of this silicon drift detector is the concentric pattern etched into the bias electrode, which is very electron-generated when a slightly variable voltage is applied to the individual rings in the pattern. Allows the bias field inside the sensor material to be shaped so that it is poured into a small spot anode. This feature has the effect of reducing the effective equipment capacity by about four orders of magnitude. The electron cloud from the X-ray interaction expands with the passage of drift time to a greater or lesser extent, depending on the path length the electrons travel to reach the anode. Due to the reduced equipment capacity, the cloud integration time is at the rise time of the preamplifier signal, which can change at about twice the rate in SDD compared to a few percent in the case of Si (Li) detectors. It contributes even more (but still faster than conventional planar electrode sensors (Si (Li) detectors) because the total capacitance is reduced even if the end of the rise time range for SDD is longer. May be).

A phenomenon technically known as "pulse pile-up" is the continuous X-rays, which arrive so close to each other that their energies cannot be measured independently. Appears as a result. If not detected, for the two energies, the sum of the X-ray energies on the higher energy side of the pair and the two X-ray energies, depending on the details of the system's pulse shaping filter and the time interval between the X-rays. Only one energy located somewhere between and is measured. Thus, the pulse processor needs to be able to efficiently detect the appearance of pile-up, which results in the energy measurement associated with this pile-up being discarded when detected (pile-up). It is called pile up rejection).

Radiation is a random process, whether spontaneous or triggered by some form of excitation. Regardless of whether the average emissivity is high or low, the time interval between two emitted X-rays may be arbitrarily shortened using some non-zero probability. The probability of getting a second X-ray within an arbitrary time interval t is P = (1-e- (rt)) In the equation, e is the base of the natural logarithm and r is the average X-ray arrival rate.

The minimum time interval between two x-rays, technically known as "pulse-pair resolving time", can still distinguish the two x-rays as separate events, is the energy. It is a strong inverse function. In other words, detecting near simultaneity between small (low energy) pulses is even more difficult than detecting near simultaneity between large pulses. All peak detection filters in pulse processors react strongly to high-energy X-rays, so the most difficult to detect is when immediately following low-energy X-rays.

Traditional methods of pile-up detection are generally fixed, but one or more with a much shorter shaping time than the main energy measurement processing path (referred to as the "main channel"). Can be described as a parallel filter of. The main channels are variously referred to as "fast channels" or "pile-up rejection channels". Each channel (main and high speed) has a parameter called dead time, which is the amount of time it takes for a channel to accurately and clearly measure the energy of a single X-ray. Since the fast channel dead time Df is much shorter than the dead time D of the main channel, the fast channels are quite likely to generate distinguishable pulses due to the X-rays arriving together in time. The filters used in the high speed channels (analog or digital) are generally of the same type as the filters used for energy measurement (main channel), with only a fairly short pulse width.

However, the high-speed channel shaping time is so short that it is not very effective in removing electron noise on average. The shaping time of the pulse processing channel determines the lowest energy X-rays that can be detected within this pulse processing channel. If the shaping time detection threshold is set lower, the processing channel will cause excessive false triggers due to random noise fluctuations in the preamplifier output signal. State-of-the-art X-ray spectroscopic analysis systems can typically distinguish X-rays with about 100-200 electron volts (eV) from noise in the main measurement channel, but the threshold energy of fast channels is much higher. It needs to be raised. The fastest pile-up removal channels that define the best pulse-to-decomposition time for high-energy X-rays typically have a threshold of 1000-2000 eV. Some existing pulse processors have exactly three pile-up removal channels to improve pile-up removal performance in the range below 1000 eV. In systems with two or more pile-up removal channels, the intermediate channels shall have a shaping time selected to allow sensitivity to specific radiation such as oxygen at 525 eV or carbon at 277 eV. become. With each lower step at the desired energy threshold, the pulse pair decomposition time is degraded due to the need for longer shaping times.

The pulse pair decomposition time is governed by the lower energy X-ray of the pair. This is important because unsuccessful low-energy pile-up detection affects all peaks in the spectrum, not just low-energy peaks. Pile-up with undetected low-energy X-rays can be shifted up to the sum of the two peak energies, excluding any peak and taking into account a wide shelf extending from the expected position. A good explanation for the dependence of pile-up effects on energy can be found in PJStatham, Microchim.Acta 155, 289-294 (2006).

In addition, the highly variable rise time of a single X-ray pulse effective in the case of SDD depends on how much X-rays are absorbed from the charge collection anode, but is the fastest conventional pile-up. When even a channel produces a single output pulse, it poses the greatest challenge of conventional methods of detecting simultaneity that are very close in time. For example, as described in Warburton et al., US Pat. No. 5,684,850, a conventional technique is a pulse width test. Digital triangular or trapezoidal filters are best known for all digital pulse processing systems because they are relatively easy to build and computationally efficient. Some filters are technically known as finite impulse response (FIR) filters, and the response of this filter is guaranteed to be zero outside the finite time range defined by the degree of the filter's non-zero weighting factor. Has been done. Traditional semi-Gaussian analog shaping, on the other hand, introduces an exponential time constant with an infinite response in principle, but in practice the output is (albeit slightly energy dependent). Decay below the noise threshold within a reasonably predictable time.

The pulse width of the FIR filter is not energy dependent in principle, but depends on the rise time of the preamplifier step, which in turn depends on the variable charge acquisition time in the SDD. Therefore, in order to avoid erroneous removal of effective pulses from a single X-ray, the fixed pulse width test should be set long enough to allow the maximum rise time resulting from the longest drift path in the SDD. ..

Therefore, it is advantageous to provide a pile-up detection method that does not depend on the rise time as a means of improving the performance of the system that uses the SDD whose rise time is very variable.

In one embodiment, the method of detecting pile-up from the output signal of the preamplifier of an energy dispersive radiation spectroscopic analysis system such as an X-ray spectroscopic analysis system or a gamma ray spectroscopic analysis system is such that the filter of the energy dispersive radiation spectroscopy system Generating a first pulse in response to an output signal, the energy dispersive radiospectroscopic analysis system has one or more fast channels, each of which depends on the threshold energy associated with that fast channel. It is a method in which substantially all photons received by an energy dispersive radiospectroscopic analysis system having full efficiency related energy and at least full efficiency related energy are detected by a high-speed channel. This method involves measuring the threshold time, which is the period during which the first pulse exceeds the filter's minimum detectable threshold energy, and one or more while the first pulse exceeds the filter's minimum detectable threshold. It has a determining step for determining that at least one of the plurality of high-speed channels has not detected anything, and a declaring step for declaring pile-up when the threshold period exceeds the longest expected pulse period. The longest expected pulse time is the period of the second pulse that will be output by the filter in response to a single photon received by the energy dispersive radiation spectroscopic analysis system. A single photon has an energy equal to the full efficiency associated energy of one particular undetected one or more fast channels with the lowest threshold energy. In one particular embodiment, one or more high speed channels include a plurality of high speed channels.

In another embodiment, a suitable pulse processor is provided to perform the method just described. In yet another embodiment, a detector that converts an incident photon into an output that includes a current pulse, a preamplifier that converts the output of the detector into a preamplifier output signal that includes a voltage signal, and a preamp output signal. Each of the high speed channels has a full efficiency related energy that depends on the threshold energy associated with the high speed channel, including a filter that produces one pulse and a pulse processor having one or more high speed channels. Energy such as an X-ray or gamma-ray spectroscopic analysis system, where virtually all photons received by an energy-distributed radiation spectroscopic analysis system with at least full efficiency of relevant energy are detected by a fast channel. A distributed radiation spectroscopic analysis system is provided. The pulse processor measures the threshold excess period, which is the period during which the first pulse exceeds the filter's minimum detectable threshold energy, and one or more fast channels while the first pulse exceeds the filter's minimum detectable threshold. When it is determined that at least one of them has not detected anything, and in response to the determination that one or more high-speed channels have not detected anything, the threshold excess period exceeds the maximum expected pulse period. The pile-up can be determined, and the longest expected pulse time will be output by the filter in response to a single photon received by the energy dispersive radiospectroscopic analysis system. A period of two pulses, the single photon having the lowest threshold energy equal to the associated energy of full efficiency of one particular channel of one or more fast channels without any detection. have.

Therefore, it will be apparent that the invention substantially achieves all of the above aspects and advantages. Additional aspects and advantages of the invention are set forth in the following description and may be partially self-evident from the description or will be apparent by practicing the invention. Moreover, aspects and advantages of the invention may be realized and achieved using the means and combinations specifically noted in the claims.

The accompanying drawings show a currently preferred embodiment of the invention and serve to illustrate the principles of the invention, along with the general description described above and the detailed description below. Similar symbols specify similar parts or corresponding parts, as shown throughout the drawing.

<figref num="1">FIG. 6 is an overall block diagram of an X-ray spectroscopic system according to one particular non-limiting embodiment in which the present invention is practiced.</figref>

<figref num="2">It is a block diagram of a general trapezoidal FIR digital filter.</figref>

<figref num="3A">FIG. 6 contains source code that may be used to carry out an invention according to one particular non-limiting embodiment.</figref><figref num="3B">FIG. 6 contains source code that may be used to carry out an invention according to one particular non-limiting embodiment.</figref><figref num="3C">FIG. 6 contains source code that may be used to carry out an invention according to one particular non-limiting embodiment.</figref><figref num="3D">FIG. 6 contains source code that may be used to carry out an invention according to one particular non-limiting embodiment.</figref>

<figref num="4A">It is a phase diagram extracted from the program logic of FIGS. 3A-3D which may be used for designing the FPGA embodiment of the invention.</figref><figref num="4B">It is a phase diagram extracted from the program logic of FIGS. 3A-3D which may be used for designing the FPGA embodiment of the invention.</figref>

<figref num="5A">It is a figure which shows the ideal trapezoidal response from the peak detection filter shown in FIG. 1 to two low-energy X-rays having different energies, and the third straight line represents the detection threshold energy.</figref>

<figref num="5B">It is a figure which shows the ideal representation of the output of the peak detection filter shown in FIG. 1 from two X-rays at 400 eV energy.</figref>

<figref num="6A">FIG. 5 shows possible patterns of rising and local extrema that may be processed to detect edges using one embodiment of the invention.</figref><figref num="6B">FIG. 5 shows possible patterns of rising and local extrema that may be processed to detect edges using one embodiment of the invention.</figref><figref num="6C">FIG. 5 shows possible patterns of rising and local extrema that may be processed to detect edges using one embodiment of the invention.</figref>

<figref num="7A">It is a plot figure of the actual waveform from SDD.</figref><figref num="7B">It is a plot figure of the actual waveform from SDD.</figref>

<figref num="8">FIG. 6 is a schematic diagram summarizing the expected pile-up performance of the system of FIG. 1, along with typical pulse pair decomposition time and energy detection thresholds for a particular SDD.</figref>

&lt;Explanation of desirable examples&gt; As pointed out in the Background Techniques section, the subject matter described herein applies to both tail pulse preamplifiers and pulse reset preamplifiers. However, for simplicity of illustration and description, the invention will be described in connection with an embodiment utilizing a pulse reset preamplifier. As described in the Background Techniques section, the rising edge of the detector voltage step signal is passed through the tail pulse preamplifier relatively unchanged. As a result, it can be seen from the description of the pulse reset embodiment that the invention described herein may be readily applied to the tail pulse preamplifier embodiment. In addition, the means described herein apply to energy dispersive radiation spectroscopic analysis systems in general. However, for simplicity of illustration and description, the invention will be described in connection with embodiments that utilize an X-ray spectroscopic analysis system. This should not be considered limiting, but the invention may be applied without limitation in connection with other types of energy dispersive radiation spectroscopic analysis systems such as gamma ray spectroscopic analysis systems. Should be understood.

The improvements described herein are independent of rise time, but in one embodiment it depends only on the expected sigmoid pattern of charge collection within the detector, and in another embodiment random noise is the direction of the signal. It depends on having a monotonically rising signal (within the noise dependency limit) followed by a short period of time to determine (the sign of the local first derivative, i.e. rising or falling). Thus, the improvements described herein are capable of responding faster with X-ray steps with shorter rise times and, more appropriately, responding to pulses more slowly without accidentally removing the pulse. is there. In one embodiment, it is assumed that the voltage signal from a single valid X-ray should have a first derivative that monotonically increases (within the limits of noise) to some maximum and then monotonically decreases. To. As described in more detail herein, the disclosed method according to one embodiment directly digitizes the preamplifier output, and the sequential difference between the digitized ADC samples is the instantaneous of the first derivative. Gives the best available estimate of the value. In another embodiment, it is assumed that the voltage signal from a single valid X-ray rises above the local peak-to-peak noise band and then finally stops rising, and It is assumed that the noise band should shift significantly before and after the rise, as measured by the local maximum that precedes the rise and the local minimum that follows. The system in this embodiment directly digitizes the preamplifier output and local extrema is measured within the digitized signal.

The conversion rate of the digitized ADC should properly match the expected range of rise time. This conversion rate should be fast enough so that the waveform is sampled several times during the rise with the shortest expected rise time. The minimum number of samples within the rise time for the invention to be fully effective is preferably 4 or 5. In a preferred embodiment, the sampling rate of the ADC is 100 MHz when the shortest expected rise time is about 50 nanoseconds, so that 5 samples occur within the minimum rise time and approximately 10 samples occur within the longest rise time.

If the sampling rate is very high, for example 40 or 50 samples fall within the rise time range, the waveform will not move well within a single sampling interval as the rise step can be easily identified from random noise fluctuations. .. As described elsewhere herein, this situation provides a circuit that embodies the invention by lowering the sampling rate in order to achieve optimal 4-8 samples during the fastest rise. This is easily addressed by summing several ADC samples for each value given.

A main object of the embodiments of the present invention is to use an adaptive step detection method that utilizes the smooth sigmoid nature of the underlying signal and automatically adapts to fluctuations in rise time and noise characteristics of the sensor / preamplifier coupling. By doing so, the average pulse pair decomposition time of the voltage step generated in the output signal of the semiconductor radiation sensor is shortened. The result is "sum peaks" that appear at the lower level of undetected pulse pile-up in the energy spectrum, and thus twice or the total energy of any two larger emission peaks in the spectrum. The relative size reduction of false artifacts, technically known as.

The methods described herein are digitally based and require the preamplifier signal to be digitized by an analog-to-digital converter (ADC). The optimum conversion rate depends on the fastest rise time expected from the preamplifier as described above.

The following description assumes a positive preamplifier output when X-rays are detected, but the polarity of the signal can be inverted throughout the signal sequence, and this method is equally effective. , Will be recognized by those skilled in the art. Silicon-based sensors and radiation within the low X-ray energy range are further assumed, but the invention described is for sensors made from other semiconductors such as germanium, and higher energy X-rays or gamma rays. It will also be appreciated by those skilled in the art that it is applicable to.

FIG. 1 is an overall block diagram of an X-ray spectroscopic system 1 according to one particular embodiment in which the present invention may be practiced. As can be seen in FIG. 1, the X-ray spectroscopic system 1 is a digital pulse processor (DPP) whose main component is indicated by a broken line boundary and in which the present invention is implemented as described herein. Includes 2. Further, the X-ray spectroscopy system 1 further includes a silicon drift detector (SDD) 100 and a pulse reset type preamplifier 101.

During operation, X-rays hit SDD 100 and are converted into electron-hole pairs, the number of electrons being proportional to the energy of the X-rays. A small charge consisting of all of these electrons is stored in a capacitor in the preamplifier 101 and converted into an output voltage signal of the form shown shown in which small sigmoid steps appear with varying amplitudes and intervals superimposed on the noise. To. The voltage signal has an overall positive gradient due to the leakage current in the SDD 100 with a periodic reset that drains the charge from the feedback capacitor and rapidly pushes the output to the lower limit, as shown in FIG. Produces a serrated waveform. This general approach has been technically known for many years.

The output of the preamplifier 101 is digitized by a high speed analog-to-digital converter (ADC) 102 provided as part of the DPP 2. In a preferred embodiment, the ADC 102 is a 100 MHz, 16-bit component manufactured by Analog Devices, such as the AD9446 series. The present invention acquires thousands of short (2.62 ms) segments of the preamplifier waveform from an SDD mounted on a scanning electron microscope (SEM), and stores a total of several seconds of real-time data in a disk file. Analog for this device so that A development board supplied by Devices, modified to accept DC-coupled input signals, and connected to an interface board (model HSC-ADC-EVALB-DC) with onboard memory and a standard USB interface to a PC. Developed using model AD9446-100 LVDS / PCB). Subsequent digital functions described below were first embodied in post-processing software written in a scripting language called Python. The source code for this software was filed on August 3, 2007 and is included in US Provisional Application No. 60/963320, whose name is "IMPROVED EDS PILEUP REJECTION FOR LOW ENERGIES AT HIGH COUNT RATES". The functions selected from this are reproduced herein. The Python program, therefore, has Field Programmable Gate Array (FPGA) logic and Texas. Served as a specification for real-time embodiments using a combination with the software described for the Instruments 320C-6414 Digital Signal Processing (DSP) chip. The preferred embodiment shown in FIG. 1 is named and places logic blocks 103 to 119 described in more detail below in the FPGA logic and is similarly named and described in more detail below. The described logic blocks 120 and 121 are installed in the DSP chip software.

The output of the ADC 102 consists of a digital sample from the preamplifier voltage waveform and a clock that determines the timing of all subsequent blocks in FIG. For the sake of brevity in FIG. 1, the clocks are not shown separately, but all functional blocks may be synchronized by the clock of ADC 102 or by some divisor of this clock, as described below. Should be understood.

In some cases, the output of the ADC 102 and the clock of this ADC pass through a detector / collating / averaging device 103 that sums the number of ADC samples and divides the original ADC clock by the same number. The purpose of the detector / collation / averager 103 is to optimize the effective sampling interval with respect to the rise time of the SDD 100 connected to DPP 2. Keeping all the bits in the sum is preferable to avoid quantization error in the final X-ray spectrum in all short filtering times, and therefore when processing continues to pass through DPP 2. The data path becomes wider.

If the average rise time expected from the SDD 100 is less than about 150 nanoseconds, the detector / match / averager 103 is disabled and used to achieve the best timing accuracy possible at a full 100 MHz rate. .. However, if a very slow detector, such as a so-called lithium drift silicon or Si (Li) detector with planar electrodes, is connected to DPP 2 and the average rise time is hundreds of nanoseconds. It is desirable to reduce the effective sampling rate to a rate that produces less than about 16 samples during the average rise.

Data and clocks (as summed as possible) from the detector, collation, and averager 103 are routed through two parallel paths. One path leads to a fast pile-up logic 104 with two subsections. The first subsection is the subject of one embodiment and is referred to as the single-step logic described in more detail herein. The other subsection is the subject of another embodiment that includes a digital method based on monotonous run lengths and patterns of sequential data samples, referred to as run logic, which is more detailed herein. The term "monotonic" used here does not mean exactly monotonous in the mathematical sense. The comparator used in this method is slightly negatively offset to detect a positive run that allows this difference if the difference between the negative samples is less than the peak-to-peak noise variation. If the single-step logic has the ability to detect pile-ups within a single continuous rise due to reasonably high-energy X-rays, the run logic will run low-energy X-rays as quickly as possible within noise constraints. Designed to detect the end of a continuous rise due to a line.

The second path leads to the filter averager 105. The filter averager 105 reduces noise (random variation between samples) and further reduces the speed required in subsequent digital processing steps, so a small number, preferably four sequential ADC samples. To sum. The total data of the four and the clock divided by four are sent to the low-speed pile-up logic 106. The slow pile-up logic 106 is functionally identical to the fast pile-up logic 104, but with less noise and slower data. When operating at a slower sample rate from the filter averager 105, the present invention has no inferior decomposition time, but reaches a lower energy detection threshold before false noise-based triggers become excessive.

The output from the filter averager 105 is further sent in parallel to the peak detection filter 107 (main channel) and the plurality of trapezoidal FIR digital filters 108, 109, 110 (high-speed channel). All of these filters are conventional trapezoidal, as has been technically commonly used for at least 15 years. A block diagram of a typical trapezoidal FIR digital filter is shown in FIG. As can be seen in FIG. 2, the ADC sample passes through three variable length FIFOs called rising FIFO 201, gap FIFO 202, and falling FIFO 203. The rising FIFO 201 is the initial integration time of the FIR filter. When convoluted with a step edge, the rising FIFO gives a linear rising in the final FIR total as the edge passes through the FIFO (ignoring noise fluctuations). The gap FIFO 202 is "flat" in response to a response that would otherwise be a triangular response to the step edge. The period of zero weighting that provides "top)". If the rise time to the detector is variable, the pure triangular pulse shape (without gaps) will have different maximum outputs for noise-free step edges of the same height but with different rise times. Therefore, a flat upper part is desirable. If the gap is long enough to cover the longest expected rise time, the total maximum output is the same (ignoring noise and any background gradient in the input signal). The falling FIFO 203 integrates the sample using the opposite polarity over the same period as the rising FIFO 201, so assuming that N is the length of the two FIFOs, the rising FIFO 201 adds N times to the overall total. The sample is finally deducted from the total N times in FIFO 203.

Triangular (or trapezoidal) filter shapes are well known for the simple circuitry needed to calculate the filter shape. Only four calculations are required for each FIFO clock cycle of an FIR filter with an arbitrary overall length. The sample entering the rising FIFO 201 and the sample exiting the rising FIFO 201 are added to and subtracted from the total movement, respectively. The sample entering the falling FIFO 203 and the sample exiting the falling FIFO 203 are each subtracted from the moving total and added to the moving total. The first difference is calculated by the arithmetic logic unit (ALU) 204 and the second difference is calculated by the ALU 205. The outputs of these two ALUs are added to the previous overall FIR output within the accumulator 206.

The maximum value of the total FIR output is proportional to the energy of the X-rays that appear while the sigmoid rise of the input signal is completely contained within the gap FIFO 202 and cause the rise.

The peak detector filter 107 is involved in the detection of all X-rays, even very low energy X-rays, rather than the measurement of X-ray energy, and locates all X-rays as accurately as possible in time. The width of the rising and falling FIFOs is made as short as possible, but still reliably detects the lowest energy X-ray emission lines in the collected spectrum. In the case of an X-ray analyzer mounted on an electron microscope, the X-ray emission line is often a carbon emission line of 277 electron volts (eV). Therefore, the peak detection filter 107 was filed on August 3, 2007, and the name is "IMPROVED EDS PILEUP REJECTION FOR LOW ENERIGIES AT HIGH COUNT." Often referred to as a "carbon filter" in US Provisional Patent Application No. 60/963320, which is "RATES". The minimum target emission line may be lower energy (boron or beryllium), or higher energy for detectors for X-ray fluorescence (XRF) excitation, where low energy is very inadequate. XRF detectors typically have a beryllium window on the front of the sensor that blocks essentially all X-rays below about 700 eV. In that case, the peak detection filter 107 can be made narrower without the risk of losing a significant number of X-rays, improving the performance of the peak detection filter for pile-up detection.

The peak detection filter 107 produces a normal FIR sum and two other signals, namely the pulse at the time of maximum response and the logic signal indicating the time when the response exceeds the threshold energy. Detailed specifications of these signals will be described later.

The FIR filters 108, 109, 110 for measuring the X-ray energy level, the peak detection filter 107, the low-speed pile-up logic 106, and the high-speed pile-up logic 105 are a single X having sufficient energy and containing no noise. The edge (event) position (time point) from the fast pile-up logic 104 and the slow pile-up logic 106, and the maximum value of the peak detection filter 107, all to the extent that the line pulse triggers all edge (event) detectors. The output data corresponding to the center of the gap for the energy measurement FIR filters 108, 109, 110 of the pulse verification logic 117, the baseline gradient measurement logic 118, and the filter latch logic 119 (of the filter averager 105). All are connected to a programmable length alignment delay FIFA 111, 112, 113, 114, 115, 116 of appropriate magnitude so that they arrive simultaneously (within the quantization limits imposed by the clock split).

The filter latch logic 119 captures the output of all FIR filters corresponding to the maximum aligned output time of the peak detection filter 107. The filter latch circuit is functionally equivalent to a conventional analog pulse processing sample hold circuit. The output of the filter latch logic allows time for the detection of pile-ups following the edge that triggered the latch, so it is half the FIR pulse width of the longest FIR filter in the energy measurement filter stack (fall time and gap time). Delayed by an additional period corresponding to (total with half).

Filter latch logic 119 can be used without pile-up by the methods disclosed in US Pat. No. 3872287 to Koeman and US Pat. No. 5,329,982 to Mott, the longest filter in the FIR stack (if any). Further accommodates a timer that measures the time from the current strobe signal to the preceding strobe signal and the subsequent strobe signal (maximum output pulse from peak detection filter 107) to allow selection. The outputs of all filters shorter than this maximum are further weighted to achieve better estimates of X-ray energy, again by the method taught in US Pat. No. 387287 to Koeman. May be combined.

The baseline gradient measurement logic 118 measures the positive gradient due to the leakage current of the voltage signal of the preamplifier 101 in the absence of the sigmoid step due to the arrival of X-rays. It is technically well known that trapezoidal FIR filters have a constant response to linear gradients that depend on the filter integration time and gap width. This gradient response must be subtracted from the output of the filter to provide an accurate measurement of X-ray energy. Details of the preferred method of estimating the slope near the sigmoid step can be found in US Provisional Application No. 60/963312, filed August 3, 2007 and named "DIGITAL PULSE PROCESSOR SLOPE CORRECTION". The disclosure of this document is incorporated herein by.

The pulse verification logic 117 determines whether the pile-up appears within the range of a single output pulse from the peak detection filter 107, so that the high-speed pile-up logic 104, the low-speed pile-up logic 106, and the peak detection filter 107 Combine the signals from. Since only one maximum output pulse is generated by the peak detection filter 107, if such a pile-up that is not detected by the filter latch logic 119 appears, an inhibitor pulse is generated and the output of the filter latch logic 119 Is properly delayed to arrive at the same time as the gradient correction and calibration logic 120 is reached.

The following test is performed with pulse verification logic 117. If the pulse detected directly piled up is received from either the fast pileup logic 105 or the slow pileup logic 106 and the "above threshold" logic signal from the peak detection filter 107 is active, then the pile is piled up. The up is asserted and an inhibitor signal is generated. If two or more edge detection pulses are received from either the fast pile-up logic 105 or the slow pile-up logic 106 and the "over-threshold" logic signal is active, the pile-up is similarly asserted and the suppression signal Occurs.

The edge and pile-up detection signals generated by the fast pile-up logic 105 or the slow pile-up logic 106 when the "excess threshold" signal is not in the active state are ignored as false triggers. This prevents counting false triggers due to short noise spikes averaged below the energy threshold within the peak detection filter 107, and two pile-up logic blocks would otherwise be required. Prevents having a detection threshold lower than the detection threshold.

The pulse width and pulse symmetry from the peak detection filter 107 detects pile-up if one or both of the X-rays are so low energy that they cannot trigger the fast pile-up logic 105 or the slow pile-up logic 106. Therefore, it is similarly tested as disclosed in US Pat. No. 5,349193 to Mott.

An additional symmetric test is performed to check if the edges detected by the fast pile-up logic 104 and the slow pile-up logic 106 are centered within the time that exceeds the threshold of the peak detection filter 107. In software utilization practices described elsewhere herein, this test is single with the absolute difference in edge position notified by the fast pile-up logic 104 and the slow pile-up logic 106. This is done by obtaining the maximum response of the peak detection filter 107, which is expected to be centered within a time that exceeds the threshold for X-rays. However, in the FPGA logic implementation shown in FIG. 1, it is more convenient to use a timer instead of the absolute difference of the time stamps, as shown in FIG. 5b. These timers are referred to as event lag timers. One event log timer starts at the beginning of the "excess threshold" signal. When the edge signal is received from either the fast pile-up logic 104 or the slow pile-up logic 106, the timer is set to a limit value calculated from the known rise and gap times of the peak detection filter 107 and a single event. Checked against the sum of half of the detector's longest expected rise time for and a small margin for fluctuations due to noise and time quantization errors. If the timer exceeds this limit, it is expected that a pile-up using low energy X-rays will appear.

The second event lag timer is started when either edge is received from the fast pile-up logic 104 or the slow pile-up logic 106 and checks against the same limit when the "over-threshold" signal drops. Will be done. The two timers are named "Event Lag 1" and "Event Lag 2" in FIG. 5b. It will be apparent to those skilled in the art that this set of timers constrains the edge signal to a range in the center of time that exceeds the threshold of the peak detection filter 107. This is functionally equivalent to the software timestamp method, assuming that the maximum response of the peak detection filter 107 is usually near the center of time above the threshold.

Edge detection by any filtering mechanism has no sharp cutoff in which all X-rays above a certain value are detected and at the same time all X-rays below this value are not detected. Instead, due to random noise fluctuations near the edges, the detection efficiency is below some energy, from 100% above a certain energy, as described in PJStatham, Microchim. Acta 155, 289-294 (2006). It smoothly drops to zero below the energy. FIG. 2 of this document shows the shape of the detection efficiency curve, but this figure refers to the SI (Li) detector and the constraints and energy ranges are quite different from those of the SDD. It is assumed that two X-rays are piled up with the energy that the low-speed pile-up logic 106 detects X-rays with a probability of 50%. Usually, only one of the X-rays is detected.

FIG. 5a shows the ideal trapezoidal response from the peak detection filter 107 to two low energy X-rays with different energies, and the third line shows the detection threshold energy. The energy specified in real-world applications may vary depending on the filter width and the particular SDD / preamplifier used, but the values given are appropriate for the current-generating SDD.

The upper dashed line 480 eV represents the energy at which the low speed pile-up logic 106 is almost 100% effective at an energy exceeding this energy. The dashed line 280eV in the middle is near the carbon X-ray energy. The dashed line 160eV below is a typical setting for the detection threshold and is low enough to detect elemental boron (183eV).

The central time called "G + R + N" is a margin of the gap time G of the peak detection filter 107, the longest rise time R expected from the detector, and the safety factor N of noise and time quantization error. This margin creates a flat area in the filter output. The rising and falling segments of the output are the pre-integration time and the subsequent integration time of the peak detection filter 107.

In this case, "high energy" may mean up to 20 to 30 kiloV (keV), an energy greater than 100 times the detection threshold. The pulse widths B and C shown for each of the 480 eV and 280 eV X-rays are short as shown, as the detection threshold becomes an increasingly important threshold for X-ray energies below 1 keV.

FIG. 5B shows an ideal representation of the output of the peak detection filter 107 from two X-rays with 400 eV energy. 400 eV is very low to reliably trigger the slow pile-up logic 106, and a detection efficiency of 50% is assumed with this energy. The cruciform outline of the trapezoid indicates a response to a single X-ray centered at 400 eV. The dotted trapezoid and the dash-dotted trapezoid show two such X-rays shifted X1 times to the left and X2 times to the right, respectively. The entire response is always the upper solid line, which is the sum of the dotted and alternate long and short dash lines. Circled numbers indicate the number of times the gradient of the output response changes. Since piled-up X-rays are assumed to have equal energies, the output shape is symmetric with respect to the maximum drop of output somewhere in the narrow flat region between circles 3 and 4. Symmetry checks, such as those described in US Pat. No. 5,349193, may not detect pile-ups, as the actual maximum is somewhere within this region due to small random noise fluctuations. ..

The pulses in the peak detection filter 107 may pass the overall pulse width check as well. As shown in FIG. 5A, the pulse width for a single low-energy X-ray is reduced below the maximum width at high energy, and low-energy pile-up events are separated by less than this reduction. If so, the pulse width test is useless as shown in FIG. 5B (range pp is less than A). However, as shown in FIG. 5B, one of the aforementioned timers has a complete bals separation time added to the average pulse rise time that exceeds a given X-ray threshold. Thus, testing these timers increases the probability of detecting a pile-up if only one of the X-rays triggers at least one of the pile-up logic blocks.

The fixed event lag limit cannot be less than the sum of the integration time of the peak detection filter 107 and the aforementioned "G + R + N", or a single high energy X-ray is mistakenly removed as a pile-up. There are times. The lower the limit, the lower the time separation that can be detected, so it is advantageous to choose an SDD with the fastest rise time R and the lowest possible noise N.

Further improvements in pile-up detection are described above, and as shown in FIG. 5A, the pulse width of the peak detection filter 107 is narrower for low energies, so the limit on which the timer is tested is not constant and energy. Can be done if it changes with. This narrower pulse width can be predicted from the known detection threshold energy and the FIR integration time of the peak detection filter 107 if the X-ray energy is known. Unfortunately, pile-up within the pulse time range of the peak detection filter 107 is assumed, so the maximum output of the peak detection filter should be proportional to any value up to the sum of the energy of the piled up X-rays. There is.

However, the upper limit of the energy of all X-rays in the pile-up series is by realizing that the detection efficiency of X-rays in X-rays is around 100% when the high-speed pile-up logic 105 is not triggered. It can be set. Similarly, when the low speed pile-up logic 106 is not triggered, none of the X-rays can exceed the upper limit of the X-ray energy at which the X-ray detection efficiency is around 100%.

In practice, this sets two different limits for the event lag timer and for an event that triggers edge detection for three for the total pulse width, ie at least one fast pile-up 105. An intermediate threshold for an event that does not trigger edge detection for fast pile-up 105, but triggers edge detection for at least one slow pile-up logic 106, with a maximum equal to the fixed limit described above, and an edge pile-up logic block. Means to set the shortest for pulse width testing only when not detected by. The limit reduction from the high energy case is calculated from the detection ratio of the detection threshold energy of the peak detection filter 107 to the 100% detection efficiency energy of the appropriate pile-up logic block. The expected time to exceed the threshold for the rising and falling parts of the FIR response of the peak detection filter 107 for a single X-ray is shortened by the same ratio. In FIG. 5A, the threshold 160eV is one-third of the 480eV energy limit that is expected to detect almost all X-rays when the slow pile-up logic 106 exceeds 480eV, so the rising / falling portion of the output. The time to exceed the threshold of is reduced to 1/3. This relatively large change in expected pulse width with energies near the lowest detectable energy allows the detection of closer pile-ups that can be performed in the prior art.

In the absence of an edge from the slow pile-up logic 106, the pulse width above the threshold should not be greater than the interval B given in FIG. 5A, and the expected width of the pulse from carbon X-rays is interval C. Therefore, two carbon X-rays separated more than (BC) can be detected as pile-ups. In the prior art, pile-up is not detected unless carbon X-rays are separated by at least (AC). The same reason can be applied when one X-ray triggers the slow pile-up logic 106 but not the fast pile-up logic 105, but because the energy limit of the full efficiency of the fast pile-up 105 is higher, the pulse width. B will be a little wider. Similarly, the event lag timer limit can be set to the interval from the right edge of the central G + R + N band to the left edge of interval B, which is appropriate for the energy limit of the full efficiency of the fast pile-up logic 105. Pile-up detection for carbon X-rays, including oxygen X-rays, is thus improved over the prior art.

Returning to FIG. 1, the gradient correction and calibration logic 120 outputs current gradient estimates from the baseline gradient measurement logic 118, all properly time aligned, and outputs of all energy measurement FIR filters 108, 109, 110. And perhaps a suppression signal from the pulse verification logic 117. In a preferred embodiment, these events occur at the pulse rate of the peak detection filter 107, which is much lower than the ADC sampling rate, so these functions are performed in software on a digital signal processing chip such as Texas Instruments TMS320C6414. Will be done.

In the absence of a suppression signal, this logic was calibrated for X-rays with step edges by subtracting the error due to the baseline gradient in the signal from the ADC 102 in a technically well-known manner. The raw outputs of one or more FIR filters 108, 109, 110 are weighted to generate energy estimates.

These measured energies are also stored in the memory of the pulse-height analyzer (MCA) 121 in a technically well-known manner. The spectrum accumulated in the MCA 121 is sent to the host PC 122 for analysis.

Described in detail herein are parts of the fast pile-up logic 105 and slow pile-up logic 106 referred to as "Single Step" and "Runs" in FIG. It is a part. The term "single step" is thus referred to as sequential between samples from the ADC 102, which is probably averaged as described above in the detector / collation / averaging device 103 and the filter averaging device 104. This is because it works with a large difference. The "run" is so referred to as the ADC, which is probably averaged as described above in the detector / collation / averaging device 103 and the filter averaging device 104. This is because it tracks the positive and negative runs of the sample from 102. 3A-3D show the high speed pile-up logic 105 and one embodiment that served as a specification for FPGA embodiments of the single-step and run methods, as described elsewhere herein. Provides a list of program source code for features that embody both the "single step" and "run" parts of slow pile-up logic 106. 4A and 4B are phase diagrams extracted from the program logic used to design FPGA embodiments for the single-step and run methods. 6A, 6B and 6C illustrate some possible patterns of rising and local extrema and how the present invention handles these patterns in one embodiment. The four sequential local extrema are referred to as A, B, C and D, respectively, throughout FIGS. 6A-6C. An intermediate rising run from the local minimum value B to the local maximum value C is compared to the trigger level, which is the variable "bigrig" in the Python code described herein. A significant enhancement utilized in the preferred embodiment is an additional check between the local minimum value following the rise in D and the local maximum value following the rise in A. 7A and 7B show plots of the two pulses in the actual data captured from the SDD using the same ADC as in the preferred embodiment as described above. One of the pulses is a pile-up of two X-rays and the other is a single event with similar rise times. These figures will be described in detail later.

The "ADC sample" is referred to through the following examination. This means a sequential data sample given to the logic under consideration, each of which is an ADC 102, depending on the settings of the detector, collation and averaging device 103 and the filter averaging device 104. It should be understood that a certain number of original samples from or may be summed or averaged.

Some constants that set the length of the FIFO that averages the noise or measures the baseline gradient and the ratio of the threshold values to the averaged and unaveraged data, etc., are the codes in Figures 3A-3D ( It appears in the Python code) and the state diagram of FIG. 4 as described elsewhere in this specification. In the FPGA embodiment (figure), these constants are programmable register values. Those skilled in the art will appreciate that certain values used to adapt a particular detector or detector type may vary without departing from the essential properties of the invention.

In general, the software has three logic blocks, namely the fast pile-up logic 105, the slow pile-up logic 106, and the time difference from the edge position reported by the peak detection filter 107, which is referred to as the "carbon filter" in the Python code. It works by getting. In the case of FPGA implementation, the edge reported by the fast pile-up logic 105 or the slow pile-up logic 106 was associated with the time stamp maximum signal to determine if it was inside the pulse from the peak detection filter 107. Although it is more convenient to use the over-threshold logical output of the peak detection filter 107 than to perform arithmetic on the time stamps, those skilled in the art will find that these methods are functionally equivalent.

The Python language syntax does not include line numbers. However, the executable (non-commented) lines in FIGS. 3A-3D have numbered comments added to the end of the lines for the convenience of matching the following description with the code list. Line numbers start at 301 and end at 417.

One version of the code was filed on August 3, 2007 and was provided in US Provisional Application No. 60/963320, whose name is "IMPROVED EDS PILEUP REJECTION FOR LOW ENERGIES AT HIGH COUNT RATES". In the code of FIGS. 3A-3D, some comment lines are dropped or modified as compared to the code in the provisional application. Similarly, some lines of debug output, code that is no longer in use, or "dead code" that is no longer executed, is included in the provisional application to shorten the source list and improve clarity. It has been removed from the existing code version. The executable code that is important to the functionality of the invention provided in FIGS. 3A-3D is equivalent to the executable code provided in the provisional application.

Comments that refer to "inflection points" are about "local maxima / minima" or "local extrema" to comply with accurate mathematical usage. Changed to mention. The actual behavior is clear from the executable code. As used herein and in the code of FIGS. 3A-3D, terms such as those used in a sequential ADC sample where the value of the ADC sample stops increasing and begins to decrease, or a sample that stops decreasing and begins to increase. Point to.

Note that the entire logic block shown in FIGS. 3A-3d and 4 for the fast pile-up logic 105 is replicated for the slow pile-up logic 106 at a lower effective ADC sample rate due to the filter averager 104. Will be done.

In FIG. 3A, line 301 defines a function that implements the invention according to one particular embodiment. The argument "trace" is input data from the ADC 102, which may have been reduced from the original data rate as described above. The argument "tracestart" is not used. The argument "calib" is an energy calibration factor that is the number of multiple ADC least significant bits (LSBs) in the Mn K-alpha X-ray of 5895 eV. The argument "Debug" is a flag that turns on various diagnostic outputs. The argument "Cedges" is an array that holds the edges (timestamps) of the X-rays detected by the peak detection filter 107, referred to as the "carbon filter" throughout the software, and is therefore the array name.

Line 302 stores global parameters and only the threshold multiplier "tfactor" is used. Line 302 allows the setting of external fixed values (loaded in the registers of the FPGA embodiment (FIG. 1)) for the critical trigger values rig and big rig described below.

Lines 304-328 initialize some variables and arrays. The meaning of these variables and arrays will be explained as needed when the lines of code in which they are used are described. In particular, the sequence "fastpiloops" accommodates the edge positions for pile-up detected in one embodiment of the invention. Writing an entry to the array "fastpiloops" is equivalent to entering the "PILEUP" state in FIG. 4 and generates the signal P from the fast pileup logic 105 in the FPGA embodiment (FIG. 1). The array "edges" stores edge (event) positions equivalent to the signal E from the fast pile-up logic 105 in the FPGA embodiment (FIG. 1). In another embodiment described herein, the pile-up signal is not generated directly. Instead, this other embodiment generates a signal E for each edge that can be separated from the adjacent edges. As mentioned above, pile-up is recognized when two or more such signals E are received by the pulse verification logic 117 during the "excess threshold" pulse from the peak detection filter 107.

The variable "trig" set in line 333 or 336, depending on whether the hardware flag "Hflag" is set, is a trigger value for detecting edges by a single ADC sample difference. At line 333, the trig is set to mean the last 16 negative ADC sample differences multiplied by the threshold multiplier "tfactor" set as a global parameter. In the FPGA embodiment, the trig is set directly as a register value, such as line 336. The variable "bigrig" (row 334, or row 337 as a register value independent of trig in the FPGA embodiment (FIG. 1)) is a continuum of positive differences between ADC samples held in the variable "posrun". The trigger value for the full integral of the run. As the name suggests, "big rig" is usually larger than rig.

Line 328 begins a main loop that processes all the remaining samples. The two parallel index variables i and j separated by 1 at initialization in rows 308-309 select the current pair of ADC samples. This loop ends at rows 415 and 416 that increment these array variables.

The state variable diff, set in line 331 and referenced in most state transitions in FIG. 4, is simply between two sequential ADC samples (in the time memory defined by either preceding averaging). One sample difference, the best available digital estimate of the instantaneous gradient of the preamplifier signal (ie, the signal output by the preamplifier 101 in the FPGA embodiment (FIG. 1)). The preceding value of "diff" is held in the variable "lastdiff" at line 330 to check the second derivative (rate of change) of the gradient, and the second derivative (rate of change) of the gradient is the signal from the X-ray. When rising through the first half of the resulting sigmoid pattern, it is positive (diff&gt; lastdiff) ("GOING UP" state 407 in FIG. 4A) and then stable or stable with respect to the second half of the resulting sigmoid pattern. It is a descent ("GOING" in FIG. 4A. DOWN) "state 407) is expected. The latest value of the back ADC sample of this pair indexed by "i" is stored in the variable "lastval" at line 329. This value is used to validate the pulse and, by definition, track the point where the gradient, which is the local maximum or minimum, changes sign.

The loop of FIGS. 3A-3D begins at the "IDLE" state 402 of FIG. Lines 338-359 and 386-389 manage the state transitions of the embodiments described herein, switch between continuous increasing or decreasing runs, and make a final edge determination as described below. ..

Regardless of where the system is operating in the phase diagram of FIG. 4A, the signal must alternate between the "positive (POS)" state 408 and the "negative (NEG)" state 409 in FIG. 4B. Must be (collecting unchanged values into the "positive" state 408) and the transition between these two states is the local maximum value at which the "positive" state 408 transitions to the "negative" state 409 and its. It will soon be apparent that it should appear with the opposite local minimum. At these transition points, certain state variables, in particular the values of the ADC sample at the current local maximum value "neginf" and the immediately preceding local maximum value "lastneginf", should be maintained for later use. ..

Rows 338-340 corresponding to the "positive clear (CLR POS)" state 410 clear the height of the positive run at the start of the negative run. In the code version shown in FIGS. 3A-3D, the "positive clear" state 410 state passes during every iteration of the "positive" state 408. This is unnecessary, but not harmful. The important point is to test if "posrun" is zero to determine if the process is at the local minimum and if it is the start of a new positive run, so "xraydone" is set. A transition from a "negative" state 409 to a "positive" state 408 that tests whether the "valid edge (VALID EDGE)" state 412 should be entered. Note that in Python syntax, zero-value tests are false and all non-zero-value tests are true for numeric variables.

Lines 341-343 perform the corresponding function for the "Negative Clear (CLR NEG)" state 411 and clear the negative run height "negroon". The clear condition of the variable "negroon" is used to notify the transition from the "negative" state 409 to the "positive" state 408 that specifies the local maximum value. The ADC sample values of the preceding two local maximum values are stored in the variables "neginf" and "lastneginf".

Line 344 is a state test that determines whether the process is in the "positive" state 408 or in the "negative" state 409. In a preferred embodiment, the comparison limit is slightly below zero. The purpose is to bias the test with a slight priority on the rising run. Some random noise is present in each ADC sample and the differences between some samples can be negative during rise due to low energy X-rays. The variable "trig" represents the upper limit of the difference between samples that should be expected due to random noise, as described above. Therefore, the negative difference is required to be greater than a small portion of the variable "trig" before ending the rise, and of less energy than is possible if strictly monotonous increases are required. Allows X-rays to be detected. In addition, the risk of misidentifying pile-ups by requiring a minimal amount of negative difference to end the rise is prematurely due to random noise fluctuations with effective edges slower than the average rise time going negative. Minimized if interrupted. The energy detection threshold, represented by "bigrig", needs to be large enough to prevent the number of times that effective X-rays are erroneously removed as pile-ups is significant. Empirically, as used in rows 334 and 344, the ratio of bigrig to rig of 5: 4 and the state switching threshold (-trig / 8) are low detection without significant false removal. It has been found that the combination works well to achieve the threshold, but other values may be used without departing from the spirit of the present invention.

Line 345 tests the transition from the "negative" state 409 to the "positive" state 408. During this transition, if the flag "xraydone" is set directly from the "GOING DOWN" state 407 or in the "GOING UP" state 404 (FIG. 4A), the "effective pulse" state. It goes into the "VALID EDGE" state 412, which is the same as the 406. Line 346 stores the current index (timestamp) averaged using the end time to estimate the last time stamp of a weak edge whose maximum "diff" value is not a reliable locator. If the flag "xraydone" is set, line 348 clears this flag. Line 349 sets a 10-sample suppression time, which is the period during which the negative value of "diff" is not averaged to the noise estimate due to the dynamic calculation of the noise trigger "trig" as described above. This avoids counting the recovery period towards the negative of any overshoot from the edge in the noise estimate.

Line 350 performs a test that allows this embodiment to outperform prior art methods by removing a number of patterns that would result in false triggers according to a simple run height test. 6A-6C show schematics of three waveforms tested (from local minimum value B to local maximum value C) with approximately the same rise. For simplicity, the rising and falling parts of the waveform are drawn as straight lines, but as mentioned above, the rising segment may contain a small negative blip and of the rising and falling segments. Both are generally not linear due to noise fluctuations.

At line 350, the variable "lastval" contains the ADC sample at point D, i.e. the current local minimum. The variable "lastneginif" contains the ADC sample at point A, i.e. the local minimum value that precedes the rise during the test. It has already been determined that the rise itself exceeds the threshold "bigrig". The difference from "lastval" (point D in all the schematics of FIG. 6) to "lastneginf" (point A in all the loci of FIG. 6) is then checked. If this difference is greater than half the noise trigger level "trig", the edges are acceptable. The magnification 1/2 is chosen for convenience of calculation and may change without departing from the scope of the invention. However, it is desirable to have some evidence that the noise band is shifted by a significant portion of the noise trigger level. Having a reasonably large minimum value in DA also means that very weak edges, or slow edges, which appear as a zigzag sequence of upper and lower segments, are incorrectly detected as separate edges, thereby pile. Prevents accidental removal as an up. This check is a check that allows the detection threshold "bigrig" for CB to be only slightly larger than the single-step trigger "rig".

FIG. 6A shows a case of restoration from a negative noise excursion in which the CB edge is abnormally large. The average noise band before and after the edge is the same. Since the DA difference is actually negative, this rise is eliminated.

FIG. 6C also shows a positive spike in which the average noise band does not change before and after. Similarly, the DA test fails and the edges are ignored.

FIG. 6B illustrates successful edge detection. Since the noise band after the edge under test shifts significantly from the peak-to-peak range of noise before the edge, the DA difference is just over half of the single-step noise trigger level "trig". , Edge detection is accepted as valid.

More local minimums and maximums that precede and follow the edge under test can be used in a similar format to verify that the peak-to-peak noise band actually shifted at the edge under test. , Will be clear to those skilled in the art. It will be equally clear that the methods of the invention do not depend on any fixed time period and therefore dynamically respond to edges with widely varying rise times, as in the case of SDD.

Line 351 stores the edge time stamp (E-signal is generated from the fast pile-up logic 105 or the slow pile-up logic 106 in FIG. 1). Row 352 maintains the accumulated height of the positive run. Line 353 sets the flag "cleareg" to enter the "negative clear" state 411 in FIG. 4B. This line resides inside the "if not posrun" logical block and can only be executed once per transition.

Line 354 is the beginning of the logic to handle negative runs. The height of the negative run is maintained by row 358, but is not currently in use. The DA difference check was found to be appropriate for detecting effective edges.

Lines 355-357 detect the appearance of a local maximum and maintain the current (point C) and previous (point A) maximums. Line 359 sets the flag "clearpos" to force it into the "positive clear" state 410, but performing this function inside the "if not negrun" logical block is equivalent.

The states shown in FIG. 4A are dealt with by rows 360-417. Note that the "elif" structure in the Python programming language makes the states mutually exclusive, so that the beginning of the "if ... elife ... elife" test chain starting at line 360 where the condition is met is executed. To. Therefore, the states are presented in reverse order in the codes of FIGS. 3A-3D as compared to the time-ordered progression of the states in FIG.

Lines 360-369 show what happens when the system is in the "GOING DOWN" state 407 of FIG. This is the last active state before returning to the main loop. This state has two possible termination paths: direct detection of pile-up during continuous rise ("PILE UP" state 405), or "Valid PULSE?". Has progress to a later pulse validation in state 406.

In the "descending" state 407, row 361 tests whether the difference between the current samples has dropped below the noise trigger level "trig". When this difference decreases, the rate of change of the preamplifier signal falls within the noise band range at this time, so that the "downward" state 407 ends at lines 362 to 363, the flag "xraydone" is set, and the figure shows. It results in entering the "effective pulse?" State 406 in FIG. 4A, which is also the "effective edge? (VALID EDGE?)" State 412 in 4B.

Line 364 makes an important check to determine if a direct pile-up has been detected. In the embodiments provided in FIGS. 3A-3D, an important feature is that the current difference "diff" should exceed the previous difference "lastdiff" by a difference greater than the noise trigger level "tric". If the test is not conditioned on "trig", it is possible to obtain valid x-rays that are incorrectly identified as pile-ups, as described below. It should be noted that the SDD rise time can vary widely given the relatively slow rise times with similar gradients, with three successive differences near the center of the rise. Since noise adds a small random displacement to each sample value, moderate differences can be slightly reduced relative to the previous and immediate differences, with successive differences exceeding the noise level. If not required, it will cause the wrong pile-up signal.

7A and 7B show two plots of the actual waveform from the SDD. The horizontal axis scale is 10 nanoseconds per unit (100 MHz ADC sampling time), and the number is the index (timestamp) in the file of 256,000 samples in 2.62 ms in real time. The vertical scale is the least significant bit of the ADC called "adu" because of the ADC unit. For both plots, the vertical scale is 100 ado per segment.

FIG. 7A shows a smooth, but relatively gradual rise from a single X-ray with a longer than average drift path in the SDD. The enclosed area covers 7 samples, ie 70 nanoseconds. In addition, it should be noted that there is a peak-to-peak noise excursion of about 30 adu just in front of the enclosed area. Assuming a similar upward displacement of 30 adu at the data point at time point 74440, this is either between samples 74441 and 74440, between samples 74440 and 74439, or between samples 74442 and 74441. May make a difference smaller than the difference, which matches the pile-up pattern completely due to noise.

FIG. 7B shows a pulse that was successfully detected as a pile-up, even though the total rise time and amplitude were very similar to the effective pulse of FIG. 7A, unless the rise time of individual X-rays was fairly short. It means that it must be done. The gradient in the central enclosure is significantly smaller than the gradient in the lower left enclosure, causing the process to proceed from the "ascending" state 404 to the "descending" state 407 in FIG. Next, the increase in gradient within the upper right box region from 73adu / sample to 142adu / sample, ie 69adu, is greater than twice the intersample noise variation of 30adu observed in FIG. 7A and may be due to noise. The sex is very low. Conventional methods will not be able to identify one of these two pulses as pile-up and the other as valid. In particular, it should be noted that the centers of the two pile-up X-rays in FIG. 7B (points of maximum gradient) are separated by a difference of 50 nanoseconds, which is shorter than the total rise time in FIG. 7A.

Lines 364 to 369 of FIG. 3C indicate the storage of the pile-up time stamp, the generation of the P signal from the high-speed pile-up logic 105 or the low-speed pile-up logic 106, and the return of the state variable to the "rising" state 404. Handles housekeeping.

Rows 370-381 in FIG. 3C deal with the processing of the "ascending" state 404. The variable "maxdiff" holds the current maximum single sample difference (instantaneous gradient) that appears between the current rising sigmoid preamp edges. Lines 371-273 maintain this maximum value and retain a time stamp associated with the edge that indicates this maximum value.

There are two possible termination paths from the "ascending" state 404, only one of which (the latter of which is described below) is relevant to the present invention. Lines 374-376 exit to "effective pulse?" State 406 when the current gradient (single sample difference) drops to less than half the noise trigger level. No single step pileup check is performed. As described above, the flag "xraydone" is set, which means the next transition from the "negative" state 409 to the "positive" state 408. The DA validation described in connection with FIGS. 6A-6C is performed.

Lines 377-379 are the other part of the test pair that implements the present invention (and the second termination path). This part of the test determines when the state changes from the "rising" state 404 to the "falling" state 407. In this test, the drop in the single-step gradient from the maximum that appeared during the rise must be greater than the noise trigger "trig". Note that line 374 cannot reach this end path unless it obtains a maximum difference of at least 1.5 times the "trig", otherwise the first end path (as described above). Means that is done. To reach the "descending" state 407, therefore, the only way to enable the possibility of pile-up detection according to the invention is to meet the conditions first. The exact magnification of 1.5 is not important, but it is computationally convenient. The point is that, as mentioned above, only relatively high-energy X-rays are good candidates for these tests without the risk of false affirmations. Low-energy x-rays may present the same pattern, but are not a true pile-up. The sample in which the waveforms of FIGS. 7A and 7B are captured is a NiAl alloy. The X-rays shown in FIG. 7A are probably nickel K-alpha near 7500 eV, and the two X-rays in FIG. 7B are probably Ni K-alpha and aluminum K-alpha near 1500 eV.

Lines 378 and 379 deal with state changes from "ascending" state 404 to "descending" state 407. Lines 380-381 do nothing if neither end route condition is met, but the current difference is not the new maximum.

Line 382 is a test that triggers an entry from the "waiting" state 402 to the "rising" state 404. Two conditions need to be met. First, the current difference needs to exceed the noise trigger level "trig". The second test ensures that the higher ADC sample of the pair exceeds the previous local maximum. This is not essential, but it improves performance by removing the wrong trigger when restoring from a negative noise spike.

Lines 383-385 initialize the "rising" state 404 and set the maximum difference to the current difference. It should be noted that this means that "maxdiff" will never be less than the noise trigger level "trig" after this first use.

Lines 386-389 trigger a "GOING UP WEAK" state 403. This does not require that the cumulative height of the positive run (as described elsewhere in this specification) be greater than the noise trigger "tric" for the single step difference. If it exceeds, it causes an entry to the "rising" state 404. An important line for the present invention is line 389 which resets the "maxdiff" to equalize the noise trigger "trig". This prevents the "ascending" state 404 from entering the "descending" state 407, and thus, perhaps by satisfying the test at row 371 with a "maxdiff" equal to "trig", the single step difference is " Pile-up detection according to the present invention is possible unless it is shown to exceed "trig". In this way, the continuous run embodiment described herein and the single-step triggered embodiment are prevented from interfering with each other.

Lines 390 to 400 detect the occurrence of a reset in the preamplifier 101. This causes the output to drop rapidly so that the negative single sample difference is more than 10 times the trigger level "trig". Lines 391-393 suppress processing during the reset and during the specified period thereafter. Lines 394-400 reinitialize the state variables.

Lines 404-414 exclude a specified period of time close to a reset or detected edge as a means of dynamically estimating noise similar to the method taught in US Pat. No. 5,339,283 to Mott. Maintain a moving total of 16 entries with a negative single sample difference in the ADC data. Specifically, negative and positive excursions should be statistically equal in the absence of resets and edges from X-rays, but the average of positive excursions is an undetected very low energy X. May be biased upwards by the line.

Lines 415 and 416 travel in parallel through all the samples in the captured waveform from the preamp 101. In the FPGA embodiment, the processing loop operates continuously in real time and is initialized only when the power is turned on, so that it is not necessary to handle boundary conditions at the beginning and end of the file segment.

FIG. 8 is on the sensor as described by P. Lechner et al., "Silicon drift detectors for high resolution room temperature X-ray spectroscopy", Nucl.Instr.andMeth.1996; A 377, pp.346-351. Typical for SDDs with the following properties incorporated within the lithography: (i) an active region of about 10 mm2 and (ii) a first field effect transistor (FFT) stage of the preamplifier 101. Pulse vs. decomposition time and energy detection thresholds are used to summarize the expected pile-up performance of the overall system. The specific numbers listed are not universal, but vary with different detector types and structures. However, these numbers reasonably represent the actual performance measured on a small sample of the detector.

The upper waveform trajectory is an ideal representation of the waveform segment from the preamplifier 101 and illustrates some pile-up situations. The right end is an enlarged view of a very low energy X-ray step. The arrows indicate the positions of the various steps. A very large step is a close pile-up within the rise time range of the step from a single X-ray that can be detected solely by the methods of the invention, as shown in FIG. 7B.

Below the waveform trajectory are, in turn, expected detection signals from various pile-up and edge detection logic blocks, along with expected ranges of these pulse pair decomposition times and energy thresholds. The peak detection filter 107, which was incorrectly reported by the fast pile-up logic 105, detects all edges except the spikes at point S when the output of the peak detection filter 107 does not exceed the threshold and is therefore removed. The best decomposition time for very low energy X-rays may be about 350-400 nanoseconds for a minimum detectable energy of 200 eV. If the lower detection threshold is required for, for example, 185 eV boron, or even 109 eV beryllium, the integration time will need to be longer and the decomposition time will increase substantially. .. However, the peak detection filter detects very low energy X-rays at the right end, which are missed by all other logical blocks.

The fast pile-up logic 105 has a best degradation time of 50 to 100 nanoseconds, depending on the rise time of the detector. The single-step method described herein is effective above about 2.5 keV energy, while the continuous run method described herein can reach on the order of 600-900 eV. High-speed pile-up logic misses low-energy X-rays at time point L.

Same as the fast pile-up logic 105, but acting on the averaged data in the filter averager 104 at the lower effective rate, the slow pile-up 106 skillfully detects X-rays of moderately low energy in L. However, it has a best degradation time of 80-200 nanoseconds, which is approximately twice as long. The slow pile-up single-step method can detect X-rays that have dropped to just 2 keV, and the slow pile-up continuous run method can detect 500 eV oxygen X-rays with excellent efficiency.

Overall, these results are about two to five times better than the degradation times shown by existing systems using prior art methods, depending on the energy pair under consideration.

Although preferred embodiments of the invention have been described and illustrated as described above, it should be understood that these preferred embodiments are exemplary of the invention and should not be considered as limitations. Additions, deletions, replacements, and other modifications can be made without departing from the spirit or scope of the invention. Therefore, the invention should not be regarded as being limited by the above description, but is limited only by the claims.