Information processing device, power control method, and program

The present invention relates to an information processing device, a power supply control method, and a program.

In the near future, various information processing devices such as PCs (Personal Computers), mobile phones and game machines have become widespread. These information processing devices include a CPU (central processing unit) and a memory, and the CPU uses the memory as a work area to execute an OS (Operating System), an application program, and the like.

In addition, with the widespread use of portable information processing devices, technologies related to reducing the power consumption of information processing devices are attracting attention. For example, a suspended state and a hibernation state are known as power saving states for reducing power consumption when the information processing device is not in use.

The suspend state is a state in which the power consumption of the entire device is reduced by turning off or stopping devices such as a CPU, an HDD (Hard Disk Drive), and an LCD (Liquid Crystal Display) while holding data in a memory. .. In this suspended state, since the data is held in the memory as described above, the information processing apparatus can quickly return from the suspended state to the normal operating state. However, in the suspended state, power is consumed for the memory to self-refresh. The refresh operation is described in, for example, Patent Document 1.

On the other hand, in the hibernation state, the memory data is saved in a non-volatile memory such as an HDD, so that the memory is turned off or stopped in addition to the devices such as the CPU, HDD, and LCD. In this hibernation state, the power of the information processing device can be completely turned off, so that there is an advantage that the power consumption can be further reduced as compared with the suspend state. However, since the memory data is saved in a non-volatile memory such as an HDD , it takes more time to return from the hibernation state to the normal operation state than to return from the suspend state to the normal operation state.

<p><patcit num="1"><text>Japanese Unexamined Patent Publication No. 2004-171660</text></patcit></p>

<p num="0007"> Here, it is general that the OS determines the transition from the normal state to the power saving state, and the BIOS (Basic Input Output System) determines the power supply of the CPU and the memory based on the determination by the OS.</p><p num="0008"> However, although the BIOS can control the memory configuration, the memory controller, the peripheral circuits, and the like, it does not know the arrangement of the programs and data managed by the OS on the memory. Therefore, since the BIOS controls the entire memory to self-refresh at the time of transition to the suspend state, power may be unnecessarily consumed in the memory. Further, when the BIOS controls the transition to the hibernation state, it is generally controlled so that the data of the entire memory is saved in the non-volatile memory, so that the time required for the transition to the hibernation state and the recovery from the hibernation state becomes longer. There was a problem that it would end up.</p><p num="0009"> Therefore, the present invention has been made in view of the above problems, and an object of the present invention is that the BIOS can control the power supply by referring to the arrangement information of the data stored in the memory. , To provide new and improved information processing equipment, power control methods, and programs.</p>

<p num="0010"> In order to solve the above problems, according to a certain viewpoint of the present invention, the memory, the OS for acquiring the allocation information of the data held in the memory, and the allocation information acquired by the OS are referred to. , The BIOS that controls the power supply to shift the memory to the power saving state, An information processing device comprising the above is provided.</p><p num="0011"> The memory is composed of a plurality of memory areas, and the BIOS may have a memory state control unit that controls the power supply of the memory for each of the plurality of memory areas.</p><p num="0012"> The memory state control unit controls the memory area in which the holding data to be held in the power saving state exists among the plurality of memory areas so as to perform self-refresh, and the other memory areas. Alternatively, it may be controlled not to perform self-refreshing.</p><p num="0013"> The BIOS has an arrangement changing unit that changes the arrangement of the holding data so as to reduce the number of memory areas for holding the holding data by referring to the arrangement information acquired by the OS. The memory state control unit may control the power supply of the memory based on the arrangement of the holding data after the arrangement change by the arrangement change unit.</p><p num="0014"> The BIOS has a compression unit that compresses the holding data, and the memory state control unit arranges the holding data after both the arrangement change by the arrangement change unit and the data compression by the compression unit. The power supply control of the memory may be performed based on the above.</p><p num="0015"> The memory state control unit controls the power supply for returning the memory from the power saving state, and the arrangement changing unit arranges the holding data in the power saving state when returning from the power saving state. It may be changed to the arrangement before the transition to.</p><p num="0016"> The OS acquires a layout changing unit that changes the layout of the holding data so that the number of memory areas that hold the holding data decreases, and a layout information of the data after the layout change by the layout changing unit. It may have a data arrangement investigation unit.</p><p num="0017"> The OS has a compression unit that compresses the holding data, and the data arrangement investigation unit acquires data arrangement information after both the arrangement change by the arrangement change unit and the data compression by the compression unit. You may.</p><p num="0018"> The memory state control unit controls the power supply for returning the memory from the power saving state, and the arrangement changing unit arranges the holding data in the power saving state when returning from the power saving state. It may be changed to the arrangement before the transition to.</p><p num="0019"> The information processing device further includes a non-volatile storage medium, and the BIOS records the holding data held in the power saving state in the non-volatile storage medium by using the arrangement information acquired by the OS. It may have a recording control unit for the purpose and a memory state control unit for stopping the power supply to the memory and shifting the memory to the power saving state.</p><p num="0020"> The BIOS has an arrangement changing unit that concentrates the holding data in a part of the memory with reference to the arrangement information acquired by the OS, and the recording control unit has the memory by the arrangement changing unit. Control for recording the holding data concentrated on a part of the non-volatile storage medium may be performed.</p><p num="0021"> The BIOS has a compression unit that compresses the holding data, and the recording control unit records the holding data after processing by the arrangement changing unit and the compression unit in the non-volatile storage medium. Control may be performed.</p><p num="0022"> The memory state control unit controls the power supply for returning the memory from the power saving state, and the arrangement changing unit arranges the holding data in the power saving state when returning from the power saving state. It may be changed to the arrangement before the transition to.</p><p num="0023"> The OS may have an arrangement change unit that concentrates the holding data in a part of the memory, and a data arrangement investigation unit that acquires the arrangement information of the data after processing by the arrangement change unit.</p><p num="0024"> The OS has a compression unit that compresses the holding data, and the data arrangement investigation unit may acquire the arrangement information of the data after processing by the arrangement change unit and the compression unit.</p><p num="0025"> The arrangement information may include information indicating the arrangement position of each data in the memory and information indicating whether or not each of the data is the holding data.</p><p num="0026"> The BIOS further includes a flag setting unit for setting a flag indicating that the BIOS has a function of performing power supply control based on the arrangement information, and the OS has the arrangement information when the flag is set by the BIOS. May be obtained.</p><p num="0027"> The OS further includes a flag setting unit for setting a flag indicating whether or not the arrangement information has been acquired at the time of transition to the power saving state, and the BIOS has the case where the flag is set by the OS. Power supply control may be performed based on the arrangement information.</p><p num="0028"> Further, in order to solve the above problems, according to another viewpoint of the present invention, there is a step in which the OS acquires the arrangement information of the data held in the memory provided in the information processing apparatus, and the step of acquiring the data by the OS. A power supply control method including a step in which the BIOS performs power supply control for transitioning the memory to the power saving state with reference to the arrangement information is provided.</p><p num="0029"> Further, in order to solve the above problems, according to another viewpoint of the present invention, a step in which the OS acquires the arrangement information of the data held in the memory in the computer and the arrangement information acquired by the OS. With reference to, a program for executing a step in which the BIOS performs power control for transitioning the memory to the power saving state and a program for executing the step are provided.</p>

<p num="0030"> As described above, according to the present invention, the BIOS can control the power supply by referring to the arrangement information of the data held in the memory.</p>

<figref num="1">It is explanatory drawing which showed the appearance of the information processing apparatus by embodiment of this invention.</figref><figref num="2">It is explanatory drawing which showed the internal structure of an information processing apparatus.</figref><figref num="3">It is explanatory drawing which showed each operation state of an information processing apparatus.</figref><figref num="4">It is explanatory drawing which showed the function implemented in the OS and BIOS by 1st Embodiment.</figref><figref num="5">It is explanatory drawing which showed the structural example of FACS by this Embodiment.</figref><figref num="6">It is explanatory drawing which showed the content of the Preservation Map Address.</figref><figref num="7">It is explanatory drawing which showed the specific example of the Preservation Map created by the Preservation Map creation part.</figref><figref num="8">It is explanatory drawing which showed the modification of the Preservation Map created by the Preservation Map creation part.</figref><figref num="9">It is explanatory drawing which showed the specific example of the processing performed at the time of transition to a suspend state.</figref><figref num="10">It is a flowchart which showed the operation of the BIOS at the time of starting the information processing apparatus 1.</figref><figref num="11">It is a flowchart which showed the operation by the OS at the time of transition to a suspend state.</figref><figref num="12">It is a flowchart which showed the operation by BIOS at the time of transition to a suspend state.</figref><figref num="13">It is a flowchart which showed the operation by BIOS at the time of returning from a suspended state to a normal operation state.</figref><figref num="14">It is a sequence diagram which showed a series of operations by OS and BIOS.</figref><figref num="15">It is explanatory drawing which showed the function implemented in OS and BIOS by 2nd Embodiment.</figref><figref num="16">It is a flowchart which showed the operation by the OS at the time of transition to a suspend state.</figref><figref num="17">It is a flowchart which showed the operation by BIOS at the time of transition to a suspend state.</figref><figref num="18">It is explanatory drawing which showed the function implemented in the OS and BIOS by the 3rd Embodiment.</figref><figref num="19">It is explanatory drawing which showed the specific example of the processing performed at the time of transition to a hibernation state.</figref><figref num="20">It is a flowchart which showed the operation by BIOS at the time of transition to a hibernation state.</figref><figref num="21">It is explanatory drawing which showed the function implemented in OS and BIOS by 4th Embodiment.</figref><figref num="22">It is a flowchart which showed the operation by BIOS at the time of transition to a hibernation state.</figref>

Embodiments of the present invention will be described in detail below with reference to the accompanying drawings. In the present specification and the drawings, components having substantially the same functional configuration are designated by the same reference numerals, so that duplicate description will be omitted.

Further, in the present specification and the drawings, a plurality of components having substantially the same functional configuration may be distinguished by adding different alphabets after the same reference numerals. However, if it is not necessary to distinguish each of the plurality of components having substantially the same functional configuration, only the same reference numerals are given.

In addition, the "mode for carrying out the invention" will be described in accordance with the order of items shown below. 1. 1. Basic configuration of information processing device 2. 2. First Embodiment 2-1. Functions of OS and BIOS according to the first embodiment 2-2. Operation of OS and BIOS according to the first embodiment 3. 3. Second embodiment 3-1. Functions of OS and BIOS according to the second embodiment 3-2. Operation of OS and BIOS according to the second embodiment 4. Third Embodiment 4-1. Functions of OS and BIOS according to the third embodiment 4-2. Operation of BIOS according to the third embodiment 5. Fourth Embodiment 5-1. Functions of OS and BIOS according to the fourth embodiment 5-2. Operation of BIOS according to the fourth embodiment 6. Summary

&lt;1. Basic configuration of information processing device&gt; The present invention is implemented in various forms as described in detail in "2. First Embodiment" to "5. Fourth Embodiment" as an example. Further, the information processing apparatus according to each embodiment refers to the memory, the OS that acquires the Preservation Map, which is the arrangement information of the data held in the memory, and the Preservation Map, and causes the memory to be in a suspended state or a hibernation state. Includes a BIOS that controls the power supply for transitioning to the power saving state. In the following, first, a basic configuration common to the information processing devices according to each of the embodiments will be described with reference to FIGS. 1 to 3.

(Appearance of information processing device) FIG. 1 is an explanatory diagram showing the appearance of the information processing apparatus 1 according to the embodiment of the present invention. As shown in FIG. 1, the information processing apparatus 1 according to the embodiment of the present invention includes a main body 10, a keyboard 12, a power switch 14, a transition switch 16, and an LCD 18. Although a PC (Personal Computer) is shown as an example of the information processing device 1 in FIG. 1, the information processing device 1 is not limited to the PC. For example, the information processing device 1 includes a home video processing device (DVD recorder, VCR, etc.), a PDA (Personal Digital Assistants), a home game device, a home appliance, a mobile phone, a portable music playback device, and a portable video processing device. It may be a device, a portable game device, or the like.

The main body 10 is a housing for storing hardware such as a CPU 20, a memory 26, and an HDD 28, which will be described later with reference to FIG. The keyboard 12, the power switch 14, and the transition switch 16 are provided on the main body 10.

The keyboard 12 detects an input operation of information or an instruction by the user. The power switch 14 and the transition switch 16 are buttons pressed by the user. The information processing device 1 starts the operation when the power switch 14 is pressed by the user, and shifts the operating state when the transition switch 16 is pressed by the user. The operating state includes a normal operating state, a suspended state, a hibernation state, a shutdown state, and the like, as will be described later with reference to FIG. Further, the trigger for the information processing apparatus 1 to transition the operating state is not limited to the case where the transition switch 16 is pressed by the user. For example, the information processing apparatus 1 may shift the operating state to the suspend state when the user operation is not detected for a long time during the normal operating state.

The LCD 18 functions as a display unit that displays the display screen generated by the information processing device 1. The LCD 18 is merely exemplified as an example of the display unit, and the display unit may be a CRT (Cathode Ray Tube) display device or an OLED (Organic Light Emitting Diode) device.

The appearance configuration of the information processing apparatus 1 has been described above with reference to FIG. Subsequently, the internal configuration of the information processing apparatus 1 will be described with reference to FIG.

(Internal configuration of information processing device) FIG. 2 is an explanatory diagram showing the internal configuration of the information processing device 1. As shown in FIG. 2, the information processing device 1 includes a CPU 20, a BIOS-ROM 22, a memory controller 24, a plurality of memory buses 25, a memory 26, an HDD 28, a secondary battery 30, and a power controller 32. And.

The CPU 20 is a main processor that controls the information processing device 1, and executes an OS or an application program read from the HDD 28 into the memory 26. Further, the CPU 20 executes the BIOS read from the BIOS-ROM 22 into the memory 26.

The BIOS-ROM 22 is a non-volatile memory that stores the BIOS for execution by the CPU 20. The BIOS has a function (program group) for controlling hardware such as a keyboard 12, a memory controller 24, and an HDD 28 in the information processing device 1. Further, the BIOS has a function of controlling the power supply to each hardware at the time of transition of the operating state of the information processing device 1. The power supply control by the BIOS will be described in detail in "2. First Embodiment" to "5. Fourth Embodiment".

The memory controller 24 controls writing data to the memory 26, reading data from the memory 26, and the like according to instructions from the CPU 20. Here, for the memory 26, for example, a DRAM whose operating principle is to store 1-bit information depending on the presence or absence of electric charge of the capacitor is used. Also, the charge in the capacitor is lost over time. Therefore, during normal operation, the memory controller 24 controls a refresh operation in which the electric charge of each capacitor in the memory 26 is periodically recharged.

The memory 26 is a volatile memory used as a work area by the CPU 20. Since the memory 26 is connected to the memory controller 24 by a plurality of memory buses 25 as shown in FIG. 2, a plurality of series of data can be input / output in parallel.

Further, the memory 26 is composed of a plurality of memory areas in which the power supply state can be controlled independently. Examples of the unit of the memory area include a channel which is an area corresponding to one memory bus, a rank or a bank which is an area smaller than the channel, and the like. For example, when the memory 26 is composed of the channel A and the channel B, it is possible to control so that the power is supplied to the channel A and the power is not supplied to the channel B.

The HDD 28 is a magnetic storage device, and stores an OS, various application programs, and the like for execution by the CPU 20. The HDD 28 is described only as an example of the non-volatile memory, and the non-volatile memory provided in the information processing device 1 is not limited to the HDD 28.

The secondary battery 30 is a battery that supplies power necessary for operating each hardware of the information processing device 1. When the information processing device 1 is connected to the AC adapter, the information processing device 1 can also operate based on the power supply supplied from the AC adapter.

When instructed by the CPU 20, the power controller 32 takes the instruction into consideration and controls the power supply to the hardware such as the CPU 20, the memory 26, and the LCD 18. Hereinafter, the power supply control performed by the power supply controller 32 in each operating state of the information processing device 1 will be described with reference to FIG.

(State transition of information processing device) FIG. 3 is an explanatory diagram showing each operating state of the information processing device 1. As shown in FIG. 3, examples of the operating state of the information processing apparatus 1 include a shutdown state ST1, a normal operating state ST2, a suspend state ST3, and a hibernation state ST4.

In the shutdown state ST1, as shown in FIG. 3, the power controller 32 does not supply power to the memory 26, the CPU 20, and the like (power off). When the information processing device 1 transitions to the normal operating state ST2 by pressing the power switch 14 in the shutdown state ST1, the power controller 32 starts supplying power to the memory 26, the CPU 20, and the like as shown in FIG. 3 (power supply). on).

After that, when the information processing device 1 transitions to the suspend state ST3, the power controller 32 stops supplying power to the CPU 20. On the other hand, the power controller 32 continues to supply power to the memory 26 so that the memory 26 can self-refresh according to the control from the memory controller 24. Here, the power controller 32 can control the power supply to the memory 26 for each memory area. For example, the power controller 32 can supply power to a part of the memory areas of the memory 26 and stop the power supply to the other memory areas according to the instruction from the CPU 20 (BIOS). The memory 26 can self-refresh in the memory area to which power is supplied according to the control from the memory controller 24.

This suspended state ST3 is useful in that power consumption is suppressed as compared with the normal operating state ST2 and that the return time to the normal operating state ST2 is shorter than that of the hibernation state ST4.

Further, when the information processing device 1 transitions to the hibernation state ST4, the power controller 32 stops supplying power to the CPU 20 and the memory 26. Here, the data held in the memory 26 is saved in the HDD 28 by the CPU 20. Therefore, in the hibernation state ST4, the return time to the normal operation state ST2 is longer than that in the suspend state ST3, but since the power supply to the memory 26 is stopped, the power consumption is further suppressed as compared with the suspend state ST3. Useful in terms of points.

(History leading to the embodiment of the present invention) Here, it is common that the OS determines the transition from the normal state ST2 to the power saving state such as the suspend state ST3 or the hibernation state ST4, and the BIOS performs the power control of the CPU 20 and the memory 26 based on the judgment by the OS. Is the target.

However, although a general BIOS can control the configuration of the memory 26, the memory controller 24, peripheral circuits, and the like, it does not know the arrangement of programs, data, and the like managed by the OS on the memory.

Therefore, although the general BIOS has a function of controlling the power supply for each memory area, the entire memory 26 is controlled to self-refresh at the transition to the suspend state ST3, so that the power is unnecessary in the memory 26. It was sometimes consumed.

Further, when the BIOS controls the transition to the hibernation state, it is generally controlled so that the data of the entire memory 26 is saved in the HDD 28 at the time of the transition to the hibernation state ST4. Therefore, the transition to the hibernation state ST4 and the transition from the hibernation state ST4 to the hibernation state ST4. There was a problem that the time required for the return of the product would be prolonged.

Therefore, the embodiment of the present invention has been created with the above circumstances as the first point of view. According to the first and second embodiments of the present invention, power consumption is further reduced by causing some memory areas to self-refresh in the suspended state and stopping power supply to other memory areas. It is possible. Further, according to the third and fourth embodiments of the present invention, by selectively saving the data held in the memory 26 in the hibernation state to the HDD 28, the transition to the hibernation state and the return from the hibernation state are performed. It is possible to reduce the time required for. Hereinafter, each such embodiment will be described in detail.

&lt;2. First Embodiment&gt; [2-1. Functions of OS and BIOS according to the first embodiment] FIG. 4 is an explanatory diagram showing the functions implemented in the OS 100 and the BIOS 200 according to the first embodiment. As shown in FIG. 4, the OS 100 has a FACS (Firmware ACPI Control Control) management unit 110, a state transition control unit 120, a data arrangement investigation unit 130, and a Preservation Map creation unit 140.

The FACS management unit 110 (flag setting unit) manages the FACS used for interaction with the BIOS200. The FACS in the present embodiment is an extension of the FACS defined by ACPI (Advanced Configuration and Power Management Interface), which is a public standard for power control and components of a personal computer. Here, with reference to FIG. 5, a configuration example of FACS according to the present embodiment will be described.

FIG. 5 is an explanatory diagram showing a configuration example of FACS according to the present embodiment. As shown in FIG. 5.

The contents of Flags and OSPM Flags and the Preservation Map Addless in the above configuration example are new configurations. Specifically, the Flags include the flag PRESSERVATION_MAP_SUPPORTED_F, as shown in FIG. This PRESERVATION_MAP_SUPPORTED_F is a flag indicating whether or not the BIOS 200 has a function of performing power supply control based on the Preservation Map described later. PRESERVATION_MAP_SUPPORTED_F is set by the BIOS 200 when the information processing apparatus 1 is started.

Also, the OSPM Flags include the PRESSERVATION_MAP_F flag, as shown in FIG. This PRESERVATION_MAP_F is a flag indicating whether or not the OS 100 has created a Preservation Map and stored the address of the Preservation Map in the Preservation Map Address. The FACS management unit 110 sets PRESSERVATION_MAP_F by triggering the creation of a Preservation Map or the like at the time of transition from the normal state to the power saving state such as the suspend state or the hibernation state.

In ACPI, the Reserved region of Flags and OSPM Flags is defined as "0". Therefore, if the OS does not have the function to create the Preservation Map, or if the BIOS200 does not have the function to control the power supply based on the Preservation Map, the Flags or OSPM Flags do not have the function or are invalid. Is guaranteed to be. For example, if the BIOS does not have the function for power supply control and the OS has a function to create a Preservation Map, the PRESSERVATION_MAP_SUPPORTED_F is "0", so that the OS can determine that the BIOS does not have the function. On the other hand, if the BIOS has the above-mentioned power supply control function and the OS does not have the Preservation Map creation function or the like, the PRESERVATION_MAP_F becomes "0", so that the BIOS is the Preservation. Do not refer to Map. As described above, by using the FACS according to the present embodiment, the normal operation of the information processing apparatus 1 is guaranteed even when either the BIOS or the OS does not have the above function. Further, no additional implementation is required to show that the OS does not have the function for creating the Preservation Map and that the BIOS does not have the function for power control.

Further, the Preservation Map Addless will be described with reference to FIG.

FIG. 6 is an explanatory diagram showing the contents of the Preservation Map Address. As shown in FIG. 6, in the Preservation Map Addless included in the FACS, address information indicating the position of the Preservation Map created by the Preservation Map creation unit 140 is described in the memory 26. Therefore, it is possible to refer to the Preservation Map based on the Preservation Map Addless.

Here, returning to the description of the configuration of the OS 100 with reference to FIG. 4, the state transition control unit 120 determines the state transition of the information processing device 1 and performs preparatory processing for the state transition. For example, the state transition control unit 120 may determine whether or not to transition the operating state based on whether or not the transition switch 16 is pressed by the user, or based on the usage status of the information processing device 1 by the user. May be decided. More specifically, the state transition control unit 120 may determine the transition from the normal operating state to the suspended state or the hibernation state when the information processing device 1 is not used by the user for a predetermined time.

Further, as the preparatory processing at the time of suspend transition (at the time of transition to the suspend state) by the state transition control unit 120, notification of the suspend transition to the driver / application, storage of the device register, device power control, Wake setting, interrupt prohibition are performed. , Bus master transfer prohibition, etc.

When the state transition control unit 120 determines the transition from the normal operation state to the suspend state, the data arrangement investigation unit 130 investigates the arrangement of the data held in the memory 26. Further, the data arrangement investigation unit 130 investigates whether or not each data is the required data (retention data) to be retained in the memory 26 in the suspended state.

Here, since the above-mentioned investigation is performed for the creation of the Preservation Map, if the BIOS200 does not have the function of performing the power supply control based on the Preservation Map, the investigation becomes an unnecessary process. Therefore, the data arrangement investigation unit 130 may refer to the FACS and perform the above investigation when PRESSERVATION_MAP_SUPPORTED_F is set by the BIOS.

The Preservation Map creation unit 140 creates a Preservation Map (arrangement information) based on the survey results by the data allocation survey unit 130. This Preservation Map is information indicating the arrangement position and attribute (whether or not the data needs to be retained) of each data held in the memory 26. Hereinafter, a specific example of such a Preservation Map will be described.

FIG. 7 is an explanatory diagram showing a specific example of the Preservation Map created by the Preservation Map creation unit 140. As shown in FIG. 7, each entry in the Preservation Map contains information about the address, size, and attributes. For example, since the data of size L1 starting from the address A1 is the data that needs to be retained under OS management, the Preservation Map creation unit 140 describes it as "necessary" as an attribute of the data.

Here, the data to be retained under OS management includes, for example, OS100 programs, application programs, application data, and the like. On the other hand, the data requiring disk cache does not have to be included in the data requiring retention.

Further, since the data of size L5 starting from the address A5 is a management area by BIOS200 and the necessity of holding cannot be determined on the OS100 side, the Preservation Map creation unit 140 describes "reserved" as an attribute of the data. To do.

In FIG. 7, an example in which the Preservation Map includes the arrangement information of all the data on the memory 26 has been described, but the Preservation Map is not limited to such an example. For example, as shown in FIG. 8, the Preservation Map includes the information of the OS management area and does not have to include the information of the BIOS management area.

At the time of the suspend transition, the OS 100 notifies the BIOS 200 of the suspend transition when the preparation process on the OS 100 side such as the creation of the Preservation Map by the Preservation Map creation unit 140 is completed.

Here, the description of the function of the BIOS 200 will be returned with reference to FIG. As shown in FIG. 4, the BIOS 200 has a FACS management unit 210, a data rearrangement unit 220, a data compression unit 230, a memory state control unit 240, and a data expansion unit 250.

The FACS management unit 210 (flag setting unit) manages the FACS used for interaction with the OS 100. For example, the FACS management unit 210 sets a flag in PRESSERVATION_MAP_SUPPORTED_F during FACS when the information processing device 1 is started because the BIOS 200 supports power supply control based on the Preservation Map.

The data rearrangement unit 220 (arrangement change unit) changes the data arrangement in the memory 26 at the time of transition from the normal operation state to the suspend state or at the time of returning from the suspend state to the normal operation state.

Specifically, the data rearrangement unit 220 confirms FACS PRESERVATION_MAP_F at the time of transition from the normal operation state to the suspend state. Then, when the flag is set in PRESERVATION_MAP_F, that is, when the Preservation Map is created by the OS 100 and the Address of the Preservation Map is stored in the Preservation Map Address, the data relocation unit 220 confirms the Preservation Map.

Subsequently, the data relocation unit 220 refers to the Preservation Map based on the Preservation Map Adress, and changes the arrangement of the retained data so that the number of memory areas for retaining the retained data in the memory 26 is reduced (required). Defragmentation of retained data).

Further, the data rearrangement unit 220 changes the arrangement of the data requiring retention in the memory 26 so as to be the same as before the transition to the suspend state when returning from the suspend state to the normal operation state. For this reason, the data rearrangement unit 220 may hold the contents of the arrangement change made at the time of transition from the normal operation state to the suspend state.

The data compression unit 230 compresses the data requiring holding at the transition from the normal operation state to the suspend state. In this specification, an example in which the retention-required data is compressed after the arrangement change by the data rearrangement unit 220 will be described, but the retention-required data may be compressed before the arrangement change by the data rearrangement unit 220. ..

The memory state control unit 240 controls the power of the memory 26 for each memory area by issuing an instruction to the memory controller 24 and the power controller 32 after the processing by the data rearrangement unit 220 and the data compression unit 230.

Specifically, the memory state control unit 240 controls the memory area in which the retained data exists among the plurality of memory areas constituting the memory 26 so as to perform self-refresh, and the other memory areas. Is controlled not to perform self-refresh. That is, the memory state control unit 240 instructs the memory controller 24 or the power controller 32 to stop the power supply to the memory area where the retained data does not exist.

The data expansion unit 250 expands the data compressed by the data compression unit 230 when returning from the suspend state to the normal operation state.

With the above configuration, in the suspended state, it is possible to perform self-refreshing not only in the entire memory 26 but only in the memory area where the retained data is held in the memory 26, so that it is possible to reduce the power consumption. is there. Hereinafter, the processing by the data rearrangement unit 220, the data compression unit 230, and the memory state control unit 240 will be described more specifically with reference to FIG.

FIG. 9 is an explanatory diagram showing a specific example of the processing performed at the time of transition to the suspend state. When the data to be retained is distributed and arranged in channels A and B on the memory 26 as shown in the left part of FIG. 9, the data relocation unit 220 is required as shown in the middle part of FIG. The arrangement of each required data is changed so that the retained data is concentrated in a part of the memory 26.

Further, the data compression unit 230 compresses the data requiring retention as shown in the right part of FIG. As a result, when the data requiring retention exists only in the channel A as shown in the right part of FIG. 9, the memory state control unit 240 controls the channel A to perform self-refresh. On the other hand, the memory state control unit 240 stops the power supply to the channel B to the power controller 32 and turns off the channel B. With such a configuration, it is possible to significantly reduce the power consumption of the memory 26 in the suspended state.

Further, when returning from the suspend state to the normal operation state, as shown in the middle part of FIG. 9, the data expansion unit 250 expands the compressed data requiring retention held in the memory 26. Further, the data rearrangement unit 220 changes the arrangement of the data requiring retention in the memory 26 so that the arrangement is the same as before the transition to the suspend state. With such a configuration, the arrangement of the data to be retained in the memory 26 can be returned to the data arrangement as grasped by the OS 100, so that the information processing apparatus 1 can normally return to the normal operating state. ..

[2-2. Operation of OS and BIOS according to the first embodiment] The functions of the OS and the BIOS according to the first embodiment have been described above. Subsequently, the operation of the OS and the BIOS according to the first embodiment will be described with reference to FIGS. 10 to 14.

(Operation of BIOS200 at startup) FIG. 10 is a flowchart showing the operation of the BIOS 200 when the information processing device 1 is started. As shown in FIG. 10, the FACS management unit 210 of the BIOS 200 first creates a FACS (S304).

Further, the FACS management unit 210 sets a flag in PRESSERVATION_MAP_SUPPORTED_F in FACS (S308). After that, the BIOS 200 sets a trap for the transition to the suspend state (S312). It should be noted that such an operation at the time of activation by BIOS200 is also applied to the second to fourth embodiments.

(OS100 operation during suspend transition) FIG. 11 is a flowchart showing the operation by the OS 100 at the time of transition to the suspend state. As shown in FIG. 11, when the OS 100 uses the Preservation Map function (S404), the data placement investigation unit 130 confirms PRESSERVATION_MAP_SUPPORTED_F in FACS (S408).

Then, when the flag is set in PRESERVATION_MAP_SUPPORTED_F in FACS (S412), the data arrangement investigation unit 130 investigates the data arrangement on the memory 26 (S416).

After that, the Preservation Map creation unit 140 creates the Preservation Map described with reference to FIG. 8 based on the investigation result by the data arrangement investigation unit 130 (S420).

Further, the FACS management unit 110 describes the address information of the Preservation Map in the Preservation Map Address during FACS (S424). Further, the FACS management unit 110 sets a flag in PRESSERVATION_MAP_F in FACS (S428). After that, the transition from the OS 100 to the BIOS 200 is notified of the transition to the suspend state.

On the other hand, there may be a case where the OS 100 does not use the Preservation Map function (S404), or a case where the flag is not set in PRESERVATION_MAP_SUPPORTED_F (S412). In this case, the FACS management unit 110 clears PRESSERVATION_MAP_F in FACS (S432).

(Operation of BIOS200 at the time of suspend transition) FIG. 12 is a flowchart showing the operation by the BIOS 200 at the time of transition to the suspend state. As shown in FIG. 12, first, the data rearrangement unit 220 of the BIOS 200 confirms PRESSERVATION_MAP_F in FACS (S444).

Then, when the flag is set in PRESERVATION_MAP_F (S448), the data rearrangement unit 220 acquires the Preservation Map based on the Preservation Map Addless in FACS (S452).

After that, the data rearrangement unit 220 rearranges the data requiring retention, and the data compression unit 230 compresses the data requiring retention (S456).

Subsequently, the memory state control unit 240 controls the memory area in which the retained data exists among the plurality of memory areas constituting the memory 26 so as to perform self-refresh, and the other memory areas. Therefore, control is performed so that self-refreshing is not performed (S460). That is, the memory state control unit 240 instructs the power controller 32 to stop the power supply to the memory area where the retained data does not exist.

With such a configuration, in the suspended state, it is possible to perform self-refreshing not only in the entire memory 26 but only in the memory area in which the retained data is held in the memory 26, so that the power consumption can be reduced. ..

(Operation of BIOS200 when returning to the normal operating state) FIG. 13 is a flowchart showing the operation by the BIOS 200 at the time of returning from the suspended state to the normal operating state. As shown in FIG. 13, the memory state control unit 240 of the BIOS 200 restores the power supply of the memory by instructing the power controller 32 to restart the power supply to the entire memory 26 (S464).

After that, the data expansion unit 250 expands the compressed retained data in the memory 26, and the data rearrangement unit 220 arranges the retained data in the memory 26 in the same arrangement as before the transition to the suspend state. Change to (S468). With such a configuration, the arrangement of the data to be retained in the memory 26 can be returned to the data arrangement as grasped by the OS 100, so that the information processing apparatus 1 can normally return to the normal operating state. ..

(A series of operations by OS100 and BIOS200) FIG. 14 is a sequence diagram showing a series of operations by the OS 100 and the BIOS 200. First, when the state transition control unit 120 of the OS 100 determines the transition from the normal operation state to the suspend state (S504), the OS 100 performs a preparatory process for the transition to the suspend state (S508). Then, when the preparation process is completed, the OS 100 notifies the BIOS 200 of the transition to the suspend state (S512).

Here, the preparation process by the OS 100 includes the creation of the Preservation Map by the Preservation Map creation unit 140. Further, the preparation process by the OS 100 may include notification of suspend transition to the driver / application, storage of device registers, device power control, Wake setting, interrupt prohibition, bus master transfer prohibition, and the like.

After that, the BIOS 200 performs a preparatory process for the transition to the suspend state (S516). Then, when the preparation process is completed, the memory state control unit 240 controls the power supply of the memory 26 for each memory area, and shifts the information processing device 1 to the suspend state (S520).

Here, the preparation process by the BIOS 200 includes the arrangement change of the data requiring retention by the data rearrangement unit 220 using the Preservation Map. Further, the preparation process by the BIOS 200 may include device register storage, device power control, Wake setting, interrupt prohibition, bus master transfer prohibition, and the like.

After that, when a resume event occurs (S524), the BIOS 200 performs a preparatory process for returning to the normal operating state (S528). Here, the preparatory process by the BIOS 200 includes the rearrangement of the data requiring retention by the data rearrangement unit 220. Further, the preparation process by the BIOS 200 may include power control of the device, initialization of the device, restoration of the register of the device, confirmation of the Wake factor, and the like.

Then, when the preparatory process by the BIOS 200 is completed, jump to the Working Vector is performed (S532), the OS 100 performs the preparatory process for returning to the normal operating state (S536), and the returning to the normal operating state is completed. (S540).

Here, the preparatory process by the OS 100 may include device initialization, device register restoration, confirmation of Wake factors, return notification to the driver / application, and the like.

As described above, according to the first embodiment of the present invention, in the suspended state, it is possible to perform self-refreshing not only in the entire memory 26 but only in the memory area in which the retained data is held in the memory 26. Therefore, it is possible to reduce the power consumption.

&lt;3. Second embodiment&gt; Subsequently, a second embodiment of the present invention will be described. In the second embodiment of the present invention, as described below, the division of functions between the OS 100 and the BIOS 200 is different from that of the first embodiment, but as in the first embodiment, the power consumption in the suspended state is suppressed. It is possible.

[3-1. Functions of OS and BIOS according to the second embodiment] FIG. 15 is an explanatory diagram showing the functions implemented in the OS 100 and the BIOS 200 according to the second embodiment. As shown in FIG. 15, the OS 100 includes a FACS management unit 110, a state transition control unit 120, a data allocation investigation unit 130, a Preservation Map creation unit 140, a data relocation unit 150, a data compression unit 160, and a data expansion unit 170. Has. Since the configurations of the FACS management unit 110, the state transition control unit 120, and the Preservation Map creation unit 140 have been described in the first embodiment, the configurations different from those in the first embodiment will be mainly described below.

The data rearrangement unit 150 defragmentes the data held in the memory 26 when the state transition control unit 120 determines the transition from the normal operation state to the suspend state. When the data rearrangement unit 150 can grasp whether or not each data held in the memory 26 is the holding data, the holding data is reduced so that the number of memory areas holding the holding data is reduced. The arrangement of the data may be changed (defragmentation of data to be retained).

The data compression unit 160 compresses the data held in the memory 26 when the state transition control unit 120 determines the transition from the normal operation state to the suspend state. The data compression unit 160 may compress the data requiring retention when it is possible to grasp whether or not each data held in the memory 26 is the data requiring retention. Further, the context of the processing by the data rearrangement unit 150 and the processing by the data compression unit 160 is not particularly limited. Further, the data compressed by the data compression unit 160 is decompressed by the data expansion unit 170 when returning to the normal operating state.

The data arrangement investigation unit 130 investigates the arrangement of the data held in the memory 26 after the processing by the data arrangement unit 150 and the data compression unit 160. Further, the data arrangement investigation unit 130 investigates whether or not each data is required to be retained in the memory 26 in the suspended state.

The Preservation Map creation unit 140 creates a Preservation Map based on the survey results by the data arrangement survey unit 130, as in the first embodiment.

Further, as shown in FIG. 15, the BIOS 200 according to the second embodiment has a FACS management unit 210 and a memory state control unit 240.

The FACS management unit 210 manages the FACS used for interaction with the OS 100, as in the first embodiment. For example, the FACS management unit 210 sets a flag in PRESSERVATION_MAP_SUPPORTED_F during FACS when the information processing device 1 is started because the BIOS 200 supports power supply control based on the Preservation Map.

The memory state control unit 240 confirms FACS PRESERVATION_MAP_F at the time of transition from the normal operation state to the suspend state. Then, when the flag is set in PRESERVATION_MAP_F, that is, when the Preservation Map is created by the OS 100 and the Address of the Preservation Map is stored in the Preservation Map Address, the memory state control unit 240 confirms the Preservation Map.

Subsequently, the memory state control unit 240 refers to the Preservation Map based on the Preservation Map Addless, and determines the memory area in which the retained data exists and the memory area in which the retained data does not exist.

Then, among the plurality of memory areas constituting the memory 26, the memory area in which the retained data exists is controlled to be self-refreshed, and the other memory areas are not self-refreshed. To control. That is, the memory state control unit 240 instructs the power controller 32 to stop the power supply to the memory area where the retained data does not exist.

As in the second embodiment described above, it is also possible to change the data arrangement and compress the data on the OS100 side. Even in this case, it is possible to perform self-refreshing only in the memory area that holds the data to be retained in the memory 26, not the entire memory 26, so that the power consumption can be reduced as in the first embodiment. Is possible.

[3-2. Operation of OS and BIOS according to the second embodiment] FIG. 16 is a flowchart showing the operation by the OS 100 at the time of transition to the suspend state. As shown in FIG. 16, when the OS 100 uses the Preservation Map function (S604), the data rearrangement unit 150 or the data compression unit 160 confirms PRESSERVATION_MAP_SUPPORTED_F in FACS (S608).

Then, when the flag is set in PRESERVATION_MAP_SUPPORTED_F in FACS, the data rearrangement unit 150 and the data compression unit 160 perform processing such as rearrangement change and compression of the data held in the memory 26 (S612). S616).

After that, the data allocation investigation unit 130 investigates the data arrangement on the memory 26 (S620), and the Preservation Map creation unit 140 uses the Preservation Map described with reference to FIG. 8 based on the investigation result by the data arrangement investigation unit 130. Create (S624).

Further, the FACS management unit 110 describes the address information of the Preservation Map in the Preservation Map Address during FACS (S628). Further, the FACS management unit 110 sets a flag in PRESSERVATION_MAP_F in FACS (S632). After that, the transition from the OS 100 to the BIOS 200 is notified of the transition to the suspend state.

On the other hand, there may be a case where the OS 100 does not use the Preservation Map function (S604), or a case where the flag is not set in PRESERVATION_MAP_SUPPORTED_F (S612). In this case, the FACS management unit 110 clears PRESSERVATION_MAP_F in FACS (S636).

(Operation of BIOS200 at the time of suspend transition) FIG. 17 is a flowchart showing the operation by the BIOS 200 at the time of transition to the suspend state. As shown in FIG. 17, first, the memory state control unit 240 of the BIOS 200 confirms PRESSERVATION_MAP_F in FACS (S644).

Then, when the flag is set in PRESERVATION_MAP_F (S648), the memory state control unit 240 acquires the Preservation Map based on the Preservation Map Addless in FACS (S652).

Subsequently, the memory state control unit 240 controls the memory area in which the retained data exists among the plurality of memory areas constituting the memory 26 so as to perform self-refresh, and the other memory areas. Therefore, control is performed so that self-refreshing is not performed (S656). That is, the memory state control unit 240 instructs the memory controller 24 or the power controller 32 to stop the power supply to the memory area where the retained data does not exist.

With such a configuration, in the suspended state, it is possible to perform self-refreshing not only in the entire memory 26 but only in the memory area in which the retained data is held in the memory 26, so that the power consumption can be reduced. ..

&lt;4. Third Embodiment&gt; Next, a third embodiment of the present invention will be described. The third embodiment of the present invention differs from the first and second embodiments relating to the transition to the hibernation state in that it relates to the processing at the time of transition to the hibernation state.

[4-1. Functions of OS and BIOS according to the third embodiment] FIG. 18 is an explanatory diagram showing the functions implemented in the OS 100 and the BIOS 200 according to the third embodiment. As shown in FIG. 18, the OS 100 has a FACS management unit 110, a state transition control unit 120, a data arrangement investigation unit 130, and a Preservation Map creation unit 140.

Such an OS 100 also creates a Preservation Map at the time of transition to the hibernation state, as in the first embodiment. That is, when the state transition control unit 120 determines the transition to the hibernation state, the data arrangement investigation unit 130 investigates the data arrangement of the memory 26, and the presentation map creation unit 140 creates the presentation map. Even if the state transition control unit 120 determines the transition to the suspend state, the BIOS 200 may execute the transition to the hibernation state. In the present embodiment, even when the transition to the suspend state is determined by the state transition control unit 120 in this way, the Preservation Map creation unit 140 creates the Preservation Map, so that the BIOS 200 refers to the Preservation Map and is in the hibernation state. It is possible to perform a transition to.

Further, as shown in FIG. 18, the BIOS 200 has a FACS management unit 210, a data rearrangement unit 220, a data compression unit 230, a memory state control unit 240, a data expansion unit 250, and an HDD driver 260.

Similar to the first embodiment, the data rearrangement unit 220 and the data compression unit 230 change the arrangement and compress the data to be retained on the memory 26 with reference to the Preservation Map. Further, the data rearrangement unit 220 and the data expansion unit 250 expand and rearrange the data requiring retention when returning to the normal operation state, as in the first embodiment.

The HDD driver 260 saves the data requiring retention on the memory 26 after being processed by the data rearrangement unit 220 and the data compression unit 230 into the HDD 28. Further, the HDD driver 260 returns the retained data saved in the HDD 28 to the memory 26 when returning to the normal operating state. Here, since the amount of data requiring retention to be saved in the HDD 28 is reduced by compression by the data compression unit 230, the time for saving and the time for returning the data requiring retention to the memory 26 should be reduced. Can be done.

Further, data is written to the HDD 28 in a predetermined amount of data units (for example, 512 Kbytes). Therefore, if the retained data is dispersed and the amount of each retained data is less than a predetermined amount, a blank portion is generated in the HDD 28. For example, when a certain data to be retained is 100 Kbytes, a blank portion corresponding to 412 Kbytes is generated in the HDD 28.

Regarding this point, in the present embodiment, since the data relocation unit 220 defragmentates the data requiring retention, the data requiring retention is centrally arranged in a part of the memory 26. As a result, it is possible to prevent the above-mentioned problems and efficiently save the data requiring retention to the HDD 28.

The memory state control unit 240 controls the power of the memory 26 by issuing an instruction to the power controller 32 after saving the data requiring retention to the HDD 28. Specifically, the memory state control unit 240 instructs the power controller 32 to stop the power supply to the entire memory 26. As a result, the information processing device 1 transitions to the hibernation state.

If it is difficult to save all the data requiring retention to the HDD 28 due to reasons such as the HDD 28 not being able to secure a sufficient area for saving the data requiring retention, the HDD driver 260 may use a part of the data requiring retention. It may be saved in the HDD 28 and a part thereof may be left in the memory 26. In this case, the memory state control unit 240 may self-refresh the memory area in which the retained data remains, and turn off the memory area in which the retained data does not exist.

With the above configuration, it is possible to efficiently perform the transition to the hibernation state. Hereinafter, processing by the data rearrangement unit 220, the memory state control unit 240, the HDD driver 260, and the like will be described more specifically with reference to FIG.

FIG. 19 is an explanatory diagram showing a specific example of processing performed at the time of transition to the hibernation state. When the retained data is distributed and arranged on the memory 26 as shown in the left part of FIG. 19, the data rearrangement unit 220 has the retained data in the memory 26 as shown in the middle part of FIG. Change the arrangement of each data that needs to be retained so that it is concentrated on a part of. Further, although the description is omitted in FIG. 19, the data compression unit 230 compresses the data requiring retention.

After that, the HDD driver 260 saves the data requiring holding to the HDD 28 as shown in the right part of FIG. Then, the memory state control unit 240 instructs the power controller 32 to stop the power supply to the entire memory 26. As a result, the information processing device 1 transitions to the hibernation state.

Further, when returning from the hibernation state to the normal operation state, as shown in the central part of FIG. 19, the HDD driver 260 returns the retained data saved in the HDD 28 to the memory 26. Then, the data rearrangement unit 220 changes the arrangement of the data requiring retention in the memory 26 so that the arrangement is the same as before the transition to the hibernation state. With such a configuration, the arrangement of the data to be retained in the memory 26 can be returned to the data arrangement as grasped by the OS 100, so that the information processing apparatus 1 can normally return to the normal operating state. ..

[4-2. Operation of BIOS according to the third embodiment] Subsequently, the operation of the BIOS 200 according to the third embodiment will be described with reference to FIG. The operation described with reference to FIG. 8 in the first embodiment may be applied to the operation of the OS 100 according to the third embodiment.

(Operation of BIOS200 at the time of hibernation transition) FIG. 20 is a flowchart showing the operation by the BIOS 200 at the time of transition to the hibernation state. As shown in FIG. 20, first, the data rearrangement unit 220 of the BIOS 200 confirms PRESSERVATION_MAP_F in FACS (S704).

Then, when the flag is set in PRESERVATION_MAP_F (S708), the data rearrangement unit 220 acquires the Preservation Map based on the Preservation Map Addless in FACS (S712).

After that, the data rearrangement unit 220 rearranges the data requiring retention, and the data compression unit 230 compresses the data requiring retention (S716).

Subsequently, the HDD driver 260 saves the data requiring retention after processing by the data rearrangement unit 220 and the data compression unit 230 to the HDD 28 (S720). Then, the memory state control unit 240 gives an instruction to the power controller 32 to stop the power supply to the entire memory 26 (S724). As a result, the memory 26 is turned off, and the information processing apparatus 1 transitions to the hibernation state.

As described above, according to the third embodiment, it is possible to efficiently save the data requiring retention in the HDD 28 and transition to the hibernation state. For example, it is possible to reduce the time for saving the data requiring retention to the HDD 28 and the time for returning the data requiring retention from the HDD 28 to the memory 26.

&lt;5. Fourth Embodiment&gt; Next, a fourth embodiment of the present invention will be described. In the fourth embodiment of the present invention, as described below, the division of functions between the OS 100 and the BIOS 200 is different from that of the third embodiment, but the transition to the hibernation state is efficient as in the third embodiment. It is possible to do it.

[5-1. Functions of OS and BIOS according to the fourth embodiment] FIG. 21 is an explanatory diagram showing the functions implemented in the OS 100 and the BIOS 200 according to the fourth embodiment. As shown in FIG. 21, the OS100 includes a FACS management unit 110, a state transition control unit 120, a data allocation investigation unit 130, a Preservation Map creation unit 140, a data relocation unit 150, a data compression unit 160, and a data expansion unit 170. Has.

Such an OS 100 also creates a Preservation Map after changing the arrangement and compressing the data as in the second embodiment even at the time of transition to the hibernation state. That is, when the state transition control unit 120 determines the transition to the hibernation state, the data rearrangement unit 150 changes the data arrangement of the memory 26, and the data compression unit 160 compresses the data in the memory 26. Then, the data arrangement investigation unit 130 investigates the data arrangement of the memory 26, and the Preservation Map creation unit 140 creates the Preservation Map. Even if the state transition control unit 120 determines the transition to the suspend state, the BIOS 200 may execute the transition to the hibernation state. In the present embodiment, even when the transition to the suspend state is determined by the state transition control unit 120 in this way, the Preservation Map creation unit 140 creates the Preservation Map, so that the BIOS 200 refers to the Preservation Map and is in the hibernation state. It is possible to perform a transition to.

Further, as shown in FIG. 21, the BIOS 200 according to the fourth embodiment has a FACS management unit 210, a memory state control unit 240, and an HDD driver 260.

The HDD driver 260 confirms FACS PRESERVATION_MAP_F at the time of transition from the normal operating state to the hibernation state. Then, the HDD driver 260 confirms the Presservation Map Addless when the flag is set in PRESERVATION_MAP_F, that is, when the OS 100 has the function to create the Preservation Map.

Subsequently, the HDD driver 260 refers to the Preservation Map based on the Preservation Map Adress, and confirms the arrangement of the data requiring retention in the memory 26. Then, the HDD driver 260 saves the data requiring retention in the HDD 28.

The memory state control unit 240 controls the power of the memory 26 by issuing an instruction to the power controller 32 after saving the data requiring retention to the HDD 28. Specifically, the memory state control unit 240 instructs the power controller 32 to stop the power supply to the entire memory 26. As a result, the information processing device 1 transitions to the hibernation state.

[5-2. Operation of BIOS according to the fourth embodiment] Subsequently, with reference to FIG. 22, the operation of the BIOS 200 according to the fourth embodiment will be described. The operation described with reference to FIG. 16 in the second embodiment may be applied to the operation of the OS 100 according to the fourth embodiment.

(Operation of BIOS200 at the time of hibernation transition) FIG. 22 is a flowchart showing the operation by the BIOS 200 at the time of transition to the hibernation state. As shown in FIG. 22, first, the HDD driver 260 of the BIOS 200 confirms PRESSERVATION_MAP_F in FACS (S804).

Then, when the flag is set in PRESERVATION_MAP_F (S808), the HDD driver 260 acquires the Preservation Map based on the Preservation Map Addless in FACS (S812). After that, the HDD driver 260 saves the data requiring holding to the HDD 28 (S816).

Then, the memory state control unit 240 gives an instruction to the power controller 32 to stop the power supply to the entire memory 26 (S820). As a result, the memory 26 is turned off, and the information processing apparatus 1 transitions to the hibernation state.

As in the fourth embodiment described above, it is also possible to change the data arrangement and compress the data on the OS100 side. Even in this case, similarly to the third embodiment, it is possible to reduce the time for saving the data requiring retention to the HDD 28, the time for returning the data requiring retention from the HDD 28 to the memory 26, and the like.

&lt;6. Summary&gt; As described above, according to each embodiment of the present invention, the BIOS 200 can control the power supply of the memory 26 based on the Preservation Map indicating the arrangement of the data requiring retention in the memory 26.

More specifically, according to the first and second embodiments of the present invention, in the suspended state, some memory areas are self-refreshed and power supply to other memory areas is stopped. It is possible to further reduce power consumption.

Further, according to the third and fourth embodiments of the present invention, by selectively saving the data held in the memory 26 in the hibernation state to the HDD 28, the transition to the hibernation state and the return from the hibernation state are performed. It is possible to reduce the time required for.

Although preferred embodiments of the present invention have been described in detail with reference to the accompanying drawings, the present invention is not limited to such examples. It is clear that a person having ordinary knowledge in the field of technology to which the present invention belongs can come up with various modifications or modifications within the scope of the technical ideas described in the claims. , These are also naturally understood to belong to the technical scope of the present invention.

For example, each step in the processing of OS 100 and BIOS 200 of the present specification does not necessarily have to be processed in chronological order in the order described as a sequence diagram or a flowchart. For example, each step in the processing of the OS 100 and the BIOS 200 may be processed in an order different from the order described in the flowchart, or may be processed in parallel.

Further, it is possible to create a computer program for causing the hardware such as the CPU 20 and the memory 26 built in the information processing apparatus 1 to execute the functions of the OS 100 and the BIOS 200 described above. A storage medium for storing the computer program is also provided.

1 Information processing device 10 Main body 12 keyboard 14 Power switch 16 Transition switch 18 LCD 20 CPU 22 BIOS-ROM 24 memory controller 26 memory 28 HDD 30 rechargeable battery 32 power controller 100 OS 110, 210 FACS management department 120 State transition control unit 130 Data Arrangement Survey Department 140 Preservation Map Creation Department 150, 220 Data rearrangement section 160, 230 data compression unit 170, 250 Data Development Department 240 Memory state control unit 260 HDD driver