Direct-connect signaling system
27 claims: 23 independent, 4 dependent
- 1互いに離間した集積回路パッケージに高速信号を接続するためのダイレクトコネクト・システムであって、 互いに離間した1対の集積回路パッケージであって、各々、上面を有し、信号相互接続基板上に装着され、該基板が、低速信号のための信号経路を有し、前記集積回路パッケージが各々、低速信号を前記低速信号経路に電気的に接続する ように構成可能で、前記集積回路パッケージの前記上面に配置された上面コンタクトに高速信号を電気的に結合するために前記上面に配置された導電性トレース を有する、1対の集積回路パッケージと、 前記1対の集積回路パッケー ジ間 の空間をわたる1つ以上の高速電気的トレースを有する ダイレクトコネクト・ケーブル であって、該 ケーブル は、前記信号相互接続基板から離間され、また前記上面のそれぞれに物理的に 結合 された、 ダイレクトコネクト・ケーブル と、 前記 ケーブル の前記高速 電気的トレースが終端するケーブルコネクタであって、前記集積回路パッケージの1つに物理的に装着され、前記ケーブルを前記集積回路パッケージの1つの前記導電性トレースに電気的に結合するためのケーブルコネクタと、 前記 ケーブル の前記高速 電気的 トレースを前記上面コンタクトに電気的に結合するためのトレース-コンタクト結合手段と、を含むダイレクトコネクト・システム。
- 2請求項1記載のシステムにおいて、前記 ダイレクトコネクト・ケーブル はリジッドの構造を含む、ダイレクトコネクト・システム。
- 3請求項1記載のシステムにおいて、前記トレース-コンタクト結合手段はハンダを含む、ダイレクトコネクト・システム。
- 4請求項1記載のシステムにおいて、前記 導電性トレース は、前記集積回路パッケージの少なくとも1つのものの側面に形成され る、 ダイレクトコネクト・システム。
- 5請求項1記載のシステムにおいて、前記集積回路パッケージの1つの前記導電性トレースは、前記集積回路パッケージの1つのコンタクト・ゾーンにおいて終端し、前記ケーブルコネクタは、前記コンタクト・ゾーンに固着される、ダイレクトコネクト・システム。
- 6集積回路パッケージ間で高速信号を伝送するためのダイレクトコネクト・システムであって、 複数の回路ボード端子を有する第1の表面を備えた回路ボードと、 対応する 第1と第2の高速端子を備え た第1と第2の端部を有する前記回路ボードから離間され空間をわたる 第1の高速信号経路 を有するケーブルと、 第1と第2のICパッケージであって、i)それぞれ第1と第2のパッケージ端子であって対応する第1と第2の回路ボード端子と電気的に結合された第1と第2のパッケージ端子と、ii)前記回路ボードの前記第1の表面に 対 面する第1のパッケージ表面と、iii) 前記第1の高速信号経路が終端するケーブルコネクタにより前記ケーブルに物理的に結合される 第2のパッケージ表面と、を有し、前記第2のパッケージ表面は、 表面に配置された導電性トレースを介して 前記第1と第2の高速端子にそれぞれ結合され る 対応する第3と第4のパッケージ端子を有する、第1と第2のICパッケージと、を含む、ダイレクトコネクト・システム。
- 7請求項 6 記載のシステムにおいて、前記第1のICパッケージの前記第1と第2のパッケージ表面は、互いに対向する方向に面する、ダイレクトコネクト・システム。
- 8請求項 6 記載のシステムにおいて、前記第1と第2のICパッケージの前記第2のパッケージ表面は、同じ方向に面する、ダイレクトコネクト・システム。
- 9請求項 6 記載のシステムにおいて、前記回路ボードは更に、前記第1と第2の回路ボード端子 に 電気的 に 連続 する 第1の信号トレースを含む、ダイレクトコネクト・システム。
- 10請求項 9 記載のシステムにおいて、前記回路ボードは更に、前記回路ボードを前記第1の表面から少なくとも途中まで延在する複数の導電性ビアを含む、ダイレクトコネクト・システム。
- 11請求項 10 記載のシステムにおいて、前記第1の信号トレースの前記端部は、第1と第2の導電性ビアに結合された、ダイレクトコネクト・システム。
- 12請求項 11 記載のシステムにおいて、前記回路ボードは更に、前記第1の回路ボード表面から反対方向に面する第2の表面を含み、前記第1信号トレースは、前記第1と第2の回路ボード表面間の内部回路ボード層内に少なくとも部分的に配置された、ダイレクトコネクト・システム。
- 13請求項 6 記載のシステムにおいて、前記第1パッケージ端子は、前記第1のICパッケージの前記第1表面に配置された、ダイレクトコネクト・システム。
- 14請求項 6 記載のシステムにおいて、前記第1のパッケージ端子は、ハンダ・ボール接続によって前記第1の回路ボード端子に結合された、ダイレクトコネクト・システム。
- 15請求項 6 記載のシステムであって、更に前記第1のICパッケージの本体から外方に延在するワイヤ・リードを含み、前記第1のパッケージ端子は前記ワイヤ・リード上に配置された、ダイレクトコネクト・システム。
- 16請求項 15 記載のシステムにおいて、前記ワイヤ・リードはガルウイング形状を含む、ダイレクトコネクト・システム。
- 17請求項 15 記載のシステムにおいて、前記ワイヤ・リードはJリード形状を含む、ダイレクトコネクト・システム。
- 18請求項 15 記載のシステムにおいて、前記ワイヤ・リードは更に、前記ICパッケージ内に配置された内部端子を含み、前記ICパッケージは更に、ボンド・ワイヤと、複数のダイ端子を有するICダイとを含み、前記ボンド・ワイヤは、前記内部端子に結合された第1の端部と、第1のダイ端子に結合された第2の端部とを有する、ダイレクトコネクト・システム。
- 19請求項 6 記載のシステムにおいて、前記第1のICパッケージは更に、 第1のダイ端子を含む複数のダイ端子を備えたICダイと、 基板と、 前記第1のパッケージ端子から内部パッケージ端子に延在する第1の回路と、 前記内部パッケージ端子を前記第1のダイ端子と電気的に接続するための接続手段と、を含む、ダイレクトコネクト・システム。
- 20請求項 19 記載のシステムにおいて、前記接続手段は導電性バンプを含む、ダイレクトコネクト・システム。
- 21請求項 19 記載のシステムにおいて、前記基板は、第2のICダイに結合された第1の端部と、前記第3のパッケージ端子に結合された第2の端部とを有する信号経路を含む、ダイレクトコネクト・システム。
- 22請求項 6 記載のシステムにおいて、前記ICパッケージはフリップチップ・アーキテクチャを含む、ダイレクトコネクト・システム。
- 23請求項 6 記載のシステムにおいて、更に、第2の高速信号経路を含み、該第2の高速信号経路は、前記第1のICパッケージ上に配置された第5のパッケージ端子を前記第2のICパッケージ上に配置された第6のパッケージ端子に電気的に結合する、ダイレクトコネクト・システム。
- 24請求項 23 記載のシステムにおいて、前記第1の高速信号経路は、第1の絶縁部材によって絶縁保護された、ダイレクトコネクト・システム。
- 25請求項 24 記載のシステムにおいて、前記第2の高速信号経路も、前記第1の絶縁部材内に配置され、かつ前記第1の高速信号経路から電気的に絶縁された、ダイレクトコネクト・システム。
- 26請求項 24 記載のシステムにおいて、前記第1の高速信号経路と前記第1の絶縁部材は、フレキシブルな回路の部材である、ダイレクトコネクト・システム。
- 27請求項 24 記載のシステムにおいて、前記第1の高速信号経路と前記第1の絶縁部材は、リジッドの構造の部材である、ダイレクトコネクト・システム。
Independent claims27
47 paragraphs, as filed
This application claims priority under US Provisional Patent Application No. 60 / 376,482 filed April 29, 2002 and US Provisional Patent Application No. 60 / 400,180 filed July 31, 2002. The contents of US Provisional Patent Application No. 60 / 376,482 and US Provisional Patent Application No. 60 / 400,180 are incorporated in the main text.
The present invention generally relates to the field of electronic communication, and more specifically to interconnect structures for high speed signaling between integrated circuit devices.
To keep pace with the constant demand for faster signal rates, integrated circuit (IC) packages have evolved from relatively band-limited technologies such as wire-bonded packages to the prior art flip-chips shown in Figure 1. It has evolved into Package 100. The flip-chip package 100 includes an integrated circuit die 103, which is mounted on a multilayer substrate 105 with pad side down and enclosed in a non-conductive housing 101. The signal routing structure 110 is located within the multilayer board 105, thereby redistributing signals from the relatively densely arranged die pads 107 to the more scattered ball grid array (BGA) 109 on the underside of this package. ing. The individual contact balls of the BGA109 can then be soldered to the corresponding lands on the printed circuit board.
<p> Flip-chip packages 100 generally offer better performance than wire-bonded packages, but present many challenges to system designers as signal rates progress deeper into the gigahertz range. For example, the number of layers required on the substrate 105 for signal redistribution is constantly increasing as the number of die pads 107 increases, which makes the flip chip package 100 more complex and costly. It shall be. Also, through-hole vias 110 (ie, vias that extend completely through the multilayer board) are often used to route signals through the board. But unfortunately, the unused parts of those vias (eg region 112) make up the unused stubs, which increase parasitic capacitance and cause signal reflections, both of which provide signal quality. Deteriorate. Back-drilling and other techniques can be used to reduce via stubs, but such effort further increases manufacturing costs and also for certain package substrate structures. It becomes unsuitable or impossible.</p><p> Another challenge presented by signal redistribution within the multilayer board 105 is that differences in routing distances tend to introduce timing skew between signals transmitted simultaneously. That is, the signals output simultaneously from the die 103 reach the plurality of BGA contacts 109 at different time points, which reduces the collective data valid interval of those signals. Many systems use a single control signal, such as a clock or strobe, within a signal-receiving device to trigger sampling of a large number of simultaneously transmitted signals. As a result, the compression of the collective data valid interval due to signal skew ultimately limits the maximum signal rate that can be achieved in such a system without violating receiver setup or hold time constraints. To avoid such skew-related problems, intricate routing methods are occasionally used within the multilayer board 105, which makes the die-contact path lengths equal to each other, which is the flip-chip package 100. Further increase the complexity and cost of.</p><p> FIG. 2 shows a prior art signal system 120, which includes two flip-chip packages 100A and 100B, which are signals placed within a multi-layer printed circuit board (PCB) 121. They are connected to each other via a routing structure. From the point of view of high-speed signaling, many of these problems arising from signal redistribution within the integrated circuit package 100 also arise from the multi-layer signal routing within the PCB 121. For example, through-hole vias 123 are occasionally used to guide signals between layers of PCBs, which presents problems with stub capacitance and signal reflection. Also, the length of each signal path routed between the integrated circuit packages 100A and 100B was different due to the different PCB inlet and exit points, as well as the different PCB sink depths of the different traces 126. It also tends to be a thing, which introduces a timing skew. The integrated circuit package 100 itself can use many techniques to reduce via stubs and routing strategies to equalize path lengths, but these solutions increase system complexity and cost. There is a tendency.</p>
<p> Specific terms and drawing symbols are used in the following description and accompanying drawings to provide a good understanding of the present invention. In some cases, these terms and symbols may mean certain details that are not necessary to practice the invention. For example, interconnections between circuit elements or circuit blocks may be illustrated and described as multi-conductor or single-conductor signal lines. Each of these multi-conductor signal lines can be an alternative single-conductor signal line, and each of the single-conductor signal lines can be an alternative multi-conductor signal line. You can also. Also, the signals and signal paths illustrated or described as single-ended can be differential and vice versa.</p><p> In embodiments of the invention, high speed signal systems are realized by connecting electrical signal conductors directly between each integrated circuit package, which allows transmission without passing through traces or other conductive structures on the printed circuit board. To do so. In one embodiment, a pair of integrated circuit packages are mounted on a circuit board and coupled to each other via cables floating above the printed circuit board. Faster signals are routed from one integrated circuit package to the other via its cable, while slower signals as well as system supply voltages are taken through their integrated circuits through conductive structures within trace and printed circuit boards. Routed to the package. Although this cable is referred to in the text as a direct connect cable, it can be removably or permanently secured to one or both of these integrated circuit packages. Also, in one embodiment, the conductor in this cable is an integral component of at least one of those integrated circuit packages, which is the die of one or more integrated circuit dies contained within the integrated circuit package. Extend to contact the pad. The basic principle system includes two integrated circuit packages interconnected by a direct connect cable, but includes any number of additional ICs in such a system, and of those ICs via a direct connect cable. Can be combined with one or more of the other. Direct connect cables can also be used to enable high speed signaling between two or more integrated circuit dies contained within a single integrated circuit package. Furthermore, in other embodiments, direct connect cables are used to establish fast signal paths between integrated circuit devices mounted on different circuit boards or on opposite sides of the same circuit board. Will be done. These and other embodiments of the present invention will be described in more detail below.</p>
<figref num="1">FIG. 1 shows a prior art flip-chip integrated circuit package.</figref><figref num="2">FIG. 2 shows a prior art signal system.</figref><figref num="3">FIG. 3 shows a direct connect type signal system according to one embodiment of the present invention.</figref><figref num="4A">FIG. 4A shows a top view of an integrated circuit package according to an embodiment of the present invention.</figref><figref num="4B">FIG. 4B shows a top view of the integrated circuit package according to the embodiment of the present invention.</figref><figref num="4C">FIG. 4C shows a top view of an integrated circuit package according to an embodiment of the present invention.</figref><figref num="5A">FIG. 5A shows a direct connect cable according to an embodiment of the present invention.</figref><figref num="5B">FIG. 5B shows a direct connect cable according to an embodiment of the present invention.</figref><figref num="6">Figure 6 shows a contact technique that can be used to establish an electrical connection between a trace placed on the board of an integrated circuit package and a conductor in a direct connect cable.</figref><figref num="7">Figure 7 shows a set of integrated circuit packages that are coupled together via multiple direct connect cables to establish a multi-drop signaling system.</figref><figref num="8">Figure 8 shows a direct connect cable assembly used to establish a multi-drop signaling system.</figref><figref num="9">Figure 9 shows a star-type interconnect topology achieved using the direct connect cable assembly of Figure 8.</figref><figref num="10">FIG. 10 shows an exemplary arrangement of direct connect signal paths established between a large number of integrated circuit packages mounted on a printed circuit board.</figref><figref num="11">FIG. 11 shows a direct connect signal system according to an alternative embodiment of the present invention.</figref><figref num="12">FIG. 12 shows an embodiment of a signaling system, which includes a plurality of integrated circuit packages, each of which has a direct connect cable integrated with an intermediate span connector.</figref><figref num="13">FIG. 13 shows a direct connect signal system according to an alternative embodiment of the present invention.</figref><figref num="14A">FIG. 14A shows a direct connect signal system according to another embodiment of the present invention.</figref><figref num="14B">FIG. 14B shows a direct connect signal system according to another embodiment of the present invention.</figref><figref num="14C">FIG. 14C shows a direct connect signal system according to another embodiment of the present invention.</figref><figref num="15A">FIG. 15A shows a direct connect signal system according to another embodiment of the present invention.</figref><figref num="15B">FIG. 15B shows a direct connect signal system according to another embodiment of the present invention.</figref><figref num="16A">Figure 16A shows a direct connect signaling system that includes a lead integrated circuit package.</figref><figref num="16B">Figure 16A shows a direct connect signaling system that includes a lead integrated circuit package.</figref><figref num="17A">FIG. 17A shows an embodiment of an additional direct connect signaling system.</figref><figref num="17B">FIG. 17B shows an embodiment of an additional direct connect signaling system.</figref><figref num="17C">FIG. 17C shows an embodiment of an additional direct connect signaling system.</figref><figref num="17D">FIG. 17D shows an embodiment of an additional direct connect signaling system.</figref><figref num="17E">FIG. 17E shows an embodiment of an additional direct connect signaling system.</figref><figref num="17F">FIG. 17F shows an embodiment of an additional direct connect signaling system.</figref><figref num="18A">Figure 18A shows an exemplary connector system that can be used to establish a direct connect cable connection between each integrated circuit package or between an integrated circuit package and a printed circuit board. it can.</figref><figref num="18B">Figure 18B shows an exemplary connector system that can be used to establish a direct connect cable connection between each integrated circuit package or between an integrated circuit package and a printed circuit board. it can.</figref><figref num="18C">Figure 18C shows an exemplary connector system that can be used to establish a direct connect cable connection between each integrated circuit package or between an integrated circuit package and a printed circuit board. it can.</figref><figref num="18D">Figure 18D shows an exemplary connector system that can be used to establish a direct connect cable connection between each integrated circuit package or between an integrated circuit package and a printed circuit board. it can.</figref><figref num="19A">FIG. 19A shows direct connect signaling within a multi-chip module according to one embodiment of the present invention.</figref><figref num="19B">FIG. 19B shows direct connect signaling within a multi-chip module according to one embodiment of the invention.</figref><figref num="20">FIG. 20 shows a test arrangement, which can be used to test integrated circuit packages or integrated circuit dies in a multi-chip module with circuit boards to be interconnected via direct connect cables.</figref>
The present invention will be described by way of illustration in the accompanying drawings, not for limited purposes. In the drawings, the same reference numbers are used to refer to similar elements. FIG. 3 shows a direct connect signal system 200 according to one embodiment of the present invention. The signaling system 200 comprises a pair of integrated circuit packages 201A and 201B, which are also mounted on the printed circuit board 205 and coupled to each other via the direct connect cable 203. Has been done. As shown, the direct connect cable 203 is anchored to each of the integrated circuit packages 201 and extends above the printed circuit board 205 in a lifted form. That is, the cable 203 floats in the air above the printed circuit board 205, allowing high speed signals to be transmitted between the integrated circuit packages 201 without passing through traces or other conductive structures within the printed circuit board 205. To. This configuration avoids parasitic capacitance and signal reflection resulting from the inlet and outlet structures of the printed circuit board (eg, conductive vias, etc.). In addition, since the direct connect cable 203 can consist of a set of conductors of the same length, timing skew resulting from different lengths of signal paths through the printed circuit board 205 is also avoided. Although the direct connect cable 203 is shown in FIG. 3 as being supported only by the connection to the integrated circuit package 201, one or more mechanical supports are optional for the cable 203. It can also be placed below.
In this embodiment of FIG. 3, each of the integrated circuit packages 201 is a flip-chip package, which comprises an integrated circuit die 217 mounted with the pad side down with respect to the top surface of the substrate 219. The integrated circuit die 217 can optionally be encapsulated in a non-conductive housing 215 (eg, made of a ceramic or polymeric material). The portion of the top surface of the substrate 219 that is not covered by the die 217 or housing 215 constitutes an exposed area, to which one or more direct connect cables 203 can be attached. Therefore, instead of routing high-speed signals through the board 219 to the circuit board contact 221 underneath this board 219, the conductive trace 209 is placed on top of the board 219 and the high-speed I / O pad 225 ( That is, it routes between the pad on the integrated circuit die 217, which is coupled to the high speed input / output (I / O) circuit formed on the die 217) and the exposed area of the substrate 219. By using connector 207, the electrical signal conductor (ie, the conductor capable of carrying current) in the direct connect cable is permanently or removably coupled to the conductive trace 209. With this configuration, parasitic capacitance, signal reflection and timing skew caused by signal redistribution in the substrate layer 219 are avoided.
Subsequently referring to FIG. 3, power supply voltages and slow signals (ie, signals that do not rely on high data throughput) are driven by conventional routing techniques (eg, partial inlet vias 223 and PCB traces 224, as shown in FIG. 3). ) Can be used to route through the package board 219 and the printed circuit board 205. Since a significant number of chip-to-chip connections can be achieved by the direct connect cable 203, the signal routing within the package board 219 and the printed circuit board 200 is effectively less dense, which results in board and printed circuit boards. Allows you to reduce the number of layers on the circuit board. Also, by routing only skew-tolerant signals (signals that do not need to reach their destination in a particular phase relationship with other signals) through the package board 219 and the printed circuit board 205, the package board 219 and The meandering routing and other techniques used to equalize the signal path lengths within the printed circuit board 205 are no longer required, which further reduces routing congestion and connects the package board 219 and the printed circuit board 205. Simplify. In one embodiment, all or nearly all signals are routed through one or more direct connect cables 203, with power supply voltage (eg, power and ground) and a negligible number of signals (or zero signals). ) Is distributed via the conductive structure in the printed circuit board 205 and the package board 219. In such an embodiment, one or both of the printed circuit board 205 and the package substrate 219 can be transformed into a simple structure having only a few substrate layers or only a single layer.
Reconsidering FIG. 3, it should be noted that the printed circuit board 205 does not need to be changed in order to realize the direct connect signal system 200. For this reason, the designer has turned a system with a large number of conventional routing signal paths (ie, through-circuit-board-routed systems) into a system with direct connect signal routing in Figure 3. When migrating, such migrating can also be achieved with one signal path at a time without the need for board-level changes. Traces on the printed circuit board for conventional routing You can simply leave it unconnected and instead provide a fast signal path with a direct connect cable. Each signal path (or group of signal paths) in this system is a direct connect signal. The production of printed circuit boards can also be simplified by omitting those trace traces, as they are well transferred to the placement.
Yet another advantage of the Direct Connect Signal System 200 is the high speed test (also known as the "AC test") through a direct connect cable connection between one of the integrated circuit packages 201 and a high speed tester (not shown). ) Is to be able to be executed. As will be described in more detail later, fast testing of integrated circuit package 201 through direct connect cabling eliminates the need for three-state device 201B, and the parasitics that normally arise from probe traces on the printed circuit board 205. Capacitance and signal reflection are avoided.
FIG. 4A is a top view of the integrated circuit package 201A of FIG. 3, where the housing 215 and the integrated circuit die 217 are partially transparent and the die pad 225 (or integrated circuit die 217) placed on the package substrate 219. The bumps or other types of contacts formed on top) and the conductive trace 209 are exposed. In one embodiment, the overall length of the conductive trace 209 is along the surface of the substrate 219 by a die-padded contact (these are spring-type contacts, particle interconnects, or other high density interconnect structures. It extends from (which can be established) to the contact zone 231 on its exposed area of the package substrate 219. In an alternative embodiment described below, the trace 209 can extend in whole or in part along the underside (ie, mounting side) of the substrate 219 or over the inner layer of the substrate 219.
This trace 209 ends in contact zone 231, for example, in a high density land adapted to receive contact from a direct connect cable. Alternatively, the trace 209 can extend beyond board 219 to form an integral component of the direct connect cable. Also, as shown in FIGS. 4B and 4C, additional contact zones (ie, zones 247 and 249 in FIG. 4B, zones 267A-267D in FIG. 4C) can be provided, thereby providing a large number of direct connect. Allows connection to a cable, or allows connection to a single direct connect cable to contact the exposed area of the package board on one or both of the opposite and adjacent sides of the integrated circuit die 217. Or something. Also, one or more of the traces 209 can contain two or more trace segments that extend from a common die contact to different contact zones. For example, referring to FIG. 4B, trace 250 includes trace segment 251A, which extends from die contact 245 to contact zone 249, and another trace segment 251B contacts from die contact. It extends to Zone 247. As described below, such multi-segment tracing can be used to establish fast multi-drop connections (eg, many drop buses) to any number of integrated circuit packages.
FIG. 5A is a top view of the integrated circuit packages 201A and 201B and the direct connect cable 203 of FIG. The housing and integrated circuit dies of each integrated circuit package 201 are transparent to expose the die pads 225 and trace 209 placed on the package substrate. In the illustrated embodiment, the direct connect cable 203 is a ribbon style cable comprising a set of electrical signal conductors 297 arranged in a coplanar array within a flexible, low loss dielectric material 293. .. By using the cable connectors 207A, 207B, a connection is established between the electrical signal conductor 297 and the trace 209 placed on each of the package substrates 219A and 219B. One sheet or web conductive material (not shown) can be placed above or below the conductor 297 for shielding purposes (eg, by connection to a ground or other reference voltage), thereby. , Realize a microstrip line cable. Alternatively, a conductive sheet or web can be placed both above and below the conductor 297, thereby forming a stripline cable for the coplanar. Alternatively, the electrical signal conductor 297 itself can be coupled to the signal and ground, thereby reducing crosstalk between adjacent signals. Further, as shown in FIG. 5B, the conductor 311A, in the direct connect cable 310, Pairs of 311B can also be placed in twisted pair configuration (eg, intersecting each other over the other, but separated by an insulating material), which can reduce inductive coupling. Twisting more than two conductors together can also be done in yet another embodiment. It is also possible to arrange the conductors in a coaxial configuration or other three-dimensional structure instead of the coplanar structure. In addition, direct connect cables are preferably flexible to allow a wide range of interconnect distances and integrated circuit topologies, but rigid interconnect structures can also be used. Although FIGS. 5A and 5B show single plane conductors, multiple plane conductors can also be formed within cables 203 and 310, where each plane is optionally provided with an insulating layer. Separated from adjacent planes by a shield layer.
FIG. 6 shows a typical contact topology, which establishes an electrical connection between the trace placed on the board of integrated circuit package 201 and the conductor 297 in the direct connect cable 203. Can be used to In FIG. 337A, conductive spools or dendritic contacts 343 can be soldered, formed, or otherwise secured to each trace 209 placed on the package substrate 209, and they , Can be used to establish an electrical connection by piercing the corresponding conductor 297 in the direct connect cable 203. And vice versa, as shown in detail FIG. 337B, the spool or dendritic contact 353 can be secured to the direct connect cable conductor 297, which establishes an electrical connection by piercing the corresponding substrate trace 209. Can also be used to.
See detail FIG. 337A again, but by using connector 207, the direct connect cable is coupled to the exposed area of package substrate 219. Also, in the illustrated embodiment, the direct connect cable comprises insulating layers 351 and 352 arranged above and below the conductor 297 and shield layers 349 arranged above the insulating layer 351. As mentioned above, an additional shield layer can be placed under the insulation layer 352, which can form a stripline or coplanar stripline cable.
In another embodiment, as shown in detail FIG. 337C, a finger-like protruding element 357 fixed to the substrate trace 209 is used to make electrical contact with the cable conductor 297. The protruding element 357 is preferably made of an elastic spring-like material, which biases the direct connect cable 203 with respect to the conductor 297 as it is secured to the substrate. However, other types of materials can also be used. As shown in detail FIG. 337D, the finger-shaped protruding element 361 can optionally be anchored to the direct connect cable 297, and to the board trace 209 when connecting the direct connect cable 203 to the board. You can also urge them. FIG. 337E illustrates yet another embodiment, in which a corresponding point contact 365 in the direct connect cable 203 is used, using a point contact 365 that is affixed to or integrally formed with the substrate trace 209. Contact with conductor 297. With reference to FIG. 337F, the point contact 369 is alternatively fixed or integrally formed to the end of the cable conductor 297 and used to contact the substrate trace 209. A variety of other structures can also be used, which in other embodiments can establish an electrical connection between the conductor 297 of the direct connect cable 203 and the substrate trace 209, which is a solder joint. , Includes, but is not limited to, spring-style contacts, male-to-female connections, particle interconnect structures, etc. More generally, any structure or technique can be used without departing from the gist and scope of the invention, whereby the conductor 297 of the direct connect cable 203 is placed on or in substrate 219. You can connect to the corresponding contacts you have arranged.
Figure 7 shows a set of integrated circuit packages 391, 392 and 393, which are coupled via two direct connect cables 203A and 203B to establish a multi-drop signaling system 390. With reference to integrated circuit package 392, each of the board traces contains a pair of trace segments 399A and 399B and extends to the opposite contact zone. Therefore, this multi-segment board trace of integrated circuit package 392, which is referred to in the text as the bridge integrated circuit package (bridge IC), forms a bridge between the direct connect cables 203A and 203B. And together, the conductors of the direct connect cables 203A and 203B and the multi-segment trace of the integrated circuit package 392 are the integrated circuit package 391, It forms a continuous signal path between each of 392 and 393. This signal path contacts the die pads of integrated circuit package 392 without the long stub connections normally present in circuit board routing signal paths and plagues many multi-drop signal systems. Parasitic capacitance and signal reflection. Is substantially reduced. An arbitrary number of bridge ICs can be included in the signal system 390. The bridge IC 392 may also include a direct connect contact zone on an adjacent edge rather than on the opposite edge shown. The signaling system 390 provides a direct connect signal path in response to a command or request from the master / slave system (in this case, the slave device is the master device (eg, memory controller and slave memory device)). It can be a signal drive) or a peer-to-peer signal system (in this case, any of the integrated circuit packages (or a subset thereof), with control of the signal path, at its own will. The signal is output to the signal path based on this), or it can be any other signal system for which multi-drop operation is desired. In other embodiments, the bridge IC392 can include more than two direct connect contact zones (with one set of trace segments extending to each contact zone), thereby one. More multi-drop signal paths can be allowed to be established by the bridge IC392, or the bridge IC392 can allow the star topology that makes up the hub device.
Figure 8 shows an alternative direct connect signaling system 405, which is used to establish a multi-drop signal path. Rather than establishing multi-drop routing through multi-segment traces on the package board, two sets of conductors 415A and 415B are provided within the direct connect cable assembly 412, and each set of conductors is an intermediate integrated circuit. Coupling between package 406 and endpoint integrated circuit packages 407 and 408, respectively. The conductors of pair 415A are coupled to the conductors of pair 415B, respectively, to establish a multi-drop signal path extending between the endpoint packages 407, 408 and to the intermediate package 406. In one embodiment, the conductor sets are connected to each other within connector 418 (eg, via solder joints, pressure contacts or other conductive connections), thereby causing a Y joint 414 between each pair of conductors. To form. In an alternative embodiment, conductors 415A, 415B can also be coupled to each other at points along their length, rather than at connector 418. Also, in an alternative embodiment, more than two sets of conductors can be included within the direct connect cable assembly 412, and by coupling to each other, connections to any number of additional integrated circuit packages can be made. It can be made possible (eg, by using a Y-joint 414 in each additional intermediate integrated circuit package).
Figure 9 shows the star-type interconnect topology 430, which uses the pair of direct connect cable assemblies in Figure 8 (ie, assemblies 412A and 412B and the bridge IC392 in Figure 7). Realize. The bridge IC 392 constitutes a star topology hub device, which is coupled to each of the endpoint integrated circuit packages 431, 432, 433 and 434, thus shown in FIGS. 7, 8 and 9. As can be seen from the examples, virtually any fast interconnect topology can be achieved using one or both of the direct connect cable assemblies and bridge ICs described in FIGS. 6 and 7.
FIG. 10 shows an exemplary arrangement of direct connect signal paths 485,487,489,491,493, which are established between a large number of mounted integrated circuit packages (478,480,481 and 482) on printed circuit board 477. Various other components (not shown) are also mounted on the printed circuit board 477 and interconnected or integrated with each other using conventional interconnect structures or with additional direct connect cables. It can be interconnected to circuit packages 478-482 and / or both. As shown, those direct connect cables used to establish a signal path between integrated circuit packages 478-482 include straight cables 485,487 and 493, S-type cables 491 and elbow-shaped cables 489. .. Cables with any other number of bends or shapes can also be used. Also, although the coplanar cable is shown, other cable geometries can be used (eg, coaxial cable). The integrated circuit package 481 can establish a through connection as a bridge IC between all or a pair of direct connect cables 485,491 and 493. Alternatively, Direct Connect Cable 485, The 491 and 493 can also be coupled to separate sets of I / O circuits within the integrated circuit package 481, respectively. The integrated circuit packages 480 and 482 can also be bridge ICs to establish a through connection between the direct connect cables. It should be noted that the direct connect signal path shown in FIG. 10 can be applied or modified for application to virtually any type of system that requires high speed signaling between integrated circuit packages. For example, between integrated circuit packages in a data processing system (eg, between a general purpose or dedicated processor and a corresponding chipset component or application integrated circuit, or between a memory controller and a memory device and a memory module, or one of them. Between both), between integrated circuit packages between network switching systems (eg, between integrated circuit packages on one-order line cards, switch fabric cards, etc.), high-speed data multiplexing systems, etc. Connections can be established between integrated circuit packages using direct connect cables.
FIG. 11 shows a direct connect signal system 500 according to an alternative embodiment of the present invention. The signaling system 500 includes a pair of integrated circuit packages 501A and 501B, which are mounted on the printed circuit board 507 and coupled to each other via a direct connect cable 503. In contrast to the direct connect cable 203 in FIG. 3, the direct connect cable 503 does not contain connectors at both ends, but rather is an integral component of the integrated circuit package 501A. In the illustrated embodiment, the direct connect cable 503 is received within the edge of the package substrate 509 (eg, a recess formed between the upper and lower surfaces of the package substrate 509), and the direct connect cable 503. The electrical signal conductor 502 is a set of vias 504 or other conductive structure coupled to the integrated circuit die 512 by extending within the substrate 509 (eg, along the surface of the inner layer of the substrate). Contact. Alternatively, the conductor 502 of the direct connect cable 503 can extend along the top surface of the package substrate 509, which also allows direct contact with the die 512 (eliminating the need for via 504). .. In yet another embodiment, the conductor 502 of the direct connect cable 503 extends along the bottom surface of the package substrate 509 and contacts the die 512 through vias or other conductive structures located within the package substrate 509. Can be done. As with the direct connect cable 203 in FIG. 3, the direct connect cable 503 can be flexible or rigid, and also has a microstrip line (ie, has a conductive shield 506), a strip of coplanar. It can also be a line or non-coplanar cable (eg, coaxial or other non-coplanar configuration).
FIG. 12 shows a signaling system embodiment 510, which comprises integrated circuit packages 511A, 511B, which are mounted on the printed circuit board 517 and each have an integrated direct connect cable 514A. , 514B, which are terminated at intermediate span connectors 515A, 515B, respectively. In one embodiment, the intermediate span connectors 515A, 515B are different from each other, and the intermediate span connector 515A is configured to receive protruding contacts of the intermediate span connector 515B (ie, male / female). -Connector pair). In an alternative embodiment, the intermediate span connectors 515A, 515B are identical to each other, and they align the respective set of conductors in the cables 514A, 514B with each other by including a latch structure. Stay in contact. The intermediate span connectors 515A, 515B can be made to connect to each other permanently or removable. As in the embodiment of FIG. 11, the conductors in one or both of the direct connect cables 514A, 514B may, in whole or in part, extend within the corresponding package substrate (shown) or. It can be extended on either surface. Direct Connect cables 514A, 514B can also be flexible or rigid, and can be microstrip lines (ie, have a conductive shield 506), coplanar striplines, or non-coplanar cables. it can.
FIG. 13 shows a direct connect signal system 512 according to another embodiment of the present invention. The signaling system 512 includes integrated circuit packages 522A, 522B, which are coupled to each other via a direct connect cable 523, which cable prints along all or part of its length. It is mounted on the circuit board 527. The direct connect cable 523 is preferably of a coplanar construction and has multiple parallel conductors, but this is an alternative, coaxial or other non-coplanar cable. You can also do it. Also, the conductor 525 of this direct connect cable may come into direct contact with the land 524A or other conductive structure underneath the package substrate 526, or, as shown in FIG. 13, the conventional interconnect structure. , For example, a contact ball 528 (eg, a BGA contact ball), a contact spring, or the like may be used to couple to the integrated circuit package. With this configuration, the direct connect cable 523 is manufactured as a conventional integrated circuit package (flip chip package 522A, shown in FIG. 13). Can be used with the 522B, or an integrated circuit package with leads or other contacts to contact the conductors in the direct connect cable 523). The above-mentioned problems related to signal redistributing within the integrated circuit package may still exist in the embodiment of FIG. 13, but the parasitic capacitance, signal reflection and signal skew associated with PCB routing have been significantly reduced. Allows higher signal rates and reduces routing congestion on the printed circuit board 527. The conductor 525 of the direct connect cable 523 is preferably electrically separated from the printed circuit board by a layer 529 of low loss dielectric material, which is printed or otherwise printed on the top surface of the printed circuit board 527. Allow the conductive traces formed by the method to be routed underneath the cable. As with the direct connect cable described above with reference to FIGS. 3, 9 and 10, the direct connect cable 523 is preferably flexible, which allows the cable to be printed circuit board 527. Allows routing on and on (and / or around) other integrated circuit devices or circuit components mounted in (eg, other integrated circuit devices or circuit components located between integrated circuit packages 522A, 522B). .. Alternatively, the direct connect cable 523 can be rigid. Also, the direct connect cable 523 is placed between the system assemblies without sticking to the printed circuit board 527 (eg, using adhesive or fasteners) or on the printed circuit board 527. You can do it. Allows routing on and over (and / or around) other integrated circuit devices or circuit components placed between 522Bs. Alternatively, the direct connect cable 523 can be rigid. Also, the direct connect cable 523 is placed between the system assemblies without sticking to the printed circuit board 527 (eg, using adhesive or fasteners) or on the printed circuit board 527. You can do it. Allows routing on and over (and / or around) other integrated circuit devices or circuit components placed between 522Bs. Alternatively, the direct connect cable 523 can be rigid. Also, the direct connect cable 523 is placed between the system assemblies without sticking to the printed circuit board 527 (eg, using adhesive or fasteners) or on the printed circuit board 527. You can do it. Allows routing on and over (and / or around) other integrated circuit devices or circuit components placed between 522Bs. Alternatively, the direct connect cable 523 can be rigid. Also, the direct connect cable 523 is placed between the system assemblies without sticking to the printed circuit board 527 (eg, using adhesive or fasteners) or on the printed circuit board 527. You can do it. Allows routing on and over (and / or around) other integrated circuit devices or circuit components placed between 522Bs. Alternatively, the direct connect cable 523 can be rigid. Also, the direct connect cable 523 is placed between the system assemblies without sticking to the printed circuit board 527 (eg, using adhesive or fasteners) or on the printed circuit board 527. You can do it.
14A-14C show a direct connect signal system 530 according to another embodiment of the present invention. First, referring to Figure 14A, the direct connect cable 546 extends between the integrated circuit packages 533A, 533B mounted on the circuit board 531 and this is the lid component 535A, 535B, respectively. It is fixed to each package 533 by one of them. In one embodiment, the spring-type contact 537 extends from the direct connect cable 546 and contacts a trace located on the surface of the package substrates 549A, 549B (eg, illustrated in FIGS. 4A-4C). Same as I did). Other cable-package interconnect structures and techniques can also be used in alternative embodiments, including, but not limited to, the contact structures and techniques described above in FIG. I'm out. In the embodiment of FIG. 14A, the lid component 549 is formed from a heat conductive material, which has a heat sink structure 541 (eg, fins) placed in contact with the top surface of the package housing 544. Includes. A heat conductive material 539 (or adhesive) can also be used, which can improve the heat transfer from the integrated circuit package 533 to the lid component 535.
In one embodiment, as shown in FIG. 14B, the individual conductors 547 of the direct connect cable 546 are routed around openings 548A, 548B in the cable 546 sized according to the integrated circuit die housing 544. This allows for a more direct connection between the package housing 544 and the lid component 535. Alternatively, the opening can be omitted and the conductor 547 can be routed directly onto the top surface of the package housing. The heat sink structure 541 can be distinguished from the lid component 535, or in alternative embodiments, they can be omitted together (eg, shown in 551 in Figure 14B), and the lid component. The 535 can also be formed from a material other than the thermally conductive material.
In the embodiment of FIG. 14A, the lid component 535 includes a protruding member 543, which secures the lid component 535 to the substrate 549 by extending into a corresponding hole or slot in the package substrate 549. To do. Referring to FIG. 14C, the lid component 561 can optionally be attached to the package substrate 549 by a member 563, and the member 563 snaps around to the outer edge of the package substrate 549 and the lid component 561 is attached. Secure component 561 to the upper and lower surfaces of board 549. In such embodiments, the housing may be omitted and the thermal conductivity material may be placed directly between the integrated circuit die 545 and the lid component 561. Specifically, any mechanism or material for fastening the lid 561 (or 535) and the direct connect cable 546 to the integrated circuit package 533 can also be used without departing from the gist and scope of the invention.
15A and 15B show a direct connect signal system 580 according to another embodiment of the present invention. The direct connect signal path 587A-587G is placed inside the super structure 585 instead of the discrete direct connect cable, and this super structure 585 is mounted on the printed circuit board 581 on the upper surface of the integrated circuit packages 583A to 583N. (Note that the profile diagram in FIG. 15B shows only the direct connect signal paths 587A and 587B). In the embodiment of FIG. 15B, the post 591 is secured to the printed circuit board 581 and received in the hole 594 of the superstructure 585, thereby aligning the superstructure 585 with the printed circuit board 581. Other alignment techniques can also be used in alternative embodiments.
The direct connect signal path 587 may be formed by conductive traces printed on or otherwise placed on the superstructure 585, or one or more of the direct connect cables described in FIGS. 3-14. It can also be formed by sticking on the surface of the super structure 585. In either case, by providing the contact structure 589, a contact is established between the terminal 592 of the direct connect signal path and the contact arranged on the substrate of the integrated circuit package 583. In FIG. 15B, the contact structure 589 is shown as a protruding finger type contact, but other types of contact structures can also be used, including, but not limited to, the contacts described in FIG. The structure is included. As can be seen from FIG. 15A, the direct connect signal paths 587A-587G are not only multi-drop signal structures 487D and 587E, but also point-to-point links between integrated circuit packages 587A, 587B, 587C, 587F and 587G can be formed. As can be seen, with particular reference to the multi-drop structure 587E, the contact area 599 is located at one point along the length of the signal path 587E (ie, different from both ends), thereby each in the contact area 599. Limit stubs extending from the contact to the combined length of the contact structure 589 and the package substrate trace. Note that such intermediate span contacts can be used with other direct connect cables described in the text, which requires the bridge IC382 described in FIG. 7 or the cable assembly 412 described in FIG. It is possible to establish a multi-drop signal path without using. An aperture is also provided above the contact point 592 in the superstructure 585 to facilitate fine alignment between the contacts in the direct connect signal paths 587A-587G and the corresponding contacts on the integrated circuit package 583. You can also do it.
16A and 16B show the direct connect signaling systems 610 and 625, respectively, with leads instead of or in combination with the flip-chip packages shown in FIGS. 3 and 9-12, respectively. Includes the integrated circuit package of. With reference to FIG. 16A, the direct connect cable 617 extends over the leaded integrated circuit packages 613 and 645 and is secured to the integrated circuit package by sockets 614 and 616. That is, socket 614 is placed around integrated circuit package 613, which contains conductive member 618A, which is from each cable connection point 612A to the corresponding lead 621 of integrated circuit package 613. It is postponed. Similarly, socket 616 is placed around integrated circuit package 615, which contains conductive member 618B, which is the corresponding lead 622 of integrated circuit package 615 from each cable connection point 612B. It has been extended to. Conductors 619A-619N in the cable extend between each pair of contacts 620 with conductive members 618. As with the direct connect cable described above, the direct connect cable 617 is preferably flexible when the integrated circuit packages 613 and 615 are placed in different positions and orientations that are different from each other. Allows interconnection of these packages. Alternatively, the direct connect cable 617 can be rigid. The direct connect cable can also be a microstrip line, a coplanar stripline, or a non-coplanar cable. Finally, although integrated circuit packages 613 and 615 are shown as packages with gull-wing leads or J-leads, packages with other types of leads can also be used in alternative embodiments.
In FIG. 16B, the flip-chip integrated circuit package 626 and the leaded package 627 are interconnected by using the direct connect cable 635. The flip-chip package 626 is generally implemented as described with reference to FIG. 3, and the conductive trace 629 is routed along the surface of the package substrate 628 into a zone in the exposed area of the substrate 628. Make contact. The conductive structure 630 is placed in contact with the trace 629, which extends along the surface of the package housing to the top surface of the housing. A contact 631 (eg, a solder ball or other structure) is provided to make an electrical connection between the structure 630 and the conductors 632A-632N of the direct connect cable 635. In the leaded package 627, the conductive structure 642 also extends from the package lead 641 to the top surface of the package housing, and on that top surface, using contacts 643, the conductors 632A-632N of the direct connect cable 635. Make an electrical connection with. In an alternative embodiment, the flip-chip package 626 can also be coupled to the direct connect cable 635 using any of the connection techniques and structures described above in FIGS. 3-14. Similarly, the leaded package 627 can be coupled to the direct connect cable 635 using the socket configuration described in Figure 16A. In addition, the direct connect superstructure 585 described in FIGS. 15A and 15B can be used in place of the discrete direct connect cables 617 and 635 shown in FIGS. 16A and 16B.
17A-17F show embodiments of an additional direct connect signal system. First, referring to FIG. 17A, the integrated circuit packages 653 and 657 are mounted on separate printed circuit boards 651 and 655, respectively, and are coupled to each other via a direct connect cable 659. The printed circuit boards 651 and 655 can be arbitrarily positioned from each other and separated by any acceptable signaling distance. Printed circuit boards 651 and 655 can have additional integrated circuit packages, which can be coupled together through one or more other direct connect cables or in the multi-drop configuration described in Figure 7. can do. The direct connect cable 659 can also contain multiple sets of conductors as described in Figure 8, which allows the interconnection of multiple integrated circuit packages on those two printed circuit boards 651 and 655. To do.
Figure 17B shows a direct connect signaling system, in which the integrated circuit package 663 mounted on the motherboard or backplane 661 is a direct connect cable to the integrated circuit package 667 mounted on the daughterboard 665. Coupled via 669 (ie, the printed circuit board is detachably coupled to the motherboard via connector 670 or a similar structure). Figure 17C shows another direct connect signaling system, in which integrated circuit packages 678 and 682 are mounted on daughterboards 676 and 680, respectively, and are coupled together via direct connect cable 684. ing. Daughterboards 676 and 680 are removable and inserted into the connectors 684 and 686 on the backplane or motherboard 675, respectively. Illustrative applications of the signaling systems of FIGS. 17B and 17C include, but are not limited to, line cards or others inserted into the backplane within a network switching device (eg, switch or router). Includes memory modules that are inserted into the motherboard or backplane of a card, computing device or consumer electronic device.
Figure 17D shows yet another direct connect signaling system, in which integrated circuit packages 697 and 699 are mounted on opposite sides of a printed circuit board 695 or other board, and these are direct connect. Connect to each other via cable 700. As with the signaling system of FIG. 17A, each of the embodiments shown in FIGS. 17B-14D can include additional integrated circuit packages coupled to each other with direct connect cables and also direct connect. Cables 669, 684 and 700 can include a large number of sets of connectors as described in FIG. 7, which allows the interconnection of a large number of integrated circuit packages.
FIG. 17E shows a signal system 710 according to another embodiment of the present invention. The signaling system 710 includes a first integrated circuit package 712, which is mounted on the printed circuit board 711 and coupled to the conductor of the direct connect cable assembly 717 via bond wire 715 or other contact structure. Has been done. Other bond wires can also be used, which allow the integrated circuit die to be coupled to the solder balls or other contacts on the underside of the integrated circuit package 712. The direct connect cable assembly 717 includes a lid component 714 with a fastening member 716, which secures the assembly 717 to the integrated circuit package 712. Moreover, this direct-connect cable assembly includes a connector 719, thereby, the end remote the cable assembly 717 another print times fixed in passage board 721, also printed conductors of the cable assembly 717 Coupling to a trace placed on circuit board 721. This printed circuit board trace couples to the reed (or other contact) of another integrated circuit package 723, thereby completing the fast signal path between the integrated circuit packages 712 and 723. As described above, the entire high-speed signal path of the system 710 is a hybrid path and has a direct connect cable connection to the integrated circuit package 712 and a conventional connection to the integrated circuit package 723. The cable-board connector 719 can be permanently or detachably coupled to the printed circuit board 721.
Continuing with reference to FIG. 17E, it should be understood that the integrated circuit package 712 can be an alternative of any of the types of integrated circuit packages described in FIGS. 3-13. It can also have any of the cable connections described in FIGS. 3-13. Similarly, although integrated circuit package 723 is shown as a surface mount integrated circuit package with J-leads, any other type of integrated circuit package can be used in alternative embodiments. Also, the Direct Connect Cable Assembly 717 was shown as coupled to only one integrated circuit package 712, but this cable is one or more additional packages as described above in Figures 6 and 7. Can also be combined with. Further, the integrated circuit packages 712 and 723 can be mounted on the same circuit board instead of the separate circuit boards 711 and 721 shown in FIG. 17E.
FIG. 17F shows a signal system 730 according to another embodiment of the present invention. The signaling system 730 includes a first integrated circuit package 733, which is mounted on the printed circuit board 731 and coupled to the direct connect cable 735. However, instead of coupling to another integrated circuit package, the conductor of the direct connect cable 735 is coupled to terminal 738 within the integrated circuit board connector 737. In one embodiment, the integrated circuit board connector 737 is a socket-style connector, which is a printed circuit board 739 (eg, line card, memory module, etc.) on which other components 740 are placed. ) Is configured to receive the edge connector. In alternative embodiments, other types of connectors can be used in place of the connector 737 (eg, pin extensions configured to insert into a female connector on a daughterboard), and a direct connect. The cable 735 can also be permanently or detachably coupled to the connector 737. Alternatively, the connector 737 can be mounted on the opposite side of the integrated circuit package 733 of the printed circuit board 731, or on a completely different printed circuit board. The integrated circuit package 733 is, as an alternative, any of the types of integrated circuit packages described in FIGS. 3-16, or any of the direct connect cable connections described in those figures. Can be made to have.
Figures 18A-18D show an exemplary connector system 763, which can be used between integrated circuit packages 761A and 761B, or between integrated circuit packages 761 and printed circuit boards (modules such as memory modules). Can be used to establish a direct connect cable connection with (including). First, in FIGS. 18A and 18B, the connection is made by a "clam shell" connector system 763, which interconnects the transmission cable 760 by in-line or array contacts on the planar. Align and hold firmly on the edge of the component (eg, board or printed circuit board or module in integrated circuit package 761).
In the embodiment detailed in FIG. 18C, the clam shell connection system 763 includes: That is, the clamshell connector 771 that includes the top lip of the flat clamshell connector 773 (for applications where electrical connections should only be made on the top surface of the substrate) and the substrate thickness spacer 772 of the interconnect component 761. A raised surface that carries electrical signals between the bottom lip and a conductor located on the interconnect component 761 (shown by 792 in Figure 18D) and is also on either the conductor of cable 760 or the conductor of interconnect component 761. Alternatively, the flex circuit / transmission cable 760, which connects through a protruding structure (ie, acts as a terminal), and the direct connect cable to the contact terminals of the interconnect component 761 are reliably aligned and provide mechanical anchors. A guide that allows the alignment pin 781 to prevent unintended pull-off due to shock or vibration, and the top and bottom lips of connectors 771 and 773 to maintain alignment with each other as they move in the z direction. Pin 775 (more or less guide pins can be provided in alternative embodiments) and each half of the connector biased away from each other for insertion or removal when required. Spring 777 and clam shell 771, A fastening mechanism 779 (eg, a screw, or other closure force transfer device) that physically clamps the top and bottom lips of the 773 to the corresponding surface of the interconnect component 761. Here, the interconnect components (eg, integrated circuit package boards, printed circuit boards or modules, etc.) include recessed areas such as holes or slots shaped to receive alignment pins 781. Although two alignment pins 781 are shown in FIGS. 18B and 18C, more or fewer alignment pins 781 may be provided in alternative embodiments. Note that if the clamshell connector system 763 is designed so that the spacer 772 abuts on the edge of the interconnect component 761 and controls the alignment in the direction extending towards the interconnect component 761, a single alignment. Holes can also be used to establish lateral alignment of the interconnect component 761 along the edges. Also, instead of pins, longitudinal protrusions (eg fins or blades) or other protrusion geometry can be used, which establishes alignment between the connector system 763 and the interconnect component 761. The recessed area 785 (eg, holes, channels, grooves, etc.) within the interconnect component 761 can be shaped according to its protrusion geometry. The alignment pin 781 can also be located on one or both of the lips 771 and 773 of the connector system 763. Alternatively, these alignment pins can be placed on the interconnect component 761 and the recessed area 785 can be placed on one or both of the lips 771 and 773. A single alignment hole can also be used when designing the clamshell connector system 763 to control alignment in the direction that abuts on the edge of 61 and extends toward the interconnect component 761. Allows you to establish lateral alignment along the edges of the interconnect component 761. Also, instead of pins, longitudinal protrusions (eg fins or blades) or other protrusion geometry can be used, which establishes alignment between the connector system 763 and the interconnect component 761. The recessed area 785 (eg, holes, channels, grooves, etc.) within the interconnect component 761 can be shaped according to its protrusion geometry. The alignment pin 781 can also be located on one or both of the lips 771 and 773 of the connector system 763. Alternatively, these alignment pins can be placed on the interconnect component 761 and the recessed area 785 can be placed on one or both of the lips 771 and 773. A single alignment hole can also be used when designing the clamshell connector system 763 to control alignment in the direction that abuts on the edge of 61 and extends toward the interconnect component 761. Allows you to establish lateral alignment along the edges of the interconnect component 761. Also, instead of pins, longitudinal protrusions (eg fins or blades) or other protrusion geometry can be used, which establishes alignment between the connector system 763 and the interconnect component 761. The recessed area 785 (eg, holes, channels, grooves, etc.) within the interconnect component 761 can be shaped according to its protrusion geometry. The alignment pin 781 can also be located on one or both of the lips 771 and 773 of the connector system 763. Alternatively, these alignment pins can be placed on the interconnect component 761 and the recessed area 785 can be placed on one or both of the lips 771 and 773. It can also be placed on one or both of the 63 lips 771 and 773. Alternatively, these alignment pins can be placed on the interconnect component 761 and the recessed area 785 can be placed on one or both of the lips 771 and 773. It can also be placed on one or both of the 63 lips 771 and 773. Alternatively, these alignment pins can be placed on the interconnect component 761 and the recessed area 785 can be placed on one or both of the lips 771 and 773.
Continuing with reference to Figure 18C, the depth of the throat of the connector system 763 (ie, the extension of the lips 771 and 773 above the interconnect component 761) is not important, but a thinner spacer 772 is used. If so, a shallower throat can improve stiffness. Also, the bottom lip of connector 771 need not be as deep as the top lip 773, and therefore, in one embodiment, it should be shallower. As mentioned above, the bottom lip 771 can also include a alignment pin 781 for greater mechanical robustness. It also reduces the thickness of the bottom lip 771 of the connector to a value smaller than the expected gap 794 between the package board and the printed circuit board 790, as shown in Figure 18D (the gap is at least partial). Depending on the nature of the package-board contact 791). The top and bottom lips 771 and 773 of the connector can be formed from any material, and if made of conductive material, these can be grounded references within one or both of the cable 760 and the interconnect component 761 (eg). , Shield layer). In one embodiment, the alignment pin 781 engages one or both of the ground reference conductor (or ground plane) and power supply voltage conductor located on or within the interconnect component 761. This establishes one or both connections to ground and power.
With reference to FIG. 18D, the alignment between the electrical contact point 794 (eg, the pad) located on the cable 760 and the corresponding conductor 792 on the interconnect component 761 is established by the alignment pin 781. In one embodiment, the alignment holes 785 in the interconnect component 761 are drilled at designated positions relative to the ends of the substrate conductor 792. A through hole 796 for this alignment pin is also drilled in the cable 760 at a designated position with respect to the cable contact 794. When the alignment pin 781 of the connector top lip 773 is inserted into the through hole 796 of the cable 760, the cable contact 794 contacts the end of the conductor 792 when this connector is closed to the interconnect component 761. Aligned to do. As shown in FIG. 18C, the tip of the alignment pin 781 can also be tapered to allow self-alignment of the pin 781.
The structure used to establish an electrical contact between the direct connect cable conductor and the interconnect component 761 shaped trace 792 is not limited to this, but is limited to gold dots, nanopierced contacts, pogo pins, and elastomers. -Pads, micro springs, plated bumps, particle interconnects, anisotropic conductive films, etc. can be included. Height coplanarity between different bump contacts, especially for high pin counts, can be achieved using any number of techniques, and these techniques are not limited to this. Sandwiching the elastoma between the direct connect cable and the top lip of the connector, and the spring loading contact 795 behind any bump contact 794 on the direct connect cable conductor as shown in Figure 18D. One or both are included.
As mentioned above in FIGS. 17E and 17F, a direct connect cable can be coupled to an integrated circuit package at one end and to a printed circuit board or circuit board (or module) connector at the other end. Therefore, the direct connect cable can include the connector system 763 described in FIGS. 18A-18D at only one end. The other end of this connector may include a surface mount type or mezzanine type connector for connection to a printed circuit board (or module), or, for example, a board or module connector as shown in Figure 17F. It can be adapted to the connection to the contact.
19A and 19B show a direct connect signal system according to another embodiment of the present invention. FIG. 19A is a top view of integrated circuit package 820, which package has a large number of integrated circuit dies 823A and 823B located on a shared package substrate (FIG. 19A shows two dies. However, in other embodiments, any number of dies can be provided). In such integrated circuit packages (which we refer to as multi-chip modules (MCM) in the text), the interconnection between those dies 823 is usually by one or more layers on which the traces of the shared board 821 are printed. Will be done. One drawback to this approach is that once mounted on board 821, fast testing of individual dies 823 is made difficult by connecting to one or more other dies 823. Other dies 823 may, in some cases, be placed in high impedance nodes (eg, all three-state I / O circuits), but board traces to such other dies 823 Tends to act as a stub during fast signaling tests, which degrades signal quality and makes testing at runtime frequencies difficult or impossible. Individual dies can also be tested using wafer probing techniques, but the relatively high inductance of these probes usually interferes with testing at runtime frequencies. As a result, multi-chip modules are often fully assembled and tested in their integrated form. The problem with this approach is that if any of the dies in the multi-chip module are defective, the entire multi-chip module is usually discarded.
In one embodiment of the invention, many of the testability problems associated with multi-chip modules are overcome by establishing high-speed links (eg, signal paths) between dies using direct connect cables. To be (or at least alleviated). Therefore, as indicated by the discontinuity 825 (x ----- x) in FIG. 19A, the substrate trace connections between the dies are left incomplete, and instead those traces are direct connect. It is terminated in contact zones (827A, 827B) configured to contact the electrical signal conductors in the cable. FIG. 19B is a side view of the arrangement of FIG. 19A, showing the arrangement of the direct connect cable 841. The direct connect cable 841 includes a pair of connectors 843A, 843B, which are contact zones 827A, established by each pair of traces extending from the contacts of the integrated circuit dies 823A, 823B. Permanently or removablely fixed to the 827B. With this arrangement, when each die 823 is mounted on the package board 821, the high speed circuit tester (not shown) will use a direct connect test cable (eg, a cable used to interconnect the package die 823 to each other). It can be coupled to the corresponding contact zone 827 using a 841 compatible cable) and tested at runtime frequencies. If this die passes the test, another die is attached to the package and the other die is tested in the same way with the direct connect cable 841 coupled between pairs or groups of passed dies. If one die does not pass the test, remove it from the board and replace it with another. Alternatively, the partially assembled module can be discarded. In any case, individual dies can be tested at runtime frequencies without having to complete the assembly of the entire multi-chip module. Note that the multi-chip module 820 shown in FIGS. 19A and 19B is a planar style module (ie, all dies are mounted on the same plane, eg, the surface of a common substrate 821). Direct connect cables can also be used to form fast signal paths between dies mounted on different planes of stacked multi-chip modules.
Figure 20 shows a test arrangement, which can be used to test integrated circuit packages 879A, 879B with circuit boards that should be interconnected via direct connect cables. A similar arrangement can be used to test dies mounted on the board of multi-chip modules that should be interconnected via direct connect cables. Dotted line 881 indicates the conductor path of the direct connect connection cable to be installed, and 883 indicates installation of the direct connect cable to a high-speed test device (for example, a device that generates a test signal of a programmed pattern). Since the interconnection between the integrated circuit packages 879A and 879B has not yet been established, the package 879A does not need to be driven into a high impedance state to test the 879B. Also, unlike board-level testing, which uses a probe to contact a test point on the printed circuit board 877, parasitic capacitance and signal reflection from the stub portion of the printed circuit board trace is avoided, which Allows fast test equipment to perform signaling tests at runtime frequencies. After testing package 879B, remove the direct connect cable connection to integrated circuit package 879B and establish a direct connect cable connection to integrated circuit package 879A. In this way, board-level integrated circuit package tests can be performed at runtime frequencies in one integrated circuit package at a time. Direct connect cables can be secured between each pair (or group of integrated circuit packages) of integrated circuit packages that have passed package-level testing.
Although the present invention has been described above with reference to specific exemplary embodiments, it is clear that various modifications and modifications can be made without departing from the gist and scope of the invention described in the claims. .. Therefore, the specification and drawings should be taken as an example, not in a limited sense.
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Every citation, both ways
| Document | Relation | Office |
|---|---|---|
| JP07030224A | Cites | Japan |
| JP2001352001A | Cites | Japan |
| JP11340601A | Cites | Japan |
| JP10270496A | Cites | Japan |
| JP05036857A | Cites | Japan |
| JP2000091751A | Cites | Japan |
| JP2001244409A | Cites | Japan |
| JP2001185648A | Cites | Japan |
18 members in 6 offices
Priority claims4
| Document | Office | Kind | Date |
|---|---|---|---|
| 60376482 | United States of America | – | |
| 37648202 | United States of America | P | |
| 60400180 | United States of America | – | |
| 40018002 | United States of America | P |
Members18
| Document | Office | Kind | |
|---|---|---|---|
| WO03094203A2 | World Intellectual Property Organization (WIPO) | A2 | |
| AU2003223783A1 | Australia | A1 | |
| AU2003223783A8 | Australia | A8 | |
| US2003222282A1 | United States of America | A1 | |
| WO03094203A3 | World Intellectual Property Organization (WIPO) | A3 | |
| EP1506568A2 | European Patent Office (EPO) | A2 | |
| JP2005524239A | Japan | A | |
| CN1659810A | China | A | |
| US2006091507A1 | United States of America | A1 | |
| US7307293B2 | United States of America | B2 | |
| EP1506568A4 | European Patent Office (EPO) | A4 | |
| US2009108416A1 | United States of America | A1 | |
| US7750446B2 | United States of America | B2 | |
| JP2010192918A | Japan | A | |
| US7989929B2 | United States of America | B2 | |
| CN1659810B | China | B | |
| JP5437137B2This record | Japan | B2 | |
| EP1506568B1 | European Patent Office (EPO) | B1 |
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Numbers
- Publication
- 5437137
- Application
- 89212
Titles2
- Japanese
- ダイレクト・コネクト形信号システム
- English
- Direct connect signal system
Classification
- CPC, 23
- H05K1/147
- H05K1/0228
- H05K1/0237
- H05K3/222
- H05K2201/10356
- H05K2201/1053
- H05K2201/10734
- H05K2201/10378
- H10W70/657
- H10W90/734
- H10W90/736
- H10W90/724
- H10W72/07251
- H10W72/20
- H10W72/075
- H10W72/951
- H10W72/536
- H10W90/756
- H10W74/15
- H10W72/877
- H10W72/884
- H10W74/00
- H10W72/551
- IPC, 4
- H01L23 12
- H10W70 60
- H05K3 22
- H10W74 00
