Nitride nanowires and method of producing such
Abstract
The present invention relates to the growing of nitride semiconductors, applicable for a multitude of semiconductor devicessuch as diodes, LEDs and transistors. According to the method of the invention nitride semiconductor nanowires are grown utilizing a CVD based selective area growth technique. A nitrogen source and a metal-organic source are present during the nanowire growth step and at least the nitrogen source flow rate is continuous during the nanowire growth step. The V/III-ratio utilized in the inventive method is significantly lower than the V/III-ratios commonly associated with the growth of nitride based semiconductor.

Term
Projected expiry 14 January 2028.
- Priority
- Filed
- Granted
- Today
- Projected expiry
10 claims: 2 independent, 8 dependent
- 1選択領域を成長させる技術をベースとする化学蒸着法(CVD)を利用して複数の窒化基半導体のナノワイヤを成長させる方法であって、 ナノワイヤの成長工程中に窒素源と有機金属源とが存在し、 前記方法は、 (a)基板(110)上に成長マスク(111)を提供する提供工程と、 (b)前記成長マスク(111)中に複数の開口(113)を生成する生成工程と、 (c)複数のナノワイヤを成長させる成長工程と、を有し、 前記窒素源と前記有機金属のプレカーサ源とが連続して流れており、 前記方法は、前記ナノワイヤを成長させる成長工程(c)の後に、前記複数のナノワイヤ上にシェル層を形成する少なくとも1つの成長工程を含む平らな成長工程を実施する工程をさらに有し、 前記平らな成長工程中のV/III比は、前記ナノワイヤ成長工程のV/III比よりも高い、ことを特徴とする方法。
- 2窒素源の流量と金属有機源の流量との比であるV/III比が1~100の範囲内であることを特徴とする請求項1に記載の窒化基半導体のナノワイヤを成長させる方法。
- 3前記V/III比が1~50の範囲内であることを特徴とする請求項2に記載の窒化基半導体のナノワイヤを成長させる方法。
- 4前記V/III比が5~50の範囲内であることを特徴とする請求項3に記載の窒化基半導体のナノワイヤを成長させる方法。
- 5前記V/III比が前記ナノワイヤの成長工程中、一定であることを特徴とする請求項1乃至請求項4のうちのいずれか1項に記載の窒化基半導体のナノワイヤを成長させる方法。
- 6前記窒化基半導体がGaNであり、前記窒素源がアンモニア(NH 3 )であり、前記有機金属源がトリメチルガリウム(TMG)であることを特徴とする請求項1乃至請求項5のうちのいずれか1項に記載の窒化基半導体のナノワイヤを成長させる方法。
- 7前記窒素源と前記有機金属のプレカーサ源とのうちの少なくとも1つが流れているが、ナノワイヤの成長が全く現れないような条件に調整されている前処理工程(C’)をさらに有することを特徴とする請求項1に記載の窒化基半導体のナノワイヤを成長させる方法。
- 8前記 前処理工程(C’)は、アニーリング工程を含むことを特徴とする請求項 7 に記載の窒化基半導体のナノワイヤを成長させる方法。
- 9前記平らな成長工程のV/III比は、前記ナノワイヤ成長工程のV/III比よりも少なくとも10倍高いことを特徴とする請求項1に記載の窒化基半導体のナノワイヤを成長させる方法。
- 10前記窒化基半導体のナノワイヤの成長条件を安定させるために、ドーピング源を導入することを特徴とする請求項1乃至請求項9のうちのいずれか1項に記載の窒化基半導体のナノワイヤを成長させる方法。
Independent claims10
36 paragraphs, as filed
0001The present invention relates to semiconductor devices based on nitride semiconductor nanowires and methods of producing nitride semiconductor nanowires by growth. Nitride semiconductor nanowires can be used, for example, as diodes, LEDs (light emitting diodes), LDs (laser diodes), and transistors. In particular, the present invention relates to a method of producing upright GaN nanowires with limited lateral growth.
0002The use of nitride semiconductors in semiconductor devices, especially optoelectronic devices, has been relatively long, at least not dependent on the potential for activating components in wavelength regions that are inaccessible to conventional semiconductor materials. , A lot of attention has been paid. In the 1990s, two breakthroughs were made regarding the growth of nitride semiconductors. Manufacture of high quality GaN film and realization of p-type GaN. Following these, blue and green LEDs and laser diodes have been commercialized and AlN UV LEDs (ultraviolet light emitting diodes) have begun to be reported. Nitriding semiconductors are also of interest to transistors and other electronics in high voltage and high temperature applications.
0003GaN films are usually grown by industrial scale MOCVD (Metalorganic Chemical Deposition) technology. To obtain satisfactory membrane quality, growth is NH<sub>3</sub>It is done using a high precursor flow rate such as TMG (trimethylgallium) or TMG, that is, a high partial pressure. A commonly used measurement method is the so-called "V / III ratio" associated with the molar flow rates of multiple precursor elements, such as NH.<sub>3</sub>The molar ratio between TMG and TMG. The V / III ratio used for GaN film growth is in the range 1000-10000.
0004However, today's highest level GaN films still have very high density defects. Against this background, nitride-based nanowire one-dimensional structures have received a lot of attention from researchers. Methods such as VSL, template-confinement growth, and oxide-assisted growth have been reported for GaN nanowire growth.
0005In addition, the growth of selective regions of GaN has been extensively studied since the 1990s to reduce dislocation densities in GaN films. Akasaka et al. Showed the growth of a GaN cylinder having a diameter of 5 μm from a plurality of dot-patterned GaN openings (Non-Patent Document 1). Recently, Hersee et al. Reported a method for manufacturing an array of a plurality of GaN wires having a size of 221 nm by utilizing the growth of the selected region (Non-Patent Document 2). The report states that pulsed growth must be used to limit lateral growth relative to the growth of GaN nanowires. Pulsed growth is also referred to as migration enhanced growth. This method is described as a two-step method and involves a first nanowire growth step called a selective growth step that provides both precursor gases. The first growth step is followed by a second step of pulsed growth, in which multiple precursor gases are provided simultaneously.
<p num="0006"><nplcit num="1"><text>T.Akasaka, Y.Kobayashi, S.and N.Kobayashi, Appl.Phs. Lett.71 (1997) 2196.</text></nplcit><nplcit num="2"><text>SDHersee, X.Sun and X.Wang, Nano Lett.6 (2006) 1808.</text></nplcit><nplcit num="3"><text>K.Hiramatsu, K.Nishiyama, A.Motogaito, H.Miyake, Y.Iyecchika and T.Maeda, Phys. (A) 176 (1999) 535.</text></nplcit><nplcit num="4"><text>GWSears, Acta Metallurgica, 3 (1955) 367.</text></nplcit><nplcit num="5"><text>Y.Xia, P.Yamg, Y.Sun, Y.Wu, B. Mayers, B. Gates, Y.Yin, F.Kim and H. Yan, Adv. Mater. 15 (2003) 353.</text></nplcit><nplcit num="6"><text>B.Beaumont, S. Haffouz, and P. Gibart, Appl. Phys. Letter 72 (1997) 922.</text></nplcit></p>
<p num="0007"><u style="single">wrap up</u> The reported achievements show the great potential of this technology, but to provide a method for producing epitaxial, vertically upright GaN film nanowires without crystal defects such as stacking defects and dislocations, and industrially. Improvements are needed to provide a well-fitted method for scaling up to production.</p>
<p num="0008"> An object of the present invention is to provide semiconductor devices and methods that overcome the shortcomings of the prior art. This is achieved by the method defined in claim 1 and the semiconductor device defined in claim 15.</p><p num="0009"> The nitride semiconductor nanowires based on the present invention have the same crystal structure over the entire length. That is, the nanowires do not show stacking defects near the base. Preferably, the crystal structure is hexagonal. Nanowires having the same crystal structure over the entire length can be produced by the methods described below based on the present invention.</p><p num="0010"> The semiconductor device based on the present invention includes a plurality of nitride semiconductor nanowires each having the same crystal structure over the entire length. Most nanowires have only one crystal structure. More preferably, at least 90% of the nanowires in the semiconductor device have the same crystal structure. More preferably, 99% of the nanowires in the semiconductor device have the same crystal structure. Semiconductor devices, such as LED (light emitting diode) devices with multiple nanowires, can be manufactured by the method according to the present invention.</p><p num="0011"> The method for growing a plurality of nitride semiconductor nanowires based on the present invention utilizes a chemical vapor deposition method (CVD) based on a selection region growth technique. The nitrogen source and the organometallic source are supplied during the nanowire growth process, and at least the flow rate of the nitrogen source is continuously supplied during the nanowire growth process. The V / III ratio utilized in the method of the present invention is substantially smaller than the V / III ratio generally associated with the growth of nitride semiconductors.</p><p num="0012"> One embodiment of the method of the invention comprises a flat growth phase following the nanowire growth phase described above. The flat growth phase utilizes a V / III ratio that is substantially higher than the V / III ratio of the nanowire growth phase. The flat growth phase primarily results in the lateral growth of previously grown nanowires so that the nanowires are at least partially surrounded by new layers. Flat growth can be repeated with a composition of different substances, doping, etc. that give a structure such as a shell. According to one embodiment, nanowires combined with one or more shell layers form a pn junction of the LED. Also, electronics of other active semiconductors such as transistors and optoelectronic devices can be made in the same way.</p><p num="0013"> One advantage offered by the method of the present invention is the ability to grow nitride semiconductor nanowires free of crystal defects such as dislocations and stacking defects. Therefore, it is possible to manufacture a nitride semiconductor device containing a plurality of nanowires having a very small proportion of defective nanowires and a large number of nanowires.</p><p num="0014"> Another advantage of the method based on the present invention is that the total growth rate of the nitride nanowires is significantly higher than that of the prior art method of growing the nitride nanowires. A growth rate of 200 nm / min was shown.</p><p num="0015"> The method according to the invention, which utilizes a low V / III ratio and a low source flow rate, consumes less material than similar prior art methods. Moreover, the continuously supplied V / III ratio is easier than the pulse growth method, which optimizes two growth conditions.</p><p num="0016"> The method based on the present invention is also effective for structures containing two or more elements, for example, ternary compositions such as InGaN. The use of InGaN for nanowires has the advantage of reducing shell layer strain. However, since InGaN is a thermally unstable substance, NH is used to prevent dissociation of In-N bonds.<sub>3</sub>Requires flow rate. Therefore, NH<sub>3</sub>Prior art methods that use interrupted flow rates are not suitable for producing InGaN nanowires. In the method of the present invention, a continuously existing nitrogen source, for example NH<sub>3</sub>Since the flow rate is used, NH<sub>3</sub>The effects of interrupting the flow rate can be eliminated or at least reduced.</p><p num="0017"> The method based on the present invention is based on MOCVD (Metalorganic Chemical Vapor Deposition) technology. MOCVD is used industrially and this method is well suited for industrial scale production.</p><p num="0018"> The embodiments of the present invention define the scope of the dependent claims. Other objects, advantages, and new features of the invention will become apparent from the following detailed description of the invention when considering the accompanying drawings in relation to the claims. Preferred examples of the present invention are described below with reference to the accompanying drawings.</p>
0019<figref num="1">It is a figure which shows schematicly the nanowire based on this invention.</figref><figref num="2a">It is a figure which shows schematicly the method based on this invention.</figref><figref num="2b">It is a flowchart of the method based on this invention.</figref><figref num="3a">、</figref><figref num="3b">It is a figure which shows the SEM image of the nanowire structure based on this invention.</figref><figref num="4a">、</figref><figref num="4b">It is a figure which shows typically the example of the nanostructured LED contained in the nanostructured LED which is based on this invention.</figref><figref num="5a">、</figref><figref num="5b">It is a figure which shows the schematic example of the LED of the nanostructure based on this invention.</figref><figref num="6">It is a figure which shows schematicly the nanowire growth apparatus based on this invention.</figref><figref num="7a-b">It is an SEM image showing the result of the growth condition without giving nanowires.</figref><figref num="8a-b">It is an SEM image showing the result of the growth condition that nanowires are starting to form.</figref><figref num="9a-b">It is an SEM image which shows the result of the growth condition which gives nanowire.</figref><figref num="10a-c">It is an SEM image which shows the result of the growth condition which gives nanowire.</figref><figref num="11a">、</figref><figref num="11b">、</figref><figref num="11c">It is an SEM image showing the effect of doping of the source.</figref>
0020A semiconductor device and a method for manufacturing the same according to the present invention include at least one nitride semiconductor nanowire, for example, a GaN nanowire.
0021Nitride semiconductor nanowires 110, schematically shown in FIG. 1, are defined in this context as essentially round shaped structures with diameters less than 500 nm and lengths up to a few μm. The nanowire 110 is epitaxically connected to the substrate 105 at its base, which is composed of a plurality of epitaxial layers, for example, the GaN film is closest to the nanowire 110. The nanowire 110 protrudes, for example, through an opening in the SiNx growth mask 111. Semiconductor devices based on the present invention typically include a plurality of nanowires 110. As shown in FIG. 1, the surface of the substrate 105 shows a roughness 112 that is somewhat highlighted in the figure for convenience of explanation. In the following specification, the term nanowires should be understood as indicating a structure that is not limited by surface roughness. That is, the nanowires begin in the first atomic layer above the substrate 110 or in the first "free" layer represented as an alternative. However, this first layer can usually be in the openings of the growth mask 115. The length of the nanowire is indicated by L.
0022Nitride nanowires manufactured in the prior art usually contain many defects. The pulsed selective growth cited above has been significantly improved, but the method produces stacking defects near the base of the nanowires. Nanowires produced in such a manner usually have variations from cubic to hexagonal crystal structures near the base. Semiconductor devices containing such multiple nanowires exhibit this type of defect in a significant portion or all of the multiple nanowires. Stacking defects affect the physical properties of nanowires with respect to their optical and electrical properties. For example, even in LED applications, relatively small deformations (distortions) introduced by stacking defects near the base can interfere with performance as the stacking defects increase electrical resistance. Since the area is so small, the increased resistance can have a substantial effect on the performance of the LED.
0023Nitride semiconductor nanowires based on the present invention have the same crystal structure over their entire length and show no stacking defects near the base. Preferably, the crystal structure is hexagonal. Nanowires having the same crystal structure over the entire length can be produced by the methods described below based on the present invention.
0024The semiconductor device based on the present invention includes nanowires 105 having the same crystal structure over the entire length of the nanowires. Most of the multiple nanowires should have one crystal structure. More preferably, at least 90% of the plurality of nanowires in the semiconductor device each have the same crystal structure. More preferably, 99% of the nanowires in the semiconductor device each have the same crystal structure. Semiconductor devices, such as LED devices with multiple nanowires, can be manufactured using the methods according to the invention.
0025The method for growing nanowires of a plurality of nitride semiconductors based on the present invention utilizes chemical vapor deposition (CVD), which is based on a technique for growing selected regions. The nitrogen source and the organometallic source are present during the nanowire growth process, and at least the nitrogen source flow rate is continuously present during the nanowire growth process. The V / III ratio utilized in the method of the present invention is substantially lower than the V / III ratio commonly associated with the growth of nitride semiconductors.
0026Therefore, the method based on the present invention is directly applicable to metalorganic organic chemical deposition (MOCVD) processes and devices. This method is also applicable to hydride vapor phase epitaxy (HVPE) based on other CVD or processes involving modifications apparent to those skilled in the art. This method is shown in the schematic of FIG. 2a and the flowchart of FIG. 2b and includes the following steps: a) A growth mask 111 is provided on the substrate 105. The substrate is, for example, GaN and the growth mask is SiNx or SiOx. b) Create multiple openings 113 in the growth mask. The plurality of openings are preferably well controlled with respect to both the opening diameter and the relative position of the openings. Some techniques known in the art, including electron beam lithography (EBL), nanoimprint lithography, optical lithography, and reactive ion etching (RIE) or wet chemical etching methods, are limited to this procedure. Can be used without. Preferably, the plurality of openings have a diameter of 100 nm and a pitch spacing of 0.5-5 μm. The plurality of openings define the position and diameter of the nanowire 105 to be produced. c) The growth of nanowires by CVD (Chemical Vapor Deposition) is based on a process in which the precursor flow rate is continuous. The precursor flow rate is adjusted to achieve low supersaturation in the growth zone. The V / III ratio is in the range of 1 to 100, preferably in the range of 1 to 50, more preferably in the range of 5 to 50. It should be noted that this V / III ratio is significantly lower than the V / III ratio used for membrane growth.
0027The nanowires produced by the method based on the present invention are shown in the SEM images of FIGS. 3a and 3b. SiNx (30 nm thickness) is deposited on the starting substrate layer by the PECVD method. In subsequent steps, an array of dot-patterned GaN openings (approximately 100 nm in diameter) is created by electron beam lithography, electron beam lithography (EBL) and reactive ion etching (RIE). The pitch between the openings ranges from 0.5 to 3.2 μm, providing a growth mask that defines both the diameter and position of multiple nanowires. The pretreated sample is then inserted into a horizontal MOCVD (Metalorganic Chemical Deposition) chamber to grow GaN nanowires. FIG. 3a further shows that nanowires with pyramid ends that are advantageous in some applications can be formed.
0028This method can include various steps to enhance the growth conditions and is illustrated as a pretreatment such as annealing before the nanowire growth step c). The pretreatment step can include a plurality of sub-steps. It should be noted that although one or more precursors can be used in pretreatments such as annealing, the pretreatment steps according to the invention do not result in nanowire growth. In addition, fluctuations in the V / III ratio can be assumed during the nanowire growth step c). However, the flow rate of precursor material should not be interrupted during the nanowire growth process.
0029Nanowires based on the present invention can be used in many different applications. Applications of particular interest include, but are not limited to, electronic, optical and opto-electrical devices including diodes, light emitting diodes (LEDs), transistors, photonic crystals, and detectors. Nanowires can also be used as structural building blocks, for example to form coalesce continuous layers of GaN with very low defect densities. Methods for forming coalesced layers from nanowires are described in US Patent Application No. 10/613071.
0030An application of high commercial value is an LED device, which can be used as an unlimited embodiment. Transistors and other electronic devices can be manufactured in a similar manner, as will be appreciated by those skilled in the art.
0031LED devices including semiconductor nanowires based on the present invention are schematically shown in FIGS. 4a and 4b. The LED device includes a substrate 105, and nanowires 110 grow epitaxially from the substrate 105. Part of the nanowire 110 is a volume element Surrounded by element) 115. The volume element 115 is preferably epitaxically connected to the nanowire 110. The pn junction required for diode functionality is formed in the volume element or nanowire 110. Top-contact is provided on the volume element 115, for example, on the top or in a wrapping configuration on the surrounding outer surface. The nanostructured LED100 can contact other ends while forming a common bottom contact, for example, through a substrate through a dedicated communication layer close to the substrate, or by wrap contact at the lower end of the nanowire. .. The nanowire 110 typically has a diameter on the order of 50 nm to 500 nm, and the volume element has a diameter on the order of 500 nm to 10 μm. The volume element 115 or bulb may have a different shape and a combination of volume elements and nanowires designed to provide different positions and shapes of active regions that provide the recombination conditions required for photogeneration. The volume element 115 also provides a high percentage of doping and charge carriers are injected into the nanowires.
0032Figure 4a shows the design of volume element 115 with multiple layers 116,117 in a shell-like structure. The volume element 15 is also partially surrounded by the contact layer 118. The doping layer 117 provides the p or n region, and the well layer 116 includes the active region 120 during operation. Alternatively, the well layer 116 can be made up of multiple sublayers. This structure may include other layers (not shown) to improve contact in order to enhance doping properties. These structures are also called core-shell structures.
0033Another design is shown in Figure 4b. In FIG. 4b, the nanowires 110 are surrounded by a pyramid-shaped overgrowth that forms the volume element 115. Similar to the above, the overgrowth of the pyramid shape may include multiple layers 166, 117, 118 that provide the necessary doping and quantum wells for the LED functionality obtained in the active region 120. ..
0034According to one embodiment of the method of the invention, the growth step may further include the step of providing overgrowth or volume elements on the nanowires. This method involves two phases as described with reference to the flowchart in Figure 2b. The first phase, which includes steps a) to c), which can be considered as the nanowire growth phase, provides nanowire growth conditions with a low V / III ratio. In the second phase, the nanowires are usually placed by a volume element 115 containing multiple different layers in a CVD-based process similar to the growth process in the first phase, preferably in the same growth chamber, but nanowires. Overgrown with growth parameters adjusted for flat growth, usually with a V / III ratio of 1000 orders higher than growth. The embodiment-based method can be understood as a nanowire growth phase followed by a flat or lateral growth phase. Since the multiple sidewalls of multiple nanowires are non-polar, so-called m-plane {1-100}, the nanowire growth phase, which produces multiple nanowires with multiple surfaces, is nearly ideal for flat growth. (Note that "-1" in the display of the m-plane is displayed as "1 with a superscript-" which is read as "Ichiba" in the original language display, but in this specification, "-" is displayed. It shall be displayed using the abbreviation of "1"). Such surfaces are very difficult to produce by idiomatic methods. In the flat or lateral growth phase following the nanowire growth phase, the ideal multiple surfaces form part of the LED device, the growth of the shell layer in steps d), e), f) ... Used for. Those skilled in the art can understand that other devices such as diodes and transistors are produced in the same way.
0035The method based on the present invention can also be applied to a structure containing two or more elements, for example, a ternary composition such as InGaN. Strain is a serious problem for creating high In-content InGaN / GaN core-shell structures in which the GaN nanowire 510 is surrounded by a shell InGaN layer 516, as illustrated in Figure 5a. is there. The use of InGaN again in nanowires 511 reduces strain in the shell InGaN layer, as illustrated in FIG. 5b. However, InGaN is a thermally unstable material and NH<sub>3</sub>The flow rate is necessary to prevent the dissociation of the In-N bond. Therefore, NH<sub>3</sub>Prior art methods that use interrupted flow rates are not suitable for producing InGaN nanowires. NH at the growth temperature of InGaN<sub>3</sub>In the step of interrupting the flow rate, it is assumed that the In-N bond is dissociated and In is eliminated from the crystal. Continuous NH as provided by the present invention<sub>3</sub>By using the nanowire growth method in which the flow rate exists, it is possible to support the growth of InGaN nanowires having a high In content.
0036Conventional MOCVD (Metalorganic Chemical Deposition) or MOVPE equipment is not optimal for carrying out this method based on an embodiment involving a nanowire growth phase followed immediately by a flat growth phase. Due to the technical limitations of gas supply systems, it is difficult for the same gas supply system to provide both a low V / III ratio for the nanowire growth phase and a high V / III ratio for the flat growth phase with the required accuracy. The growth apparatus according to the invention, schematically illustrated in FIG. 6, includes a growth chamber 610 in which the sample 615 is located. The III supply system 622 includes a III supply source 620 and a mass flow controller (MFC). The V supply system includes a V source connected to a low flow V supply line 634, including a low flow MFC633, and another high flow V supply line 632, including a high flow MFC631. The low flow MFC633 is, for example, the NH associated with the nanowire growth phase.<sub>3</sub>Adapted to control low flow rates, the high flow rate MFC631 is adapted to control high flow rates associated with the flat growth phase. By switching between two separate V supply lines from the nanowire growth phase to the flat growth phase, it is possible to quickly switch with the exact flow rate accuracy required for the two different phases. Of course, the device can provide more separate supply lines if the required flow rate cannot be obtained with two mass flow controllers (MFCs).
0037It should be understood that the application of the methods of the invention is illustrated by the following examples, but is not limited to the examples.
0038Figure 2a-b shows the procedure for producing GaN nanowires by growing the selected region. A GaN epitactic film on sapphire, SiC or silicon and self-supporting GaN (self-supporting GaN) are used as starting substrates, and a layer of SiNx (thickness 30 nm) is deposited on the starting substrate by the PECVD method (a). Subsequently, an array of dots-patterned GaN openings (diameter of about 100 nm) is generated by electron beam lithography (EBL) and reactive ion etching (RIE) (b). The pitch between the openings is in the range of 0.5 to 3.2 μm. The pretreated sample is then inserted into a homemade horizontal MOCVD chamber to grow the GaN membrane nanowires (c). The growth process includes the first phase. In the first phase, a high NH of 75 sccm<sub>3</sub>Raise the temperature to a growth zone of 900-1200 ° C within 5 minutes while supplying a flow rate. Anneal the substrate at growth temperature for 1 minute. In the subsequent nanowire growth phase, NH<sub>3</sub>The flow rate is reduced to 3.0-0.2 sccm, and TMG (trimethylgallium) is introduced into the chamber to start growth. The low TMG flow rate used for this process ranges from 0.12 to 1.2 μmol / min.
0039According to the present invention confirmed experimentally, NH<sub>3</sub>Flow rate is a decisive factor for controlling the morphology of growth from multiple openings. Figure 7a-b shows a 3.0 sccm NH<sub>3</sub>The SEM image of the sample grown using the flow rate is shown. From the top view of FIGS. 7a-b (FIG. 7a), selective growth can be seen from multiple openings, but the selective growth is the same as reported. The point required to be identified here is that the lateral size after growth is greater than 1.0 μm, which is much larger than the opening size of about 100 nm. Therefore, the lateral growth after the GaN film grows out of the opening is considerable. Figure 7b, which shows the SEM image obtained by tilting the sample in Figure 7a-b by 35 °, clearly shows that a pyramid was obtained instead of a wire. The pyramids are separated by six equivalent (1-101) planes (note that the "-1" in the plane display is read as "Ichiba" in the original language display "1 with a superscript-" Although it is indicated by, in this specification, it is indicated by using the abbreviation of "-1"). (1-101) Planar dangling bond density is 16.0 / nm<sup>2</sup>And the dangling bond density (12.1 / nm) in the (1-100) plane<sup>2</sup>) And (0001) plane dangling bond density (11.4 / nm)<sup>2</sup>) Greater than. From this point of view, the (1-100) and (0001) planes are expected to appear after the GaN film grows out of the opening. However, Figure 2 shows the opposite. Therefore, a possible interpretation is that the (1-101) plane is NH.<sub>3</sub>It has an N-polarization that stabilizes the plane at high flow rates. Based on this, NH<sub>3</sub>The 3 sccm flow rate is actually still high for growing GaN membrane wire faceted by the (1-100) plane. Figure 8a-b shows a 1.0 sccm NH<sub>3</sub>It is a figure which shows the characteristic of the SEM image of the sample grown by the flow rate. The top view of Figures 8a-b (Figure 8a) is similar to the image in Figure 7a, but the 35 ° tilted image (Figure 8b) is different, i.e., in the (1-100) plane. Vertical facets begin to appear beneath the pyramid cap.
0040This is expected and indicated that the N-polarized (1-101) plane begins to be unable to demarcate the growth morphology of the pyramid. Despite this, the lateral size is the same, as shown in FIG. 7, and is still significantly larger than one opening of multiple openings.
0041Figure 9a-b shows NH<sub>3</sub>The growth results are shown with the flow rate further reduced to 0.5 sccm. Both the image from above (Fig. 9a) and the image tilted at 35 ° (Fig. 9b) are larger than the size of the opening at about 100 nm, but show a laterally contracted size. Also, FIG. 9b of the tilted image shows vertical facets. NH<sub>3</sub>When the flow rate is reduced to 0.2 sccm, real GaN nanowires begin to synthesize as shown in Figures 10a-c (Figure 10a from above, Figures 10b and 10c tilted 45 °). Although there are some crystals larger than 100 nm, most openings have evolved into wires with a diameter of 100 nm, which is the same as the opening size. So NH<sub>3</sub>Lateral growth is also well controlled when the flow rate is 0.2 sccm. For vapor phase growth, supersaturation determines the general growth morphology, i.e., low supersaturation is required for nanowire growth, while moderate supersaturation supports bulk crystal growth. At high supersaturation, nucleation in the gas phase results in powder formation (Non-Patent Documents 4 and 5). Based on this, NH<sub>3</sub>It makes sense to reduce the flow rate to 0.2 sccm to effectively reduce the degree of supersaturation, which limits lateral growth and causes only axial growth. Here, throughout the growth, during the entire growth process, TMG and NH<sub>3</sub>The flow rate of the above is controlled to continuously flow into the chamber at the same time. However, studies reported in the prior art appear to indicate that a pulsed growth mode is required to obtain nanowire growth. Based on the results presented herein, it is clear that nanowire growth is achieved by continuously supplying a source flow rate. NH for manufacturing GaN nanowires<sub>3</sub>Flow rates should be adjusted to achieve low supersaturation or instead achieve migration enhanced growth as described.
0042Cp<sub>2</sub>Mg has been shown to enhance the formation of vertical side wall facets (Non-Patent Document 6). Figure 11a-c shows Cp in relation to Table 1.<sub>2</sub>Doping sources such as Mg have been shown to potentially stabilize nanowire growth conditions due to this effect. In addition, supersaturation / NH<sub>3</sub>It is further shown that pyramidal growth can be reconstructed by increasing the flow rate. It can be utilized to provide lateral growth of nanowires during the lateral growth phase.
0043<tables num="1"><img id="000002" he="72" wi="152" file="JP5345552B2_D0001.tif" img-format="tif" img-content="drawing" /></tables>
0044The plurality of nanowires made by the method of the present invention can be used in a wide range of devices, such as diodes, LEDs, transistors, especially field effect transistor transistors. Nitride-based electronics are of particular interest for high voltage and high temperature applications.
0045In conclusion, NH<sub>3</sub>By reducing the flow rate, GaN nanowires can be produced by MOCVD (Metalorganic Chemical Deposition), which uses the growth of selective regions from GaN openings. The key to growing GaN nanowires is to control the degree of supersaturation. Previously, it was only achieved by using a pulsed growth technique (Non-Patent Document 2). In the results provided herein, pulsed growth is not always a necessary method and is sufficiently NH.<sub>3</sub>It has been shown that lower flow rates can also produce nanowires. Along with this method, the work of growing the heterostructure of the nitride in both the axial and radial directions continues.
0046The method of the present invention is GaN, NH<sub>3</sub>, And TMG, but are not limited to these examples. Those skilled in the art can understand that the principles of the method are applicable to the growth of nanowires of other semiconductor nitride groups containing indium or aluminum such as, for example, AlInGaN, III-As, III-NP. .. NH<sub>3</sub>Is a convenient and well-recognized source of nitrogen, for example, tetrabutylamine N (C).<sub>4</sub>H<sub>9</sub>), 1,1-dimethylhydrazine (CH)<sub>3</sub>)<sub>2</sub>NNH<sub>2</sub>, Tetrabutyl hydrazine (CH)<sub>3</sub>)<sub>3</sub>CNHNH<sub>2</sub>Other known sources such as are available. Different sources are available depending on the choice of III-V semiconductors. Different sources provide appropriate values for different flow rates to achieve low supersaturation, which requires adjusting the V / III ratio. Those skilled in the art may make such adjustments based on the above teachings.
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Numbers
- Publication
- 5345552
- Application
- 2009545523
Titles2
- Japanese
- 複数の窒化物ナノワイヤとその製造方法
- English
- Multiple nitride nanowires and their manufacturing methods
Classification
- CPC, 26
- B82Y10/00
- B82B1/00
- H10H20/825
- C30B25/00
- C30B29/406
- C30B29/60
- Y10S977/932
- H10H20/01335
- H10H20/818
- H10H20/821
- H10H20/812
- H10D62/118
- H10D62/122
- H10D62/121
- H10P14/3216
- H10P14/3462
- H10P14/27
- H10P14/3416
- H10P14/271
- H10P14/24
- B82B3/00
- B82Y40/00
- H10H20/018
- H10H20/0137
- H10D62/8503
- H10P14/20
- IPC, 10
- C30B29 62
- C30B25 16
- C30B25 04
- C01B21 06
- H01L33 06
- H01L33 32
- H01L21 205
- B82B3 00
- B82B1 00
- H10P14 24