Display device

The technical field relates to display devices and methods for driving them.

In recent years, a display panel equipped with a touch sensor has attracted attention. Touch sensors include a resistive film method, a capacitance method, an optical method, etc., depending on the difference in operating principle, and data can be input when an object to be detected (pen, finger, etc.) comes into contact with the display device. ..

An example of a device having such an optical touch sensor is a display device having an image capture function by arranging a close contact type area sensor that captures an image (see, for example, Patent Document 1).

<p><patcit num="1"><text>Japanese Unexamined Patent Publication No. 2001-292276</text></patcit></p>

<p>In the case of a display panel using the touch sensor as an input device as described above, the surface of the display panel is continuously touched by the object to be detected. Therefore, the display panel is easily soiled, which may deteriorate the display quality. In addition, the display panel is required to have appropriate mechanical strength. Further, when the surface of the display panel is hard, there is a problem that the user of the display panel tends to get tired.</p><p>In view of the above problems, one of the purposes is to be able to detect the position and movement of the object to be detected even when the object to be detected is not in contact with the display panel.</p><p>Further, the display panel using the touch sensor as an input device is provided with a circuit using a transistor.</p><p>When a single crystal silicon transistor is used, the size of the area sensor is restricted by the size of the single crystal silicon substrate. That is, it is costly and impractical to form a large area sensor or an area sensor that also serves as a large display device using a single crystal silicon substrate.</p><p>On the other hand, a thin film transistor (TFT) using amorphous silicon makes it easy to increase the size of the substrate, but the electric field effect mobility of the amorphous silicon thin film is low, which limits the circuit design and occupies it. The area increases.</p><p>Further, in the thin film transistor using polycrystalline silicon, a method of crystallization by excimer laser annealing is often used, and the thin film transistor has a variation in characteristics derived from excimer laser annealing. Therefore, it is difficult to generate the detected light intensity distribution as an electric signal with good reproducibility in a photosensor using a circuit composed of thin film transistors having variations in characteristics.</p><p>One aspect of the present invention is to provide a display panel using a touch sensor as an input device, which can be mass-produced on a large substrate and has homogeneous and stable electrical characteristics.</p><p>One aspect of the present invention is to provide a display device using a touch sensor capable of high-performance and high-speed response as an input device.</p>

<p>In a display device using a touch sensor as an input device, a circuit having a transistor using an oxide semiconductor layer is provided.</p><p>Oxide semiconductors deviate from the stoichiometric composition in the thin film forming process. For example, the electrical conductivity of an oxide semiconductor changes due to excess or deficiency of oxygen. In addition, hydrogen and water mixed during the formation of a thin film of an oxide semiconductor form an oxygen (O) -hydrogen (H) bond to become an electron donor, which is a factor for changing the electrical conductivity. Furthermore, since OH is a polar molecule, it becomes a factor of variation in characteristics for active devices such as thin film transistors made of oxide semiconductors.</p><p>In order to suppress fluctuations in the electrical characteristics of the thin film using the oxide semiconductor layer disclosed in the present specification, impurities such as hydrogen, water, hydroxyl groups or hydrides (also referred to as hydrides) that cause fluctuations are oxides. By supplying oxygen, which is a main component material constituting an oxide semiconductor, which is intentionally removed from the semiconductor layer and simultaneously reduced by the impurity removal step, the oxide semiconductor layer is highly purified and electrically. Become type I (intrinsic).</p><p>Therefore, the smaller the amount of hydrogen and carriers in the oxide semiconductor, the better, and the thin film transistor disclosed in the present specification contains 5 × 10 hydrogen contained in the oxide semiconductor.¹⁹/cm³Below, preferably 5 × 10¹⁸/cm³Below, more preferably 5 × 10¹⁷/cm³Below, or 5x10¹⁶/cm³If it is less than, the hydrogen contained in the oxide semiconductor is removed as much as possible as it approaches zero, and the carrier concentration is 5 × 10.¹⁴/cm³Less than, preferably 5x10¹²/cm³It is a thin film transistor in which a channel formation region is formed by the following oxide semiconductor layers.</p><p>In the reverse characteristic of the thin film transistor, the smaller the off current, the more preferable. The off-current (also referred to as leakage current) is the current flowing between the source and drain of the thin film transistor when any gate voltage between -1V and -10V is applied, and is the oxidation disclosed in the present specification. The current value per 1 μm of the channel width (w) of the thin film transistor using the physical semiconductor is 100 aA / μm or less, preferably 10 aA / μm or less, and more preferably 1 aA / μm or less. Furthermore, since there is no pn junction and there is no hot carrier deterioration, the electrical characteristics of the thin film transistor are not affected by these.</p><p>The hydrogen concentration range is obtained by secondary ion mass spectrometry (SIMS) or based on the data. In addition, the carrier concentration can be obtained by measuring the Hall effect. An example of a Hall effect measuring instrument is the resistivity / Hall measuring system ResiTest8310 (manufactured by Toyo Corporation). The resistivity / Hall measurement system ResiTest8310 is capable of AC (AC) Hall measurement that changes the direction and magnitude of the magnetic field at regular intervals and detects only the Hall electromotive voltage that appears in the sample in synchronization with it. The Hall electromotive force can be detected even for a material having a small value and a high resistivity.</p><p>Examples of the oxide semiconductor layer used in the present specification include an In-Sn-Ga-Zn-O film, which is a quaternary metal oxide, and an In-Ga-Zn-O film, which is a ternary metal oxide. In-Sn-Zn-O film, In-Al-Zn-O film, Sn-Ga-Zn-O film, Al-Ga-Zn-O film, Sn-Al-Zn-O film, and binary metals In-Zn-O film, Sn-Zn-O film, Al-Zn-O film, Zn-Mg-O film, Sn-Mg-O film, In-Mg-O film, which are oxides, and unified metals Oxide semiconductor layers such as an oxide In-O film, Sn-O film, and Zn-O film can be used. In addition, SiO is added to the oxide semiconductor layer.₂May include.</p><p>The oxide semiconductor layer is InMO.₃(ZnO)_mA thin film represented by (m&gt; 0) can be used. Here, M represents one or more metal elements selected from Ga, Al, Mn and Co. For example, M includes Ga, Ga and Al, Ga and Mn, or Ga and Co. InMO₃(ZnO)_mAmong the oxide semiconductor layers having the structure represented by (m&gt; 0), the oxide semiconductor having a structure containing Ga as M is called the above-mentioned In-Ga-Zn-O oxide semiconductor, and the thin film thereof is called In-. It is also called Ga-Zn-O non-single crystal film.</p><p> One aspect of the display device has a display panel on which a photosensor and a thin film transistor including an oxide semiconductor layer are arranged, and when an object approaches the display panel, it is projected onto the display panel by blocking external light. The shadow is detected by a photo sensor. By detecting the position or movement of the shadow, the position or movement of the object to be detected is detected.</p><p>Another aspect of the display device has a display panel on which a photosensor and a thin film transistor including an oxide semiconductor layer are arranged, and when the object approaches the display panel, it is irradiated from the display panel to be detected. The light reflected by is detected by the photo sensor. That is, the position or movement of the object to be detected is detected by taking an image of the object to be detected that is not in contact with the photo sensor. (In the present specification, taking an image of the object to be detected is referred to as imaging.)</p><p>As described above, even when the object is not in contact with the display panel, the object can be detected.</p><p>Another aspect of the display device has a display panel in which pixels having a thin film transistor including a photo sensor and an oxide semiconductor layer are arranged in a matrix, and an image processing unit, and detects a non-contact object to be detected. A display device having a function, the photo sensor has a means for detecting the shadow of the object to be detected projected on the display panel, and the image processing unit detects the position of the object to be detected from the shadow of the object to be detected. It has a means for detecting the movement of the object to be detected from the movement of the shadow.</p><p>Another aspect of the display device has a display panel in which pixels having a thin film transistor including a photosensor and an oxide semiconductor layer are arranged in a matrix, and an image processing unit, and detects a non-contact object to be detected. A display device having a function, the photosensor has a means for detecting the shadow of the object to be detected projected on the display panel, and the image processing unit has the image processing unit from the position of the shadow of the object to be detected. The means for detecting the position has a means for detecting the position and a means for detecting the movement of the object to be detected from the movement of the shadow, and the means for detecting the position of the object to be detected divides the display panel into a plurality of areas and divides the display panel into a plurality of areas. The area containing the largest number of pixels for detecting shadows is acquired as the position data of the object to be detected.</p><p>Another aspect of the display device has a display panel in which pixels having a thin film transistor including a photosensor and an oxide semiconductor layer are arranged in a matrix, and an image processing unit, and detects a non-contact object to be detected. A display device having a function, the photosensor has a means for detecting the shadow of the object to be detected projected on the display panel, and the image processing unit has the image processing unit from the position of the shadow of the object to be detected. The means for detecting the position has a means for detecting the position and a means for detecting the movement of the object to be detected from the movement of the shadow, and the means for detecting the position of the object to be detected divides the display panel into a plurality of areas and divides the display panel into a plurality of areas. The means for acquiring the region containing the largest number of pixels for detecting shadows as the position data of the object to be detected and detecting the movement of the object to be detected is to compare the continuously acquired position data to detect the object to be detected. Detects the movement of.</p><p>Another aspect of the display device includes a light detection unit in which pixels having a first thin film transistor including a first photosensor and an oxide semiconductor layer are arranged, and a second photosensor and an oxide semiconductor layer. A display device having a display panel having an area sensor in which pixels having a second thin film transistor are arranged and an image processing unit, and having a detection function for a non-contact object to be detected, the first photosensor. Has a means for detecting the shadow of the object to be detected projected on the display panel, and the image processing unit has a means for detecting the position of the object to be detected from the position of the shadow of the object to be detected and a means for detecting the position of the object to be detected from the movement of the shadow. It has a means for detecting the movement of the detected object.</p><p>Another aspect of the display device includes a light detection unit in which pixels having a first thin film transistor including a first photosensor and an oxide semiconductor layer are arranged, and a second photosensor and an oxide semiconductor layer. A display device having a display panel having an area sensor in which pixels having a second thin film transistor are arranged and an image processing unit, and having a detection function for a non-contact object to be detected, the first photo. The sensor has a means for detecting the shadow of the object to be detected projected on the display panel, and the image processing unit has a means for detecting the position of the object to be detected from the position of the shadow of the object to be detected and the movement of the shadow. The means for detecting the movement of the object to be detected has a means for detecting the position of the object to be detected. The display panel is divided into a plurality of areas, and the area containing the largest number of pixels for detecting shadows among the plurality of areas. Is acquired as the position data of the object to be detected.</p><p>Another aspect of the display device includes a light detection unit in which pixels having a first thin film transistor including a first photosensor and an oxide semiconductor layer are arranged, and a second photosensor and an oxide semiconductor layer. A display device having a display panel having an area sensor in which pixels having a second thin film transistor are arranged and an image processing unit, and having a detection function for a non-contact object to be detected, the first photosensor. Has means for detecting the shadow of the object to be detected projected on the display panel, and the image processing unit has means for detecting the position of the object to be detected from the position of the shadow of the object to be detected and the means for detecting the position of the object to be detected from the movement of the shadow. The means for detecting the movement of the detected object has a means for detecting the position of the object to be detected, the display panel is divided into a plurality of areas, and the area containing the largest number of pixels for detecting shadows among the plurality of areas is included. The means for detecting the movement of the object to be detected, which is acquired as the position data of the object to be detected, detects the movement of the object to be detected by comparing the continuously acquired position data.</p><p>Another aspect of the display device is a display panel having a photodetector in which pixels having a thin film including an infrared light sensor and an oxide semiconductor layer are arranged, and an area sensor in which pixels having a visible light sensor are arranged. The photodetector has a means for detecting the light emitted from the display panel and reflected by the object to be detected when the object to be detected is not in contact with the display panel, and the area sensor is the object to be detected. Has a means for detecting the light emitted from the display panel and reflected by the object to be detected when the sensor comes into contact with the display panel.</p><p>Further, in the above configuration, the number of the second photosensors is larger than the number of the first photosensors.</p><p>Further, in the above configuration, the second photosensor is arranged around the first photosensor.</p>

<p>By making it possible to detect a non-contact object, it is possible to reduce the number of times the object touches the display panel and prevent deterioration of display quality.</p><p>By having a thin film transistor using an oxide semiconductor layer, it is possible to provide a display device using a touch sensor capable of high performance and high speed response as an input device.</p>

<figref num="1">The figure explaining the structure of the display panel.</figref><figref num="2">The figure explaining the structure of the display panel.</figref><figref num="3">The figure explaining the structure of the display panel.</figref><figref num="4">Timing chart.</figref><figref num="5">The figure explaining the structure of the display panel.</figref><figref num="6">Sectional view of the display panel.</figref><figref num="7">Sectional view of the display panel.</figref><figref num="8">The figure which shows the structure of the display panel.</figref><figref num="9">The figure which shows an example of the electronic device using a display panel.</figref><figref num="10">The figure explaining image processing.</figref><figref num="11">The figure explaining image processing.</figref><figref num="12">The figure explaining the thin film transistor and the manufacturing method of the thin film transistor.</figref><figref num="13">The figure explaining the thin film transistor and the manufacturing method of the thin film transistor.</figref><figref num="14">The figure explaining the thin film transistor and the manufacturing method of the thin film transistor.</figref><figref num="15">The figure explaining the thin film transistor and the manufacturing method of the thin film transistor.</figref><figref num="16">The figure explaining the thin film transistor.</figref><figref num="17">The figure explaining the thin film transistor.</figref><figref num="18">A vertical sectional view of an inverted staggered thin film transistor using an oxide semiconductor.</figref><figref num="19">(A) An energy band diagram (schematic diagram) in the A-A'cross section shown in FIG. 18 is shown, and (B) an energy band diagram when a voltage is applied.</figref><figref num="20">A diagram showing a state in which a positive potential (+ VG) is applied to the gate (G1) and a state in which a negative potential (-VG) is applied to the gate (G1).</figref><figref num="21">The figure which shows the relationship between the vacuum level, the work function (φM) of a metal, and the electron affinity (χ) of an oxide semiconductor.</figref><figref num="22">The figure explaining the relationship between the electric field effect mobility of a transistor by calculation and the frame frequency of image imaging.</figref>

Hereinafter, embodiments will be described in detail with reference to the drawings. However, the following embodiments can be implemented in many different embodiments, and those skilled in the art can easily change the embodiments and details without departing from the purpose and scope thereof. Understood. Therefore, the interpretation is not limited to the description of the embodiments shown below. In all the drawings for explaining the embodiment, the same parts or parts having the same functions are designated by the same reference numerals, and the repeated description thereof will be omitted.

(Embodiment 1) In the present embodiment, the display panel will be described with reference to FIGS. 1 to 5.

The configuration of the display panel will be described with reference to FIG. The display panel 100 includes a pixel circuit 101, a display element control circuit 102, and a photosensor control circuit 103. The pixel circuit 101 has a plurality of pixels 104 arranged in a matrix in the matrix direction. Each pixel 104 has a display element 105 and a photosensor 106.

The display element 105 includes a thin film transistor (TFT), a holding capacity, a liquid crystal element having a liquid crystal layer, and the like. The thin film transistor has a function of controlling the injection or discharge of electric charges into the holding capacitance. The holding capacity has a function of holding a charge corresponding to a voltage applied to the liquid crystal layer. Image display is realized by creating light and darkness (gradation) of light that passes through the liquid crystal layer by utilizing the fact that the polarization direction changes by applying a voltage to the liquid crystal layer. As the light transmitted through the liquid crystal layer, the light emitted from the back surface of the liquid crystal display device by the light source (backlight) is used.

Although the case where the display element 105 has a liquid crystal element has been described, it may have another element such as a light emitting element. The light emitting element is an element whose brightness is controlled by a current or a voltage, and specific examples thereof include a light emitting diode and an EL element (organic light emission diode (OLED), inorganic EL element) and the like.

The photosensor 106 includes an element such as a photodiode, which has a function of generating an electric signal by receiving light, and a thin film transistor. As the light received by the photo sensor 106, external light is used when detecting the imaging data of the shadow of the object to be detected, and the light from the backlight is detected when detecting the imaging data of the object to be detected itself. Use the reflected light when the object is irradiated.

The display element control circuit 102 is a circuit for controlling the display element 105, and is a display element drive that inputs a signal to the display element 105 via a signal line (also referred to as a source signal line) such as a video data signal line. It has a circuit 107 and a display element drive circuit 108 that inputs a signal to the display element 105 via a scanning line (also referred to as a gate signal line). For example, the display element drive circuit 108 on the scanning line side has a function of selecting the display element 105 of the pixels arranged in a specific line. Further, the display element drive circuit 107 on the signal line side has a function of giving an arbitrary potential to the display element 105 of the pixels in the selected line. In the display element to which the high potential is applied by the display element drive circuit 108 on the scanning line side, the thin film transistor is in a conductive state, and the electric charge given by the display element drive circuit 107 on the signal line side is supplied.

The photosensor control circuit 103 is a circuit for controlling the photosensor 106, and includes a photosensor reading circuit 109 connected to a photosensor output signal line, a photosensor reference signal line, and the like, and a photosensor drive circuit 110. The photosensor drive circuit 110 has a function of performing a reset operation and a selection operation, which will be described later, with respect to the photosensor 106 of the pixels arranged in a specific row. Further, the photosensor reading circuit 109 has a function of extracting an output signal of the photosensor 106 included in the pixels of the selected row. The photosensor readout circuit 109 has a configuration in which the output of the photosensor, which is an analog signal, is taken out as an analog signal as it is to the outside of the display panel by using an OP amplifier, or is converted into a digital signal by using an A / D conversion circuit. It is conceivable that the display panel can be taken out from.

The display panel 100 including the photo sensor is configured to provide a circuit having a transistor using an oxide semiconductor layer.

A thin film using an oxide semiconductor layer included in a display panel 100 including a photosensor suppresses fluctuations in its electrical characteristics, and thus causes fluctuations in hydrogen, water, hydroxyl groups, hydrides (also referred to as hydrides), etc. Purification of the oxide semiconductor layer by intentionally removing impurities from the oxide semiconductor layer and supplying oxygen, which is a main component material constituting the oxide semiconductor, which is simultaneously reduced by the impurity removal step. And electrically type I (intrinsic).

Therefore, the smaller the amount of hydrogen and carriers in the oxide semiconductor, the better, and the thin film transistor disclosed in the present specification contains 5 × 10 hydrogen contained in the oxide semiconductor.¹⁹/cm³Below, preferably 5 × 10¹⁸/cm³Below, more preferably 5 × 10¹⁷/cm³Below, or 5x10¹⁶/cm³If it is less than, the hydrogen contained in the oxide semiconductor is removed as much as possible as it approaches zero, and the carrier concentration is 5 × 10.¹⁴/cm³Less than, preferably 5x10¹²/cm³It is a thin film transistor in which a channel formation region is formed by the following oxide semiconductor layers.

In the reverse characteristic of the thin film transistor, the smaller the off current, the more preferable. The off-current is a current flowing between the source and drain of the thin film transistor when any gate voltage between -1V and -10V is applied, and is a thin film transistor using the oxide semiconductor disclosed in the present specification. The current value per 1 μm of the channel width (w) is 100 aA / μm or less, preferably 10 aA / μm or less, and more preferably 1 aA / μm or less. Furthermore, since there is no pn junction and there is no hot carrier deterioration, the electrical characteristics of the thin film transistor are not affected by these.

The circuit diagram of the pixel 104 will be described with reference to FIG. The pixel 104 includes a display element 105 having a transistor 201, a holding capacity 202, and a liquid crystal element 203, and a photosensor 106 having a photodiode 204, a transistor 205, and a transistor 206. In FIG. 2, the transistor 201, the transistor 205, and the transistor 206 are thin film transistors using an oxide semiconductor layer.

The transistor 201 electrically has a gate on the gate signal line 207, one source or drain on the video data signal line 210, and the other source or drain electrically on one electrode of the holding capacitance 202 and one electrode of the liquid crystal element 203. It is connected. The other electrode of the holding capacity 202 and the other electrode of the liquid crystal element 203 are kept at a constant potential. The liquid crystal element 203 is an element including a pair of electrodes and a liquid crystal layer between the pair of electrodes.

When "H" is applied to the gate signal line 207, the transistor 201 applies the potential of the video data signal line 210 to the holding capacitance 202 and the liquid crystal element 203. The holding capacity 202 holds the applied potential. The liquid crystal element 203 changes the light transmittance depending on the applied potential.

Transistors 201, 205, and 206, which are thin film transistors using an oxide semiconductor layer, have a very small off-current, so that the holding capacitance may be very small or may not be provided.

In the photodiode 204, one electrode is electrically connected to the photodiode reset signal line 208, and the other electrode is electrically connected to the gate of the transistor 205. One of the source and drain of the transistor 205 is electrically connected to the photosensor reference signal line 212, and the other of the source and drain is electrically connected to one of the source and drain of the transistor 206. The transistor 206 is electrically connected to the gate signal line 209 at the gate and to the photosensor output signal line 211 at the other end of the source or drain.

Next, the configuration of the photosensor readout circuit 109 will be described with reference to FIG. In FIG. 3, the photosensor readout circuit 300 for one row of pixels has a transistor 301 and a holding capacity 302. Further, the photo sensor output signal line 211 and the precharge signal line 303 of the pixel sequence.

In the circuit diagram in the present specification, "OS" is described as the symbol of the thin film transistor using the oxide semiconductor layer so that it can be clearly identified as the thin film transistor using the oxide semiconductor layer. In FIG. 2, the transistor 201, the transistor 205, the transistor 206, and in FIG. 3, the transistor 301 is a thin film transistor using an oxide semiconductor layer.

In the photosensor readout circuit 300, the potential of the photosensor output signal line 211 is set as a reference potential prior to the operation of the photosensor in the pixel. The reference potential set in the photosensor output signal line 211 may be a high potential or a low potential. In FIG. 3, by setting the precharge signal line 303 to H, the photosensor output signal line 211 can be set to a high potential which is a reference potential. When the parasitic capacitance of the photosensor output signal line 211 is large, the holding capacitance 302 does not have to be specially provided.

Next, the reading operation of the photosensor in this display panel will be described with reference to the timing chart of FIG. In FIG. 4, the signals 401 to 404 are the photodiode reset signal line 208 in FIG. 2, the gate signal line 209 to which the gate of the transistor 206 is connected, the gate signal line 213 to which the gate of the transistor 205 is connected, and the photosensor output. Corresponds to the potential of signal line 211. Further, the signal 405 corresponds to the potential of the precharge signal line 303 in FIG.

At time A, the potential (signal 401) of the photodiode reset signal line 208 is "H", in other words, the photodiode reset signal electrically connected to the photodiode so that a forward bias is applied to the photodiode. When the wire potential is set (reset operation), the photodiode 204 conducts, and the potential (signal 403) of the gate signal line 213 to which the gate of the transistor 205 is connected becomes H. Further, assuming that the potential (signal 405) of the precharge signal line 303 is "H", the potential (signal 404) of the photosensor output signal line 211 is precharged to "H".

At time B, when the potential of the photodiode reset signal line 208 (signal 401) is set to L (cumulative operation), the potential of the gate signal line 213 to which the gate of the transistor 205 is connected is due to the off current of the photodiode 204. (Signal 403) begins to drop. Since the off-current of the photodiode 204 increases when it is irradiated with light, the potential (signal 403) of the gate signal line 213 to which the gate of the transistor 205 is connected changes according to the amount of the irradiated light. That is, the current between the source and drain of the transistor 205 changes.

At time C, when the potential (signal 402) of the gate signal line 209 is set to H (selection operation), the transistor 206 becomes conductive, and the photosensor reference signal line 212 and the photosensor output signal line 211 are connected to the transistor 205. Conducts through the transistor 206. Then, the potential (signal 404) of the photosensor output signal line 211 begins to decrease. Before time C, the potential (signal 405) of the precharge signal line 303 is set to "L", and the precharge of the photosensor output signal line 211 is completed. Here, the speed at which the potential (signal 404) of the photosensor output signal line 211 drops depends on the current between the source and drain of the transistor 205. That is, the potential (signal 404) of the photosensor output signal line 211 changes according to the amount of light radiating to the photodiode 204.

When the potential (signal 402) of the gate signal line 209 is set to L at time D, the transistor 206 is cut off, and the potential (signal 404) of the photosensor output signal line 211 becomes a constant value after time D. Here, the value that becomes a constant value changes according to the amount of light irradiating the photodiode 204. Therefore, by acquiring the potential of the photosensor output signal line 211, the amount of light irradiating the photodiode 204 can be known.

As described above, depending on the amount of light irradiating the photodiode 204, whether the outside light is incident or the outside light is blocked by a non-contact object to be detected, that is, the portion is It is possible to determine whether it is in the shadow.

FIG. 22 shows the result of circuit calculation for the frequency of image acquisition in the photo sensor 106 of FIG. FIG. 22 shows the relationship between the field effect mobility of the transistors 205 and 206 constituting the photo sensor 106 and the frame frequency of imaging calculated from the readout speed.

In the circuit calculation, the following conditions were assumed. The touch panel is 20-inch FHD standard (width 1920 x RGB, height 1080 pixels), each pixel is equipped with a photo sensor, parasitic capacitance 20pF of photo sensor output signal line 211 (equivalent to capacitance 302), channel length of transistor 205 and transistor 206. 5 μm and channel width 16 μm, channel length 5 μm and channel width 1000 μm of transistor 301. The circuit simulator SmartSpice (manufactured by Silvaco) was used for the calculation.

In the circuit calculation, the following operation was assumed. First, the initial state is immediately after the cumulative operation. That is, the potential of the gate signal line 213 is 8V, the potential of the gate signal line 209 is 0V, the potential of the photosensor output signal line 211 is 8V, the potential of the photosensor reference signal line 212 is 8V, and the potential of the precharge signal line 303. Is 0V. From the initial state, the potential of the precharge signal line 303 is set to 8V, and after the potential of the photosensor output signal line 211 reaches 0V (precharge state), the potential of the precharge signal line 303 is set to 0V and the gate signal line 209. Let the potential of be 8V. That is, the selection operation is started. The reference voltage is 0V. After that, the final state is when the potential of the photosensor output signal line 211 is 2 V, that is, when the potential changes by 2 V from the potential during the precharge operation. The time from the initial state to the final state in the above operation was defined as the imaging time per line.

The time required for image imaging was 1080 times the imaging time per line, and the reciprocal of the image imaging time was defined as the image imaging frequency. As an example, the image imaging frequency of 60 Hz corresponds to the imaging time per row being 1/60 [Hz] / 1080 [column] = 15.43 [μs].

From the results of FIG. 22, it can be seen that when the field effect mobility of the transistors 205 and 206 is 10 to 20 cm2 / Vs assuming a transistor containing an oxide semiconductor, the frequency of image imaging is 70 to 100 Hz. On the other hand, when the field effect mobility of the transistors 205 and 206 is 0.5 cm2 / Vs assuming a transistor containing amorphous silicon, the frequency of image imaging is only about 5 Hz. That is, it is effective to use an oxide semiconductor transistor as the transistor constituting the photosensor.

FIG. 5 shows a display panel system 590 that detects the movement of a detected object from the shadow of a non-contact object to be detected. Here, the display panel 100, the control circuit 591, the image processing circuit 592, and the storage device 593 for storing image data. The control circuit 591 generates various timing signals for driving the display panel. The image processing circuit 592 performs arithmetic processing on the image data of the shadow of the non-contact object to be detected obtained by the photo sensor, and detects the movement of the shadow of the object to be detected. Further, the image data required for the subsequent image processing is stored in the storage device 593, and the data stored in the storage device 593 is read out as necessary to perform arithmetic processing.

An example of a specific method of image processing performed by the image processing circuit 592 will be described with reference to FIG. FIG. 10 shows a display area in which the number of pixels is 12 × 12.

The image processing includes (1) extraction of the position of the detected object from the image data of the shadow of the detected object, (2) detection of the motion of the detected object from the continuously acquired position data of the detected object, and (3). ) Generate the corresponding input data from the movement of the object to be detected.

(1) Regarding the extraction of the position of the detected object from the imaged data of the shadow of the detected object, for example, as shown by the thick frame in FIG. 10, the display area is divided into 4 areas 2001, 2002, 2003, and 2004. It is divided into regions, and the ratio of the region recognized as the shadow of the object to be detected in each region is counted. More specifically, when the amount of light acquired by the photosensor in each pixel is less than a specific threshold value, the pixel detects the shadow of the object to be detected. The pixel that does not detect the shadow is 2005, and the pixel that detects the shadow is 2006.

Then, in the region, the region having the largest proportion of the shadowed pixels in all the pixels is extracted as the position of the object to be detected. In FIG. 10, the pixels for detecting shadows are shown by diagonal lines. The ratio of pixels that detect shadows in each region is 25/36 in region 2001, 12/36 in region 2002, 3/36 in region 2003, and 6/36 in region 2004, and the ratio of shadows in region 2001 is Since it is the largest, the region 2001 is extracted as the position of the object to be detected, and the position data is acquired.

By increasing the number of divisions of the display area, more precise positions can be extracted.

Next, (2) regarding the detection of the movement of the detected object from the continuously acquired position data of the detected object, more specifically, the position data acquired as described above is continuously acquired. By comparing with the position data before and after, the movement of the object to be detected can be known. For example, if the previous position data is on the right and the current position data is on the left, it can be detected that the object to be detected has moved from right to left. Further, when more precise position information is extracted, it is possible to detect more precise movement such as moving speed in addition to the moving direction of the object to be detected.

Then, (3) it is effective to freely set the input data corresponding to the movement of the object to be detected in advance according to the purpose of use of the display panel for the generation of the corresponding input data from the movement of the object to be detected. .. For example, when the object to be detected is a human finger and the finger is moved from left to right, the video is played, and when the finger is moved from top to bottom, the video is stopped. .. It is also effective to estimate characters from more precise movements and use this as input data.

Further, it is effective to make the sensitivity of the photo sensor to the amount of light variable. For example, in the configuration of FIG. 2, the potentials applied to the photosensor (photodiode reset signal line 208 potential, gate signal line 209 potential, photosensor reference signal line 212 potential, precharge signal line 303 potential) are changed. By doing so, the sensitivity to the amount of light can be made variable. In this way, by making the sensitivity of the photo sensor to the amount of light variable, even if the usage environment (brightness, etc.) of the display panel changes, by setting the optimum sensitivity as appropriate, non-contact detection is detected. The shadow of an object can be easily identified. In addition to detecting the shadow of a non-contact object to be detected, the display panel can also be used as a close contact area sensor. That is, the function of detecting the non-contact object to be detected and the function of detecting the contacted object can be used properly according to the application.

With the above form, it is possible to provide a display panel capable of detecting a non-contact object to be detected and inputting data.

Further, the above image processing can be applied not only to the case of detecting the shadow of the object to be detected but also to the case of using the reflected light from the object to be detected. When reflected light is used, the photosensor placed at a position where the object to be detected approaches receives stronger light than other positions. That is, by applying the above image processing and specifying a region that receives strong light in the display region, the position, movement, or shape of the object to be detected can be detected. In this case, the shaded pixels in the example of FIG. 10 are pixels that have received strong light due to the reflected light from the object to be detected.

It is also effective to provide the display panel with a first photosensor that detects a non-contact object to be detected and a second photosensor that detects a contacted object to be detected. The second photo sensor is used as a close contact area sensor. With such a configuration, it is possible to provide a display panel capable of detecting a non-contact object to be detected, but also a display panel capable of detecting a contacted object to be detected. That is, the two detection functions can be used properly according to the application.

The pixels having the first photo sensor and the pixels having the second photo sensor are arranged on the display panel in a matrix. At that time, it is desirable that the number of the second photosensors is larger than the number of the first photosensors. Since the second photosensor used as the close contact area sensor requires high resolution in the captured image, the resolution can be increased by narrowing the interval (pitch) of the second photosensor. On the other hand, the first photosensor that detects shadows is sufficient if the position of the object to be detected can be determined, and does not require a high resolution as that of the second photosensor used as a close contact area sensor. That is, the interval at which the second photosensors are arranged may be narrower than the interval at which the first photosensors are arranged.

The pixel provided with the first photo sensor for detecting shadows is the pixel not provided with the second photo sensor used as the close contact area sensor. Therefore, it is desirable to provide a photo sensor used as a close contact area sensor around 1 to 3 pixels around the photo sensor that detects shadows so that the image of the pixels missing by image processing can be restored.

FIG. 11 (A) shows an example of a pixel in which a first photo sensor that detects shadows and a second photo sensor used as a close contact area sensor are arranged. In FIG. 11, the number of pixels is 12 × 12, but the number of pixels is not limited to this.

In FIG. 11 (A), the first photosensor is arranged in the pixels indicated by diagonal lines, the second photosensor is arranged in the other pixels, and the first photosensors are arranged at intervals. .. For the above reasons, the number of second photosensors is greater than the number of first photosensors.

It should be noted that it is not always necessary to arrange them at regular intervals as shown in FIG. 11 (A), and they may be arranged at different intervals as shown in FIG. 11 (B). When 640 x 480 is used as a more practical number of pixels, one of the 100 pixels is the first photo sensor and 99 is the second photo when divided into 10 x 10 100 pixel areas. By using the sensor, it is possible to sufficiently fulfill the function as a close contact type area sensor while detecting the shadow of the object to be detected. However, the present invention is not limited to this, and the ratio of arranging the first photo sensor and the second photo sensor may be determined according to the detection accuracy. For example, the same number of the first photo sensor and the second photo sensor may be used. It is also possible to.

The potential applied to each of the photosensor that detects the shadow and the photosensor used as the close contact area sensor (for example, the potential of the photodiode reset signal line 208 in FIG. 2 or 3 and the gate signal line 209). It is effective to independently install the potential of the photosensor reference signal line 212, the potential of the precharge signal line 303). Further, it is effective that the size of the photodiodes constituting each photosensor and the circuit configuration of the photosensors are different.

This embodiment can be implemented in combination with other embodiments or examples as appropriate.

(Embodiment 2) In this embodiment, a method of improving the detection accuracy of the photo sensor when the reflected light from the object to be detected is used will be described.

In order to detect a non-contact object to be detected, it is necessary to effectively detect the faint light reflected by the object to be detected. Specifically, there are the following methods.

A sensor that detects infrared light (infrared light sensor) is used as a photosensor, and the touch panel irradiates infrared light, and the infrared light sensor detects the light reflected from the object to be detected. The infrared light sensor is, for example, visible light by superimposing color filters of different colors (for example, R (red) and B (blue), R (red) and G (green), etc.) on the photosensor. This can be achieved by configuring the photo sensor to emit light other than (infrared). By using the color filter provided on the display panel for color display as the filter of the infrared light sensor, the number of steps can be reduced. Further, for example, by adding a light source that emits infrared light in addition to visible light (white) to the backlight, infrared light can be emitted from the touch panel. Since infrared light has a longer wavelength and less scattering than visible light, it is easy to increase the detection sensitivity. In particular, when the object to be detected is a human finger or hand, a configuration that detects infrared light is effective.

When the infrared light sensor and the visible light sensor are made of different materials, the infrared light sensor may be made of a material that absorbs light other than visible light (infrared light). For example, a photosensor formed of InGaAs, PbS, PbSe, etc. efficiently absorbs infrared light.

In the configuration described in the first embodiment, the first photosensor for detecting the non-contact object to be detected and the second photosensor for detecting the contacted object are provided on the display panel. By using the photosensor as an infrared light sensor and the second photosensor as a visible light sensor, the accuracy of both the function of detecting a non-contact object to be detected and the function of a close contact type area sensor are improved. It becomes possible. The arrangement of the first photo sensor (infrared light sensor) and the second photo sensor (visible light sensor) can be performed in the same manner as in the first embodiment.

Further, the image processing described in the first embodiment can be applied.

This embodiment can be implemented in combination with other embodiments or examples as appropriate.

(Embodiment 3) In the present embodiment, the configuration of the display device according to one aspect of the present invention will be described with reference to FIG.

FIG. 6 shows an example of a cross section of the display device. In the display device shown in FIG. 6, a photodiode 502, a transistor 540, a transistor 503, and a liquid crystal element 505 are provided on a substrate 501 (TFT substrate) having an insulating surface.

An oxide insulating layer 531, a protective insulating layer 532, an interlayer insulating layer 533, and an interlayer insulating layer 534 are provided on the transistor 503 and the transistor 540. The photodiode 502 is provided on the interlayer insulating layer 533, and is provided between the electrode layer 541 formed on the interlayer insulating layer 533 and the electrode layer 542 provided on the interlayer insulating layer 534 from the interlayer insulating layer 533 side. It has a structure in which a first semiconductor layer 506a, a second semiconductor layer 506b, and a third semiconductor layer 506c are laminated in this order.

The electrode layer 541 is electrically connected to the conductive layer 543 formed on the interlayer insulating layer 534, and the electrode layer 542 is electrically connected to the gate electrode layer 545 via the electrode layer 541. The gate electrode layer 545 is electrically connected to the gate electrode layer of the transistor 540, and the photodiode 502 is electrically connected to the transistor 540. Transistor 540 corresponds to transistor 205 in Embodiment 1.

Transistors 503 and 540 using an oxide semiconductor layer included in a touch panel including a photosensor suppress fluctuations in their electrical characteristics, and thus cause fluctuations in hydrogen, water, hydroxyl groups, or hydrides (also referred to as hydrides). By intentionally removing impurities such as these from the oxide semiconductor layer and supplying oxygen, which is a main component material constituting the oxide semiconductor layer, which is simultaneously reduced by the impurity removal step, the oxide semiconductor layer is formed. Purify and electrically type I (intrinsic).

Therefore, the smaller the amount of hydrogen and carriers in the oxide semiconductor layer, the better, and the transistor 503 and transistor 540 contain 5 × 10 hydrogen contained in the oxide semiconductor.¹⁹/cm³Below, preferably 5 × 10¹⁸/cm³Below, more preferably 5 × 10¹⁷/cm³Below, or 5x10¹⁶/cm³Hydrogen contained in the oxide semiconductor is removed as much as possible so that it becomes less than zero, and the carrier concentration is 5 × 10.¹⁴/cm³Less than, preferably 5x10¹²/cm³It is a thin film transistor in which a channel formation region is formed by the following oxide semiconductor layers.

In the reverse characteristics of the transistors 503 and 540, the smaller the off current, the more preferable. The off-current is a current flowing between the source and drain of the thin film transistor when any gate voltage between -1V and -10V is applied, and is a thin film transistor using the oxide semiconductor disclosed in the present specification. The current value per 1 μm of the channel width (w) is 100 aA / μm or less, preferably 10 aA / μm or less, and more preferably 1 aA / μm or less. Furthermore, since there is no pn junction and there is no hot carrier deterioration, the electrical characteristics of the thin film transistor are not affected by these.

FIG. 18 shows a vertical cross-sectional view of an inverted staggered thin film transistor using an oxide semiconductor. An oxide semiconductor layer (OS) is provided on the gate electrode (GE1) via a gate insulating film (GI), and a source electrode (S) and a drain electrode (D) are provided on the oxide semiconductor layer (OS).

FIG. 19 shows an energy band diagram (schematic diagram) in the AA'cross section shown in FIG. Figure 19 (A) shows the voltage between the source and drain equipotential (V)._D0V) is shown, and Fig. 19 (B) shows a positive potential (V) at the drain with respect to the source._D&gt; 0V) is added.

FIG. 20 is an energy band diagram (schematic diagram) in the cross section of B-B'in FIG. Figure 20 (A) shows the positive potential (+ V) at the gate electrode (GE1)._G) Is applied, indicating an on state in which carriers (electrons) flow between the source and drain. In addition, FIG. 20 (B) shows a negative potential (-V) at the gate electrode (GE1)._G) Is applied and off (minority carriers do not flow).

FIG. 21 shows the relationship between the vacuum level, the work function of the metal (φM), and the electron affinity (χ) of the oxide semiconductor.

Conventional oxide semiconductors are generally n-type, and the Fermi level (E) in that case._F) Is located closer to the conduction band, away from the true Fermi level (Ei) located in the center of the bandgap. Since hydrogen can be a donor, it is known to be one of the factors for n-type in oxide semiconductors.

On the other hand, the oxide semiconductor layer according to the present invention is made intrinsic (I type) by removing hydrogen, which is an n-type impurity, from the oxide semiconductor and purifying it so as not to contain impurities as much as possible. It is an intrinsic type. That is, it is characterized by removing impurities such as hydrogen and water as much as possible to make it highly purified type I (intrinsic semiconductor) or close to it. By doing so, the Fermi level (E)_F) Can be up to the same level as the true Fermi level (Ei).

The electron affinity (χ) of oxide semiconductors is said to be 4.3 eV. The titanium (Ti) work function that constitutes the source and drain electrodes is approximately equal to the electron affinity (χ) of the oxide semiconductor. In this case, a Schottky type barrier is not formed for electrons at the metal-oxide semiconductor interface.

That is, when the work function (φM) of the metal and the electron affinity (χ) of the oxide semiconductor are equal, when they come into contact with each other, an energy band diagram (schematic diagram) as shown in FIG. 19 (A) is shown.

In FIG. 19B, black circles () indicate electrons, and when a positive potential is applied to the drain, the electrons are injected into the oxide semiconductor layer beyond the barrier (h) and flow toward the drain. In this case, the height of the barrier (h) changes depending on the gate voltage and the drain voltage, but when a positive drain voltage is applied, there is no voltage applied to the barrier (h) in FIG. 19 (A). ) Is less than 1/2 of the bandgap (Eg).

At this time, the electrons injected into the oxide semiconductor layer flow through the oxide semiconductor layer as shown in FIG. 20 (A). Further, in FIG. 20 (B), when a negative potential is applied to the gate electrode (GE1), the holes that are minority carriers are substantially nonexistent, so that the current becomes a value as close to zero as possible.

For example, the channel width W of the thin film transistor is 1 × 10.⁴Even if the device is μm and the channel length is 3 μm, the off current is 10^-13It is A or less, and a subthreshold swing value (S value) of 0.1 V / dec. (Gate insulating film thickness of 100 nm) can be obtained.

As described above, by purifying the oxide semiconductor layer so as not to contain impurities as much as possible, the operation of the thin film transistor can be improved.

Therefore, the transistor 503 and the transistor 540 using the oxide semiconductor layer are highly reliable thin film transistors having stable electrical characteristics.

The oxide semiconductor layer contained in the transistor 503 and the transistor 540 includes an In-Sn-Ga-Zn-O film which is a quaternary metal oxide and an In-Ga-Zn-O film which is a ternary metal oxide. Membrane, In-Sn-Zn-O membrane, In-Al-Zn-O membrane, Sn-Ga-Zn-O membrane, Al-Ga-Zn-O membrane, Sn-Al-Zn-O system, and binary In-Zn-O film, Sn-Zn-O film, Al-Zn-O film, Zn-Mg-O film, Sn-Mg-O film, In-Mg-O film, and In -O film, Sn-O film, Zn-O film, etc. can be used. In addition, SiO is added to the oxide semiconductor layer.₂May include.

The oxide semiconductor layer is InMO.₃(ZnO)_mA thin film represented by (m&gt; 0) can be used. Here, M represents one or more metal elements selected from Ga, Al, Mn and Co. For example, M includes Ga, Ga and Al, Ga and Mn, or Ga and Co. InMO₃(ZnO)_mAmong the oxide semiconductor layers having the structure represented by (m&gt; 0), the oxide semiconductor having a structure containing Ga as M is called the above-mentioned In-Ga-Zn-O oxide semiconductor, and the thin film thereof is called In-. It is also called Ga-Zn-O non-single crystal film.

Here, a semiconductor layer having a p-type conductive type as the first semiconductor layer 506a, a high-resistance semiconductor layer (i-type semiconductor layer) as the second semiconductor layer 506b, and an n-type conductive type as the third semiconductor layer 506c are used. An example is a pin-type photodiode in which a semiconductor layer is laminated.

The first semiconductor layer 506a is a p-type semiconductor layer, and can be formed of an amorphous silicon film containing an impurity element that imparts p-type. The first semiconductor layer 506a is formed by a plasma CVD method using a semiconductor material gas containing an impurity element of Group 13 (for example, boron (B)). Silane (SiH) as a semiconductor material gas₄) May be used. Or Si₂H₆, SiH₂Cl₂, SiHCl₃, SiCl₄, SiF₄Etc. may be used. Further, after forming an amorphous silicon film containing no impurity element, the impurity element may be introduced into the amorphous silicon film by using a diffusion method or an ion implantation method. It is preferable to diffuse the impurity element by heating or the like after introducing the impurity element by an ion implantation method or the like. In this case, as a method for forming the amorphous silicon film, an LPCVD method, a vapor phase growth method, a sputtering method, or the like may be used. The film thickness of the first semiconductor layer 506a is preferably formed to be 10 nm or more and 50 nm or less.

The second semiconductor layer 506b is an i-type semiconductor layer (intrinsic semiconductor layer) and is formed of an amorphous silicon film. To form the second semiconductor layer 506b, an amorphous silicon film is formed by a plasma CVD method using a semiconductor material gas. As a semiconductor material gas, silane (SiH)₄) May be used. Or Si₂H₆, SiH₂Cl₂, SiHCl₃, SiCl₄, SiF₄Etc. may be used. The second semiconductor layer 506b may be formed by an LPCVD method, a vapor phase growth method, a sputtering method, or the like. The film thickness of the second semiconductor layer 506b is preferably 200 nm or more and 1000 nm or less.

The third semiconductor layer 506c is an n-type semiconductor layer, and is formed of an amorphous silicon film containing an impurity element that imparts n-type. The third semiconductor layer 506c is formed by a plasma CVD method using a semiconductor material gas containing an impurity element of Group 15 (for example, phosphorus (P)). Silane (SiH) as a semiconductor material gas₄) May be used. Or Si₂H₆, SiH₂Cl₂, SiHCl₃, SiCl₄, SiF₄Etc. may be used. Further, after forming an amorphous silicon film containing no impurity element, the impurity element may be introduced into the amorphous silicon film by using a diffusion method or an ion implantation method. It is preferable to diffuse the impurity element by heating or the like after introducing the impurity element by an ion implantation method or the like. In this case, as a method for forming the amorphous silicon film, an LPCVD method, a vapor phase growth method, a sputtering method, or the like may be used. The film thickness of the third semiconductor layer 506c is preferably formed to be 20 nm or more and 200 nm or less.

Further, the first semiconductor layer 506a, the second semiconductor layer 506b, and the third semiconductor layer 506c may be formed by using a polycrystalline semiconductor instead of an amorphous semiconductor, or a microcrystal (Semi Amorphous Semiconductor: Semi Amorphous Semiconductor: SAS)) It may be formed using a semiconductor.

Microcrystalline semiconductors belong to the metastable state between amorphous and single crystal in consideration of Gibbs free energy. That is, it is a semiconductor having a thermodynamically stable third state, has short-range order, and has lattice strain. Columnar or acicular crystals grow in the normal direction with respect to the substrate surface. Microcrystalline silicon, which is a typical example of microcrystalline semiconductor, has a Raman spectrum of 520 cm, which indicates single crystal silicon.^-1It is shifting to the lower frequency side. That is, 520 cm showing single crystal silicon^-1And 480 cm showing amorphous silicon^-1There is a peak in the Raman spectrum of microcrystalline silicon between. It also contains at least 1 atomic% or more of hydrogen or halogen to terminate unbonded hands (dangling bonds). Further, by adding rare gas elements such as helium, argon, krypton, and neon to further promote lattice strain, a polycrystalline semiconductor film having high thermodynamic stability can be obtained.

This microcrystalline semiconductor film can be formed by a high-frequency plasma CVD method having a frequency of several tens of MHz to several hundreds of MHz, or a microwave plasma CVD method having a frequency of 1 GHz or more. Typically, SiH₄, Si₂H₆, SiH₂Cl₂, SiHCl₃Such as silicon hydride and SiC₄, SiF₄It can be formed by diluting silicon halide such as with hydrogen. Further, in addition to silicon hydride and hydrogen, it can be diluted with one or more rare gas elements selected from helium, argon, krypton, and neon to form a microcrystalline semiconductor film. At these times, the flow rate ratio of hydrogen to silicon hydride is 5 times or more and 200 times or less, preferably 50 times or more and 150 times or less, and more preferably 100 times. Furthermore, in the gas containing silicon, CH₄, C₂H₆Hydrocarbon gas, such as GeH₄, GeF₄Germaniumized gas, such as F₂Etc. may be mixed.

Further, since the mobility of holes generated by the photoelectric effect is smaller than the mobility of electrons, the pin-type photodiode shows a characteristic that it is better to use the p-type semiconductor layer side as the light receiving surface. Here, an example of converting the light received by the photodiode 502 from the surface of the substrate 501 on which the pin-type photodiode is formed into an electric signal will be shown. Further, since the light from the semiconductor layer side having a conductive type opposite to that of the semiconductor layer side as the light receiving surface becomes ambient light, it is preferable to use a conductive film having a light-shielding property for the electrode layer. The n-type semiconductor layer side can also be used as the light receiving surface.

The liquid crystal element 505 includes a pixel electrode 507, a liquid crystal 508, a counter electrode 509, an alignment film 511, and an alignment film 512. The pixel electrode 507 is formed on the substrate 501, and the alignment film 511 is formed on the pixel electrode 507. Further, the pixel electrode 507 is electrically connected to the transistor 503 via the conductive film 510. Further, the counter electrode 509 is formed on the substrate 513 (opposite substrate), the alignment film 512 is formed on the counter electrode 509, and the liquid crystal 508 is sandwiched between the alignment film 511 and the alignment film 512. .. The transistor 503 corresponds to the transistor 201 in the first embodiment.

The cell gap between the pixel electrode 507 and the counter electrode 509 can be controlled using the spacer 516. In FIG. 6, the cell gap is controlled by using a columnar spacer 516 selectively formed by photolithography. By dispersing the spherical spacer between the pixel electrode 507 and the counter electrode 509, the cell gap is controlled. Can also be controlled.

Further, the liquid crystal 508 is surrounded by a sealing material between the substrate 501 and the substrate 513. The liquid crystal 508 may be injected by using a dispenser type (dropping type) or a dip type (pumping type).

The pixel electrode 507 is provided with a translucent conductive material such as indium tin oxide (ITO), indium tin oxide containing silicon oxide (ITSO), organic indium, organic tin, and indium containing zinc oxide (ZnO). Zinc oxide (IZO (Indium Zinc Oxide)), zinc oxide (ZnO), zinc oxide containing gallium (Ga), tin oxide (SnO)₂), Indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, and the like can be used. Further, it can be formed by using a conductive composition containing a conductive polymer (also referred to as a conductive polymer). As the conductive polymer, a so-called π-electron conjugated conductive polymer can be used. For example, polyaniline or a derivative thereof, polypyrrole or a derivative thereof, polythiophene or a derivative thereof, or a copolymer of two or more kinds thereof can be mentioned.

Further, in the present embodiment, since the transmissive liquid crystal element 505 is taken as an example, the above-mentioned conductive material having translucency can be used for the counter electrode 509 as well as the pixel electrode 507.

An alignment film 511 is provided between the pixel electrode 507 and the liquid crystal 508, and an alignment film 512 is provided between the counter electrode 509 and the liquid crystal 508. The alignment film 511 and the alignment film 512 can be formed by using an organic resin such as polyimide or polyvinyl alcohol, and the surface thereof is subjected to an orientation treatment such as rubbing for arranging liquid crystal molecules in a certain direction. There is. Rubbing can be performed by rotating a roller wrapped with a cloth such as nylon while applying pressure to the alignment film and rubbing the surface of the alignment film in a certain direction. It is also possible to directly form the alignment film 511 and the alignment film 512 having alignment characteristics by a vapor deposition method using an inorganic material such as silicon oxide without performing an orientation treatment.

Further, a color filter 514 capable of passing light in a specific wavelength region is formed on the substrate 513 so as to overlap the liquid crystal element 505. The color filter 514 can be selectively formed by using photolithography after applying an organic resin such as an acrylic resin in which a pigment is dispersed on the substrate 513. Further, after applying a polyimide resin in which a pigment is dispersed on a substrate 513, it can be selectively formed by etching. Alternatively, the color filter 514 can be selectively formed by using a droplet ejection method such as an inkjet.

Further, a shielding film 515 capable of shielding light is formed on the substrate 513 so as to overlap with the photodiode 502. By providing the shielding film 515, it is possible to prevent the light from the backlight transmitted through the substrate 513 and incident into the touch panel from directly hitting the photodiode 502, and also due to the disorder of the orientation of the liquid crystal 508 between the pixels. It is possible to prevent the discrimination to be visually recognized. As the shielding film 515, an organic resin containing a black pigment such as carbon black or low valence titanium oxide can be used. It is also possible to form the shielding film 515 with a film using chromium.

Further, the polarizing plate 517 is provided on the surface of the substrate 501 opposite to the surface on which the pixel electrode 507 is formed, and the polarizing plate 518 is provided on the surface of the substrate 513 opposite to the surface on which the counter electrode 509 is formed. Provide.

As the oxide insulating layer 531 and the protective insulating layer 532, the interlayer insulating layer 533, and the interlayer insulating layer 534, an insulating material is used, and depending on the material, a sputtering method, an SOG method, a spin coat, a dip, or a spray coating can be used. It can be formed by using a droplet ejection method (inkprint method, screen printing, offset printing, etc.), a doctor knife, a roll coater, a curtain coater, a knife coater, or the like.

As the oxide insulating layer 531, a single layer or a laminate of an oxide insulating layer such as a silicon oxide layer, a silicon nitride layer, an aluminum oxide layer, or an aluminum nitride layer can be used.

As the protective insulating layer 532, as the inorganic insulating material, a single layer or a laminate of a nitride insulating layer such as a silicon nitride layer, a silicon nitride layer, an aluminum nitride layer, or an aluminum nitride layer can be used. Further, high-density plasma CVD using μ wave (2.45 GHz) is preferable because it can form a high-quality insulating layer that is dense and has a high dielectric strength.

As the interlayer insulating layers 533 and 534, an insulating layer that functions as a flattening insulating film is preferable in order to reduce surface irregularities. As the interlayer insulating layers 533 and 534, heat-resistant organic insulating materials such as polyimide, acrylic, benzocyclobutene, polyamide, and epoxy can be used. Further, in addition to the above organic insulating material, a single layer such as a low dielectric constant material (low-k material), a siloxane resin, PSG (phosphorus glass), BPSG (phosphorus glass), or a laminate can be used.

The liquid crystal element may be a TN (Twisted Nematic) type, a VA (Vertical Alignment) type, an OCB (Optically Compensated Birefringence) type, an IPS (In-Plane Switching) type, or the like. Further, a liquid crystal showing a blue phase without using an alignment film may be used. The blue phase is one of the liquid crystal phases, and is a phase that appears immediately before the transition from the cholesteric phase to the isotropic phase when the temperature of the cholesteric liquid crystal is raised. Since the blue phase is expressed only in a narrow temperature range, a liquid crystal composition mixed with 5% by weight or more of a chiral agent is used for the liquid crystal 508 in order to improve the temperature range. A liquid crystal composition containing a liquid crystal exhibiting a blue phase and a chiral agent has a short response speed of 1 msec or less, is optically isotropic, does not require an orientation treatment, and has a small viewing angle dependence. Further, since the alignment film does not need to be provided, the rubbing process is not required, so that electrostatic breakdown caused by the rubbing process can be prevented, and defects and breakage of the touch panel during the manufacturing process can be reduced. Therefore, it is possible to improve the productivity of the touch panel.

In the present embodiment, the liquid crystal element 505 having a structure in which the liquid crystal 508 is sandwiched between the pixel electrode 507 and the counter electrode 509 has been described as an example, but the touch panel according to one aspect of the present invention is described. It is not limited to the configuration. Like the IPS type, the pair of electrodes may be a liquid crystal element both formed on the substrate 501 side.

The light from the backlight passes through the substrate 513 and the liquid crystal element 505 as shown by the arrow 520, and irradiates the object to be detected 521 on the substrate 501 side. Then, the light reflected by the object to be detected 521 is incident on the photodiode 502 as shown by the arrow 522.

When detecting external light, the external light is emitted from the substrate (TFT substrate) 501 side. Since the external light is blocked by the object to be detected 521, the incident light on the photodiode 502 is blocked. That is, the photodiode 502 detects the shadow of the object to be detected.

With the above form, it is possible to provide a display panel on which data can be input by detecting the movement of a non-contact object to be detected.

Further, the display device of the present embodiment can detect the object to be detected even when the object to be detected is at a close distance from the display panel. The distance can be 3 cm or less, which is more effective than when a CCD image sensor or the like is provided.

Further, in the display device of the present embodiment, the orientation of the light receiving surface of the photosensor (photodiode 502) and the orientation of the display surface (board 501 side) of the display panel are the same. Therefore, the object to be detected can be imaged on the display panel, which is more effective than the case where a CCD image sensor or the like is provided.

This embodiment can be implemented in combination with other embodiments or examples as appropriate.

(Embodiment 4) In the present embodiment, another configuration of the display panel according to one aspect of the present invention will be described with reference to FIG. 7.

FIG. 7 shows an example of a cross section of the display panel different from that of the third embodiment. In the touch panel shown in FIG. 7, the light reflected by the object to be detected 521 is incident on the photodiode 502 after passing through the substrate 513, which faces the substrate 501 on which the pin-type photodiode is formed, and is used as an electric signal. An example of conversion is shown.

The light from the backlight passes through the substrate 501 and the liquid crystal element 505 as shown by the arrow 560, and irradiates the object to be detected 521 on the substrate 513 side. Then, the light reflected by the object to be detected 521 is incident on the photodiode 502 as shown by the arrow 562. The shielding film 515 has a structure that is not provided in the region through which the light indicated by the arrow 562 passes. The light reflected by the object to be detected 521 may be incident on the photodiode 502, such as by providing an opening in the shielding film 515 above the photodiode 502.

Further, since the mobility of holes generated by the photoelectric effect is smaller than the mobility of electrons, the pin-type photodiode shows a characteristic that it is better to use the p-type semiconductor layer side as the light receiving surface. Here, the light received by the photodiode 502 through the opposite substrate 513 is converted into an electric signal. Further, since the light from the semiconductor layer side having a conductive type opposite to that of the semiconductor layer side as the light receiving surface becomes ambient light, it is preferable to use a conductive film having a light-shielding property for the electrode layer 541. The n-type semiconductor layer side can also be used as the light receiving surface.

Therefore, in the present embodiment, the photodiode 502 includes a third semiconductor layer 506c having an n-type conductive type and a high-resistance semiconductor layer (i-type semiconductor layer) from the electrode layer 541 side connected to the gate electrode layer 545. ), The second semiconductor layer 506b, the first semiconductor layer 506a having a p-type conductive type, and the electrode layer 542 are laminated in this order.

Further, a shielding film may be provided under the photodiode 502. By providing a shielding film, it is possible to prevent the light from the backlight transmitted through the substrate (TFT substrate) 501 and incident on the display panel from directly hitting the photodiode 502, and high-precision image imaging is possible. A display panel can be provided. As the shielding film, an organic resin containing a black pigment such as carbon black or low-order titanium oxide can be used. Alternatively, it is also possible to form a shielding film with a film using chromium.

When infrared light is detected in the photodiode 502, a color filter 514 that transmits infrared light may be formed on the photodiode 502. In that case, it is preferable to have a laminated structure of color filters of different colors.

When detecting external light, the external light is emitted from the substrate (opposite substrate) 513 side. Since the external light is blocked by the object to be detected 521, the incident light on the photodiode 502 is blocked. That is, the photodiode 502 detects the shadow of the object to be detected.

The distance between the object to be detected and the display panel and the orientation of the light receiving surface of the photo sensor and the display surface of the display panel are the same as those in the third embodiment. Since the light receiving surface of the photo sensor faces the display surface (board 513 side) of the display panel, the object to be detected can be imaged on the display panel.

This embodiment can be implemented in combination with other embodiments or examples as appropriate.

(Embodiment 5) This embodiment shows an example of a thin film transistor applicable to the display panel disclosed herein. The thin film transistor 390 shown in the present embodiment is a thin film transistor using an oxide semiconductor layer including a channel forming region in the above embodiment (for example, transistors 201, 205, 206, 301 in the first embodiment, the third embodiment). , 4 can be applied as transistors 503, 540). The same part or the part having the same function as the above-described embodiment and the steps can be performed in the same manner as in the above-described embodiment, and the repeated description will be omitted. Further, detailed description of the same part will be omitted.

One embodiment of the method for manufacturing the thin film transistor of the present embodiment will be described with reference to FIG.

FIGS. 12 (A) to 12 (E) show an example of the cross-sectional structure of the thin film transistor. The thin film transistor 390 shown in FIGS. 12A to 12E is one of the bottom gate structures and is also called an inverted staggered thin film transistor.

Further, although the thin film transistor 390 has been described using a thin film transistor having a single gate structure, a thin film transistor having a multi-gate structure having a plurality of channel forming regions can also be formed, if necessary.

Hereinafter, the process of forming the thin film transistor 390 on the substrate 394 will be described with reference to FIGS. 12 (A) to 12 (E).

First, a conductive film is formed on a substrate 394 having an insulating surface, and then a gate electrode layer 391 is formed by a first photolithography step. It is preferable that the end portion of the formed gate electrode layer has a tapered shape because the covering property of the gate insulating layer laminated on the upper portion is improved. The resist mask may be formed by an inkjet method. When the resist mask is formed by the inkjet method, the photomask is not used, so that the manufacturing cost can be reduced.

There is no major limitation on the substrate that can be used for the substrate 394 having an insulating surface, but it is necessary that the substrate has at least heat resistance enough to withstand the subsequent heat treatment. A glass substrate such as barium borosilicate glass or aluminoborosilicate glass can be used.

Further, as the glass substrate, when the temperature of the subsequent heat treatment is high, it is preferable to use a glass substrate having a strain point of 730 ° C or higher. Further, for the glass substrate, for example, glass materials such as aluminosilicate glass, aluminoborosilicate glass, and bariumborosilicate glass are used. By containing a large amount of barium oxide (BaO) as compared with boron oxide, more practical heat-resistant glass can be obtained. Therefore, B₂O₃It is preferable to use a glass substrate containing more BaO.

Instead of the above glass substrate, a substrate made of an insulator such as a ceramic substrate, a quartz substrate, or a sapphire substrate may be used. In addition, a crystallized glass substrate or the like can be used. Further, a plastic substrate or the like can also be used as appropriate.

An insulating film serving as a base film may be provided between the substrate 394 and the gate electrode layer 391. The undercoat has a function of preventing the diffusion of impurity elements from the substrate 394, and has a laminated structure consisting of one or more films selected from a silicon nitride film, a silicon oxide film, a silicon nitride film, or a silicon oxide film. Can be formed.

The gate electrode layer 391 is formed as a single layer or laminated using a metal material such as molybdenum, titanium, chromium, tantalum, tungsten, aluminum, copper, neodymium, or scandium, or an alloy material containing these as main components. can do.

For example, as a two-layer laminated structure of the gate electrode layer 391, a two-layer structure in which a molybdenum layer is laminated on an aluminum layer, a two-layer structure in which a molybdenum layer is laminated on a copper layer, a titanium nitride layer on a copper layer, or It is preferable to have a two-layer structure in which tantalum nitride layers are laminated, a two-layer structure in which a titanium nitride layer and a molybdenum layer are laminated, or a two-layer structure in which a tungsten nitride layer and a tungsten layer are laminated. As the three-layer laminated structure, it is preferable to laminate a tungsten layer or a tungsten nitride layer, an aluminum-silicon alloy layer or an aluminum-titanium alloy layer, and a titanium nitride layer or a titanium layer. The gate electrode layer can also be formed by using a light-transmitting conductive film. Examples of the translucent conductive film include translucent conductive oxides and the like.

Next, the gate insulating layer 397 is formed on the gate electrode layer 391.

The gate insulating layer 397 uses a plasma CVD method, a sputtering method, or the like to form a silicon oxide layer, a silicon nitride layer, a silicon oxide layer, a silicon nitride layer, an aluminum oxide layer, an aluminum nitride layer, an aluminum nitride layer, and an aluminum nitride oxide. The aluminum layer or the hafnium oxide layer can be formed as a single layer or laminated. When the silicon oxide film is formed by the sputtering method, a silicon target or a quartz target is used as the target, and oxygen or a mixed gas of oxygen and argon is used as the sputtering gas.

Here, an oxide semiconductor (purified oxide semiconductor) that has been I-shaped or substantially I-shaped by removing impurities is extremely sensitive to the interface state or the interfacial charge. Therefore, the interface with the gate insulating layer is important. Therefore, the gate insulating layer 397 in contact with the highly purified oxide semiconductor is required to have high quality.

For example, high-density plasma CVD using μ wave (2.45 GHz) is preferable because it can form a high-quality insulating layer that is dense and has a high dielectric strength. This is because the interface state can be reduced and the interface characteristics can be improved by the contact between the highly purified oxide semiconductor and the high quality gate insulating layer.

Of course, other film forming methods such as a sputtering method and a plasma CVD method can be applied as long as a high-quality insulating layer can be formed as the gate insulating layer. Further, the insulating layer may be an insulating layer in which the film quality of the gate insulating layer and the interface characteristics with the oxide semiconductor are modified by the heat treatment after the film formation. In any case, not only the film quality as the gate insulating layer is good, but also the interface level density with the oxide semiconductor can be reduced and a good interface can be formed.

The gate insulating layer 397 can also have a laminated structure of a nitride insulating layer and an oxide insulating layer from the gate electrode layer 391 side. For example, as the first gate insulating layer, a silicon nitride layer (SiN) having a film thickness of 50 nm or more and 200 nm or less by a sputtering method._y(Y&gt; 0)) is formed, and a silicon oxide layer (SiO) with a film thickness of 5 nm or more and 300 nm or less is formed as a second gate insulating layer on the first gate insulating layer._x(x&gt; 0)) is laminated. The film thickness of the gate insulating layer may be appropriately set depending on the characteristics required for the thin film transistor, and may be about 350 nm to 400 nm.

An oxide semiconductor layer 393 is formed on the gate insulating layer 397. Here, when the oxide semiconductor layer 393 contains impurities, the bond between the impurities and the main component of the oxide semiconductor is cut by stress such as a strong electric field or high temperature, and the generated unbonded hand is the threshold voltage. Induces (Vth) drift.

Therefore, the oxide semiconductor layer 393 and the gate insulating layer 397 in contact with the oxide semiconductor layer 393 are formed so as to contain impurities, particularly hydrogen and water, as little as possible. As a result, a thin film transistor 390 having stable characteristics can be obtained.

Further, in order to prevent hydrogen, hydroxyl groups and moisture from being contained in the gate insulating layer 397 and the oxide semiconductor layer 393 as much as possible, the gate electrode layer 391 is formed in a preheating chamber such as a sputtering apparatus as a pretreatment for film formation. It is preferable to preheat the substrate 394 or the substrate 394 on which the gate insulating layer 397 is formed to remove impurities such as hydrogen and moisture adsorbed on the substrate 394 and exhaust the substrate 394. The preheating temperature is 100 ° C or higher and 400 ° C or lower, preferably 150 ° C or higher and 300 ° C or lower. A cryopump is preferable as the exhaust means provided in the preheating chamber. The preheating process may be omitted. Further, this preheating may be similarly performed on the substrate 394 formed up to the source electrode layer 395a and the drain electrode layer 395b before the oxide insulating layer 396 is formed.

Next, an oxide semiconductor layer 393 having a film thickness of 2 nm or more and 200 nm or less is formed on the gate insulating layer 397 (see FIG. 12 (A)).

Before forming the oxide semiconductor layer 393 by the sputtering method, it is preferable to perform reverse sputtering in which argon gas is introduced to generate plasma to remove dust adhering to the surface of the gate insulating layer 397. .. Reverse sputtering is a method of modifying the surface by applying a voltage to the substrate side using an RF power supply in an argon atmosphere to form plasma in the vicinity of the substrate. In addition, nitrogen, helium, oxygen and the like may be used instead of the argon atmosphere.

The oxide semiconductor layer 393 is formed by a sputtering method. The oxide semiconductor layer 393 includes In-Ga-Zn-O system, In-Sn-Zn-O system, In-Al-Zn-O system, Sn-Ga-Zn-O system, and Al-Ga-Zn-O. System, Sn-Al-Zn-O system, In-Zn-O system, Sn-Zn-O system, Al-Zn-O system, In-O system, Sn-O system, Zn-O system oxide semiconductor Use layers. Further, the oxide semiconductor layer 393 can be formed by a sputtering method under a rare gas (typically argon) atmosphere, an oxygen atmosphere, or a rare gas (typically argon) and an oxygen atmosphere. When the sputtering method is used, SiO₂The film may be formed using a target containing 2% by weight or more and 10% by weight or less. In the present embodiment, the oxide semiconductor layer 393 is formed by a sputtering method using an In-Ga-Zn-O-based metal oxide target.

As a target for producing the oxide semiconductor layer 393 by the sputtering method, a target of a metal oxide containing zinc oxide as a main component can be used. Further, as another example of the metal oxide target, a metal oxide target containing In, Ga, and Zn (as a composition ratio, In).₂O₃: Ga₂O₃: ZnO = 1: 1: 1 [mol ratio]) can be used. In addition, as a metal oxide target containing In, Ga, and Zn, In₂O₃: Ga₂O₃: ZnO = 1: 1: 2 [mol ratio], or In₂O₃: Ga₂O₃A target having a composition ratio of: ZnO = 1: 1: 4 [mol ratio] can also be used. The filling rate of the metal oxide target is 90% or more and 100% or less, preferably 95% or more and 99.9% or less. By using a metal oxide target having a high filling rate, the formed oxide semiconductor layer becomes a dense film.

The substrate is held in a processing chamber kept under reduced pressure, and the substrate is heated to a temperature of less than 400 ° C. Then, a sputtering gas from which hydrogen and water have been removed is introduced while removing water in the treatment chamber, and an oxide semiconductor layer 393 is formed on the substrate 394 by targeting the metal oxide. In order to remove the water in the treatment chamber, it is preferable to use an adsorption type vacuum pump. For example, it is preferable to use a cryopump, an ion pump, or a titanium sublimation pump. Further, as the exhaust means, a turbo molecular pump to which a cold trap is added may be used. The film forming chamber exhausted by using the cryopump is, for example, hydrogen atoms and water (H).₂Since a compound containing a hydrogen atom (more preferably a compound containing a carbon atom) such as O) is exhausted, the concentration of impurities contained in the oxide semiconductor layer formed in the film forming chamber can be reduced. Further, by performing the sputtering film formation while removing the moisture in the processing chamber by the cryopump, the substrate temperature at the time of forming the oxide semiconductor layer 393 can be set to less than 400 ° C. from room temperature.

As an example of the film forming conditions, the conditions under which the distance between the substrate and the target is 100 mm, the pressure is 0.6 Pa, the direct current (DC) power supply is 0.5 kW, and the oxygen (oxygen flow rate ratio is 100%) atmosphere are applied. It is preferable to use a pulsed direct current (DC) power source because dust can be reduced and the film thickness distribution becomes uniform. The oxide semiconductor layer is preferably 5 nm or more and 30 nm or less. The appropriate thickness differs depending on the oxide semiconductor material to be applied, and the thickness may be appropriately selected according to the material.

The sputtering method includes an RF sputtering method in which a high-frequency power source is used as a power source for sputtering, a DC sputtering method, and a pulse DC sputtering method in which a pulse bias is applied. The RF sputtering method is mainly used when forming an insulating film, and the DC sputtering method is mainly used when forming a metal film.

There is also a multi-dimensional sputtering device that can install a plurality of targets made of different materials. The multi-dimensional sputtering apparatus can deposit different material films in the same chamber by laminating, or can simultaneously discharge and deposit a plurality of types of materials in the same chamber to form a film.

Further, there are a sputtering apparatus using a magnetron sputtering method having a magnet mechanism inside the chamber and a sputtering apparatus using an ECR sputtering method using plasma generated by using microwaves without using glow discharge.

Further, as a film forming method using a sputtering method, a reactive sputtering method in which a target substance and a sputtering gas component are chemically reacted during film formation to form a thin film of these compounds, or a voltage is applied to a substrate during film formation. There is also a bias sputtering method.

Next, the oxide semiconductor layer is processed into an island-shaped oxide semiconductor layer 399 by a second photolithography step (see FIG. 12 (B)). Further, a resist mask for forming the island-shaped oxide semiconductor layer 399 may be formed by an inkjet method. When the resist mask is formed by the inkjet method, the photomask is not used, so that the manufacturing cost can be reduced.

Further, when the contact hole is formed in the gate insulating layer 397, the step can be performed at the time of forming the oxide semiconductor layer 399.

The etching of the oxide semiconductor layer 393 here may be dry etching or wet etching, or both may be used.

The etching gas used for dry etching is a gas containing chlorine (chlorine-based gas, for example, chlorine (Cl).₂), Boron chloride (BCl)₃), Silicon chloride (SiCl)₄), Carbon tetrachloride (CCl₄) Etc.) are preferable.

In addition, a gas containing fluorine (fluorine-based gas, for example, carbon tetrafluoride (CF)₄), Sulfur hexafluoride (SF₆), Nitrogen trifluoride (NF₃), Trifluoromethane (CHF)₃) Etc.), hydrogen bromide (HBr), oxygen (O₂), A gas obtained by adding a rare gas such as helium (He) or argon (Ar) to these gases, or the like can be used.

As the dry etching method, a parallel plate type RIE (Reactive Ion Etching) method or an ICP (Inductively Coupled Plasma) etching method can be used. Etching conditions (the amount of power applied to the coil-shaped electrode, the amount of power applied to the electrode on the substrate side, the electrode temperature on the substrate side, etc.) are appropriately adjusted so that the etching can be performed into a desired processing shape.

As the etching solution used for wet etching, a solution of a mixture of phosphoric acid, acetic acid and nitric acid, ammonia superwater (31 wt% hydrogen peroxide solution: 28 wt% ammonia water: water = 5: 2: 2), etc. can be used. it can. Further, ITO 07N (manufactured by Kanto Chemical Co., Inc.) may be used.

Further, the etching solution after wet etching is removed by washing together with the etched material. The waste liquid of the etching solution containing the removed material may be purified and the contained material may be reused. By recovering and reusing a material such as indium contained in the oxide semiconductor layer from the waste liquid after etching, resources can be effectively used and the cost can be reduced.

Etching conditions (etching liquid, etching time, temperature, etc.) are appropriately adjusted according to the material so that etching can be performed in a desired processing shape.

It is preferable to perform reverse sputtering before forming the conductive film in the next step to remove the resist residue and the like adhering to the surfaces of the oxide semiconductor layer 399 and the gate insulating layer 397.

Next, a conductive film is formed on the gate insulating layer 397 and the oxide semiconductor layer 399. The conductive film may be formed by a sputtering method or a vacuum vapor deposition method. The conductive material used as the source electrode layer and the drain electrode layer (including the wiring formed by the same layer) is an element selected from Al, Cr, Cu, Ta, Ti, Mo, and W, or Examples thereof include alloys containing the above-mentioned elements as components, alloys in which the above-mentioned elements are combined, and the like. Further, a structure in which a refractory metal layer such as Cr, Ta, Ti, Mo or W is laminated on one or both of the metal layers such as Al and Cu may be used. In addition, heat resistance should be improved by using Al materials containing elements such as Si, Ti, Ta, W, Mo, Cr, Nd, Sc, and Y that prevent the generation of hillocks and whiskers that occur in the Al film. Is possible.

Further, the conductive film may have a single-layer structure or a laminated structure of two or more layers. For example, a single-layer structure of an aluminum film containing silicon, a two-layer structure in which a titanium film is laminated on an aluminum film, a Ti film, an aluminum film laminated on the Ti film, and a Ti film formed on the Ti film. Examples include a three-layer structure with a film.

Further, the conductive film to be the source electrode layer and the drain electrode layer (including the wiring formed by the same layer) may be formed of a conductive metal oxide. Indium oxide (In) is a conductive metal oxide.₂O₃), Tin oxide (SnO)₂), Zinc oxide (ZnO), indium tin oxide mixed oxide (In₂O₃SnO₂, ITO abbreviated), indium tin oxide mixed oxide (In₂O₃-ZnO) or the metal oxide containing silicon or silicon oxide can be used.

A resist mask is formed on the conductive film by the third photolithography step, and is selectively etched to form the source electrode layer 395a and the drain electrode layer 395b, and then the resist mask is removed (see FIG. 12 (C)). ).

Ultraviolet rays, KrF laser light, and ArF laser light are used for the exposure at the time of forming the resist mask in the third photolithography step. The channel length L of the thin film transistor formed later is determined by the distance between the lower end of the source electrode layer 395a adjacent to each other on the oxide semiconductor layer 399 and the lower end of the drain electrode layer 395b. When exposing with a channel length of less than L = 25 nm, use Extreme Ultraviolet, which has an extremely short wavelength of several nm to several tens of nm, to perform exposure during resist mask formation in the third photolithography step. Do. Exposure with ultraviolet rays has a high resolution and a large depth of focus. Therefore, the channel length L of the thin film transistor formed later can be set to 10 nm or more and 1000 nm or less, and the operating speed of the circuit can be increased. Further, since the thin film transistor using the oxide semiconductor layer of the present embodiment has an extremely small off-current value, it is possible to reduce power consumption.

The respective materials and etching conditions are appropriately adjusted so that the oxide semiconductor layer 399 is not completely removed when the conductive film is etched.

In the present embodiment, a Ti film is used as a conductive film, an In-Ga-Zn-O oxide semiconductor is used for the oxide semiconductor layer 399, and ammonia superwater (31 wt% hydrogen peroxide solution) is used as an etchant. : 28 wt% Ammonia water: Water = 5: 2: 2) is used.

In the third photolithography step, a part of the oxide semiconductor layer 399 may be etched to form an oxide semiconductor layer having grooves (recesses). Further, a resist mask for forming the source electrode layer 395a and the drain electrode layer 395b may be formed by an inkjet method. When the resist mask is formed by the inkjet method, the photomask is not used, so that the manufacturing cost can be reduced.

Further, in order to reduce the number of photomasks and the number of steps used in the photolithography step, even if the etching step is performed using a resist mask formed by a multi-gradation mask which is an exposure mask in which the transmitted light has a plurality of intensities. Good. A resist mask formed by using a multi-gradation mask has a shape having a plurality of film thicknesses, and the shape can be further deformed by etching. Therefore, it can be used in a plurality of etching steps for processing different patterns. it can. Therefore, it is possible to form a resist mask corresponding to at least two or more different patterns by using one multi-tone mask. Therefore, the number of exposure masks can be reduced, and the corresponding photolithography process can also be reduced, so that the process can be simplified.

N₂O, N₂, Or the adsorbed water adhering to the surface of the oxide semiconductor layer exposed by plasma treatment using a gas such as Ar may be removed. Alternatively, plasma treatment may be performed using a mixed gas of oxygen and argon.

When plasma treatment is performed, the oxide insulating layer 396 is subsequently formed without exposing the substrate 394 to the atmosphere (see FIG. 12 (D)). The oxide insulating layer 396 is in contact with a part of the oxide semiconductor layer 399 and functions as a protective insulating film. In the present embodiment, the oxide semiconductor layer 399 is formed so as to be in contact with the oxide insulating layer 396 in a region where the oxide semiconductor layer 399 does not overlap with the source electrode layer 395a and the drain electrode layer 395b.

In the present embodiment, as the oxide insulating layer 396, the silicon oxide layer containing defects is subjected to a silicon target at room temperature or a temperature of less than 100 ° C. in a sputtering gas containing high-purity oxygen from which hydrogen and water have been removed. Use to form a film.

For example, using a silicon target with a purity of 6N and doped with boron (resistance value 0.01Ωcm), the distance between the substrate and the target (distance between TS) is 89mm, the pressure is 0.4Pa, and the direct current (DC) power supply is 6kW. A silicon oxide film is formed by the pulse DC sputtering method in an oxygen (oxygen flow ratio 100%) atmosphere. The film thickness is 300 nm. In addition, instead of the silicon target, quartz (preferably synthetic quartz) can be used as a target for forming a silicon oxide film. Oxygen or a mixed gas of oxygen and argon is used as the sputtering gas.

In this case, it is preferable to form the oxide insulating layer 396 after removing the water in the treatment chamber. This is to prevent hydrogen, hydroxyl groups, or water from being contained in the oxide semiconductor layer 399 and the oxide insulating layer 396.

In order to remove the water in the treatment chamber, it is preferable to use an adsorption type vacuum pump. For example, it is preferable to use a cryopump, an ion pump, or a titanium sublimation pump. Further, as the exhaust means, a turbo molecular pump to which a cold trap is added may be used. The film forming chamber exhausted by using the cryopump is, for example, hydrogen atoms or water (H).₂Since compounds containing hydrogen atoms such as O) are exhausted, the concentration of impurities contained in the oxide insulating layer 396 formed in the film forming chamber can be reduced.

As the oxide insulating layer 396, a silicon nitride layer, an aluminum oxide layer, an aluminum nitride layer, or the like can be used instead of the silicon oxide layer.

Further, the heat treatment may be performed at 100 ° C to 400 ° C with the oxide insulating layer 396 and the oxide semiconductor layer 399 in contact with each other. Since the oxide insulating layer 396 in the present embodiment contains many defects, impurities such as hydrogen, water, hydroxyl groups or hydrides contained in the oxide semiconductor layer 399 are diffused into the oxide insulating layer 396 by this heat treatment. , The impurities contained in the oxide semiconductor layer 399 can be further reduced.

Through the above steps, a thin film transistor 390 having an oxide semiconductor layer 392 with a reduced concentration of hydrogen, water, hydroxyl groups or hydrides can be formed (see FIG. 12 (E)).

When the oxide semiconductor layer is formed as described above, the concentration of hydrogen and hydride in the oxide semiconductor layer can be reduced by removing the water content in the reaction atmosphere. Thereby, the oxide semiconductor layer can be stabilized.

A protective insulating layer may be provided on the oxide insulating layer. In this embodiment, the protective insulating layer 398 is formed on the oxide insulating layer 396. As the protective insulating layer 398, a silicon nitride film, a silicon nitride film, an aluminum nitride film, an aluminum nitride film, or the like is used.

As the protective insulating layer 398, the substrate 394 formed up to the oxide insulating layer 396 is heated to a temperature of 100 ° C to 400 ° C, and a sputtering gas containing high-purity nitrogen from which hydrogen and water have been removed is introduced to form a silicon target. A silicon nitride film is formed using. In this case as well, it is preferable to form the protective insulating layer 398 after removing the moisture in the treatment chamber, as in the case of the oxide insulating layer 396.

When the protective insulating layer 398 is formed, the substrate 394 is heated to 100 ° C to 400 ° C during the formation of the protective insulating layer 398 to remove hydrogen or moisture contained in the oxide semiconductor layer 392 from the oxide insulating layer. It can be spread to 398. In this case, it is not necessary to perform the heat treatment after the formation of the oxide insulating layer 396.

When a silicon oxide layer is formed as the oxide insulating layer 396 and a silicon nitride layer is laminated as the protective insulating layer 398, the silicon oxide layer and the silicon nitride layer are formed in the same processing chamber using a common silicon target. Can be done. First, a sputtering gas containing oxygen is introduced to form a silicon oxide layer using a silicon target mounted in the processing chamber, and then the sputtering gas is switched to nitrogen to form a silicon nitride layer using the same silicon target. Film. As a result, the silicon oxide layer and the silicon nitride layer can be continuously formed without exposing the oxide insulating layer 396 to the atmosphere, so that impurities such as hydrogen and moisture are adsorbed on the surface of the oxide insulating layer 396. It can be prevented from doing so. Further, after forming the protective insulating layer 398, heat treatment (temperature 100 ° C to 400 ° C) for diffusing hydrogen or water contained in the oxide semiconductor layer into the oxide insulating layer may be performed.

After forming the protective insulating layer, heat treatment may be further carried out in the air at 100 ° C. or higher and 200 ° C. or lower, and 1 hour or longer and 30 hours or shorter. This heat treatment may be performed while maintaining a constant heating temperature, or the temperature may be raised from room temperature to a heating temperature of 100 ° C or more and 200 ° C or less, and the temperature may be lowered from the heating temperature to room temperature multiple times. You may go there. Further, this heat treatment may be performed under reduced pressure. The heating time can be shortened by performing the heat treatment under reduced pressure. By this heat treatment, the reliability of the display panel can be further improved.

Further, as described above, when forming an oxide semiconductor layer as a channel forming region on the gate insulating layer, hydrogen and hydrides in the oxide semiconductor layer are removed by removing water in the reaction atmosphere. The concentration can be reduced.

The above steps can be used for manufacturing a backplane (a substrate on which a thin film transistor is formed) such as a liquid crystal display panel, an electroluminescence display panel, and a display device using electronic ink. Since the above process is performed at a temperature of 400 ° C. or less, it can also be applied to a manufacturing process using a glass substrate having a thickness of 1 mm or less and a side of more than 1 m. Moreover, since all the processes can be performed at a processing temperature of 400 ° C. or less, it is not necessary to consume a large amount of energy to manufacture the display panel.

This embodiment can be implemented in combination with other embodiments as appropriate.

As described above, by having the thin film transistor using the oxide semiconductor layer, it is possible to provide a large-sized touch panel having stable electrical characteristics and high reliability.

(Embodiment 6) This embodiment shows another example of a thin film transistor applicable to the display panel disclosed herein. The thin film transistor 310 shown in the present embodiment is a thin film transistor using an oxide semiconductor layer including a channel forming region in the above embodiment (for example, transistors 201, 205, 206, 301 in the first embodiment, and the third embodiment). , 4 can be applied as transistors 503, 540). The same part or the part having the same function as the above-described embodiment and the steps can be performed in the same manner as in the above-described embodiment, and the repeated description will be omitted. Further, detailed description of the same part will be omitted.

A thin film transistor and a method for manufacturing the thin film transistor according to this embodiment will be described with reference to FIG.

FIGS. 13 (A) to 13 (E) show an example of the cross-sectional structure of the thin film transistor. The thin film transistor 310 shown in FIGS. 13A to 13E is one of the bottom gate structures and is also referred to as an inverted staggered thin film transistor.

Further, although the thin film transistor 310 has been described using a thin film transistor having a single gate structure, a thin film transistor having a multi-gate structure having a plurality of channel forming regions can also be formed, if necessary.

Hereinafter, the process of forming the thin film transistor 310 on the substrate 305 will be described with reference to FIGS. 13 (A) to 13 (E).

First, a conductive film is formed on the substrate 305 having an insulating surface, and then the gate electrode layer 311 is formed by the first photolithography step. The resist mask may be formed by an inkjet method. When the resist mask is formed by the inkjet method, the photomask is not used, so that the manufacturing cost can be reduced.

There is no major limitation on the substrate that can be used for the substrate 305 having an insulating surface, but it is necessary that the substrate has at least heat resistance enough to withstand the subsequent heat treatment. A glass substrate such as barium borosilicate glass or aluminoborosilicate glass can be used.

Further, as the glass substrate, when the temperature of the subsequent heat treatment is high, it is preferable to use a glass substrate having a strain point of 730 ° C or higher. Further, for the glass substrate, for example, glass materials such as aluminosilicate glass, aluminoborosilicate glass, and bariumborosilicate glass are used. By containing a large amount of barium oxide (BaO) as compared with boron oxide, more practical heat-resistant glass can be obtained. Therefore, B₂O₃It is preferable to use a glass substrate containing more BaO.

Instead of the above glass substrate, a substrate made of an insulator such as a ceramic substrate, a quartz substrate, or a sapphire substrate may be used. In addition, a crystallized glass substrate or the like can be used.

An insulating film serving as a base film may be provided between the substrate 305 and the gate electrode layer 311. The undercoat has a function of preventing the diffusion of impurity elements from the substrate 305, and has a laminated structure consisting of one or more films selected from a silicon nitride film, a silicon oxide film, a silicon nitride film, or a silicon oxide film. Can be formed.

The gate electrode layer 311 is formed as a single layer or laminated using a metal material such as molybdenum, titanium, chromium, tantalum, tungsten, aluminum, copper, neodymium, or scandium, or an alloy material containing these as main components. can do.

For example, the two-layer laminated structure of the gate electrode layer 311 includes a two-layer laminated structure in which a molybdenum layer is laminated on an aluminum layer, a two-layer structure in which a molybdenum layer is laminated on a copper layer, and titanium nitride on a copper layer. It is preferable to have a two-layer structure in which layers or tantalum nitride layers are laminated, a two-layer structure in which a titanium nitride layer and a molybdenum layer are laminated, or a two-layer structure in which a tungsten nitride layer and a tungsten layer are laminated. As the three-layer laminated structure, it is preferable to laminate a tungsten layer or a tungsten nitride layer, an aluminum-silicon alloy layer or an aluminum-titanium alloy layer, and a titanium nitride layer or a titanium layer.

Next, the gate insulating layer 307 is formed on the gate electrode layer 311.

The gate insulating layer 307 is formed by using a plasma CVD method, a sputtering method, or the like to form a silicon oxide layer, a silicon nitride layer, a silicon nitride layer, a silicon nitride layer, or an aluminum oxide layer as a single layer or by laminating them. Can be done. For example, as a film forming gas, SiH₄, Oxygen and nitrogen may be used to form a silicon oxide nitride layer by a plasma CVD method. The film thickness of the gate insulating layer 307 is 100 nm or more and 500 nm or less, and in the case of lamination, for example, the first gate insulating layer having a film thickness of 50 nm or more and 200 nm or less and the film thickness of 5 nm or more and 300 nm on the first gate insulating layer. The following second gate insulating layer is laminated.

In the present embodiment, a silicon oxide nitride layer having a film thickness of 100 nm is formed as the gate insulating layer 307 by the plasma CVD method.

Next, an oxide semiconductor layer 330 having a film thickness of 2 nm or more and 200 nm or less is formed on the gate insulating layer 307.

Before forming the oxide semiconductor layer 330 by the sputtering method, it is preferable to perform reverse sputtering in which argon gas is introduced to generate plasma to remove dust adhering to the surface of the gate insulating layer 307. .. In addition, nitrogen, helium, oxygen and the like may be used instead of the argon atmosphere.

The oxide semiconductor layer 330 includes In-Ga-Zn-O system, In-Sn-Zn-O system, In-Al-Zn-O system, Sn-Ga-Zn-O system, and Al-Ga-Zn-O. System, Sn-Al-Zn-O system, In-Zn-O system, Sn-Zn-O system, Al-Zn-O system, In-O system, Sn-O system, Zn-O system oxide semiconductor Use layers. The oxide semiconductor layer 330 can be formed by a sputtering method under a rare gas (typically argon) atmosphere, an oxygen atmosphere, or a rare gas (typically argon) and an oxygen atmosphere. When the sputtering method is used, SiO₂The film may be formed using a target containing 2% by weight or more and 10% by weight or less. In the present embodiment, the oxide semiconductor layer 330 is formed by a sputtering method using an In-Ga-Zn-O-based metal oxide target. The cross-sectional view at this stage corresponds to FIG. 13 (A).

As a target for producing the oxide semiconductor layer 330 by the sputtering method, a target of a metal oxide containing zinc oxide as a main component can be used. Further, as another example of the metal oxide target, a metal oxide target containing In, Ga, and Zn (as a composition ratio, In).₂O₃: Ga₂O₃: ZnO = 1: 1: 1 [mol ratio]) can be used. In addition, as a metal oxide target containing In, Ga, and Zn, In₂O₃: Ga₂O₃: ZnO = 1: 1: 2 [mol ratio], or In₂O₃: Ga₂O₃A target having a composition ratio of: ZnO = 1: 1: 4 [mol ratio] can also be used. The filling rate of the metal oxide target is 90% or more and 100% or less, preferably 95% or more and 99.9% or less. By using a metal oxide target having a high filling rate, the formed oxide semiconductor layer becomes a dense film.

As the sputtering gas used when forming the oxide semiconductor layer 330, it is possible to use a high-purity gas in which impurities such as hydrogen, water, a substance having a hydroxyl group, or a hydride are removed to a concentration of about ppm and a concentration of about ppb. preferable.

The substrate is held in a processing chamber kept under reduced pressure, and the substrate temperature is 100 ° C or higher and 600 ° C or lower, preferably 200 ° C or higher and 400 ° C or lower. By forming a film while heating the substrate, the concentration of impurities contained in the formed oxide semiconductor layer can be reduced. In addition, damage due to sputtering is reduced. Then, a sputtering gas from which hydrogen and water have been removed is introduced while removing water in the treatment chamber, and an oxide semiconductor layer 330 is formed on the substrate 305 by targeting the metal oxide. In order to remove the water in the treatment chamber, it is preferable to use an adsorption type vacuum pump. For example, it is preferable to use a cryopump, an ion pump, or a titanium sublimation pump. Further, as the exhaust means, a turbo molecular pump to which a cold trap is added may be used. The film forming chamber exhausted by using the cryopump is, for example, hydrogen atoms and water (H).₂Since a compound containing a hydrogen atom (more preferably a compound containing a carbon atom) such as O) is exhausted, the concentration of impurities contained in the oxide semiconductor layer formed in the film forming chamber can be reduced.

As an example of the film forming conditions, the conditions under which the distance between the substrate and the target is 100 mm, the pressure is 0.6 Pa, the direct current (DC) power supply is 0.5 kW, and the oxygen (oxygen flow rate ratio is 100%) atmosphere are applied. It is preferable to use a pulsed direct current (DC) power source because dust can be reduced and the film thickness distribution becomes uniform. The oxide semiconductor layer is preferably 5 nm or more and 30 nm or less. The appropriate thickness differs depending on the oxide semiconductor material to be applied, and the thickness may be appropriately selected according to the material.

Next, the oxide semiconductor layer 330 is processed into an island-shaped oxide semiconductor layer by a second photolithography step. Further, the resist mask for forming the island-shaped oxide semiconductor layer may be formed by an inkjet method. When the resist mask is formed by the inkjet method, the photomask is not used, so that the manufacturing cost can be reduced.

Next, the oxide semiconductor layer is subjected to the first heat treatment. The oxide semiconductor layer can be dehydrated or dehydrogenated by this first heat treatment. The temperature of the first heat treatment is 400 ° C or higher and 750 ° C or lower, preferably 400 ° C or higher and lower than the strain point of the substrate. Here, the substrate is introduced into an electric furnace, which is one of the heat treatment devices, and the oxide semiconductor layer is heat-treated at 450 ° C. for 1 hour in a nitrogen atmosphere to obtain the oxide semiconductor layer 331 (Fig.). See 13 (B).).

The heat treatment device is not limited to the electric furnace, and may include a device that heats the object to be treated by heat conduction or heat radiation from a heating element such as a resistance heating element. For example, an RTA (Rapid Thermal Anneal) device such as a GRTA (Gas Rapid Thermal Anneal) device or an LRTA (Lamp Rapid Thermal Anneal) device can be used. The LRTA device is a device that heats an object to be treated by radiating light (electromagnetic waves) emitted from lamps such as halogen lamps, metal halide lamps, xenon arc lamps, carbon arc lamps, high-pressure sodium lamps, and high-pressure mercury lamps. The GRTA device is a device that performs heat treatment using high-temperature gas. As the gas, a rare gas such as argon or an inert gas such as nitrogen that does not react with the object to be treated in the heat treatment is used.

For example, as the first heat treatment, the substrate is moved into an inert gas heated to a high temperature of 650 ° C to 700 ° C, heated for several minutes, and then the substrate is moved and heated to a high temperature. GRTA may be performed out of the gas. GRTA enables high temperature heat treatment in a short time.

In the first heat treatment, it is preferable that nitrogen or a rare gas such as helium, neon, or argon does not contain water, hydrogen, or the like. Alternatively, the purity of nitrogen or a rare gas such as helium, neon, or argon to be introduced into the heat treatment apparatus is 6N (99.9999%) or more, preferably 7N (99.99999%) or more (that is, the impurity concentration is 1ppm or less, preferably 0.1). It is preferably ppm or less).

Further, the first heat treatment of the oxide semiconductor layer can also be performed on the oxide semiconductor layer 330 before being processed into the island-shaped oxide semiconductor layer. In that case, after the first heat treatment, the substrate is taken out from the heating device and a photolithography step is performed.

The heat treatment that exerts the effects of dehydration and dehydrogenation on the oxide semiconductor layer involves forming the oxide semiconductor layer, laminating the source electrode layer and the drain electrode layer on the oxide semiconductor layer, and then laminating the source electrode layer and the drain electrode layer. After forming a protective insulating film on the drain electrode layer, any of these may be performed.

Further, when the contact hole is formed in the gate insulating layer 307, the step may be performed before or after the dehydration or dehydrogenation treatment of the oxide semiconductor layer 330.

The etching of the oxide semiconductor layer here is not limited to wet etching, and dry etching may be used.

Etching conditions (etching liquid, etching time, temperature, etc.) are appropriately adjusted according to the material so that etching can be performed in a desired processing shape.

Next, a conductive film to be a source electrode layer and a drain electrode layer (including wiring formed of the same layer) is formed on the gate insulating layer 307 and the oxide semiconductor layer 331. The conductive film may be formed by a sputtering method or a vacuum vapor deposition method. The conductive material to be the source electrode layer and the drain electrode layer (including the wiring formed by the same layer) is an element selected from Al, Cr, Cu, Ta, Ti, Mo, and W, or Examples thereof include alloys containing the above-mentioned elements as components, alloys in which the above-mentioned elements are combined, and the like. Further, a structure in which a refractory metal layer such as Cr, Ta, Ti, Mo or W is laminated on one or both of the metal layers such as Al and Cu may be used. In addition, heat resistance should be improved by using Al materials containing elements such as Si, Ti, Ta, W, Mo, Cr, Nd, Sc, and Y that prevent the generation of hillocks and whiskers that occur in the Al film. Is possible.

Further, the conductive film may have a single-layer structure or a laminated structure of two or more layers. For example, a single-layer structure of an aluminum film containing silicon, a two-layer structure in which a titanium film is laminated on an aluminum film, a Ti film, an aluminum film laminated on the Ti film, and a Ti film formed on the Ti film. Examples include a three-layer structure with a film.

Further, the conductive film to be the source electrode layer and the drain electrode layer (including the wiring formed by the same layer) may be formed of a conductive metal oxide. Indium oxide (In) is a conductive metal oxide.₂O₃), Tin oxide (SnO)₂), Zinc oxide (ZnO), indium tin oxide mixed oxide (In₂O₃SnO₂, ITO abbreviated), indium tin oxide mixed oxide (In₂O₃-ZnO) or the metal oxide containing silicon or silicon oxide can be used.

When the heat treatment is performed after the film is formed on the conductive film, it is preferable that the conductive film has heat resistance to withstand this heat treatment.

A resist mask is formed on the conductive film by the third photolithography step, and is selectively etched to form the source electrode layer 315a and the drain electrode layer 315b, and then the resist mask is removed (see FIG. 13 (C)). ).

Ultraviolet rays, KrF laser light, and ArF laser light are used for the exposure at the time of forming the resist mask in the third photolithography step. The channel length L of the thin film transistor formed later is determined by the distance between the lower end of the source electrode layer 315a adjacent to each other on the oxide semiconductor layer 331 and the lower end of the drain electrode layer 315b. When exposing with a channel length of less than L = 25 nm, use Extreme Ultraviolet, which has an extremely short wavelength of several nm to several tens of nm, to perform exposure during resist mask formation in the third photolithography step. Do. Exposure with ultraviolet rays has a high resolution and a large depth of focus. Therefore, the channel length L of the thin film transistor formed later can be set to 10 nm or more and 1000 nm or less, and the operating speed of the circuit can be increased. Further, since the thin film transistor using the oxide semiconductor layer of the present embodiment has an extremely small off-current value, it is possible to reduce power consumption.

When etching the conductive film, the respective materials and etching conditions are appropriately adjusted so that the oxide semiconductor layer 331 is not completely removed.

In the present embodiment, a Ti film is used as a conductive film, an In-Ga-Zn-O oxide semiconductor is used for the oxide semiconductor layer 331, and ammonia superwater (31 wt% hydrogen peroxide solution) is used as an etchant. : 28 wt% Ammonia water: Water = 5: 2: 2) is used.

In the third photolithography step, a part of the oxide semiconductor layer 331 may be etched to form an oxide semiconductor layer having grooves (recesses). Further, a resist mask for forming the source electrode layer 315a and the drain electrode layer 315b may be formed by an inkjet method. When the resist mask is formed by the inkjet method, the photomask is not used, so that the manufacturing cost can be reduced.

Further, an oxide conductive layer may be formed between the oxide semiconductor layer 331, the source electrode layer 315a and the drain electrode layer 315b. The metal layer for forming the oxide conductive layer, the source electrode layer, and the drain electrode layer can be continuously formed. The oxide conductive layer can function as a source region and a drain region.

By providing the oxide conductive layer between the oxide semiconductor layer 331 and the source electrode layer 315a and the drain electrode layer 315b as the source region and the drain region, it is possible to reduce the resistance of the source region and the drain region. High-speed operation of the transistor is possible.

Further, in order to reduce the number of photomasks and the number of steps used in the photolithography step, even if the etching step is performed using a resist mask formed by a multi-gradation mask which is an exposure mask in which the transmitted light has a plurality of intensities. Good. A resist mask formed by using a multi-gradation mask has a shape having a plurality of film thicknesses, and the shape can be further deformed by etching. Therefore, it can be used in a plurality of etching steps for processing different patterns. it can. Therefore, it is possible to form a resist mask corresponding to at least two or more different patterns by using one multi-tone mask. Therefore, the number of exposure masks can be reduced, and the corresponding photolithography process can also be reduced, so that the process can be simplified.

Then N₂O, N₂, Or plasma treatment using a gas such as Ar. Adsorbed water and the like adhering to the surface of the oxide semiconductor layer exposed by this plasma treatment are removed. Alternatively, plasma treatment may be performed using a mixed gas of oxygen and argon.

After the plasma treatment, the oxide insulating layer 316 serving as a protective insulating film in contact with a part of the oxide semiconductor layer is formed without exposing the oxide semiconductor layer to the atmosphere.

The oxide insulating layer 316 has a film thickness of at least 1 nm or more, and can be formed by appropriately using a method such as a sputtering method in which impurities such as water and hydrogen are not mixed into the oxide insulating layer 316. When hydrogen is contained in the oxide insulating layer 316, the hydrogen penetrates into the oxide semiconductor layer or is extracted by hydrogen to oxygen in the oxide semiconductor layer, and the back channel of the oxide semiconductor layer becomes low resistance ( It may become N-shaped) and a parasitic channel may be formed. Therefore, it is important not to use hydrogen in the film forming method so that the oxide insulating layer 316 becomes a film containing as little hydrogen as possible.

The oxide insulating layer 316 formed in contact with the oxide semiconductor layer contains water, hydrogen ions, and OH.^-An inorganic insulating film that does not contain impurities such as, and blocks the invasion of these from the outside, typically a silicon oxide film, a silicon nitride film, an aluminum oxide film, an aluminum nitride film, or the like is used. In the present embodiment, a silicon oxide film having a film thickness of 200 nm is formed as the oxide insulating layer 316 by a sputtering method. The substrate temperature at the time of film formation may be room temperature or higher and 300 ° C. or lower, and in this embodiment, 100 ° C. The film formation of the silicon oxide film by the sputtering method can be performed in a rare gas (typically argon) atmosphere, an oxygen atmosphere, or a rare gas (typically argon) and an oxygen atmosphere. Further, a silicon oxide target or a silicon target can be used as the target. For example, using a silicon target, a silicon oxide film can be formed by a sputtering method in an oxygen and nitrogen atmosphere.

In this case, it is preferable to form the oxide insulating layer 316 while removing the water content in the treatment chamber. This is to prevent hydrogen, hydroxyl groups, or water from being contained in the oxide semiconductor layer 331 and the oxide insulating layer 316.

In order to remove the water in the treatment chamber, it is preferable to use an adsorption type vacuum pump. For example, it is preferable to use a cryopump, an ion pump, or a titanium sublimation pump. Further, as the exhaust means, a turbo molecular pump to which a cold trap is added may be used. The film forming chamber exhausted by using the cryopump is, for example, hydrogen atoms or water (H).₂Since compounds containing hydrogen atoms such as O) are exhausted, the concentration of impurities contained in the oxide insulating layer 316 formed in the film forming chamber can be reduced.

As the sputtering gas used for forming the oxide insulating layer 316, it is preferable to use a high-purity gas in which impurities such as hydrogen, water, hydroxyl groups and hydrides have been removed to a concentration of about ppm and a concentration of about ppb.

Next, the second heat treatment (preferably 200 ° C. or higher and 400 ° C. or lower, for example 250 ° C. or higher and 350 ° C. or lower) is performed in an inert gas atmosphere or an oxygen gas atmosphere. For example, a second heat treatment is performed at 250 ° C. for 1 hour in a nitrogen atmosphere. In the second heat treatment, the oxide semiconductor layer is heated with a part thereof (channel forming region) in contact with the oxide insulating layer 316.

Through the above steps, the oxide semiconductor layer after film formation is reduced in resistance by the first heat treatment for dehydration or dehydrogenation, and then the oxide semiconductor layer is reduced by the second heat treatment. The part in contact with 316 is selectively in a state of excess oxygen. As a result, the channel forming region 313 overlapping the gate electrode layer 311 becomes type I, and the high resistance source region 314a overlapping the source electrode layer 315a and the high resistance drain region 314b overlapping the drain electrode layer 315b are self-consistently formed. To. The thin film transistor 310 is formed by the above steps (see FIG. 13 (D)).

Further, when a silicon oxide layer containing many defects is used as the oxide insulating layer 316, impurities such as hydrogen, water, hydroxyl groups or hydrides contained in the oxide semiconductor layer are oxidized by heat treatment after the formation of the silicon oxide layer. It diffuses into the insulating layer and has the effect of further reducing the impurities contained in the oxide semiconductor layer.

By forming a high resistance drain region 314b (or a high resistance source region 314a) in the oxide semiconductor layer superimposed on the drain electrode layer 315b (and the source electrode layer 315a), the reliability of the thin film transistor can be improved. it can. Specifically, by forming the high resistance drain region 314b, it is possible to form a structure in which the conductivity can be changed stepwise from the drain electrode layer 315b to the high resistance drain region 314b and the channel formation region 313. .. Therefore, when operating by connecting to the wiring that supplies the high power supply potential VDD to the drain electrode layer 315b, the high resistance drain region serves as a buffer even if a high electric field is applied between the gate electrode layer 311 and the drain electrode layer 315b. A local high electric field is not applied, and the withstand voltage of the transistor can be improved.

Further, the high resistance source region 314a or the high resistance drain region 314b in the oxide semiconductor layer 331 is formed over the entire film thickness direction when the film thickness of the oxide semiconductor layer 331 is as thin as 15 nm or less, but the oxide semiconductor layer When the film thickness of 331 is 30 nm or more, it is formed only in a part of the oxide semiconductor layer 331, that is, the region in contact with the source electrode layer 315a or the drain electrode layer 315b and its vicinity, and the region close to the gate insulating film 331 is formed. It can also be type I.

A protective insulating layer 308 may be further formed on the oxide insulating layer 316. The protective insulating layer 308 contains moisture, hydrogen ions, and OH.^-An inorganic insulating film that does not contain impurities such as these and blocks the invasion of these from the outside is used, and a silicon nitride film, an aluminum nitride film, a silicon nitride film, an aluminum nitride film, or the like is used. For example, an RF sputtering method is used to form a silicon nitride film. The RF sputtering method is preferable as a method for forming a protective insulating layer because it has good mass productivity. In the present embodiment, the protective insulating layer 306 is formed by using the silicon nitride film (see FIG. 13 (E)).

In the present embodiment, as the protective insulating layer 306, the substrate 305 formed up to the oxide insulating layer 316 is heated to a temperature of 100 ° C to 400 ° C, and sputtering containing high-purity nitrogen from which hydrogen and water have been removed. A gas is introduced and a silicon nitride film is formed using a silicon target. In this case as well, it is preferable to form the protective insulating layer 306 while removing the moisture in the treatment chamber, as in the case of the oxide insulating layer 316.

After the protective insulating layer 306 is formed, heat treatment may be further carried out in the air at 100 ° C. or higher and 200 ° C. or lower, and 1 hour or longer and 30 hours or shorter. This heat treatment may be performed while maintaining a constant heating temperature, or the temperature may be raised from room temperature to a heating temperature of 100 ° C or more and 200 ° C or less, and the temperature may be lowered from the heating temperature to room temperature multiple times. You may go there. Further, this heat treatment may be performed under reduced pressure. The heating time can be shortened by performing the heat treatment under reduced pressure.

A flattening insulating layer for flattening may be provided on the protective insulating layer 306.

This embodiment can be implemented in combination with other embodiments as appropriate.

As described above, by having the thin film transistor using the oxide semiconductor layer, it is possible to provide a large-sized touch panel having stable electrical characteristics and high reliability.

(Embodiment 7) This embodiment shows another example of a thin film transistor applicable to the display panel disclosed herein. The thin film transistor 360 shown in the present embodiment is a thin film transistor using an oxide semiconductor layer including a channel forming region in the above embodiment (for example, transistors 201, 205, 206, 301 in the first embodiment, the third embodiment). , 4 can be applied as transistors 503, 540). The same part or the part having the same function as the above-described embodiment and the steps can be performed in the same manner as in the above-described embodiment, and the repeated description will be omitted. Further, detailed description of the same part will be omitted.

One embodiment of the thin film transistor and the method for producing the thin film transistor of the present embodiment will be described with reference to FIG.

FIGS. 14 (A) to 14 (D) show an example of the cross-sectional structure of the thin film transistor. The thin film transistor 360 shown in FIGS. 14 (A) to 14 (D) is one of the bottom gate structures called a channel protection type (also called a channel stop type) and is also called an inverted stagger type thin film transistor.

Further, although the thin film transistor 360 has been described using a thin film transistor having a single gate structure, a thin film transistor having a multi-gate structure having a plurality of channel forming regions can also be formed, if necessary.

Hereinafter, the process of forming the thin film transistor 360 on the substrate 320 will be described with reference to FIGS. 14 (A) to 14 (D).

First, a conductive film is formed on the substrate 320 having an insulating surface, and then the gate electrode layer 361 is formed by the first photolithography step. The resist mask may be formed by an inkjet method. When the resist mask is formed by the inkjet method, the photomask is not used, so that the manufacturing cost can be reduced.

The gate electrode layer 361 is formed as a single layer or laminated using a metal material such as molybdenum, titanium, chromium, tantalum, tungsten, aluminum, copper, neodymium, or scandium, or an alloy material containing these as main components. can do.

Next, the gate insulating layer 322 is formed on the gate electrode layer 361.

In the present embodiment, a silicon oxide nitride layer having a film thickness of 100 nm is formed as the gate insulating layer 322 by the plasma CVD method.

Next, an oxide semiconductor layer having a film thickness of 2 nm or more and 200 nm or less is formed on the gate insulating layer 322, and is processed into an island-shaped oxide semiconductor layer by a second photolithography step. In the present embodiment, an In-Ga-Zn-O-based metal oxide target is used as the oxide semiconductor layer to form a film by a sputtering method.

In this case, it is preferable to form an oxide semiconductor layer while removing water in the treatment chamber. This is to prevent the oxide semiconductor layer from containing hydrogen, hydroxyl groups, or water.

In order to remove the water in the treatment chamber, it is preferable to use an adsorption type vacuum pump. For example, it is preferable to use a cryopump, an ion pump, or a titanium sublimation pump. Further, as the exhaust means, a turbo molecular pump to which a cold trap is added may be used. The film forming chamber exhausted by using the cryopump is, for example, hydrogen atoms or water (H).₂Since compounds containing hydrogen atoms such as O) are exhausted, the concentration of impurities contained in the oxide semiconductor layer formed in the film forming chamber can be reduced.

As the sputtering gas used for forming the oxide semiconductor layer, it is preferable to use a high-purity gas in which impurities such as hydrogen, water, hydroxyl groups and hydrides are removed to a concentration of about ppm and a concentration of about ppb.

Next, the oxide semiconductor layer is dehydrated or dehydrogenated. The temperature of the first heat treatment for dehydration or dehydrogenation is 400 ° C or higher and 750 ° C or lower, preferably 400 ° C or higher and lower than the strain point of the substrate. Here, the substrate is introduced into an electric furnace, which is one of the heat treatment devices, and the oxide semiconductor layer is heat-treated at 450 ° C for 1 hour in a nitrogen atmosphere, and then oxidized without being exposed to the atmosphere. The oxide semiconductor layer 332 is obtained by preventing the remixing of water and hydrogen into the physical semiconductor layer (see Fig. 14 (A)).

Then N₂O, N₂, Or plasma treatment using a gas such as Ar. Adsorbed water and the like adhering to the surface of the oxide semiconductor layer exposed by this plasma treatment are removed. Alternatively, plasma treatment may be performed using a mixed gas of oxygen and argon.

Next, after forming an oxide insulating layer on the gate insulating layer 322 and the oxide semiconductor layer 332, a resist mask is formed by a third photolithography step and selectively etched to perform the oxide insulating layer 366. After forming the resist mask, the resist mask is removed.

In the present embodiment, a silicon oxide film having a film thickness of 200 nm is formed as the oxide insulating layer 366 by a sputtering method. The substrate temperature at the time of film formation may be room temperature or higher and 300 ° C. or lower, and in this embodiment, 100 ° C. The film formation of the silicon oxide film by the sputtering method can be performed in a rare gas (typically argon) atmosphere, an oxygen atmosphere, or a rare gas (typically argon) and an oxygen atmosphere. Further, a silicon oxide target or a silicon target can be used as the target. For example, using a silicon target, a silicon oxide film can be formed by a sputtering method in an oxygen and nitrogen atmosphere. The oxide insulating layer 366 formed in contact with the low resistance oxide semiconductor layer contains moisture, hydrogen ions, and OH.^-An inorganic insulating film that does not contain impurities such as these and blocks the invasion of these from the outside is used, and a silicon oxide film, a silicon nitride film, an aluminum oxide film, an aluminum nitride film, or the like is typically used.

In this case, it is preferable to form the oxide insulating layer 366 while removing the water content in the treatment chamber. This is to prevent hydrogen, hydroxyl groups, or water from being contained in the oxide semiconductor layer 332 and the oxide insulating layer 366.

In order to remove the water in the treatment chamber, it is preferable to use an adsorption type vacuum pump. For example, it is preferable to use a cryopump, an ion pump, or a titanium sublimation pump. Further, as the exhaust means, a turbo molecular pump to which a cold trap is added may be used. The film forming chamber exhausted by using the cryopump is, for example, hydrogen atoms or water (H).₂Since compounds containing hydrogen atoms such as O) are exhausted, the concentration of impurities contained in the oxide insulating layer 366 formed in the film forming chamber can be reduced.

As the sputtering gas used for forming the oxide insulating layer 366, it is preferable to use a high-purity gas in which impurities such as hydrogen, water, hydroxyl groups and hydrides are removed to a concentration of about ppm and a concentration of about ppb.

Then, the second heat treatment (preferably 200 ° C. or higher and 400 ° C. or lower, for example, 250 ° C. or higher and 350 ° C. or lower) may be performed under an inert gas atmosphere or an oxygen gas atmosphere. For example, a second heat treatment is performed at 250 ° C. for 1 hour in a nitrogen atmosphere. When the second heat treatment is performed, a part of the oxide semiconductor layer (channel forming region) is heated in contact with the oxide insulating layer 366.

In the present embodiment, the oxide semiconductor layer 332 further provided with the oxide insulating layer 366 and partially exposed is heat-treated in an inert gas atmosphere such as nitrogen or under reduced pressure. The region of the exposed oxide semiconductor layer 332 not covered by the oxide insulating layer 366 can be reduced in resistance by heat treatment under an inert gas atmosphere such as nitrogen or under reduced pressure. For example, heat treatment is performed at 250 ° C. for 1 hour in a nitrogen atmosphere.

By heat treatment of the oxide semiconductor layer 332 provided with the oxide insulating layer 366 under a nitrogen atmosphere, the exposed region of the oxide semiconductor layer 332 is reduced in resistance, and the region having different resistance (diagonal region in FIG. 14 (B)). And the oxide semiconductor layer 362 having (shown in the white background region).

Next, after forming a conductive film on the gate insulating layer 322, the oxide semiconductor layer 362, and the oxide insulating layer 366, a resist mask is formed by a fourth photolithography step, and the source is selectively etched. After forming the electrode layer 365a and the drain electrode layer 365b, the resist mask is removed (see FIG. 14 (C)).

As the material of the source electrode layer 365a and the drain electrode layer 365b, an element selected from Al, Cr, Cu, Ta, Ti, Mo, and W, an alloy containing the above-mentioned elements as a component, and the above-mentioned elements are combined. An alloy film or the like can be mentioned. Further, a structure in which a refractory metal layer such as Cr, Ta, Ti, Mo or W is laminated on one or both of the metal layers such as Al and Cu may be used. In addition, heat resistance should be improved by using Al materials containing elements such as Si, Ti, Ta, W, Mo, Cr, Nd, Sc, and Y that prevent the generation of hillocks and whiskers that occur in the Al film. Is possible.

Further, the source electrode layer 365a and the drain electrode layer 365b may have a single layer structure or a laminated structure of two or more layers. For example, a single-layer structure of an aluminum film containing silicon, a two-layer structure in which a titanium film is laminated on an aluminum film, a Ti film, an aluminum film laminated on the Ti film, and a Ti film formed on the Ti film. Examples include a three-layer structure with a film.

Further, the source electrode layer 365a and the drain electrode layer 365b may be formed of a conductive metal oxide. Indium oxide (In) is a conductive metal oxide.₂O₃), Tin oxide (SnO)₂), Zinc oxide (ZnO), Indium tin oxide alloy (In₂O₃SnO₂, ITO abbreviated), indium tin oxide alloy (In₂O₃-ZnO) or the metal oxide material containing silicon or silicon oxide can be used.

Through the above steps, the oxide semiconductor layer after film formation is heat-treated for dehydration or dehydrogenation to reduce the resistance, and then a part of the oxide semiconductor layer is selectively selected. It is in a state of excess oxygen. As a result, the channel forming region 363 overlapping the gate electrode layer 361 becomes type I, and the high resistance source region 364a overlapping the source electrode layer 365a and the high resistance drain region 364b overlapping the drain electrode layer 365b are self-consistently formed. Will be done. The thin film transistor 360 is formed by the above steps.

By forming a high resistance drain region 364b (or a high resistance source region 364a) in the oxide semiconductor layer superimposed on the drain electrode layer 365b (and the source electrode layer 365a), the reliability of the thin film transistor can be improved. it can. Specifically, by forming the high resistance drain region 364b, it is possible to form a structure in which the conductivity can be changed stepwise from the drain electrode layer 365b to the high resistance drain region 364b and the channel formation region 363. .. Therefore, when operating by connecting to a wiring that supplies the high power supply potential VDD to the drain electrode layer 365b, the high resistance drain region serves as a buffer even if a high electric field is applied between the gate electrode layer 361 and the drain electrode layer 365b. A local high electric field is not applied, and the withstand voltage of the transistor can be improved.

A protective insulating layer 323 is formed on the source electrode layer 365a, the drain electrode layer 365b, and the oxide insulating layer 366. In the present embodiment, the protective insulating layer 323 is formed by using the silicon nitride film (see FIG. 14 (D)).

An oxide insulating layer may be further formed on the source electrode layer 365a, the drain electrode layer 365b, and the oxide insulating layer 366, and the protective insulating layer 323 may be laminated on the oxide insulating layer.

This embodiment can be implemented in combination with other embodiments as appropriate.

As described above, by having the thin film transistor using the oxide semiconductor layer, it is possible to provide a large-sized touch panel having stable electrical characteristics and high reliability.

(Embodiment 8) This embodiment shows another example of a thin film transistor applicable to the display panel disclosed herein. The thin film transistor 350 shown in the present embodiment is a thin film transistor using an oxide semiconductor layer including a channel forming region in the above embodiment (for example, transistors 201, 205, 206, 301 in the first embodiment, and the third embodiment). , 4 can be applied as transistors 503, 540). The same parts as those in the above embodiment or the parts and steps having the same functions can be performed in the same manner as in the above-described embodiment, and the repeated description will be omitted. Further, detailed description of the same part will be omitted.

One embodiment of the thin film transistor and the method for producing the thin film transistor of the present embodiment will be described with reference to FIG.

Further, although the thin film transistor 350 has been described using a thin film transistor having a single gate structure, a thin film transistor having a multi-gate structure having a plurality of channel forming regions can also be formed, if necessary.

Hereinafter, the process of forming the thin film transistor 350 on the substrate 340 will be described with reference to FIGS. 15 (A) to 15 (D).

First, a conductive film is formed on a substrate 340 having an insulating surface, and then a gate electrode layer 351 is formed by a first photolithography step. In the present embodiment, a tungsten film having a film thickness of 150 nm is formed as the gate electrode layer 351 by using a sputtering method.

Next, the gate insulating layer 342 is formed on the gate electrode layer 351. In the present embodiment, a silicon oxide nitride layer having a film thickness of 100 nm is formed as the gate insulating layer 342 by the plasma CVD method.

Next, a conductive film was formed on the gate insulating layer 342, a resist mask was formed on the conductive film by a second photolithography step, and etching was selectively performed to form a source electrode layer 355a and a drain electrode layer 355b. After that, the resist mask is removed (see FIG. 15 (A)).

Next, the oxide semiconductor layer 345 is formed (see FIG. 15 (B)). In the present embodiment, the oxide semiconductor layer 345 is formed by a sputtering method using an In-Ga-Zn-O-based metal oxide target. The oxide semiconductor layer 345 is processed into an island-shaped oxide semiconductor layer by a third photolithography step.

In this case, it is preferable to form the oxide semiconductor layer 345 while removing the water content in the treatment chamber. This is to prevent the oxide semiconductor layer 345 from containing hydrogen, hydroxyl groups, or water.

In order to remove the water in the treatment chamber, it is preferable to use an adsorption type vacuum pump. For example, it is preferable to use a cryopump, an ion pump, or a titanium sublimation pump. Further, as the exhaust means, a turbo molecular pump to which a cold trap is added may be used. The film forming chamber exhausted by using the cryopump is, for example, hydrogen atoms or water (H).₂Since compounds containing hydrogen atoms such as O) are exhausted, the concentration of impurities contained in the oxide semiconductor layer 345 formed in the film forming chamber can be reduced.

As the sputtering gas used for forming the oxide semiconductor layer 345, it is preferable to use a high-purity gas in which impurities such as hydrogen, water, hydroxyl groups and hydrides are removed to a concentration of about ppm and a concentration of about ppb.

Next, the oxide semiconductor layer is dehydrated or dehydrogenated. The temperature of the first heat treatment for dehydration or dehydrogenation is 400 ° C or higher and 750 ° C or lower, preferably 400 ° C or higher and lower than the strain point of the substrate. Here, the substrate is introduced into an electric furnace, which is one of the heat treatment devices, and the oxide semiconductor layer is heat-treated at 450 ° C for 1 hour in a nitrogen atmosphere, and then oxidized without being exposed to the atmosphere. Prevents water and hydrogen from being remixed into the physical semiconductor layer, and obtains an oxide semiconductor layer 346 (see Fig. 15 (C)).

As the first heat treatment, the substrate is moved into an inert gas heated to a high temperature of 650 ° C to 700 ° C, heated for several minutes, and then the substrate is moved to be heated to a high temperature. You may perform GRTA from inside. GRTA enables high temperature heat treatment in a short time.

Next, the oxide insulating layer 356 serving as a protective insulating film in contact with the oxide semiconductor layer 346 is formed.

The oxide insulating layer 356 has a film thickness of at least 1 nm or more, and can be formed by appropriately using a method such as a sputtering method in which impurities such as water and hydrogen are not mixed into the oxide insulating layer 356. When hydrogen is contained in the oxide insulating layer 356, the hydrogen invades the oxide semiconductor layer, and the hydrogen abstracts oxygen in the oxide semiconductor layer to lower the resistance of the back channel of the oxide semiconductor layer (N type). There is a risk that parasitic channels will be formed. Therefore, it is important not to use hydrogen in the film forming method so that the oxide insulating layer 356 becomes a film containing as little hydrogen as possible.

In the present embodiment, a silicon oxide film having a film thickness of 200 nm is formed as the oxide insulating layer 356 by a sputtering method. The substrate temperature at the time of film formation may be room temperature or higher and 300 ° C. or lower, and in this embodiment, 100 ° C. The film formation of the silicon oxide film by the sputtering method can be performed in a rare gas (typically argon) atmosphere, an oxygen atmosphere, or a rare gas (typically argon) and an oxygen atmosphere. Further, a silicon oxide target or a silicon target can be used as the target. For example, a silicon target can be used to form silicon oxide by sputtering in an oxygen and nitrogen atmosphere. The oxide insulating layer 356 formed in contact with the low resistance oxide semiconductor layer contains water, hydrogen ions, and OH.^-An inorganic insulating film that does not contain impurities such as these and blocks the invasion of these from the outside is used, and a silicon oxide film, a silicon nitride film, an aluminum oxide film, an aluminum nitride film, or the like is typically used.

In this case, it is preferable to form the oxide insulating layer 356 while removing the water content in the treatment chamber. This is to prevent hydrogen, hydroxyl groups, or water from being contained in the oxide semiconductor layer 352 and the oxide insulating layer 356.

In order to remove the water in the treatment chamber, it is preferable to use an adsorption type vacuum pump. For example, it is preferable to use a cryopump, an ion pump, or a titanium sublimation pump. Further, as the exhaust means, a turbo molecular pump to which a cold trap is added may be used. The film forming chamber exhausted by using the cryopump is, for example, hydrogen atoms or water (H).₂Since compounds containing hydrogen atoms such as O) are exhausted, the concentration of impurities contained in the oxide insulating layer 356 formed in the film forming chamber can be reduced.

As the sputtering gas used for forming the oxide insulating layer 356, it is preferable to use a high-purity gas in which impurities such as hydrogen, water, hydroxyl groups and hydrides are removed to a concentration of about ppm and a concentration of about ppb.

Next, the second heat treatment (preferably 200 ° C. or higher and 400 ° C. or lower, for example 250 ° C. or higher and 350 ° C. or lower) is performed in an inert gas atmosphere or an oxygen gas atmosphere. For example, a second heat treatment is performed at 250 ° C. for 1 hour in a nitrogen atmosphere. When the second heat treatment is performed, a part of the oxide semiconductor layer (channel forming region) is heated in contact with the oxide insulating layer 356.

Through the above steps, the oxide semiconductor layer after film formation is heat-treated for dehydration or dehydrogenation to reduce the resistance, and then a part of the oxide semiconductor layer is selectively oxygenated. Make it excessive. As a result, an I-type oxide semiconductor layer 352 is formed. The thin film transistor 350 is formed by the above steps.

A protective insulating layer may be further formed on the oxide insulating layer 356. For example, an RF sputtering method is used to form a silicon nitride film. In the present embodiment, the protective insulating layer 343 is formed as the protective insulating layer by using the silicon nitride film (see FIG. 15 (D)).

A flattening insulating layer for flattening may be provided on the protective insulating layer 343.

This embodiment can be implemented in combination with other embodiments as appropriate.

As described above, by having the thin film transistor using the oxide semiconductor layer, it is possible to provide a large-sized touch panel having stable electrical characteristics and high reliability.

(Embodiment 9) This embodiment shows another example of a thin film transistor applicable to the display panel disclosed herein. The thin film transistor 380 shown in the present embodiment is a thin film transistor using an oxide semiconductor layer including a channel forming region in the above embodiment (for example, transistors 201, 205, 206, 301 in the first embodiment, and the third embodiment). , 4 can be applied as transistors 503, 540).

In the present embodiment, FIG. 16 shows an example in which a part of the manufacturing process of the thin film transistor is different from that of the sixth embodiment. Since FIG. 16 is the same as FIG. 13 except that the process is partially different, the same reference numerals are used for the same parts, and detailed description of the same parts will be omitted.

A gate electrode layer 381 is formed on the substrate 370 according to the sixth embodiment, and the first gate insulating layer 372a and the second gate insulating layer 372b are laminated. In the present embodiment, the gate insulating layer has a two-layer structure, a nitride insulating layer is used for the first gate insulating layer 372a, and an oxide insulating layer is used for the second gate insulating layer 372b.

As the oxide insulating layer, a silicon oxide layer, a silicon nitride layer, an aluminum oxide layer, an aluminum nitride layer, a hafnium oxide layer, or the like can be used. Further, as the nitride insulating layer, a silicon nitride layer, a silicon oxide layer, an aluminum nitride layer, an aluminum nitride layer, or the like can be used.

In the present embodiment, the structure is such that the silicon nitride layer and the silicon oxide layer are laminated from the gate electrode layer 381 side. A silicon nitride layer (SiN) having a film thickness of 50 nm or more and 200 nm or less (50 nm in this embodiment) as the first gate insulating layer 372a by a sputtering method._y(Y&gt; 0)) is formed, and a silicon oxide layer (SiO) having a film thickness of 5 nm or more and 300 nm or less (100 nm in this embodiment) is formed as a second gate insulating layer 372b on the first gate insulating layer 372a._x(x&gt; 0)) is laminated to form a gate insulating layer with a film thickness of 150 nm.

Next, the oxide semiconductor layer is formed, and the oxide semiconductor layer is processed into an island-shaped oxide semiconductor layer by a photolithography process. In the present embodiment, an In-Ga-Zn-O-based metal oxide target is used as the oxide semiconductor layer to form a film by a sputtering method.

In this case, it is preferable to form an oxide semiconductor layer while removing water in the treatment chamber. This is to prevent the oxide semiconductor layer from containing hydrogen, hydroxyl groups, or water.

In order to remove the water in the treatment chamber, it is preferable to use an adsorption type vacuum pump. For example, it is preferable to use a cryopump, an ion pump, or a titanium sublimation pump. Further, as the exhaust means, a turbo molecular pump to which a cold trap is added may be used. The film forming chamber exhausted by using the cryopump is, for example, hydrogen atoms or water (H).₂Since a compound containing a compound containing a hydrogen atom such as O) is exhausted, the concentration of impurities contained in the oxide semiconductor layer formed in the film forming chamber can be reduced.

As the sputtering gas used for forming the oxide semiconductor layer, it is preferable to use a high-purity gas in which impurities such as hydrogen, water, hydroxyl groups and hydrides are removed to a concentration of about ppm and a concentration of about ppb.

Next, the oxide semiconductor layer is dehydrated or dehydrogenated. The temperature of the first heat treatment for dehydration or dehydrogenation is 400 ° C or higher and 750 ° C or lower, preferably 425 ° C or higher. If the temperature is 425 ° C or higher, the heat treatment time may be 1 hour or less, but if the temperature is lower than 425 ° C, the heat treatment time is longer than 1 hour. Here, after introducing the substrate into an electric furnace, which is one of the heat treatment devices, and heat-treating the oxide semiconductor layer in a nitrogen atmosphere, water is applied to the oxide semiconductor layer without touching the atmosphere. Prevents remixing of hydrogen and hydrogen, and obtains an oxide semiconductor layer. After that, high-purity oxygen gas and high-purity N were placed in the same furnace.₂Cool by introducing O gas or ultra-dry air (dew point is -40 ° C or less, preferably -60 ° C or less). Oxygen gas or N₂It is preferable that the O gas does not contain water, hydrogen, or the like. Alternatively, oxygen gas or N to be introduced into the heat treatment equipment₂The purity of O gas is 6N (99.9999%) or higher, preferably 7N (99.99999%) or higher (ie oxygen gas or N).₂The impurity concentration in the O gas is preferably 1 ppm or less, preferably 0.1 ppm or less).

The heat treatment apparatus is not limited to the electric furnace, and for example, an RTA (Rapid Thermal Anneal) apparatus such as a GRTA (Gas Rapid Thermal Anneal) apparatus and an LRTA (Lamp Rapid Thermal Anneal) apparatus can be used. The LRTA device is a device that heats an object to be treated by radiating light (electromagnetic waves) emitted from lamps such as halogen lamps, metal halide lamps, xenon arc lamps, carbon arc lamps, high-pressure sodium lamps, and high-pressure mercury lamps. Further, not only the LRTA device and the lamp, but also a device for heating the object to be processed by heat conduction or heat radiation from a heating element such as a resistance heating element may be provided. GRTA is a method of heat treatment using high temperature gas. As the gas, a rare gas such as argon or an inert gas such as nitrogen that does not react with the object to be treated by heat treatment is used. The RTA method may be used to heat treatment at 600 ° C to 750 ° C for several minutes.

In addition, oxygen gas or N at a temperature of 200 ° C or higher and 400 ° C or lower, preferably 200 ° C or higher and 300 ° C or lower after the first heat treatment for dehydration or dehydrogenation.₂Heat treatment may be performed in an O gas atmosphere.

Further, the first heat treatment of the oxide semiconductor layer can also be performed on the oxide semiconductor layer before being processed into the island-shaped oxide semiconductor layer. In that case, after the first heat treatment, the substrate is taken out from the heating device and a photolithography step is performed.

By going through the above steps, the entire oxide semiconductor layer is brought into a state of excess oxygen, so that the resistance is increased, that is, the type I is formed. Therefore, an oxide semiconductor layer 382 that is entirely I-shaped is obtained.

Next, a conductive film is formed on the oxide semiconductor layer 382, a resist mask is formed on the conductive film by a photolithography step, the conductive film is selectively etched, and the source electrode layer 385a and the drain electrode layer 385b are formed. Form. Then, the oxide insulating layer 386 is formed on the second gate insulating layer 372b, the oxide semiconductor layer 382, the source electrode layer 385a, and the drain electrode layer 385b by a sputtering method.

In this case, it is preferable to form the oxide insulating layer 386 while removing the water content in the treatment chamber. This is to prevent hydrogen, hydroxyl groups, or water from being contained in the oxide semiconductor layer 382 and the oxide insulating layer 386.

In order to remove the water in the treatment chamber, it is preferable to use an adsorption type vacuum pump. For example, it is preferable to use a cryopump, an ion pump, or a titanium sublimation pump. Further, as the exhaust means, a turbo molecular pump to which a cold trap is added may be used. The film forming chamber exhausted by using the cryopump is, for example, hydrogen atoms or water (H).₂Since compounds containing hydrogen atoms such as O) are exhausted, the concentration of impurities contained in the oxide insulating layer 386 formed in the film forming chamber can be reduced.

As the sputtering gas used for forming the oxide insulating layer 386, it is preferable to use a high-purity gas in which impurities such as hydrogen, water, hydroxyl groups and hydrides are removed to a concentration of about ppm and a concentration of about ppb.

The thin film transistor 380 can be formed by the above steps.

Next, in order to reduce variations in the electrical characteristics of the thin film transistor, heat treatment (preferably 150 ° C. or higher and lower than 350 ° C.) may be performed in an inert gas atmosphere, for example, a nitrogen gas atmosphere. For example, heat treatment is performed at 250 ° C. for 1 hour in a nitrogen atmosphere.

A protective insulating layer 373 is formed on the oxide insulating layer 386. In the present embodiment, a silicon nitride film having a film thickness of 100 nm is formed as the protective insulating layer 373 by using a sputtering method.

The protective insulating layer 373 composed of the nitride insulating layer and the first gate insulating layer 372a do not contain water, impurities such as hydrogen, hydrides, and hydroxides, and have the effect of blocking the invasion of these from the outside. There is.

Therefore, in the manufacturing process after the protective insulating layer 373 is formed, it is possible to prevent the invasion of impurities such as moisture from the outside. Further, even after the device is completed as a semiconductor device including a display panel, for example, a liquid crystal display device, it is possible to prevent impurities such as moisture from entering from the outside for a long period of time, and it is possible to improve the long-term reliability of the device.

Further, a part of the second gate insulating layer 372b provided between the protective insulating layer 373 composed of the nitride insulating layer and the first gate insulating layer 372a is removed, and the protective insulating layer 373 and the first gate insulating layer are insulated. The structure may be in contact with the layer 372a.

Therefore, the water content in the oxide semiconductor layer and impurities such as hydrogen, hydrides, and hydroxides are reduced to the utmost, and the re-mixing of the impurities is prevented, and the impurity concentration in the oxide semiconductor layer is lowered. Can be maintained.

A flattening insulating layer for flattening may be provided on the protective insulating layer 373.

This embodiment can be implemented in combination with other embodiments as appropriate.

As described above, by having the thin film transistor using the oxide semiconductor layer, it is possible to provide a large-scale display device having stable electrical characteristics and high reliability.

(Embodiment 10) This embodiment shows another example of a thin film transistor applicable to the display panel disclosed herein. The thin film transistor shown in the present embodiment can be applied to the thin film transistor of the first to ninth embodiments.

In this embodiment, an example in which a conductive material having translucency is used for the gate electrode layer, the source electrode layer, and the drain electrode layer is shown. Therefore, other parts can be carried out in the same manner as in the above-described embodiment, and the description of the same part as that of the above-described embodiment or the part having the same function and the repetition of the process will be omitted. Further, detailed description of the same part will be omitted.

For example, as a material for a gate electrode layer, a source electrode layer, and a drain electrode layer, a conductive material having translucency with respect to visible light, for example, In-Sn-O system, In-Sn-Zn-O system, In-Al. -Zn-O series, Sn-Ga-Zn-O series, Al-Ga-Zn-O series, Sn-Al-Zn-O series, In-Zn-O series, Sn-Zn-O series, Al-Zn -O-based, In-O-based, Sn-O-based, and Zn-O-based metal oxides can be applied, and the film thickness is appropriately selected within the range of 50 nm or more and 300 nm or less. As a method for forming a metal oxide used for the gate electrode layer, the source electrode layer, and the drain electrode layer, a sputtering method, a vacuum vapor deposition method (electron beam vapor deposition, etc.), an arc discharge ion plating method, or a spray method is used. When the sputtering method is used, SiO of 2% by weight or more and 10% by weight or less is used.₂The film may be formed using a target containing.

The unit of the composition ratio of the conductive film having translucency with respect to visible light is atomic%, and the evaluation shall be made by analysis using an electron probe microanalyzer (EPMA).

Further, in the pixel in which the thin film transistor is arranged, the pixel electrode layer, another electrode layer (capacitive electrode layer, etc.), or the other wiring layer (capacitive wiring layer, etc.) is a conductive film having translucency to visible light. Can be used to realize a display device having a high aperture ratio. Of course, it is preferable to use a film having transparency to visible light for the gate insulating layer, the oxide insulating layer, the protective insulating layer, and the flattening insulating layer existing in the pixel.

In the present specification, a film having translucency with respect to visible light refers to a film having a film thickness having a visible light transmittance of 75 to 100%, and when the film has conductivity, it is transparent and conductive. Also called a membrane. Further, as a metal oxide applied to a gate electrode layer, a source electrode layer, a drain electrode layer, a pixel electrode layer, or another electrode layer, or another wiring layer, a translucent conductive film with respect to visible light is used. May be good. Translucent with respect to visible light means that the transmittance of visible light is 50 to 75%.

When the thin film transistor is provided with translucency, light is transmitted even if it is provided so as to overlap with the display area or the photo sensor, and the display and the detection of light are not hindered, so that the aperture ratio can be improved. Further, since a wide viewing angle is realized by using a translucent film as a constituent member of the thin film transistor, a high aperture ratio can be realized even if one pixel is divided into a plurality of sub-pixels. That is, even if a high-density thin-film transistor group is arranged, the aperture ratio can be large, and a sufficient area of the display area can be secured. For example, when one pixel has 2 to 4 sub-pixels, the aperture ratio can be improved because the thin film transistor has translucency. Further, when the holding capacity is formed by using the same material in the same process as the constituent members of the thin film transistor, the holding capacity can also be made translucent, so that the aperture ratio can be further improved.

This embodiment can be implemented in combination with other embodiments as appropriate.

(Embodiment 11) This embodiment shows an example of a thin film transistor applicable to the display panel disclosed herein. The thin film transistor 650 shown in the present embodiment is a thin film transistor using an oxide semiconductor layer including a channel forming region in the above embodiment (for example, transistors 201, 205, 206, 301 in the first embodiment, and the third embodiment). , 4 can be applied as transistors 503, 540).

In the present embodiment, FIG. 17 shows an example in which the oxide semiconductor layer is surrounded by the nitride insulating layer when viewed from the cross section. Since FIG. 17 is the same except that the shape of the upper surface of the oxide insulating layer and the position of the end portion are different from those of FIG. 12 and the configuration of the gate insulating layer is different, the same reference numerals are used for the same locations and the same locations. A detailed description will be omitted.

The thin film transistor 650 shown in FIG. 17 is a bottom gate type thin film transistor, and is a gate electrode layer 391, a gate insulating layer 652a using a nitride insulating layer, and gate insulating using an oxide insulating layer on a substrate 394 having an insulating surface. It includes a layer 652b, an oxide semiconductor layer 392, a source electrode layer 395a, and a drain electrode layer 395b. Further, an oxide insulating layer 656 that covers the thin film transistor 650 and is laminated on the oxide semiconductor layer 392 is provided. A protective insulating layer 653 using a nitride insulating layer is further formed on the oxide insulating layer 656. The protective insulating layer 653 is configured to be in contact with the gate insulating layer 652a, which is a nitride insulating layer.

In the present embodiment, in the thin film transistor 650, the gate insulating layer has a laminated structure of a nitride insulating layer and an oxide insulating layer from the gate electrode layer side. Further, before forming the protective insulating layer 653 which is a nitride insulating layer, the oxide insulating layer 656 and the gate insulating layer 652b are selectively removed so that the gate insulating layer 652a which is a nitride insulating layer is exposed. Process.

At least the upper surface of the oxide insulating layer 656 and the gate insulating layer 652b is wider than the upper surface of the oxide semiconductor layer 392, and it is preferable that the upper surface shape covers the thin film transistor 650.

Further, a protective insulating layer that covers the upper surface of the oxide insulating layer 656 and the side surfaces of the oxide insulating layer 656 and the gate insulating layer 652b and is in contact with the gate insulating layer 652a that is a nitride insulating layer. Form 653.

The protective insulating layer 653 and the gate insulating layer 652a made of a nitride insulating layer are composed of moisture such as a silicon nitride film, a silicon nitride film, an aluminum nitride film, and an aluminum nitride film obtained by a sputtering method or a plasma CVD method, and hydrogen ions. OH^-Use an inorganic insulating film that does not contain impurities such as, and blocks these from entering from the outside.

In the present embodiment, as the protective insulating layer 653 composed of the nitride insulating layer, a silicon nitride layer having a film thickness of 100 nm is provided by using the RF sputtering method so as to surround the lower surface, the upper surface, and the side surface of the oxide semiconductor layer 392.

By adopting the structure shown in FIG. 17, in the oxide semiconductor layer, impurities such as hydrogen, water, hydroxyl group or hydride are reduced by the gate insulating layer 652b and the oxide insulating layer 656 provided so as to be in contact with each other. Moreover, since the gate insulating layer 652a and the protective insulating layer 653, which are nitride insulating layers, are further surrounded so as to cover the outside, it is possible to prevent the intrusion of moisture from the outside in the manufacturing process after the formation of the protective insulating layer 653. Can be done. Further, even after the device is completed as a display panel, for example, a display device, it is possible to prevent the intrusion of moisture from the outside for a long period of time, and it is possible to improve the long-term reliability of the device.

Further, in the present embodiment, a configuration in which one thin film transistor is surrounded by a nitride insulating layer is shown, but the configuration is not particularly limited, and a plurality of thin film transistors may be surrounded by a nitride insulating layer, or a plurality of thin film transistors in the pixel portion may be surrounded. It may be configured to be collectively surrounded by a nitride insulating layer. At least, a region in which the protective insulating layer 653 and the gate insulating layer 652a are in contact with each other may be provided so as to surround the peripheral edge of the pixel portion of the active matrix substrate.

This embodiment can be implemented in combination with other embodiments as appropriate.

<p>In this embodiment, the arrangement of the panel and the light source in the display panel of the present invention will be described. FIG. 8 is an example of a perspective view showing the structure of the display panel of the present invention. The display panel shown in FIG. 8 includes a panel 1601 in which pixels including a liquid crystal element, a photodiode, a thin film, etc. are formed between a pair of substrates, a first diffuser plate 1602, a prism sheet 1603, and a second diffuser plate. It has a 1604, a light guide plate 1605, a reflector plate 1606, a backlight 1608 having a plurality of light sources 1607, and a circuit board 1609.</p><p>The panel 1601, the first diffuser plate 1602, the prism sheet 1603, the second diffuser plate 1604, the light guide plate 1605, and the reflector plate 1606 are laminated in this order. The light source 1607 is provided at the end of the light guide plate 1605, and the light from the light source 1607 diffused inside the light guide plate 1605 is opposed by the first diffuser plate 1602, the prism sheet 1603, and the second diffuser plate 1604. The panel 1601 is uniformly irradiated from the substrate side.</p><p>In this embodiment, the first diffuser plate 1602 and the second diffuser plate 1604 are used, but the number of diffuser plates is not limited to this, and may be singular or 3 or more. .. The diffuser plate may be provided between the light guide plate 1605 and the panel 1601. Therefore, the diffuser plate may be provided only between the prism sheet 1603 and the panel 1601, or the diffuser plate may be provided only between the prism sheet 1603 and the light guide plate 1605.</p><p>Further, the prism sheet 1603 is not limited to the serrated shape in the cross section shown in FIG. 8, and may have a shape that can collect the light from the light guide plate 1605 toward the panel 1601.</p><p>The circuit board 1609 is provided with a circuit for generating or processing various signals input to the panel 1601, a circuit for processing various signals output from the panel 1601, and the like. Then, in FIG. 8, the circuit board 1609 and the panel 1601 are connected via an FPC (Flexible Printed Circuit) 1611. The circuit may be connected to the panel 1601 using the COG (Chip On Glass) method, or a part of the circuit may be connected to the FPC 1611 using the COF (Chip On Film) method. good.</p><p>FIG. 8 shows an example in which a control system circuit for controlling the drive of the light source 1607 is provided on the circuit board 1609, and the control system circuit and the light source 1607 are connected via the FPC 1610. However, the circuit of the control system may be formed on the panel 1601. In this case, the panel 1601 and the light source 1607 are connected by an FPC or the like.</p><p>Note that FIG. 8 illustrates an edge light type light source in which the light source 1607 is arranged at the end of the panel 1601, but the display panel of the present invention is a direct type in which the light source 1607 is arranged directly under the panel 1601. Is also good.</p><p>For example, when the finger 1612, which is the object to be detected, is brought close to the panel 1601 from the TFT substrate side, the light from the backlight 1608 passes through the panel 1601, a part of the light is reflected by the finger 1612, and is incident on the panel 1601 again. .. The image data of the finger 1612, which is the object to be detected, can be obtained by using the photo sensor 106 of the pixel 104.</p><p>This embodiment can be carried out in combination with other embodiments or examples as appropriate.</p>

<p>The display panel according to one aspect of the present invention has a feature that data can be input by detecting the movement of the object to be detected in a non-contact manner. Therefore, an electronic device using the display panel according to one aspect of the present invention can be equipped with a higher-performance application by adding the display panel to its constituent elements. The display panel of the present invention has a display capable of reproducing a recording medium such as a display device, a notebook personal computer, and an image reproduction device (typically, DVD: Digital Versatile Disc) including a recording medium and displaying the image. Can be used for equipment). In addition, as electronic devices that can use the display panel according to one aspect of the present invention, mobile phones, portable game machines, personal digital assistants, electronic books, video cameras, digital still cameras, goggles type displays (head mount displays). ), Navigation system, sound reproduction device (car audio, digital audio player, etc.), copier, facsimile, printer, printer multifunction device, automatic cash deposit / payment machine (ATM), vending machine, etc. Specific examples of these electronic devices are shown in FIG.</p><p>FIG. 9A shows a display device, which includes a housing 5001, a display unit 5002, a support base 5003, and the like. The display panel according to one aspect of the present invention can be used for the display unit 5002. By using the display panel according to one aspect of the present invention for the display unit 5002, it is possible to acquire high-resolution imaging data, and it is possible to provide a display device equipped with a higher-performance application. The display device includes all information display devices for personal computers, TV broadcast reception, advertisement display, and the like.</p><p>FIG. 9B shows a mobile information terminal, which has a housing 5101, a display unit 5102, a switch 5103, an operation key 5104, an infrared port 5105, and the like. The display panel according to one aspect of the present invention can be used for the display unit 5102. By using the display panel according to one aspect of the present invention for the display unit 5102, it is possible to acquire high-resolution imaging data, and it is possible to provide a mobile information terminal equipped with a higher-performance application. ..</p><p>FIG. 9C shows an automatic teller machine, which has a housing 5201, a display unit 5202, a coin slot 5203, a bill slot 5204, a card slot 5205, a passbook slot 5206, and the like. The display panel according to this embodiment can be used for the display unit 5202. By using the display panel according to one aspect of the present invention for the display unit 5202, it is possible to acquire high-resolution imaging data, and to provide an automated teller machine equipped with a higher-performance application. Can be done. Then, the automated teller machine using the display panel according to one aspect of the present invention can read biometric information used for biometric authentication, such as fingerprints, faces, handprints, palm prints, hand vein shapes, and irises. It can be done with higher accuracy. Therefore, in biometric authentication, the false rejection rate, which is misidentified as the person despite being the person, and the false acceptance rate, which is misidentified as the person despite being another person, should be kept low. Can be done.</p><p>FIG. 9D shows a portable game machine, which has a housing 5301, a housing 5302, a display unit 5303, a display unit 5304, a microphone 5305, a speaker 5306, an operation key 5307, a stylus 5308, and the like. The display panel according to one aspect of the present invention can be used for the display unit 5303 or the display unit 5304. By using the display panel according to one aspect of the present invention for the display unit 5303 or the display unit 5304, it is possible to acquire high-resolution imaging data, and a portable game machine equipped with a higher-performance application can be obtained. Can be provided. The portable game machine shown in FIG. 9D has two display units 5303 and a display unit 5304, but the number of display units of the portable game machine is not limited to this.</p><p>This embodiment can be carried out in combination with other embodiments or examples as appropriate.</p>

100 display panel 101 pixel circuit 102 Display element control circuit 103 Photo sensor control circuit 104 pixels 105 Display element 106 photo sensor 107 Display element drive circuit 108 Display element drive circuit 109 circuit 110 Photo sensor drive circuit 201 transistor 202 Retention capacity 203 liquid crystal element 204 photodiode 205 transistor 206 transistor 207 Gate signal line 208 photodiode reset signal line 209 Gate signal line 210 Video data signal line 211 Photo sensor output signal line 212 Photo sensor reference signal line 213 Gate signal line 300 circuits 301 transistor 302 Retention capacity 303 precharge signal line 305 board 306 Protective insulation layer 307 Gate insulating layer 310 thin film transistor 311 Gate electrode layer 313 Channel formation area 314a High resistance source area 314b high resistance drain area 315a Source electrode layer 315b drain electrode layer 316 Oxide insulation layer 320 board 322 Gate insulating layer 323 Protective insulation layer 330 Oxide semiconductor layer 331 Oxide semiconductor layer 332 Oxide semiconductor layer 340 board 342 Gate insulating layer 343 Protective insulation layer 345 Oxide semiconductor layer 346 Oxide semiconductor layer 350 thin film transistor 351 Gate electrode layer 352 Oxide semiconductor layer 355a Source electrode layer 355b Drain electrode layer 356 Oxide insulation layer 360 thin film transistor 361 Gate electrode layer 362 Oxide semiconductor layer 363 channel formation region 364a high resistance source area 364b High resistance drain area 365a source electrode layer 365b drain electrode layer 366 Oxide insulation layer 370 board 372a Gate insulating layer 372b Gate insulating layer 373 Protective insulation layer 380 thin film transistor 381 Gate electrode layer 382 Oxide semiconductor layer 385a Source electrode layer 385b Drain electrode layer 386 Oxide insulation layer 390 thin film transistor 391 Gate electrode layer 392 Oxide semiconductor layer 393 Oxide semiconductor layer 394 board 395a Source electrode layer 395b Drain electrode layer 396 Oxide insulation layer 397 Gate insulating layer 398 Protective insulation layer 399 Oxide semiconductor layer 401 signal 402 signal 403 signal 404 signal 405 signal 501 board 502 photodiode 503 transistor 505 liquid crystal element 506a semiconductor layer 506b semiconductor layer 506c semiconductor layer 507 pixel electrode 508 LCD 509 counter electrode 510 conductive film 511 Alignment film 512 Alignment film 513 board 514 color filter 515 Shielding film 516 spacer 517 Polarizing plate 518 Polarizing plate 520 arrow 521 Detected object 522 arrow 531 Oxide insulation layer 532 Protective insulation layer 533 interlayer insulation layer 534 Interlayer insulation layer 540 transistor 541 Electrode layer 542 Electrode layer 543 Conductive layer 545 Gate electrode layer 590 Display panel system 591 Control circuit 592 Image processing circuit 593 Storage device 650 thin film transistor 652a Gate insulating layer 652b Gate insulating layer 653 Protective insulation layer 656 Oxide insulation layer 1601 panel 1602 diffuser 1603 prism sheet 1604 diffuser 1605 Light guide plate 1606 reflector 1607 light source 1608 backlight 1609 circuit board 1610 FPC 1611 FPC 1612 fingers 2001 area 2002 area 2003 area 2004 region 2005 pixels 2006 pixels 5001 chassis 5002 Display 5003 support 5101 chassis 5102 Display 5103 switch 5104 Operation keys 5105 infrared port 5201 chassis 5202 Display 5203 Coin slot 5204 Banknote slot 5205 Card slot 5206 Passbook slot 5301 chassis 5302 housing 5303 Display 5304 Display 5305 microphone 5306 speaker 5307 Operation keys 5308 stylus