Display device, driving method thereof, and electronic apparatus
12 claims: 10 independent, 2 dependent
- 1行状に配された複数の走査線、列状に配された複数の映像信号線、及び、行列状に配された表示素子を備えており、 表示素子は、発光部と、サンプリング用トランジスタと、駆動用トランジスタと、保持容量とを含み、 サンプリング用トランジスタと駆動用トランジスタとは、それぞれ、ゲートと、ソース及びドレインの一方と、ソース及びドレインの他方とを備えており、 サンプリング用トランジスタにあっては、ゲートは走査線に接続されており、ソース及びドレインの一方は映像信号線に接続されており、 駆動用トランジスタにあっては、ゲートはサンプリング用トランジスタのソース及びドレインの他方と保持容量の一端とに接続されており、ソース及びドレインの一方は発光部の一端と保持容量の他端とに接続されている表示装置の駆動方法であって、 映像信号線には、基準電位と信号電位とが供給され、 駆動用トランジスタのソース及びドレインの他方に供給される電源電圧を、第1電位から、基準電位から第2電位を減じた差が駆動用トランジスタの閾電圧を超える第2電位に切り換え、次いで、走査線からの制御信号に基づいてサンプリング用トランジスタを導通状態として映像信号線から基準電位を駆動用トランジスタのゲートに印加し、以て、駆動用トランジスタのゲート電位とソース及びドレインの一方の電位とを初期化する工程を備えて おり、 駆動用トランジスタのゲート電位とソース及びドレインの一方の電位とを初期化した後、 映像信号線から基準電位を駆動用トランジスタのゲートに印加した状態で、電源電圧を第2電位から第1電位に切り換えることによって、駆動用トランジスタのソース及びドレインの一方の電位を基準電位から駆動用トランジスタの閾電圧を減じた電位に向かって近づけ、 次いで、映像信号線から信号電位を駆動用トランジスタのゲートに印加し、 その後、走査線からの制御信号に基づいてサンプリング用トランジスタを非導通状態とし、以て、駆動用トランジスタのゲート-ソース間電圧の値に応じたドレイン電流を発光部に流す 表示装置の駆動方法。
- 2電源電圧の第1電位から第2電位への切り換えによって、発光部が発光状態から非発光状態となる請求項1に記載の表示装置の駆動方法。
- 3発光部が発光状態にある期間の1フィールドに占める割合は、電源電圧の第1電位から第2電位への切り換えのタイミングによって調節される請求項2に記載の表示装置の駆動方法。
- 4映像信号線から信号電位を駆動用トランジスタのゲートに印加しているときに駆動用トランジスタのソース及びドレインの一方の電位が変化することによって、駆動用トランジスタのゲート-ソース間電圧の値が補正される 請求項1 に記載の表示装置の駆動方法。
- 5電源電圧の第1電位から第2電位への切り換えによって発光部が発光状態から非発光状態となった後、走査線からの制御信号に基づいてサンプリング用トランジスタを非導通状態とする迄、発光部は非発光状態にある 請求項1 に記載の表示装置の駆動方法。
- 6行状に配された複数の走査線、列状に配された複数の映像信号線、及び、行列状に配された表示素子を備えており、 表示素子は、発光部と、サンプリング用トランジスタと、駆動用トランジスタと、保持容量とを含み、 サンプリング用トランジスタと駆動用トランジスタとは、それぞれ、ゲートと、ソース及びドレインの一方と、ソース及びドレインの他方とを備えており、 サンプリング用トランジスタにあっては、ゲートは走査線に接続されており、ソース及びドレインの一方は映像信号線に接続されており、 駆動用トランジスタにあっては、ゲートはサンプリング用トランジスタのソース及びドレインの他方と保持容量の一端とに接続されており、ソース及びドレインの一方は発光部の一端と保持容量の他端とに接続されている表示装置であって、 映像信号線には、基準電位と信号電位とが供給され、 駆動用トランジスタのソース及びドレインの他方に供給される電源電圧が、第1電位から、基準電位から第2電位を減じた差が駆動用トランジスタの閾電圧を超える第2電位に切り換えられ、次いで、走査線からの制御信号に基づいてサンプリング用トランジスタが導通状態とされて映像信号線から基準電位が駆動用トランジスタのゲートに印加され、以て、駆動用トランジスタのゲート電位とソース及びドレインの一方の電位とが初期化され た後、 映像信号線から基準電位が駆動用トランジスタのゲートに印加された状態で、電源電圧が第2電位から第1電位に切り換えられることによって、駆動用トランジスタのソース及びドレインの一方の電位が基準電位から駆動用トランジスタの閾電圧を減じた電位に向かって近づけられ、 次いで、映像信号線から信号電位が駆動用トランジスタのゲートに印加され、 その後、走査線からの制御信号に基づいてサンプリング用トランジスタが非導通状態とされ、以て、駆動用トランジスタのゲート-ソース間電圧の値に応じたドレイン電流が発光部に流れる 表示装置。
- 7発光部と、サンプリング用トランジスタと、駆動用トランジスタと、保持容量とを含み、 サンプリング用トランジスタと駆動用トランジスタとは、それぞれ、ゲートと、ソース及びドレインの一方と、ソース及びドレインの他方とを備えており、 駆動用トランジスタにあっては、ゲートはサンプリング用トランジスタのソース及びドレインの他方と保持容量の一端とに接続されており、ソース及びドレインの一方は発光部の一端と保持容量の他端とに接続されている表示素子の駆動方法であって、 サンプリング用トランジスタのソース及びドレインの一方には、基準電位と信号電位とが供給され、ゲートには制御信号が供給され、 駆動用トランジスタのソース及びドレインの他方に供給される電源電圧を、第1電位から、基準電位から第2電位を減じた差が駆動用トランジスタの閾電圧を超える第2電位に切り換え、次いで、制御信号に基づいてサンプリング用トランジスタを導通状態として基準電位を駆動用トランジスタのゲートに印加し、以て、駆動用トランジスタのゲート電位とソース及びドレインの一方の電位とを初期化する工程を備えて おり、 駆動用トランジスタのゲート電位とソース及びドレインの一方の電位とを初期化した後、 基準電位を駆動用トランジスタのゲートに印加した状態で、電源電圧を第2電位から第1電位に切り換えることによって、駆動用トランジスタのソース及びドレインの一方の電位を基準電位から駆動用トランジスタの閾電圧を減じた電位に向かって近づけ、 次いで、信号電位を駆動用トランジスタのゲートに印加し、 その後、制御信号に基づいてサンプリング用トランジスタを非導通状態とし、以て、駆動用トランジスタのゲート-ソース間電圧の値に応じたドレイン電流を発光部に流す 表示素子の駆動方法。
- 8電源電圧の第1電位から第2電位への切り換えによって、発光部が発光状態から非発光状態となる 請求項7 に記載の表示素子の駆動方法。
- 9発光部が発光状態にある期間の1フィールドに占める割合は、電源電圧の第1電位から第2電位への切り換えのタイミングによって調節される 請求項8 に記載の表示素子の駆動方法。
- 10信号電位を駆動用トランジスタのゲートに印加しているときに駆動用トランジスタのソース及びドレインの一方の電位が変化することによって、駆動用トランジスタのゲート-ソース間電圧の値が補正される 請求項7 に記載の表示素子の駆動方法。
- 11電源電圧の第1電位から第2電位への切り換えによって発光部が発光状態から非発光状態となった後、制御信号に基づいてサンプリング用トランジスタを非導通状態とする迄、発光部は非発光状態にある 請求項7 に記載の表示素子の駆動方法。
- 12発光部と、サンプリング用トランジスタと、駆動用トランジスタと、保持容量とを含み、 サンプリング用トランジスタと駆動用トランジスタとは、それぞれ、ゲートと、ソース及びドレインの一方と、ソース及びドレインの他方とを備えており、 駆動用トランジスタにあっては、ゲートはサンプリング用トランジスタのソース及びドレインの他方と保持容量の一端とに接続されており、ソース及びドレインの一方は発光部の一端と保持容量の他端とに接続されている表示素子であって、 サンプリング用トランジスタのソース及びドレインの一方には、基準電位と信号電位とが供給され、ゲートには制御信号が供給され、 駆動用トランジスタのソース及びドレインの他方に供給される電源電圧が、第1電位から、基準電位から第2電位を減じた差が駆動用トランジスタの閾電圧を超える第2電位に切り換えられ、次いで、制御信号に基づいてサンプリング用トランジスタが導通状態とされて基準電位が駆動用トランジスタのゲートに印加され、以て、駆動用トランジスタのゲート電位とソース及びドレインの一方の電位とが初期化され た後、 映像信号線から基準電位が駆動用トランジスタのゲートに印加された状態で、電源電圧が第2電位から第1電位に切り換えられることによって、駆動用トランジスタのソース及びドレインの一方の電位が基準電位から駆動用トランジスタの閾電圧を減じた電位に向かって近づけられ、 次いで、映像信号線から信号電位が駆動用トランジスタのゲートに印加され、 その後、走査線からの制御信号に基づいてサンプリング用トランジスタが非導通状態とされ、以て、駆動用トランジスタのゲート-ソース間電圧の値に応じたドレイン電流が発光部に流れる 表示素子。
Independent claims12
44 paragraphs, as filed
The present invention<u style="single">Display elements, their driving methods, and</u>The present invention relates to an active matrix type display device using a display element as a pixel and a driving method thereof.
<u style="single">Light emitting part</u>Development of a flat self-luminous display device using an organic EL device<u style="single">、</u>It has become popular in recent years. Organic EL devices<u style="single">、</u>It is a device that utilizes the phenomenon of emitting light when an electric field is applied to an organic thin film. Organic EL devices<u style="single">、</u>Low power consumption because it is driven at an applied voltage of 10V or less. Also<u style="single">、</u>Organic EL devices<u style="single">、</u>It is a self-luminous element that emits light by itself.<u style="single">Mesho</u>No need for bright materials<u style="single">、</u>It is easy to reduce the weight and thickness. further<u style="single">、</u>The response speed of organic EL devices<u style="single">、</u>Since it is very fast, about several μs, no afterimage occurs when displaying a moving image.
Organic EL device<u style="single">A display element provided as a light emitting part</u>Among the flat self-luminous display devices used for pixels, the development of active matrix type display devices in which thin film transistors are integrated and formed on each pixel as a driving element is particularly active. The active matrix type plane self-luminous display device is, for example,<u style="single">、</u>The following patent document 1<u style="single">Or patent documents</u>It is described in 5.<patcit num="1"><text>Japanese Patent Application Laid-Open No. 2003-255856</text></patcit><patcit num="2"><text>Japanese Patent Application Laid-Open No. 2003-271095</text></patcit><patcit num="3"><text>JP 2004-133240</text></patcit><patcit num="4"><text>Japanese Patent Application Laid-Open No. 2004-029791</text></patcit><patcit num="5"><text>Japanese Patent Application Laid-Open No. 2004-093682</text></patcit>
<p> However, the conventional active matrix type plane self-luminous display device is due to process fluctuation.<u style="single">, Light emitting part</u>The threshold voltage and mobility of the transistor that drives the device will vary. Also, organic EL devices<u style="single">Light emitting part such as</u>The characteristics of are fluctuating over time. Such variations in the characteristics of the drive transistor and variations in the characteristics of the organic EL device affect the emission brightness. In order to uniformly control the emission brightness over the entire screen of the display device, it is necessary to correct the above-mentioned characteristic fluctuations of the transistor and the organic EL device in each pixel circuit. Traditionally<u style="single">、</u>A display device having such a correction function for each pixel has been proposed. However, a conventional pixel circuit having a correction function requires wiring for supplying a correction potential, a transistor for switching, and a pulse for switching, and the configuration of the pixel circuit is complicated. Since there are many components of the pixel circuit, it has hindered the high definition of the display.</p>
<p> In view of the above-mentioned problems of the prior art, it is a basic object of the present invention to provide a display device and a driving method thereof that enable high definition of a display by simplifying a pixel circuit. In particular, the purpose is to stabilize the threshold voltage correction function without being affected by the wiring capacitance and wiring resistance of the pixel circuit. The following measures were taken to achieve this goal. That is,<u style="single">、</u>The display device according to the present invention is composed of a pixel array unit and a drive unit that drives the pixel array unit.<u style="single">Consistency</u>, The pixel array unit has a row-shaped scanning line and a column-shaped scan line.<u style="single">Video signal line</u>And the matrix-like pixels arranged at the intersection of the two<u style="single">(Display element)</u>And arranged corresponding to each row of pixels<u style="single">Power supply line</u>And have. The drive unit includes a main scanner that sequentially supplies a control signal to each scanning line to sequentially scan pixels line by line, and each of the driving units in accordance with the line sequential scanning.<u style="single">Power supply line</u>1st potential and 2nd potential<u style="single">To</u>A power supply scanner that supplies a power supply voltage that switches, and a row of power scanners that match the line sequential scanning.<u style="single">Video signal line</u>It is equipped with a signal potential that becomes a video signal and a signal selector that supplies a reference potential. The pixel is<u style="single">Light emitting part</u>The sampling transistor includes a sampling transistor, a driving transistor, and a holding capacitance, and the gate of the sampling transistor is connected to the scanning line.<u style="single">Has been</u>, One of its source and drain<u style="single">Video signal line</u>Connect to<u style="single">Has been</u>, The other is connected to the gate of the driving transistor<u style="single">Has been</u>, One of the source and drain of the drive transistor is said.<u style="single">Light emitting part</u>Connect to<u style="single">Has been</u>, The other is<u style="single">Power supply line</u>Connect to<u style="single">Has been</u>, The holding capacitance is connected between the source and the gate of the driving transistor.<u style="single">Be done</u>ing. The sampling transistor conducts in response to a control signal supplied from the scanning line, and the sampling transistor is connected.<u style="single">Video signal line</u>The signal potential supplied from is sampled and held in the holding capacitance, and the driving transistor is in the first potential.<u style="single">Power supply line</u>The drive current is supplied according to the held signal potential.<u style="single">Light emitting part</u>Flow to. The power supply scanner has the first timing before the sampling transistor samples the signal potential.<u style="single">Power supply line</u>Is switched from the first potential to the second potential, and the main scanner conducts the sampling transistor at the second timing after the first timing.<u style="single">Video signal line</u>The reference potential is applied to the gate of the driving transistor and the source of the driving transistor is set to the second potential, and the power supply scanner performs the third timing after the second timing.<u style="single">Power supply line</u>Is switched from the second potential to the first potential, and the voltage corresponding to the threshold voltage of the driving transistor is held in the holding capacitance.</p><p> Preferably, the power scanner is the<u style="single">Power supply line</u>Adjust the first timing to drop from the first potential to the second potential,<u style="single">Light emitting part</u>Allows you to adjust the duration of the light emission. or<u style="single">、</u>The signal selector is used after the sampling transistor is conducted.<u style="single">、</u>The fourth timing<u style="single">Video signal line</u>Is switched from the reference potential to the signal potential, while the main scanner is after the fourth timing.<u style="single">、</u>By canceling the application of the control signal to the scanning line at the fifth timing, putting the sampling transistor in a non-conducting state, and appropriately setting the period between the fourth timing and the fifth timing, the holding capacitance can be obtained. When holding the signal potential, a correction for the mobility of the driving transistor is added to the signal potential. or<u style="single">、</u>The main scanner releases the application of the control signal to the scanning line at the fifth timing when the signal potential is held in the holding capacitance, puts the sampling transistor in a non-conducting state, and sets the gate of the driving transistor to the gate.<u style="single">Video signal line</u>Electrically disconnected from<u style="single">、</u>The gate potential is linked to the fluctuation of the source potential of the driving transistor, and the voltage between the gate and the source is maintained constant.</p>
<p> According to the present invention, an organic EL device<u style="single">etc</u>of<u style="single">Display element with light emitting part</u>In an active matrix type display device using the above as pixels, each pixel has a threshold voltage correction function of a driving transistor. Preferably<u style="single">、</u>Mobility correction function and change over time correction function for organic EL devices (bootstrap operation)<u style="single">etc</u>It is also equipped with high-quality image quality. Conventional<u style="single">、</u>A pixel circuit having such a correction function has a large number of constituent elements and therefore has a large layout area, and is not suitable for high-definition display. However, in the present invention,<u style="single">、</u>The number of constituent elements is reduced by converting the power supply voltage supplied to each pixel into a switching pulse. By converting the power supply voltage into a switching pulse, a switching transistor for correcting the threshold voltage and a scanning line for scanning the gate are not required. As a result, the components and wiring of the pixel circuit can be significantly reduced, the pixel area can be reduced, and high definition of the display can be achieved.</p><p> In order to correct the threshold voltage of the drive transistor, it is necessary to reset the gate potential and source potential of the drive transistor in advance. In the present invention<u style="single">、</u>In particular, by adjusting the timing of resetting the potentials of the source and gate of the drive transistor, the threshold voltage correction operation can be reliably performed. Specifically, when resetting the gate potential of the drive transistor to the reference potential and setting the source potential to the second potential (low level of the power supply potential), in advance.<u style="single">Power supply line</u>By dropping to the second potential, the threshold voltage correction operation can be reliably performed without being affected by the wiring capacitance and the wiring resistance. Like this<u style="single">、</u>Since the display device according to the present invention operates without being affected by the wiring capacitance in the pixel circuit, it can be applied to a high-definition and large-screen display device.</p>
Less than<u style="single">、</u>Refer to the drawing<u style="single">、</u>Embodiments of the present invention will be described in detail. First<u style="single">、</u>In order to facilitate the understanding of the present invention and clarify the background, a general configuration of the display device will be briefly described with reference to FIG. FIG. 1 is a schematic circuit diagram showing one pixel of a general display device. As shown<u style="single">、</u>This pixel circuit<u style="single">In</u>, Orthogonally arranged scan lines 1E<u style="single">Video signal line</u>A sampling transistor 1A is arranged at the intersection on the 1st floor. This sampling transistor 1A is N-type, and its gate is connected to scanning line 1E.<u style="single">Has been</u>, Drain<u style="single">Video signal line</u>Connect to 1F<u style="single">Be done</u>ing. The source of this sampling transistor 1A<u style="single">、</u>One electrode of the holding capacitance 1C and the gate of the driving transistor 1B are connected. The drive transistor 1B is N type, and the power supply line 1G is connected to its drain.<u style="single">Has been</u>, In its source<u style="single">Light emitting part</u>1D anode connected<u style="single">Be done</u>ing. With the other electrode with a holding capacity of 1C<u style="single">Light emitting part</u>1D cathode connected to ground wire 1H<u style="single">Be done</u>ing.
FIG. 2 is a timing chart provided for explaining the operation of the pixel circuit shown in FIG. This timing chart is<u style="single">Video signal line</u>The potential of the video signal supplied from (1F) (video signal line potential) is sampled, and the organic EL device<u style="single">etc</u>From<u style="single">Light emitting part</u>It represents the operation of turning 1D into a light emitting state. When the potential of the scanning line (1E) (scanning line potential) transitions to a high level, the sampling transistor (1A) is turned on and the video signal line potential is charged to the holding capacitance (1C). This will<u style="single">、</u>Gate potential of drive transistor (1B) (<u style="single">V</u><sub><u style="single">g</u></sub>) Starts to rise and drain current begins to flow. For that reason<u style="single">, Light emitting part</u>The anode potential of (1D) rises and starts emitting light. After this<u style="single">、</u>When the scanning line potential transitions to a low level, the video signal line potential is held in the holding capacitance (1C), the gate potential of the driving transistor (1B) becomes constant, and the emission brightness is kept constant until the next frame.
However<u style="single">、</u>Due to variations in the manufacturing process of the drive transistor (1B), the threshold voltage and mobility for each pixel<u style="single">etc</u>There is a characteristic fluctuation of. Due to this characteristic fluctuation, even if the same gate potential is applied to the driving transistor (1B), the drain current (driving current) fluctuates for each pixel, and the emission brightness varies. Also<u style="single">、</u>Organic EL device<u style="single">etc</u>From<u style="single">Light emitting part</u>Due to changes over time in the characteristics of (1D)<u style="single">Light emitting part</u>The anode potential of (1D) fluctuates. Fluctuations in anode potential<u style="single">、</u>Drive transistor (1B) gate<u style="single">-</u>It appears as a fluctuation in the voltage between sources and causes a fluctuation in the drain current (drive current). Fluctuations in drive current due to such various causes<u style="single">、</u>It appears as a variation in the emission brightness for each pixel, and the image quality deteriorates.
FIG. 3A is a block diagram showing the overall configuration of the display device according to the present invention. As shown in the figure, the display device 100 is composed of a pixel array unit 102 and a drive unit (103, 104, 105) for driving the pixel array unit 102.<u style="single">Become</u>.. The pixel array unit 102 has a row-shaped scanning line WSL101 to 10 m and a columnar shape.<u style="single">Video signal line</u>DTL101 ~ 10n, the matrix pixel (PXLC) 101 arranged at the intersection of the two, and each pixel<u style="single">(Display element)</u>Arranged corresponding to each line of 101<u style="single">Power supply line</u>It is equipped with DSL101 ~ 10m. The drive unit (103, 104, 105) is a main scanner (light scanner WSCN) 104 that sequentially supplies control signals to each scanning line WSL101 to 10m and sequentially scans pixels 101 line by line, and each scan line according to this line sequential scanning.<u style="single">Power supply line</u>1st potential and 2nd potential on DSL101 ~ 10m<u style="single">To</u>Off<u style="single">Ri</u>Replacement<u style="single">Wow</u>Power supply scanner (DSCN) 105 that supplies the power supply voltage and a row for this line sequential scan<u style="single">Video signal line</u>The DTL101 to 10n are provided with a signal potential that becomes a video signal and a signal selector (horizontal selector HSEL) 103 that supplies a reference potential.
FIG. 3B is a circuit diagram showing a specific configuration and wiring relationship of the pixel 101 included in the display device 100 shown in FIG. 3A. As shown, this pixel 101 is an organic EL device.<u style="single">etc</u>Represented by<u style="single">Light emitting part</u>Includes 3D, sampling transistor 3A, drive transistor 3B, and holding capacitance 3C. The sampling transistor 3A is connected to the scanning line WSL101 corresponding to the gate.<u style="single">Has been</u>, Its source and drain correspond<u style="single">Video signal line</u>Connect to DTL101<u style="single">Has been</u>, The other is connected to the gate g of the drive transistor 3B<u style="single">Have been</u>To. One of the source s and the drain d of the drive transistor 3B is<u style="single">Light emitting part</u>Connect to 3D<u style="single">Has been</u>, The other corresponds<u style="single">Power supply line</u>Connect to DSL101<u style="single">Be done</u>ing. In this embodiment, the drain d of the driving transistor 3B is<u style="single">Power supply line</u>Connect to DSL101<u style="single">Have been</u>On the other hand, the source s<u style="single">Light emitting part</u>Connect to 3D anode<u style="single">Be done</u>ing.<u style="single">Light emitting part</u>3D cathode connects to ground wire 3H<u style="single">Be done</u>ing.<u style="single">still,</u>This ground wiring 3H<u style="single">、</u>It is wired in common to all pixels 101. The holding capacitance 3C is connected between the source s and the gate g of the driving transistor 3B.<u style="single">Be done</u>ing.
In such a configuration, the sampling transistor 3A conducts in response to the control signal supplied from the scanning line WSL101.<u style="single">Video signal line</u>The signal potential supplied from the DTL101 is sampled and held in the holding capacitance 3C. The drive transistor 3B is at the first potential<u style="single">Power supply line</u>Received current supply from DSL101<u style="single">、</u>Drive current according to the signal potential held in the holding capacity 3C<u style="single">Light emitting part</u>Flow in 3D. The power scanner 105 is at the first timing before the sampling transistor 3A samples the signal potential.<u style="single">Power supply line</u>Switch the DSL101 from the first potential to the second potential. The main scanner 104 conducts the sampling transistor 3A at the second timing after the first timing to conduct the sampling transistor 3A.<u style="single">Video signal line</u>While applying the reference potential from DTL101 to the gate g of the driving transistor 3B,<u style="single">、</u>Set the source s of the drive transistor 3b to the second potential. The power scanner 105 is at the third timing after the second timing,<u style="single">Power supply line</u>Switching the DSL101 from the 2nd potential to the 1st potential, the threshold voltage of the driving transistor 3B<u style="single">V</u><sub><u style="single">th</u></sub>The voltage corresponding to is held in the holding capacity 3C. With this threshold voltage correction function, the display device 100 can cancel the influence of the threshold voltage of the driving transistor 3B that varies from pixel to pixel. in addition<u style="single">、</u>The power scanner 105<u style="single">Power supply line</u>Adjust the first timing to drop the DSL101 from the first potential to the second potential,<u style="single">Light emitting part</u>Allows you to adjust how long the 3D is emitting.
Pixel 101 shown in FIG. 3B<u style="single">、</u>In addition to the above-mentioned threshold voltage correction function, it has a mobility correction function. That is,<u style="single">、</u>The signal selector (HSEL) 103 is set after the sampling transistor 3A is conducted.<u style="single">、</u>At the 4th timing<u style="single">Video signal line</u>Cut DTL101 from reference potential to signal potential<u style="single">Ri</u>On the other hand, the main scanner (WSCN) 104 is after the 4th timing.<u style="single">、</u>By canceling the application of the control signal to the scanning line WSL101 at the 5th timing, putting the sampling transistor 3A in an outrageous state, and appropriately setting the period between the 4th timing and the 5th timing, the signal potential reaches the holding capacitance 3C. Is added to the signal potential to correct the mobility μ of the driving transistor 3B.
The pixel circuit 101 shown in FIG. 3B<u style="single">、</u>further<u style="single">、</u>It also has a bootstrap function. That is,<u style="single">、</u>The main scanner (WSCN) 104 cancels the application of the control signal to the scanning line WSL101 at the fifth timing when the signal potential is held in the holding capacitance 3C, puts the sampling transistor 3A in a non-conducting state, and gates the driving transistor 3B. g<u style="single">Video signal line</u>Electrically disconnected from DTL101, thus<u style="single">、</u>Source potential of drive transistor 3B (<u style="single">V</u><sub><u style="single">s</u></sub>) Fluctuations in gate potential (<u style="single">V</u><sub><u style="single">g</u></sub>) Is linked<u style="single">、</u>Voltage between gate g and source s<u style="single">V</u><sub><u style="single">gs</u></sub>Can be kept constant.
FIG. 4A is a timing chart provided for explaining the operation of the pixel 101 shown in FIG. 3B. With a common time axis, the potential change of the scanning line (WSL101),<u style="single">Power supply line</u>(DSL101) potential change and<u style="single">Video signal line</u>It shows the potential change of (DTL101). Also<u style="single">、</u>In parallel with these potential changes, the gate potential of the driving transistor 3B (<u style="single">V</u><sub><u style="single">g</u></sub>) And source potential (<u style="single">V</u><sub><u style="single">s</u></sub>) Is also shown.
This timing chart matches the transition of the operation of pixel 101.<u style="single">、</u>The period is divided for convenience as (B) to (G). In the light emission period (B)<u style="single">, Light emitting part</u>3D is in a luminous state. After this<u style="single">、</u>Enter a new field of line sequential scanning at the first timing<u style="single">First,</u>In the first period (C)<u style="single">Power supply line</u>Low potential of DSL101<u style="single">V</u><sub><u style="single">cc_L</u></sub>By transitioning to, the source potential of the driving transistor 3B<u style="single">V</u><sub><u style="single">s</u></sub>But<u style="single">, V</u><sub><u style="single">cc_L</u></sub>It drops to a potential close to.<u style="single">Power supply line</u>If the wiring capacity of the DSL101 is large, advance this first timing to<u style="single">Power supply line</u>Low potential of DSL101<u style="single">V</u><sub><u style="single">cc_L</u></sub>All you have to do is secure time to charge the battery. Like this<u style="single">Threshold correction preparation period</u>(C) is provided<u style="single">Power supply line</u>Low potential of DSL101<u style="single">V</u><sub><u style="single">cc_L</u></sub>Time to transition to<u style="single">Power supply line</u>It can be sufficiently secured according to the time constant determined by the wiring resistance and wiring capacity of the DSL101. this<u style="single">Threshold correction preparation period</u>The length of (C) is<u style="single">、</u>It can be set arbitrarily.
At the second timing, proceed to the next period (D) and<u style="single">Scan line WSL101</u>When transitioning from low level to high level, the gate potential of the driving transistor 3B<u style="single">V</u><sub><u style="single">g</u></sub>Is the reference potential of the video signal line DTL101<u style="single">V</u><sub><u style="single">o o</u></sub>And the source potential<u style="single">V</u><sub><u style="single">s</u></sub>Is<u style="single">、</u>Immediately<u style="single">V</u><sub><u style="single">cc_L</u></sub>Is fixed to. This period (D)<u style="single">Threshold correction preparation period</u>include. Like this<u style="single">, Threshold correction preparation period</u>At (C and D), the gate potential of the driving transistor 3B<u style="single">V</u><sub><u style="single">g</u></sub>And source potential<u style="single">V</u><sub><u style="single">s</u></sub>Is initialized (reset) to complete the preparation for the threshold voltage correction operation.<u style="single">still</u>,this<u style="single">Threshold correction preparation period</u>(C and D) are<u style="single">Light emitting part</u>Is in a non-luminous state<u style="single">Threshold correction preparation period</u>By adjusting the first timing to enter, it is possible to adjust the ratio of the light emission period to one field. Adjusting the ratio (duty) of the light emission period to one field means adjusting the screen brightness. That is,<u style="single">, Power supply line DSL</u>The screen brightness can be adjusted by controlling the first timing of dropping the voltage from the high potential to the low potential. If you do this for each of the three RGB primary colors, you can also adjust the white balance of the screen.
<u style="single">Threshold correction preparation period</u>When (D) is completed, at the third timing<u style="single">Threshold correction period</u>Proceeding to (E), the threshold voltage correction operation is actually performed, and the threshold voltage is actually performed between the gate g of the driving transistor 3B and the source s.<u style="single">V</u><sub><u style="single">th</u></sub>The voltage corresponding to is held. actually,<u style="single">V</u><sub><u style="single">th</u></sub>The voltage corresponding to is written to the holding capacitance 3C connected between the gate g of the driving transistor 3B and the source s. After this<u style="single">、</u>At the 4th timing, the sampling period / mobility correction period (F) is advanced, and the signal potential of the video signal is reached.<u style="single">V</u><sub><u style="single">in</u></sub>But<u style="single">V</u><sub><u style="single">th</u></sub>The voltage ΔV for mobility correction is subtracted from the voltage held in the holding capacity 3C while being written to the holding capacity 3C in the form of being added to.
After this, the process proceeds to the light emission period (G), and the signal potential V<sub>in</sub>The light emitting unit emits light with a brightness corresponding to the above. At that time, the signal potential V<sub>in</sub>Is the threshold voltage V<sub>th</sub>Since the voltage corresponding to and the voltage ΔV for mobility correction are adjusted, the emission brightness of the light emitting unit 3D is the threshold voltage V of the driving transistor 3B.<sub>th</sub>It is not affected by variations in mobility μ. The bootstrap operation is performed at the beginning (fifth timing) of the light emission period (G), and the gate-source voltage V of the driving transistor 3B is performed.<sub>gs</sub>= V<sub>in</sub><u style="single">-V</u><sub><u style="single">o o</u></sub>+ V<sub>th</sub>Gate potential V of drive transistor 3B while maintaining -ΔV constant<sub>g</sub>And source potential V<sub>s</sub>Rise.
Continue<u style="single">、</u>The operation of the pixel 101 shown in FIG. 3B will be described in detail with reference to FIGS. 4B to 4G.<u style="single">still</u>, The figure numbers of FIGS. 4B to 4G correspond to the respective periods (B) to (G) of the timing chart shown in FIG. 4A. Figures 4B to 4G for ease of understanding<u style="single">In</u>, For convenience of explanation<u style="single">, Light emitting part</u>The 3D capacitive component is illustrated as a capacitive element 3I. First<u style="single">、</u>As shown in FIG. 4B, during the light emission period (B), the power supply line DSL101 has a high potential.<u style="single">V</u><sub><u style="single">cc_H</u></sub>(1st potential), drive transistor 3B is drive current<u style="single">I</u><sub><u style="single">ds</u></sub>To<u style="single">Light emitting part</u>Supplying to 3D. Drive current as shown<u style="single">I</u><sub><u style="single">ds</u></sub>Is high potential<u style="single">V</u><sub><u style="single">cc_H</u></sub>From the power supply line DSL101 in, via the drive transistor 3B<u style="single">Light emitting part</u>It passes through 3D and flows into the common ground wiring 3H.
continue<u style="single">、</u>When entering period (C)<u style="single">、</u>As shown in Fig. 4C, the power supply line DSL101 has a high potential.<u style="single">V</u><sub><u style="single">cc_H</u></sub>From low potential<u style="single">V</u><sub><u style="single">cc_L</u></sub>Cut into<u style="single">Ri</u>Change. This will<u style="single">、</u>Power supply line DSL101<u style="single">V</u><sub><u style="single">cc_L</u></sub>Discharged to<u style="single">、</u>Source potential of drive transistor 3B<u style="single">V</u><sub><u style="single">s</u></sub>Is<u style="single">V</u><sub><u style="single">cc_L</u></sub>It transitions to a potential close to. If the wiring capacity of the power supply line DSL101 is large<u style="single">、</u>High potential of power supply line DSL101 at a relatively early timing<u style="single">V</u><sub><u style="single">cc_H</u></sub>From low potential<u style="single">V</u><sub><u style="single">cc_L</u></sub>Cut into<u style="single">Ri</u>You should change it. By ensuring a sufficient period (C), it should not be affected by the wiring capacitance and other pixel parasitic capacitance.
next<u style="single">、</u>Proceeding to period (D), as shown in Figure 4D, the scan line WSL101 is cut from low level to high level.<u style="single">Ri</u>By changing, the sampling transistor 3A becomes conductive. At this time<u style="single">、</u>The video signal line DTL101 has a reference potential<u style="single">V</u><sub><u style="single">o o</u></sub>It is in. Therefore<u style="single">、</u>Gate potential of drive transistor 3B<u style="single">V</u><sub><u style="single">g</u></sub>Is<u style="single">、</u>Reference potential of video signal line DTL101 through conductive sampling transistor 3A<u style="single">V</u><sub><u style="single">o o</u></sub>Will be. At the same time<u style="single">、</u>Source potential of drive transistor 3B<u style="single">V</u><sub><u style="single">s</u></sub>Is instantly low potential<u style="single">V</u><sub><u style="single">cc_L</u></sub>Is fixed to. From the above<u style="single">、</u>Source potential of drive transistor 3B<u style="single">V</u><sub><u style="single">s</u></sub>Is the reference potential of the video signal line DTL<u style="single">V</u><sub><u style="single">o o</u></sub>Lower enough potential<u style="single">V</u><sub><u style="single">cc_L</u></sub>Is initialized (reset) to. In particular<u style="single">、</u>Gate-source voltage of drive transistor 3B<u style="single">V</u><sub><u style="single">gs</u></sub>(Gate potential<u style="single">V</u><sub><u style="single">g</u></sub>And source potential<u style="single">V</u><sub><u style="single">s</u></sub>The difference) is the threshold voltage of the driving transistor 3B.<u style="single">V</u><sub><u style="single">th</u></sub>Low potential of power supply line DSL101 to be larger<u style="single">V</u><sub><u style="single">cc_L</u></sub>Set (second potential).
next<u style="single">、</u>When you proceed to the threshold correction period (E)<u style="single">、</u>As shown in FIG. 4 (E), the potential of the power supply line DSL101 is low.<u style="single">V</u><sub><u style="single">cc_L</u></sub>From high potential<u style="single">V</u><sub><u style="single">cc_H</u></sub>Transition to, and the source potential of the driving transistor 3B<u style="single">V</u><sub><u style="single">s</u></sub>Starts rising. Eventually<u style="single">、</u>Drive transistor 3B gate<u style="single">-</u>Source voltage<u style="single">V</u><sub><u style="single">gs</u></sub>Is the threshold voltage<u style="single">V</u><sub><u style="single">th</u></sub>Where it became<u style="single">、</u>The current cuts off. In this way<u style="single">、</u>Threshold voltage of drive transistor 3B<u style="single">V</u><sub><u style="single">th</u></sub>The voltage corresponding to<u style="single">、</u>It is written to the holding capacity 3C. This is the threshold voltage correction operation. At this time<u style="single">、</u>The current flows exclusively to the holding capacity 3C side,<u style="single">Light emitting part</u>To prevent it from flowing to the 3D side<u style="single">Light emitting part</u>Set the potential of the common ground wiring 3H so that 3D is cut off.
Next, when the sampling period / mobility correction period (F) is advanced, as shown in FIG. 4F, the potential of the video signal line DTL101 becomes the reference potential V at the first timing.<sub>o o</sub>From signal potential V<sub>in</sub>Transition to, and the gate potential V of the driving transistor 3B<sub>g</sub>Is V<sub>in</sub>Will be. At this time, since the light emitting unit 3D is initially in the cutoff state (high impedance state), the drain current I of the driving transistor 3B<sub>ds</sub>Flows into the capacitive component 3I of the light emitting part. As a result, the capacitance component 3I of the light emitting unit starts charging. Therefore, the source potential V of the driving transistor 3B<sub>s</sub>Starts rising, and at the second timing, the gate-source voltage V of the drive transistor 3B<sub>gs</sub>Is V<sub>in</sub><u style="single">-V</u><sub><u style="single">o o</u></sub>+ V<sub>th</sub>-ΔV. In this way, the signal potential V<sub>in</sub>Sampling and correction amount ΔV are adjusted. V<sub>in</sub>The higher I<sub>ds</sub>Will increase, and the absolute value of ΔV will also increase. Therefore, the mobility can be corrected according to the emission brightness level. Also, V<sub>in</sub>Assuming that is constant, the larger the mobility μ of the driving transistor 3B, the larger the absolute value of ΔV. In other words, the larger the mobility μ, the larger the negative feedback amount ΔV, so that it is possible to eliminate variations in the mobility μ for each pixel.
Finally, in the light emission period (G), as shown in FIG. 4G, the scanning line WSL101 transitions to the low potential side, and the sampling transistor 3A is turned off. As a result, the gate g of the driving transistor 3B is separated from the video signal line DTL101. At the same time, drain current I<sub>ds</sub>Begins to flow through the light emitting part 3D. As a result, the anode potential of the light emitting unit 3D becomes the drive current I.<sub>ds</sub>Ascends accordingly. Increase amount V<sub>el el</sub>It is expressed as. The rise in the anode potential of the light emitting unit 3D, that is, the source potential V of the driving transistor 3B<sub>s</sub>Is nothing but a rise in. Source potential V of drive transistor 3B<sub>s</sub>When the value rises, the gate potential V of the driving transistor 3B is caused by the bootstrap operation of the holding capacity 3C.<sub>g</sub>Also rises in tandem. Gate potential V<sub>g</sub>Rise amount V<sub>el el</sub>Is the source potential V<sub>s</sub>Is equal to the amount of increase in. Therefore, during the light emission period, the gate-source voltage V of the driving transistor 3B<sub>gs</sub>Is V<sub>in</sub><u style="single">-V</u><sub><u style="single">o o</u></sub>+ V<sub>th</sub>It is kept constant at -ΔV.
FIG. 5A is a timing chart showing a reference example of the driving method of the display device shown in FIG. 3B. For ease of understanding, the parts corresponding to the timing chart of the driving method of the present invention shown in FIG. 4A are shown.<u style="single">、</u>It has a corresponding reference number. The difference is that this reference example<u style="single">Threshold correction preparation period</u>At (C and D), first cut the scan line from low level to high level.<u style="single">Ri</u>Change, then<u style="single">, Power supply line</u>From high potential to low potential<u style="single">Ri</u>It is changing. As previously mentioned<u style="single">、</u>The driving method according to the present invention is described first.<u style="single">Power supply line</u>From high potential to low potential<u style="single">Ri</u>Change, later cut the scan line from low level to high level<u style="single">Ri</u>I'm changing.<u style="single">still</u>, This reference example<u style="single">In the threshold correction preparation period</u>After (C and D)<u style="single">Threshold correction period</u>The (E), sampling period / mobility correction period (F), and light emitting period (G) are the same as the driving method of the display device according to the present invention.
Continue<u style="single">、</u>The driving method of the display device according to the reference example shown in FIG. 5A will be further described with reference to FIGS. 5B, 5C and 5D.<u style="single">First,</u>As shown in FIG. 5B, during the light emission period (B), the power supply line DSL101 has a high potential.<u style="single">V</u><sub><u style="single">cc_H</u></sub>(1st potential), drive transistor 3B is drive current<u style="single">I</u><sub><u style="single">ds</u></sub>To<u style="single">Light emitting part</u>Supplying to 3D. Drive current as shown<u style="single">I</u><sub><u style="single">ds</u></sub>Is high potential<u style="single">V</u><sub><u style="single">cc_H</u></sub>From the power supply line DSL101 in, via the drive transistor 3B<u style="single">Light emitting part</u>It passes through 3D and flows into the common ground wiring 3H.
continue<u style="single">、</u>When entering period (C)<u style="single">、</u>As shown in Figure 5C, scan line WSL101 cuts from low level to high level.<u style="single">Ri</u>Replacement<u style="single">Wow</u>Therefore, the sampling transistor 3A is turned on. This will<u style="single">、</u>Gate potential of drive transistor 3B<u style="single">V</u><sub><u style="single">g</u></sub>Is the reference potential of the video signal line DTL101<u style="single">V</u><sub><u style="single">o o</u></sub>become.
continue<u style="single">、</u>If you proceed to period (D)<u style="single">、</u>As shown in Figure 5D, the power supply line DSL101 has a high potential.<u style="single">V</u><sub><u style="single">cc_H</u></sub>From the video signal line DTL101 reference potential<u style="single">V</u><sub><u style="single">o o</u></sub>Lower potential much lower<u style="single">V</u><sub><u style="single">cc_L</u></sub>Transition to. This will<u style="single">、</u>Source potential of drive transistor 3B<u style="single">V</u><sub><u style="single">s</u></sub>Also the reference potential of the video signal line DTL101<u style="single">V</u><sub><u style="single">o o</u></sub>Lower enough potential<u style="single">V</u><sub><u style="single">cc_L</u></sub>Will be. In particular<u style="single">、</u>Gate-source voltage of drive transistor 3B<u style="single">V</u><sub><u style="single">gs</u></sub>(Gate potential<u style="single">V</u><sub><u style="single">g</u></sub>And source potential<u style="single">V</u><sub><u style="single">s</u></sub>Difference)<u style="single">、</u>Threshold voltage of drive transistor 3B<u style="single">V</u><sub><u style="single">th</u></sub>To be above<u style="single">、</u>Low potential of power supply line DSL101<u style="single">V</u><sub><u style="single">cc_L</u></sub>Is set. As a result, the gate and source of the driving transistor 3B are reset to predetermined potentials, respectively, and the preparatory operation for threshold voltage correction is completed.
FIG. 6 shows the wiring resistance of the power supply line DSL101 selectively driven by the drive scanner (DSCN) 105 in the display device shown in FIG. 3B.<u style="single">R</u><sub><u style="single">p1</u></sub>~<u style="single">R</u><sub><u style="single">pn</u></sub>And wiring capacity<u style="single">C</u><sub><u style="single">p1</u></sub>~<u style="single">C</u><sub><u style="single">pn</u></sub>It is a schematic diagram which shows. The time constant τ of the illustrated power supply line DSL101 is approximately expressed by the following equation. τ = (<u style="single">R</u><sub><u style="single">p1</u></sub>+<u style="single">R</u><sub><u style="single">p2</u></sub>+・・・<u style="single">R</u><sub><u style="single">pn</u></sub>)×(<u style="single">C</u><sub><u style="single">p1</u></sub>+<u style="single">C</u><sub><u style="single">p2</u></sub>+・・・<u style="single">C</u><sub><u style="single">pn</u></sub>) The larger the pixel array portion of the display device on the high-definition screen, the larger the time constant τ becomes.
here<u style="single">、</u>In the operation of the reference example shown in Fig. 5D, the power supply line DSL101 has a high potential.<u style="single">V</u><sub><u style="single">cc_H</u></sub>From the video signal line DTL101 reference potential<u style="single">V</u><sub><u style="single">o o</u></sub>Lower enough potential<u style="single">V</u><sub><u style="single">cc_L</u></sub>Definitely low potential when transitioning to<u style="single">V</u><sub><u style="single">cc_L</u></sub>A charge / discharge time of about 5 × τ is required to bring it closer to.
FIG. 7 is a timing chart used to explain the operation of the reference example. The timing chart is basically the same as the reference example shown in Fig. 5A, but the power supply line DSL101 has a potential especially as the preparation period (D).<u style="single">V</u><sub><u style="single">cc_L</u></sub>It represents the case where the required time of 5 × τ cannot be secured until the transition to. As shown, in this reference example, the potential during the preparation period (D)<u style="single">V</u><sub><u style="single">cc_L</u></sub>Source potential of drive transistor 3B due to insufficient transition time to<u style="single">V</u><sub><u style="single">s</u></sub>But<u style="single">V</u><sub><u style="single">cc_L</u></sub>Could not be reached, resulting in the gate-source voltage of the drive transistor 3B.<u style="single">V</u><sub><u style="single">gs</u></sub>Is<u style="single">V</u><sub><u style="single">s1</u></sub>However, the threshold voltage of the driving transistor 3B<u style="single">V</u><sub><u style="single">th</u></sub>Cannot secure a value exceeding. Therefore, the following<u style="single">Threshold correction period</u>Even if (E) is entered, normal threshold voltage correction operation becomes impossible. The present invention solves this problem of the reference example, and first cuts the power supply line from a high potential to a low potential.<u style="single">Ri</u>By changing, the source potential of the driving transistor is surely<u style="single">V</u><sub><u style="single">s</u></sub>To<u style="single">V</u><sub><u style="single">cc_L</u></sub>Reset to<u style="single">、</u>The threshold voltage correction operation is ensured.
Hereinafter, the threshold voltage correction function, the mobility correction function, and the bootstrap function included in the display device according to the present invention will be described in more detail. FIG. 8 is a graph showing the current-voltage characteristics of the drive transistor. In particular, the drain-source current (drain current) I when the drive transistor is operating in the saturation region.<sub>ds</sub>Is I<sub>ds</sub>= (1/2) μ (W / L) C<sub>ox</sub> (V<sub>gs</sub>-V<sub>th</sub>)<sup>2</sup>It is represented by. Where μ represents mobility, W represents gate width, L represents gate length, and C<sub>ox</sub>Indicates the gate oxide film capacity per unit area. As is clear from this transistor characteristic equation, the threshold voltage V<sub>th</sub>When fluctuates, V<sub>gs</sub>Drain-source current I, even if<sub>ds</sub>Fluctuates. Here, the pixel according to the present invention has a gate-source voltage V at the time of light emission as described above.<sub>gs</sub>Is V<sub>in</sub><u style="single">-V</u><sub><u style="single">o o</u></sub>+ V<sub>th</sub>Since it is represented by -ΔV, if this is substituted into the above transistor characteristic equation, the drain-source current I<sub>ds</sub>Is I<sub>ds</sub>= (1/2) μ (W / L) C<sub>ox</sub> (V<sub>in</sub><u style="single">-V</u><sub><u style="single">o o</u></sub>-ΔV)<sup>2</sup>Will be represented by the threshold voltage V<sub>th</sub>Does not depend on. As a result, the threshold voltage V<sub>th</sub>Drain-source current I<sub>ds</sub>Does not fluctuate, and the emission brightness of the organic EL device does not fluctuate.
If no measures are taken, the threshold voltage will rise as shown in Fig. 8.<u style="single">V</u><sub><u style="single">th</u></sub>When<u style="single">V</u><sub><u style="single">gs</u></sub>The drive current corresponding to<u style="single">I</u><sub><u style="single">ds</u></sub>On the other hand, the threshold voltage<u style="single">V</u><sub><u style="single">th</u></sub><u style="single">’</u>At the same gate voltage<u style="single">V</u><sub><u style="single">gs</u></sub>Drive current corresponding to<u style="single">I</u><sub><u style="single">ds</u></sub><u style="single">’</u>Is<u style="single">I</u><sub><u style="single">ds</u></sub>Will be different.
FIG. 9A is a graph showing the current-voltage characteristics of the drive transistor as well. Mobility is μ and μ<u style="single">’</u>The characteristic curves are listed for each of the two drive transistors that differ in. As is clear from the graph, the mobility is μ and μ.<u style="single">’</u>Different and constant<u style="single">V</u><sub><u style="single">gs</u></sub>Even drain<u style="single">-</u>Source-to-source current<u style="single">I</u><sub><u style="single">ds</u></sub>When<u style="single">I</u><sub><u style="single">ds</u></sub><u style="single">’</u>It becomes like, and it fluctuates.
FIG. 9B describes the operation of the pixels at the time of sampling the video signal line potential and at the time of mobility correction, and also shows the capacitance component 3I of the light emitting unit 3D for easy understanding. Since the sampling transistor 3A is in the ON state when sampling the video signal line potential, the gate potential V of the driving transistor 3B<sub>g</sub>Is the video signal line potential V<sub>in</sub>And the gate-source voltage V of the drive transistor 3B<sub>gs</sub>Is V<sub>in</sub><u style="single">-V</u><sub><u style="single">o o</u></sub>+ V<sub>th</sub>become. At this time, the drive transistor 3B is in the ON state, and the light emitting unit 3D is in the cutoff state, so that the drain-source current I<sub>ds</sub>Flows into the capacitive component 3I of the light emitting part. Drain-source current I<sub>ds</sub>Flows into the capacitance component 3I of the light emitting section, the capacitance component 3I of the light emitting section starts charging, and the anode potential of the light emitting section 3D (thus, the source potential V of the driving transistor 3B).<sub>s</sub>) Starts rising. Source potential V of drive transistor 3B<sub>s</sub>When increases by ΔV, the gate-source voltage V of the drive transistor 3B<sub>gs</sub>Decreases by ΔV. This is the mobility correction operation by negative feedback, and the gate-source voltage V<sub>gs</sub>The amount of decrease ΔV is ΔV = I<sub>ds</sub> T / C<sub>el el</sub>Is determined by, and ΔV is a parameter for mobility correction. Where C<sub>el el</sub>Indicates the capacitance value of the capacitance component 3I of the light emitting part, and t indicates the mobility correction period.
FIG. 9C is a schematic diagram illustrating the operation timing of the pixel circuit that determines the mobility correction period t. The illustrated example is<u style="single">Video signal line potential</u>By inclining the rise of, the mobility correction period t can be set.<u style="single">Video signal line potential</u>Is automatically followed to optimize it. As shown, the mobility correction period t is<u style="single">Scan line WSL101</u>And the phase difference of the video signal line DTL101, and further<u style="single">、</u>It is also determined by the potential of the video signal line DTL101. Mobility correction parameter ΔV is ΔV =<u style="single">I</u><sub><u style="single">ds</u></sub><u style="single"> T / C</u><sub><u style="single">el el</u></sub>Is. As is clear from this equation, the drain of the driving transistor 3B<u style="single">-</u>Source-to-source current<u style="single">I</u><sub><u style="single">ds</u></sub>The larger the value, the larger the mobility correction parameter ΔV. vice versa<u style="single">、</u>Drain of drive transistor 3B<u style="single">-</u>Source-to-source current<u style="single">I</u><sub><u style="single">ds</u></sub>When is small, the mobility correction parameter ΔV becomes small. In this way, the mobility correction parameter ΔV is the drain.<u style="single">-</u>Source-to-source current<u style="single">I</u><sub><u style="single">ds</u></sub>It depends on. that time<u style="single">、</u>The mobility correction period t does not necessarily have to be constant, and conversely.<u style="single">I</u><sub><u style="single">ds</u></sub>It may be preferable to adjust according to the above. For example<u style="single">, I</u><sub><u style="single">ds</u></sub>If is large<u style="single">To</u>The mobility correction period t is shortened, and vice versa.<u style="single">, I</u><sub><u style="single">ds</u></sub>Is small<u style="single">If not</u>The mobility correction period t should be set longer. Therefore, in the embodiment shown in FIG. 9C, at least when the potential of the video signal line DTL101 is high by inclining the rising edge of the video signal line potential (<u style="single">I</u><sub><u style="single">ds</u></sub>When the correction period t becomes short and the potential of the video signal line DTL101 is low (when is large)<u style="single">I</u><sub><u style="single">ds</u></sub>(When is small) The correction period t is automatically adjusted to be long.
FIG. 9D is a graph illustrating the operating points of the drive transistor 3B during mobility correction. Mobility in the manufacturing process μ, μ<u style="single">’</u>Optimal correction parameters ΔV and ΔV by applying the above-mentioned mobility correction to the variation of<u style="single">’</u>Is determined, and the drain of the driving transistor 3B<u style="single">-</u>Source-to-source current<u style="single">I</u><sub><u style="single">ds</u></sub>as well as<u style="single">I</u><sub><u style="single">ds</u></sub><u style="single">’</u>Is determined. If mobility correction is not applied, the gate<u style="single">-</u>Source voltage<u style="single">V</u><sub><u style="single">gs</u></sub>On the other hand, the mobility is μ and μ<u style="single">’</u>If different, drain accordingly<u style="single">-</u>Source-to-source current<u style="single">I</u><sub><u style="single">ds0</u></sub>When<u style="single">I</u><sub><u style="single">ds0</u></sub><u style="single">’</u>Will be different. To deal with this, mobility μ and μ<u style="single">’</u>Appropriate corrections for ΔV and ΔV, respectively.<u style="single">’</u>By applying, drain<u style="single">-</u>Source-to-source current<u style="single">I</u><sub><u style="single">ds</u></sub>as well as<u style="single">I</u><sub><u style="single">ds</u></sub><u style="single">’</u>And becomes the same level. As is clear from the graph in FIG. 9D, when the mobility μ is high, the correction amount ΔV becomes large, while the mobility μ is large.<u style="single">’</u>When is small, the correction amount ΔV<u style="single">’</u>Negative feedback is applied so that
Figure 10A consists of an organic EL device<u style="single">Light emitting part</u>3D current<u style="single">-</u>It is a graph which shows the voltage characteristic.<u style="single">Light emitting part</u>Current in 3D<u style="single">I</u><sub><u style="single">el el</u></sub>Anode when<u style="single">-</u>Voltage between cathodes<u style="single">V</u><sub><u style="single">el el</u></sub>Is uniquely determined. During the light emission period as shown in Fig. 4G<u style="single">、</u>When the scanning line WSL101 transitions to the low potential side and the sampling transistor 3A is turned off,<u style="single">Light emitting part</u>The 3D anode is the drain of the drive transistor 3B<u style="single">-</u>Source-to-source current<u style="single">I</u><sub><u style="single">ds</u></sub>Anode determined by<u style="single">-</u>Voltage between cathodes<u style="single">V</u><sub><u style="single">el el</u></sub>It rises by the amount.
FIG. 10B shows the gate potential V of the driving transistor 3B when the anode potential of the light emitting unit 3D rises.<sub>g</sub>And source potential V<sub>s</sub>It is a graph which shows the potential fluctuation of. Anode rising voltage of light emitting part 3D is V<sub>el el</sub>At this time, the source of the drive transistor 3B is also V<sub>el el</sub>The gate of the drive transistor 3B is also V due to the bootstrap operation with a holding capacity of 3C.<sub>el el</sub>It rises by a minute. Therefore, the gate-source voltage V of the drive transistor 3B held before the bootstrap.<sub>gs</sub>= V<sub>in</sub><u style="single">-V</u><sub><u style="single">o o</u></sub>+ V<sub>th</sub>-ΔV is retained even after bootstrap. In addition, even if the anode potential of the light emitting unit 3D deteriorates over time, the gate-source voltage of the drive transistor 3B is always V.<sub>in</sub><u style="single">-V</u><sub><u style="single">o o</u></sub>+ V<sub>th</sub>It is kept constant at -ΔV.
FIG. 10C is a circuit diagram in which parasitic capacitances 7A and 7B are added to the pixel configuration of the present invention described with reference to FIG. 3B. The parasitic capacitances 7A and 7B are parasitic on the gate g of the driving transistor 3. The bootstrap operating capacity mentioned above is the capacity value of the holding capacity.<u style="single">C</u><sub><u style="single">s</u></sub>, Parasitic capacitance 7A, 7B capacitance value respectively<u style="single">C</u><sub><u style="single">w</u></sub>,<u style="single">C</u><sub><u style="single">p</u></sub>When<u style="single">C</u><sub><u style="single">s</u></sub>/(<u style="single">C</u><sub><u style="single">s</u></sub>+<u style="single">C</u><sub><u style="single">w</u></sub>+<u style="single">C</u><sub><u style="single">p</u></sub>), And the closer it is to 1, the higher the bootstrap operating ability. In other words<u style="single">Light emitting part</u>It shows that the correction ability for 3D deterioration over time is high. In the present invention, the number of elements connected to the gate g of the drive transistor 3B is kept to a minimum.<u style="single">C</u><sub><u style="single">p</u></sub>Can be almost ignored. Therefore<u style="single">、</u>Bootstrap operating ability<u style="single">C</u><sub><u style="single">s</u></sub>/(<u style="single">C</u><sub><u style="single">s</u></sub>+<u style="single">C</u><sub><u style="single">w</u></sub>), Which is as close to 1 as possible<u style="single">Light emitting part</u>It shows that the correction ability for 3D deterioration over time is high.
FIG. 11 is a schematic circuit diagram showing another embodiment of the display device according to the present invention. For ease of understanding, the parts corresponding to the previous embodiments shown in FIG. 3B are given corresponding reference numbers. The difference is that the embodiment shown in FIG. 3B uses N-channel transistors to form a pixel circuit, whereas the embodiment shown in FIG. 11 uses P-channel transistors to form a pixel circuit. That is. The pixel circuit of FIG. 11 can also perform the threshold voltage correction operation, the mobility correction operation, and the bootstrap operation in exactly the same manner as the pixel circuit shown in FIG. 3B.
<figref num="1">It is a circuit diagram which shows the general pixel composition.</figref><figref num="2">It is a timing chart provided for the operation explanation of the pixel circuit shown in FIG.</figref><figref num="3A">It is a block diagram which shows the whole structure of the display device which concerns on this invention.</figref><figref num="3B">It is a circuit diagram which shows the embodiment of the display device which concerns on this invention.</figref><figref num="4A">It is a timing chart provided for the operation explanation of the embodiment shown in FIG. 3B.</figref><figref num="4B">It is also a circuit diagram provided for operation explanation.</figref><figref num="4C">It is also a circuit diagram provided for operation explanation.</figref><figref num="4D">It is also a circuit diagram provided for operation explanation.</figref><figref num="4E">It is also a circuit diagram provided for operation explanation.</figref><figref num="4F">It is also a circuit diagram provided for operation explanation.</figref><figref num="4G">It is also a circuit diagram provided for operation explanation.</figref><figref num="5A">It is a timing chart which shows the reference example of the driving method of a display device.</figref><figref num="5B">It is also a circuit diagram provided for the operation explanation of the reference example.</figref><figref num="5C">It is also a circuit diagram provided for the operation explanation of the reference example.</figref><figref num="5D">It is also a circuit diagram provided for the operation explanation of the reference example.</figref><figref num="6">It is a schematic circuit diagram which shows the wiring capacity and wiring resistance of a display device.</figref><figref num="7">It is a timing chart which shows other reference example of the driving method of a display device.</figref><figref num="8">Drive transistor current<u style="single">-</u>It is a graph which shows the voltage characteristic.</figref><figref num="9A">Similarly, the current of the drive transistor<u style="single">-</u>It is a graph which shows the voltage characteristic.</figref><figref num="9B">It is a circuit diagram which provides the operation description of the display device which concerns on this invention.</figref><figref num="9C">It is also a waveform diagram provided for operation explanation.</figref><figref num="9D">The current used for the operation explanation as well<u style="single">-</u>It is a voltage characteristic graph.</figref><figref num="10A"><u style="single">Light emitting part</u>Current<u style="single">-</u>It is a graph which shows the voltage characteristic.</figref><figref num="10B">It is a waveform figure which shows the bootstrap operation of a drive transistor.</figref><figref num="10C">It is a circuit diagram which provides the operation description of the display device which concerns on this invention.</figref><figref num="11">It is a circuit diagram which shows the other embodiment of the display device which concerns on this invention.</figref>
100 ... display device, 101 ... pixels<u style="single">(Display element)</u>, 102 ... Pixel array section, 103 ... Horizontal selector, 104 ... Light scanner, 105 ... Power scanner, 3A ... Sampling transistor, 3B ... Drive transistor, 3C ... Retention capacity, 3D ...<u style="single">Light emitting part</u>
32 sheets
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| JP2008032863A | Cites | Japan |
| JP2003271095A | Cites | Japan |
| JP2004295131A | Cites | Japan |
| JP2007310311A | Cites | Japan |
| WO2006060902A1 | Cites | World Intellectual Property Organization (WIPO) |
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Numbers
- Publication
- 5114889
- Publication, DOCDB
- 5114889
- Publication, EPODOC
- JP5114889B
- Application
- 204056
- Application, DOCDB
- 2006204056
- Application, EPODOC
- JP20060204056
Titles2
- Japanese
- 表示素子及び表示素子の駆動方法、並びに、表示装置及び表示装置の駆動方法
- English
- Display element and drive method of display element, and display device and drive method of display device
Classification
- CPC, 4
- G09G3/3266
- G09G3/3258
- G09G2300/0819
- G09G2320/043
- IPC, 4
- G09G3 30
- G09G3 20
- H01L51 50
- H05B44 00
