Semiconductor light emitting device and method of manufacturing same and semiconductor light emitting apparatus
8 claims: 2 independent, 6 dependent
- 1発光層を含み、前記発光層から放出される光が取り出される第1の主面と、前記第1の主面の反対側に設けられた第2の主面と、を有する半導体積層体と、 前記半導体積層体の前記第1の主面の上に設けられた電極と、 前記半導体積層体の前記第2の主面に接して設けられたコンタクト層と、 導電性及び前記発光層から放出される光に対する反射性を有し、 前記コンタクト層が前記半導体積層体と接する面の反対側の面 で前記コンタクト層に接して設けられた反射層と、 を備え、 前記コンタクト層は、 前記半導体積層体と接する面の反対側の面 に起伏を有し、 前記反射層は、前記コンタクト層の前記起伏を被覆しつつ、一部が前記半導体積層体に食い込む粗面を有することを特徴とする半導体発光素子。
- 2前記反射層は、2つの金属層が積層され接合されてなることを特徴とする請求項1記載の半導体発光素子。
- 3前記コンタクト層は、GaAsを含むことを特徴とする請求項1または2に記載の半導体発光素子。
- 4実装部材と、 前記実装部材の上にマウントされた請求項1~3のいずれか1つに記載の半導体発光素子と、 前記半導体発光素子を封止した樹脂と、 を備えたことを特徴とする半導体発光装置。
- 5第1の基板上に、発光層を含む半導体層と、コンタクト層と、を順に形成する工程と、 前記コンタクト層の表面から前記半導体層に達するまで部分的にエッチングし、前記コンタクト層の表面から前記半導体層に入り込んだ形状の起伏を形成する工程と、 前記起伏を被覆するように前記コンタクト層上に第1の金属層を形成する工程と、 第2の基板上に形成された第2の金属層を前記第2の基板ごと前記第1の金属層に接合させる工程と、 前記第2の金属層を前記第1の金属層に接合させた後、前記第1の基板を除去する工程と、 を備えたことを特徴とする半導体発光素子の製造方法。
- 6RIE(Reactive Ion Etching)法により前記コンタクト層の表面から前記エッチングを行い、前記起伏を形成することを特徴とする請求項5記載の半導体発光素子の製造方法。
- 7前記コンタクト層の表面にインジウムを含む層を積層させ、前記インジウムを含む層の表面からエッチングを行い、前記起伏を形成することを特徴とする請求項5または6に記載の半導体発光素子の製造方法。
- 8前記第1の金属層を、スパッタ法あるいは真空蒸着法により形成することを特徴とする請求項5~7のいずれか1つに記載の半導体発光素子の製造方法。
Independent claims8
72 paragraphs, as filed
The present invention relates to a semiconductor light emitting device, a method for manufacturing the semiconductor light emitting device, and a semiconductor light emitting device. The present invention relates to an element, a method for manufacturing the same, and a semiconductor light emitting device.
A semiconductor light emitting device having a structure in which a reflective layer made of a metal material is provided on the opposite side of the light extraction surface, and the light emitted from the light emitting layer to the opposite side of the light extraction surface is reflected by the reflection layer to the light extraction surface side. The device is disclosed in, for example, Patent Document 1.
The purpose is to improve the light extraction efficiency by providing such a reflection layer, but the light emitted from the light emitting layer is repeatedly totally reflected by the reflection layer, the side surface of the element, the light extraction surface, and the like. Therefore, the expected light extraction efficiency cannot be improved.<patcit num="1"><text>Japanese Patent Application Laid-Open No. 2005-175462</text></patcit>
<p> The present invention provides a semiconductor light emitting device, a method for manufacturing the same, and a semiconductor light emitting device for improving the extraction efficiency of light emitted from the light emitting layer.</p>
<p> According to one aspect of the present invention, a first main surface including a light emitting layer from which light emitted from the light emitting layer is taken out and a second main surface provided on the opposite side of the first main surface. A semiconductor laminate having the above, an electrode provided on the first main surface of the semiconductor laminate, and a contact layer provided in contact with the second main surface of the semiconductor laminate. It has conductivity and reflectivity to the light emitted from the light emitting layer.<u style="single">The surface opposite to the surface where the contact layer is in contact with the semiconductor laminate</u>The contact layer is provided with a reflective layer provided in contact with the contact layer.<u style="single">The surface opposite to the surface in contact with the semiconductor laminate</u>Provided is a semiconductor light emitting device characterized in that the reflective layer has a rough surface that partially bites into the semiconductor laminate while covering the undulations of the contact layer.</p><p> Further, according to another aspect of the present invention. Mounting members and The above-mentioned semiconductor light emitting device mounted on the mounting member and The resin that encapsulates the semiconductor light emitting element and A semiconductor light emitting device is provided.</p><p> Further, according to still another aspect of the present invention, a semiconductor layer including a light emitting layer and a semiconductor layer including a light emitting layer are formed on the first substrate.<u style="single">Contact layer</u>And the process of forming in order,<u style="single">Partially etching from the surface of the contact layer to reach the semiconductor layer to form undulations in a shape that has entered the semiconductor layer from the surface of the contact layer.</u>Process and<u style="single">On the contact layer so as to cover the undulations</u>A step of forming the first metal layer, a step of joining the second metal layer formed on the second substrate together with the second substrate to the first metal layer, and the second metal layer. The present invention provides a method for manufacturing a semiconductor light emitting element, which comprises a step of removing the first substrate after joining the first metal layer to the first metal layer.</p>
<p> According to the present invention, there is provided a semiconductor light emitting device, a manufacturing method thereof, and a semiconductor light emitting device capable of improving the light extraction efficiency and increasing the brightness.</p>
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
[First Embodiment] FIG. 1 is a schematic view illustrating a cross-sectional structure of a main part of the semiconductor light emitting device 11 according to the first embodiment of the present invention. FIG. 2 is a schematic view illustrating the upper surface structure of the main part of the semiconductor light emitting device 11.
The semiconductor light emitting device 11 according to the present embodiment has a structure in which a reflective layer 25, a contact layer 12, and a semiconductor layer 6 including a light emitting layer 8 are laminated on a substrate 16. The first main surface (upper surface) of the semiconductor layer 6 is a light extraction surface, on which the first electrode 22 is provided via the contact layer 4. A second electrode 20 is provided on the back surface of the substrate 16.
As shown in FIG. 3, the semiconductor layer 6 is, for example, a laminate of semiconductors including a clad layer 7, a light emitting layer (active layer) 8, a clad layer 9, and a current diffusion layer 10. The clad layer 7, the light emitting layer 8, the clad layer 9, and the current diffusion layer 10 are laminated on the contact layer 12 in this order. The light emitting layer 8 is sandwiched between clad layers 7 and 9 having a bandgap larger than this. One of the clad layers 7 and 9 is a first conductive type semiconductor, and the other is a second conductive type semiconductor.
In this specific example, for example, the clad layer 7 is composed of p-type InAlP and InGaAlP, and the clad layer 9 is composed of n-type InAlP and InGaAlP. The light emitting layer 8 has, for example, an InGaP / InGaAlP multiple quantum well structure. The current diffusion layer 10 is made of, for example, an n-type GaAs.
Alternatively, the clad layer 7 may be composed of p-type AlGaN, the light emitting layer 8 may be composed of an AlGaN / AlInGaN multiple quantum well structure, the clad layer 9 may be composed of n-type AlGaN, and the current diffusion layer 10 may be composed of n-type GaN. Of course, the material of each layer is not limited to those listed above, and other semiconductor materials may be used. Further, the configuration of the semiconductor layer 6 is not limited to the above configuration, and may be, for example, a configuration without the current diffusion layer 10.
Since good ohmic contact cannot be obtained by directly contacting the semiconductor layer 6 and the reflective layer 25 made of metal, the purpose is to reduce the resistance between the semiconductor layer 6 and the reflective layer 25. A contact layer 12 is provided. That is, the contact layer 12 is in contact with the second main surface provided on the opposite side of the first main surface (light extraction surface) of the semiconductor layer 6. It is desirable that the contact layer 12 is made of a semiconductor having a smaller bandgap than the semiconductor forming the second main surface of the semiconductor layer 6. For example, when the clad layer 7 is p-type InAlP or InGaAlP, for example, p-type GaAs is used as the contact layer 12. Alternatively, when the clad layer 7 is a p-type AlGaN, for example, a p-type GaN is used as the contact layer 12.
Then, in the contact layer 12, the surface opposite to the surface of the semiconductor layer 6 in contact with the second main surface is roughened. This roughening is performed at least at the interface between the contact layer 12 and the reflective layer 25 facing the first electrode 22. This roughening is performed, for example, by a method of wet etching or dry etching the surface of the contact layer 12 to be roughened. FIG. 4 is an electron microscope image of a rough surface portion obtained by dry etching the surface of the contact layer 12 made of GaAs under the conditions described later.
A first metal layer 14 is formed on the roughened surface of the contact layer 12. The first metal layer 14 is formed so as to cover the unevenness of the roughened portion. As a result, irregularities (undulations) are formed at the interface between the contact layer 12 and the first metal layer 14. The first metal layer 14 is made of, for example, a metal material (including an alloy) containing Au, and is formed by a sputtering method, a vacuum vapor deposition method, or the like.
FIGS. 5 to 7 are enlarged cross-sectional views schematically illustrating a part of the interface between the contact layer 12 and the first metal layer 14, and each has three modes in which the degree of roughening of the contact layer 12 is different. Represents. FIG. 5 shows an embodiment in which the etching depth performed from the surface side of the contact layer 12 does not reach the semiconductor layer 6 and the contact layer 12 remains on the second main surface of the semiconductor layer 6 over the entire surface. .. FIG. 6 shows a mode in which the contact layer 12 is partially removed over the entire thickness direction by the etching. The contact layer 12 is left in an island shape on the second main surface of the semiconductor layer 6. The second main surface of the semiconductor layer 6 is not etched, so that the first metal layer 14 does not penetrate into the semiconductor layer 6. In FIG. 7, the contact layer 12 is partially (island-shaped) left as in FIG. 6, and the second main surface of the semiconductor layer 6 is also partially etched to form the first metal layer 14. Represents an aspect in which is formed by partially penetrating into the semiconductor layer 6. In any of the above three modes, unevenness is formed at the interface between the contact layer 12 and the first metal layer 14. Further, the structure may be a mixture of the above three aspects.
In the first metal layer 14, the surface opposite to the interface with the contact layer 12 is joined to the second metal layer 18. The second metal layer 18 is made of, for example, a metal material (including an alloy) containing Au. As will be described later, the second metal layer 18 supported on the substrate 16 is heated in a state of being pressed against the first metal layer 14, and the first and second metal layers 14 and 18 are solid-phased. Diffusion bonding is performed. The reflective layer 25 is composed of the integrated first metal layer 14 and the second metal layer 18. The reflective layer 25 has reflectivity to the light emitted from the light emitting layer 8.
The first main surface (upper surface) of the semiconductor layer 6 is a light extraction surface to the outside of the element, and the first electrode 22 is provided at substantially the center of this surface via the contact layer 4. The first electrode 22 is a bonding pad to which a wire for connecting to an external circuit (not shown) is connected. As shown in FIG. 2, the planar shape of the contact layer 4 and the first electrode 22 has, for example, a circular shape, but is not limited to this and may be a square shape or the like.
The first electrode 22 is made of a metal (including an alloy). The contact layer 4 plays a role of reducing the resistance between the first electrode 22 and the semiconductor layer 6. For example, when the semiconductor layer 6 is made of an InGaAlP-based material, GaAs may be used as the contact layer 4. it can. A second electrode 20 made of metal (including alloy) is formed on the entire back surface of the substrate 16.
The substrate 16 has conductivity in order to ensure continuity between the electrodes 22 and 20. In this specific example, for example, a silicon substrate that is inexpensive and easy to process is used. If the mechanical strength of the laminate including the semiconductor layer 6, the contact layer 12, and the reflective layer 25 is sufficient, the substrate 16 may be omitted.
In the semiconductor light emitting device 11 configured as described above, the thickness (height) of the portion excluding the first electrode 22 and the contact layer 4 is, for example, about 100 to 300 micrometers. The lateral dimension of the semiconductor light emitting device 11 is, for example, about 200 to 300 micrometers. The diameter of the first electrode 22 and the contact layer 4 is, for example, about 50 to 100 micrometers.
When a current is injected into the light emitting layer 8 via both electrodes 22 and 20 in the semiconductor light emitting device 11, recombination of electrons and holes occurs and light is emitted from the light emitting layer 8. The light emitted from the light emitting layer 8 toward the light extraction surface (first main surface) of the semiconductor layer 6 is extracted from the light extraction surface of the semiconductor layer 6 to the outside of the device. The light emitted from the light emitting layer 8 toward the surface opposite to the light extraction surface (second main surface) is transmitted through the contact layer 12 having translucency to this light, and is transmitted to the contact layer. It is reflected at the interface between 12 and the reflective layer 25 (first metal layer 14). The reflected light passes through the contact layer 12 and the semiconductor layer 6 and is taken out from the light extraction surface of the semiconductor layer 6 to the outside of the device.
Then, in this specific example, due to the roughening of the contact layer 12, the interface between the reflective layer 25 (first metal layer 14) and the contact layer 12, which is the surface on the second main surface side of the semiconductor layer 6, is uneven. Is formed, the light emitted from the light emitting layer 8 to the second main surface side is scattered and reflected (diffusely reflected) at the interface between the contact layer 12 and the reflection layer 25. That is, since the reflected light at the interface changes its traveling direction in various directions, the ratio of taking an optical path that repeats total reflection in the element becomes small, and after being reflected at the interface, it passes through the light extraction surface. You can have more light. Further, for example, the light emitted downward (in the direction of the substrate 16) from the lower portion of the electrode 22 in the light emitting layer 8 is scattered laterally or diagonally due to the unevenness of the interface between the contact layer 12 and the reflective layer 25. As a result, it is possible to reduce the ratio of reflection in the direction of the electrode 22 serving as a light-shielding body and increase the ratio of taking out to the outside. As a result, the efficiency of extracting light to the outside of the element can be improved, and the brightness of the semiconductor light emitting element 11 can be increased.
FIG. 8 is a graph showing the relationship between the degree of light scattering at the interface and the amount of light extracted to the outside of the device.
The vertical axis represents the amount of light extracted to the outside of the device. The unit is an arbitrary unit, and the light extraction amount when there is no scattering due to reflection at the interface is used as a reference (1.0), and represents the relative magnitude of the light extraction amount with respect to the reference (1.0).
The horizontal axis represents the degree of light scattering at the interface. This will be described with reference to FIG. FIG. 9 schematically shows how the incident light L1 is reflected as reflected light (scattered light) L2 at the interface a between the contact layer and the reflective layer. The angle θ represents the spread angle of the scattered light L2 with respect to the central axis b of the spread of the scattered light L2, and this is taken as the horizontal axis in the graph of FIG. The light intensity distribution of the scattered light L2 is a Gaussian distribution having a peak on the central axis b.
From the results shown in FIG. 8, the amount of light extracted is larger when there is scattering reflection than when there is no scattering reflection at the above interface (θ = 0 °), and as the degree of scattering increases (). (As the magnitude of the angle θ increases), the amount of light extracted increases.
Next, an example of a method for manufacturing the semiconductor light emitting device 11 according to the present embodiment will be described. 10 to 15 are process cross-sectional views illustrating a main part of the manufacturing process of the semiconductor light emitting device 11.
First, as shown in FIG. 10, the contact layer 4, the semiconductor layer 6, and the contact layer 12 are epitaxially grown on the first substrate 2 in this order. As the first substrate 2, one suitable for good epitaxial growth of each of the above layers is used. For example, in the case of an InGaAlP-based light emitting device, GaAs can be used. Further, in the case of a GaN-based light emitting device, for example, sapphire or SiC can be used as the first substrate 2.
Next, for example, the surface of the contact layer 12 made of GaAs is roughened by etching by the RIE (Reactive Ion Etching) method (Fig. 11). An example of various conditions of this etching is shown below.
Etching gas: BCl<sub>3</sub> Applied high frequency power: 300 [W] Atmospheric pressure: 66.7 [mPa] Temperature: Room temperature (normal temperature) Etching time: 10 minutes The electron microscope image of FIG. 4 described above shows the rough surface of the contact layer 12 made of GaAs obtained as a result of etching under this condition.
For example, in the case of an InGaAlP-based light emitting device, if GaAs is used as the contact layer 12, ohmic contact with the semiconductor layer 6 and the reflection layer 25 can be easily obtained. Here, as a method of roughening the contact layer 12 made of GaAs into an uneven surface as illustrated in FIGS. 5 to 7, a method of laminating a layer to which indium (In) is added on the contact layer 12 and then etching is used. is there.
For example, in the process shown in FIG. 10, when an InGaAlP layer is grown on the contact layer (GaAs layer) 12 by about 100 nanometers and then etched under the above conditions, it is illustrated in FIGS. 5 to 7. It is possible to more reliably realize the roughening of the uneven surface as described above. It is presumed that this is because the indium concentration is modulated or segregated during etching, and the portion having a high indium concentration acts as a fine mask for the underlying GaAs.
After the roughening of the contact layer 12 as described above, the first metal layer 14 is formed so as to cover the roughened surface of the contact layer 12, as shown in FIG. The first metal layer 14 is made of, for example, a metal material (including an alloy) containing Au, and is formed by a sputtering method or a vacuum vapor deposition method. The thickness of the first metal layer 14 is, for example, about 1 micrometer. The interface between the contact layer 12 and the first metal layer 14 is an interface having irregularities, reflecting the rough surface shape of the contact layer 12.
Next, as shown in FIG. 13, the first laminate 51 obtained up to the above step and the second metal layer 18 and the second electrode 20 are provided on both sides of the second substrate 16, respectively. Is thermocompression-bonded to the second laminated body 52 that has formed the above. The second metal layer 18 is made of, for example, a metal material (including an alloy) containing Au, and is formed by a sputtering method or a vacuum vapor deposition method. The thickness of the second metal layer 18 is, for example, about 1 micrometer.
The second electrode 20 is made of a metallic material (including an alloy). Further, at this stage, the second metal layer 18 is formed only on one surface of the second substrate 16, and the second electrode 20 is the second electrode 20 after the two laminates 51 and 52 are crimped. It may be formed on the other surface of the substrate 16.
By heating the first metal layer 14 and the second metal layer 18 in a state of being in pressure contact with each other, both metal layers 14 and 18 are solid-phase diffusion bonded. For example, the heating temperature is about 400 ° C and 9.80665 × 10 for a 2-inch wafer.<sup>2</sup>[N] or more force is applied in the thickness direction of both laminates 51 and 52.
Next, as shown in FIG. 14, the first substrate 2 used for epitaxial growth of the semiconductor layer 6 and the like is removed by, for example, etching. As a result, a structure in which the reflective layer 25, the contact layer 12, the semiconductor layer 6, and the contact layer 4 are laminated on a conductive, for example, silicon substrate 16 can be obtained.
Next, as shown in FIG. 15, the first electrode (bonding pad) 22 is selectively formed at substantially the center on the contact layer 4. The first electrode 22 is formed by a sputtering method, a vacuum vapor deposition method, or the like . After that, the contact layer 4 other than under the first electrode 22 is removed by etching to obtain the semiconductor light emitting device 11 shown in FIGS. 1 and 2. Further, if there is no problem in handleability and mechanical strength of the semiconductor layer 6 or the like, the first substrate 2 may be removed before the crimping process shown in FIG.
[Second Embodiment] Next, a second embodiment of the present invention will be described. The same elements as those in the first embodiment are designated by the same reference numerals, and detailed description thereof will be omitted. FIG. 16 is a schematic view illustrating a cross-sectional structure of a main part of the semiconductor light emitting device 31 according to the second embodiment of the present invention.
The semiconductor light emitting device 31 according to the present embodiment is different from the semiconductor light emitting device 11 according to the first embodiment in that the transparent electrode layer 33 is provided under the contact layer 32.
The contact layer 32 is in contact with a second main surface provided on the opposite side of the first main surface (light extraction surface) of the semiconductor layer 6. It is desirable that the contact layer 32 is made of a semiconductor having a smaller bandgap than the semiconductor forming the second main surface (main surface opposite to the first main surface) of the adjacent semiconductor layer 6. For example, when the clad layer 7 is p-type InAlP or InGaAlP, p-type GaAs can be used as the contact layer 32. Alternatively, when the clad layer 7 is p-type AlGaN, p-type GaN can be used as the contact layer 32.
The transparent electrode layer 33 is provided in contact with the contact layer 32. The transparent electrode layer 33 has conductivity and translucency to the light emitted from the light emitting layer 8. For example, as the transparent electrode layer 33, metal oxides such as ITO (Indium Tin Oxide), IZO (Indium Zinc Oxide) and zinc oxide, metal nitrides such as titanium nitride, and other metal compounds can be used. In the transparent electrode layer 33, the surface opposite to the surface in contact with the contact layer 32 is roughened. This roughening is performed by etching the entire surface of the transparent electrode layer 33 to be roughened.
A first metal layer 14 is formed on the roughened surface of the transparent electrode layer 33. The first metal layer 14 is formed so as to cover the unevenness of the roughened portion. As a result, irregularities (undulations) are formed at the interface between the transparent electrode layer 33 and the first metal layer 14. The first metal layer 14 is made of, for example, a metal material (including an alloy) containing Au, and is formed by a sputtering method, a vacuum vapor deposition method, or the like.
As described above, also in this specific example, since the interface between the reflective layer 25 (first metal layer 14) and the transparent electrode layer 33, which is the surface on the transparent electrode layer 33 side, is formed with irregularities, the light emitting layer is formed. The light emitted from the 8 to the second main surface side is scattered and reflected (diffuse reflection) at the interface between the transparent electrode layer 33 and the reflection layer 25. That is, since the reflected light at the interface changes its traveling direction in various directions, the ratio of taking an optical path that repeats total reflection in the element becomes small, and after being reflected at the interface, it passes through the light extraction surface. You can have more light. Further, for example, the light emitted downward (in the direction of the substrate 16) from the lower portion of the electrode 22 in the light emitting layer 8 is scattered laterally or diagonally by the unevenness of the interface between the transparent electrode layer 33 and the reflective layer 25. By doing so, it is possible to reduce the ratio of reflection in the direction of the electrode 22 serving as a light-shielding body and increase the ratio of taking out to the outside. As a result, the efficiency of extracting light to the outside of the element can be improved, and the brightness of the semiconductor light emitting element 31 can be increased.
Further, in this specific example, providing the transparent electrode layer 33 under the contact layer 32 has the following advantages.
As the contact layer 32, a semiconductor such as GaAs is used in order to secure good ohmic contact with the semiconductor layer 6. However, since GaAs easily absorbs the light emitted from the light emitting layer 8 of the InGaAlP system, for example, the contact layer 32 should be thin, but when the contact layer 32 is thin, excessive etching of the contact layer 32 is likely to occur. This leads to an increase in the forward voltage of the device.
On the other hand, in this specific example, since the contact layer 32 is not etched, even if the contact layer 32 is formed thin, excessive removal that leads to an increase in the forward voltage cannot occur. By thinning the contact layer 32, light absorption in the contact layer 32 can be suppressed. For example, in the semiconductor light emitting device 11 according to the first embodiment, the contact layer 12 made of GaAs or the like is about 50 nanometers, whereas the thickness of the contact layer 32 made of GaAs or the like is up to about 20 nanometers. Can be thinned.
Since the transparent electrode layer 33 to be etched is made of ITO or the like having a higher light transmittance than a translucent semiconductor such as GaAs, it can be formed relatively thick. For example, the transparent electrode layer 33 is 100 to 500 nanometers. Further, since ITO does not form an alloy layer between the contact layer 32 and the first metal layer 14, it is possible to prevent a decrease in light transmittance due to the alloy layer.
Next, an example of a method for manufacturing the semiconductor light emitting device 31 according to the present embodiment will be described. 17 to 22 are process cross-sectional views illustrating a main part of the manufacturing process of the semiconductor light emitting device 31.
First, as shown in FIG. 17, the contact layer 4, the semiconductor layer 6, and the contact layer 32 are epitaxially grown on the first substrate 2 in this order.
Next, on the contact layer 32, a layer made of, for example, ITO (Indium Tin Oxide) is formed as the transparent electrode layer 33. The transparent electrode layer 33 made of this ITO is formed by, for example, a DC sputtering method. At the time of this sputtering, the film-deposited body (a laminate consisting of the first substrate 2, the contact layer 4, the semiconductor layer 6, and the contact layer 32) was heated to 250 [° C]. The DC power was 200 [W] (discharge voltage 250 [V], discharge current 0.82 [A]).
Under the above conditions, the film thickness is 200 nanometers and the resistivity is 1.6 x 10.<sup>-4</sup>[Ωcm], a transparent electrode layer 33 made of ITO having a transmittance of 95% or more for the light emitted from the light emitting layer 8 was obtained.
Next, the surface of the transparent electrode layer 33 is roughened by wet etching (FIG. 18). For example, the etching solution used was a mixture of 35% concentrated hydrochloric acid and water at a ratio of 1: 1. The temperature was 45 [° C] and the etching time was 2 minutes.
After roughening the transparent electrode layer 33 as described above, the first metal layer 14 is formed so as to cover the roughened surface of the transparent electrode layer 33 as shown in FIG. The first metal layer 14 is made of, for example, a metal material (including an alloy) containing Au, and is formed by a sputtering method or a vacuum vapor deposition method. The interface between the transparent electrode layer 33 and the first metal layer 14 is an interface having irregularities, reflecting the rough surface shape of the transparent electrode layer 33.
Next, as shown in FIG. 20, the first laminate 61 obtained up to the above step, and the second metal layer 18 and the second electrode 20 on both sides of the second substrate 16, respectively. Is thermocompression-bonded to the second laminated body 52 that has formed the above. The second metal layer 18 is made of, for example, a metal material (including an alloy) containing Au, and is formed by a sputtering method or a vacuum vapor deposition method.
The second electrode 20 is made of a metallic material (including an alloy). Further, at this stage, the second metal layer 18 is formed only on one surface of the second substrate 16, and the second electrode 20 is the second electrode 20 after the two laminates 61 and 52 are crimped. It may be formed on the other surface of the substrate 16.
By heating the first metal layer 14 and the second metal layer 18 in a state of being in pressure contact with each other, both metal layers 14 and 18 are solid-phase diffusion bonded. For example, the heating temperature is about 400 ° C and 9.80665 × 10 for a 2-inch wafer.<sup>2</sup>[N] or more force is applied in the thickness direction of both laminates 61 and 52.
Next, as shown in FIG. 21, the first substrate 2 used for epitaxial growth of the semiconductor layer 6 and the like is removed by, for example, etching. As a result, a structure in which the reflective layer 25, the transparent electrode layer 33, the contact layer 32, the semiconductor layer 6, and the contact layer 4 are laminated on a conductive, for example, silicon substrate 16 can be obtained.
Next, as shown in FIG. 22, the first electrode (bonding pad) 22 is selectively formed at substantially the center on the contact layer 4. The first electrode 22 is formed by a sputtering method, a vacuum vapor deposition method, or the like. After that, the contact layer 4 other than under the first electrode 22 is removed by etching to obtain the semiconductor light emitting device 31 shown in FIG. Further, if there is no problem in handleability and mechanical strength of the semiconductor layer 6 or the like, the first substrate 2 may be removed before the crimping process shown in FIG.
[Third Embodiment] Next, a third embodiment of the present invention will be described. The same elements as those in the first and second embodiments are designated by the same reference numerals, and detailed description thereof will be omitted. FIG. 23 is a schematic view illustrating a cross-sectional structure of a main part of the semiconductor light emitting device 41 according to the third embodiment of the present invention.
In the semiconductor light emitting device 41 according to the third embodiment, the second electrode 43 is provided on the front surface side of the substrate 16 instead of the back surface side. That is, the point that the second metal layer 18 is formed on the entire surface of the substrate 16 is the same as that of the first and second embodiments, but the second metal layer 18 is laminated on the second metal layer 18. The metal layer 14, the contact layer 12, and the semiconductor layer 6 of 1 are not provided over the entire surface of the second metal layer 18. A second electrode 43 is provided on the second metal layer 18 on the side of the portion where the laminate is provided. In this case, the substrate 16 does not have to have conductivity.
[Fourth Embodiment] Next, as a fourth embodiment of the present invention, an example of application to a semiconductor light emitting device equipped with a semiconductor light emitting element will be described. That is, the semiconductor light emitting devices having high light extraction efficiency described above with respect to the first to third embodiments (these semiconductor light emitting devices are collectively represented by reference numeral 101 in the following description) are mounted on a mounting member such as a lead frame or a substrate. By doing so, a high-brightness semiconductor light emitting device can be obtained.
FIG. 24 is a schematic cross-sectional view showing a specific example of the semiconductor light emitting device of the fourth embodiment. The semiconductor light emitting device 100 of this specific example is a resin-sealed semiconductor light emitting device called a "bullet type" or the like.
A cup portion 106 is provided on the upper portion of the lead 102, and the semiconductor light emitting element 101 is mounted on the bottom surface of the cup portion 106 with a conductive paste or the like. The electrode (bonding pad) on the upper surface side of the semiconductor light emitting device 101 and the other lead 103 are electrically connected by a wire 104. The inner wall surface 106a of the cup portion 106 constitutes a light reflecting surface, and can reflect the light emitted from the semiconductor light emitting element 101 and take it out upward.
The cup portion 106 is sealed with a light-transmitting resin 105. The light extraction surface 105a of the resin 105 forms a condensing curved surface, and the light emitted from the semiconductor light emitting device 101 can be appropriately condensed so that a predetermined light distribution can be obtained.
FIG. 25 is a schematic cross-sectional view showing another specific example of the semiconductor light emitting device. The semiconductor light emitting device 110 of this specific example is called a "surface mount type" or the like, and the semiconductor light emitting element 101 is mounted on the lead 112 via a conductive paste or the like, and the semiconductor light emitting device 101 is mounted. The electrode (bonding pad) on the upper surface side is electrically connected to another lead 113 by a wire 104. The leads 112 and 113 are molded in the first resin 116, and the semiconductor light emitting element 101 is sealed by the second resin 115 having translucency. The light reflectivity of the first resin 116 is enhanced by, for example, dispersing fine particles of titanium oxide or the like. Then, the inner wall surface 116a acts as a light reflecting surface, and guides the light emitted from the semiconductor light emitting element 101 to the outside.
The embodiments of the present invention have been described above with reference to specific examples. However, the present invention is not limited thereto, and various modifications can be made based on the technical idea of the present invention.
The method for roughening the contact layer and the transparent electrode layer is not limited to the above-mentioned methods and conditions. For example, a hydrofluoric acid-based etching solution may be used for etching the transparent electrode layer 33 made of ITO. Alternatively, the surface of the transparent electrode layer 33 made of ITO may be roughened by dry etching, not limited to wet etching. Further, the roughening of the contact layer 12 made of GaAs or the like is not limited to dry etching, and may be performed by, for example, wet etching using a phosphoric acid-based etching solution.
<figref num="1">It is a schematic diagram which illustrates the cross-sectional structure of the main part of the semiconductor light emitting device which concerns on 1st Embodiment of this invention.</figref><figref num="2">It is a schematic diagram which illustrates the structure of the upper surface of the main part of the semiconductor light emitting device.</figref><figref num="3">It is a schematic diagram which illustrates the cross-sectional structure of the semiconductor layer including a light emitting layer.</figref><figref num="4">It is an electron microscope image of the surface of a roughened GaAs layer.</figref><figref num="5">It is an enlarged cross-sectional view which schematically exemplifies the interface between a contact layer and a reflection layer provided with unevenness, and shows the aspect in which the contact layer remains over the whole surface of the 2nd main surface of a semiconductor layer.</figref><figref num="6">It is a schematic diagram similar to FIG. 5, and shows a mode in which the contact layer is partially left and a part of the reflective layer does not extend into the semiconductor layer.</figref><figref num="7">It is a schematic diagram similar to FIGS. 5 and 6, and shows a mode in which the contact layer is partially left and a part of the reflective layer extends into the semiconductor layer.</figref><figref num="8">It is a graph which shows the relationship between the degree of light scattering at the interface between a contact layer and a reflection layer, and the amount of light withdrawal to the outside of an element.</figref><figref num="9">It is a schematic diagram for demonstrating the angle of the horizontal axis in the graph of FIG.</figref><figref num="10">It is a process sectional view which illustrates the main part of the manufacturing process of the semiconductor light emitting element which concerns on 1st Embodiment of this invention.</figref><figref num="11">It is a process sectional view following FIG.</figref><figref num="12">It is a process sectional view following FIG.</figref><figref num="13">It is a process sectional view following FIG.</figref><figref num="14">It is a process sectional view following FIG.</figref><figref num="15">It is a process sectional view following FIG.</figref><figref num="16">It is a schematic diagram which illustrates the cross-sectional structure of the main part of the semiconductor light emitting device which concerns on 2nd Embodiment of this invention.</figref><figref num="17">It is a process sectional view which illustrates the main part of the manufacturing process of the semiconductor light emitting element which concerns on 2nd Embodiment of this invention.</figref><figref num="18">It is a process sectional view following FIG.</figref><figref num="19">It is a process sectional view following FIG.</figref><figref num="20">It is a process sectional view following FIG.</figref><figref num="21">It is a process sectional view following FIG.</figref><figref num="22">It is a process sectional view following FIG.</figref><figref num="23">It is a schematic diagram which illustrates the cross-sectional structure of the main part of the semiconductor light emitting element which concerns on 3rd Embodiment of this invention.</figref><figref num="24">It is a schematic diagram which illustrates the cross-sectional structure of the main part of the semiconductor light emitting device which concerns on 4th Embodiment of this invention.</figref><figref num="25">It is a schematic diagram which illustrates the cross-sectional structure of the main part of another semiconductor light emitting device which concerns on 4th Embodiment of this invention.</figref>
Code description
2 1st substrate, 4, 42 contact layer, 6 semiconductor layer, 7 clad layer, 8 light emitting layer, 9 clad layer, 10 current diffusion layer, 11, 31, 41 semiconductor light emitting element, 12 contact layer, 14 first Metal layer, 16 second substrate, 18 second metal layer, 20, 43 second electrode, 22 first electrode, 25 reflective layer, 32 contact layer, 33 transparent electrode layer, 51, 61 first laminate Body, 52 second laminate
25 sheets
Sheet 1 Sheet 2 Sheet 3 Sheet 4 Sheet 5 Sheet 6 Sheet 7 Sheet 8 Sheet 9 Sheet 10 Sheet 11 Sheet 12 Sheet 13 Sheet 14 Sheet 15 Sheet 16 Sheet 17 Sheet 18 Sheet 19 Sheet 20 Sheet 21 Sheet 22 Sheet 23 Sheet 24 Sheet 25
Every citation, both ways
| Document | Relation | Office |
|---|---|---|
| WO03065464A1 | Cites | World Intellectual Property Organization (WIPO) |
| JP2005252222A | Cites | Japan |
| JP2005259832A | Cites | Japan |
| JP2005236304A | Cites | Japan |
| JP2005259910A | Cites | Japan |
| JP2006100500A | Cites | Japan |
| JP2005347700A | Cites | Japan |
| JP2005353809A | Cites | Japan |
6 members in 3 offices
Members6
| Document | Office | Kind | |
|---|---|---|---|
| US2007096116A1 | United States of America | A1 | |
| JP2007123573A | Japan | A | |
| TW200731570A | Taiwan Province of China | A | |
| US7501665B2 | United States of America | B2 | |
| TWI315588B | Taiwan Province of China | B | |
| JP5032017B2This record | Japan | B2 |
13 legal events, as the office reported them to INPADOC
Over the term
Point at a mark for the eventEvents
| Event | Code | |
|---|---|---|
| Cancellation because of completion of termEXPY | EXPY | |
| Renewal fee payment (event date is renewal date of database)FPAY | FPAY | |
| Written notification of patent or utility model registrationJAPANESE INTERMEDIATE CODE: R151R151 | R151 | |
| First payment of annual fees (during grant procedure)JAPANESE INTERMEDIATE CODE: A61A61 | A61 | |
| Written decision to grant a patent or to grant a registration (utility model)JAPANESE INTERMEDIATE CODE: A01A01 | A01 | |
| Written decision to grant a patent or to grant a registration (utility model)JAPANESE INTERMEDIATE CODE: A01A01 | A01 | |
| Decision of grant or rejection writtenTRDD | TRDD | |
| Request for written amendment filedJAPANESE INTERMEDIATE CODE: A523A521 | A521 | |
| Notification of reasons for refusalJAPANESE INTERMEDIATE CODE: A131A131 | A131 | |
| Request for written amendment filedJAPANESE INTERMEDIATE CODE: A523A521 | A521 | |
| Notification of reasons for refusalJAPANESE INTERMEDIATE CODE: A131A131 | A131 | |
| Report on retrievalJAPANESE INTERMEDIATE CODE: A971007A977 | A977 | |
| Written request for application examinationJAPANESE INTERMEDIATE CODE: A621A621 | A621 |
Numbers
- Publication
- 5032017
- Application
- 314056
Titles2
- Japanese
- 半導体発光素子及びその製造方法並びに半導体発光装置
- English
- Semiconductor light emitting element, its manufacturing method, and semiconductor light emitting device
Classification
- CPC, 7
- H10H20/814
- H10H20/018
- H10H20/82
- H10W72/5363
- H10W72/07554
- H10W72/547
- H10W90/756
- IPC, 4
- H01L33 10
- H01L33 22
- H01L33 32
- H10D62 80
