Method of manufacturing semiconductor device, film deposition method, and film deposition apparatus

The present invention relates to a method for manufacturing a semiconductor device having a circuit composed of a thin film transistor (hereinafter referred to as TFT) using a semiconductor film. The present invention also relates to a film forming apparatus using a plasma CVD method used in a step of forming a thin film when producing a semiconductor apparatus. Further, the present invention relates to a film forming method using the film forming apparatus. For example, the present invention relates to a photoelectric conversion device represented by a solar cell or a sensor, an electro-optical device represented by a liquid crystal display panel, or an electronic device equipped with a light emitting device as a component.

In the present specification, the semiconductor device refers to all devices that can function by utilizing the semiconductor characteristics, and the electro-optical device, the light emitting device, the semiconductor circuit, and the electronic device are all semiconductor devices.

With the miniaturization of semiconductor devices, high precision is required for each process. In the semiconductor manufacturing process, a reaction-forming film obtained by reacting a material gas by various methods (plasma, heat, light, etc.) is deposited on a substrate to be processed arranged in a chamber of a film forming apparatus. In particular, suppressing particles generated in the film forming apparatus is a big issue, and it is important to keep the inside of the chamber clean for process stabilization.

The applicant of the present invention discloses in Patent Document 1 a substrate processing apparatus that continuously performs processing while maintaining airtightness when performing a plurality of processing such as forming a thin film on a substrate.

Further, the film forming apparatus using the plasma CVD method is composed of a plurality of members, and fluid devices such as valves and pumps are connected to the film forming apparatus, and the shaft seal portion and the pipe flange joint portion have an airtight structure. A sealing material or a sealing member is used to prevent gas flow from the outside.

An O-ring made of rubber is used to prevent outside air from entering the chamber and to keep the pressure constant. There is also a hollow metal O-ring in which a metal pipe is cut to a certain length, formed into a ring shape, and both ends are welded.

<patcit num="1"><text>Japanese Unexamined Patent Publication No. 7-12621</text></patcit>

<p>Even if an O-ring or hollow O-ring is used, for example, the amorphous silicon film formed by using only silane gas and hydrogen gas and using a plasma CVD device contains almost no oxygen or nitrogen in the material gas. However, SIMS measurements may detect trace amounts of oxygen and nitrogen. From this, it cannot be said that the conventional plasma CVD apparatus has sufficient measures against leakage.</p><p>Oxygen and nitrogen are elements that form a part of the amorphous semiconductor layer into an n-type, and these elements increase the defect density in the amorphous semiconductor layer and reduce the field effect mobility. Become. Furthermore, oxygen and nitrogen contained in the membrane may be one of the factors that cause variations in the electrical characteristics of the TFT.</p><p>In order to reduce oxygen and nitrogen contained in the membrane, it is conceivable to further increase the degree of vacuum in the chamber, but if the sealing material or the sealing member is the same, if the degree of vacuum in the chamber is increased. The higher the value, the greater the amount of leakage from the outside of the chamber into the chamber.</p><p>In particular, if the film forming process is performed under a film forming condition with a long film forming time, the amount of oxygen and nitrogen entering the chamber will also increase. For example, when forming a microcrystalline silicon film, silane gas is diluted with hydrogen over 100 times to 2000 times or less to form a film, so the film formation rate is slow and it takes a long time to obtain the desired film thickness. .. In addition, oxygen inhibits crystallization and may act as a donor when incorporated into the polycrystalline silicon film, and is therefore an impurity that should be particularly reduced when forming the polycrystalline silicon film.</p><p>One of the problems of the present invention is to provide a film forming apparatus in which the amount of leakage from the outside of the chamber into the chamber is reduced. In addition, since the O-ring deteriorates over time, it needs to be replaced regularly, but the operator cannot notice the deterioration that cannot be measured by the vacuum gauge. Although deterioration can be prevented by performing replacement work frequently, such maintenance work causes a large loss in productivity and leads to a high manufacturing cost because the production line is temporarily stopped. Therefore, it is also an issue to provide a film forming apparatus capable of forming a film without significantly deteriorating the film quality even if a seal defect occurs in the film forming apparatus due to deterioration with time.</p><p>Another issue is to provide a method for forming a semiconductor film in which the oxygen concentration and the nitrogen concentration in the film are reduced.</p><p>Another issue is to provide a method for manufacturing a semiconductor device using a semiconductor film having a reduced oxygen concentration and nitrogen concentration.</p>

<p>Even if a leak occurs from the outside of the chamber to the inside of the chamber, the oxygen and nitrogen contained in the atmosphere surrounding the outer wall of the chamber are reduced as much as possible, and by filling with a rare gas or hydrogen, the oxygen concentration and nitrogen concentration in the atmosphere are 100 minutes. Keep the inside of the chamber cleaner by reducing the amount to 1 or less, preferably 1/1000 or less.</p><p>Examples of the rare gas include helium, neon, argon, xenon, krypton and the like, and among them, argon, which is inexpensive, is preferably used.</p><p>In order to make the atmosphere surrounding the outer wall of the chamber a rare gas, hydrogen, or a mixed gas of a rare gas and hydrogen, a highly airtight space is provided adjacent to the outside of the chamber. The space provided adjacent to the outside of the chamber is once evacuated and then filled with a rare gas or hydrogen. By providing this space, the distance between the seal part of the chamber and the atmosphere is increased to isolate it, and the atmospheric gas (oxygen, nitrogen, H)₂O, COx, NOx, etc.) can be prevented from entering the chamber. Even if a rare gas or hydrogen invades the chamber, there is almost no change in the electrical characteristics of the semiconductor film to be formed, and there is no problem.</p><p>Furthermore, by supplying a rare gas or hydrogen to the space between the chamber and the atmosphere and making that space a positive pressure, it is possible to prevent atmospheric components from entering the space from the atmospheric atmosphere, which is the atmospheric pressure, and enter the chamber. It is also possible to effectively prevent the invasion of atmospheric gas.</p><p>According to the present invention, the residual oxygen concentration and the residual nitrogen concentration in the chamber can be reduced regardless of the degree of vacuum.</p><p>In order to provide a highly airtight space adjacent to the outside of the chamber, the chamber is covered with a bag, the space between the outer wall of the chamber and the inner surface of the bag is decompressed, and then rare gas or hydrogen gas is introduced into the bag. It is supplied to expand the bag body and fill it. The bag body is provided with an exhaust port connected to the exhaust means and an inflow port connected to the gas supply means.</p><p>The rare gas or hydrogen gas supplied to the space between the outer wall of the chamber and the inner surface of the bag body minimizes oxygen and nitrogen, and the oxygen concentration and nitrogen concentration contained in the gas supplied to the space are 30 ppm or less, preferably 30 ppb. The following is preferable. The gas supplied to the space can be measured by an oxygen analyzer for measuring the oxygen concentration and a nitrogen analyzer for measuring the nitrogen concentration.</p><p>Examples of the material of the bag include polyethylene resin, polypropylene resin, polyvinyl chloride resin, polyvinylidene chloride resin, cellulose acetate resin, fluorine-containing resin, polyamide resin, etc. Among them, polyamide resin having low oxygen permeability and nitrogen permeability and Fluorine-containing resin is preferable. Further, two or more kinds of films containing these resins are laminated and used to further reduce the oxygen permeability and the nitrogen permeability. Further, a film in which these resins and aluminum foil are combined, a film in which these glass fibers and resin are combined, a resin film in which fine silica powder is vapor-deposited on the surface, and the like are used.</p><p>Further, a bubble wrap may be used as the bag body, and the bubbles to be contained in the bubble wrap are not air but a rare gas or hydrogen.</p><p>The configuration of the invention relating to the film forming apparatus disclosed in the present specification is a first method of supplying a rare gas or a hydrogen gas to a bubble buffer material, a vacuum chamber surrounded by the bubble buffer material, and a gap between the bubble buffer material and the vacuum chamber. The vacuum chamber is provided with a vacuum exhaust means and a second gas supply means, has a plasma generating means in the vacuum chamber, and has surroundings inside the bubble buffer material. Is a film forming apparatus having bubbles of rare gas or hydrogen gas sealed with a resin. The resin of the bubble wrap material used is the same as the material of the bag body described above.</p><p>The outer wall of the chamber and the atmosphere can also be separated by using a bubble wrap containing a rare gas or hydrogen. By using the bubble wrap material, it is possible to prevent the device from becoming large due to the bag body. When the inside of the bag made of film is positive pressure, the bag body expands and expands, so there is no problem if there is enough space at the installation location, but if there is not enough space at the installation location, a bubble wrap is used. That is valid. The outer wall of the chamber is surrounded by bubble wrap, and rare gas or hydrogen gas is supplied to the slight gap.</p><p>Further, the bag body may be provided twice, and it is preferable to reduce the oxygen permeability and the nitrogen permeability by forming a multiple structure more than that.</p><p>In addition, even if a small amount of gas flows in from outside the chamber due to a seal failure that cannot be measured by the pressure gauge, the outside of the chamber is surrounded by an atmosphere that contains almost no oxygen or nitrogen, so the film quality should be reduced. It is possible to continuously perform uniform film formation on a plurality of substrates.</p><p>In addition, by covering the chamber into which the highly reactive special material gas is introduced with a bag, the seal part of the chamber deteriorates and silane gas etc. flows out of the chamber, or the gas outside the chamber flows back into the silane gas cylinder. However, it ignites and does not cause a fire. Therefore, by installing the bag body, it is possible to enhance the safety of the film forming apparatus using a highly reactive special material gas.</p><p>The configuration of the invention relating to the film forming apparatus disclosed in the present specification is that a bag body provided with a first vacuum exhaust means and a first gas supply means, a vacuum chamber surrounded by the bag body, and the vacuum chamber thereof. , A second vacuum exhaust means and a second gas supply means are provided, a plasma generating means is provided in the vacuum chamber, and a rare gas or hydrogen gas supplied from the first gas supply means to the inside of the bag body. This is a film forming device that separates the outer wall of the vacuum chamber from the atmosphere.</p><p>The present invention solves at least one of the above problems.</p><p> Further, a film forming method using the above-mentioned film forming apparatus is also one of the inventions, and the configuration of the invention is to create a space in which a rare gas or a hydrogen gas is introduced between the atmosphere and the outer wall of the vacuum chamber to form the outer wall of the vacuum chamber. The space is covered with a bag to separate the vacuum chamber from the atmosphere, the substrate is installed in the vacuum chamber covered with the bag, and the material gas is introduced into the vacuum chamber. This is a film forming method in which a plasma is generated to form a semiconductor film on a substrate.</p><p>The present invention solves at least one of the above problems.</p><p>In the above-mentioned film forming method, the space into which the rare gas or hydrogen gas is introduced has a positive pressure higher than the atmospheric pressure to prevent the invasion of atmospheric components into the vacuum chamber.</p><p>Further, in the above-mentioned film forming method, the gas supplied between the atmosphere and the outer wall of the vacuum chamber is preferably a high-purity gas, and the oxygen concentration and nitrogen concentration contained in the rare gas or hydrogen gas are 30 ppm or less. ..</p><p>Further, in the above film forming method, the material gas contains silane gas, and the semiconductor film formed on the substrate is a microcrystalline semiconductor film. Since the film formation rate of the microcrystalline semiconductor film is slow, it is important to prevent the invasion of atmospheric components into the vacuum chamber.</p><p>In the present specification, the microcrystalline semiconductor film is a film containing a semiconductor having an intermediate structure between amorphous and crystalline (including single crystal and polycrystalline). This semiconductor is a semiconductor having a third state that is stable in free energy, is a crystalline semiconductor having short-range order and lattice strain, and has columnar or acicular crystals having a particle size of 0.5 to 20 nm. It grows in the normal direction with respect to the substrate surface. In addition, microcrystalline semiconductors and non-single crystal semiconductors are mixed. Microcrystalline silicon, which is a typical example of microcrystalline semiconductor, has a Raman spectrum of 520.5 cm, which indicates single crystal silicon.^-1It is shifting to the lower wavenumber side. That is, 520.5 cm indicating single crystal silicon^-1And 480 cm showing amorphous silicon^-1There is a peak in the Raman spectrum of microcrystalline silicon between. It also contains at least 1 atomic% or more of hydrogen or halogen to terminate unbonded hands (dangling bonds).</p><p> Further, a method of a semiconductor device using the above-mentioned film forming apparatus is also one of the inventions, and the configuration of the invention is to form a gate electrode on a substrate having an insulating surface and to form an insulating film on the gate electrode. Then, a space into which a rare gas or hydrogen gas is introduced is provided between the atmosphere and the outer wall of the vacuum chamber in contact with the outer wall of the vacuum chamber, and the space is covered with a bag to separate the vacuum chamber from the atmosphere, and the bag is provided. A substrate provided with the insulating film is installed in the vacuum chamber covered with a body, and a material gas is introduced into the vacuum chamber to generate plasma to form a microcrystalline semiconductor film on the insulating film. Further, a buffer layer is formed on the microcrystalline semiconductor film, and the microcrystalline semiconductor film is formed by forming the first region near the interface with the buffer layer more than the second region near the interface with the insulating film. This is a method for manufacturing a semiconductor device in which the film forming conditions are changed stepwise or continuously so as to increase the speed.</p><p>The present invention solves at least one of the above problems. Note that continuous film formation conditions mean that the film formation conditions change smoothly with respect to the elapsed time, and stepwise means that the film formation conditions gradually decrease or increase with respect to the elapsed time. Point to. For example, when changing the gas flow rate as a film formation condition, if a graph showing time on the horizontal axis and gas flow rate on the vertical axis is created, the former draws a curve or straight line that rises to the right or falls to the right, and the latter draws a curve or straight line that rises to the right or rises to the right. Draw a downward-sloping stepped graph.</p><p>Further, in addition to the above semiconductor manufacturing method, a semiconductor film containing an n-type impurity element is formed on the buffer layer, a source electrode or a drain electrode is formed on the semiconductor film containing the n-type impurity element, and the n-type is formed. A semiconductor film containing an impurity element is etched to form a source region and a drain region, and a part of the buffer layer is etched and removed so that a region overlapping the source region and the drain region remains.</p><p>When plasma is generated in the vacuum chamber where the film formation process is performed, the pressure in the vacuum chamber is at least 2 × 10.^-2Torr (2.666Pa) ~ 1Torr (133.3Pa), 2 × 10 to reduce residual atmospheric gas^-2It is preferable to have a higher degree of vacuum than Torr. In addition, oxygen, nitrogen, and H in the vacuum chamber (reaction vessel) before film formation₂In order to reduce the residual atmospheric component gas such as O as much as possible, the minimum pressure reached is 1 × 10.^-10Torr ~ 1 × 10^-7Torr (approx. 1x10)^-8Pa or more 1 × 10^-5The temperature is lowered to the ultra-high vacuum (UHV) region (Pa or less), a high-purity material gas is flowed, and the substrate temperature at the time of film formation is in the range of 100 ° C or more and less than 300 ° C.</p><p>The degree of vacuum in the chamber is 10^-5When performing ultra-high vacuum exhaust higher than Pa, it is preferable to use a cryopump together, exhaust with a turbo molecular pump, and further vacuum exhaust with a cryopump.</p><p>Further, since the plasma CVD apparatus generates heat during film formation and the temperature of the outer wall of the chamber rises, a cooling means such as a water cooling mechanism is provided on the outer wall of the chamber. The bag body preferably also covers the cooling means. Further, the outer wall of the chamber may be cooled by exhausting the heated gas to the outside by continuously flowing a rare gas or a hydrogen gas inside the bag body. Further, the outer wall of the chamber may be cooled by flowing a cooled rare gas or hydrogen gas inside the bag body.</p><p>In addition to the gas introduction system and exhaust system, the plasma CVD device has seals in various places. For example, the plasma CVD equipment has a chamber configuration that allows the vacuum chamber to be opened and closed for maintenance. , The opening and closing part is airtight with a sealing material. In the present invention, at least the seal portion of the opening / closing portion is covered with a bag body.</p><p>Further, the bag body that covers the entire outer wall of the chamber is not limited to the bag body, and at least the portion where leakage may occur may be covered. For example, only the periphery of the seal portion of the member constituting the outer wall of the chamber is taped (adhesive layer and aluminum foil). A hollow portion may be provided between the tape and the outer wall, and a rare gas or hydrogen gas may flow through the hollow portion. Of course, the tape uses a material having a sufficient barrier property against oxygen and nitrogen. When covering only a part of the case as compared with the case of covering the whole, it can be performed with a small amount of gas, which is advantageous in terms of cost.</p><p>Further, according to the present invention, even if a sealing defect occurs in the sealing portion of the plasma CVD apparatus, only the rare gas or hydrogen adjacent to the sealing portion where the defect has occurred invades the vacuum chamber, and the atmospheric component causes a plasma reaction. It is possible to prevent the gas from entering the vacuum chamber. Therefore, it is possible to provide a semiconductor film having stable quality.</p><p>Further, by using the bag body, the atmospheric component inside the chamber can be made low in concentration relatively easily and at low cost, and the film quality of the obtained semiconductor film can be significantly improved. Conventionally, nitrogen is sometimes called an inert gas, and has been considered to be an element that has no effect even if a small amount of nitrogen enters the chamber. Nitrogen, one of the atmospheric components, is a gas that occupies about 80% of the atmosphere. Therefore, paying attention to the fact that it is difficult to prevent the invasion of nitrogen from various sealing portions provided in the chamber when the outer wall of the chamber is in contact with the atmosphere, especially when forming a polycrystalline semiconductor film. We have found that it is an element that we want to eliminate from the vacuum chamber as much as possible, and have devised the configuration of the present invention.</p><p>Not only the microcrystalline semiconductor film but also the film quality of semiconductor films such as amorphous semiconductor films, polycrystalline semiconductor films, and compound semiconductor films can be significantly improved.</p><p>In addition, using a portable and hermetically sealed substrate transfer container such as FOUP (Front Opening Unified Pod), the substrate is stored in the substrate transfer container while maintaining a local clean space by the substrate transfer container, and the next step is performed. It is preferable to further reduce the oxygen concentration and the nitrogen concentration in the chamber of the plasma CVD apparatus by combining the method of transporting to and the present invention. The inside of the substrate transfer container is maintained in a vacuum state, but when introducing a replacement gas into the substrate transfer container, a rare gas or hydrogen gas is used as the high-purity gas instead of nitrogen.</p><p>In the present invention, a space having a low oxygen concentration and a low nitrogen concentration is provided between the outer wall of a vacuum chamber made of stainless steel or the like and the outside air at atmospheric pressure. Although the inner wall of the chamber is mirror-finished, the outer wall of the chamber is also mirror-finished to reduce moisture and atmospheric components adhering to the outer wall.</p><p>In order to create an atmosphere with low oxygen concentration and low nitrogen concentration, the bag body is contracted once when evacuating. Therefore, a shrinkable material is used as the bag body. In addition, after vacuum exhausting, the outer wall of the chamber has a curved outer surface, or the outer surface of the bag is curved so that the bag does not stick to the corners of the outer wall of the chamber and tear. Use a thick enough one.</p>

<p>A vacuum having a seal portion provided for equipment maintenance by providing a space having a low oxygen concentration and a low nitrogen concentration between the outer wall of the vacuum chamber for forming a film and the outside air at atmospheric pressure. It is possible to prevent an increase in the concentration of atmospheric components in the chamber.</p>

Embodiments of the present invention will be described below.

(Embodiment 1) FIG. 1 shows a top view of an example of a film forming apparatus. The load chamber 101 in which the cassette 109 loaded with the substrate 110 to be processed is installed is connected to the transport chamber 102 in which the transport robot 108 is installed. Further, a vacuum chamber 103 capable of forming a film is connected to the transport chamber 102. A vacuum exhaust means and a gas supply means are provided in the load chamber 101, the transport chamber 102, and the vacuum chamber 103 capable of performing the film forming process, respectively. A gate valve is provided at each connecting portion.

Conventionally, the load chamber and the transport chamber are once evacuated and then filled with nitrogen gas while the film forming operation is not performed. However, in the present invention, the load chamber 101 and the transport chamber are transported in order to reduce the nitrogen concentration. Room 102 is also returned to atmospheric pressure with a rare gas or hydrogen gas instead of nitrogen gas.

Further, the first space 106 is separated by the first bag body 105 so as to surround the vacuum chamber 103 capable of forming a film, and the second space 107 is a second space so as to surround the first bag body 105. It is separated by a bag body 104, and the outer surface of the second bag body 104 is in contact with the atmosphere. The first space 106 and the second space 107 separate the vacuum chamber 103 from the nitrogen-rich atmosphere. Although not shown here, in order to suppress the swelling of the second bag body 104 due to the supply of gas, the concave portion is pressed with a string (or a metal wire or the like) and anchored to anchor the outer surface of the second bag body 104. Is uneven. The width of the first space 106 is anchored with a string so as to be 1 cm to 10 cm. Similarly, in order to suppress the swelling of the first bag body 105 due to the supply of gas, the recess is pressed with a string (or a metal wire or the like) to anchor, and the surface of the first bag body 105 also becomes uneven. There is. The width of the second space 107 is anchored with a string so that the width is 1 cm to 10 cm. That is, the distance between the first bag body 105 and the second bag body 104 is 1 cm to 10 cm.

First, before the substrate 110 to be processed is carried into the load chamber 101, both the first space 106 and the second space 107 are evacuated by the exhaust means connected to the respective bag bodies, and the respective bag bodies are exhausted. It is filled with rare gas or hydrogen gas by the gas supply means connected to the above. In order to constantly supply clean gas to each space, rare gas or hydrogen gas is supplied at a constant flow rate by the gas supply means and exhausted.

Further, in order to widen the distance between the vacuum chamber 103 capable of forming a film and the atmosphere, it is preferable that both the first space 106 and the second space 107 have positive pressure.

Next, the transport chamber 102 is evacuated and the vacuum chamber 103 is evacuated. At this stage, the vacuum chamber 103 in which the film formation process can be performed is surrounded by the floors of the first space 106 and the second space 107 filled with rare gas or hydrogen, the evacuated transfer chamber, and the clean room. Therefore, it is possible to prevent atmospheric components from entering from the outside of the vacuum chamber 103.

Next, a silicon film is formed as an inner wall coating film by precoating the inside of the vacuum chamber 103, which can perform a film forming process before the substrate is carried in. As a precoat, hydrogen or a rare gas is introduced to generate plasma to remove gas adhering to the inner wall of the vacuum chamber (air components such as oxygen and nitrogen, or etching gas used for cleaning the vacuum chamber), and then silane gas. Is introduced to generate plasma. Since silane gas reacts with oxygen, water and the like, oxygen and water in the vacuum chamber can be removed by flowing silane gas and further generating silane plasma. Further, by performing the precoating treatment, it is possible to prevent the metal elements of the members constituting the vacuum chamber from being incorporated into the microcrystalline silicon film as impurities. That is, by covering the inside of the vacuum chamber with silicon, it is possible to prevent the inside of the vacuum chamber from being eaten by plasma, and to reduce the concentration of impurities contained in the microcrystalline silicon film to be formed later. Can be done. The precoat involves coating the inner wall of the vacuum chamber with a film similar to the film to be deposited on the substrate.

Next, a cassette 109 in which a plurality of substrates 110 to be processed are set is placed in a load chamber 101 filled with a rare gas or hydrogen. Further, a plastic case called FOUP may be used instead of the cassette. This plastic case is a case in which degassing is suppressed, and is intended to prevent exposure to the atmosphere when transporting from one device to another. When using FOUP, if the inside of FOUP that stores multiple substrates is filled with rare gas or hydrogen and a FOUP opener mechanism is provided in the transfer chamber 102, it will open automatically and be transported to the vacuum chamber by the transfer robot. ..

Next, vacuum exhaust is performed in the load chamber 101 in which the cassette 109 is arranged so that the degree of vacuum is about the same as that of the vacuum chamber 103 and the transport chamber 102. Next, the gate valve between the transport chamber 102 and the load chamber 101 is opened, the substrate 110 to be processed is taken out from the cassette by the transport robot 108 arranged in the transport chamber 102, transported to the transport chamber 102, and the gate valve is closed. Next, the gate valve between the transfer chamber 102 and the vacuum chamber 103 capable of performing the film forming process is opened, the transfer robot 108 arranged in the transfer chamber 102 transfers the substrate to the vacuum chamber 103, and the substrate to be processed is placed at the position 111 indicated by the dotted line. Move and close the gate valve.

Next, the material gas is supplied, and plasma is generated in the vacuum chamber 103 capable of forming a film by the plasma generating means to form a semiconductor film on the substrate to be processed. In the present invention, a gas containing oxygen or nitrogen is not used as the material gas.

In the present embodiment, a microcrystalline silicon film is formed by using silane gas and hydrogen as material gases. In order to form a microcrystalline silicon film, the flow rate of hydrogen is 12 times or more and 1000 times or less, preferably 50 times or more and 200 times or less, and more preferably 100 times with respect to silane gas. As a material gas, SiH is used instead of silane gas.₂Cl₂, SiHCl₃, SiCl₄, SiF₄Etc. can also be used.

Also, CH in a gas such as silane gas₄, C₂H₆Hydride of carbon, such as GeH₄, GeF₄The energy bandwidth may be adjusted to 1.5 to 2.4 eV or 0.9 to 1.1 eV by mixing germanium hydride and germanium fluoride. Adding carbon or germanium to silicon can change the temperature characteristics of the TFT.

Here, the first film forming condition is that silane is diluted 100 times or more and 2000 times or less with hydrogen and / or a rare gas, and the heating temperature of the substrate is 100 ° C to 300 ° C, preferably 120 ° C to. It is set to 220 ° C. In order to inactivate the growth surface of the microcrystalline silicon film with hydrogen and promote the growth of the microcrystalline silicon, it is preferable to carry out the film formation at 120 ° C to 220 ° C.

Next, the microcrystalline silicon film is formed by increasing the film forming speed as compared with the film forming rate under the first film forming condition instead of the second film forming condition. In the present embodiment, the film formation time of the microcrystalline silicon film is the first film formation period in which the film formation is performed under the first film formation condition and the second film formation time in which the film formation is performed under the second film formation condition. It has a film formation period.

Next, after the film formation of the microcrystalline silicon under the second film formation condition is completed, the supply of the material gas such as silane gas and hydrogen and the high frequency power is stopped, and the substrate is carried out. When the film formation process is continuously performed on the next substrate, the process returns to the stage of carrying in the substrate and the same process is performed. Cleaning is performed to remove the coating and powder adhering to the inside of the vacuum chamber.

Cleaning is NF₃,SCIENCE FICTION₆Plasma etching is performed by introducing an etching gas typified by. Also, ClF₃This is done by introducing a gas that can be etched without using plasma as in. In cleaning, it is preferable to turn off the heater for heating the substrate to lower the temperature. This is to suppress the formation of reaction by-products due to etching. After the cleaning is completed, the process returns to precoating, and the same treatment as described above may be performed on the next substrate.

In the film formation of a microcrystalline silicon film, since the film is formed while growing the crystal, the film formation time is longer than that of the amorphous silicon film, but even if the film formation time is long. According to the present invention, the oxygen concentration and the nitrogen concentration in the vacuum chamber where the film formation process can be performed can be reduced as much as possible, so that a high-quality and homogeneous microcrystalline silicon film can be obtained.

When plasma is generated, the outer wall of the chamber is heated. Therefore, a cooling means such as a water cooling mechanism for cooling the outer wall of the chamber may be separately provided. Of course, this water cooling mechanism is also placed inside the bag and surrounded by space. Further, it is possible to dissipate the heat generated in the entire chamber by continuously supplying gas to this space, carrying the heat of the outer wall of the chamber with the gas, and exhausting the gas having the heat.

In the present embodiment, an example in which a space surrounding only the vacuum chamber capable of performing the film forming process is provided is shown, but the space is not particularly limited, and the space surrounding the transport chamber may be further divided by a bag body, and more preferably. The space surrounding the entire manufacturing apparatus including the load chamber may be divided by a bag body.

When maintaining the vacuum chamber that can perform the film formation process, the bag body is removed or air is supplied to the bag body to create an atmosphere in which the operator can work. Therefore, when performing maintenance, use an oxygen concentration meter that can confirm an oxygen concentration of 19% or more. The plasma CVD apparatus is provided with a seal portion that can open the inside of the chamber for maintenance, and the structure in which this seal portion is in contact with the atmosphere limits the reduction of oxygen concentration and nitrogen concentration in the chamber. In the present invention, the oxygen concentration in the vacuum chamber where the film formation process can be performed is performed by covering the circumference of the vacuum chamber where the film formation process can be performed with a bag and providing a space between the vacuum chamber and the atmosphere where the oxygen concentration and the nitrogen concentration are reduced. And the nitrogen concentration is reduced as much as possible.

In addition, the film forming apparatus is provided with seal portions at various locations, and even if any one of them is slightly deteriorated, the deteriorated seal portion is in the atmosphere due to the space filled with rare gas or hydrogen gas. It is possible to maintain the low oxygen concentration and the low nitrogen concentration in the vacuum chamber where the film formation process can be performed. Therefore, the apparatus shown in FIG. 1 can provide a homogeneous film for a longer period of time as compared with the conventional one.

Further, the apparatus shown in FIG. 1 shows an example of a single-wafer-type film-forming apparatus that deposits one substrate at a time, but is not particularly limited, and is applicable to a batch-type film-forming apparatus that deposits a plurality of substrates. You can also do it. When applied to a batch-type film forming apparatus, a space may be provided by using one bag body surrounding a plurality of chambers, or a plurality of spaces may be provided by using the same number of bag bodies as the number of chambers. It may be provided.

FIG. 2 shows a top view of an example of a plasma CVD apparatus using a bubble wrap 125 as a bag body. Figure 3 shows a partially enlarged view of the area around the outer wall of the chamber. In FIGS. 2 and 3, the same reference numerals are used for the same parts as those in FIG.

Similar to FIG. 1, the film forming apparatus shown in FIG. 2 has a vacuum chamber 103 capable of performing film forming processing, a transport chamber 102, and a load chamber 101 in which a cassette 109 loaded with a substrate 110 to be processed is installed.

The bubble wrap 125 is provided in contact with at least a part so that the gap between the outer wall of the vacuum chamber 103 and the bubble wrap 125 is narrowed. As shown in FIG. 3, the bubble wrap material 125 has a plurality of bubbles 127 surrounded by a resin. Examples of this resin include polyethylene resin, polypropylene resin, polyvinyl chloride resin, polyvinylidene chloride resin, cellulose acetate resin, fluorine-containing resin, polyamide resin, etc. Among them, polyamide resin having low oxygen permeability and nitrogen permeability and fluorine-containing resin. Resin is preferred.

The bubbles 127 are filled with a high-purity rare gas or hydrogen. When manufacturing the bubble wrap 125, air bubbles are sealed using a high-purity gas of 9N (99.9999999%).

Even if the gap between the outer wall of the vacuum chamber 103 and the bubble wrap 125 is narrowed, it is difficult to eliminate the gap. Therefore, a gas supply means for supplying a rare gas or hydrogen gas that causes an air flow in the narrow gap 126. Is provided. In the film forming apparatus of FIG. 2, by continuing to flow argon gas through the gap 126, even if oxygen and nitrogen, which are atmospheric components, pass through the bubble wrap 125, they are exhausted before reaching the outer wall of the chamber. Therefore, in the film forming apparatus of FIG. 2, the gap 126 may have an atmospheric pressure substantially the same as that of the outside air.

By surrounding the vacuum chamber 103 with the bubble wrap material 125, it is possible to save space in the film forming apparatus as compared with FIG. In addition, the total amount of rare gas or hydrogen gas supplied can be reduced as compared with FIG. It is particularly effective when supplying an expensive high-purity gas to the gap 126.

Further, the bubble wrap 125 is partially used on the outer wall of the chamber while maintaining the air flow path so that the entire bubble wrap 125 does not swell and the volume of the gap 126 does not increase when the rare gas or hydrogen gas flows into the gap 126. May be adhered to. When a part of the outer wall of the chamber and the bubble wrap are adhered, the portion to be partially adhered is a region excluding the periphery of the seal portion of the vacuum chamber, for example, a portion without a connecting portion. By partially adhering, a space-saving film forming apparatus can be provided. Further, the amount of gas supplied to the gap can be reduced.

Also, when maintaining the inside of the vacuum chamber, the bubble wrap material 125 is removed. When the maintenance is completed, a new bubble wrap material may be used and provided so as to surround the vacuum chamber, and the gas supply means may be installed in a slight gap between the vacuum chamber and the bubble wrap material. Of course, the same bubble wrap may be used, but since the component of the bubble provided in the bubble wrap may change with time, a new bubble wrap containing almost no atmospheric component is used. Is preferable.

As described above, in the device of FIG. 2, by providing the bubble wrap material 125 and the gas supply means for supplying rare gas or hydrogen to the gap, the atmosphere and the vacuum chamber 103 can be separated from each other for a long period of time. It is possible to prevent an increase in the concentration of atmospheric components in the vacuum chamber 103.

(Embodiment 2) In the present embodiment, the manufacturing process of the thin film transistor used in the liquid crystal display device will be described with reference to FIGS. 4 to 8. 4 to 6 are cross-sectional views showing a process of manufacturing a thin film transistor, and FIG. 7 is a top view of a connection region of a thin film transistor and a pixel electrode in one pixel. Further, FIG. 8 is a timing chart showing a method of forming a microcrystalline silicon film.

As a thin film transistor having a microcrystalline semiconductor film, the n-type is more suitable for use in a drive circuit than the p-type because of its higher mobility. It is desirable to align all the thin film transistors formed on the same substrate with the same polarity in order to reduce the number of steps. Here, an n-channel thin film transistor will be used for description.

As shown in FIG. 4 (A), the gate electrode 51 is formed on the substrate 50. As the substrate 50, a non-alkali glass substrate produced by a fusion method or a float method, such as barium borosilicate glass, aluminoborosilicate glass, or aluminosilicate glass, can be used. When the substrate 50 is mother glass, the size of the substrate is 1st generation (for example, 320 mm × 400 mm), 2nd generation (for example, 400 mm × 500 mm), 3rd generation (for example, 550 mm × 650 mm), 4th generation. (For example, 680 mm x 880 mm or 730 mm x 920 mm), 5th generation (eg 1000 mm x 1200 mm or 1100 mm x 1300 mm), 6th generation (eg 1500 mm x 1800 mm), 7th generation (eg 1900 mm x 2200 mm), The 8th generation (for example, 2160 mm × 2460 mm), the 9th generation (for example, 2400 mm × 2800 mm), the 10th generation (for example, 2850 mm × 3050 mm) and the like can be used.

The gate electrode 51 is formed by using a metal material such as titanium, molybdenum, chromium, tantalum, tungsten, or aluminum, or an alloy material thereof. The gate electrode 51 is formed by forming a conductive film on the substrate 50 by a sputtering method or a vacuum vapor deposition method, forming a mask on the conductive film by a photolithography technique or an inkjet method, and etching the conductive film using the mask. Can be formed with. Further, the gate electrode 51 can also be formed by ejecting and firing by an inkjet method using a conductive nanopaste of silver, gold, copper or the like. A nitride film of the above metal material may be provided between the substrate 50 and the gate electrode 51 as a barrier metal for improving the adhesion between the gate electrode 51 and the substrate 50 and preventing diffusion to the substrate. Here, the gate electrode is formed by etching the conductive film formed on the substrate 50 with the resist mask formed by using the first photomask.

As a specific example of the gate electrode structure, a molybdenum film may be laminated on the aluminum film to prevent hillock and electromigration peculiar to aluminum. Further, it may have a three-layer structure in which an aluminum film is sandwiched between molybdenum films. Further, as an example of another gate electrode structure, a molybdenum film is laminated on a copper film, a titanium nitride film is laminated on a copper film, and a tantalum nitride film is laminated on a copper film.

Since a semiconductor film and wiring are formed on the gate electrode 51, it is desirable to process the gate electrode 51 so that the end portion has a tapered shape in order to prevent step breakage. Further, although not shown, wiring connected to the gate electrode can be formed at the same time in this step.

Next, the gate insulating films 52a, 52b, and 52c are formed on the gate electrode 51 in this order. The cross-sectional view after completing the steps up to this point corresponds to FIG. 4 (A).

The gate insulating films 52a, 52b, and 52c can be formed of a silicon oxide film, a silicon nitride film, a silicon nitride film, or a silicon nitride film, respectively, by using a CVD method, a sputtering method, or the like. In order to prevent an interlayer short circuit due to pinholes or the like formed in the gate insulating film, it is preferable to use different insulating layers to form multiple layers. Here, as the gate insulating films 52a, 52b, and 52c, a form in which a silicon nitride film, a silicon oxide nitride film, and a silicon nitride film are laminated in this order is shown.

Here, the silicon oxide film has a higher oxygen content than nitrogen in its composition, and has a concentration range of 55 to 65 atomic% of oxygen, 1 to 20 atomic% of nitrogen, and 25 of Si. It refers to those containing ~ 35 atomic% and hydrogen in the range of 0.1 ~ 10 atomic%. The silicon nitride film has a higher nitrogen content than oxygen in its composition, and has a concentration range of 15 to 30 atomic% of oxygen, 20 to 35 atomic% of nitrogen, and 25 to Si. It refers to those containing 35 atomic% and hydrogen in the range of 15 to 25 atomic%.

The film thickness of the first and second layers of the gate insulating film should be thicker than 50 nm. The first layer of the gate insulating film is preferably a silicon nitride film or a silicon oxide film in order to prevent the diffusion of impurities (for example, alkali metal) from the substrate. Further, the first layer of the gate insulating film can prevent oxidation of the gate electrode and also prevent hillock when aluminum is used for the gate electrode. The third layer of the gate insulating film in contact with the polycrystalline semiconductor film is thicker than 0 nm and 5 nm or less, preferably about 1 nm. The third layer of the gate insulating film is provided to improve the adhesion with the microcrystalline semiconductor film. Further, by forming the third layer of the gate insulating film as a silicon nitride film, it is possible to prevent oxidation of the microcrystalline semiconductor film by a heat treatment performed later. For example, if the heat treatment is performed in a state where the insulating film having a high oxygen content and the microcrystalline semiconductor film are in contact with each other, the microcrystalline semiconductor film may be oxidized.

Further, it is preferable to form the gate insulating film by using a microwave plasma CVD apparatus having a frequency of 1 GHz or more. The silicon oxide film and the silicon nitride film formed by the microwave plasma CVD apparatus have high withstand voltage and can improve the reliability of the thin film transistor.

Here, the gate insulating film has a three-layer structure, but when it is used as a switching element of a liquid crystal display device, only a single layer of a silicon nitride film may be used because it is AC-driven.

Next, after forming the gate insulating film, it is preferable that the substrate is conveyed without being exposed to the atmosphere and the microcrystalline semiconductor film 53 is formed in a vacuum chamber different from the vacuum chamber in which the gate insulating film is formed.

In the present embodiment, the microcrystalline semiconductor film 53 is formed by using the film forming apparatus shown in FIG. By filling the periphery of the film forming apparatus with argon gas, the low oxygen concentration and the low nitrogen concentration in the film forming apparatus are maintained.

The procedure for forming the microcrystalline semiconductor film 53 will be described below with reference to FIG. The explanation of FIG. 8 is shown from the stage where the vacuum chamber is evacuated from atmospheric pressure to 200, and the subsequent precoat 201, substrate carry-in 202, substrate pretreatment 203, film formation treatment 204, substrate carry-out 205, and cleaning 206 are performed. Each process is shown in chronological order. However, the vacuum chamber is not limited to exhausting from atmospheric pressure, and it is preferable to keep the vacuum chamber at a certain degree of vacuum at all times for mass production or for lowering the ultimate vacuum in a short time.

In this embodiment, the degree of vacuum in the vacuum chamber before the substrate is carried in is set to 10.^-5Perform ultra-high vacuum exhaust that is higher than Pa. This stage corresponds to the vacuum exhaust 200 in FIG. When performing such ultra-high vacuum exhaust, it is preferable to use a turbo molecular pump and a cryopump in combination, perform exhaust by the turbo molecular pump, and further vacuum exhaust by using the cryopump. It is also effective to connect two turbo molecular pumps in series and evacuate. Further, it is preferable to provide a heater for baking in the vacuum chamber and perform heat treatment to degas the inner wall of the vacuum chamber. In addition, a heater that heats the substrate is also operated to stabilize the temperature. The heating temperature of the substrate is 100 ° C to 300 ° C, preferably 120 ° C to 220 ° C.

Next, precoat 201 is performed before the substrate is carried in to form a silicon film as an inner wall coating film. As the precoat 201, hydrogen or a rare gas is introduced to generate plasma to remove the gas adhering to the inner wall of the vacuum chamber (air components such as oxygen and nitrogen, or the etching gas used for cleaning the vacuum chamber). Silane gas is introduced to generate plasma. Since silane gas reacts with oxygen, water and the like, oxygen and water in the vacuum chamber can be removed by flowing silane gas and further generating silane plasma. Further, by treating the precoat 201, it is possible to prevent the metal elements of the members constituting the vacuum chamber from being incorporated into the microcrystalline silicon film as impurities. That is, by covering the inside of the vacuum chamber with silicon, it is possible to prevent the inside of the vacuum chamber from being eaten by plasma, and to reduce the concentration of impurities contained in the polycrystalline silicon film to be formed later. Can be done. Precoat 201 includes a process of coating the inner wall of the vacuum chamber with a film of the same type as the film to be deposited on the substrate.

After the precoat 201, the substrate loading 202 is performed. Since the substrate on which the microcrystalline silicon film should be deposited is stored in the vacuum-exhausted load chamber, the degree of vacuum in the vacuum chamber does not significantly deteriorate even if the substrate is carried in.

Next, the base pretreatment 203 is performed. The base pretreatment 203 is a particularly effective treatment when forming a microcrystalline silicon film, and is preferably performed. That is, when a microcrystalline silicon film is deposited on the glass substrate surface, the insulating film surface, or the amorphous silicon surface by the plasma CVD method, it is amorphous in the initial stage of deposition due to factors such as impurities and lattice mismatch. There is a risk that a quality layer will be formed. It is preferable to perform the base pretreatment 203 in order to reduce the thickness of the amorphous layer as much as possible and eliminate it if possible. As the base pretreatment, it is preferable to perform the rare gas plasma treatment, the hydrogen plasma treatment, or a combination of both. As the rare gas plasma treatment, it is preferable to use a rare gas element having a large mass number such as argon, krypton, and xenon. This is because impurities such as oxygen, water, organic substances, and metal elements adhering to the surface are removed by the effect of sputtering. The hydrogen plasma treatment is effective in removing the above-mentioned impurities adsorbed on the surface by hydrogen radicals and forming a clean film surface by an etching action on the insulating film or the amorphous silicon film. In addition, the combined use of rare gas plasma treatment and hydrogen plasma treatment promotes the promotion of microcrystal nucleation.

In terms of promoting the formation of microcrystalline nuclei, it is effective to continue to supply a rare gas such as argon at the initial stage of film formation of the microcrystalline silicon film, as shown by the broken line 207 in FIG.

Next, a film forming process 204 for forming a microcrystalline silicon film is performed following the base pretreatment 203. In the present embodiment, a film near the gate insulating film interface is formed under the first film forming condition having a low film forming rate but good quality, and then the film is changed to the second film forming condition having a high film forming rate. To deposit.

It is not particularly limited as long as the film forming speed under the second film forming condition is faster than the film forming speed under the first film forming condition. Therefore, it is formed by a high-frequency plasma CVD method with a frequency of several tens of MHz to several hundreds of MHz, or a microwave plasma CVD device with a frequency of 1 GHz or more, and is typically SiH.₄, Si₂H₆A film can be formed by diluting silicon hydride such as hydrogen with hydrogen to generate plasma. Further, in addition to silicon hydride and hydrogen, it can be diluted with one or more rare gas elements selected from helium, argon, krypton, and neon to form a microcrystalline semiconductor film. At these times, the flow rate ratio of hydrogen to silicon hydride is 12 times or more and 1000 times or less, preferably 50 times or more and 200 times or less, and more preferably 100 times. Instead of silicon hydride, SiH₂Cl₂, SiHCl₃, SiCl₄, SiF₄Etc. can be used.

Also, when helium is added to the material gas, helium has the highest ionization energy of 24.5 eV among all gases, and there is a semi-stable state at a level of about 20 eV, which is slightly lower than that ionization energy, so discharge. During duration, ionization requires only a difference of about 4 eV. Therefore, the discharge start voltage also shows the lowest value among all gases. Due to these characteristics, helium can maintain plasma in a stable manner. Further, since a uniform plasma can be formed, the effect of making the plasma density uniform is obtained even if the area of the substrate on which the microcrystalline silicon film is deposited becomes large.

Also, CH in a gas such as silane₄, C₂H₆Hydride of carbon, such as GeH₄, GeF₄The energy bandwidth may be adjusted to 1.5 to 2.4 eV or 0.9 to 1.1 eV by mixing germanium hydride and germanium fluoride. Adding carbon or germanium to silicon can change the temperature characteristics of the TFT.

Here, the first film forming condition is that silane is diluted 100 times or more and 2000 times or less with hydrogen and / or a rare gas, and the heating temperature of the substrate is 100 ° C to 300 ° C, preferably 120 ° C to. It is set to 220 ° C. In order to promote the growth of microcrystalline silicon, it is preferable to form a film at 120 ° C to 220 ° C.

FIG. 4 (B) shows a cross-sectional view at the stage when the first film forming condition is completed. A microcrystalline semiconductor film 23 having a low film forming rate but good quality is formed on the gate insulating film 52c. Since the quality of the microcrystalline semiconductor film 23 obtained under the first film forming condition contributes to the increase of the on-current of the TFT formed later and the improvement of the field effect mobility, the oxygen concentration in the film is 1 × 10.¹⁷It is important to reduce the oxygen concentration sufficiently so that it is / cm or less. Further, by the above procedure, it is possible to reduce the concentration of not only oxygen but also nitrogen and carbon mixed in the film of the polycrystalline semiconductor film, so that the microcrystalline semiconductor film can be prevented from becoming n-shaped. Can be done.

Next, the microcrystalline semiconductor film 53 is formed by increasing the film forming speed by changing from the first film forming condition to the second film forming condition. The cross-sectional view at this stage corresponds to FIG. 4 (C). The film thickness of the microcrystalline semiconductor film 53 may be 50 nm to 500 nm (preferably 100 nm to 250 nm). In the present embodiment, the film formation time of the microcrystalline semiconductor film 53 is such that the film formation is performed under the first film formation period in which the film formation is performed under the first film formation condition and the second film formation condition. It has a second film formation period.

Here, the second film forming condition is that silane is diluted 12 times or more and 100 times or less with hydrogen and / or a rare gas, and the heating temperature of the substrate is 100 ° C to 300 ° C, preferably 120 ° C to 220. Let it be ° C. Using a capacitively coupled (parallel plate type) CVD device, the gap (distance between the electrode surface and the substrate surface) is 20 mm, the degree of vacuum in the vacuum chamber is 100 Pa, the substrate temperature is 300 ° C, and the high frequency power of 60 MHz. 20 W is added, and silane gas (flow rate 8 sccm) is diluted 50 times with hydrogen (flow rate 400 sccm) to form a polycrystalline silicon film. Further, if only the flow rate of silane gas is changed to 4 sccm under the above-mentioned film forming conditions and diluted 100 times to form a microcrystalline silicon film, the film forming speed becomes slow. The film formation rate is increased by fixing the hydrogen flow rate and increasing the silane flow rate. Crystallinity is improved by reducing the film formation rate.

In this embodiment, a capacitive coupling type (parallel plate type) CVD apparatus is used, the gap (distance between the electrode surface and the substrate surface) is set to 20 mm, and the first film forming condition is set to a vacuum degree of 100 Pa in the vacuum chamber. A second film formation that accelerates the film formation rate by changing the gas flow rate under the condition that the substrate temperature is 100 ° C, high frequency power of 60 MHz is applied, and silane gas (flow rate 2 sccm) is diluted 200 times with hydrogen (flow rate 400 sccm). As a condition, the film is formed under the condition that 4 sccm of silane gas is diluted 100 times with hydrogen (flow rate 400 sccm) (other conditions are the same as the first film forming condition).

Next, after the film formation of the microcrystalline silicon under the second film formation condition is completed, the supply of the material gas such as silane and hydrogen and the high frequency power is stopped, and the substrate is carried out 205. When the film formation process is continuously performed on the next substrate, the process returns to the stage of substrate loading 202 and the same process is performed. Cleaning 206 is performed to remove the coating or powder adhering to the vacuum chamber.

Cleaning 206 is NF₃,SCIENCE FICTION₆Plasma etching is performed by introducing an etching gas typified by. Also, ClF₃This is done by introducing a gas that can be etched without using plasma as in. In cleaning 206, it is preferable to turn off the heater for heating the substrate to lower the temperature. This is to suppress the formation of reaction by-products due to etching. After the cleaning 206 is completed, the process returns to the precoat 201, and the same treatment as described above may be performed on the next substrate. NF₃Since nitrogen is contained in the composition, it is desirable to perform precoating to sufficiently reduce the nitrogen concentration in the film forming chamber.

Next, after forming the microcrystalline semiconductor film 53, it is preferable that the substrate is conveyed without being exposed to the atmosphere and the buffer layer 54 is formed in a vacuum chamber different from the vacuum chamber in which the microcrystalline semiconductor film 53 is formed. .. By separating it from the vacuum chamber of the buffer layer 54, the vacuum chamber for forming the microcrystalline semiconductor film 53 can be a dedicated chamber for creating an ultra-high vacuum before introducing the substrate, minimizing impurity contamination and ultra-ultra-high vacuum. The time to reach the high vacuum can be shortened. When baking to reach an ultra-high vacuum, it is particularly effective because it takes time for the chamber inner wall temperature to drop and stabilize. Further, by separating the vacuum chambers, it is possible to make the frequency of the high frequency power different according to the film quality to be obtained.

The buffer layer 54 is formed by using an amorphous semiconductor film containing hydrogen or halogen. An amorphous semiconductor film containing hydrogen can be formed by using hydrogen at a flow rate of 1 times or more and 10 times or less, more preferably 1 time or more and 5 times or less the flow rate of silicon hydride. In addition, the above silicon hydride and a gas containing fluorine, chlorine, bromine, or iodine (F).₂, Cl₂, Br₂, I₂, HF, HCl, HBr, HI, etc.) can be used to form an amorphous semiconductor film containing fluorine, chlorine, bromine, or iodine. Instead of silicon hydride, SiH₂Cl₂, SiHCl₃, SiCl₄, SiF₄Etc. can be used.

Further, the buffer layer 54 can form an amorphous semiconductor film by sputtering with hydrogen or a rare gas using an amorphous semiconductor as a target. Also, a gas (F) containing fluorine, chlorine, bromine, or iodine in the atmosphere.₂, Cl₂, Br₂, I₂, HF, HCl, HBr, HI, etc.) to form an amorphous semiconductor film containing fluorine, chlorine, bromine, or iodine.

The buffer layer 54 is preferably formed of an amorphous semiconductor film that does not contain crystal grains. Therefore, when forming by a high-frequency plasma CVD method or a microwave plasma CVD method having a frequency of several tens of MHz to several hundreds of MHz, the film forming conditions are controlled so as to form an amorphous semiconductor film containing no crystal grains. It is preferable to do so.

The buffer layer 54 is partially etched in a later process of forming the source and drain regions. At that time, it is preferable to form the buffer layer 54 with a thickness so that a part of the buffer layer 54 remains so that the microcrystalline semiconductor film 53 is not exposed. Typically, it is preferably formed with a thickness of 100 nm or more and 400 nm or less, preferably 200 nm or more and 300 nm or less. In a display device having a high applied voltage of the thin film transistor (for example, about 15 V), typically a liquid crystal display device, if the buffer layer 54 is formed to be thick as shown in the above range, the withstand voltage becomes high and the thin film transistor receives a high voltage. Even if it is applied, it is possible to prevent the thin film transistor from deteriorating.

It should be noted that impurities such as phosphorus and boron that impart a single conductive type are not added to the buffer layer 54. The buffer layer 54 functions as a barrier layer so that the impurities imparting the one-conductive type do not diffuse from the semiconductor film 55 to which the impurities imparting the one-conductive type are added to the microcrystalline semiconductor film 53. When the buffer layer is not provided, if the microcrystalline semiconductor film 53 and the semiconductor film 55 to which the impurities imparting a conductive type are added come into contact with each other, the impurities move due to the subsequent etching process or heat treatment, and the threshold value is set. It can be difficult to control.

Further, by forming the buffer layer 54 on the surface of the microcrystalline semiconductor film 53, it is possible to prevent the natural oxidation of the surface of the crystal grains contained in the microcrystalline semiconductor film 53. In particular, in the region where the amorphous semiconductor and the microcrystal grains are in contact with each other, cracks are likely to occur due to local stress. When this crack comes into contact with oxygen, the crystal grains are oxidized and silicon oxide is formed.

The energy gap of the buffer layer 54, which is an amorphous semiconductor film, is larger than that of the microcrystalline semiconductor film 53 (the energy gap of the amorphous semiconductor film is 1.6 to 1.8 eV, and the energy gap of the microcrystalline semiconductor film 53 is 1.1 to 1.5. eV), high resistance, low mobility, 1/5 to 1/10 of the polycrystalline semiconductor film 53. Therefore, in the thin film transistor formed later, the buffer layer formed between the source region and the drain region and the polycrystalline semiconductor film 53 functions as a high resistance region, and the polycrystalline semiconductor film 53 functions as a channel forming region. To do. Therefore, the off-current of the thin film transistor can be reduced. When the thin film transistor is used as a switching element of a display device, the contrast of the display device can be improved.

It is preferable that the buffer layer 54 is formed on the microcrystalline semiconductor film 53 by the plasma CVD method at a temperature of 300 ° C to 400 ° C. By this film forming process, hydrogen is supplied to the microcrystalline semiconductor film 53, and the same effect as hydrogenating the microcrystalline semiconductor film 53 can be obtained. That is, by depositing the buffer layer 54 on the polycrystalline semiconductor film 53, hydrogen can be diffused in the polycrystalline semiconductor film 53 to terminate the dangling bond.

Next, after the film formation of the buffer layer 54, the substrate is conveyed without being exposed to the atmosphere, and the semiconductor film 55 to which an impurity that imparts a conductive type is added is added in a vacuum chamber different from the vacuum chamber in which the buffer layer 54 is formed. It is preferable to form a film. The cross-sectional view at this stage corresponds to FIG. 4 (D). By forming the semiconductor film 55 to which the impurities that impart the monoconductive type are added in a vacuum chamber different from the vacuum chamber in which the buffer layer 54 is formed, the impurities that impart the monoconductive type are mixed in when the buffer layer is formed. You can avoid it.

When forming an n-channel thin film transistor, the semiconductor film 55 to which an impurity that imparts a conductive type is added may be prepared by adding phosphorus as a typical impurity element, and PH is added to silicon hydride.₃Impurity gas such as may be added. Further, when forming a p-channel type thin film transistor, boron may be added as a typical impurity element, and B is added to silicon hydride.₂H₆Impurity gas such as may be added. The semiconductor film 55 to which an impurity is added to impart one conductivity type, a microcrystalline semiconductor or an amorphous semiconductor, can be formed in body. The semiconductor film 55 to which impurities imparting a conductive type are added is formed to have a thickness of 2 nm or more and 50 nm or less. (1) Throughput can be improved by reducing the film thickness of the semiconductor film to which the impurities that impart the conductive type are added.

Next, as shown in FIG. 5 (A), the resist mask 56 is formed on the semiconductor film 55 to which the impurities imparting the one-conductive type are added. The resist mask 56 is formed by a photolithography technique or an inkjet method. Here, using the second photomask, the resist applied on the semiconductor film 55 to which the impurities imparting the one-conductive type are added is exposed and developed to form the resist mask 56.

Next, the polycrystalline semiconductor film 53, the buffer layer 54, and the semiconductor film 55 to which the impurities imparting the conductive type are added are etched and separated using the resist mask 56, and are finely divided as shown in FIG. 5 (B). A crystalline semiconductor film 61, a buffer layer 62, and a semiconductor film 63 to which impurities imparting a conductive type are added are formed. After this, the resist mask 56 is removed.

Since the side surfaces of the ends of the microcrystalline semiconductor film 61 and the buffer layer 62 are inclined, a leak current is generated between the source region and the drain region formed on the buffer layer 62 and the microcrystalline semiconductor film 61. It is possible to prevent it. Further, it is possible to prevent a leak current from being generated between the source electrode and the drain electrode and the microcrystalline semiconductor film 61. The inclination angle of the end side surfaces of the microcrystalline semiconductor film 61 and the buffer layer 62 is 30 ° to 90 °, preferably 45 ° to 80 °. By setting such an angle, it is possible to prevent the source electrode or the drain electrode from being cut off due to the stepped shape.

Next, as shown in FIG. 5 (C), the conductive films 65a to 65c are formed so as to cover the semiconductor film 63 and the gate insulating film 52c to which the impurities imparting the one conductive type are added. The conductive films 65a to 65c are preferably formed of a single layer or a laminate of aluminum or an aluminum alloy to which a heat resistance improving element such as copper, silicon, titanium, neodymium, scandium, or molybdenum or an anti-chilling element is added. Further, the film on the side in contact with the semiconductor film to which the impurity that imparts a conductive type is added is formed of titanium, tantalum, molybdenum, tungsten, or a nitride of these elements, and aluminum or an aluminum alloy is formed therein. It may be a laminated structure. Further, the upper surface and the lower surface of aluminum or an aluminum alloy may be sandwiched between titanium, tantalum, molybdenum, tungsten, or a nitride of these elements to form a laminated structure. Here, as the conductive film, a conductive film having a structure in which three layers of conductive films 65a to 65c are laminated is shown, and a laminated conductive film using a molybdenum film for the conductive films 65a and 65c and an aluminum film for the conductive film 65b, or a conductive film 65a. , 65c shows a laminated conductive film using a titanium film and conductive film 65b using an aluminum film. The conductive films 65a to 65c are formed by a sputtering method or a vacuum vapor deposition method.

Next, as shown in FIG. 5 (D), a resist mask 66 is formed on the conductive films 65a to 65c using a third photomask, and a part of the conductive films 65a to 65c is etched to form a pair of sources. The electrodes and drain electrodes 71a to 71c are formed. When the conductive films 65a to 65c are wet-etched, the conductive films 65a to 65c are selectively etched. As a result, since the conductive film is isotropically etched, the source electrodes and drain electrodes 71a to 71c having a smaller area than the resist mask 66 can be formed.

Next, as shown in FIG. 6A, a pair of source regions and drain regions 72 are formed by etching the semiconductor film 63 to which impurities that impart a monoconductive type are added using a resist mask 66. Further, in the etching step, a part of the buffer layer 62 is also etched. The buffer layer in which a recess (groove) is formed, which is partially etched, is referred to as a buffer layer 73. The source region and drain region and the depression (groove) of the buffer layer can be formed in the same process. By setting the depth of the depression (groove) of the buffer layer to 1/2 to 1/3 of the region with the thickest film thickness of the buffer layer, it is possible to separate the source region and the drain region. The leakage current between the source region and the drain region can be reduced. After this, the resist mask 66 is removed.

In particular, when exposed to plasma used for dry etching or the like, the resist mask is altered and is not completely removed in the resist removing step, and the buffer layer is etched by about 50 nm in order to prevent residues from remaining. The resist mask 66 is used twice for the etching treatment of a part of the conductive films 65a to 65c and the etching treatment at the time of forming the source region and the drain region 72, both of which are residues when dry etching is used. It is effective to form a thick buffer layer that may be etched when the residue is completely removed. Further, the buffer layer 73 can also prevent plasma damage from being applied to the microcrystalline semiconductor film 61 during dry etching.

Next, as shown in FIG. 6 (B), the source electrode and drain electrode 71a to 71c, the source region and drain region 72, the buffer layer 73, the polycrystalline semiconductor film 61, and the insulating film 76 covering the gate insulating film 52c are formed. Form. The insulating film 76 can be formed by using the same film forming method as the gate insulating films 52a, 52b, and 52c. The insulating film 76 is for preventing the invasion of pollutant impurities such as organic substances, metal substances, and water vapor suspended in the atmosphere, and a dense film is preferable. In addition, by using a silicon nitride film for the insulating film 76, the oxygen concentration in the buffer layer 73 can be reduced to 5 × 10.¹⁹atoms / cm³Below, preferably 1 × 10¹⁹atoms / cm³It can be as follows.

As shown in FIG. 6B, the ends of the source and drain electrodes 71a to 71c and the ends of the source and drain regions 72 do not match and are displaced from each other, so that the source and drain electrodes 71a Since the distance between the ends of ~ 71c is large, leakage current and short circuit between the source electrode and the drain electrode can be prevented. Further, since the ends of the source electrodes and drain electrodes 71a to 71c and the ends of the source region and drain region 72 do not match and are displaced, the source and drain electrodes 71a to 71c and the source region and drain region 72 The electric field is not concentrated on the end of the gate electrode 51, and leakage current between the gate electrode 51 and the source electrode and the drain electrode 71a to 71c can be prevented. Therefore, a thin film transistor having high reliability and high withstand voltage can be produced.

The thin film transistor 74 can be formed by the above steps.

In the thin film transistor shown in the present embodiment, a gate insulating film, a polycrystalline semiconductor film, a buffer layer, a source region and a drain region, a source electrode and a drain electrode are laminated on the gate electrode, and the microcrystalline semiconductor film functions as a channel forming region. A buffer layer covers the surface of the surface. Further, a depression (groove) is formed in a part of the buffer layer, and the region other than the depression is covered with the source region and the drain region. That is, since the source region and the drain region are separated by the depression formed in the buffer layer, the leakage current between the source region and the drain region can be reduced. Further, since a depression is formed by etching a part of the buffer layer, the etching residue generated in the process of forming the source region and the drain region can be removed, so that the etching residue leaks to the source region and the drain region through the residue. It is possible to avoid the generation of electric current (parasitic channel).

Further, a buffer layer is formed between the microcrystalline semiconductor film that functions as a channel forming region and the source region and the drain region. Further, the surface of the polycrystalline semiconductor film is covered with a buffer layer. Since the high-resistance buffer layer extends between the microcrystalline semiconductor film and the source region and drain region, it is possible to reduce the occurrence of leakage current in the thin film transistor and apply a high voltage. Deterioration due to can be reduced. Further, the buffer layer, the polycrystalline semiconductor film, the source region and the drain region are all formed on the region overlapping the gate electrode. Therefore, it can be said that the structure is not affected by the shape of the end of the gate electrode. When the gate electrode has a laminated structure, if aluminum is used as the lower layer, aluminum may be exposed on the side surface of the gate electrode and hillock may occur. By doing so, it is possible to prevent a short circuit from occurring in the region overlapping the side surface of the gate electrode. Further, since an amorphous semiconductor film whose surface is terminated with hydrogen is formed as a buffer layer on the surface of the polycrystalline semiconductor film, it is possible to prevent oxidation of the polycrystalline semiconductor film, and also to prevent oxidation of the microcrystalline semiconductor film, as well as to the source region and the source region. It is possible to prevent the etching residue generated in the process of forming the drain region from being mixed into the microcrystalline semiconductor film. Therefore, it is a thin film transistor having excellent electrical characteristics and excellent withstand voltage.

Further, the channel length of the thin film transistor can be shortened, and the plane area of the thin film transistor can be reduced.

Next, a part of the insulating film 76 is etched by using a resist mask formed on the insulating film 76 using a fourth photomask to form a contact hole, and the contact hole is in contact with the source electrode or the drain electrode 71c. The pixel electrode 77 is formed. Note that FIG. 6C corresponds to a cross-sectional view of chain line AB in FIG.

As shown in FIG. 7, it can be seen that the ends of the source region and the drain region 72 are located outside the ends of the source electrode and the drain electrode 71c. The end of the buffer layer 73 is located outside the source and drain electrodes 71c and the ends of the source and drain regions 72. Further, one of the source electrode and the drain electrode has a shape (specifically, a U-shape or a C-shape) that surrounds the other of the source electrode and the drain electrode. Therefore, since the area of the region where the carriers move can be increased, the amount of current can be increased and the area of the thin film transistor can be reduced. Further, since the microcrystalline semiconductor film, the source electrode, and the drain electrode are superimposed on the gate electrode, the influence of the unevenness of the gate electrode is small, and the coverage rate can be reduced and the generation of leakage current can be suppressed. One of the source electrode and the drain electrode also functions as a source wiring or a drain wiring.

Further, the pixel electrode 77 includes an indium oxide containing tungsten oxide, an indium zinc oxide containing tungsten oxide, an indium oxide containing titanium oxide, an indium tin oxide containing titanium oxide, an indium tin oxide, and an indium zinc oxide. , A translucent conductive material such as indium tin oxide to which silicon oxide is added can be used.

Further, the pixel electrode 77 can be formed by using a conductive composition containing a conductive polymer (also referred to as a conductive polymer). The pixel electrode formed by using the conductive composition preferably has a sheet resistance of 10000 Ω / or less and a light transmittance of 70% or more at a wavelength of 550 nm. The sheet resistance is preferably lower. Further, the resistivity of the conductive polymer contained in the conductive composition is preferably 0.1 Ω · cm or less.

As the conductive polymer, a so-called π-electron conjugated conductive polymer can be used. For example, polyaniline or a derivative thereof, polypyrrole or a derivative thereof, polythiophene or a derivative thereof, or a copolymer of two or more kinds thereof can be mentioned.

Here, as the pixel electrode 77, an indium tin oxide film is formed by a sputtering method, and then a resist is applied onto the indium tin oxide film. Next, the resist is exposed and developed using a fifth photomask to form a resist mask. Next, the indium tin oxide film is etched with a resist mask to form the pixel electrode 77.

From the above, it is possible to form an element substrate that can be used in a display device. In the present embodiment, an example of forming an element substrate used for an electro-optical device represented by a liquid crystal display panel or a light emitting device has been shown, but the present invention is not particularly limited, and the film forming apparatus or film forming method of the present invention is not particularly limited. It is also possible to use a photoelectric conversion device typified by a solar cell or a sensor in which a semiconductor film formed by using the above is used as at least one layer of the photoelectric conversion layer.

(Embodiment 3) This embodiment is used for cleaning the gas (atmospheric components such as oxygen and nitrogen, or the vacuum chamber) adhering to the inner wall of the vacuum chamber by introducing hydrogen or rare gas to generate plasma before the substrate is carried into the vacuum chamber. After removing the etching gas), hydrogen, silane gas, and a small amount of phosphine (PH)₃) An example of introducing gas is shown. Since only a part of the steps is different from that of the second embodiment, only the different steps will be described in detail below with reference to FIG. In FIG. 9, the same reference numerals are used for the same parts as in the second embodiment.

First, a gate electrode is formed on the substrate 350 as in the second embodiment. Here, a non-alkali glass substrate having a size of 600 mm × 720 mm is used. Further, since this is an example of manufacturing a display device having a large display screen using a large-area substrate, the first conductive layer 351a made of aluminum having low electrical resistance and the heat resistance of the first conductive layer 351a are higher than those of the first conductive layer 351a. The gate electrode is formed by laminating a second conductive layer 351b made of highly high-quality molybdenum.

Next, the gate insulating film 352 is formed on the second conductive layer 351b, which is the upper layer of the gate electrode. When used in a switching element of a liquid crystal display device, it is desirable that the gate insulating film 352 is only a single layer of a silicon nitride film in order to drive AC. Here, as the gate insulating film 352, a single-layer silicon nitride film (dielectric constant 7.0, thickness 300 nm) is formed by a plasma CVD method. The cross-sectional view after completing the steps up to this point corresponds to FIG. 9 (A).

Next, after the formation of the gate insulating film, the substrate is conveyed without being exposed to the atmosphere, and the polycrystalline semiconductor film is formed in a vacuum chamber different from the vacuum chamber in which the gate insulating film is formed. In this embodiment, a microcrystalline semiconductor film is formed using the film forming apparatus shown in FIG.

Before the substrate is carried into the vacuum chamber of the film forming apparatus shown in FIG. 2, hydrogen or a rare gas is introduced to generate plasma, and the gas (atmospheric components such as oxygen and nitrogen, or vacuum) adhering to the inner wall of the vacuum chamber. After removing the etching gas used to clean the chamber), hydrogen, silane gas and a small amount of phosphine (PH)₃) Introduce gas. The silane gas can react with oxygen, water, etc. in the vacuum chamber. A small amount of phosphine gas can contain phosphorus in the microcrystalline semiconductor film formed later.

Next, the substrate is carried into a vacuum chamber, exposed to silane gas and a trace amount of phosphine gas, as shown in FIG. 9B, and then a microcrystalline semiconductor film is formed. The polycrystalline semiconductor film is typically SiH.₄, Si₂H₆A film can be formed by diluting silicon hydride such as hydrogen with hydrogen to generate plasma. A microcrystalline semiconductor film 353 containing phosphorus and hydrogen can be formed by using hydrogen at a flow rate of more than 100 times and 2000 times or less the flow rate of silane gas. Exposure to a small amount of phosphine gas promotes the generation of crystal nuclei to form a polycrystalline semiconductor film 353. The polycrystalline semiconductor film 353 exhibits a concentration profile in which the concentration of phosphorus decreases as the distance from the gate insulating film interface increases.

Then, the film forming conditions are changed in the same chamber, and hydrogen containing hydrogen is used at a flow rate of 1 times or more and 10 times or less, more preferably 1 time or more and 5 times or less the flow rate of hydrogenated silicon, from amorphous silicon containing hydrogen. The buffer layer 54 is laminated. The cross-sectional view after completing the steps up to this point corresponds to FIG. 9 (C).

Next, after the film formation of the buffer layer 54, the substrate is conveyed without being exposed to the atmosphere, and an impurity that imparts a conductive type in a vacuum chamber different from the vacuum chamber in which the microcrystalline semiconductor film 353 and the buffer layer 54 are formed is present. The added semiconductor film 55 is formed into a film. Since the steps after the film formation of the semiconductor film 55 are the same as those in the second embodiment, detailed description thereof will be omitted here.

Since the film forming apparatus shown in FIG. 2 is separated from the atmosphere by a bubble wrap, atmospheric components such as oxygen concentration and nitrogen concentration in the chamber of the film forming apparatus can be reduced as much as possible. Therefore, the oxygen concentration and the nitrogen concentration contained in the obtained microcrystalline semiconductor film 353 and the buffer layer 54 can also be reduced.

This embodiment can be freely combined with the first embodiment or the second embodiment.

(Embodiment 4) The second embodiment and the third embodiment show an example of laminating a microcrystalline semiconductor film and a buffer layer, but the film forming apparatus shown in FIGS. 1 and 2 is not only a microcrystalline semiconductor film but also an amorphous one. A quality semiconductor film can also obtain excellent film quality. In this embodiment, an example in which a single layer of an amorphous silicon film is used as the active layer is shown in FIG.

A gate electrode is formed on the substrate 450 as in the third embodiment. The gate electrode is obtained by laminating a first conductive layer 451a made of aluminum having low electric resistance and a second conductive layer 451b made of molybdenum nitride having higher heat resistance than the first conductive layer 451a.

Next, as in the third embodiment, the gate insulating film 452 made of the silicon nitride film is formed on the second conductive layer 451b which is the upper layer of the gate electrode.

Next, after the formation of the gate insulating film, the substrate is conveyed without being exposed to the atmosphere, and the amorphous semiconductor film is formed in a vacuum chamber different from the vacuum chamber in which the gate insulating film is formed. In this embodiment, an amorphous semiconductor film is formed using the film forming apparatus shown in FIG.

Here, NF before film formation₃And science fiction₃And ClF₃The amorphous semiconductor film is intentionally impregnated with halogen such as chlorine or fluorine. For example, amorphous silicon films are typically SiH.₄, Si₂H₆A film can be formed by diluting silicon hydride such as hydrogen with hydrogen to generate plasma. An amorphous silicon film containing halogen and hydrogen can be formed by using hydrogen at a flow rate of 1 times or more and 10 times or less, more preferably 1 time or more and 5 times or less the flow rate of silicon hydride. The pressure in the vacuum chamber during film formation is at least 2 x 10^-2The range is from Torr (2.666Pa) to 1Torr (133.3Pa). The film forming apparatus shown in FIG. 2 can sufficiently reduce the concentration of atmospheric components such as oxygen and nitrogen mixed in the amorphous silicon film. The amorphous silicon film 473 exhibits a concentration profile in which the halogen concentration decreases with increasing distance from the gate insulating film interface. By including halogen at the gate insulating film interface of the amorphous silicon film, the unbonded hands (dangling bonds) in the amorphous silicon film can be terminated, which is effective.

Next, after the amorphous silicon film 473 is formed, the substrate is conveyed without being exposed to the atmosphere, and an impurity that imparts a conductive type is added in a vacuum chamber different from the vacuum chamber in which the amorphous silicon film is formed. The semiconductor film 472 is formed.

Next, a resist mask is formed on the semiconductor film to which the impurities that impart one conductive type are added. Using the resist mask, the amorphous silicon film 473 and the semiconductor film 472 to which impurities imparting a conductive type are added are etched and separated. After this, the resist mask is removed.

Next, a conductive film is formed so as to cover the semiconductor film 472 and the gate insulating film 452 to which impurities imparting a conductive type are added. Here, the conductive film is a conductive film having a structure in which three layers of conductive films are laminated, specifically, a first conductive film, a third conductive film having a molybdenum film, and a second conductive film having an aluminum film. The three-layer conductive film used is shown. The three-layer conductive film is formed by a sputtering method or a vacuum vapor deposition method.

Next, a resist mask is formed on the three-layer conductive film, and a part of the three-layer conductive film is etched to form a pair of source electrodes and drain electrodes 471a to 471c. Next, a pair of source regions and drain regions are formed by etching the semiconductor film 472 to which an impurity that imparts a conductive type is added using a resist mask. Further, in the etching step, a part of the amorphous silicon film 473 is also etched by about 50 nm. FIG. 10 shows an amorphous silicon film 473 in which a recess (groove) is formed, which is partially etched.

Next, the insulating film 476 covering the source electrode and the drain electrode 471a to 471c and the gate insulating film 452 is formed. The insulating film 476 can be formed by using the same film forming method as the gate insulating film 452. The insulating film 476 is for preventing the invasion of pollutant impurities such as organic substances, metal substances, and water vapor suspended in the atmosphere, and a dense film is preferable. In addition, by using a silicon nitride film for the insulating film 476, the oxygen concentration in the amorphous silicon film 473 can be reduced to 5 × 10.¹⁹atoms / cm³Below, preferably 1 × 10¹⁹atoms / cm³It can be as follows.

By the above steps, the thin film transistor 474 shown in FIG. 10 can be formed.

In the thin film transistor shown in the present embodiment, a gate insulating film, an amorphous silicon film, a source region and a drain region, a source electrode and a drain electrode are laminated on the gate electrode. Further, a depression (groove) is formed in a part of the amorphous silicon film, and the region other than the depression is covered with the source region and the drain region. That is, since the source region and the drain region are separated by the depression formed in the amorphous silicon film, the leakage current between the source region and the drain region can be reduced. Further, since the depression is formed by etching a part of the amorphous silicon film, the etching residue generated in the step of forming the source region and the drain region can be removed, so that the source region and the drain can be removed through the residue. It is possible to avoid the occurrence of leak current (parasitic channel) in the region.

Next, the flattening film 482 is formed on the insulating film 476. The flattening film 482 is formed of an organic resin film. Next, a part of the insulating film 476 and the flattening film 482 are etched using a resist mask to form a contact hole, and a pixel electrode 477 in contact with the source electrode or the drain electrode 471c is formed in the contact hole.

From the above, it is possible to form an element substrate that can be used in a display device. In the present embodiment, an example in which the flattening film 482 is provided is shown, but the present invention is not particularly limited, and the flattening film 482 may not be provided.

The present embodiment can be freely combined with the first to third embodiments.

(Embodiment 5) A method for producing a thin film transistor different from that of the second embodiment will be described with reference to FIGS. 11 to 15. Here, a step of manufacturing a thin film transistor by using a process capable of reducing the number of photomasks as compared with the second embodiment will be described.

Similar to FIG. 4A shown in the second embodiment, a conductive film is formed on the substrate 50, a resist is applied on the conductive film, and a resist formed by a photolithography step using a first photomask. A part of the conductive film is etched with a mask to form a gate electrode 51. Next, the gate insulating films 52a, 52b, and 52c are formed on the gate electrode 51 in this order.

Next, the microcrystalline semiconductor film 23 is formed under the first film forming condition by using the film forming apparatus shown in FIG. 1 in the same manner as in FIG. 4 (B) shown in the second embodiment. Subsequently, film formation is performed in the same chamber under the second film formation conditions to form the microcrystalline semiconductor film 53 in the same manner as in FIG. 4 (C) shown in the second embodiment. Next, similarly to FIG. 4D shown in the second embodiment, the buffer layer 54 and the semiconductor film 55 to which the impurities imparting the monoconductive type are added are sequentially formed on the microcrystalline semiconductor film 53.

Next, the conductive films 65a to 65c are formed on the semiconductor film 55 to which the impurities that impart one conductive type are added. Next, as shown in FIG. 12A, the resist 80 is applied onto the conductive film 65a.

As the resist 80, a positive type resist or a negative type resist can be used. Here, a positive resist is used.

Next, using the multi-gradation mask 59 as the second photomask, the resist 80 is irradiated with light to expose the resist 80.

Here, the exposure using the multi-gradation mask 59 will be described with reference to FIG.

A multi-gradation mask is a mask capable of applying three exposure levels to an exposed portion, an intermediate exposed portion, and an unexposed portion, and a plurality of masks (typically two types) can be applied by one exposure and development process. It is possible to form a resist mask with a region of the same thickness. Therefore, it is possible to reduce the number of photomasks by using a multi-tone mask.

Typical examples of the multi-gradation mask include a gray tone mask 59a as shown in FIG. 11 (A) and a halftone mask 59b as shown in FIG. 11 (C).

As shown in FIG. 11A, the gray tone mask 59a is composed of a translucent substrate 163, a light-shielding portion 164 formed on the substrate 163, and a diffraction grating 165. In the light-shielding portion 164, the light transmittance is 0%. On the other hand, in the diffraction grating 165, the light transmittance can be controlled by setting the distance between the light transmitting portions such as slits, dots, and mesh to be equal to or less than the resolution limit of the light used for exposure. As the diffraction grating 165, either a periodic slit, a dot, or a mesh, or an aperiodic slit, a dot, or a mesh can be used.

As the translucent substrate 163, a translucent substrate such as quartz can be used. The light-shielding portion 164 and the diffraction grating 165 can be formed by using a light-shielding material such as chromium or chromium oxide that absorbs light.

When the gray tone mask 59a is irradiated with the exposure light, as shown in FIG. 11B, the light transmittance 166 is 0% in the light-shielding portion 164, and the light-shielding portion 164 and the diffraction grating 165 are not provided. In the region, the light transmittance 166 is 100%. Further, in the diffraction grating 165, the adjustment is possible in the range of 10 to 70%. The light transmittance of the diffraction grating 165 can be adjusted by adjusting the spacing and pitch of the slits, dots, or meshes of the diffraction grating.

As shown in FIG. 11C, the halftone mask 59b is composed of a translucent substrate 163, a semi-transmissive portion 167 formed on the substrate 163, and a light-shielding portion 168. As the semitransparent portion 167, MoSiN, MoSi, MoSiO, MoSiON, CrSi and the like can be used. The light-shielding portion 168 can be formed by using a light-shielding material such as chromium or chromium oxide that absorbs light.

When the halftone mask 59b is irradiated with exposure light, as shown in FIG. 11 (D), the light transmittance 169 is 0% in the light-shielding portion 168, and the light-shielding portion 168 and the semi-transmissive portion 167 are provided. In the absence region, the light transmittance 169 is 100%. Further, in the semi-transmissive portion 167, the light transmittance can be adjusted in the range of 10 to 70%. The light transmittance in the semi-transmissive portion 167 can be adjusted by adjusting the material of the semi-transmissive portion 167.

By developing after exposure using a multi-gradation mask, a resist mask 81 having regions having different film thicknesses can be formed as shown in FIG. 12 (B).

Next, using the resist mask 81 as a mask, the microcrystalline semiconductor film 53, the buffer layer 54, the semiconductor film 55 to which impurities imparting a conductive type are added, and the conductive films 65a to 65c are etched and separated. As a result, as shown in FIG. 13 (A), a microcrystalline semiconductor film 61, a buffer layer 62, a semiconductor film 63 to which an impurity imparting a conductive type is added, and conductive films 85a to 85c can be formed. .. Note that FIG. 13 (A) corresponds to a cross-sectional view taken along the line AB in FIG. 15 (A) (excluding the resist mask 86).

Next, the resist mask 81 is ashed. As a result, the area of the resist is reduced and the thickness is reduced. At this time, the resist in the thin region (the region that overlaps with a part of the gate electrode 51) is removed, and as shown in FIG. 13 (A), the separated resist mask 86 can be formed.

Next, the conductive films 85a to 85c are etched and separated using the resist mask 86. As a result, a pair of source electrodes and drain electrodes 92a to 92c can be formed as shown in FIG. 13 (B). When the conductive films 85a to 85c are wet-etched using the resist mask 86, the conductive films 85a to 85c are selectively etched. As a result, since the conductive film is isotropically etched, the source electrodes and drain electrodes 92a to 92c having a smaller area than the resist mask 86 can be formed.

Next, the resist mask 86 is used to etch the semiconductor film 63 to which the impurities that impart the one-conductive type are added to form a pair of source regions and drain regions 88. In the etching step, a part of the buffer layer 62 is also etched. The partially etched buffer layer is referred to as buffer layer 87. A recess is formed in the buffer layer 87. The source region and drain region and the depression (groove) of the buffer layer can be formed in the same process. Here, since a part of the buffer layer 87 is partially etched by the resist mask 86 whose area is smaller than that of the resist mask 81, the buffer layer 87 has a shape protruding outside the source region and the drain region 88. .. After this, the resist mask 86 is removed. Further, the ends of the source and drain electrodes 92a to 92c and the ends of the source region and the drain region 88 are not aligned and are displaced, and the source region and the outside of the ends of the source and drain electrodes 92a to 92c are located outside the source region and the drain region 88. The end of the drain region 88 is formed.

Note that FIG. 13 (C) corresponds to a cross-sectional view of AB in FIG. 15 (B). As shown in FIG. 15 (B), it can be seen that the ends of the source region and the drain region 88 are located outside the ends of the source electrode and the drain electrode 92c. The end of the buffer layer 87 is located outside the source and drain electrodes 92c and the ends of the source and drain regions 88. Further, one of the source electrode and the drain electrode has a shape (specifically, a U-shape or a C-shape) that surrounds the other of the source electrode and the drain electrode. Therefore, since the area of the region where the carriers move can be increased, the amount of current can be increased and the area of the thin film transistor can be reduced. Further, since the microcrystalline semiconductor film, the source electrode, and the drain electrode are superimposed on the gate electrode, the influence of the unevenness of the gate electrode is small, and it is possible to reduce coating defects and suppress the generation of leak current. One of the source electrode and the drain electrode also functions as a source wiring or a drain wiring.

As shown in FIG. 13 (C), the ends of the source and drain electrodes 92a to 92c and the ends of the source and drain regions 88 do not match and are displaced from each other, so that the source and drain electrodes 92a Since the distance between the ends of ~ 92c is large, leakage current and short circuit between the source electrode and the drain electrode can be prevented. Further, since the ends of the source electrodes and drain electrodes 92a to 92c and the ends of the source region and drain region 88 do not match and are displaced, the source and drain electrodes 92a to 92c and the source region and drain region 88 The electric field is not concentrated on the end of the gate electrode 51, and leakage current between the gate electrode 51 and the source electrode and the drain electrode 92a to 92c can be prevented. Therefore, a thin film transistor having high reliability and high withstand voltage can be produced.

The thin film transistor 83 can be formed by the above steps. Further, a thin film transistor can be formed by using two photomasks.

Next, as shown in FIG. 14 (A), the insulating film 76 is placed on the source and drain electrodes 92a to 92c, the source and drain regions 88, the buffer layer 87, the polycrystalline semiconductor film 90, and the gate insulating film 52c. Form.

Next, a part of the insulating film 76 is etched using the resist mask formed by using the third photomask to form a contact hole. Next, the pixel electrode 77 in contact with the source electrode or the drain electrode 92c is formed in the contact hole. Here, as the pixel electrode 77, an indium tin oxide film is formed by a sputtering method, and then a resist is applied onto the indium tin oxide film. Next, the resist is exposed and developed using a fourth photomask to form a resist mask. Next, the indium tin oxide film is etched with a resist mask to form the pixel electrode 77. Note that FIG. 14 (B) corresponds to a cross-sectional view of AB in FIG. 15 (C).

As described above, it is possible to reduce the number of masks by using the multi-gradation mask and form an element substrate that can be used in the display device.

Further, the present embodiment can be freely combined with any one of the first to fourth embodiments.

(Embodiment 6) In the present embodiment, as one form of the display device, the liquid crystal display device having the thin film transistor shown in the second embodiment is shown below.

First, a VA (Vertical Alignment) type liquid crystal display device is shown. The VA type liquid crystal display device is a kind of method for controlling the arrangement of liquid crystal molecules on a liquid crystal panel. The VA method is a method in which the liquid crystal molecules face the panel surface in the vertical direction when no voltage is applied. In this embodiment, the pixels are particularly divided into several regions (subpixels), and the molecules are devised to be tilted in different directions. This is called multi-domain or multi-domain design. In the following description, a liquid crystal display device in which a multi-domain design is taken into consideration will be described.

17 and 18 show pixel electrodes and counter electrodes, respectively. Note that FIG. 17 is a plan view of the substrate side on which the pixel electrodes are formed, and FIG. 16 shows a cross-sectional structure corresponding to the cutting line AB shown in the drawing. Further, FIG. 18 is a plan view of the substrate side on which the counter electrode is formed. In the following description, these figures will be referred to.

FIG. 16 shows a state in which the TFT 628, the pixel electrode 624 connected to the TFT 628, the substrate 600 on which the holding capacitance portion 630 is formed, and the counter substrate 601 on which the counter electrode 640 and the like are formed are superposed, and the liquid crystal is injected. Shown.

A light-shielding film 632, a first colored film 634, a second colored film 636, a third colored film 638, and a counter electrode 640 are formed at positions on the facing substrate 601 where the spacer 642 is formed. Due to this structure, the heights of the protrusions 644 and the spacers 642 for controlling the orientation of the liquid crystal are different. An alignment film 648 is formed on the pixel electrode 624, and similarly, an alignment film 646 is formed on the counter electrode 640. During this time, the liquid crystal layer 650 is formed.

Although the spacer 642 is shown here using a columnar spacer, a bead spacer may be sprayed. Further, the spacer 642 may be formed on the pixel electrode 624 formed on the substrate 600.

A TFT 628, a pixel electrode 624 connected to the TFT 628, and a holding capacitance portion 630 are formed on the substrate 600. The pixel electrode 624 is connected to the wiring 618 by a contact hole 623 penetrating the TFT 628, the wiring 618, the insulating film 620 covering the holding capacitance portion 630, and the third insulating film 622 covering the insulating film 620, respectively. As the TFT 628, the thin film transistor shown in the second embodiment can be appropriately used. Further, the holding capacity portion 630 is composed of a first capacitance wiring 604 formed in the same manner as the gate wiring 602 of the TFT 628, a gate insulating film 606, and a second capacitance wiring 617 formed in the same manner as the wirings 616 and 618. The wiring.

A liquid crystal element is formed by overlapping the pixel electrode 624, the liquid crystal layer 650, and the counter electrode 640.

FIG. 17 shows the structure on the substrate 600. The pixel electrode 624 is formed by using the material shown in the second embodiment. The pixel electrode 624 is provided with a slit 625. The slit 625 is for controlling the orientation of the liquid crystal.

The TFT 629 shown in FIG. 17, the pixel electrode 626 connected to the TFT 629, and the holding capacitance portion 631 can be formed in the same manner as the TFT 628, the pixel electrode 624, and the holding capacitance portion 630, respectively. Both TFT 628 and TFT 629 are connected to wiring 616. The pixels of this liquid crystal panel are composed of a pixel electrode 624 and a pixel electrode 626. The pixel electrode 624 and the pixel electrode 626 are subpixels.

FIG. 18 shows the structure on the opposite substrate side. A counter electrode 640 is formed on the light-shielding film 632. The counter electrode 640 is preferably formed by using the same material as the pixel electrode 624. A protrusion 644 for controlling the orientation of the liquid crystal is formed on the counter electrode 640. Further, the spacer 642 is formed according to the position of the light-shielding film 632.

The equivalent circuit of this pixel structure is shown in FIG. Both TFT628 and TFT629 are connected to gate wiring 602 and wiring 616. In this case, by making the potentials of the capacitance wiring 604 and the capacitance wiring 605 different, the operations of the liquid layer element 651 and the liquid crystal element 652 can be made different. That is, by individually controlling the potentials of the capacitance wiring 604 and the capacitance wiring 605, the orientation of the liquid crystal is precisely controlled to widen the viewing angle.

When a voltage is applied to the pixel electrode 624 provided with the slit 625, electric field distortion (oblique electric field) is generated in the vicinity of the slit 625. By arranging the slit 625 and the protrusion 644 on the opposite substrate 601 side so as to alternately mesh with each other, an oblique electric field is effectively generated to control the orientation of the liquid crystal, thereby locating the direction in which the liquid crystal is oriented. Different by. That is, the viewing angle of the liquid crystal panel is widened by making it multi-domain.

In the above, an example of the VA type liquid crystal display device is shown, but the structure is not particularly limited to the pixel electrode structure shown in FIG.

Next, the form of the TN type liquid crystal display device will be described.

20 and 21 show the pixel structure of the TN type liquid crystal display device. FIG. 21 is a plan view, and FIG. 20 shows a cross-sectional structure corresponding to the cutting line AB shown in the drawing. In the following description, both figures will be referred to.

The pixel electrode 624 is connected to the TFT 628 by wiring 618 by a contact hole 623. Wiring 616, which functions as a data line, is connected to TFT 628. As the TFT 628, any of the TFTs shown in the second embodiment can be applied.

The pixel electrode 624 is formed by using the pixel electrode 77 shown in the second embodiment.

A light-shielding film 632, a second coloring film 636, and a counter electrode 640 are formed on the facing substrate 601. Further, a flattening film 637 is formed between the second colored film 636 and the counter electrode 640 to prevent the liquid crystal from being disturbed in orientation. The liquid crystal layer 650 is formed between the pixel electrode 624 and the counter electrode 640.

A liquid crystal element is formed by overlapping the pixel electrode 624, the liquid crystal layer 650, and the counter electrode 640.

Further, a color filter, a shielding film (black matrix) for preventing dispersion, or the like may be formed on the substrate 600 or the opposing substrate 601. Further, the polarizing plate is attached to the surface of the substrate 600 opposite to the surface on which the thin film transistor is formed, and the polarizing plate is attached to the surface of the opposite substrate 601 opposite to the surface on which the counter electrode 640 is formed. Keep it.

A liquid crystal display device can be manufactured by the above steps. The liquid crystal display device of the present embodiment is a liquid crystal display device having high contrast and high visibility because it uses a thin film transistor having a small off current, excellent electrical characteristics, and high reliability.

It can also be applied to a horizontal electric field type liquid crystal display device. The transverse electric field method is a method of driving a liquid crystal to express gradation by applying an electric field in the horizontal direction to the liquid crystal molecules in the cell. According to this method, the viewing angle can be expanded to about 180 degrees.

(Embodiment 7) In the present embodiment, a light emitting device, which is a form of a display device, will be described with reference to FIGS. 12 to 14, 22, and 23. As the light emitting device, a light emitting element utilizing electroluminescence is used here. Light emitting elements that utilize electroluminescence are distinguished by whether the light emitting material is an organic compound or an inorganic compound, and the former is generally called an organic EL element and the latter is called an inorganic EL element.

In the organic EL element, by applying a voltage to the light emitting element, electrons and holes are injected into the layer containing the luminescent organic compound from the pair of electrodes, respectively, and a current flows. Then, when those carriers (electrons and holes) are recombined, the luminescent organic compound forms an excited state, and when the excited state returns to the ground state, it emits light. From such a mechanism, such a light emitting element is called a current excitation type light emitting element.

Inorganic EL devices are classified into dispersed inorganic EL devices and thin film type inorganic EL devices according to their device configurations. The dispersed inorganic EL device has a light emitting layer in which particles of a light emitting material are dispersed in a binder, and the light emitting mechanism is donor-acceptor recombination type light emission utilizing a donor level and an acceptor level. The thin-film inorganic EL device has a structure in which a light emitting layer is sandwiched between dielectric layers and further sandwiched between electrodes, and the light emitting mechanism is localized light emission utilizing the inner-shell electronic transition of metal ions. Here, an organic EL element will be used as the light emitting element. Further, as the thin film transistor that controls the drive of the light emitting element, the thin film transistor of the second embodiment is used. The light emitting device using the thin film transistor obtained in the second embodiment can suppress the fluctuation of the threshold value of the thin film transistor, which leads to the improvement of reliability. In particular, since the thin film transistor used in the light emitting device is driven by DC, the gate insulating film has a three-layer structure, the first layer is a silicon nitride film, the second layer is a silicon oxide film, and the third layer is a silicon nitride film. In the thin film transistor of the second form, the drift of the threshold can be suppressed mainly by the second layer of the silicon oxide film.

Through the steps of FIGS. 12 to 14, the thin film transistor 83 is formed on the substrate 50 as shown in FIG. 22, and the insulating film 76 that functions as a protective film is formed on the thin film transistor 83. A thin film transistor 84 is also formed in the drive circuit 12. The thin film transistor 84 can be manufactured in the same process as the thin film transistor 83 of the pixel portion 11. Next, the flattening film 93 is formed on the insulating film 76, and the pixel electrode 94 connected to the source electrode or the drain electrode of the thin film transistor 83 is formed on the flattening film 93.

The flattening film 93 is preferably formed using an organic resin such as acrylic, polyimide, or polyamide, or siloxane.

In FIG. 22 (A), since the thin film transistor of the pixel portion 11 is n-type, it is desirable to use a cathode as the pixel electrode 94, but when using a p-type thin film transistor, it is desirable to use an anode. Specifically, as the cathode, a known material having a small work function, for example, calcium, aluminum, calcium fluoride, magnesium silver alloy, lithium aluminum alloy or the like can be used.

Next, as shown in FIG. 22 (B), a partition wall 91 is formed on the ends of the flattening film 93 and the pixel electrode 94. The partition wall 91 has an opening, and the pixel electrode 94 is exposed in the opening. The partition wall 91 is formed by using an organic resin film, an inorganic insulating film, or an organic polysiloxane. In particular, it is preferable to use a photosensitive material to form an opening on the pixel electrode so that the side wall of the opening has an inclined surface formed with a continuous curvature.

Next, the light emitting layer 95 is formed so as to be in contact with the pixel electrode 94 at the opening of the partition wall 91. The light emitting layer 95 may be composed of a single layer or may be configured such that a plurality of layers are laminated.

Then, a common electrode 96 that functions as an anode is formed so as to cover the light emitting layer 95. The common electrode 96 can be formed of a translucent conductive film using the conductive material having translucency listed as the pixel electrode 77 in the second embodiment. In addition to the translucent conductive film described above, a titanium nitride film or a titanium film may be used as the common electrode 96. In FIG. 22 (B), indium tin oxide is used as the common electrode 96. The light emitting element 98 is formed by overlapping the pixel electrode 94, the light emitting layer 95, and the common electrode 96 at the opening of the partition wall 91. After that, it is preferable to form the protective film 97 on the common electrode 96 and the partition wall 91 so that oxygen, water, carbon dioxide and the like do not enter the light emitting element 98. As the protective film 97, a silicon nitride film, a silicon oxide film, a DLC film, or the like can be formed.

Furthermore, in reality, when completed up to Fig. 22 (B), it is packaged with a protective film (laminated film, UV curable resin film, etc.) or cover material that is highly airtight and has little degassing so that it will not be exposed to the outside air. (Enclosed) is preferable.

Next, the configuration of the light emitting element will be described with reference to FIG. 23. Here, the cross-sectional structure of the pixel will be described by taking the case where the driving TFT is n-type as an example.

The light emitting element may have at least one of the anode and the cathode transparent in order to extract light emission. Then, a thin film transistor and a light emitting element are formed on the substrate, and top surface injection that extracts light emission from the surface opposite to the substrate, bottom surface injection that extracts light emission from the surface on the substrate side, and the surface on the substrate side and the surface opposite to the substrate. There is a light emitting device having a double-sided injection structure that extracts light from the light emitting device, and the pixel configuration of the present invention can be applied to a light emitting device having any injection structure.

A light emitting element having a top injection structure will be described with reference to FIG. 23 (A).

FIG. 23 (A) shows a cross-sectional view of the pixels when the driving TFT7001 is n-type and the light emitted from the light emitting element 7002 escapes to the anode 7005 side. In FIG. 23 (A), the cathode 7003 of the light emitting element 7002 and the driving TFT 7001 are electrically connected, and the light emitting layer 7004 and the anode 7005 are laminated in this order on the cathode 7003. As the cathode 7003, a known material can be used as long as it has a small work function and is a conductive film that reflects light. For example, calcium, aluminum, calcium fluoride, magnesium silver alloy, lithium aluminum alloy and the like are desirable. The light emitting layer 7004 may be composed of a single layer or may be configured such that a plurality of layers are laminated. When composed of a plurality of layers, the electron injection layer, the electron transport layer, the light emitting layer, the hole transport layer, and the hole injection layer are laminated in this order on the cathode 7003. It is not necessary to provide all of these layers. The anode 7005 is formed by using a translucent conductive material that transmits light. For example, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, and titanium oxide are used. A conductive film having translucency such as indium tin oxide, indium tin oxide, indium zinc oxide, and indium tin oxide to which silicon oxide is added may be used.

The region sandwiching the light emitting layer 7004 between the cathode 7003 and the anode 7005 corresponds to the light emitting element 7002. In the case of the pixel shown in FIG. 23 (A), the light emitted from the light emitting element 7002 is emitted to the anode 7005 side as shown by the white arrow.

Next, a light emitting element having a bottom injection structure will be described with reference to FIG. 23 (B). The cross-sectional view of the pixel is shown when the driving TFT7011 is n type and the light emitted from the light emitting element 7012 is emitted to the cathode 7013 side. In FIG. 23 (B), the cathode 7013 of the light emitting element 7012 is formed on the light-transmitting conductive material 7017 electrically connected to the driving TFT 7011, and the light emitting layer 7014 is formed on the cathode 7013. Anodes 7015 are stacked in order. When the anode 7015 has translucency, a shielding film for reflecting or shielding light may be formed so as to cover the anode. As the cathode 7013, a known material can be used as long as it is a conductive film having a small work function, as in the case of FIG. 23 (A). However, the film thickness should be such that light is transmitted (preferably about 5 nm to 30 nm). For example, Al having a film thickness of 20 nm can be used as the cathode 7013. As in FIG. 23A, the light emitting layer 7014 may be composed of a single layer or may be configured such that a plurality of layers are laminated. The anode 7015 does not need to transmit light, but can be formed by using a conductive material having translucency, as in FIG. 23 (A). As the shielding film, for example, a metal that reflects light can be used, but the shielding film is not limited to the metal film. For example, a resin to which a black pigment is added can also be used.

The region of the cathode 7013 and the anode 7015 sandwiching the light emitting layer 7014 corresponds to the light emitting element 7012. In the case of the pixel shown in FIG. 23 (B), the light emitted from the light emitting element 7012 is emitted to the cathode 7013 side as shown by the white arrow.

Next, a light emitting element having a double-sided injection structure will be described with reference to FIG. 23 (C). In FIG. 23 (C), the cathode 7023 of the light emitting element 7022 is formed on the light-transmitting conductive material 7027 electrically connected to the driving TFT 7021, and the light emitting layer 7024 is formed on the cathode 7023. Anodes 7025 are stacked in order. As the cathode 7023, a known material can be used as long as it is a conductive film having a small work function, as in the case of FIG. 23 (A). However, the film thickness should be such that light is transmitted. For example, Al having a film thickness of 20 nm can be used as the cathode 7023. As in FIG. 23 (A), the light emitting layer 7024 may be composed of a single layer or may be configured such that a plurality of layers are laminated. The anode 7025 can be formed by using a conductive material having a translucent light-transmitting property, as in FIG. 23 (A).

The portion where the cathode 7023, the light emitting layer 7024, and the anode 7025 overlap corresponds to the light emitting element 7022. In the case of the pixel shown in FIG. 23 (C), the light emitted from the light emitting element 7022 is emitted to both the anode 7025 side and the cathode 7023 side as shown by the white arrows.

Although the organic EL element has been described here as the light emitting element, it is also possible to provide an inorganic EL element as the light emitting element.

In the present embodiment, an example is shown in which the thin film transistor (driving TFT) that controls the driving of the light emitting element and the light emitting element are electrically connected, but for current control between the driving TFT and the light emitting element. The configuration may be such that the TFT is connected.

The light emitting device shown in the present embodiment is not limited to the configuration shown in FIG. 23, and various modifications based on the technical idea of the present invention are possible.

A light emitting device can be manufactured by the above steps. The light emitting device of the present embodiment is a light emitting device having high contrast and high visibility because it uses a thin film transistor having a small off current, excellent electrical characteristics, and high reliability.

(Embodiment 8) The configuration of the display panel, which is one form of the display device of the present invention, is shown below.

FIG. 24A shows a form of a display panel in which only the signal line drive circuit 6013 is separately formed and connected to the pixel portion 6012 formed on the substrate 6011. The pixel unit 6012 and the scanning line drive circuit 6014 are formed by using a thin film transistor using a microcrystalline semiconductor film. By forming a signal line drive circuit with transistors that can obtain higher mobility than a thin film transistor using a polycrystalline semiconductor film, the operation of the signal line drive circuit that requires a higher drive frequency than the scan line drive circuit is stabilized. be able to. The signal line drive circuit 6013 may be a transistor using a single crystal semiconductor, a thin film transistor using a polycrystalline semiconductor, or a transistor using SOI. The potential of the power supply, various signals, and the like are supplied to the pixel unit 6012, the signal line drive circuit 6013, and the scanning line drive circuit 6014, respectively, via the FPC 6015.

The signal line drive circuit and the scanning line drive circuit may both be formed on the same substrate as the pixel portion.

Further, when the drive circuit is separately formed, it is not always necessary to bond the substrate on which the drive circuit is formed on the substrate on which the pixel portion is formed, and for example, the substrate may be bonded on the FPC. FIG. 24B shows a form of a liquid crystal display device panel in which only the signal line drive circuit 6023 is separately formed and connected to the pixel portion 6022 and the scanning line drive circuit 6024 formed on the substrate 6021. The pixel portion 6022 and the scanning line drive circuit 6024 are formed by using a thin film transistor using a microcrystalline semiconductor film. The signal line drive circuit 6023 is connected to the pixel unit 6022 via the FPC6025. The potential of the power supply, various signals, and the like are supplied to the pixel unit 6022, the signal line drive circuit 6023, and the scanning line drive circuit 6024, respectively, via the FPC 6025.

Further, only a part of the signal line drive circuit or a part of the scanning line drive circuit is formed on the same substrate as the pixel portion by using a thin film transistor using a microcrystalline semiconductor film, and the rest is separately formed to form the pixel portion. It may be connected electrically. In FIG. 24C, the analog switch 6033a of the signal line drive circuit is formed on the same board 6031 as the pixel section 6032 and the scanning line drive circuit 6034, and the shift register 6033b of the signal line drive circuit is separately placed on a different board. The form of the liquid crystal display device panel which is formed and bonded is shown. The pixel portion 6032 and the scanning line drive circuit 6034 are formed by using a thin film transistor using a microcrystalline semiconductor film. The shift register 6033b included in the signal line drive circuit is connected to the pixel unit 6032 via the FPC6035. The potential of the power supply, various signals, and the like are supplied to the pixel unit 6032, the signal line drive circuit, and the scanning line drive circuit 6034, respectively, via the FPC 6035.

As shown in FIG. 24, in the liquid crystal display device of the present invention, a part or all of the drive circuit can be formed on the same substrate as the pixel portion by using a thin film transistor using a microcrystalline semiconductor film.

The method for connecting the separately formed substrate is not particularly limited, and a known COG method, wire bonding method, TAB method, or the like can be used. Further, the connecting position is not limited to the position shown in FIG. 24 as long as electrical connection is possible. Further, a controller, a CPU, a memory and the like may be separately formed and connected.

The signal line drive circuit used in the present invention is not limited to a form having only a shift register and an analog switch. In addition to the shift register and analog switch, it may have other circuits such as a buffer, a level shifter, and a source follower. Further, it is not always necessary to provide a shift register and an analog switch. For example, another circuit that can select a signal line such as a decoder circuit may be used instead of the shift register, or a latch or the like may be used instead of the analog switch. You may.

(Embodiment 9) The appearance and cross section of the liquid crystal display panel corresponding to one form of the display device of the present invention will be described with reference to FIG. FIG. 25A shows a panel in which a thin film transistor 4010 having a microcrystalline semiconductor film formed on the first substrate 4001 and a liquid crystal element 4013 are sealed between the thin film transistor 4010 and the liquid crystal element 406 with a sealing material 4005. It is a top view, and FIG. 25 (B) corresponds to a cross-sectional view taken along the line A-A'of FIG. 25 (A).

A sealing material 4005 is provided so as to surround the pixel portion 4002 provided on the first substrate 4001 and the scanning line drive circuit 4004. Further, a second substrate 4006 is provided on the pixel unit 4002 and the scanning line drive circuit 4004. Therefore, the pixel portion 4002 and the scanning line drive circuit 4004 are sealed together with the liquid crystal 4008 by the first substrate 4001, the sealing material 4005, and the second substrate 4006. Further, a signal line drive circuit 4003 formed of a polycrystalline semiconductor film is mounted on a separately prepared substrate in a region different from the region surrounded by the sealing material 4005 on the first substrate 4001. In this embodiment, an example in which a signal line drive circuit having a thin film transistor using a polycrystalline semiconductor film is bonded to the first substrate 4001 will be described. However, the signal line drive circuit is formed by a transistor using a single crystal semiconductor. It may be formed and pasted together. FIG. 25 illustrates a thin film transistor 4009 formed of a polycrystalline semiconductor film included in the signal line drive circuit 4003.

Further, the pixel unit 4002 provided on the first substrate 4001 and the scanning line drive circuit 4004 have a plurality of thin film transistors, and FIG. 25 (B) illustrates the thin film transistor 4010 included in the pixel unit 4002. ing. The thin film transistor 4010 corresponds to a thin film transistor using a microcrystalline semiconductor film.

Further, 4013 corresponds to a liquid crystal element, and the pixel electrode 4030 of the liquid crystal element 4013 is electrically connected to the thin film transistor 4010 via the wiring 4040. The counter electrode 4031 of the liquid crystal element 4013 is formed on the second substrate 4006. The portion where the pixel electrode 4030, the counter electrode 4031, and the liquid crystal 4008 overlap corresponds to the liquid crystal element 4013.

As the first substrate 4001 and the second substrate 4006, glass, metal (typically stainless steel), ceramics, and plastic can be used. As the plastic, an FRP (Fiberglass-Reinforced Plastics) plate, a PVF (polyvinyl fluoride) film, a polyester film, or an acrylic resin film can be used. Further, a sheet having a structure in which aluminum foil is sandwiched between a PVF film or a polyester film can also be used.

Further, 4035 is a spherical spacer, which is provided to control the distance (cell gap) between the pixel electrode 4030 and the counter electrode 4031. A spacer obtained by selectively etching the insulating film may be used.

Further, various signals and potentials given to the separately formed signal line drive circuit 4003 and the scanning line drive circuit 4004 or the pixel unit 4002 are supplied from the FPC 4018 via the routing wires 4014 and 4015.

In the present embodiment, the connection terminal 4016 is formed of the same conductive film as the pixel electrode 4030 of the liquid crystal element 4013. Further, the routing wires 4014 and 4015 are formed of the same conductive film as the wiring 4040.

The connection terminal 4016 is electrically connected to the terminal of the FPC 4018 via the anisotropic conductive film 4019.

Although not shown, the liquid crystal display device shown in the present embodiment may have an alignment film and a polarizing plate, and may further have a color filter and a shielding film.

Further, FIG. 25 shows an example in which the signal line drive circuit 4003 is separately formed and mounted on the first substrate 4001, but the present embodiment is not limited to this configuration. The scanning line drive circuit may be separately formed and mounted, or only a part of the signal line driving circuit or a part of the scanning line driving circuit may be separately formed and mounted.

This embodiment can be implemented in combination with the configurations described in other embodiments.

(Embodiment 10) Next, the appearance and cross section of the light emitting display panel corresponding to one form of the display device of the present invention will be described with reference to FIG. 26. FIG. 26 (A) is a top view of a panel in which a thin film transistor and a light emitting element using a microcrystalline semiconductor film formed on the first substrate are sealed between the thin film transistor and the light emitting element with a sealing material. , FIG. 26 (B) corresponds to the cross-sectional view in A-A'of FIG. 26 (A).

A sealing material 4005 is provided so as to surround the pixel portion 4002 provided on the first substrate 4001 and the scanning line drive circuit 4004. Further, a second substrate 4006 is provided on the pixel unit 4002 and the scanning line drive circuit 4004. Therefore, the pixel portion 4002 and the scanning line drive circuit 4004 are sealed together with the filler 4007 by the first substrate 4001, the sealing material 4005, and the second substrate 4006. Further, a signal line drive circuit 4003 formed of a polycrystalline semiconductor film is mounted on a separately prepared substrate in a region different from the region surrounded by the sealing material 4005 on the first substrate 4001. In this embodiment, an example in which a signal line drive circuit having a thin film transistor using a polycrystalline semiconductor film is bonded to the first substrate 4001 will be described. However, the signal line drive circuit is formed by a transistor using a single crystal semiconductor. It may be formed and pasted together. FIG. 26B exemplifies a thin film transistor 4009 formed of a polycrystalline semiconductor film included in the signal line drive circuit 4003.

Further, the pixel unit 4002 provided on the first substrate 4001 and the scanning line drive circuit 4004 have a plurality of thin film transistors, and FIG. 26 (B) illustrates the thin film transistor 4010 included in the pixel unit 4002. ing. In the present embodiment, it is assumed that the thin film transistor 4010 is a driving TFT, but the thin film transistor 4010 may be a current control TFT or an erasing TFT. The thin film transistor 4010 corresponds to a thin film transistor using a microcrystalline semiconductor film.

Further, 4011 corresponds to a light emitting element, and the pixel electrode 4017 included in the light emitting element 4011 is electrically connected to the source electrode or the drain electrode of the thin film transistor 4010 via the wiring 4020. In the present embodiment, the common electrode of the light emitting element 4011 and the translucent conductive film 4012 are electrically connected. The configuration of the light emitting element 4011 is not limited to the configuration shown in the present embodiment. The configuration of the light emitting element 4011 can be appropriately changed according to the direction of the light extracted from the light emitting element 4011 and the polarity of the thin film transistor 4010.

Further, various signals and potentials given to the separately formed signal line drive circuit 4003 and the scanning line drive circuit 4004 or the pixel unit 4002 are not shown in the cross-sectional view shown in FIG. 26 (B), but are routed wiring 4014. And from FPC4018 via 4015.

In the present embodiment, the connection terminal 4016 is formed of the same conductive film as the pixel electrode 4017 of the light emitting element 4011. Further, the routing wires 4014 and 4015 are formed of the same conductive film as the wiring 4020.

The connection terminal 4016 is electrically connected to the terminal of the FPC 4018 via the anisotropic conductive film 4019.

The second substrate located in the direction of light extraction from the light emitting element 4011 must be transparent. In that case, a translucent material such as a glass plate, a plastic plate, a polyester film or an acrylic film is used.

Further, as the filler 4007, in addition to an inert gas such as nitrogen or argon, an ultraviolet curable resin or a thermosetting resin can be used, and PVC (polyvinyl chloride), acrylic, polyimide, epoxy resin, silicon resin, PVB can be used. (Polyimide butyral) or EVA (ethylene vinyl acetate) can be used. In this embodiment, nitrogen was used as the filler.

If necessary, an optical film such as a polarizing plate, a circular polarizing plate (including an elliptical polarizing plate), a retardation plate (λ / 4 plate, λ / 2 plate), or a color filter is attached to the ejection surface of the light emitting element. It may be provided as appropriate. Further, an antireflection film may be provided on the polarizing plate or the circular polarizing plate. For example, it is possible to apply an anti-glare treatment that can reduce reflection by diffusing reflected light due to the unevenness of the surface.

Note that FIG. 26 shows an example in which the signal line drive circuit 4003 is separately formed and mounted on the first substrate 4001, but the present embodiment is not limited to this configuration. The scanning line drive circuit may be separately formed and mounted, or only a part of the signal line driving circuit or a part of the scanning line driving circuit may be separately formed and mounted.

This embodiment can be implemented in combination with the configurations described in other embodiments.

(Embodiment 11) The display device or the like obtained by the present invention can be used for an active matrix type display device module. That is, the present invention can be applied to all electronic devices incorporating them in the display unit.

Such electronic devices include cameras such as video cameras and digital cameras, head mount displays (goggles type displays), car navigation systems, projectors, car stereos, personal computers, personal digital assistants (mobile computers, mobile phones or electronic books, etc.). ) And so on. An example of them is shown in FIG.

FIG. 27 (A) is a television device. As shown in FIG. 27 (A), the display module can be incorporated into the housing to complete the television device. The display panel attached to the FPC is also called a display module. The main screen 2003 is formed by the display module, and other accessory equipment such as speaker section 2009 and operation switches are provided. In this way, the television device can be completed.

As shown in FIG. 27 (A), a display panel 2002 using a display element is incorporated in the housing 2001, and a general television broadcast is received by the receiver 2005, and by wire or wireless via a modem 2004. By connecting to a communication network, information communication can be performed in one direction (from the sender to the receiver) or in two directions (between the sender and the receiver, or between the receivers). The television device can be operated by a switch built into the housing or a separate remote controller 2006, and this remote controller is also provided with a display unit 2007 that displays information to be output. Is also good.

Further, the television device may be provided with a configuration in which a sub screen 2008 is formed by a second display panel in addition to the main screen 2003 to display channels, volume, and the like. In this configuration, the main screen 2003 may be formed of a liquid crystal display panel having an excellent viewing angle, and the sub screen may be formed of a light emitting display panel capable of displaying with low power consumption. Further, in order to give priority to low power consumption, the main screen 2003 may be formed of a light emitting display panel, the sub screen may be formed of a light emitting display panel, and the sub screen may be blinkable.

Of course, the present invention is not limited to television devices, and is applied to various uses as a large-area display medium such as a personal computer monitor, an information display board at a railway station or an airport, or an advertisement display board on a street. can do.

FIG. 27 (B) shows an example of the mobile phone 2301. The mobile phone 2301 includes a display unit 2302, an operation unit 2303, and the like. By applying the display device described in the above embodiment to the display unit 2302, mass productivity can be improved.

Further, the portable computer shown in FIG. 27 (C) includes a main body 2401, a display unit 2402, and the like. By applying the display device shown in the above embodiment to the display unit 2402, mass productivity can be improved.

FIG. 27 (D) is a tabletop luminaire, which includes a lighting unit 2501, an umbrella 2502, a variable arm 2503, a support 2504, a stand 2505, and a power supply 2506. It is manufactured by using the light emitting device described in the tenth embodiment for the illumination unit 2501. The lighting fixtures include ceiling-fixed lighting fixtures and wall-mounted lighting fixtures. By applying the display device shown in the above embodiment, mass productivity can be enhanced, and an inexpensive tabletop lighting fixture can be provided.

<figref num="1">Top view showing an example of a film forming apparatus.</figref><figref num="2">Top view showing an example of a film forming apparatus.</figref><figref num="3">A partially enlarged view of the film forming apparatus.</figref><figref num="4">It is sectional drawing explaining the manufacturing method of this invention.</figref><figref num="5">It is sectional drawing explaining the manufacturing method of this invention.</figref><figref num="6">It is sectional drawing explaining the manufacturing method of this invention.</figref><figref num="7">It is a top view explaining the manufacturing method of this invention.</figref><figref num="8">It is a figure which shows an example of the time chart explaining the process of forming a microcrystalline silicon film.</figref><figref num="9">It is sectional drawing explaining the manufacturing method of this invention.</figref><figref num="10">It is sectional drawing of the semiconductor device.</figref><figref num="11">It is a figure explaining the multi-gradation mask applicable to this invention.</figref><figref num="12">The figure which shows the sectional view of the manufacturing process of this invention.</figref><figref num="13">The figure which shows the sectional view of the manufacturing process of this invention.</figref><figref num="14">The figure which shows the sectional view of the manufacturing process of this invention.</figref><figref num="15">The figure which shows the top view of the manufacturing process of this invention.</figref><figref num="16">It is a figure explaining an example of a liquid crystal display device.</figref><figref num="17">It is a figure explaining an example of a liquid crystal display device.</figref><figref num="18">It is a figure explaining an example of a liquid crystal display device.</figref><figref num="19">It is an equivalent circuit diagram of the pixel of the liquid crystal display device.</figref><figref num="20">It is a figure explaining an example of a liquid crystal display device.</figref><figref num="21">It is a figure explaining an example of a liquid crystal display device.</figref><figref num="22">It is sectional drawing explaining an example of the manufacturing method of a light emitting device.</figref><figref num="23">It is sectional drawing explaining the pixel applicable to a light emitting device.</figref><figref num="24">It is a perspective view explaining the display panel.</figref><figref num="25">It is the top view and sectional drawing explaining the display panel.</figref><figref num="26">It is the top view and sectional drawing explaining the display panel.</figref><figref num="27">It is a perspective view explaining an electronic device.</figref>

Code description

11: Pixel part 12: Drive circuit 23: Microcrystalline semiconductor film 50: Substrate 51: Gate electrode 52a, 52b, 52c: Gate insulating film 53: Microcrystalline semiconductor film 54: Buffer layer 55: Semiconductor film to which impurities that impart a conductive type are added 56: Resist mask 59: Multi-tone mask 61: Microcrystalline semiconductor film 62: Buffer layer 63: Semiconductor film to which impurities that impart a conductive type are added 65a, 65b, 65c: Conductive 66: Resist mask 71a, 71b, 71c: Source and drain electrodes 72: Source area and drain area 73: Buffer layer 74: Thin film transistor 76: Insulating film 77: Pixel electrode 80: Resist mask 81: Resist mask 82: Flattening film 83: Thin film transistor 84: Thin film transistor 85a ~ 85c conductive film 87: Buffer layer 86: Resist mask 88: Source area and drain area 89a, 89b, 89c: Conductive 90: Microcrystalline semiconductor film 91: Septum 92a, 92b, 92c: Source and drain electrodes 93: Flattening film 94: Pixel electrode 95: Light emitting layer 96: Common electrode 97: Protective film 98: Light emitting element 101: Road room 102: Transport room 103: Vacuum chamber 104: Second bag 105: First bag 106: First space 107: Second space 108: Transfer robot 109: Cassette 110: Substrate to be processed 111: Position 125: Bubble wrap 126: Gap 127: Bubbles 200: Vacuum exhaust 201: Precoat 202: Board delivery 203: Groundwork pretreatment 204: Film formation process 205: Board removal 206: Cleaning 207: dashed line