Package substrate and fabricating method of the same
19 claims: 2 independent, 17 dependent
- 1少なくとも一つの導電性パッドを具備した基板と、 前記基板上に提供され、前記導電性パッドを露出させる開口部を有する絶縁層と、 前記開口部内の前記導電性パッド上に形成され、前記絶縁層の側壁に沿って前記絶縁層の上部面より高く形成される剥離防止層と、 前記剥離防止層上に形成される柱形端子と、 前記柱形端子上に形成されるはんだバンプと を含むことを特徴とするパッケージ基板。
- 2前記剥離防止層は前記開口部の形状に対応してコップ状に形成されることを特徴とする請求項1に記載のパッケージ基板。
- 3前記剥離防止層は銅からなることを特徴とする請求項1または2に記載のパッケージ基板。
- 4前記剥離防止層は前記剥離防止層の最下部にメッキシード層を含むことを特徴とする請求項1から3の何れか1項に記載のパッケージ基板。
- 5前記剥離防止層及び前記柱形端子は電解メッキ法で形成されることを特徴とする請求項1から4の何れか1項に記載のパッケージ基板。
- 6前記柱形端子は錫(tin)及び銅(copper)の合金からなることを特徴とする請求項1から5の何れか1項に記載のパッケージ基板。
- 7前記銅(copper)の含量は0.2wt%~4wt%であることを特徴とする請求項6に記載のパッケージ基板。
- 8前記はんだバンプは錫(tin)及びビズマス(bismuth)の合金からなることを特徴とする請求項1から7の何れか1項に記載のパッケージ基板。
- 9少なくとも一つの導電性パッドを具備した基板を用意する段階と、 前記基板上に前記導電性パッドを露出させるように開口部を有する絶縁層を形成する段階と、 前記開口部内の前記導電性パッド上に、前記絶縁層の側壁に沿って前記絶縁層の上部面より高く剥離防止層を形成する段階と、 前記剥離防止層上に柱形端子を形成する段階と、 前記柱形端子上にはんだバンプを形成する段階と を含むことを特徴とするパッケージ基板の製造方法。
- 10前記剥離防止層を形成する段階の前に、 前記絶縁層上にメッキシード層を形成する段階と、 前記メッキシード層上に前記剥離防止層形成のためのドライフィルムパターンを形成する段階と、をさらに含むことを特徴とする請求項9に記載のパッケージ基板の製造方法。
- 11前記ドライフィルムパターンを形成する段階は、 前記メッキシード層上にドライフィルムレジストを形成する段階と、 前記ドライフィルムレジストを露光及び現像して前記ドライフィルムパターンを形成する段階と、を含むことを特徴とする請求項10に記載のパッケージ基板の製造方法。
- 12前記剥離防止層は前記開口部の形状に対応してコップ状に形成されることを特徴とする請求項9から11の何れか1項に記載のパッケージ基板の製造方法。
- 13前記剥離防止層は銅で形成されることを特徴とする請求項9から12の何れか1項に記載のパッケージ基板の製造方法。
- 14前記剥離防止層及び前記柱形端子は電解メッキ法で形成されることを特徴とする請求項9から13の何れか1項に記載のパッケージ基板の製造方法。
- 15前記柱形端子は、前記柱形端子を成す粒子の大きさが小さく形成されるように、0.5ASD(A/dm 2 )~3ASD(A/dm 2 )で電解メッキされることを特徴とする請求項14に記載のパッケージ基板の製造方法。
- 16前記柱形端子は錫(tin)及び銅(copper)の合金で形成されることを特徴とする請求項9から15の何れか1項に記載のパッケージ基板の製造方法。
- 17前記柱形端子は、前記銅(copper)の含量が0.2wt%~4wt%になるように形成されることを特徴とする請求項16に記載のパッケージ基板の製造方法。
- 18前記はんだバンプは錫(tin)及びビズマス(bismuth)の合金で形成されることを特徴とする請求項9から17の何れか1項に記載のパッケージ基板の製造方法。
- 19前記はんだバンプを形成する段階の後に、リフロー段階をさらに含むことを特徴とする請求項9から18の何れか1項に記載のパッケージ基板の製造方法。
Independent claims19
43 paragraphs, as filed
The present invention relates to a package substrate and a method for manufacturing the same, and more particularly to a package substrate and a method for manufacturing the same, which can improve the process of forming and forming a columnar terminal and control the degree of warpage deformation of the substrate.
The flip chip package has a structure in which a chip and a solder bump formed on a substrate are used to connect the flip chip package.
Flip-chip packages used for high-speed, large-capacity data processing have a gradual decrease in bump pitch due to an increase in semiconductor data processing capacity and a tendency toward lightness, thinness, shortness, and smallness.
The change in packaging associated with such a tendency causes a problem of deterioration of bump reliability, and improvements are being made promptly.
Conventionally, in order to improve the bump connection reliability between the substrate and the chip, the solder is replaced with copper, which has mechanical strength and is stable, as the material for the bump on the chip side, and a copper post is also formed as the bump on the substrate side. Structure has been proposed.
A solder is generally used as a medium for joining the copper formed on the chip and the substrate, but usually the solder is printed or plated on the copper post formed on the substrate. ing. However, the copper post solder bumps as described above have some problems. Due to the nature of copper, copper posts are easily oxidized and have high hardness, so if a warpage phenomenon occurs between the substrate and the chip, the copper posts may crack and further short circuits may occur.
As a result, there have been attempts to replace copper posts with various alloy materials. However, in the process of forming a post selected for such an alloy material, a peeling phenomenon of the dry film occurs between the metal seed layer and the dry film, and an insulating layer that should not be plated is plated, or conversely. There was a problem that the pad to be plated was not plated at all.
<p> The present invention has been made in view of the above-mentioned problems, and provides a package substrate and a method for manufacturing the same, which can improve the process of forming and forming a columnar terminal and control the degree of warpage deformation of the substrate. That is the purpose.</p>
<p> In order to achieve the above object, one embodiment of the present invention comprises a substrate provided with at least one conductive pad and an insulating layer provided on the substrate and having an opening for exposing the conductive pad. An anti-peel layer formed on the conductive pad in the opening and higher than the upper surface of the insulating layer along the side wall of the insulating layer, and a pillar-shaped terminal formed on the anti-peel layer. A package substrate including the solder bumps formed on the pillar-shaped terminals and the solder bumps formed on the pillar-shaped terminals is provided.</p><p> Here, the peeling prevention layer may be formed in a cup shape corresponding to the shape of the opening.</p><p> Further, the peeling prevention layer may be made of copper.</p><p> Further, the peeling prevention layer may include a plating seed layer at the bottom of the peeling prevention layer.</p><p> Then, the peeling prevention layer and the pillar-shaped terminal may be formed by an electrolytic plating method.</p><p> The pillar-shaped terminal may be made of an alloy of tin and copper.</p><p> Here, the content of the copper may be 0.2 wt% to 4 wt%.</p><p> Further, the solder bump may be made of an alloy of tin and bismuth.</p><p> In order to achieve the above object, another embodiment of the present invention includes a step of preparing a substrate having at least one conductive pad and an opening on the substrate so as to expose the conductive pad. The step of forming the insulating layer to have, the step of forming the peeling prevention layer on the conductive pad in the opening along the side wall of the insulating layer and higher than the upper surface of the insulating layer, and the step of forming the peeling prevention layer on the peeling prevention layer. Provided is a method for manufacturing a package substrate including a step of forming a columnar terminal and a step of forming a solder bump on the columnar terminal.</p><p> Here, before the step of forming the peeling prevention layer, a step of forming a plating seed layer on the insulating layer and a step of forming a dry film pattern for forming the peeling prevention layer on the plating seed layer. And may be further included.</p><p> Further, the step of forming the dry film pattern may include a step of forming a dry film resist on the plating seed layer and a step of exposing and developing the dry film resist to form the dry film pattern. Good.</p><p> Here, the peeling prevention layer may be formed in a cup shape corresponding to the shape of the opening.</p><p> Further, the peeling prevention layer may be made of copper.</p><p> Then, the peeling prevention layer and the pillar-shaped terminal may be formed by an electrolytic plating method.</p><p> Here, the pillar-shaped terminal is 0.5 ASD (A / dm) so that the size of the particles forming the pillar-shaped terminal is formed small.<sup>2</sup>) ~ 3 ASD (A / dm)<sup>2</sup>) May be electrolytically plated.</p><p> Further, the pillar-shaped terminal may be formed of an alloy of tin and copper.</p><p> Here, the pillar-shaped terminal may be formed so that the content of the copper (copper) is 0.2 wt% to 4 wt%.</p><p> Further, the solder bumps may be formed of an alloy of tin and bismuth.</p><p> Then, after the step of forming the solder bump, a reflow step may be further included.</p>
<p> According to the present invention, it is possible to provide a package substrate and a method for manufacturing the same, which can improve the process of forming and forming a columnar terminal and control the degree of warpage deformation of the substrate.</p><p> Further, during the plating process, it is possible to prevent the peeling phenomenon of the dry film pattern in advance, perform plating at a place desired by the user, and prevent plating at a place not desired.</p><p> Further, it is possible to form the solder bumps with a substance having a melting point lower than that of the substance constituting the columnar terminals, and prevent the solder bumps and the columnar terminals from melting together at the time of reflow.</p>
<figref num="1">It is sectional drawing which shows typically the package substrate by embodiment of this invention.</figref><figref num="2a">It is sectional drawing which shows typically the process of forming the package substrate by embodiment of this invention.</figref><figref num="2b">It is sectional drawing which shows typically the process of forming the package substrate by embodiment of this invention.</figref><figref num="2c">It is sectional drawing which shows typically the process of forming the package substrate by embodiment of this invention.</figref><figref num="2d">It is sectional drawing which shows typically the process of forming the package substrate by embodiment of this invention.</figref><figref num="2e">It is sectional drawing which shows typically the process of forming the package substrate by embodiment of this invention.</figref><figref num="2f">It is sectional drawing which shows typically the process of forming the package substrate by embodiment of this invention.</figref><figref num="2g">It is sectional drawing which shows typically the process of forming the package substrate by embodiment of this invention.</figref><figref num="2h">It is sectional drawing which shows typically the process of forming the package substrate by embodiment of this invention.</figref><figref num="2i">It is sectional drawing which shows typically the process of forming the package substrate by embodiment of this invention.</figref>
Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings.
However, embodiments of the present invention can be transformed into various other embodiments, and the scope of the invention is not limited to the embodiments described below. Also, embodiments of the present invention are provided to more fully explain the invention to those with average knowledge in the art. Therefore, the shape and size of the elements in the drawings may be exaggerated for clearer explanation, and the elements displayed with the same reference numerals in the drawings indicate the same elements.
Hereinafter, the package substrate according to the embodiment of the present invention will be described with reference to FIG.
FIG. 1 is a cross-sectional view schematically showing a package substrate according to an embodiment of the present invention.
The package substrate 1 according to the embodiment of the present invention includes a substrate 10 provided with at least one conductive pad 101, an insulating layer 102 provided on the substrate 10 and having an opening O for exposing the conductive pad 101. It is formed on the peeling prevention layer 105 and the peeling prevention layer 105 formed on the conductive pad 101 in the opening O and higher than the upper surface of the insulating layer 102 along the side wall of the insulating layer 102. The column-shaped terminal 106 and the solder bump 107 formed on the column-shaped terminal 106 are included.
Here, the peeling prevention layer 105 is formed in a cup shape corresponding to the shape of the opening O, and can be made of copper.
Further, the peeling prevention layer 105 includes a plating seed layer 103 at the lowermost portion of the peeling prevention layer 105. The plating seed layer 103 may be a chemical copper plating formed by electroless plating. The plating seed layer 103 serves as an electrode for the peeling prevention layer 105 and the columnar terminal 106, which are subsequently formed by electrolytic plating. Here, the peeling prevention layer 105 and the pillar-shaped terminal 106 are formed by electrolytic plating, but the method of forming the peeling prevention layer 105 and the pillar-shaped terminal 106 is not limited to this. For example, it can be formed by electroless plating without the plating seed layer 103.
The peeling prevention layer 105 is formed on the conductive pad 101 in the opening O, and is formed along the side wall of the insulating layer 102 and higher than the upper surface of the insulating layer 102. The peeling prevention layer 105 prevents interfacial permeation between the insulating layer 102 of the plating solution for forming the columnar terminal 106 and the dry film pattern for forming the columnar terminal 106 (not shown, see FIGS. 2d to 2h). By preventing the dry film pattern from peeling off, it is possible to prevent the problem of peeling of the dry film pattern from being plated at a place desired by the user and not being plated at a place not desired by the user.
A pillar-shaped terminal 106 can be formed on the peeling prevention layer 105 by an electrolytic plating method. The columnar terminal 106 is preferably made of an alloy of tin and copper. Here, the copper content may be 0.2 wt% to 4 wt%. If a pillar terminal 106 made of an alloy of tin and copper as described above is used instead of the existing pillar terminal made of copper mainly used, the substrate is provided due to the properties of the alloy of tin and copper which is softer than copper. It is possible to manufacture a package substrate 1 capable of controlling the degree of warpage deformation.
Solder bumps 107 are formed on the columnar terminals 106, and the solder bumps 107 are preferably made of an alloy of tin and bismuth. When the solder bump 107 is composed of an alloy of tin and bizmas having a melting point lower than the alloy of tin and copper constituting the column terminal 106, the column terminal 106 melts together when reflowing to form the solder bump 107. Can be prevented.
Hereinafter, a method for manufacturing a package substrate according to an embodiment of the present invention will be described with reference to FIGS. 2a to 2i.
2a to 2i are cross-sectional views schematically showing a step of forming a package substrate according to an embodiment of the present invention.
The method for manufacturing the package substrate 1 according to the embodiment of the present invention includes a step of preparing a substrate 10 provided with at least one conductive pad 101 and an opening O so that the conductive pad 101 is exposed on the substrate 10. A peeling prevention layer 105 is formed on the conductive pad 101 in the opening O along the side wall of the insulating layer 102 and higher than the upper surface of the insulating layer 102. It includes a step, a step of forming a columnar terminal 106 on the peeling prevention layer 105, and a step of forming a solder bump 107 on the columnar terminal 106.
As shown in FIG. 2a, an insulating layer 102 having an opening O is formed on a substrate 10 provided with at least one conductive pad 101 so that the conductive pad 101 is exposed. The insulating layer 102 can be formed of a photosensitive solder resist. That is, the solder resist can be applied, exposed and developed to form the insulating layer 102.
Next, as shown in FIG. 2b, the plating seed layer 103 is formed on the insulating layer 102 having the opening O. The plating seed layer 103 may be made of chemical copper plating formed by electroless plating. The plating seed layer 103 serves as an electrode for the peeling prevention layer 105 and the columnar terminal 106, which are subsequently formed by electrolytic plating.
Next, as shown in FIG. 2c, after forming the dry film resist 104'on the plating seed layer 103, the dry film resist 104' is exposed and developed to form a dry film pattern 104 as shown in FIG. 2d. Form.
Next, as shown in FIG. 2e, a peeling prevention layer 105 is formed on the conductive pad 101 in the opening O along the side wall of the insulating layer 102 and higher than the upper surface of the insulating layer 102.
Here, the peeling prevention layer 105 is formed in a cup shape corresponding to the shape of the opening O, and can be made of copper.
Further, the peeling prevention layer 105 can be formed by an electrolytic plating method using the plating seed layer 103 as an electrode.
Here, the peeling prevention layer 105 prevents interfacial permeation between the insulating layer 102 of the plating solution for forming the pillar-shaped terminal 106 and the dry film pattern 104 for forming the pillar-shaped terminal 106, which is subsequently formed, thereby preventing the dry film pattern. The peeling problem of 104 can be prevented in advance, and plating can be performed where the user desires and not where the user does not want to be plated.
Next, as shown in FIG. 2f, the pillar-shaped terminal 106 is formed on the peeling prevention layer 105. The pillar-shaped terminal 106 can also be formed by an electrolytic plating method, but the pillar-shaped terminal 106 is preferably made of an alloy of tin and copper. Here, the copper content may be 0.2 wt% to 4 wt%. If a pillar terminal 106 made of an alloy of tin and copper as described above is used instead of the existing pillar terminal made of copper that is often used, the substrate warps due to the properties of the alloy of tin and copper that is softer than copper. A package substrate 1 capable of controlling the degree of deformation can be manufactured.
Here, the peeling prevention layer 105 and the pillar-shaped terminal 106 are formed by electrolytic plating, but the method of forming the peeling prevention layer 105 and the pillar-shaped terminal 106 is not limited to this. For example, it can be formed by electroless plating without the plating seed layer 103.
The pillar-shaped terminal 106 is 0.5 ASD (A / dm) so that the particle size is formed small.<sup>2</sup>) ~ 3 ASD (A / dm)<sup>2</sup>) Is preferably electroplated. If a high current density is applied during the tin-copper alloy forming process, the size of the particles of the alloy may increase, causing volume expansion and inducing a phenomenon in which the dry film pattern 104 is peeled off. There is. Therefore, 0.5ASD (A / dm)<sup>2</sup>) ~ 3 ASD (A / dm)<sup>2</sup>) Is electroplated with an alloy of tin and copper to form the pillar-shaped terminal 106, so that the size of the particles forming the pillar-shaped terminal 106 is reduced.
Next, as shown in FIG. 2g, the solder paste 107'is printed on the pillar-shaped terminal 106.
Next, as shown in FIG. 2h, the solder paste 107'is reflowed to form the solder bump 107.
The solder bump 107 is preferably made of an alloy of tin and bismuth. When the solder bump 107 is composed of an alloy of tin and bizmas having a melting point lower than the alloy of tin and copper constituting the column terminal 106, the column terminal 106 melts together when reflowing to form the solder bump 107. Can be prevented.
Next, as shown in FIG. 2i, after removing the dry film pattern 104 for forming the columnar terminal 106, the plating seed layer 103 on the lower surface of the dry film pattern 104 is removed to complete the package substrate 1 shown in FIG. ..
The present invention is not limited by the embodiments described above and the accompanying drawings, but is limited by the appended claims. Therefore, various forms of substitution, modification, and modification are possible to those who have ordinary knowledge in the art without departing from the technical idea of the present invention described in the claims. Also belongs to the scope of the present invention.
According to the embodiment of the present invention, it is possible to provide a package substrate and a method for manufacturing the same, which can improve the process of forming and forming the columnar terminal and control the degree of warpage deformation of the substrate.
Further, during the plating step, it is possible to prevent the peeling phenomenon of the dry film pattern in advance so that the plating is performed at a place desired by the user and not at a place not desired.
Further, it is possible to form the solder bump with a substance having a melting point lower than that of the substance constituting the column-shaped terminal, and prevent the solder bump and the column-shaped terminal from melting together at the time of reflow.
1: Package board 10: Board 101: Conductive pad 102: Insulation layer 105: Peeling prevention layer 106: Pillar terminal 107: Solder bump
10 sheets
Sheet 1 Sheet 2 Sheet 3 Sheet 4 Sheet 5 Sheet 6 Sheet 7 Sheet 8 Sheet 9 Sheet 10
Every citation, both ways
| Document | Relation | Office |
|---|---|---|
| JP2002329966A | Cites | Japan |
| JP2006179797A | Cites | Japan |
| JP2004207317A | Cites | Japan |
8 members in 3 offices
Priority claims2
| Document | Office | Kind | Date |
|---|---|---|---|
| 1020090121098 | Republic of Korea | – | |
| 20090121098 | Republic of Korea | A |
Members8
| Document | Office | Kind | |
|---|---|---|---|
| KR20110064470A | Republic of Korea | A | |
| JP2011124559A | Japan | A | |
| US2011186991A1 | United States of America | A1 | |
| JP4991925B2This record | Japan | B2 | |
| KR101187977B1 | Republic of Korea | B1 | |
| US8456003B2 | United States of America | B2 | |
| US2013237049A1 | United States of America | A1 | |
| US8835302B2 | United States of America | B2 |
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Numbers
- Publication
- 4991925
- Application
- 248935
Titles2
- Japanese
- パッケージ基板及びその製造方法
- English
- Package substrate and its manufacturing method
Classification
- CPC, 11
- H10W72/20
- H10W72/00
- H10W70/093
- H10D64/011
- H10W20/40
- H10W72/01255
- H10W72/01257
- H10W72/222
- H10W72/01935
- H10W72/01955
- H10W72/9415
- IPC, 5
- H05K3 34
- H01L23 12
- H05K1 09
- H01L21 60
- H10P14 40
