Resource sharing in a telecommunications enviroment

Related application data

This application is based on US Patent Application Nos. 60/618, 269, filed October 12, 2004, entitled "Sharing Memory and Processing Resources in DSL Systems," which is incorporated herein by reference in its entirety. Claim priority under US Patent Law Section 119 (e).

The present invention relates to a communication system. More specifically, an exemplary embodiment of the present invention relates to memory sharing in a communication system. Another exemplary embodiment relates to the sharing of resources for processing or coding in a communication system.

<u style="single"> US Pat. Nos. 6,775,320 and 6,778,589</u>Describes a DSL system that supports multiple applications and multiple framers / encoders / interleaver FCI blocks (FCI blocks are also known as latency paths). DSL systems include, for example, applications that have different communication requirements for data rate, latency (delay), bit error rate (BER), and the like. For example, video usually requires a low BER (&lt;1E-10) but allows a high latency (&lt;1E-10). On the other hand, speech usually requires a low BER (&lt;1ms), but allows a latency of (&gt; 1E-3).

Different applications may be used with different latency paths to satisfy different application requirements of the communication system, as described in US Pat. Nos. 6,775,320. As a result, transmitters and receivers must support multiple latency paths to support applications such as video, Internet access, and voice calls. When implemented in a transmitter / receiver, each latency path will have a framer, encoder and interleaver block with different capabilities depending on the conditions of the application.

<patcit num="1"><text>U.S. Pat. Nos. 6,775,320</text></patcit>

<patcit num="2"><text>U.S. Pat. Nos. 6,778,589</text></patcit>

Outline of the invention

One of the problems faced when achieving multiple latency paths in a transmitter / receiver is the fact that latency paths are complex digital circuits that require large memory capacity and processing power. Interleavers in the latency path consume a large amount of memory due to the error correction function. For example, a typical DSL transmitter / receiver has at least one latency path with about 16 Kbytes of memory for interleavers. Similarly, code blocks such as the Reed-Solomon encoder consume a large amount of processing power. In general, as the number of latency paths increases, so does the demand for memory and processing power for the communication system.

Thus, an exemplary aspect of the invention relates to the sharing of memory between one or more interleavers and / or deinterleavers in a transmitter / receiver. More specifically, an exemplary aspect of the invention relates to shared latency path memory in a transmitter / receiver.

Another aspect of the invention relates to the setting and initialization of shared memory in a communication system. More specifically, exemplary aspects of the invention relate to the setting and initialization of interleaver / deinterleaver memory in communication systems.

Another aspect of the invention relates to determining the amount of memory that can be allocated to a particular component by a communication system. More specifically, an exemplary aspect of the invention relates to determining the maximum number of shared memories allocated to one or more interleavers or deinterleavers.

According to another aspect of the invention, processing power is shared among a large number of transmitter / receiver modules. According to a more specific exemplary embodiment of the invention, the coding module is shared between one or more coders and / or decoders.

Another exemplary embodiment of the invention relates to one or more initializations and a change from a fixed memory structure to a shared memory structure during showtime (transmission of user data).

Another exemplary aspect of the invention relates to dynamically updating one or more shared memories as well as processing resources based on changes in communication conditions.

Another exemplary aspect of the invention relates to updating one or more shared memories as well as processing resources based on updated communication parameters.

Another exemplary aspect of the invention relates to updating one or more shared memory and processing resource allocations based on updated communication parameters.

Another exemplary aspect of the invention relates to exchanging shared resource allocations between transmitters and receivers.

Another exemplary aspect of the invention is a method of allocating shared memory in a transmitter / receiver, comprising the step of allocating shared memory to a plurality of modules, wherein each of the plurality of modules has at least one interleaver. , A method characterized by having at least one deinterleaver or a combination thereof.

In yet another aspect of the method described above, the plurality of modules are characterized by including an interleaver.

In yet another aspect of the method described above, the plurality of modules are characterized by comprising a deinterleaver.

In yet another aspect of the method described above, the plurality of modules are characterized by comprising at least one interleaver and at least one deinterleaver.

Another exemplary aspect is a transmitter / receiver with a plurality of modules, each of which is assigned to at least one interleaver, at least one deinterleaver or a combination thereof, and the plurality of modules. For those containing shared memory designed to be.

In yet another aspect of the transmitter / receiver described above, the plurality of modules are characterized by including interleavers.

In yet another aspect of the transmitter / receiver described above, the plurality of modules are characterized by including a deinterleaver.

In yet another aspect of the transmitter / receiver described above, the plurality of modules are characterized by comprising at least one interleaver and at least one deinterleaver.

These and other features and effects of the present invention are described herein and are evident from the following description in embodiments.

Detailed explanation

Embodiments of the present invention will be described in detail with reference to the drawings below.

An exemplary embodiment of the invention relating to resource sharing in a wired and / or wireless communication environment will be described. However, as will be appreciated, in general, the systems and methods of the present invention behave similarly in any communication system in any environment.

Illustrative systems and methods of the present invention also describe multicarrier modems such as DSL and VDSL modems, associated communication hardware, software and communication channels. However, in order to avoid unnecessarily obscuring the present invention, the following description omits well-known configurations and devices in the form of block diagrams or can be simplified.

Many details have been given to provide a complete understanding of the present invention. However, it should be understood that the present invention may be carried out in various ways beyond the specific content described herein.

Further, although the exemplary embodiments represented herein show various parts of a system in the same location, such various parts of the system are telecommunications networks and / or distribution networks such as the Internet. Alternatively, it is understood that it may be located in a dedicated secure, unsecured, and / or remote portion within the cryptographic system. Therefore, it should be understood that the components of the system may be combined with one or more devices such as a modem or placed on a specific node of a distribution network such as a telecommunications network. As will be appreciated in the following description and in terms of computational efficiency, the components of the system can be placed anywhere in the distribution network without affecting the operation of the system. For example, the various components are placed in an in-station modem (CO, ATU-C, VTU-O), a customer-premises modem (CPE, ATU-R, VTU-R), a DSL controller, or a combination thereof. It is possible. Similarly, it is possible to place one or more functional parts of the system between the modem and its associated arithmetic unit.

In addition, various links connecting components, including communication channel 5, may be wired or wireless, or a combination thereof, or may supply and / or receive data from the connected elements. It should be understood that it can be any other existing or future developed element. The term module as used herein can refer to any existing or future developed hardware, software, firmware, or a combination thereof that can perform functions relating to the element. The terms decision, calculation and operation and their synonyms used herein are used interchangeably and include any type of method, process, mathematical method or method. Here, the FCI block and the latency path are used interchangeably as well as the transmission modem and the transmitter / receiver for transmission. In addition, a receiving modem and a receiving transmitter / receiver are also used interchangeably.

FIG. 1 shows an exemplary embodiment of a transmitter / receiver 100 that uses shared resources. It should be understood that various functional components of the receiver have been omitted for clarity. However, the transmitter / receiver 100 may include standard components found in conventional communication devices in which the present invention can be performed.

According to an exemplary embodiment of the invention, memory and processing power may be shared between the latency paths of a plurality of transmitters and / or receivers in a plurality of applications and corresponding communication transmitters and receivers. It will be possible. For example, the transmitter and / or receiver latency paths of the transmitter / receiver may share interleaver / deinterleaver memory, which shared memory may be assigned to the interleaver / deinterleaver of each latency path. It is possible. Such allocations are based on the application's data rate, latency, BER, impulse noise protection requirements, data or information carried through each latency path, or any general parameter for the communication system. Can be executed.

Similarly, for example, the latency path of the transmitter and / or receiver can share a Reed-Solomon code / decryption processing module, and the processing power of such module can be allocated to each coder and / or decoder. it can. This assignment can be made based on the application's data rate / latency, BER, impulse noise protection conditions, data or information carried through each latency path, or any common parameter for the communication system.

According to an exemplary embodiment of operation, the first and second transmitters and receivers may include, for example, information about the memory capacity of all and / or shared memory of each transmitter and receiver during initialization, and, if necessary, one or more. Send messages to each other that contain information about the latency path of. This information can be sent before deciding how to configure the latency path to accommodate the requirements of the application. Based on this information, one of the modems can select FCI structural parameters that match the transmission conditions of each application carried through the latency path. An example embodiment of the present invention describes the operation of the present invention and its characteristics that occur during initialization, but the sharing of resources and the messages transmitted between the two transmitters and receivers are being initialized and / /. Or it should be understood that changes can be made at any time during user data transmission, ie SHOW TIME.

FIG. 1 shows an exemplary embodiment of the transmitter / receiver 100. The transmitter / receiver 100 includes a transmitter 200 and a receiver 300. The transmitter 200 includes one or more latency paths 210, 220, and the like. Similarly, the receiver 300 includes one or more latency paths 310, 320, etc. Each latency path of the transmitter 200 includes a framer, a encoder, and an interleaver, which are designated as 212, 214, 216, and 222, 224, and 226, respectively.<u style="single">Receiver 300</u>Each latency path in is included a deframer, decoder, and deinterleaver labeled 312, 314, 316, and 322, 324, and 326, respectively. Further, the transmitter / receiver 100 has a shared processing module 110, a shared memory 120, a parameter determination module 130, a path module 140, an allocation module 150, and a shared resource management, all of which are connected to one or more links (not shown). Contains module 160.

In this exemplary embodiment, the transmitter / receiver 100 is depicted with a total of four transmitter and receiver latency paths, namely 210, 220, 310 and 320. The shared memory 120 is shared between the two transmit portions interleavers 216 and 226 and the two receiver deinterleavers 316 and 326. The shared processing module 110, such as the shared coding module, is shared between the two transmitters encoders 214 and 224 and the two receivers decoders 314 and 324.

Although an exemplary embodiment of the present invention describes a transmitter / receiver having a large number of transmitter latency paths and receiver latency paths, the present invention is applicable to any transmitter / receiver having any number of latency paths. It should be understood that In addition, such resource sharing is such that one or more transmitter latency paths share a shared resource and one or more receiver latency paths share a shared resource, or a part of the transmitter latency path and the receiver latency path. It should be understood that some of the shares can be assigned to share shared resources. Further, it is possible to allocate any one or more latency paths, or a portion thereof, to a fixed resource, for example, while other parts of the latency path are allocated to the shared resource. For example, in the latency path 210, the encoder 214 can be assigned to the dedicated processing module, the interleaver 216 can be assigned to a part of the shared memory 120, and vice versa.

According to an exemplary embodiment, the plurality of transmitters or receivers latency paths share an interleaver / deinterleaver memory such as shared memory 120 and a coding module such as shared processing module 110. For example, interleaver / deinterleaver memory can be allocated to different interleavers and / or deinterleavers. This allocation may be based on communication system parameters such as data rate, latency, BER, impulse noise protection of the application being transported. Similarly, a coding module that is part of the sharing processing module 110 can be shared between any one or more latency paths. This sharing may be based on requirements such as data rate, latency, BER, impulse noise protection of the application being transported.

For example, an exemplary transmitter / receiver may include a shared interleaver / deinterleaver memory, in which the transmitter / receiver assigns the first portion of the shared memory 120 to an interleaver such as the interleaver 216 and the transmitter / receiver. The receiver may be designed to allocate the second part of the shared memory 120 to a deinterleaver such as the deinterleaver 316.

Instead, for example, the exemplary transmitter / receiver may include a shared interleaver / deinterleaver memory such as the shared memory 120, and in the transmitter of the transmitter / receiver, the first portion of the shared memory 120 may be the interleaver 216 or the like. Assigned to the first interleaver of the<u style="single">Shared memory 120</u>The second part of the above may be designed to be assigned to a second interleaver such as the interleaver 226.

Alternatively, for example, the exemplary transmitter / receiver may include a shared interleaver / deinterleaver memory, in which the first portion of the shared memory 120 is replaced by a deinterleaver 316 or the like in the receiver of the transmitter / receiver. It may be designed to be assigned to one deinterleaver and to allocate the second part of the shared memory to a second deinterleaver such as the deinterleaver 326 in the receiver of the transmitter / receiver. In the transmitter or receiver of the transmitter / receiver, regardless of its structure, in general, either the interleaver or the deinterleaver or a group thereof may be associated with a part of the shared memory 120.

The initiation, configuration and use of resource sharing is carried out by the exemplary methods described below. First, in collaboration with the path module 140, the number of transmit and receive latency paths (N) is determined. The parameter determination module 130 then analyzes one or more parameters such as data rate, transmitter data rate, receiver data rate, impulse noise protection, bit error rate, latency and the like. The allocation module 150 allocates a portion of the shared memory 120 to one or more of the interleavers and / or deinterleavers, or a group thereof, based on one or more of these parameters. This process continues until memory allocation is determined and allocated to each of the N latency paths.

When determining the memory allocation for each of the latency paths, the transmitter / receiver 100 will<u style="single">Shared resource management module 160</u>In conjunction with, for the second transmitter / receiver, one or more latency paths (N), the maximum number of interleaver memories for any one or more latency paths, and / or the maximum total number and / Or send the number of shared memories for all latency paths.

Three examples of interleaver / deinterleaver memory sharing and coding processing in the transmitter / receiver will be described below. The latency path in these examples may be either the transmitter of the transmitter / receiver or the receiver of the transmitter / receiver.

Example 1 The latency path of the first transmitter or receiver may carry data from a video application that requires a fairly low BER and allows high latency. In this case, the video is conveyed using a latency path with interleaving / deinterleaving and coding (also known as forward error correction (FEC) coding) capabilities. For example, a Reed-Solomon code using a 255-byte (N = 225) size codeword with 16 (R = 16) check bytes and an interleaving / with an interleaver depth of 64 (D = 64). The latency path may be configured using the deinterleaving function. This latency path requires N * D = 16 * 255 = 16 kilobytes in the interleaver memory of the transmitter (or in the deinterleaver memory of the receiver). This latency path makes it possible to correct a burst of errors that is 512 bytes shorter in length.

The second transmitter or receiver latency path may convey an Internet access application that requires a medium BER and a medium amount of latency. In this case, such Internet access applications are transported using a medium amount of interleaving as well as a coded latency path. For example, such a latency path provides a Reed-Solomon code with 128 bytes (N = 128) size codewords with check bytes 8 (R = 8) and an interleaving function with an interleaver degree of 16 (D = 32). It may be configured using. This latency path requires N * D = 128 * 32 = 4 KB in interleaver memory, as well as the same amount of deinterleaver memory. This latency path makes it possible to correct burst errors that are less than 128 bytes in length.

The third transmitter or receiver latency path may convey a voice telephone application that requires fairly low latency but allows BER. in this case,<u style="single">The voice is</u>It is conveyed using a latency path with large interleaving and coding capabilities. For example, the third transmitter or receiver latency path may be configured without an interleaving or coding function that can obtain the lowest possible latency through the latency path but does not provide an error correction function. According to the principles of the present invention, the system carrying the three applications described in Example # 1 above has three latency paths sharing one memory space containing at least (16 + 4) = 20 Kbytes of capacity. It will be. These three latency paths can simultaneously encode (at the transmitter) or decode (at the receiver) two codewords with N = 255 / R = 16 and N = 128 / R = 8. It also shares a common code block.

According to an exemplary embodiment of the invention, the latency path can be reconfigured in the initialization stage or in a data transmission mode (also known as showtime in ADSL and VDSL transmitters and receivers). This can happen, for example, when the application or application requirements change.

Example # 2 Instead of one video application, one internet application, and one audio application, there are three internet applications, and by using shared memory and coding modules in different ways, the transmitter and / or receiver The latency path is reconstructed. For example, each latency path is a Reed-Solomon with 128-byte (N = 128) size codeword with interleaving function using check bytes 8 (R = 8) and interleaver degree 16 (D = 32). The system can also be reconfigured to have three transmitter or receiver latency paths using codes. Each latency path requires N * D = 128 * 32 = 4 KB in interleaver memory, and each block can correct burst errors smaller than 128 bytes in length. Based on the example of transporting the three Internet access applications described, the three latency paths share one memory space containing at least (3 * 4) = 12K bytes of capacity. In addition, these three latency paths simultaneously encode (on the transmitter side) or decode (on the transmitter side) or decode three codewords having N = 128 / R = 16, N = 128 / R = 8 and N = 128/8. It also shares a common code block that can be (on the receiver side).

Example # 3 Such a system can be configured to carry yet another set of applications. For example, the latency path can be configured to carry two video applications. Only in this case, the latency path of the transmitter or receiver of 2 is required. This simply means that the third latency pass has been disabled. Also, based on the first example above, assuming memory is limited, the maximum value of shared memory for these two latency paths is 20 Kbytes. In this case, each block has a 200-byte (N = 200) size codeword with interleaving / deinterleaving capabilities using check bytes 10 (R = 10) and interleaving degree 50 (D = 50). The system can also be reconfigured to have a latency path of 2 using the Reed-Solomon code used. Each latency path requires N * D = 200 * 50 = 10 KB in interleaver memory, and each block can correct burst errors smaller than 250 bytes in length. This structure results in having 20K of shared memory in both latency paths, as in the first example. Since it stays within the memory limit of the latency path, the error correction capability for each latency path is reduced from 512 bytes in Example # 1 to 250 bytes.

Another aspect of the invention is how FCI structural information is transmitted between the first and second modems. FCI structural information depends on the requirements of the application being carried over the DSL connection. This information needs to be sent during the initialization phase as it first configures the DSL connection. This information also needs to be sent during showtime to reconfigure the DSL connection based on changes in the application or application conditions.

According to certain embodiments, the first modem must meet the specific FCI structural parameters such as N, D, R, etc. defined above, as it must meet the requirements of a particular application, such as latency, burst error correction capability, etc. decide. To determine the FCI structural parameters, the first modem must know how powerful the second modem is. For example, the first modem must know how many latency paths (FCI blocks) the second modem can support. Also, the first modem must know the maximum number of interleaver memories for the latency path of each transmitter. Further, since the transmitter latency paths share a common memory space, the first modem must know the total number of shared memories for all transmitter latency paths. This allows the first modem to choose a configuration that is compatible with the application requirements and that matches the transmitter latency pass capability of the second modem.

For example, by using the values from the above example, the first transmitter / receiver can transmit a message including the following information to the second transmitter / receiver during initialization or showtime.

· Number of corresponding transmit and receive latency paths = 3 -Maximum interleaver memory for latency path # 1 = 16K bytes -Maximum interleaver memory for latency path # 2 = 16K bytes -Maximum interleaver memory for latency path # 3 = 16K bytes -Maximum / total value of shared memory for all latency paths = 20K bytes Based on this information, as well as the application requirements, the first transmitter / receiver chooses to set the latency path. For example, if the application is 1 video, 1 internet access and 1 audio application, the first transmitter / receiver can configure three latency paths: Latency Pass # 1-Video: N = 255, R = 16, D = 64 Latency Pass # 2-Video: N = 128, R = 8, D = 32 Latency Pass # 3-Video: N = 0, R = 0, D = 1 (no coding or interleaving) As a result, the total interleaver memory becomes 20 Kbytes.

Alternatively, for example, if there are only 2 video applications, the first transmitter / receiver can configure the following 2 latency paths: Latency Pass # 1-Video: N = 200, R = 10, D = 50 Latency Pass # 2-Video: N = 200, R = 10, D = 50 Latency Pass # 3-Video: N = 0, R = 0, D = 1 (no coding or interleaving) This also brings the total interleaver memory to 20K bytes.

Since it is necessary to meet the requirements of a specific application such as latency and burst error correction capability, the second transmitter / receiver may determine a specific FCI structural parameter such as N, D, R defined above. it can. As mentioned above for the first transmitter / receiver, in order to determine the FCI structural parameters, the second transmitter / receiver must first know the performance of the first transmitter / receiver. In this case, the first transmitter / receiver sends a message containing the above information to the second transmitter / receiver, and the second transmitter / receiver selects the latency path setting based on such information and application requirements.

Figure 2 outlines how to allocate shared memory in the transmitter and receiver. More specifically, control begins in step S200 and continues in step S210. In step S210, one or more shared interleaver / deinterleaver memories and / or processing resources such as a shared encoder / decoder are allocated to one or more latency paths in the transmitter / receiver. The control then continues to step S220, where the control sequence ends.

FIG. 3 outlines an exemplary method for changing the allocation of shared resources, based on an exemplary embodiment of the invention. Specifically, control is initiated in step S310. In step S310, the maximum number of shared memories that can be allocated to a specific interleaver or deinterleaver among a plurality of interleavers or deinterleavers in the transmitter / receiver is determined. Next, in step S320, a determined maximum number of one or more interleavers or deinterleavers among the plurality of interleavers or deinterleavers is sent to the other transmitter / receiver. You can also send and / or receive messages containing additional information to and / from other transmitters and receivers. The control then continues to step S330, where the control sequence ends.

FIG. 4 outlines an exemplary procedure for resource sharing based on an exemplary embodiment of the present invention. Specifically, control begins at step S400 and continues to step S410. In step S410, the number of latency passes is determined. Next, in step S420, the latency path information (FCI block information) is transmitted to another transmitter / receiver. Messages containing additional information can also be sent to and / or received from other transmitters and receivers. This information can be used to assist the transmitter / receiver in determining memory allocation. Also, messages received from other transmitters and receivers are once identifiable based on what, for example, the number of latency paths, memory allocations in distant transmitters and receivers and required applications. is there. The control then continues in step S430.

In step S430, step S440 is executed for each latency path.

In step S440, resource allocation monitoring is performed, and steps S450 and S460 are executed. More specifically, in step S450, one or more parameters relating to the communication system are determined. Next, in step S460, shared resources are allocated based on one or more communication parameters. The control then continues to step S470.

In step S470, the allocation of shared resources is exchanged with other transmitters and receivers. Next, in step S480, it is determined whether or not there has been a change in communication conditions that requires adjustment of the allocation of shared resources. Examples of changes in communication conditions include changes in applications sent through the system and / or changes in channel conditions and the like. If adjustment is required, return to step S410. If no adjustment is required, jump to step S490 where the control sequence ends.

The above systems include modems, multi-carrier modems, DSL modems, ADSL modems, XDSL modems, VDSL modems, line cards, test equipment, multi-carrier transmitters and receivers, wired and / wireless wide area / local network systems, satellite communication systems, diagnostics. Wired and / or wireless telecommunications equipment such as modems with functions, or communication equipment, or any of CDSL, ADSL2, ADSL2 +, VDSL1, VDSL2, HDSL, DSLLite, IDSL, RADSL, SDSL, UDSL, etc. It is realized by an independently programmed general-purpose computer, which works with the communication protocol of.

In addition, the systems, methods and protocols of the invention include dedicated computers, programmed microprocessors or microcontrollers and peripheral integrated circuit elements (s), ASICs or other integrated circuits, digital signal processors, discretes. It can also be executed by an electric circuit or logic circuit connected by wiring such as an element circuit, a programmable logic circuit such as a PLD, PLA, FPGA, or PAL modem, a transmitter / receiver, or a means comparable thereto. In general, in order to implement various communication methods, protocols and techniques based on the present invention, any device capable of realizing a state machine capable of sequentially executing the methods shown here can be used.

In addition, the disclosed methods can be immediately implemented by software using an object or object thinking software development environment that provides portable source code that can be used on various computer or workstation platforms. Alternatively, the disclosed system may be partially or wholly executed by hardware using standard logic circuits or VLSI designs. Whether software or hardware is used to run the system according to the invention depends on the speed and / or performance requirements of the system, the particular features, and the particular software or hardware system or microprocessor used. Determined by the microcomputer system. The communication systems, methods and protocols presented herein are any known by those skilled in the art of applicable technology, from a general knowledge of computer and telecommunications technology, as well as a description of the features described herein. Or, it can be executed immediately using hardware and / or software with a system or structure, device, and / or software that will be developed in the future.

Further, the disclosed method can be immediately executed by software stored in a storage medium and executed by a general-purpose computer, a dedicated computer, a microprocessor, or the like, which is stored in a storage medium and programmed in cooperation with the controller and the memory. In these cases, the systems and methods of the invention are incorporated into applets embedded in personal computers, programs such as JAVA or CGI scripts, resources residing on servers or computer workstations, dedicated communication systems or system components, and the like. It can be executed as a routine. Such systems can also be performed by physically incorporating the system and / or method into software and / or hardware systems such as communication transmitter / receiver hardware and software systems.

Therefore, it is clear that the present invention provides systems and methods for sharing resources. Although the present invention has been described with many embodiments, it is certain that there are many alternatives, modifications, modifications, or that they will be apparent to those skilled in the art in applicable areas. is there. Accordingly, it is intended to include all such alternatives, modifications, equivalents and modifications within the spirit and scope of the present invention.

<figref num="1">FIG. 1 is a functional block diagram showing an exemplary transmitter / receiver according to the present invention.</figref><figref num="2">FIG. 2 is a flow chart outlining an exemplary method for sharing resources according to the present invention. Is shown.</figref><figref num="3">FIG. 3 is a flow chart outlining an exemplary method for determining the maximum number of shared memories according to the invention.</figref><figref num="4">FIG. 4 is a flowchart illustrating an exemplary resource sharing method according to the present invention.</figref>