Receiver and integrated am-fm/iq demodulators for gigabit-rate data detection

The present invention generally relates to data transmission via a wireless wireless link, and more particularly to a detector and receiver for providing high speed data transmission via a wireless wireless link.

Gigabit rate data transmission uses ASK modulation with a transceiver module consisting of several GaAs integrated circuits (ICs) mounted on a ceramic substrate to achieve 60 GHz Industrial, Industrial, Scientific, and Medical) Achieved in the band. An example of such a prior art technique is described in the document "Wireless 1.25 Gb / s Transceiver Module at 60-GHz Band" by K. Ohata et al.

Product detectors are well known in the literature for detecting ASK or AM signals. Examples of such detectors in the prior art include excerpts from "Solid-State Radio Engineering" by Krauss, Bostian, and Raab and "Radio-Frequency Electronics" by Hagen. The present invention is capable of operating at gigabit data rates, has good linearity for millivolt level IF input signals, and has a high input so as not to detune the IF input circuit to which it is connected. Describes an improved product detector that has impedance and can be easily shut off to avoid overloading or consuming power on the IF input circuit when the receiver is used in other modulation modes. is there.<patcit num="1"><text>U.S. Pat. No. 3691465</text></patcit><patcit num="2"><text>U.S. Pat. No. 4000472</text></patcit><patcit num="3"><text>U.S. Pat. No. 4,250,457</text></patcit><patcit num="4"><text>U.S. Pat. No. 4,320,346</text></patcit><patcit num="5"><text>U.S. Pat. No. 4,359,693</text></patcit><patcit num="6"><text>U.S. Pat. No. 4,492,926</text></patcit><patcit num="7"><text>U.S. Pat. No. 3,673,505</text></patcit><patcit num="8"><text>U.S. Pat. No. 3965435</text></patcit><patcit num="9"><text>U.S. Pat. No. 4,320,346</text></patcit><patcit num="10"><text>U.S. Pat. No. 3,705,355</text></patcit><patcit num="11"><text>U.S. Pat. No. 3,792,364</text></patcit><patcit num="12"><text>U.S. Pat. No. 6230,000</text></patcit><nplcit num="1"><text>Reference by K. Ohata et al. "Wireless 1.25 Gb / s Transceiver Module at 60-GHz Band"</text></nplcit><nplcit num="2"><text>"Solid-State Radio Engineering" by Krauss, Bostian, and Raab</text></nplcit><nplcit num="3"><text>"Radio-Frequency Electronics" by Hagen</text></nplcit>

<p> One goal of the present invention is to provide a single IC receiver or transceiver with cheaper silicon process technology that supports multiple modulation formats, including ASK modulation. The present invention relates to the goal of providing gigabit rate data transmission over wireless radio links using carrier frequencies in the millimeter wavelength range (&gt; 30 GHz). More specifically, the present invention facilitates integrated circuit receiver systems by allowing the receiver to support both complex IQ modulation schemes and simpler non-coherent on / off or multi-level keying signals. It describes a circuit for detecting amplitude-shift keying (ASK) or other amplitude modulation (AM) that can be incorporated.</p><p> The invention also has the ability to handle frequency shift keying (FSK) or other frequency modulation (FM) as well as AM and complex IQ modulation schemes with the addition of a frequency discriminator network. It also describes some new radio architectures. These radio architectures support this wide variety of modulations by efficiently sharing detector hardware components. First, the architecture to support both quadrature downconversion and ASK / AM is described, then the details of the ASK / AM detector circuit, then the AM-FM detector architecture, and finally. It describes the most common AM-FM / IQ demodulator system concepts and details of the FSK / FM detector circuit.</p>

<p> In one aspect, the invention generally comprises a first-stage down-conversion mixer, a mixer as a detector, an amplifier in the mixer's RF input signal path, and an amplifier in the mixer's LO input signal path. , The amplifier in the mixer's RF input signal path provides a low gain linear path to the mixer's RF input, the amplifier in the mixer's LO input signal path provides a high gain path to the mixer's LO input, and both. The amplifier is intended as a receiver with matching delay.</p><p> In other embodiments, the present invention generally relates to a first stage down conversion mixer, an optional IF amplifier, an IQ down converter, and an AM on the output side of the first stage down conversion mixer or optional IF amplifier. We contemplate an integrated radio receiver device with a detector and the ability to convert I / Q channel down conversions and multiplex the detected AM envelope into a baseband amplification chain. The IF amplifier can act as both an amplifier and a filter. This signal is generally band limited prior to detection for optimal performance, and this band limiting is typically done on the IF side.</p><p> In a third aspect, the invention generally relates to a first-stage down-conversion mixer, a dual-balanced mixer as a detector, an amplifier in the mixer's RF input signal path, and a mixer's LO input signal path. With an amplifier, the amplifier in the mixer's RF input signal path provides a low gain linear path to the mixer's RF input, and the amplifier in the mixer's LO input signal path provides a high gain path to the mixer's LO input. Provided and intended a receiver in which both amplifiers have a matching delay.</p><p> In a fourth aspect, the present invention generally merges an AM product detector with a delay line FM detector so that the AM product detector hardware is reused within the delay line FM detector. An AM-FM detector is intended that has a merger) and the FM detector is implemented using only an additional discriminator phase shift network.</p><p> In a fifth aspect, the present invention generally relates to a first stage down conversion mixer, an optional IF amplifier, an IQ down converter, and an output side of a first stage down conversion mixer or an optional IF amplifier. An integrated radio receiver device is intended that has an AM detector and an FM detector on the output side of a first-stage down-conversion mixer or an optional IF amplifier and supports two or more types of modulation schemes. ..</p><p> Next, the present invention will be described only as an example in connection with the accompanying drawings.</p>

Figure 1 shows a novel radio architecture of the invention incorporating both quadrature downconversion and an active ASK / AM detector (5) at intermediate frequencies. The ASK / AM detector output (5) is multiplexed with the I-channel down-conversion output (6), and existing baseband low frequency filters and amplifiers (9) are used to filter and amplify the detected ASK / AM signal. ) Can be reused. The integrated AM detector increases the application space of the 60GHz receiver by providing the ability to detect non-coherent on-off keying signals and other amplitude shift keying modulations. These non-coherent modulation formats simplify radio system design by eliminating the need for carrier phase retrieval or other complex baseband IQ signal processing to demodulate received data. The ASK / AM format is suitable for highly directional wireless data links that are unaffected by disturbing or reflected signals. Complex baseband IQ signal processing, on the other hand, provides the ability to reject disturbing and reflected signals that may be required within an omnidirectional wireless data link. Therefore, receivers capable of detecting both modulation modes are more widely applicable.

2 and 3 show product detectors that may be used as the ASK detector in FIG. 1, as described in the prior art. FIG. 2 is a conceptual diagram showing a modulated input signal (12) applied to both inputs of the mixer (13). It is not possible to know the transfer function of this arrangement without specifying the details of the mixer implementation, but if this mixer has equal conversion gains on both inputs, then the output signal (14) is of the input signal. It becomes the square and is an approximation of the desired absolute value function.

Many practical mixer circuits do not have equal conversion gain on both inputs, but require a relatively large amplitude signal from one input (LO inputs in Figures 2-4) and the other input. It provides relatively high conversion gain and linear response characteristics (RF inputs in Figures 2-4). Figure 3 shows a more realistic product detector that uses a limiter or limiting amplifier (18) to provide a nearly constant input signal level to the mixer's LO input (17). If the mixer's LO input has a sufficiently large signal level, this circuit provides a closer approximation to the desired absolute value function.

The circuit in Figure 3 does not provide the ability to time-align the mixer's RF and LO input signals (16 and 17, respectively), so it works well at high data rates and low input signal levels. Will not be. If the two input signals to the mixer are misaligned, the output amplitude of the detector will be reduced, the output pulse will be expanded, and the effective bandwidth of the detector will be reduced. Circuit simulations show that at the highest input modulation frequency it is desirable to tune the two signals within the range of 10-20 ° in one cycle, which corresponds to 28-56ps at the modulation frequency of 1GHz. Improved product detectors that provide the ability to time the input signal are shown in Figures 4 and 5. This improved product detector also has a high input impedance so as not to detun the IF input circuit to which it is connected, loading the IF input circuit when the receiver is used in other modulation modes. The power can be easily shut off without power consumption or power consumption, and both features are advantageous for practical implementation examples of the architecture shown in Fig. 1.

With reference to FIG. 5, an example implementation of the ASK / AM detector of the present invention is a double equilibrium as a detector. Includes a balanced mixer (26) and amplifiers in the RF and LO input signal paths of the mixers labeled Amplifier 1 (27) and Amplifier 2 (28), respectively. Amplifier 2 (28) provides a relatively high high gain path to the mixer's LO input, and amplifier 1 (27) provides a relatively low low gain linear path to the mixer's RF input. The two amplifiers are designed to have a matching delay. This is done by using amplifiers that are topologically similar. The resistor R12 (68) reduces the gain and linearizes the amplifier 2 (28) consisting of Q8 ~ Q11 (37 ~ 40) and R10 ~ R14 (66 ~ 70), C5 (optional) (84). Helps to match the delay and bandwidth of amplifier 1 (27) and amplifier 2 (28). That is, including the degeneration resistor R12 (68) can increase the bandwidth of amplifier 1 (27) due to the negative feedback it generates, which can reduce the delay, C5 ( Including 84) increases the delay of amplifier 1 (27), reduces bandwidth and matches amplifier 2 (28), compensating for R12 (68). In many cases, C5 (84) may be unnecessary and the amplifier delay may be better matched due to topological similarities.

FIG. 4 shows a typical circuit architecture implemented in FIG. 5, such as amplifier 1 (20) in FIG. 4 corresponding to amplifier 1 (27) in FIG. The detailed circuit of FIG. 5 also includes an optional input buffer amplifier (29) for increasing the input impedance of the circuit so as not to overload or detun the IF circuit of FIG.

A circuit simulation was performed on the entire receiver with the ASK demodulator, and a partial block diagram of it is shown in Figure 1. The actual simulated detailed circuit included a low noise amplifier with a gain of 20 dB in front of the RF input (1) shown in Figure 1. The mixer (2) and IF amplifier (4) each have a gain of 10 dB, resulting in a total gain of 40 dB between the LNA input and the IF amplifier output. This circuit was simulated for LNA-related signal levels from -65 dBm to -35 dBm, resulting in IF signals in the range of 5 to 500 mV peaks on the input side of the ASK detector. The RF input frequency was 64GHz and the IF was 9.1GHz.

The simulation results shown in Figure 6 relate to 1 GHz sinusoidal amplitude modulation of the RF input with a modulation index of 0.9. The bottom trace (87) in Figure 6 is the IF waveform (amplitude vs. time), the middle trace (88) is the ASK detector output waveform, and the top trace (89) is from the baseband amplifier. ASK output detected after low frequency filtering and amplification. The circuit in Figure 5 closely approximates the absolute value of the input signal and regenerates the AM or ASK signal when low frequency filtered. 1GHz sine modulation is roughly equivalent to 2Gb / s on / off (2-level ASK) keying.

The simulation results shown in Figure 7 are for the entire receiver with an integrated product detector, using a 4-level ASK input at 2G symbols / s, which is equivalent to a data rate of 4Gb / s. .. The bottom trace (90) is an RF input waveform (amplitude vs. time) showing four amplitude levels, the second from the bottom (91) is the IF waveform, and the third from the bottom (92) is ASK detection. The instrument output waveform, top (94) is the ASK output demodulated after amplification by a baseband amplifier and low frequency filtering, showing four distinct demodulation levels.

As exemplified by the numerous references above, there is a wide range of prior art for AM / ASK detectors. McFadyen's US Pat. No. 3691465, Eastland's US Pat. No. 4000472, Hofmann's US Pat. No. 4250457, Healey's US Pat. No. 4320346, Sauer's US Pat. The majority of circuits given are diode-based. Other detectors, including Limberg's US Pat. No. 3673505, Kiredt's US Pat. No. 3,965435, and Healey's US Pat. No. 4,320,346, use means other than diodes to achieve rectification. For product detectors (ie, mixer or multiplier-based detectors), including Palmer U.S. Pat. No. 3,705,355, Ananias U.S. Pat. No. 3,792,364, and Taylore, U.S. Pat. No. 6,232,000, FIGS. 4-5 of the present invention. None of them used the matching delay circuit shown in.

The concept of the present invention can be extended to include the detection of FSK / FM signals with the addition of a discriminator phase shift network, as shown in FIG. The FSK / FM detector (94) is built using many of the same components as the previous ASK / AM detector. The phase shift network H (f) (98) is designed to have a phase shift of 90 ° at the IF carrier frequency. This circuit is well known in the literature and is variously referred to as a delay line FM detector or a quadrature FM demodulator.

Figure 9 shows how this delay line FM detector can be merged with an AM product detector into a wireless architecture that can demodulate either ASK / AM or FSK / FM signals. Referring to FIG. 9, when switches Sw1 (104) are closed and switches Sw2 (105) and Sw3 (106) are opened, this detector is configured as an AM product detector, as shown in FIG. When Sw2 (105) and Sw3 (106) are closed and Sw1 (104) is opened, this detector is configured as a delay line FM detector, as shown in FIG.

FIG. 10 shows a more specific implementation example of an AM-FM detector, including the improved AM product detectors shown in FIGS. 4 and 5. In Figure 10, the two amplifiers (Amp1 (20) and Amp2 (21)) used to time the input signal in Figure 4 are here the "linear amplifiers" (113) (Amp1 (20) in Figure 4). ) And "Limited Amplifier" (118) (corresponding to Amp2 (21) in FIG. 4). In addition, a possible implementation example of the discriminator phase shift network H (f) (117) is shown for 9 GHz IF, which is the frequency used in the receiver of the present invention. Referring to FIG. 10, when switches Sw1 (114) are closed and switches Sw2 (115) and Sw3 (116) are opened, this detector is configured as an AM product detector, as shown in FIG. When Sw2 (115) and Sw3 (116) are closed and Sw1 (114) is opened, this detector is configured as a delay line FM detector, as shown in FIG.

Figure 11 shows the most common receiver architecture described. It supports three types of modulation: complex IQ modulation schemes, ASK / AM, and FSK / FM. This architecture provides IQ demodulation when switches SwI (124) and SwQ (127) are closed (other switches are open). If SwAM (125) is closed (other switches are open), AM demodulation is provided. FM demodulation is provided when SwFM (126) is closed (other switches are open). If both SwAM (125) and SwFM (127) are closed (other switches are open), simultaneous AM / FM demodulation is provided, which potentially doubles the non-coherent data rate. Increase to. Although not explicitly shown, it should be understood that the improved ASK / AM detector of FIG. 4 can be used in FIG. 11 by providing multiple amplifiers with matching delays in the ASK / AM mixer signal path. For simultaneous AM / FM demodulation, the AM detector should be as insensitive as possible to limit FM leakage to its detection output level, and the FM detector should be at its detection output level. It should be as insensitive as possible to limit AM leakage to.

FIG. 12 shows a specific transistor-level implementation example of the FM detector of the present invention implemented as part of the receiver architecture of FIG. This common type of FM detector is variously known as a delay line FM detector or quadrature FM demodulator or FM limiter discriminator and is well known in the literature. The improved circuit of the present invention uses a three-stage limiting amplifier (137), each of which has an amplitude-dependent gain. The amplitude-dependent gain results in a relatively high gain for low-amplitude input signals and a low gain for high-amplitude input signals. This amplitude-dependent gain results in more gradual clipping characteristics for high-amplitude input signals, which are asymmetric and secondary present in the output signal, while still providing effective limitations for low-amplitude input signals. Minimize strain products. The presence of asymmetric or secondary distortion in the output signal results in an amplitude-dependent DC offset in the limiter output, resulting in inadequate rejection of the amplitude-modulated signal and a reduced signal-to-noise ratio. Therefore, the improved limiting amplifier of the present invention maintains a high signal-to-noise ratio in the presence of the AM signal, which is very high in systems using simultaneous AM / FM modulation, as shown in FIG. It will be important.

FIG. 13 reveals the details of the limiting amplifier. Each amplifier stage has two pairs of input transistors, one pair that is degenerate in resistance (Q1 (139), Q3 (141), and R3 (149)) and the other pair that is not degenerate (Q1 (139), Q3 (141), and R3 (149)). Q2 (140), Q4 (142)). The non-degenerate pair provides high gain for small input signals until the input signal amplitude reaches the point where the pair's differential output current saturates. A degenerate pair results in low gain, but accepts a larger signal before it saturates. Therefore, the overall amplifier clipping characteristics will be more gradual, resulting in lower DC offsets and less secondary strain products at its output.

FIG. 14 shows a specific circuit mounting example of the discriminator filter used in FIG. It has a 90 ° phase shift at a center frequency of 8.9 GHz and provides a linear phase shift with input frequency deviations near this center frequency over the range up to ± 2 GHz. This is a practical differential on-chip implementation of the theoretical network shown in the inserted Figure 10.

<figref num="1">It is an overall system block diagram of one currently preferred embodiment of the present invention.</figref><figref num="2">It is a figure which shows the product detector seen in the prior art.</figref><figref num="3">It is a figure which shows the other product detector which is seen in the prior art.</figref><figref num="4">It is a figure which shows the product detector mounting example of one embodiment which is currently preferable of this invention.</figref><figref num="5">It is a figure which shows the circuit mounting example of the product detector of one present preferred embodiment of this invention.</figref><figref num="6">It is a screenshot of the simulation result about the receiver of one Embodiment of this invention.</figref><figref num="7">It is a screenshot of the simulation result about the receiver of another embodiment of this invention.</figref><figref num="8">It is an overall system block diagram of another currently preferred embodiment of the present invention.</figref><figref num="9">It is a figure which shows the product detector mounting example of another embodiment which is currently preferable of this invention.</figref><figref num="10">It is a figure which shows the more specific implementation example of the product detector of FIG.</figref><figref num="11">It is an overall system block diagram of another currently preferred embodiment of the present invention.</figref><figref num="12">It is a figure which shows the circuit mounting example of the embodiment of FIG.</figref><figref num="13">It is a more detailed schematic diagram of the amplifier of FIG.</figref><figref num="14">It is a figure which shows the more detailed circuit mounting example of the discriminator filter of FIG.</figref>