Method and apparatus for detecting spread spectrum signal spread code synchronization

[0001] [Technical field to which the invention belongs] The present invention relates to a spread code synchronous detection method and apparatus for spread spectrum signals such as GPS (Global Positioning System) satellite signals. [0002] [Conventional technology] In a GPS system that measures the position of a moving object using artificial satellites (GPS satellites), the GSP receiver receives signals from four or more GPS satellites and calculates the position of the receiver from the received signals. , The basic function is to inform the user. [0003] The GPS receiver demolishes the signal from the GPS satellite to acquire the orbit data of the GPS satellite, and derives the three-dimensional position of the self-receiver by a simultaneous equation from the orbit and time information of the GPS satellite and the delay time of the received signal. .. The reason why four GPS satellites to obtain the received signal are required is that there is an error between the time inside the GPS receiver and the time of the satellite, and the influence of the error is eliminated. [0004] In the case of a consumer GPS receiver, it receives a spread spectrum signal radio wave called a C / A (Clear and Aquisition) code in the L1 band from a GPS satellite (N Thatli) and performs positioning calculations. [0005] The C / A code is a PN (Pseudo random Noise) series code with a transmission signal speed (chip rate) of 1.023 MHz and a code length of 1023, for example, a Gold code, which is a signal obtained by spreading 50 bps of data. Is a signal obtained by BPSK (Binary Phase Shift Keying) modulation of a 1575.42 MHz carrier wave (hereinafter referred to as carrier). In this case, since the code length is 1023, the C / A code uses the PN sequence code as one cycle (hence, one cycle = 1 millisecond) for the 1023 chip, as shown in FIG. 20 (A). It is something that repeats. [0006] The code of the PN series of this C / A code is different for each GPS satellite, but which GPS satellite uses which PN series code can be detected in advance by the GPS receiver. In addition, a navigation message as described later makes it possible for a GPS receiver to know which GPS satellite signal can be received at that point and at that time. Therefore, for example, in the case of 3D positioning, a GPS receiver receives radio waves from that point and four or more GPS satellites that can be acquired at that point, reverse-spreads the spectrum, performs positioning calculations, and performs its own positioning calculation. Try to find the position. [0007] Then, as shown in FIG. 20 (B), one bit of the satellite signal data is transmitted for 20 cycles of the PN sequence code, that is, in units of 20 milliseconds. That is, the data transmission rate is 50 bps. The 1023 chip for one cycle of the PN sequence code is inverted when the bit is 1 and when it is 0. [0008] As shown in FIG. 20 (C), in GPS, one word is formed in 30 bits (600 milliseconds). Then, as shown in FIG. 20 (D), one subframe (6 seconds) is formed by 10 words. As shown in Fig. 20 (E), a preamble with a specified bit pattern is always inserted in the first word of one subframe even when the data is updated, and the data is transmitted after this preamble. Will be done. [0009] In addition, 5 subframes form 1 frame (30 seconds). Then, the navigation message is transmitted in units of data of this one frame. The first three subframes of this one-frame data are satellite-specific information called ephemeris information. This information includes parameters for determining the orbit of the satellite and the time when the signal is sent from the satellite. [0010] All GPS satellites are equipped with an atomic clock and use common time information, and the transmission time of signals from GPS satellites is in units of 1 second of the atomic clock. Also, the GPS satellite PN sequence code is generated as synchronized with the atomic clock. [0011] The orbital information of the ephemeris information is updated every few hours, but until the update is performed, the information will be the same. However, by storing the orbit information of the ephemeris information in the memory of the GPS receiver, the same information can be used accurately for several hours. The signal transmission time from the GPS satellites is updated every second. [0012] The remaining two subframe navigation messages of one frame of data are information commonly transmitted by all satellites called Armanac information. This Armanac information is required for 25 frames to acquire all the information, and consists of the approximate position information of each GPS satellite and the information indicating which GPS satellite can be used. This Armanac information is updated every few months, but until it is updated, it will be the same information. However, by storing this Armanac information in the memory of the GPS receiver, the same information can be used accurately for several months. [0013] In order to receive GPS satellite signals and obtain the above data, first remove the carrier, and then prepare the same PN as the C / A code used in the GPS satellite to be received provided in the GPS receiver. Using the spread code of the series, the signal from the GPS satellite is captured by synchronizing the phase of the C / A code with respect to the signal from the GPS satellite, and spectrum despreading is performed. When the phase is synchronized with the C / A code and the reverse diffusion is performed, the bit is detected and it becomes possible to acquire the navigation message including the time information from the signal from the GPS satellite. [0014] The signal from the GPS satellite is captured by the phase-locked search of the C / A code. In this phase-locked search, the correlation between the spreading code of the GPS receiver and the spreading code of the received signal from the GPS satellite is detected. Then, for example, when the correlation value of the correlation detection result is larger than a predetermined value, it is determined that the two are synchronized. Then, when it is determined that the synchronization is not achieved, the phase of the spreading code of the GPS receiver is controlled by using some kind of synchronization method to synchronize with the spreading code of the received signal. [0015] By the way, as described above, the GPS satellite signal is a signal in which the carrier is BPSK-modulated by the signal obtained by spreading the data with the spreading code. Therefore, in order for the GPS receiver to receive the GPS satellite signal, not only the spreading code but also the spreading code is required. , Carrier and data need to be synchronized, but spread code and carrier cannot be synchronized independently. [0016] Then, in the GPS receiver, the received signal is usually converted into an intermediate frequency within several MHz and the intermediate frequency signal is used for the above-mentioned synchronous detection processing. The carriers in this intermediate frequency signal mainly include the frequency error due to the Doppler shift according to the moving speed of the GPS satellite and the frequency error of the local oscillator generated inside the GPS receiver when converting the received signal to the intermediate frequency signal. Minutes are included. [0017] Therefore, due to these frequency error factors, the carrier frequency in the intermediate frequency signal is unknown, and its frequency search is required. In addition, the synchronization point (synchronization phase) within one cycle of the diffusion code depends on the positional relationship between the GPS receiver and the GPS satellite, and this is also unknown. Therefore, as described above, some kind of synchronization method is required. Become. [0018] The conventional GPS receiver uses a frequency search for carriers and a diffusion code synchronization detection method using a sliding correlator + DLL (Delay Locked Loop) + Costus loop. This will be explained below. [0019] The clock that drives the PN code generator of the GPS receiver is generally a clock obtained by dividing the reference frequency oscillator prepared for the GPS receiver. A high-precision crystal oscillator is used as the reference frequency oscillator, and a local oscillation signal used to convert a received signal from a GPS satellite into an intermediate frequency signal is generated from the output of the reference frequency oscillator. [0020] FIG. 21 is a diagram for explaining this frequency search. That is, when the frequency of the clock signal that drives the spread code generator of the GPS receiver is a certain frequency f1, the phase synchronous search for the spread code, that is, the phase of the spread code is sequentially shifted one chip at a time. By detecting the correlation between the GPS received signal and the diffusion code at each chip phase and detecting the peak value of the correlation, the phase that can be synchronized is detected. [0021] [0021] When the frequency of the clock signal is f1, if there is no phase to be synchronized in all the phase searches for 1023 chips, for example, the frequency division ratio with respect to the reference frequency oscillator is changed to change the frequency of the drive clock signal to the frequency f2. Change to, and perform phase search for 1023 chips in the same way. As shown in FIG. 21, this is repeated by changing the frequency of the drive clock signal step by step. The above operation is frequency search. [0022] Then, when the frequency of the drive clock signal that can be synchronized is detected by this frequency search, the phase synchronization detection of the final diffusion code is performed at that clock frequency. This makes it possible to capture satellite signals even if there is a deviation in the oscillation frequency of the crystal frequency oscillator. [0023] However, if the conventional method as described above is used as the diffusion code synchronization detection method, it is not suitable for high-speed synchronization in principle, and in an actual receiver, in order to compensate for it, the number of channels is increased to parallel. It becomes necessary to search for a synchronization point. If it takes time to synchronize the spreading code and the carrier as described above, the response of the GPS receiver becomes slow, which causes inconvenience in use. [0024] Regarding the phase-locked loop detection of the diffusion code, the code synchronization can be achieved by using a digital matched filter without using the sliding correlation method as described above by improving the capability of hardware represented by DSP (Digital Signal Processor). A high-speed method has been realized. [0025] [Problems to be Solved by the Invention] By the way, a digital matched filter is known to use a transversal filter or a fast Fourier transform (hereinafter referred to as FFT (Fast Fourier Transform)), but usually, the processing unit of the digital matched filter is 1 of the diffusion code. It is a cycle. [0026] However, if the diffusion code synchronous detection is performed only from the correlation calculation result for one cycle of the diffusion code, the detection sensitivity is low. Therefore, conventionally, in order to increase the detection sensitivity, the correlation calculation result for each cycle of the diffusion code is used. The method of accumulating the sum of squares is used. According to this method, the correlation value at the correlation point can be made larger than the correlation value at the non-correlation point regardless of the positive and negative polarities of the correlation value, so that the detection sensitivity can be increased. [0027] However, in the method of integrating the sum of squares, the noise components are also integrated without being offset. Therefore, in a reception state where the C / N (carrier-to-noise ratio) is poor, the loss due to the square operation is large and the detection sensitivity is high. The degree of improvement is low. [0028] Therefore, instead of the sum of squares, it is conceivable to integrate the linear sum of the correlation calculation results for each cycle of the diffusion code. This is because if it is a linear sum, the randomly distributed noise is canceled out and becomes smaller. [0029] However, in the case of GPS signals, the spread spectrum signal contains navigation data of 50 bps, and as shown in Fig. 20, the bit transition period is 20 times (20 milliseconds) of one period (1 millisecond) of the diffusion code. It is supposed to be. For this reason, when the linear sum of the correlation calculation results for each cycle of the diffusion code is integrated over a period of 20 milliseconds or more, the correlation value becomes opposite polarity from the bit transition and is canceled out. Since the integrated value becomes small, it is not possible to simply integrate the linear sum. [0030] In view of the above points, the present invention greatly improves the sensitivity of synchronous detection of the spreading code for a spread spectrum signal of data in which the bit transition period is a plurality of times one cycle of the spreading code, such as the GPS signal described above. The purpose is to be able to. [0031] [Means for solving problems] In order to solve the above problems, spread code synchronous detection of a spread spectrum signal according to the invention of claim 1.<u style="single">apparatus</u>Is In an apparatus that synchronously detects the spreading code for a spread spectrum signal in which data having a bit transition period that is a plurality of times one cycle of the spreading code is spread spectrum with the spreading code. A linear addition correlation equal to a linear addition of the correlation calculation results of the spread spectrum signal and the diffusion code for each unit period that is multiple times one cycle of the diffusion code and shorter than the bit transition period. Unit-period correlation calculation linear addition means that performs processing to obtain calculation results, An absolute value calculation means for calculating the absolute value of the linear addition correlation calculation result for each unit period obtained by the unit period correlation calculation linear addition means, and An absolute value addition means that adds the absolute value of the linear addition correlation calculation result for each unit period obtained by the absolute value calculation means for a plurality of unit periods. A correlation point detecting means for detecting a correlation point from the added value of the absolute value obtained by the absolute value adding means, and a correlation point detecting means. It is characterized by having. [0032] In the invention of claim 1 having the above configuration, a linear sum is obtained instead of the sum of squares in a unit period shorter than the bit transition period of the data. Then, the absolute sum of the linear sums for each unit period is integrated for a plurality of unit periods, and the correlation point is detected from the integrated absolute sum. [0033] In this case, since it is unknown where the bit transition of the data occurs, the positive and negative offsets of the correlation value occur in the process of the linear sum calculation in the unit period, and in particular, the bit transition comes to the center of the unit period. In this case, the linear sum of the correlation calculation values becomes 0 completely due to the cancellation of the positive and negative of the correlation value. [0034] However, in the invention of claim 1, since the unit period is set as a period shorter than the bit transition period, if the bit transition is in the center of the unit period, the unit is set. In the unit period before and after the period, the bit transition never comes to the center. [0035] For example, if the length of the unit period is half the time length of the bit transition period as in the invention of claim 2, the bit transition comes to the center of the unit period. If so, the unit period before and after that unit period does not include the bit transition. Therefore, in the unit period before and after them, a linear sum of the correlation calculation results that is not affected by the offset by the bit transition is obtained, and the detection sensitivity is improved by detecting the correlation point by the absolute value sum. Can be expected. [0036] Further, the method for detecting spread code synchronization of a spread spectrum signal according to the invention of claim 8 is as follows. In a method of performing synchronous detection of the diffusion code for a spread spectrum signal in which data having a bit transition period of multiple times one cycle of the diffusion code as a bit transition period is spread spectrum by the diffusion code. A th-order equal to a linear addition of the correlation calculation results of the spread spectrum signal and the diffusion code for each unit period having a length equal to or less than one cycle of the diffusion code and having a length equal to or less than the bit transition period. Along with obtaining the linear addition correlation calculation result of 1, The unit period is divided into two equal parts, the first half period and the second half period, and the first linear sum equal to the linear sum of the correlation calculation results of the spectrum diffusion signal and the diffusion code in either the first half period or the second half period. Second, which is equal to the linear sum of the correlation calculation results of the spectrum diffusion signal and the diffusion code in a state where one of the spectrum diffusion signal and the diffusion code is code-inverted in the first half period or the other of the second half period. A second linear addition correlation calculation result equal to the sum of the linear sums of the above is obtained for each unit period. An absolute value addition step of adding the sum of the absolute value of the first linear addition correlation calculation result and the absolute value of the second linear addition correlation calculation result for a plurality of unit periods. A correlation point detection step of detecting a correlation point from the addition value of the absolute value obtained in the absolute value addition step, and a correlation point detection step. It is characterized by having. [0037] In the invention of claim 8 having the above configuration, the sum of the absolute value of the first linear addition correlation calculation result and the absolute value of the second linear addition correlation calculation result is the unit period and the bit transition position. It is always constant regardless of the phase relationship. Therefore, if the absolute value sum is integrated in the plurality of unit periods in the absolute value addition step, the absolute value sum becomes several times the multiple unit period. [0038] Therefore, it becomes easy to set a threshold value for detecting the correlation point in the correlation point detection step, and the detection sensitivity can be improved. [0039] Further, the invention of claim 16 is the method for detecting spread code synchronization of a spread spectrum signal according to claim 8. The unit period is selected to be equal to the bit transition period. The phase shift between the unit period and the bit transition position is estimated from the ratio of the first linear addition correlation calculation result and the second linear addition correlation calculation result, and the unit is based on the estimated phase shift. Correct the phase shift between the period and the bit transition position It is characterized by that. [0040] In claim 16, the unit period is selected to be equal to the bit transition period, and the unit period and the bit transition are obtained from the ratio of the first linear addition correlation calculation result and the second linear addition correlation calculation result. Try to estimate the phase shift from the position. Then, the estimated phase shift corrects the phase shift between the unit period of the spread spectrum signal and the bit transition position of the data. By doing so, since the bit transition does not occur within the unit period, the linear addition of the correlation value for each unit period can always show the maximum value, and the detection sensitivity of the diffusion code synchronization is further increased. improves. [0041] BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, a case where the embodiment of the spread code synchronous detection method for a spread spectrum signal according to the present invention is applied to the spread code synchronous detection of a GPS signal in the GPS receiver described above will be described with reference to the drawings. [0042] [First Embodiment] FIG. 2 is a block diagram showing a configuration example of a spread code synchronization detection unit of a GPS receiver as a first embodiment of a spread code synchronization detection device for a spread spectrum signal. Although not shown, the received signal r (n) in FIG. 2 is an intermediate frequency obtained by converting the carrier of the signal (spread spectrum signal) from the GPS satellite received by the GPS antenna to an intermediate frequency of 1.023 MHz. It is a frequency signal. [0043] In addition, in order to simplify the explanation, in the embodiment of FIG. 2, it is assumed that the carrier of the received signal r (n) is synchronized, but in practice, the carrier is described by some method as described later. It is necessary to search for frequencies and synchronize carriers. [0044] The received signal r (n) is first converted into a digital signal by the A / D converter 1 and then supplied to the digital matched filter 2. The digital matched filter 2 is supplied with one cycle of the spreading code from the spreading code generating unit 3. At this time, the spreading code generator 3 outputs the spreading code used for the GPS satellite signal to be received. As a result, the correlation result between the received signal and the spreading code can be obtained from the digital matched filter 2. [0045] This correlation result shows the correlation value in each chip phase for one cycle of the diffusion code, and the diffusion code in the received signal r (n) and the diffusion code from the diffusion code generator 3 are synchronized. If this is the case, as shown in FIG. 3, a correlation waveform showing a peak value at which the correlation value at one chip phase np of the 1023 chips exceeds a predetermined threshold value is obtained. Be done. The chip phase in which this peak value stands is the phase of the correlation point. The output from the digital matched filter 2 is such that the correlation result shown in FIG. 3 is repeated every one cycle of the diffusion code. [0046] However, as described above, if the correlation point is detected from only one cycle of the diffusion code, the detection sensitivity is poor. Therefore, in this embodiment, it is as follows. [0047] The correlation result repeated every one cycle of the diffusion code from the digital matched filter 2 is supplied to the unit period linear addition unit 4. In this unit period linear addition unit 4, the digital matched filter 2 is used in the unit period selected as a period that is multiple times one cycle of the diffusion code and shorter than the bit transition cycle of the navigation data, which is 20 milliseconds. The correlation result repeated every one cycle of the diffusion code is linearly added so that the values of the respective chip phases are synchronously added. Then, the unit period linear addition unit 4 performs this linear addition processing in each of the unit periods. [0048] Here, in this embodiment, the unit period is selected to be 10 milliseconds, which is 10 times one cycle of the diffusion code and 1/2 of the bit transition cycle (20 milliseconds). [0049] As shown in FIG. 2, the unit period linear addition unit 4 includes a register 4RG having a number of stages equal to the number of chips N of the diffusion code, and the correlation result of each chip phase of the diffusion code is stored in this register 4RG for a unit period. Accumulate the linear addition. That is, in the case of this example, since the unit period is 10 milliseconds, the register of the stage corresponding to each chip phase of the register 4RG of the unit period linear addition unit 4 displays 10 correlation results of the chip phase. It is a synchronous addition. [0050] The correlation value linear addition result for each unit period (for one cycle of the diffusion code) from this unit period linear addition unit 4 is supplied to the absolute value calculation unit 5, is converted into an absolute value for each unit period, and is an absolute value. It is supplied to the cumulative addition unit 6. In this absolute value cumulative addition unit 6, the absolute value of the correlation value linear addition result for each unit period is cumulatively added in a period of M (M is an integer of 2 or more) times the unit period. Then, the absolute value cumulative addition unit 6 supplies the cumulative addition result to the correlation point detection unit 7. [0051] The correlation point detection unit 7 compares the cumulative addition result showing the characteristics shown in FIG. 3 with a predetermined threshold value, and when a peak value exceeding this threshold value is detected. , It is detected that the received signal and the diffusion code are synchronized, and the phase of the peak value is detected as the correlation point np. [0052] The reference clock from the reference clock generator 10 is supplied to the frequency divider 8 to generate a clock CLK having a frequency equal to the sample frequency of the received signal r (n), and the clock CLK is the A / D converter. 1. It is supplied to the digital matched filter 2 and the unit period linear addition unit 4. [0053] Further, the reference clock from the reference clock generator 10 is supplied to the timing control unit 9, and the timing control unit 9 generates a timing signal synchronized with the unit period, and the unit period linear addition unit 4 and the absolute value, respectively. It is supplied to the calculation unit 5 and the absolute value cumulative addition unit 6. [0054] [Specific example of digital matched filter] The digital matched filter 2 shown in FIG. 2 can be configured by using a transversal filter or an FFT. FIG. 4 shows a configuration example of the digital matched filter 2 using the transversal filter. [0055] That is, the digital matched filter 2 in the example of FIG. 4 includes a shift register 201 having a number of stages equal to the number of chips N-1 of the diffusion code, and the digital signal Din from the A / D converter 1 is omitted in FIG. It is sequentially transferred to the shift register 201 by the clock CLK from the frequency divider 8. [0056] Then, the output of the register RG of each stage of the digital signal Din and the shift register 201 is the coefficient multiplier 202.₁,202₂,202₃、...、202_NAfter each coefficient is multiplied by, the sum is supplied to the summer 203, and the summation calculation is performed. The sum calculation result from the sum sum device 203 is attenuated to 1 / N by the level adjustment unit 204 and output as a correlation result CRout. [0057] Coefficient multiplier 202₁,202₂,202₃、...、202_NIs supplied with the value (+1 or -1) of each chip of the spreading code from the spreading code generating unit 3. In this case, the first chip of the spreading code from the spreading code generator 3 is the coefficient multiplier 202._NIn addition, the 1023th chip is the coefficient multiplier 202₁Then, in reverse order, the value of each chip of the diffusion code is supplied to each coefficient multiplier. [0058] [0058] Therefore, when the shift register 201 is in the chip phase in which the digital signal synchronized with the spreading code from the spreading code generator 3 is captured, the correlation result CRout from the summoner 203 shows a peak and is low in other chip phases. It will be a level. That is, as the correlation result CRout from the summer 203, a signal having the characteristics shown in FIG. 3 is obtained. [0059] Next, FIG. 5 shows a configuration example of the digital matched filter 2 when the FFT is used. [0060] In the case of the example of FIG. 5, the digital signal Din from the A / D converter 1 is written to the buffer memory 211. The signal written in the buffer memory 211 is read out for each cycle of the spreading code (for 1023 chips), FFT-processed by the FFT processing unit 212, and the FFT result is written in the memory 213. The FFT result of the received signal read from the memory 213 is supplied to the multiplication unit 214. [0061] On the other hand, the diffusion code generation unit 3 generates a diffusion code of the same series as the diffusion code used for the received signal from the satellite to be received at that time. The diffusion code for one cycle (1023 chips) from the diffusion code generation unit 3 is supplied to the FFT processing unit 215 for FFT processing, and the processing result is supplied to the memory 216. From this memory 216, the FFT results are read out in order from the lowest frequency and supplied to the multiplication unit 214 as in the normal case. [0062] The multiplication unit 214 multiplies the FFT result of the received signal from the memory 213 and the FFT result of the spreading code from the memory 216, and calculates the degree of correlation between the received signal and the spreading code in the frequency domain. Then, the multiplication result is supplied to the inverse FFT processing unit 217, and the signal in the frequency domain is returned to the signal in the time domain. [0063] The inverse FFT result obtained from the inverse FFT processing unit 217 is a correlation detection signal in the time domain of the received signal and the diffusion code, and this correlation detection signal is supplied to the correlation point detection unit 7. [0064] This correlation detection signal shows the correlation value in each chip phase for one cycle of the diffusion code, as in the case of the digital matched filter using the transversal filter described above, and the diffusion code in the received signal. When and the diffusion code from the diffusion code generator 3 are synchronized, as shown in FIG. 3, the correlation value in one phase of the 1023 chip is a predetermined threshold value. A correlated waveform showing a peak value exceeding the above can be obtained. The chip phase in which this peak value stands is the phase of the correlation point. [0065] The processing principle of the digital matched filter in the example of FIG. 5 is based on the theorem that the Fourier transform of the convolution in the time domain is multiplication in the frequency domain, as shown in Eq. (1) in FIG. [0066] In this equation (1), r (n) represents the received signal in the time domain, and R (k) represents the discrete Fourier transform. Further, c (n) represents the spreading code from the spreading code generator, and C (k) represents the discrete Fourier transform. n is the discrete time and k is the discrete frequency. And F [] represents the Fourier transform. [0067] If the correlation function of the two signals r (n) and c (n) is defined again as f (n), the discrete Fourier transform F (k) of f (n) has the relationship shown in Eq. (2) in Fig. 22. become. Therefore, if r (n) is the signal from the A / D converter 1 in FIG. 1 and c (n) is the diffusion code from the diffusion code generator 3, then the correlation between r (n) and c (n) The function f (n) can be calculated by the following procedure by the above equation (2) regardless of the usual definition equation. [0068] [0068] -Calculate the discrete Fourier transform R (k) of the received signal r (n). [0069] -Calculate the complex conjugate of the discrete Fourier transform C (k) with the diffusion code c (n). [0070] -Calculate F (k) in Eq. (2) from the complex conjugate of R (k) and C (k). [0071] -Calculate the correlation function f (n) by the inverse discrete Fourier transform of F (k). [0072] By the way, as described above, if the diffusion code included in the received signal r (n) matches the diffusion code c (n) from the diffusion code generator 106, the correlation function f (n) calculated by the above procedure. ) Is a time waveform in which a peak occurs at the correlation point as shown in FIG. As described above, in this embodiment, the FFT and inverse FFT acceleration algorithms are applied to the discrete Fourier transform and the inverse Fourier transform, so that the calculation is performed much faster than the correlation is calculated based on the definition. Can be done. [0073] In the example of FIG. 5, the diffusion code generation unit 3 and the FFT processing unit 215 are provided separately, but the diffusion code corresponding to each GPS satellite is stored in the memory in advance by FFT. By doing so, the FFT calculation of the diffusion code c (n) at the time of receiving the satellite signal can be omitted. [0074] [Operation description of the first embodiment] FIG. 1 is a timing chart for explaining the operation in the first embodiment having the above-described configuration. [0075] As mentioned above, the GPS signal is a signal in which 50 bps navigation data is spectrum-spread with a spread code of 1.023 MHz and a period of 1023, excluding carriers. The time length of one bit of navigation data is 20 milliseconds, and 1 20 milliseconds of diffusion codes are included. [0076] A GPS signal has a much larger noise component, but the reception sensitivity can be improved by detecting the correlation with the diffusion code generated inside the receiver over multiple cycles. This utilizes the fact that the thermal noise of the main noise component is a random aperiodic signal, whereas the GPS signal is a periodic signal. [0077] Although the GPS signal is partly a periodic signal, it contains navigation data with bit transitions as shown in FIG. 1 (A). Since this navigation data is unknown, as described above, when the correlation with the diffusion code is taken over multiple cycles of the diffusion code, the positive and negative signals (1 and 0 bits) of the navigation data are obtained. Correlation peaks as shown in Fig. 3 may not be detected due to cancellation. [0078] In order to avoid this, as described above, there is a method of adding the absolute value sum or the sum of squares of the correlation for each cycle (1 millisecond) of the diffusion code over multiple cycles, and this method is used. For example, it does not depend on navigation data, but the smaller the C / N (carrier-to-noise power ratio), the greater the loss due to the square operation, and the lower the degree of improvement in detection sensitivity. [0079] Therefore, in the first embodiment, the detection sensitivity is improved as described below. [0080] [0080] First, as shown in FIG. 1 (B), in the first embodiment, the unit period is 10 cycles of the diffusion code (10 milliseconds), which is half of the 1-bit period of the navigation data. With respect to the unit period of 10 cycle lengths, the correlation calculation result for each cycle (1 millisecond) of the diffusion code as described above is sequentially obtained by the digital matched filter 2. [0081] Next, in the unit period linear addition unit 4, as shown in FIG. 1 (C), the correlation calculation result for each cycle of the diffusion code is linearly added in the unit period. [0082] Next, the correlation value linear addition result for each unit period from the unit period linear addition unit 4 is converted into an absolute value by the absolute value calculation unit 5 as shown in FIG. 1 (D). [0083] Then, those absolute values are added by the absolute value cumulative addition unit 6 over the M period period (hereinafter, referred to as M interval) of the diffusion code. Then, the sum of the absolute values over the M cycle period is supplied to the correlation value detection unit 7, and the correlation point is detected. [0084] In this case, since the bit transition position of the navigation data shown in FIG. 1 (A) is unknown, the unit period and the bit transition position of the navigation data are usually out of phase in timing as shown in the figure. Therefore, in the unit period including the bit transition as in the second and fourth unit periods from the left in Fig. 1 (B), positive and negative cancellation occurs in the process of linear correlation calculation, and especially the bit transition is the unit period. When it comes to the center, it completely cancels out, and the correlation calculation result within the unit period becomes 0. [0085] However, in this embodiment, at least half of the plurality of unit periods of the M section does not include the bit transition, so that the same code or bit transition position is exactly at the boundary of the unit section over the M section. The difference in detection sensitivity between the best case and the worst case where the navigation data alternates between "0" and "1" in the M interval and the bit transition is in the center of each unit period is only 3 dB. [0086] As described above, the diffusion code synchronization detection method of this embodiment is a simple method, but since there is little loss due to the square (absolute value) operation, the correlation of the diffusion code for each cycle is set for a unit period. Compared to the method of taking the sum of absolute values over the Μ times interval, the degree of improvement in the synchronization detection sensitivity is high. [0087] In the first embodiment described above, the unit period for linearly adding the correlation result for each cycle of the diffusion code is set to 10 cycle lengths of the diffusion code, which is 1/2 of the 1-bit period of the navigation data. However, it does not necessarily have to be 10 cycles long. If the time length of the unit period is shorter than the 10-cycle length, the degree of improvement in the detection sensitivity decreases, but the variation in the correlation value depending on the bit transfer position is small. On the contrary, when the time length of the unit period is longer than 10 cycles, the variation depending on the bit transfer position is large, but the improvement degree of the detection sensitivity is high depending on the bit transfer position. [0088] [Second Embodiment] The second embodiment is a modification of the first embodiment, and the procedure for obtaining the correlation value linear addition result is different from that of the first embodiment. [0089] That is, in the first embodiment described above, the digital matched filter 2 is used to obtain the correlation calculation result for each cycle of the diffusion code, and the correlation calculation result is linearly added for each unit period. Even if the received signal r (n) is linearly added for each cycle of the diffusion code and the linear addition result is subjected to the correlation calculation by the digital matched filter before the correlation calculation is performed by the matched filter 2, the above is also performed. The same action and effect as above can be obtained. The second embodiment is an example in that case. [0090] FIG. 6 is a block diagram showing a configuration example of the diffusion code synchronization detection device in the case of the second embodiment. [0091] That is, in this second embodiment, the digital signal from the A / D converter 1 is supplied to the unit period linear addition unit 11. In this unit period linear addition unit 11, the digital signal for the unit period, that is, the digital signal for 10 cycles (10 milliseconds) of the diffusion code in this example, is linearly added for each cycle of the diffusion code. .. That is, in each unit period, 10 data having the same chip phase of the spreading code are synchronously added to each other for the digital signals of 10 cycles of the spreading code. [0092] Therefore, from this unit period linear addition unit 11, a synchronous addition result (data equal to the number of chips for one cycle of the diffusion code) can be obtained. The synchronous addition result is supplied to the digital matched filter 2 to perform a correlation calculation with the spreading code from the spreading code generating unit 3. Then, the correlation calculation result is supplied to the absolute value calculation unit 5. Other configurations are the same as those in the first embodiment. [0093] The second embodiment is different from the first embodiment in that linear addition with each cycle of the diffusion code as an addition unit is performed in the previous stage of the digital matched filter 2, but the first embodiment It is possible to obtain the same action and effect as the form of. [0094] In the second embodiment as well, the unit period is set to 10 cycle lengths of the diffusion code, which is 1/2 of the 1-bit period of the navigation data, but it is not always necessary to be 10 cycle lengths. It is exactly the same as the first embodiment of. [0095] [Third Embodiment] The third embodiment is also a modification of the first embodiment, and the procedure for obtaining the correlation value linear addition result is different from that of the first embodiment. [0096] In the third embodiment, when a digital matched filter using an FFT as shown in FIG. 5 is used as the digital matched filter 2, the unit period of the latter stage of the digital matched filter 2 in the first embodiment is used. The linear addition unit 4 or the unit period linear addition unit 11 in the previous stage of the digital matched filter 2 in the second embodiment is omitted. [0097] FIG. 7 is a block diagram showing a configuration example of the diffusion code synchronization detection device in the case of the third embodiment. [0098] That is, in the third embodiment, the digital signal from the A / D converter 1 is supplied to the digital matched filter 12 using the FFT including the portion surrounded by the dotted line in FIG. [0099] In the case of the first embodiment described above, as described with reference to FIG. 5, the digital signal is read from the memory 211 every one cycle of the diffusion code and supplied to the FFT processing unit 212. In the third embodiment, in the digital matched filter 12 using the FFT, digital data is read from the memory 211 for each unit period, and the read digital data for each unit period is supplied to the FFT processing unit 212. And execute the FFT operation. [0100] In the third embodiment, the FFT processing unit 212 performs the FFT calculation on the digital signal for each unit period. In the case of the above example, 10 cycles of the diffusion code are included in the unit period, so the FFT calculation result of the digital signal for each cycle of the diffusion code is 10 from the FFT processing unit 212. An FFT calculation result similar to that accumulated for the period is obtained, and the FFT calculation result is written to the memory 213. [0101] Subsequent processing in the digital matched filter 12 using the FFT is exactly the same as described in FIG. 5, and the inverse FFT processing unit 217 obtains the correlation calculation result returned to the time domain. Then, in the third embodiment, the correlation calculation result from the digital matched filter 12 using the FFT is supplied to the absolute value calculation unit 5. [0102] As described above, according to the third embodiment, by performing the FFT calculation on the digital signal for the unit period, the unit period linear addition unit 4 in the subsequent stage of the digital matched filter 2 in FIG. 2 is performed. Alternatively, the unit period linear addition unit 11 in the previous stage of the digital matched filter 2 in FIG. 6 can be omitted, and the configuration becomes simple. [0103] In the second embodiment as well, the unit period is set to 10 cycle lengths of the diffusion code, which is 1/2 of the 1-bit period of the navigation data, but it is not always necessary to be 10 cycle lengths. It is exactly the same as the first embodiment of. [0104] [Fourth Embodiment] In the method of the first to third embodiments described above, the correlation calculation results for each cycle of the diffusion code are linearly added, and the absolute value of the linear addition results is cumulatively added over the M interval. Since this is a method of detecting the correlation point from the cumulative addition result, the degree of improvement in the correlation point detection sensitivity is higher than that of the conventional method described at the beginning. [0105] However, in the case of the methods of the first to third embodiments described above, the result of the correlation calculation varies depending on the phase relationship between the unit period and the bit transition position. Therefore, when detecting the correlation point, It is difficult to set the threshold value for the peak value of the correlation value, and therefore it is difficult to handle in determining the presence or absence of the correlation. The fourth embodiment solves this problem. [0106] FIG. 8 is a block diagram of a spread code synchronization detection device for a spread spectrum signal according to the fourth embodiment. Further, FIG. 9 is a timing chart for explaining the operation of the apparatus of FIG. [0107] In this fourth embodiment, two signal sequences are generated from the received signal r (n) (see FIG. 9A). The first signal sequence A is a signal sequence of the received signal r (n) as it is (see FIG. 9 (B)). [0108] In this first signal sequence A, the digital signal from the A / D converter 1 is supplied to the digital matched filter 21 as it is, and as described in the first embodiment described above, the diffusion code generator Correlation operation with the diffusion code from 3 is performed. Then, the correlation calculation result for each cycle of the diffusion code is supplied to the unit period linear addition unit 22, and is linearly added for the unit period. [0109] In this fourth embodiment, the unit period is one bit of navigation data, that is, the length of 20 cycles of the diffusion code. [0110] The linear addition correlation calculation result DA (see FIG. 9C) from the unit period linear addition unit 22 is supplied to the absolute value calculation unit 23, is converted to an absolute value, and then is supplied to the addition unit 24. Then, the addition output D of the addition unit 24 is supplied to the cumulative addition unit 25, and is cumulatively added over the M section as in the first embodiment. The cumulative addition result MD is supplied to the correlation point detection unit 26. [0111] The clock signal CLK from the frequency divider 8 and various timing signals from the timing control unit 9 are supplied to the respective circuit blocks in the same manner as in the case of the first embodiment described above. As described above, in the fourth embodiment, the unit period is 20 milliseconds, which is different from the case of the first embodiment. [0112] The configuration of the first signal sequence A described above is the same as that of the first embodiment described above, except for the addition unit 24. However, in the first embodiment described above, the unit period was 10 milliseconds, which is 1/2 of the 1-bit period of the navigation data, whereas in the fourth embodiment, the unit period is 1 of the navigation data. The difference is that the bit period is 20 milliseconds. [0113] However, as in the case of the first embodiment, the linear addition result every 20 milliseconds for the first signal sequence A is obtained by adding the linear addition every 10 milliseconds twice. You can also. [0114] Next, the processing for the second signal sequence B will be described. In this second signal sequence B, the digital signal from the A / D converter 1 is supplied to one input terminal of the switch circuit 35 as it is, and after being code-inverted through the code inversion unit 34, the switch circuit. It is supplied to the other input end of 35. [0115] The switch circuit 35 is connected to one input end in the first half of the unit period (10 ms) and to the other input end in the second half of the unit period (10 ms) by the switch switching signal SW from the timing control unit 9. , Alternately switched. Therefore, from the switch circuit 35, a signal of the signal sequence B (see FIG. 9 (D)) in which the digital signal of the received signal r (n) is code-inverted in the latter half of the unit period is obtained. [0116] The digital signal of the signal sequence B is supplied to the digital matched filter 31, and the correlation calculation with the spreading code from the spreading code generating unit 3 is performed as described in the first embodiment described above. Then, the correlation calculation result for each cycle of the diffusion code is supplied to the unit period linear addition unit 32, and the unit period is linearly added. [0117] Then, the linear addition correlation calculation result DB (see FIG. 9 (E)) from the unit period linear addition unit 32 is supplied to the absolute value calculation unit 33, converted to an absolute value, and then supplied to the addition unit 24, and is absolutely. Linear addition from the value addition unit 23 Adds to the absolute value of the correlation calculation result DA. Therefore, the addition result D of the addition unit 24 is D = | DA | + | DB | [Equation (3)] Will be. [0118] This addition result D is accumulated in the cumulative addition unit 25 over the M interval (M 1), and the cumulative result MD is supplied to the correlation point detection unit 26. The correlation point detection unit 26 determines whether or not a correlation point has been detected based on whether or not a peak value larger than a predetermined threshold value can be detected, and when the peak value is detected, the peak value is detected. The chip phase from which the peak value is obtained is detected as the correlation point np. [0119] In the fourth embodiment, when the phase shift between the bit transition position of the received signal r (n) and the unit period is h as shown in FIG. 9 (A), the unit period with respect to this phase shift h The values of the linear addition correlation calculation results DA and DB of the linear addition units 22 and 32 are as shown in FIGS. 10 (A) and 10 (B). [0120] FIG. 10 is a characteristic diagram in the case where the navigation data is inverted for each bit, and the correlation value for one cycle length of the diffusion code is d and M = 1. Then, FIG. 10A shows a case where the correlation value d is positive, and FIG. 10B shows a case where the correlation value d is negative. The phase shift h is represented by the number of cycles of the diffusion code (since one cycle is 1 millisecond, it can also be a unit of milliseconds). [0121] That is, as shown in FIG. 10, when the phase shift h = 0 and the start position of the unit period and the bit transition position of the navigation data are synchronized, the linear addition correlation calculation result is obtained in the first signal sequence A. DA means that the 20 correlation values d for each cycle of the diffusion code within the unit period are all positive or negative. When d&gt; 0, DA = 20 | d | When d &lt;0, DA = -20 | d | Will be. [0122] On the other hand, in the second signal sequence B, when the phase shift h = 0, the sign inversion is performed at the center of the unit period, so that 20 of the diffusion codes in each cycle within the unit period are performed. The positive and negative numbers of the number of correlation values d are the same, and the linear addition correlation calculation result DB is offset and DB = 0. [0123] Further, when the phase shift h = 10 and the center of the unit period is the bit transition position, in the first signal sequence A, 20 correlations of the diffusion code in each cycle within the unit period are performed by bit inversion. The value d has the same number of positive and negative numbers, and the linear addition correlation calculation result DA is canceled out so that DA = 0. [0124] On the other hand, in the second signal sequence B, when the phase shift h = 10, the sign inversion is performed in synchronization with the bit transition at the center of the unit period, so that one cycle of the diffusion code within the unit period Every 20 correlation values d are also positive or negative, When d&gt; 0, DB = -20 | d | When d &lt;0, DB = 20 | d | Will be. [0125] Further, when the phase shift h = 20 and the unit period is shifted by 1 bit of the navigation data, in the first signal sequence A, the linear addition correlation calculation result DA is the diffusion code within the unit period. The 20 correlation values d for each cycle have positive and negative polarities that are opposite to those when the phase shift h = 0, but they are all positive or negative. When d&gt; 0, DA = -20 | d | When d &lt;0, DA = 20 | d | Will be. [0126] On the other hand, in the second signal sequence B, when the phase shift h = 20, the sign inversion is performed at the center of the unit period, so that the spread code is 20 in each cycle within the unit period. The positive and negative polarities of the number of correlation values d are reversed from those in the case of phase shift h = 0, but the numbers of positive and negative are the same, and the linear addition correlation calculation result DB is canceled out so that DB = 0. [0127] Since the linear addition correlation calculation result DA and the linear addition correlation calculation result DB show the characteristics as shown in FIG. 10 with respect to the phase shift h of the bit transition position of the navigation data with respect to the start position of the unit period, the addition unit 24 The absolute value sum D of both linear addition correlation calculation result DA and linear addition correlation calculation result DB from is constant. That is, in the case of this example, D = | DA | + | DB | = 20 | d | Will be. [0128] That is, the absolute value sum D of the linear addition correlation calculation result DA and the linear addition correlation calculation result DB is a constant value of 20M | d regardless of the phase shift h between the bit transition position of the received signal r (n) and the unit period. | Therefore, the cumulative result MD of the cumulative addition unit 25 is a value obtained by simply accumulating the constant value for M sections, that is, MD = | DA | + | DB | = 20M | d | Will be. [0129] As described above, according to the fourth embodiment, the sum of the absolute values is an integral multiple of the correlation value d regardless of where the bit transition position occurs with respect to the start position of the unit period. Therefore, the correlation check At Exit 26, it becomes easier to set the threshold value for determining the presence or absence of correlation. In addition, within the unit period, DA and DB are the linear additions of the correlation values for each cycle of the diffusion code, so the correlation values are added while removing the noise, and the correlation points are detected. Improvement of sensitivity can be expected. [0130] In the fourth embodiment, as the digital matched filters 21 and 31, the transversal filter as shown in FIG. 4 is used as in the case of the first to third embodiments described above. It can also be configured to use the FFT process as shown in FIG. [0131] In the above description of the fourth embodiment, the unit period is selected to be equal to the bit transition cycle, but in the fourth embodiment, the unit period may be equal to or less than the bit transition cycle. [0132] [Fifth Embodiment] This fifth embodiment is a modification of the fourth embodiment, and is the same as the relationship of the second embodiment with respect to the first embodiment, until the linear addition correlation calculation result is obtained. The procedure of is different from that of the fourth embodiment. [0133] That is, in the fourth embodiment described above, the digital matched filters 21 and 31 perform a correlation calculation for each cycle of the diffusion code for the first signal sequence A and the second signal sequence B, and the correlation calculation is performed. The results are linearly added for each unit period, but in this fifth embodiment, the correlation calculation is performed on the first signal sequence A and the second signal sequence B with the digital matched filters 21 and 31. Before this is done, linear addition is performed in units of one cycle of the diffusion code, and the linear addition result is correlated with the digital matched filters 21 and 31. [0134] FIG. 11 is a block diagram showing a configuration example of the diffusion code synchronization detection device in the case of the fifth embodiment. [0135] That is, in the fifth embodiment, the digital signal of the first series A from the A / D converter 1 is supplied to the unit period linear addition unit 27. In this unit period linear addition unit 27, the digital signal for the unit period, that is, the digital signal for 20 cycles (20 milliseconds) of the diffusion code in this example, is linearly added for each cycle of the diffusion code. .. That is, for the digital signals for 20 cycles of the spreading code in each unit period, 20 data of the same chip phase of the spreading code are synchronously added. [0136] Further, the digital signal of the second series B from the switch circuit 35 is supplied to the linear addition unit 36 for a unit period. In this unit period linear addition unit 36, similarly to the unit period linear addition unit 27, the digital signal for the unit period, that is, the digital signal for 20 cycles (20 milliseconds) of the diffusion code in this example, is diffused. Performs linear addition for each cycle of the code. That is, for the digital signals for 20 cycles of the spreading code in each unit period, 20 data of the same chip phase of the spreading code are synchronously added. [0137] Then, the synchronous addition results (data equal to the number of chips for one cycle of the diffusion code) from these unit period linear addition units 27 and 36 are supplied to the digital matched filters 21 and 31, and the synchronous addition results are diffused. Correlation calculation with the diffusion code from the code generation unit 3 is performed. Then, the correlation calculation result is supplied to the absolute value calculation units 22 and 32. Other configurations are the same as those in the fourth embodiment. [0138] The fifth embodiment is different from the fourth embodiment in that linear addition with each cycle of the diffusion code as an addition unit is performed in the previous stage of the digital matched filters 21 and 31. The same action and effect as those of the embodiment of the above can be obtained. [0139] Also in the fifth embodiment, the unit period is not limited to the case where the unit period is selected to be equal to the bit transition period, and the unit period may be equal to or less than the bit transition period. [0140] [Sixth Embodiment] This sixth embodiment is also a modification of the fourth embodiment, and is the same as the relationship of the third embodiment with respect to the first embodiment, until the linear addition correlation calculation result is obtained. The procedure of is different from that of the fourth embodiment. [0141] In the sixth embodiment, when the digital matched filter using FFT as shown in FIG. 5 is used as the digital matched filters 21 and 31, the digital matched filters 21 and 31 in the fourth embodiment are used. The unit period linear addition units 23 and 33 in the latter stage, or the unit period linear addition units 27 and 36 in the previous stage of the digital matched filters 21 and 31 in the fifth embodiment are omitted. [0142] FIG. 12 is a block diagram showing a configuration example of the diffusion code synchronization detection device in the case of the sixth embodiment. [0143] That is, in the sixth embodiment, the digital signal of the first signal sequence A is supplied to the digital matched filter 28 using the FFT consisting of the portion surrounded by the dotted line in FIG. 5, and is written to the memory 211. .. Further, the digital signal of the second signal sequence B is similarly supplied to the digital matched filter 37 using the FFT and written to the memory 211. [0144] Then, in the sixth embodiment, in each of the digital matched filters 28 and 37 using the FFT, digital data is read from the memory 211 every unit period, and every read unit period. Digital data is supplied to the FFT processing unit 212 and FFT arithmetic processing is performed. [0145] In the sixth embodiment, the FFT processing unit 212 of each of the digital matched filters 28 and 37 performs an FFT calculation on the digital signal for each unit period for each of the signal sequence A or the signal sequence B. In the case of the above example, 20 cycles of the diffusion code are included in each of the signal sequence A and the signal sequence B within the unit period. Therefore, from this FFT processing unit 212, one cycle of the diffusion code is included. An FFT calculation result similar to that obtained by accumulating the FFT calculation result of the digital signal every minute for 10 cycles is obtained, and the FFT calculation result is written to the memory 213. [0146] Subsequent processing in the digital matched filters 28 and 37 using the FFT is exactly the same as described in FIG. 5, and the inverse FFT processing unit 217 obtains the correlation calculation result returned to the time domain. Then, in the sixth embodiment, the correlation calculation results from the digital matched filters 28 and 37 using this FFT are the linear addition correlation calculation results DA and DB, respectively, and the absolute value calculation units 23 and 33 Be supplied. Others are the same as those in the fourth embodiment. [0147] As described above, according to the sixth embodiment, by performing the FFT calculation on the digital signal for the unit period, the unit period linear addition in the latter stage of the digital matched filters 21 and 31 in FIG. 8 is performed. The unit period linear addition parts 27 and 36 in the previous stage of the digital matched filters 21 and 31 in FIGS. 22 and 32 or the digital matched filters 21 and 31 in FIG. 11 can be omitted, and the configuration is simplified. [0148] Also in this sixth embodiment, the unit period is not limited to the case where the unit period is selected to be equal to the bit transition period, and it is sufficient that the period of 1/2 of the unit period is equal to or less than the bit transition period. , The unit period may be twice or less of the bit transition period. [0149] [7th Embodiment] In the fourth to sixth embodiments described above, the digital signal of the received signal r (n) is code-inverted between the first half and the second half of the unit period to generate the second signal sequence B, and the unit period is generated. The linear addition correlation calculation result DB is obtained, but instead of inverting the sign of the digital signal of the received signal r (n) between the first half and the second half of the unit period, the spread code from the spread code generator 3 is used as the unit. Exactly the same effect can be obtained even if the code is inverted between the first half and the second half of the period and supplied to the digital matched filter. [0150] The seventh embodiment is the embodiment in this case, and FIG. 13 is a block diagram showing a configuration example of the diffusion code synchronization detection device in the case of the seventh embodiment. [0151] That is, the digital signal from the A / D converter 1 is supplied to the digital matched filter 41A of the first signal sequence A. The diffusion code from the diffusion code generator 3 is supplied to the digital matched filter 41A as it is. Therefore, from this digital matched filter 41A, the same correlation calculation result as that of the digital matched filter 21 of the first signal sequence A in the fourth embodiment shown in FIG. 8 can be obtained. [0152] Then, the correlation calculation result for each cycle of the diffusion code from the digital matched filter 41A is supplied to the unit period linear addition unit 22, and the unit period, in this example, the navigation data as in the fourth embodiment. Is linearly added over a 1-bit period (20 milliseconds) of. Then, the linear addition correlation calculation result DA from the unit period linear addition unit 22 is supplied to the absolute value calculation unit 23, converted to an absolute value, and supplied to the addition unit 24. [0153] Further, the digital signal from the A / D converter 1 is supplied to the digital matched filter 41B of the second signal sequence B. The digital matched filter 41B is supplied with a diffusion code from the switch circuit 43 in a state in which the codes are inverted in the first half and the second half of the unit period. [0154] That is, the diffusion code from the diffusion code generation unit 3 is supplied to one input terminal of the switch circuit 43 as it is, and is code-inverted by the code inversion unit 42 and supplied to the other input terminal of the switch circuit 43. The switch circuit 43 is switched by the switching signal SW from the timing control unit 9 so as to be alternately connected to one input terminal in the first half of the unit period and to the other input end in the latter half of the unit period. [0155] In this way, the diffusion code supplied to the digital matched filter 41B is in a state in which the code is inverted between the first half and the second half of the unit period. Therefore, in this digital matched filter 41B, the fourth embodiment shown in FIG. 8 is performed. The same correlation calculation result as that of the digital matched filter 31 of the second signal sequence B in the form can be obtained. [0156] Then, the correlation calculation result for each cycle of the diffusion code from the digital matched filter 41A is supplied to the unit period linear addition unit 22, and the unit period, in this example, the navigation data as in the fourth embodiment. Is linearly added over a 1-bit period (20 milliseconds) of. Then, the linear addition correlation calculation result DA from the unit period linear addition unit 22 is supplied to the absolute value calculation unit 23, converted to an absolute value, and supplied to the addition unit 24. [0157] Similarly, the correlation calculation result for each cycle of the diffusion code from the digital matched filter 41B is supplied to the unit period linear addition unit 32, and the unit period, in this example, the navigation data as in the fourth embodiment. Is linearly added over a 1-bit period (20 milliseconds) of. Then, the linear addition correlation calculation result DB from the unit period linear addition unit 32 is supplied to the absolute value calculation unit 33, converted to an absolute value, and supplied to the addition unit 24. [0158] Therefore, the sum of absolute values D = | DA | + | DB |, which is exactly the same as in the case of the fourth embodiment, is obtained from the addition unit 24. Then, the cumulative addition unit 25 obtains the cumulative addition result MD over the M interval, and the correlation point detection unit 26 detects the correlation point np for the cumulative addition result MD. That is, the same action and effect as in the case of the fourth embodiment can be obtained. [0159] The method of obtaining the correlation calculation result of the second signal sequence B by inversion of the diffusion code in the first half and the second half of the unit period in the seventh embodiment is applied to the fifth embodiment. You can also do it. [0160] That is, although not shown, one 1/2 unit period linear adder is provided on the output side of the A / D converter 1 in FIG. 13, and the 1/2 unit period linear adder is used in the switch circuit 43. The digital signal is linearly added by synchronously adding the data corresponding to each chip of the diffusion code of the digital signal every first half and the second half of the unit period, that is, every 1/2 unit period in synchronization with the switching of. .. Then, the linear addition result is supplied to the digital matched filters 41A and 41B, respectively. [0161] In this case, from the digital matched filters 41A and 41B, the correlation calculation results equal to the above-mentioned linear addition correlation calculation results DA and DB are obtained, the unit period linear addition units 22 and 32 are unnecessary, and the digital matched filters 41A and 41A and The correlation calculation result from 41B is configured to be supplied to the absolute value calculation units 23 and 33 in FIG. [0162] Further, the method of obtaining the correlation calculation result of the second signal sequence B by inversion of the diffusion code in the first half and the second half of the unit period in the seventh embodiment is applied to the sixth embodiment. You can also do it. [0163] That is, although not shown in this example, the digital matched filters 41A and 41B in FIG. 13 are configured by digital matched filters using FFTs, respectively, and these FFTs are used as described with reference to FIGS. 5 and 12. In the digital matched filter used, the digital signal for the unit period is used as the FFT calculation unit, and the correlation calculation is performed between the spread code from the spread code generator 3 and the spread code from the switch circuit 43. [0164] According to this example, by performing the FFT calculation on the digital signal for the unit period in the same manner as in the case of FIG. 11 described above, the unit period linear addition part in the first stage or the second stage of the digital matched filter is omitted. It can be configured and is easy to configure. [0165] Also in this seventh embodiment, the unit period is not limited to the case where the unit period is selected to be equal to the bit transition period, and it is sufficient that the period of 1/2 of the unit period is equal to or less than the bit transition period. , The unit period may be twice or less of the bit transition period. [0166] [Eighth embodiment] This eighth embodiment is another example of the method of obtaining the linear addition correlation calculation results DA and DB described above. The fourth to seventh embodiments all required two digital matched filters, but the eighth embodiment provides a configuration in which one digital matched filter is sufficient. .. [0167] FIG. 14 is a block diagram of a spread code synchronization detection device for a spread spectrum signal in the case of the eighth embodiment. Further, FIG. 15 is a timing chart for explaining the operation of the eighth embodiment. [0168] In the eighth embodiment, after the received signal r (n) is input, the configuration up to the digital matched filter 2 is exactly the same as in the case of the first embodiment, but the digital matched filter 2 The correlation calculation result for each cycle of the diffusion code from is supplied to the linear addition unit 51 for a 1/2 unit period. Also in the eighth embodiment, the unit period is set to 20 milliseconds, which is the bit transition period of the navigation data, as in the fourth to seventh embodiments described above. [0169] The 1/2 unit period linear addition unit 51 linearly adds the correlation calculation result from the digital matched filter 2 for each 1/2 unit period, that is, for each of the first half period and the second half period of the unit period, and the linearity. The addition result is supplied to the linear addition result addition unit 52 and the linear addition result subtraction unit 53. [0170] In the linear addition result addition unit 52, as shown in FIGS. 15 (B) and 15 (C), the linear addition result of the correlation value for each cycle of the diffusion code in the first half of the unit period and the linear addition result in the latter half of the unit period. The linear addition result DA of the above-mentioned first signal sequence A is generated by adding the linear addition result of the correlation value for each cycle of the diffusion code. [0171] Further, in the linear addition result subtraction unit 53, as shown in FIGS. 15 (D) and 15 (E), the latter half of the unit period is obtained from the linear addition result of the correlation value for each cycle of the diffusion code in the first half of the unit period. The linear addition correlation calculation result DB for the second signal sequence B described above is generated by subtracting the linear addition result of the correlation value for each cycle of the diffusion code in. [0172] Then, the linear addition correlation calculation result DA from the linear addition result addition unit 52 is supplied to the addition unit 56 after being converted to an absolute value by the absolute value calculation unit 54. Further, the linear addition correlation calculation result DB from the linear addition result subtraction unit 52 is supplied to the addition unit 56 after being converted to an absolute value by the absolute value calculation unit 55. Therefore, from this addition unit 56, the absolute value sum D of the linear addition correlation calculation results DA and DB of the first and second series A and B can be obtained. [0173] Then, the absolute value sum D from the addition unit 56 is supplied to the cumulative addition unit 57, and is cumulatively added over the M section as in the fourth embodiment. The cumulative addition result MD is supplied to the correlation point detection unit 57, and the correlation point np is detected by detecting a peak value exceeding a predetermined threshold value. [0174] According to the eighth embodiment, the linear addition part of the correlation calculation result for each cycle of the digital matched filter and the diffusion code is common to each of the first series A and the second series B. This has the advantage of simplifying the configuration of the device. [0175] Also in the eighth embodiment, the unit period is not limited to the case where the unit period is selected to be equal to the bit transition period, and the unit period may be equal to or less than the bit transition period. [0176] [9th embodiment] As described above, the linear addition correlation calculation results DA and DB of the first and second series A and B obtained in the fourth to eighth embodiments are between the unit period and the bit transition position of the navigation data. Has the characteristics as described in FIG. 10 above with respect to the phase shift h, and the sum of the absolute values of the linear addition correlation calculation results DA and DB is constant as described above. [0177] However, from the viewpoint of C / N, the detection sensitivity of diffusion code synchronization is not constant, and if there is a bit transition position in the middle of the first half or the second half of the unit period, in the 1/2 unit interval of the one with the bit transition. , Since the correlation value is canceled out and becomes 0, it is substantially the same as the correlation value of only the 1/2 unit interval of the one without the bit transition, and the bit transition position does not deviate from the start position of the unit period. Compared to the case, the C / N is lowered by 3 dB and the detection sensitivity is also lowered. [0178] In order to improve this problem, the phase shift h may be corrected so that the start position of the unit period and the bit transition position match. [0179] By the way, from the characteristic diagram of FIG. 10, it can be seen that the ratio DA / DB of the linear addition correlation calculation result DA and DB has a value peculiar to each position of the phase shift h. From this, the phase shift h of the bit transition position from the start position of the unit period can be estimated by the following equation. [0180] That is, When DA / DB 0 (h L / 2) h = L / 2 × [1 + 1 / {(DB / DA) -1}] [Equation (4-1)] When DA / DB 0 (h L / 2) h = L / 2 × [1 + 1 / {(DB / DA) +1}] [Equation (4-2)] Can be. Where L is the length of the unit period. [0181] Utilizing this fact, in the ninth embodiment, the start position of the unit period and the bit transition position are synchronized to improve the detection sensitivity. FIG. 16 is a block diagram of a spread code synchronization detection device for a spread spectrum signal in the case of the ninth embodiment, and is a case where it is applied to the eighth embodiment described above. [0182] That is, in the ninth embodiment, the linear addition correlation calculation result DA from the linear addition result addition unit 52 and the linear addition correlation calculation result DB from the linear addition result subtraction unit 53 are transferred to the phase shift h estimation unit 59. Be supplied. The same timing signal as that supplied to the cumulative addition unit 57 is supplied from the timing control unit 9 to the phase shift h estimation unit 59. [0183] In this phase shift h estimation unit 59, the bit transition position from the start position of each unit period in each unit period in the Μ interval is performed by the above-mentioned [Equation (4-1)] and [Equation (4-2)]. Estimate the phase shift h of. As shown in FIG. 17, the M estimated values of the phase shift h for each unit period estimated by the phase shift h estimation unit 59 have a distribution centered on h = 0 without the phase shift h and a unit period. It is divided into two distributions centered on the phase shift h corresponding to the true bit transition position deviated from the beginning position of. [0184] Therefore, the phase shift h estimation unit 59 discriminates the groups related to the distributions of these two phase shifts h, and estimates the phase shift h of the bit transition position from the start position of the unit period from the distribution centered on 0. Then, the timing control unit 9 is controlled based on the estimation result, and in the correlation detection from the next time, the timing of capturing the received signal r (n) is shifted by the estimated value, and the bit transition position is for correlation detection. Make sure that it matches the start position of the unit period described above. [0185] By correcting the bit transition position in this way, the above-mentioned unit period for correlation detection can be synchronized with the navigation data, and the subsequent decrease in C / N can be avoided. [0186] Further, when the C / N is at a level sufficient to demodulate the navigation data, the bit transition position after the correction of the phase shift h is in a state of matching the start position of the unit period or slightly deviating. Therefore, DB is distributed in 0 and its vicinity, and DA is distributed in +20 | d | and its vicinity, -20 | d | and its vicinity, depending on the navigation data bits "0" and "1". Therefore, it can be determined whether the navigation data bit is "0" or "1" by the positive or negative sign of whether DA is +20 | d | or -20 | d |. [0187] FIG. 18 is a flowchart for explaining the flow of the above-described processing in the ninth embodiment. The processing of the flowchart shown in FIG. 18 is linear in that the first and second signal sequences A and B are generated from the received signals as in the fourth to sixth embodiments described above. This is a case where the addition correlation calculation results DA and DB, and their absolute sum D are obtained. In this example, it is assumed that the diffusion code and the carrier are synchronized. [0188] In this flowchart, the diffusion code synchronization detection process is performed, for example, DSP (Digital Signal). It is also a processing procedure when software processing is performed using a Processor) or a microcomputer. [0189] First, among the M unit periods from the 0th to the M-1th in the M interval, the variable m of which unit period is processed is set to the initial value m = 0, and the number of the unit period is set. Set the variable k, which is the phase shift h, to the initial value k = 0 (step S1). [0190] Next, the received signal r (n) converted into a digital signal by the A / D conversion unit 1 is taken into the memory for M sections as an input signal (step S2). Next, for the digital signal of the first unit period (m = 0), the first signal sequence A and the second signal sequence B are generated (step S3). Then, for each of the series A and B, the linear addition correlation calculation results DA and DB are obtained as described above, and the sum of their absolute values D is obtained (step S4). [0191] Then, it is determined whether or not the obtained absolute value sum D in the unit period has a value larger than the predetermined threshold value Dth (step S5). When it is determined that the absolute value sum D does not have a value larger than the predetermined threshold value Dth, it is determined that the carrier synchronization is out of sync, and the process proceeds to the carrier synchronization reacquisition routine. [0192] Further, in step S5, when it is determined that the sum of absolute values D has a value larger than the predetermined threshold value Dth, the correlation value linear addition correlation calculation result DA and the ratio DB / DA of DB are obtained. , The phase shift h is calculated by the above-mentioned [Equation (4-1)] and [Equation (4-2)] (step S6). Then, it is determined whether the sign of the linear addition correlation calculation result DA is positive or negative (step S7), and the determination result is passed to the routine for discriminating and processing the bit data of the navigation message. [0193] Next, it is determined whether or not the value of the phase shift h obtained in step S6 is near 0 (step S8). The method of discrimination is as described in FIG. h &lt;ε [Equation (5)] Or h&gt; 20-ε [Equation (6)] Whether you are satisfied or not. Here, ε is a value that can be regarded as being in the vicinity of 0, and is set to, for example, ε = 1.0 (milliseconds), that is, about one cycle of the diffusion code. In addition, since the unit period of 20-ε in Eq. (6) is 20 milliseconds, which is 20 times the period of one period of the diffusion code, the phase shift is a value close to one bit, that is, the unit period and bits. The phase shift h from the transition position indicates that the position is 0. [0194] When it is determined in step S8 that the phase shift h is not near 0, it is determined that the start position of the unit period has a phase shift h with respect to the bit transition position, and the phase shift h is set to h._kAnd increment the value of k by 1 (step S9). Then, the process proceeds to the next step S10, and it is determined whether or not the above processing has been performed for all the unit periods of the M section. [0195] Further, in step S8, when it is determined that the phase shift h is close to 0, it is determined that the start position of the unit period is synchronized with the bit transition position, step S9 is skipped, step S10 is performed, and the M section is performed. It is determined whether or not the above processing has been performed for all the unit periods of. [0196] When it is determined in step S10 that the above-mentioned processing has not been completed for all the unit periods in the M interval, the variable m of the unit period number is set to m + 1 (step S11), and the next unit period is set. After specifying, the process returns to step S3, and the processing after step S3 is repeated. [0197] Further, when it is determined in step S10 that the above processing has been performed for all the unit periods in the M interval, k phase shifts h stored in the memory in step S have been performed._k~ h_k-1The phase shift h is estimated from the distribution of the above using the relationship shown in FIG. 17 (step S12). [0198] Then, using the estimated phase shift h, the sampling point of the digital signal captured as the unit period is corrected (step S13) so that the start position of the unit period and the bit transition position are synchronized. After that, the process returns to step S1 and the same process as described above is repeated for the next M section. [0199] As described above, in the ninth embodiment, since the start position of the unit period and the bit transition position of the navigation data are synchronized, not only the detection sensitivity of the diffusion code synchronization can be improved, but also the linear addition correlation calculation can be performed. As a result, there is an effect that the navigation data can be demolished from the positive and negative codes of DA. [0200] In the processing example of the flowchart of FIG. 18, the received signal is stored in the M section before processing, but the received signal may be processed for each unit section without being stored in the M section. [0201] Also in this ninth embodiment, the length of the unit period is the same as in the case of the fourth to eighth embodiments described above. [0202] [10th Embodiment] According to the method of the above embodiment, the detection sensitivity (corresponding to the reception sensitivity of the GPS receiver) of the spread code synchronization of the spread spectrum signal is improved, but the detection sensitivity and the processing time are in a trade-off relationship. That is, when the correlation is detected over multiple cycles of the diffusion code in order to improve the detection sensitivity, the processing time inevitably increases. [0203] The above-described embodiment is based on the premise that carrier synchronization has been performed in advance, but when the carrier frequency is unknown, a process of synchronizing carriers is required, and a carrier frequency is searched for in some way. The operation to do is entered. Then, since the correlation value is checked for each frequency at the time of search, if the number of searches is large, the response as a GPS receiver may deteriorate. [0204] The tenth embodiment is an improvement of the detection sensitivity, the processing speed at the same time less than is obtained by allowing the Succoth. FIG. 19 shows a block diagram of a spread code synchronization detection device for a spread spectrum signal according to the tenth embodiment. The example of FIG. 19 is an application of the tenth embodiment to the device of the first embodiment shown in FIG. [0205] In the tenth embodiment, as shown in FIG. 19, as for the digital signal of the received signal r (n) from the A / D converter 1, for example, the M section thereof is stored in the memory 71. The clock for writing at this time is the clock CLK from the frequency divider 8 having a frequency corresponding to the chip rate of the GPS signal of 1.023 MHz, as in the above-described embodiment. [0206] In the tenth embodiment, the GPS signal is read from the memory 71 and transferred to the digital matched filter 2 in the subsequent stage by a high-speed clock CLKa having a transfer rate higher than the GPS signal chip rate of 1.023 MHz. That is, the reference clock from the reference clock generator 10 is supplied to the frequency divider 76, the high-speed clock CLKa is generated by the frequency divider 76, and is supplied to the memory 71 and the digital matched filter 2. [0207] The data read from the memory 71 is supplied to the multiplier 72 for carrier synchronization. In this multiplier 72, two-phase clocks of I and Q from a clock generator 74 composed of a numerically controlled variable frequency oscillator (hereinafter referred to as NCO) are alternately time-divisioned by the I / Q selection unit 75. Selected and supplied. A reference clock from the reference clock generator 10 is supplied to the clock generator 74. [0208] Further, a carrier control unit 73 is provided, and the oscillation frequency of the NCO 74 is controlled by the control signal from the carrier control unit 73. As will be described later, the carrier control unit 73 is controlled by a control signal according to the correlation point detection result from the correlation point detection unit 7. [0209] When the carriers are synchronized, the multiplier 72 obtains a digital signal from which the carriers have been removed, and the digital signal is supplied to the digital matched filter 2. The configuration up to the correlation point detection unit 7 in the subsequent stage of the digital matched filter 2 is exactly the same as described above with reference to FIG. [0210] Then, in the tenth embodiment, the control signal corresponding to the correlation point detection result from the correlation point detection unit 7 is supplied to the carrier control unit 73. In this case, the carrier control unit 73 uses the control signal from the correlation point detection unit 7 to detect the correlation point due to the presence of a peak value exceeding the threshold value in the correlation point detection unit 7, until the clock frequency of the NCO 74 is detected. Is variably controlled in the up direction or the down direction, and when the correlation point np is detected by the correlation point detection unit 7, the frequency of the output clock of the NCO 74 is held at the frequency at that time. [0211] As described above, in the tenth embodiment, the memory 71 is provided between the A / D conversion unit 1 and the digital matched filter 2, and the high-speed clock CLKa is used for the data read from the memory 71. Since the high-speed processing is performed, the processing time for the correlation calculation processing and the linear addition processing in the digital matched filter 2 can be shortened. For example, if the transfer speed is increased by 10 times on the assumption that the digital matched filter 2 has sufficient hardware capacity, the processing time can be reduced to 1/10. The carrier search does not need to update the received signal every time the carrier frequency setting is changed, and can be performed using the same data stored in the memory. [0212] The above description of the tenth embodiment is applied to the first embodiment, but the tenth embodiment can also be applied to the second to ninth embodiments. Needless to say. [0213] [Other variants] In the above description of the embodiment, the digital matched filter, the linear addition unit, the absolute value calculation unit, the cumulative addition unit, and the correlation point detection unit are described as being configured as separate hardware, but each of these parts All may be configured by one DSP. Of course, it is also possible to configure a part of each of them by a DSP. Further, all or a part of each of them can be configured by software processing. [0214] In the above description of the embodiment, the present invention is applied in the case of a signal received from a GPS satellite, but the present invention is not limited to a signal from a GPS satellite, but a signal obtained by spectrum-spreading data with a spreading code. It is applicable to all cases of performing spread code synchronous acquisition of. [0215] [Effect of the invention] As described above, according to the present invention, the detection sensitivity of spread code synchronization of a spread spectrum signal can be significantly improved. Therefore, for example, if the present invention is applied to a GPS receiver, the reception sensitivity is improved, and effects such as miniaturization of the antenna and expansion of the reception area can be expected. [0216] Further, according to the present invention, while it takes time in principle for the sliding correlator, which is a conventional method, to synchronize, the processing time can be significantly reduced by utilizing a high-speed DSP or the like using a digital matched filter. It will be possible. [Simple explanation of drawings] FIG. 1 is a diagram for explaining a main part operation of the first embodiment of the spread code synchronous detection method for a spread spectrum signal according to the present invention. FIG. 2 is a block diagram of a first embodiment of a spread code synchronous detection device for a spread spectrum signal according to the present invention. FIG. 3 is a diagram showing an example of a spectrum of a correlation detection output. FIG. 4 is a block diagram showing a configuration example of a digital matched filter used in the embodiment of the present invention. FIG. 5 is a block diagram showing another configuration example of a digital matched filter used in the embodiment of the present invention. FIG. 6 is a block diagram of a second embodiment of a spread code synchronous detection device for a spread spectrum signal according to the present invention. FIG. 7 is a block diagram of a third embodiment of a spread code synchronous detection device for a spread spectrum signal according to the present invention. FIG. 8 is a block diagram of a fourth embodiment of a spread code synchronous detection device for a spread spectrum signal according to the present invention. FIG. 9 is a diagram for explaining the operation of a main part in the fourth embodiment. FIG. 10 is a diagram for explaining a main part of the fourth embodiment. FIG. 11 is a block diagram of a fifth embodiment of a spread code synchronous detection device for a spread spectrum signal according to the present invention. FIG. 12 is a block diagram of a sixth embodiment of a spread code synchronous detection device for a spread spectrum signal according to the present invention. FIG. 13 is a block diagram of a seventh embodiment of a spread code synchronous detection device for a spread spectrum signal according to the present invention. FIG. 14 is a block diagram of an eighth embodiment of a spread code synchronous detection device for a spread spectrum signal according to the present invention. FIG. 15 is a diagram for explaining the operation of a main part in the eighth embodiment. FIG. 16 is a block diagram of a ninth embodiment of a spread code synchronous detection device for a spread spectrum signal according to the present invention. FIG. 17 is a diagram used for explaining a main part of the ninth embodiment. FIG. 18 is a flowchart for explaining a flow of processing in the ninth embodiment. FIG. 19 is a block diagram of a tenth embodiment of a spread code synchronous detection device for a spread spectrum signal according to the present invention. FIG. 20 is a diagram showing a configuration of signals from GPS satellites. FIG. 21 is a diagram for explaining a conventional carrier and diffusion code synchronization process. FIG. 22 is a diagram used for explaining an embodiment of the present invention. [Explanation of symbols] 1 ... A / D converter, 2 ... digital matched filter, 3 ... diffusion code generator, 4,11 ... unit period linear addition part, 5 ... absolute value calculation part, 6. .. Absolute value cumulative addition part, 7 ... correlation point detection part, 12 ... digital matched filter using FFT