DC free data modulation

The present invention relates to the field of data modulation / demodulation, and particularly relates to a data modulation device and a data demodulation device that reduce an error propagation probability and provide a modulation code having high code efficiency and DC suppression capability.

The multi-coding method is a method for imparting DC suppression capability to a modulation code that does not have DC suppression capability. This is because even if a bit of additional information is inserted into the input data string, 2a other random data strings are created by this additional information, and the 2a random data strings are modulated without DC suppression capability, of which. This is a method of giving DC suppression ability by selecting a modulated data string having the least DC component.

Conventionally, Device for encoding / decoding of Patent Document 1 The code rate R of the code of d = 1, k = 7, m = 2, n = 3 illustrated in "n-bit source words into corresponding m-bit channel words, and vice versa" includes redundancy of about 2%. For example, R = 49/75 = 0.6533, and the code efficiency R / C (d, k) is R / C (d, k) = 0.6533 / 0.6793 = 96.2%. For convenience of explanation, it will be referred to as "A-Code" below.

Code rate of d = 1, k = 8, m = 8, n = 12 illustrated in Method of allocating RLL code having enhanced DC suppression capability, modulation method, modulation method, and demodulation apparatus therefor in Patent Document 2. R is R = 32/49 = 0.6531 if the redundancy of about 2% is included, and the code efficiency R / C (d, k) is R / C (d, k) = 0.6531 / 0.6853 = 95.3%. The modulation code used in Patent Document 2 is hereinafter referred to as "B-Code" for convenience of explanation. C means the capacity of the code by d and k.

In addition, when d = 1, k = 7 modulation is performed by inserting 4 bits of redundancy every 25 bytes of data using the Guided Scrambling method described in Chapter 13 of Non-Patent Document 1, the code rate R is R = 200. / 306 = 0.6536, and the code efficiency R / C (d, k) is R / C (d, k) = 0.6536 / 0.6793 = 96.2%. The modulation code used in the above document is hereinafter referred to as "C-Code" for convenience of explanation.

The code efficiencies of the above three conventional modulation methods are similar to 95.3% to 96.2%, and the power spectral density (PSD) curve representing the DC suppression capability of these codes is as shown in FIG. ..

However, in order for the multimode coding method exemplified in the above-mentioned literature to have sufficient DC suppression capability, the frequency of additional information for converting the data string into random data must be increased accordingly. Moreover, even if a modulation technique having high code efficiency is developed, the DC suppression capability may not be sufficient. As an example, the B-Code disclosed in Patent Document 2 described above can suppress DC without redundancy, but cannot have satisfactory DC suppression performance without a separate additional bit. Hereinafter, a code that can suppress DC without redundancy but does not have a separate additional bit and has poor suppression performance is referred to as an insufficient DC suppression modulation code.

FIG. 2 is a drawing for explaining a conventional multiplexing method for converting an input data string into random data, and uses a-bit additional information to convert the input data string into 2a other random data strings. An example of this method is disclosed in Patent Document 3, but conventionally, data scramble is continuously performed on the input data.

In FIG. 2, data x of a predetermined number of bits_i,₀~ x_i, u-₁Input data string composed of (referred to as a code modulation unit)

<maths num="1"><img file="JP4559112B2_D0001.tif" /></maths>Is the multiplexing information s_tAnd x_i,₀~ x_i, u-₁Random data string through the exclusive OR operation by the exclusive OR element corresponding to each

<maths num="2"><img file="JP4559112B2_D0002.tif" /></maths>Is converted to.

That is, the first code modulation unit x_i,₀And initial data (multiplexed information) s_tIs the conversion data y of the first code modulation unit excluding the initial data by performing the exclusive OR operation using the exclusive OR element.^t_i,₀To generate. Next, the conversion data y of the code modulation unit for which the above-mentioned conversion has been completed^t_i,₀And the next sign modulation unit x_i、₁Is the next conversion data y by exclusive OR operation^t_i,₁Is also generated. Hereinafter, similarly, the input data string

<maths num="3"><img file="JP4559112B2_D0003.tif" /></maths>The final sign modulation unit of (where is x_i, u-₁), The exclusive OR operation process of the conversion data of the immediately preceding code modulation unit and the code modulation unit to be converted is repeated.

In FIG. 3, the input data string is converted into random data by the multiplexing method shown in FIG. 2, and then the result of run length limited (RLL) modulation is recorded on a storage medium and then recorded. RLL stream when playing

<maths num="4"><img file="JP4559112B2_D0004.tif" /></maths>Stream restored through inverse transformation

<maths num="5"><img file="JP4559112B2_D0005.tif" /></maths>It is a figure which showed.

RLL stream before inverse conversion when data is inverted

<maths num="6"><img file="JP4559112B2_D0006.tif" /></maths>Demodulation code unit at the beginning of (multiplexing information s)_t) Is excluded, and the demodulation code unit that is the reverse conversion target and the demodulation code unit immediately before the demodulation code unit (initial data or the demodulation code unit before the inverse conversion) are restored through an exclusive OR operation. Stream

<maths num="7"><img file="JP4559112B2_D0007.tif" /></maths>Is generated.

That is, the first demodulation code unit y^t_i,₀And initial data (multiplexing information) s_tData x that was inversely transformed after inverse transformation by the exclusive OR operation with_i,₀Is generated. Then, the y^t_i,₀(Demodulation code unit before inverse conversion) and next demodulation code unit y^t_i,₁Data x that was inversely transformed after the inverse transformation by the exclusive OR operation with_i,₁Is generated in the same way. Hereinafter, in the same manner, the RLL stream

<maths num="8"><img file="JP4559112B2_D0008.tif" /></maths>The exclusive OR operation processing of the demodulation code unit to be inversely converted and the democratic code unit immediately before the demodulation code unit is repeated until the final demodulation code unit of.

In this way, at the time of data inverse conversion, one demodulation code unit immediately before the inverse conversion is used for the inverse conversion of the demodulation code unit. Therefore, if an error occurs, the effect is the demodulation code unit and the next demodulation code. It extends to the unit. For example, the demodulation code unit y before inverse conversion^{t *}_i, u-₃If an error occurs in, the data after inverse conversion x^*_i, u-₃And the inversely transformed next data x^*_i, u-₂Affects.

Therefore, traditionally RLL streams

<maths num="9"><img file="JP4559112B2_D0009.tif" /></maths>If an error occurs in, the corresponding pre-scramble data x^*_i, u-₃Not only the next data x^*_i, u-₂There was a problem that the error was propagated by. Such error propagation characteristics can be said to be a general feature of the multimode coding method using scrambling.<patcit num="1"><text>U.S. Pat. No. 6,225,921</text></patcit><patcit num="2"><text>U.S. Pat. No. 6,281,815</text></patcit><patcit num="3"><text>Korean Patent Application No. 1999-703183 (Digital Modulation Circuit, Digital Modulation Method, Digital Demodulation Circuit and Digital Demodulation Method, Sanyo Electric Co., Ltd.)</text></patcit><patcit num="4"><text>Korean Patent Application No. 2001-21360</text></patcit><nplcit num="1"><text>Kees A. Schouhamer Immink, Codes for Mass Data Storage Systems, Shann on Foundation Publishers, 1999</text></nplcit>

<p> Therefore, it is an object of the present invention to combine an inadequate DC suppression modulation code and a multimode coding method while maintaining the DC suppression performance as in the three prior arts to achieve a highly efficient and excellent DC suppression modulation code. It is in the place to provide a data modulation device.</p><p> Another object of the present invention is to provide a data modulation device and a data demodulation device that reduce the error propagation probability.</p><p> Another object of the present invention is to provide a data modulation device and a data demodulation device that employ a multiplexing method in which input data is discontinuously scrambled to generate a pseudo-random data string while maintaining DC suppression performance. It is in.</p><p> According to yet another field of the invention, the object is an encoder that modulates source data into codewords with a minimum sequence length limit of d and a maximum sequence length limit of k (where d and k are positive integers). The encoder is a data modulator comprising the code word a, when the sum of the End Zero of the code word a and the Lead Zero of the code word b is smaller than the minimum continuous length limit or larger than the maximum continuous length limit. The codeword a is changed to another codeword so that the sum of the End Zero and the Lead Zero of the codeword b is equal to or greater than the minimum continuous length limit and equal to or less than the maximum continuous length limit.<u style="single">It is selected from codeword b1 and codeword b2,</u>Connected to the codeword a, the codeword a is the preceding codeword, the EndZero is the number of consecutive 0s from the LSB to the MSB of the codeword a, and the LeadZero is the MSB of the codeword b. The number of consecutive 0s from to LSB<u style="single">Therefore, when the code string in which the code word a and the code word b1 are concatenated is the code string X1, and the code string in which the code word a and the code word b2 are concatenated is the code string X2, the code word is included. The codeword b1 and the codeword b2 are arranged so that the INV parameter that predicts the transition of the next codeword has opposite values depending on whether the number of bits "1" of is odd or even, and the codeword a And the codeword b1 or the codeword b2 are concatenated, even if the codeword a, the codeword b1 or the codeword b2 is converted to another codeword by the boundary rule, of the INV parameter. The code string X1 and the code string X2 are arranged so as to maintain the characteristics.</u>This is achieved by a data modulation device characterized in that.</p><p> Still other aspects and advantages of the present invention will be further clarified by the following description and can be learned by carrying out the present invention.</p>

<p> The present invention provides high efficiency in terms of recording density by combining an inadequate DC suppression modulation code with a multimode coding scheme to provide a highly efficient modulation code with improved DC suppression capability.</p><p> The present invention is to maintain the DC suppression capability of a codeword even when the codeword is replaced with another codeword because the length limiting condition between the codewords cannot be satisfied during inadequate DC suppression RLL modulation. Provides even better DC suppression capability of the code sequence by arranging.</p><p> Further, in the multi-coding method of the present invention, the input data is discontinuously scrambled into pseudo-random data and the DC component is removed. Therefore, the error propagation probability can be reduced as compared with the multimode coding method using general scrambling while maintaining the DC suppression performance.</p>

Hereinafter, desirable embodiments of the present invention will be described with reference to the accompanying drawings.

FIG. 4 is a block diagram according to an embodiment of the data modulation device according to the present invention. The input data string is x = (x) as shown in equation (1).₀, x₁, ..., x_k-1), And the vXu divider 10 separates the input data string from vXu (= k) as shown in equation (2), that is, the input data string is v data strings with u byte length. Divide into.

<maths num="10"><img file="JP4559112B2_D0010.tif" /></maths>

<maths num="11"><img file="JP4559112B2_D0011.tif" /></maths> Where x_i,_j= x_{ixu + j}Is.

The duplexer 20 using pseudo-scramble adds a-bit additional information to each data string of vXu divided by the divider 10 and L = 2^aAfter multiplexing into individual data strings, the data strings are converted into pseudo-random data by the added multiplexing information s. After the conversion to random data is completed, a data string having one u-byte length as shown in equations (3) and (4).

<maths num="12"><img file="JP4559112B2_D0012.tif" /></maths>Against 2^aU-byte data with different contents multiplexed into pieces is created.

<maths num="13"><img file="JP4559112B2_D0013.tif" /></maths>

<maths num="14"><img file="JP4559112B2_D0014.tif" /></maths> Here, it is a quotient of u-1 a multiple of q, p = 0,1, ..., r, r = (u-1) / q. q is also called the scramble interval index. function

<maths num="15"><img file="JP4559112B2_D0015.tif" /></maths>Is an input data string using the multiplexing information s

<maths num="16"><img file="JP4559112B2_D0016.tif" /></maths>Means the result of making random data.

The synchronization and multiplexing ID inserter 30 can have a plurality of channels (here L = 2a) depending on the number of bits of the added multiplexing information, and is multiplexed into a pseudo-random data string multiplexed into 2a, that is, multiplexing. A synchronization pattern is inserted into the multiplexed pseudo-random data string to which the multiplexing information is added, and the multiplexing information is converted into a multiplexing identifier (hereinafter, ID).

The encoder 40 can have multiple (here L = 2a) channels with the added multiplexing information and performs RLL modulation for inadequate DC suppression codes. Here, the modulation that converts the m-bit source data into an n-bit (n m) codeword while limiting the minimum consecutive length limit d and the maximum continuous length limit k is called RLL modulation.

Since the encoder 40 of the present invention does not have a separate code conversion table for DC suppression to which a separate bit is added, DC suppression is possible without redundancy, but a code with reduced suppression performance is used. , Predetermined continuous length limit condition (as an example, minimum continuous length limit (d) = 1, maximum continuous length limit (k) = 7, RLL (1, 7, 8, 12) code in that example) A code word is generated, grouped by the code word according to the continuous length limiting condition, and the main code conversion table and the predetermined continuous length limiting condition arranged in the code word so that the code string for the source word has DC control capability are set. Satisfied, the unnecessary code words are taken from the main code conversion table and RLL modulation is performed using the auxiliary conversion table for DC control.

Synchronization and Multiplexing In the ID inserter 30, conversion of multiplexing information to multiplex ID is performed by setting the minimum length limit d = 2 and the maximum length limit k = 7 and lengthening the minimum length limit to mark the minimum (or pit). ) Can be increased to reduce signal interference noise. As another embodiment, the minimum continuous length limit d = 2 and the maximum continuous length limit k = 10 of the encoder 40, and an RLL (2, 10, 8, 15) code can be given as an example.

Compare and selector 50 is RLL modulated 2^aSelect one of the modulation streams with the least DC component for each modulation stream.

FIG. 5 is a diagram showing an example of a multiplexing method using pseudo-scramble applied to the multiplexing device shown in FIG. 4, and in the present invention, a method of discontinuously scrambling input data is simulated. It is called a multiplexing method using scrambling.

As shown in Fig. 2, the multiplexing method using scrambling causes an error in the next data if an error occurs at a certain position. Therefore, discontinuous data scrambling to the extent that it does not affect the DC component of the code sequence has the advantage of reducing the probability that the error will be propagated to the next data.

In Figure 5, x_i, 0 ~ x_i, u-₁Is an input data string having a u-byte length composed of data each consisting of a predetermined number of bits.

<maths num="17"><img file="JP4559112B2_D0017.tif" /></maths>Is the multiplexing information s_tPseudo-random data function through exclusive-OR operation by exclusive-OR element arranged every qth without being arranged continuously with

<maths num="18"><img file="JP4559112B2_D0018.tif" /></maths>Has been converted to.

Here, the multiplexing information s_tIs an input data string with a u byte length

<maths num="19"><img file="JP4559112B2_D0019.tif" /></maths> When the number of bits a of the multiplexing information st is smaller than or the same as the number of bits m of the input data, the multiplexing information is applied. However, if a &lt;m, some bits of the input data (a bit from LSB (Least Significant Bit) or a bit from MSB (Most Significant Bit) or any a bit in the data of m bit) are used. Even if it is pseudo-random data, it shows almost the same performance as when it is made into pseudo-random data by using all m bits.

That is, the first modulated data (called the code modulation unit) x_i,₀And initial data (multiplexing information) s_tBy exclusive OR operation with, the first code modulation unit x_i,₀(The first data to be modulated) is the data y^t_i,₀Is modulated into. Code modulation unit x_i,₁From x_i,_q-1Exclusive OR operation is not performed until, and therefore the code modulation unit x_i,₁From x_i,_q-1Is output unchanged. Data of the code modulation unit after the conversion described above y^t_i,₀And the qth sign modulation unit x_i,_qNext conversion data y by exclusive OR operation with^t_i,_qIs generated in the same way. Hereinafter, in the same manner, the input data string in the qth code modulation unit.

<maths num="20"><img file="JP4559112B2_D0020.tif" /></maths>The exclusive OR operation process is repeated until the final code modulation unit of.

FIG. 6 is a drawing showing the error propagation characteristics when the data converted by the multiplexing method using the pseudo-scramble shown in FIG. 5 is reproduced. Data string at the time of data inverse conversion and before inverse conversion

<maths num="21"><img file="JP4559112B2_D0021.tif" /></maths>Is an RLL stream demodulated by a decoder that demodulates a data sequence by the RLL modulation method used during modulation by a decoder (not shown). Further, the configuration shown in FIG. 6 is referred to as a demultiplexer that discontinuously descrambles the data string before the inverse conversion using the multiplexing information to provide the inversely converted data string. Can be done.

In FIG. 6, the first initial data (multiplexed information s)_tDemodulation code unit y excluding)^t_i,₀From every qth, the restored data is generated through the exclusive OR operation of the demodulation code unit that is the inverse conversion target and the demodulation code unit before the qth.

That is, the first demodulation code unit y^t_i,₀And initial data (multiplexing information) s_tData x that was inversely transformed after inverse transformation by the exclusive OR operation with_i,₀Is generated. Demodulation code unit x_i,₁From x_i,_q-1Since exclusive OR operation processing is not performed up to, the demodulation code unit x_i,₁From x_i,_q-1Is output unchanged until. After that, y mentioned above^t_i,₀(Demodulation code unit before inverse conversion) and the qth demodulation code unit y, which is the next demodulation code unit^t_i,_qData x that was inversely transformed after the inverse transformation by the exclusive OR operation with_i,_qIs generated. Hereinafter, in the same manner, the data string before inverse conversion

<maths num="22"><img file="JP4559112B2_D0022.tif" /></maths>The exclusive OR operation process is repeated in the qth demodulation code unit until the final demodulation code unit of.

Therefore, after RLL-modulating data consisting of pseudo-random data, the RLL stream is played when the data stream stored in a storage medium such as an optical disk is played back.

<maths num="23"><img file="JP4559112B2_D0023.tif" /></maths>In, the input data is not converted to other data by exclusive OR operation at the time of modulation.^*_i,_{q + 1}If an error occurs only in, do not propagate the error to other data. Error propagation occurs only when an error occurs in the regenerated RLL stream that corresponds to the data whose input data has been converted to other data by the exclusive OR operation during modulation.

This means that if the data is converted to pseudo-random data by the multiplexing method using the pseudo-scramble shown in Fig. 5, the period of the exclusive OR operation will be longer than when the data is converted by the multiplexing method shown in Fig. 2. It means that the error propagation probability is reduced to 1 / q when q is set. Here, the value of q may be selected at a level that accepts DC suppression performance when RLL-modulated. This is because the larger the value of q, the lower the probability of error propagation, but the lower the DC suppression performance. Conversely, the smaller the q value, the better the DC suppression performance, but the higher the error propagation probability. This is because it has the characteristic of

FIG. 7 is a PSD curve showing the change in DC suppression ability due to the period q of the exclusive OR operation. Modulation code with period q of exclusive logical sum operation when the number of bits of multiplexing information st is a = 2 bits, the length of one multiplexing is u = 50 bytes, and the number of bits of input data to be modulated is m = 8. Shows the DC suppression performance of the column. In the exclusive OR operation, the 2-bit multiplexing information st was performed by only 2 bits from the LSB of the 8-bit input data. The PSD curve shows the DC suppression ability by the exclusive OR operation result with the exclusive OR operation cycle q set to 1 byte, 5 bytes, 10 bytes, 15 bytes, and 20 bytes from the bottom, respectively. As can be seen in FIG. 7, there is no big difference in the DC suppression performance even if the exclusive OR operation is performed every 5 bytes. On the other hand, the error propagation rate can be reduced to 1/5.

Next, a weak DC-free RLL conversion code according to an embodiment of the present invention will be described. In the RLL code expressed as (d, k, m, n), the excellent degree of the code is evaluated by the aspect of recording density and the ability to suppress the DC component, which are the major factors expressing the performance of the code. Here, m is the number of data bits (also called the number of bits of the source data and the number of information word bits), n is the number of code word bits after modulation (also called the number of channel bits), and d is between 1 and 1 in the code word. The minimum number of consecutive 0s that can exist in (called the minimum consecutive length limit), and k is the maximum number of consecutive 0s that can exist between 1s and 1s in the code word (called the maximum continuous length limit). The bit spacing in the codeword is expressed as T (corresponding to the clock signal cycle used during recording or playback).

One of the modulation methods that can improve the recording density is to reduce the number of bits n of the codeword while keeping d and m under the given conditions. However, the RLL code must satisfy the minimum length limit d and the maximum length limit k in the codeword. When the number of data bits is m while satisfying this (d, k) condition, the number of code words satisfying RLL (d, k) may be 2 m or more. However, in order to actually use such a code, the continuous length limiting condition, that is, the RLL (d, k) condition must be satisfied even in the part where the codeword and the codeword are connected, and the optical disc recording / If the DC component of the cord affects the system performance, such as in a playback device, the cord to be used must have DC suppression capability.

In the present invention, there are roughly two codeword code tables converted for source code, that is, 1) a main conversion table and 2) an auxiliary conversion table for DC control.

The code word generation method in each conversion table is as follows, and a code (1, 7) in which the minimum continuous length limit is 1 and the maximum continuous length limit is 7 will be described as an example.

FIG. 8 is a table showing the codeword characteristics of various codeword groups and the corresponding codegroups in the main code conversion table.

The minimum length limit of the code is d, the maximum length limit is k, the number of bits of the source data is m, the number of bits of the code word after modulation is n, and the number of 0s consecutive from the LSB of the code word in the MSB direction is set. When the number of 0s continuous in the LSB direction from EZ (End Zero) and MSB is LZ (Lead Zero), the code word of d = 1, k = 7, m = 8, n = 12, 0 EZ 5 is LZ. It is as follows when classified according to the conditions of.

(1) Number of codewords satisfying 1 LZ 7: 210 (2) Number of codewords satisfying 0 LZ 4: 316 (3) Number of codewords satisfying 0 LZ 2: 264 The minimum number of codewords must be 256 or more in order to modulate the source data with m = 8, but in the case of (1) above, since the number of codewords is less than 256, other LZ conditions are used. You can satisfy the number of codewords you need by taking some of the codewords you are satisfied with. In this case, if 51 of the codewords with LZ = 0 in (2) are subtracted and added to the group (1), the number of codewords belonging to the group (1) will be 261. , The number of codewords belonging to the group (2) is 316-51 = 265, the number of codewords belonging to the group (3) is 264, and the number of codewords belonging to the groups (1) to (3) is 256 or more. The number of codewords in the group corresponding to each condition can satisfy the minimum number of modulation codewords of 256 for 8-bit source data. Of these, select only 256 codewords for each and create 3 main code conversion tables MCG1 to MCG3. In the table of Fig. 8, MCG (Main Code) Group) 1 is the name of a group that includes a codeword that meets the condition (1) and a part (51) of the codewords that satisfy (2), and MCG2 and MCG3 are in order. It is the name of a group that includes code words that meet the conditions (2) and (3) above, and only 256 code words from each of these main code groups MCG1 to MCG3 are used as conversion codes for the source code.

FIG. 9 shows the codeword characteristics of various codeword groups and the corresponding codegroups in the auxiliary conversion table for DC control.

The codewords in the auxiliary conversion table for DC control are the codewords that satisfy 6 EZ 7 out of the codewords d = 1, k = 7, m = 8, and n = 12, and the codewords remaining in MCG and LZ = Combined with a codeword of 5, 6 or LZ = 3, it is used as a codeword of the auxiliary code group ACG for DC control. The conditions for generating this codeword are as follows. Each item is shown in the table of FIG. 4 in order, and the names of the auxiliary conversion tables for DC control are shown as ACG1, ACG2, and ACG3.

8 codewords that satisfy ACG1: 6 EZ 7, LZ 0 + 5 codewords remaining in MCG1 + 6 EZ 7, LZ = 0, and 2 codewords of 1010xxxxxxxx = 15 ACG2: 12 codewords satisfying 6 EZ 7, 0 LZ 6 + 0 EZ 5, 5 LZ 6 satisfying 21 codewords + 9 codewords remaining in MCG2-6 EZ 7, LZ = 0, and 1010xxxxxxxx codewords 2 = 40 ACG3: 10 codewords satisfying 6 EZ 7, 0 LZ 3 + 0 EZ 5, 33 codewords satisfying LZ = 3 + 8 codewords remaining in MCG3 = 51 FIG. 10 shows the next code group (M = ncgdet), previously determined by the end zero number EZ_a of codeword a, using the main conversion table described in FIG. 8 and the auxiliary conversion table for DC control shown in FIG. That is, it is a table in which the parameter ncg indicating the next code group of the code word a is arranged. For codeword b, the codegroup to which the codeword b belongs is previously determined by the end zero number EZ_a of the codeword a, but if EZ_a = 0, the codegroup to which the next codeword b belongs is 1 (=). If MCG1) and 1 EZ_a 3, the code group to which the next code word b belongs is 2 (= MCG2), and if 4 EZ_a 7, the code group to which the code word b belongs belongs. Is 3 (= MCG3).

On the other hand, the continuous length restriction (d, k) condition must be satisfied even at the point where the code word a and the code word b are connected. FIG. 11 shows that when the codewords a and b are concatenated, they must be considered due to the condition of the joint length limitation. In FIG. 11, the condition of the continuous length limit can be satisfied only when the total value of the end zero number EZ_a of the code word a and the read zero number LZ_b of the code word b is equal to or more than the minimum continuous length limit d and the maximum continuous length limit k or less. ..

FIG. 12 shows the change of the parameter INV before and after the code conversion when the condition of the continuous length limitation explained through FIG. 11 cannot be satisfied. The parameter INV is a parameter that shows the transition of the next codeword. If the number of bits 1 in the codeword is even, the INV value is 0 and the number of bits 1 in the codeword. If is an odd number, the INV value is 1. In addition, DSV (Digital Sum) Value) is the total digital value in the codeword stream, and if the absolute value of DSV is small, it means that there are few DC components or low frequency components. CSV is the total digital value in the codeword, and if CSV is small, it means that there are few DC components or low frequency components in the code word, but CSV is used for evaluation of DC components and low frequency components during code conversion. Is used. If the value of INV accumulated up to the current codeword in the codeword stream is "0", the CSV value of the next codeword is added as it is to the accumulated DSV value up to that codeword, and the DSV value is updated. If the accumulated INV value is "1", the code of the CSV value of the next codeword is inverted and added to the accumulated DSV value up to that codeword to update the DSV value.

Referring to FIG. 12, for codeword b, the codegroup to which the codeword b belongs is previously determined by the EZ of the codeword a, but the number of codewords is insufficient in the main conversion table and the auxiliary conversion table for DC control. When a code group that takes a code word from another code conversion table is specified, the condition (d, k) may not be satisfied. In FIG. 12, a case where dEZ_a + LZ_bk is violated is illustrated. In this case, the EZ of the codeword a changes, but the codeword change occurs because the continuous length restriction condition cannot be satisfied in this way. This is called a boundary rule. The parameter INV, which indicates whether the number of bits 1 in the codeword stream is even or odd, may change from the state before the code change due to the boundary rule. Therefore, the codewords are arranged in a predetermined order in the code conversion table for DC control.

FIG. 13 is a diagram showing an example of branching of a code string by DC-controllable code words b1 and b2. One of the greatest features of the code conversion of the present invention is that the code word in the two code conversion tables that can be selected for DC control is INV (the number of bits "1" in the code word stream is even or The feature (representing an odd number) is maintained in reverse. This is because the codewords in the two code conversion tables have opposite INVs, so one of the two codewords has DC control in the optimum direction. However, as explained in the boundary rule above, changes may occur in the INV. In this case, the same phenomenon occurs in the two selectable code conversion tables at the time when DC control is possible, that is, the INV. If is changed in the same way in the two selectable code conversion tables, there is no problem. Coat consider the following matters in the present invention because this was designed de conversion table.

First, if there are A in Fig. 13, that is, b1 and b2 that can be selected as codeword b at the point where codeword a, codeword, and b are connected, when EZ_a is "xxxxxxxxx101", LZ_b1 (codeword b1) If the number of read zeros in) is "101xxxxxxxxx", then LZ_b2 (the number of read zeros in codeword b2) is "101xxxxxxxxx" respectively. That is, codewords with a read zero number of "101xxxxxxxxx" are placed in the same position in MCG1 and ACG1, and all codes with EZ of "xxxxxxxxx101" are placed in the same position in MCG1 and ACG1, MCG2 and ACG2, MCG3 and ACG3, respectively. Then, when the number of end zeros of codeword a is "xxxxxxxxx101", the INV of codeword a changes or changes in both the code string to which codeword b1 belongs and the code string to which codeword b2 belongs due to the boundary rule. However, in the end, the INV of the two-code string is maintained in reverse.

Then, when B in FIG. 13, that is, codewords b1 and b2 are connected to codeword c at the point where codeword b and codeword c are connected, respectively, the codewords b1, b2 or Even if the codeword c is converted to another codeword, the parameter INV value is reversed as it is in the code string in which the code word b1 and the code word c are concatenated and the code string in which the code word b2 and the code word c are concatenated. Is maintained at.

The synchronization pattern and the multiplexing ID will be described.

Use "010000000010000000010" which violates the limit of k = 7 in the synchronization pattern in the modulation method limited to the maximum number of 0s between bits 1 and 1 k = 7.

Sync Pattern: 010000000010000000010 The multiplexing ID is converted to 6 bits as shown in FIG. 14 by using 4-bit multiplexing information for multiplexing the data string. In this case, one data string is L = 24 = 16 Converted to a kind of random data string.

15A to 15E are main conversion code tables generated and arranged in consideration of the above-mentioned matters.

FIG. 16 is a code conversion table for auxiliary DC control generated and arranged in consideration of the above-mentioned matters. When using the codewords in the auxiliary conversion table for DC control, we checked whether the previous codeword (codeword a in Fig. 13) and the subsequent codeword (codeword c in Fig. 13) violated the joint length restriction. Later, it should only be used if it does not violate it.

FIG. 17 is a diagram showing a PSD curve for a code sequence after performing RLL (1, 7) modulation according to the method proposed in the present invention.

FIG. 18 is a table summarizing the code rate and code efficiency obtained by comparing the RLL (1, 7) code proposed in the present invention with the conventional codes A-Code, B-Code, and C-Code. .. The RLL (1, 7) cord of the present invention has an advantage that the efficiency of the cord is high and the recording density can be increased by about 2% while having the DC suppression ability similar to that of the conventional cord sequence.

FIG. 19 shows a PSD curve comparing the DC suppression capability with the EFMP (Eight to Fourteen Modulation Plus) code used in conventional DVDs when the RLL (2, 10, 8, 15) code is applied to the present invention. Shown. Here, the EFMP code is a code that suppresses DC by using a separate DC control code conversion table together with the main conversion code table. An example of the RLL (2, 10, 8, 15) code is disclosed in Patent Document 4 filed by the same applicant, and in the present invention, the DC suppression code conversion table using additional bits is not used. Insufficient DC suppression RLL modulation is performed using a conversion table and an auxiliary conversion table for DC control.

FIG. 20 is a table in which the code rate and the code efficiency are arranged by comparing the conventional EFMP code and the RLL (2, 10, 8, 15) code to which the present invention is applied. The RLL (2, 10, 8, 15) code of the method proposed in the present invention has DC suppression ability similar to that of EFMP, but has high code efficiency and improves the recording density by about 5.4%.

Although some embodiments of the present invention have been illustrated and described, such embodiments can of course be modified by those skilled in the art without departing from the ideas and principles of the invention, which are limited by the claims. Is.

Although the present invention can be widely used as a storage medium for storing digital data, it can be effectively applied to a high-density storage medium such as HD-DVD (High Density Digital Versatile Disc).

<figref num="1">It is a figure which showed the PSD curve of the conventional code.</figref><figref num="2">It is a figure for demonstrating the conventional multiplexing method.</figref><figref num="3">It is a reference figure which showed the error propagation characteristic at the time of reproducing the data converted by the conventional multiplexing method shown in FIG.</figref><figref num="4">It is a block diagram by one Example of the data modulation apparatus by this invention.</figref><figref num="5">It is a figure for demonstrating the multiplexing method using pseudo scrambling applied to the multiplexing device shown in FIG.</figref><figref num="6">It is a reference figure which showed the error propagation characteristic at the time of reproducing the data converted by the multiplexing method using pseudo scrambling shown in FIG.</figref><figref num="7">It is a PSD curve which showed DC suppression ability by the data modulation method of this invention.</figref><figref num="8">This is a table that organizes the codeword characteristics of the main conversion code group.</figref><figref num="9">This is a table that organizes the codeword characteristics of the auxiliary conversion code group for DC control.</figref><figref num="10">It is a table that organizes the following code group ncg determined by the number of end zeros EZ.</figref><figref num="11">It is a figure for demonstrating the condition of continuous length restriction when codewords a and b are concatenated.</figref><figref num="12">Figure 11 shows the changes in the parameter INV before and after code conversion when the conditions for continuous length restriction cannot be satisfied.</figref><figref num="13">It is the figure which showed the branch example of the code string by the code word b1 and b2 which can control DC.</figref><figref num="14">It is a conversion table which showed the conversion example of the multiplexing information to the multiplexing ID in the synchronization and multiplexing ID inserter shown in FIG.</figref><figref num="15A">It is a main conversion code table generated and arranged in consideration of the above-mentioned matters.</figref><figref num="15B">It is a main conversion code table generated and arranged in consideration of the above-mentioned matters.</figref><figref num="15C">It is a main conversion code table generated and arranged in consideration of the above-mentioned matters.</figref><figref num="15D">It is a main conversion code table generated and arranged in consideration of the above-mentioned matters.</figref><figref num="15E">It is a main conversion code table generated and arranged in consideration of the above-mentioned matters.</figref><figref num="16">It is an auxiliary conversion code table for DC control generated and arranged in consideration of the above-mentioned matters.</figref><figref num="17">It is a figure which showed the PSD curve of the RLL (1, 7) code of this invention.</figref><figref num="18">It is a table which compared the recording density and recording efficiency of the RLL (1, 7) code of this invention and the existing code.</figref><figref num="19">It is a figure which showed the PSD curve of the RLL (2, 10) code of this invention.</figref><figref num="20">It is a table comparing the recording density and recording efficiency of the RLL (2, 10) code of the present invention and the existing EFMP code.</figref>

Code description

10 vXu divider 20 Multiplexer 30 Synchronous and Multiplexed ID Inserter 40 encoder 50 Comparison and selector