Multilayer wiring board, prefabricated material for multilayer wiring board, method of manufacturing multilayer wiring board, electronic component, electronic component package, and method of forming conductive pillar

The present invention is a multi-layer wiring board<u style="single">, Multi-layer wiring board</u>Manufacturing method<u style="single">And electronic component packages</u>In particular, a multi-layer wiring board that connects the conductor wiring layers between layers using conductive pillars.<u style="single">, Of the multi-layer wiring board</u>Production method<u style="single">And, for example, an electronic component package in which highly integrated electronic components such as a chip size package (CSP) of a semiconductor element are mounted on a wiring board.</u>Regarding.

With the miniaturization and high functionality of various electronic devices, the demand for high mounting density of electronic components is increasing. Correspondingly, as a wiring board, a multi-layer wiring board having a structure in which insulator layers and wiring layers are alternately laminated is widely used. The multi-layer wiring board meets the demands for higher density and higher functionality by making the wiring layers multi-layered, and the connection between the wiring pattern layers is via-connected.

FIG. 24 is a cross-sectional view showing an example of a cross-sectional structure of a conventional multilayer wiring board. In this multilayer wiring board 901, wiring circuits formed over five layers are via-connected. The first wiring circuit 901, the second wiring circuit 902, the third wiring circuit 903, the fourth wiring circuit 904, and the fifth wiring circuit 905 are each formed by patterning the conductor layer. The wiring circuit of each of these layers is insulated by the insulating layer 906.

A general manufacturing method of a multilayer wiring board having a structure as illustrated in FIG. 24 will be described. First, a through hole 907 is formed in a portion of the double-sided laminated plate to be electrically connected in order to connect the layers of the double-sided laminated plate in which a conductor layer such as copper foil is adhered to both sides of the insulating layer. Then, the inner wall surface of the through hole 907 is chemically plated and then electroplated to thicken the conductor layer 907b of the inner wall surface of the through hole to improve the reliability of interlayer connection.

Next, the conductor layers on both sides are patterned into a predetermined circuit by, for example, a photoetching method.

Then, an insulating layer such as a prepreg layer is laminated on the patterned conductor layer, and then a conductor layer such as a copper foil is laminated and integrated by heating and pressurizing. Then, the number of layers is increased by repeating the steps from the formation of through holes to the patterning of the circuit. A multi-layer wiring board in which such an interlayer connection of wiring layers is performed by via holes has a problem that it is difficult to support high-density mounting.

For example, generally speaking, wiring cannot be formed in a region provided with a through hole, and electronic components cannot be mounted, so that improvement in wiring density and mounting density is restricted. Further, in recent years, the wiring of the wiring board has become denser with the high-density mounting of electronic components. If the diameter of the through hole is reduced in order to cope with such miniaturization of wiring, it becomes difficult to ensure the reliability of the interlayer connection.

Further, the formation of the connection between the wiring layers by the through holes is redundant because it involves a through hole forming step, a plating step, and the like, and there is a problem from the viewpoint of productivity.

For example, in the process of forming through holes, holes are drilled one by one with a drill or the like, so that the drilling work requires a lot of time. Further, after the through hole is formed, a polishing step for deburring is required. Further, high accuracy is required for the formation position of the through hole, and it is necessary to take into consideration the plating adhesion of the inner wall surface of the through hole. Therefore, the accuracy of through-hole formation and the management of formation conditions are complicated.

In addition, in the plating process of forming an electrical connection between a plurality of wiring layers via through holes, process control such as concentration control of chemical solution and temperature control is complicated. Furthermore, the equipment for forming through holes and the equipment required for plating will be large-scale.

Such interlayer connection of the multilayer wiring board by through holes reduces the productivity of the wiring board (PWB), and it is difficult to meet the demand for cost reduction and the like.

In order to simplify the electrical connection between the wiring layers of the multilayer wiring board, a method of connecting the wiring layers with conductive bumps has also been proposed. In this method, a conductive bump is formed in a via land which is an interlayer connection portion formed in a wiring circuit, and the conductive bump is formed in the opposite wiring layer by penetrating the interlayer insulating layer in the thickness direction. It establishes a connection with Vialand.

25A and 25B are diagrams showing an example of a method for manufacturing a multilayer wiring board in which wiring layers are connected by using such conductive bumps.

First, for example, a double-sided wiring board 913 in which a wiring circuit 912 made of copper is formed on both sides of a paper-phenolic insulating resin base material 911 is prepared as an inner layer core. The wiring circuit 912 formed on both sides of the insulating resin base material 911 has a vialand 912a for interlayer connection. On the vialand 912a, for example, a conductive bump 914 formed by printing a conductive paste is formed.

Next, the insulating resin sheet 915 and the copper foil 916 of the B stage (semi-cured state) are laminated, and the wiring circuit 912 and the copper foil 916 face each other on both sides of the double-sided wiring board 913 via the insulating resin sheet 915. (Fig. 25A).

Then, by pressurizing and heating these laminates, the insulating resin sheet 915 of the B stage is cured to integrate all the layers. At this time, the pressure, the conductive bumps 914 penetrating the insulating resin sheet 915 of B stage (semi-cured state),Plasticjoined integrally with the copper foil 916 with raised such deformation. In this way, the connection between the conductor layers is formed by the conductive bumps.

Then, a through hole 917 is formed at a predetermined position, and the through hole 917 is filled with a conductive material such as silver paste 918, or the inner wall of the through hole 917 is coated with a conductive material such as silver paste. Connects the conductor layers of the outer layer with. By patterning the outer layer copper foil 916 by, for example, a photoetching method or the like to form a predetermined wiring circuit 916b including the vialand 916a, a multilayer wiring board in which conductive bumps and through holes are combined for interlayer connection of the wiring circuit is formed. Is done (Fig. 25B).

26A and 26B are diagrams showing another example of a method for manufacturing a multilayer wiring board in which wiring layers are connected by using conductive bumps.

First, for example, a double-sided wiring board 923 in which copper foil is attached to both sides of a glass cloth and an epoxy resin base material 921 and cured to form a wiring circuit 922 is prepared as an inner layer core. The wiring circuit 922 formed on both sides of the double-sided wiring board 923 has a via land 922a for interlayer connection.

On the other hand, a copper foil 925 on which the conductive bump 924 is formed and an epoxy resin-based prepreg 926 are prepared. The conductive bump 924 is formed at a position corresponding to the vialand 922a when the copper foil 925 is laminated with the double-sided wiring board 923.

Next, as shown in FIG. 26A, copper foil 925 is placed on both sides of the double-sided wiring board 923 via the prepreg 926, and then pressurized and heated to integrate all the layers. At this time, due to pressurization, the conductive bumps 924 face each other. At this time, due to pressurization, the conductive bump 924 penetrates the prepreg 926 of the B stage (semi-cured state) and is integrally joined with the vialand 922a while causing plastic deformation and the like. In this way, the connection between the conductor layers is formed by the conductive bumps.

Then, a through hole 927 is formed at a predetermined position, and each conductor layer is connected by plating the through hole 927 with a conductor layer 928 such as copper. After that, the copper foil 925 of the outer layer is patterned by, for example, a photoetching method to form a predetermined wiring circuit 926b including the vialand 925a, so that the multilayer wiring in which the conductive bump and the plated through hole are combined for the interlayer connection of the wiring circuit. A substrate is formed (Fig. 26B).

Interlayer connection of a wiring circuit that employs such conductive bumps has merits such as a simple configuration, a small number of steps and high productivity, and being able to support high-density mounting. However, the problems described below are often observed in the wiring board in which the conductive bumps are used to connect the wiring circuits between layers.

For example, in the case of the manufacturing method as illustrated in FIG. 25, the insulating resin layer 915 and the copper foil 916 are laminated and arranged on the double-sided wiring board 913 in which the conductive bump 914 is formed on the vialand 912a, and the outside thereof. Apply a hard metal press plate from the top and pressurize and heat from both sides to integrate all the layers.

By this pressurizing step, the copper foil 916 exposed to the outer layer becomes almost flat. However, since the conductive bump 914 is generally harder than the insulating resin base material 911 of the double-sided wiring board 913, the vialand 912a tends to be concave, and sometimes the vialand 912a is cracked and the via connection is damaged. Sometimes. Such a problem is particularly remarkable in the connection portion on the outer layer side.

FIG. 27 is a diagram schematically showing a via connection portion of the multilayer wiring board described with reference to FIG. 26, which has been made concave by the pressurizing process. In the worst case, the connection between the vialand 922a and the wiring circuit 922 may be cut off and the function as a multi-layer wiring board may be lost. Exactly the same problem is observed with the method illustrated in FIG.

Such a problem greatly reduces the reliability of the multilayer wiring board and is one of the main causes of reducing the productivity of the wiring board.

<p> The present invention has been made to solve the above-mentioned circumstances, and is a multilayer wiring board provided with a highly reliable via connection portion.<u style="single">、</u>Highly productive<u style="single">That</u>Production method<u style="single">And an electronic component package with highly integrated electronic components mounted on a wiring board</u>The purpose is to provide.</p><p> As a problem of the conventional multilayer wiring board using conductive bumps, it is desired to further improve the reliability of interlayer connection when a thermal load or a mechanical load (stress) is applied.</p><p> As illustrated in FIGS. 25 and 26, the reliability of the wiring board in which the wiring circuit is interlayerly connected using the conductive bump is not particularly problematic under normal use conditions.</p><p> However, when used in, for example, industrial electronic equipment that requires high reliability, further improvement in the reliability of interlayer connection is desired.</p><p> Wiring boards that require high reliability must withstand severe thermal stresses. For example, even when a cold / thermal cycle test is conducted in which the wiring is exposed to a high temperature of about 125 ° C and then cooled to about -65 ° C, the conductive bumps that connect multiple wiring layers in layers may peel off from the wiring layer. Wiring circuits within the same layer must not be compromised.</p><p> However, the connection between the conductive bump and the wiring layer to which the conductive bump is connected may be peeled off due to thermal stress, and it is desired to improve the reliability so that it can sufficiently withstand more advanced industrial applications. There is.</p><p> The present invention has been made to solve such a problem. That is, while maintaining the merit of adopting conductive bumps, the reliability of interlayer connection has been improved.<u style="single">multilayer</u>Wiring board<u style="single">And its</u>It is an object of the present invention to provide a manufacturing method.</p><p> Further, in recent years, the integration of electronic components such as semiconductor elements has been remarkably increased, and mounting problems have arisen. For example, the number of connections between electronic components and external circuits is increasing with the increase in integration. There is a need to establish a high-density mounting technology that can connect to more electrodes in a smaller area.<u style="single">There is.</u> The present invention has such a problem<u style="single">of</u>Solution<u style="single">Measure</u>With things<u style="single">, Electronic component package with highly integrated electronic components mounted on a wiring board</u>To provide<u style="single">Also</u>The purpose.</p>

<p> The present invention has been made to solve such a problem.</p><p><u style="single">That is, the multilayer wiring board of the present invention according to claim 1 is a multilayer wiring board in which a wiring layer and an insulating layer are laminated, and has a first insulating layer having a first surface and a first insulating layer. A first wiring layer having a first vialand formed on the first surface of the first wiring layer and having a through hole formed therein, and a second insulation formed on the first insulating layer from the upper side of the first wiring layer. The layer, the second beer land formed on the second insulating layer facing the first beer land, the first beer land and the second beer land are connected, and through the through hole of the first beer land. It is characterized by having a conductive pillar having a portion penetrating inside the first insulating layer.</u><u style="single">Further, the multilayer wiring board of the present invention according to claim 2 is characterized in that the rigidity of the conductive pillar is larger than the rigidity of the first insulating layer in the multilayer wiring board according to claim 1.</u><u style="single">Further, the multilayer wiring board of the present invention according to claim 3 is the multilayer wiring board according to claim 1, wherein the conductive pillar is made of a conductive resin.</u><u style="single">Further, the multilayer wiring board of the present invention according to claim 4 has the shape of the contact portion between the conductive pillar and the first vialand and the second vialand in the multilayer wiring board according to claim 1. It is characterized by having a portion in which the outer surface of the conductive pillar and the surfaces of the first vialand and the second vialand are smoothly continuous.</u><u style="single">Further, as described in claim 5.</u>Of the present invention<u style="single">The multilayer wiring board is the multilayer wiring board according to claim 1, wherein the shape of the contact portion between the conductive pillar and the first vialand and the second vialand is the outer surface of the conductive pillar and the first vialand. It is characterized by having a portion where the angle formed with the surface of the second vialand is an acute angle.</u><u style="single">Further, as described in claim 6.</u>Of the present invention<u style="single">The method for manufacturing the multilayer wiring board includes a step of forming a first wiring layer having a first vialand having a through hole on the first insulating layer, and a first of the first wiring layers on the conductor layer. The step of forming a conductive pillar having a substantially conical shape in the region corresponding to the vialand of the above, and the first insulating layer and the conductor layer are uncured so that the first vialand and the conductive pillar face each other. The first insulating layer and the conductor so that a part of the conductive pillar penetrates into the first insulating layer through a hole formed in the first vialand. It is characterized by having a step of pressurizing the layer in the axial direction of the conductive pillar to connect the first vialand and the conductive pillar.</u><u style="single">7.</u>Of the present invention<u style="single">The method for manufacturing a multilayer wiring substrate includes a step of forming a first wiring layer having a first vialand having a through hole on the first surface of the first insulating layer, and a first method of forming the first insulating layer. A step of forming a conductive pillar having a substantially conical shape on the via land of the above, and an uncured insulating resin layer so that the head of the conductive pillar is exposed on the first surface of the first insulating layer. And a step of arranging the conductor layer facing the first surface of the first insulating layer via the insulating resin layer, and a part of the conductive pillar is formed on the first vialand. The first insulating layer and the conductor layer are pressed in the axial direction of the conductive pillar so as to penetrate the first insulating layer through the formed holes, and the first vialand and the conductive pillar are connected. It is characterized by having a step of performing.</u><u style="single">28.</u>Of the present invention<u style="single">The method for manufacturing a multilayer wiring substrate is a step of forming a first wiring layer having a first vialand having a through hole on the first insulating layer, and abbreviated on the first vialand of the first wiring layer. The step of forming the first conductive pillar having a conical shape and the second conductive pillar having a substantially conical shape in the region corresponding to the first vialand of the first wiring layer on the conductor layer. A step of forming and a step of arranging the first insulating layer and the conductor layer via an uncured insulating resin layer so that the first conductive pillar and the second conductive pillar face each other. The first and second insulating layers and the conductor layers are separated so that a part of the first conductive pillar penetrates into the first insulating layer through a through hole formed in the first vialand. It is characterized by having a step of applying pressure in the axial direction of the conductive pillar to connect the first conductive pillar and the second conductive pillar.</u><u style="single">As set forth in claim 9.</u>Of the present invention<u style="single">The electronic component package is an electronic component package in which an electronic component is mounted on a wiring board, and has an electronic component having an electrode on a first surface, a first surface, and a second surface, and is a first surface. A first insulating layer formed on the electronic component with a surface facing the first surface of the electronic component and a second surface formed on the second surface of the first insulating layer and having a first vialand. The first vialand includes a wiring layer, a first conductive pillar connecting the first vialand and the electrode, and the first vialand has a through hole.</u><u style="single">10.</u>Of the present invention<u style="single">The electronic component package is the electronic component package according to claim 9, wherein the contact portion between the first conductive pillar and the electrode is such that the outer surface of the first conductive pillar and the surface of the electrode are smoothly continuous. It is characterized by having a portion.</u><u style="single">11.</u>Of the present invention<u style="single">The electronic component package is the electronic component package according to claim 9, wherein the contact portion between the conductive pillar and the electrode is a portion where the angle formed by the outer surface of the conductive pillar and the surface of the electrode is sharp. It is characterized by having.</u><u style="single">12.</u>Of the present invention<u style="single">The electronic component package is the electronic component package according to any one of claims 9 to 11, wherein the electronic component is a semiconductor element.</u><u style="single">13.</u>Of the present invention<u style="single">The electronic component package is the electronic component package according to claim 12, wherein the semiconductor element is a bare chip.</u>The electronic component package of the present invention according to claim 14 has an electronic component having a pad-shaped electrode on a first surface, a first surface and a second surface, and the first surface is the electron. A first insulating layer formed on the electronic component facing the first surface of the component, and a first wiring layer formed on the second surface of the first insulating layer and having a first vialand. A first conductive pillar connecting the first vialand and the electrode, a first surface and a second surface, and the first surface is the second surface of the first insulating layer. A second insulating layer formed on the first insulating layer facing the first, a second wiring layer formed on the second surface of the second insulating layer and having a second vialand, and a first The first vialand or the second vialand is provided with a second conductive pillar connecting the vialand and the second vialand, and the first vialand or the second vialand is characterized by having a through hole.<u style="single">15.</u>Of the present invention<u style="single">The electronic component package is the electronic component package according to claim 14, wherein the contact portion between the first conductive pillar and the electrode is such that the outer surface of the first conductive pillar and the surface of the electrode are smoothly continuous. It is characterized by having a portion.</u><u style="single">16.</u>Of the present invention<u style="single">The electronic component package is the electronic component package according to claim 14, wherein the contact portion between the conductive pillar and the electrode is a portion where the angle formed by the outer surface of the conductive pillar and the surface of the electrode is sharp. It is characterized by having.</u><u style="single">17.</u>Of the present invention<u style="single">The electronic component package is the electronic component package according to any one of claims 14 to 16, wherein the electronic component is a semiconductor element.</u><u style="single">18.</u>Of the present invention<u style="single">The electronic component package is the electronic component package according to claim 17.</u>The semiconductor element is a bare chip.</p><p> In the present invention, the method for forming the conductive pillar includes a step of arranging a mask having a substantially cylindrical through hole on the conductor layer, a step of filling the through hole of the mask with a conductive resin, and the conductivity. It is characterized by having a step of separating the conductor layer and the mask in parallel with the normal direction of the conductor layer so that the resin has a substantially conical shape on the conductor layer.</p><p> Further, in this case, in the step of separating the conductor layer and the mask, the conductive resin has a substantially conical shape on the conductor layer, and the contact portion between the conductive pillar and the conductor layer is formed. It is characterized in that it is separated so as to have a shape that relaxes the stress concentration acting between the conductive pillar and the conductor layer.</p><p> Further, in the step of separating the conductor layer and the mask, the conductive resin has a substantially conical shape on the conductor layer, and the contact portion between the conductive pillar and the conductor layer is formed on the conductive pillar. It is characterized in that the outer surface of the conductor layer and the surface of the conductor layer are separated so as to have a smoothly continuous portion.</p><p> Further, in the step of separating the conductor layer and the mask, the conductive resin has a substantially conical shape on the conductor layer, and the contact portion between the conductive pillar and the conductor layer is the conductive pillar. It is characterized in that the outer side surface and the surface of the conductor layer are separated so as to have a portion having an acute angle.</p><p> Further, in the filling step, in the step of separating the conductor layer and the mask, the conductive resin layer whose viscosity is adjusted so that a part of the conductive resin remains in the through hole of the mask is filled. It is characterized by that. Further, the filling step is performed by screen printing.</p><p> That is, the multilayer wiring board of the present invention disperses the stress acting on the via land by adopting the via land provided with the stress distribution means, and prevents the via land from being damaged and the connection between the via land and the wiring circuit from being damaged. ..</p><p> The stress distribution means provided by the beer land is, for example, a hole penetrating the beer land. This hole is generally a hole having a diameter smaller than the maximum diameter of the conductive pillar. The shape of this hole should be able to reduce the stress acting on the via land and the wiring circuit connected to the via land, particularly the normal stress, when the conductive pillar is pressurized in the axial direction thereof. For example, the shape may be circular, elliptical, star-shaped, gourd-shaped, or the like, but a shape that can be drawn with a smoothly continuous closed curve is preferable. This is because if there is a notch portion, stress is concentrated on that portion (notch effect), and the via land and the wiring layer are easily broken. Further, the number of holes formed in the beer land may be plural.</p><p> Further, the diameter of the hole formed in the via land may be set so that a sufficient electrical connection is formed when the conductive pillar is pressure-welded. For example, when the conductive pillar is formed on only one vialand, the diameter of the portion of the conductive pillar at the same height as the thickness of the second insulating layer from the bottom surface is about 0.3 mm, and the outer diameter of the vialand is about 0.7 mm. In this case, the average diameter of the vialand holes may be set to about 0.1 to 0.25 mm.</p><p> The connection portion using the conductive pillars of the multilayer wiring board of the present invention can be provided with a via land provided with such a stress distribution means, so that the normal stress acting on the via land in particular can be relaxed. Further, although the conductive pillar penetrates into the first insulating layer in the cured state, it cannot be easily penetrated, so that it is plastically deformed in the surface direction of the vialand. The tangential stress is also relaxed by the plastic deformation of the vialand of the conductive pillar in the surface direction. Therefore, the beer land is not destroyed and its function can be maintained.</p><p> It is preferable that the holes, which are the stress distribution means of the vialand, are formed at the same time when the wiring layer to which the vialand belongs is patterned into a predetermined wiring circuit. That is, it is not necessary to increase the number of steps if the wiring circuit is patterned at the same time. Of course, it is also possible to form a hole in advance at a predetermined position of the conductor layer.</p><p> Further, another feature of the multilayer wiring board of the present invention is that the structure of the via connection portion using the conductive pillar is such that the joint portion between the wiring layer and the conductive pillar is not peeled off. That is, the notch effect that acts on the connection between the conductive pillar and the vialand having the outer surface of the hyperboloid of one sheet or the hyperboloid of revolution of one sheet. It was formed to alleviate. By combining such a bonding between the conductive pillar and the vialand and the vialand provided with the stress distribution means as described above, the reliability of the multilayer wiring board is further improved.</p><p> The present invention in which the structure of the via connection portion of the multilayer wiring board using the conductive pillars is such that the joint portion between the wiring layer and the conductive pillars is not peeled off is based on the following findings obtained by the present inventor. It is an invention.</p><p> The present inventor analyzed the force acting on the connecting portion using the conductive pillar in order to improve the reliability of the interlayer connection using the conductive pillar.</p><p> The conductive pillar formed through the insulating layer connects the first vialand of the first wiring layer and the second vialand of the second wiring layer separated by the insulating layer. For example, during solder reflow in the mounting process, a heat load is applied to the interlayer connection portion of such a structure, and stress due to the difference in the coefficient of thermal expansion is generated.</p><p> For example, the coefficient of thermal expansion of silver is 19.0 × 10.^-6[° K^-1], And the coefficient of thermal expansion of copper is 17.0 × 10.^-6[° K^-1], And the coefficient of thermal expansion of aluminum is 23.0 × 10.^-6[° K^-1]. On the other hand, in the case of FR-4 (NEMA standard), the coefficient of thermal expansion of the insulating resin is α1 = 1.3 × 10 in the vertical direction.^-5[° K^-1], Α2 = 1.5 × 10^-6[° K^-1], The coefficient of thermal expansion in the lateral direction is α1 = 1.8 × 10^-5[° K^-1], Α2 = 1.4 × 10^-5[° K^-1], And the coefficient of thermal expansion in the thickness direction is α1 = 5.1 × 10^-5[° K^-1], Α2 = 2.6 × 10^-4[° K^-1]. Here, α1 is a coefficient of thermal expansion below the glass transition temperature Tg, and α2 is a coefficient of thermal expansion above the glass transition temperature Tg. The glass transition temperature of FR-4 is about 125 ° C.</p><p> Further, here, the vertical direction is the extending direction of the glass fiber in the plane of the insulating resin layer, and the horizontal direction is the direction perpendicular to the extending direction of the glass fiber in the plane of the insulating resin layer.</p><p> As described above, the coefficient of thermal expansion of the resin material of the insulating layer is larger than the coefficient of thermal expansion of the conductor metal constituting the wiring layer including the vialand and the main part of the conductive pillar. In particular, the coefficient of thermal expansion in the thickness direction (the normal direction of the sheet) of the insulating layer, which is closely related to the reliability of the via connection, is much larger than the coefficient of thermal expansion of the general conductor metal used for the wiring layer. It is one to two digits larger. Further, the coefficient of thermal expansion in the thickness direction of this insulating resin layer is much larger at a temperature higher than the glass transition temperature Tg than at a temperature lower than the glass transition temperature Tg. This tendency is the same for insulating resin materials such as GPY, FR-5, CEM-3, CEM-1, FR-3, FR-2, XXXPC, FR-1, XPC, and G-10.</p><p> That is, the coefficient of thermal expansion in the axial direction of the conductive pillars is not only when the material forming the conductive pillars is a metal, but also when the conductive resin composition in which the conductive metal powder is dispersed in a binder resin. However, as described above, the coefficient of thermal expansion is smaller than that of the resin material constituting the insulating layer.</p><p> Therefore, when a heat load is applied to the via connection portion that employs the conductive pillar, the central axial direction of the conductive pillar (insulation layer) is caused by the difference between the coefficient of thermal expansion of the conductive pillar and the coefficient of thermal expansion of the insulating layer. A large stress will be generated in the direction parallel to the normal direction of. This stress generally acts in the direction of peeling off the joint between the conductive pillar and the first and second vialands. That is, tension in the normal direction acts on the interface between the conductive pillar and the first vialand, which is a plane perpendicular to the central axis of the conductive pillar, and the interface between the conductive pillar and the second vialand.</p><p> Further, the stress applied to the via connection portion where the conductive pillar is adopted due to such a heat load is the largest at the point where the three portions of the insulating layer, the conductive pillar and the wiring layer are in contact with each other. In other words, when a heat load is applied to the via connection part that uses the conductive pillars, the three parts of the insulating layer, the conductive pillars, and the wiring layer have different material properties such as thermal expansion rate and rigidity. The three points (triple junction) where different materials come into contact are the points where stress acts most.</p><p> The present inventor analyzed the stress generated at the via connection portion by simulation using the physical property constants of each material, and found that the action of the stress acting to peel off the conductive pillar and the wiring layer is the wiring layer (via land). It was found that the part where the conductive pillar and the conductive pillar are connected depends on the angle formed between the surface of the via land and the outer peripheral surface of the conductive pillar.</p><p> That is, when the single-hyperboloidal outer peripheral surface of the conductive pillar and the surface of the vialand are smoothly and continuously connected, the strength against peeling is large, but the outer peripheral surface of the conductive pillar and the vialand If there is a notch in the joint, stress is concentrated on this part and the peel strength is reduced. The sharper the notch, the greater the decrease in peel resistance. It was also found that if the outer peripheral surface of the conductive pillar and the surface of the vialand are smoothly connected as a whole, the peel strength can be maintained even if there is a microscopic notch. The connection between the outer peripheral surface of the conductive pillar and the surface of the vialand draws an approximately circular closed curve, and the peel resistance is maximized when all the parts on the closed curve are smoothly connected. In any case, if at least a part of this closed curve is smoothly connected, the peel resistance is compared with the case where all parts of the closed curve are connected with a notch having a shape having a large stress concentration coefficient. The strength can be increased.</p><p> The multilayer wiring board of the present invention is made based on the above findings. Therefore, the multilayer wiring board of the present invention has a via connecting portion that employs a conductive pillar, and at least a part of the connecting portion between the outer peripheral surface of the conductive pillar and the surface of the via land is smoothly connected.</p><p> In such a joint between the conductive pillar and the vialand, the tip of the conductive pillar is pressed once with, for example, a hard stainless steel plate to be plastically deformed, and in this state, a metal foil or the like to be a wiring layer is crimped. Can be obtained by Further, by setting the height at the time of forming the conductive pillar appropriately with respect to the thickness of the insulating layer through which the conductive pillar penetrates, the conductive pillar and the via land that further alleviate the notch effect can be relaxed. Bonding with can be achieved more easily. Here, the notch effect means an effect that when an external force is applied to a solid having a notch, stress is concentrated on the notch portion and deformation or fracture is likely to occur. The multilayer wiring board of the present invention is formed by controlling the shape of the connection portion between the conductive pillar and the conductor layer or vialand so that the stress concentration coefficient becomes small.</p><p> Here, as the wiring layer constituting the multilayer wiring board of the present invention, a metal material used as a wiring material, such as copper and aluminum, can be used. Further, a conductive resin can also be used. These conductor layers can be photo-etched to form a pattern, or the conductive resin can be screen-printed to form a wiring layer having a wiring circuit having a predetermined pattern.</p><p> The conductive pillars used for interlayer connection of the multilayer wiring board of the present invention can be formed of a conductive composition such as a conductive resin or a conductive paste. It can also be formed from various metal materials.</p><p> Here, as the conductive composition, for example, a conductive resin obtained by mixing or dispersing a conductive powder such as silver, gold, copper, or solder powder or conductive fine particles as a filler in a binder made of a resin material or the like. Can be done. The conductive material can also be used in combination with a plurality of metals and alloys.</p><p> Examples of the binder component resin include thermoplastic resins such as polycarbonate resin, polysulfone resin, polyester resin and phenoxy resin, and thermosetting resins such as phenol resin, polyimide resin and epoxy resin. In addition to these, for example, methyl methacrylate, diethyl methyl methacrylate, trimethyl propantriacrylate, diethylene glycol diethyl acrylate, methyl acrylate, ethyl acrylate, diethylene glycol ethoxylate acrylate, ε-caprolactone-modified dipentaerythritol acrylate, etc. Examples thereof include an ultraviolet curable resin such as an acrylic acid ester or a methacrylic acid ester, or an electron beam irradiation curable resin. Further, a solvent may be used if necessary.</p><p> In order to form the conductive pillars using such a conductive resin, for example, the conductive resin may be screen-printed using a mask such as a metal mask. The conductive pillar is formed into a desired shape by adjusting the shape, opening diameter, and thickness of the metal mask, while adjusting the physical properties such as the viscosity of the conductive resin layer, thixotropy, surface tension, or the surface tension of the mask. can do. In order to control the shape of the conductive pillar, it is preferable to set the viscosity of the conductive resin to be larger than the viscosity range of the conductive resin layer usually used. Further, a conductive resin material having thixotropy may be used, and the thixotropy of the conductive resin may be adjusted and used by, for example, ultrasonic vibration.</p><p> The conductive resin filled in the holes of the mask in this way is deformed while being stretched between the conductor layer and the metal mask by separating the mask and the conductor layer in the normal direction of the conductor layer, and the conductor layer. A conductive pillar having a substantially conical shape is formed on the top. By such a method, it is possible to obtain a conductive pillar having a small contact angle θ with the surface of the conductor layer and having a joint shape that alleviates the notch effect.</p><p> If it is desired to form a conductive pillar having a higher aspect ratio, for example, the shape of the holes in the mask, the physical properties of the conductive resin, etc. may be adjusted, or the mask may be rearranged at the same position to form a screen. Printing may be repeated.</p><p> Further, the formation of the conductive pillars is not limited to screen printing, and may be formed by a stamping method or the like in which the conductive paste is extruded into the holes of the mask. Also by such a method, a conductive pillar having a high aspect ratio can be formed from a conductive paste, a conductive resin, or the like as in screen printing. Further, a conductive pillar made of metal may be formed by a plating method or the like.</p><p> The conductive pillars may be formed on a conductor layer such as copper foil, or may be formed on a patterned wiring layer. Further, it may be formed on an electrode of an electronic component such as a semiconductor element.</p><p> Further, for example, a conductive pillar is formed on synthetic resin sheets having good peelability (for example, a Teflon (registered trademark) resin such as polyvinylidene fluoride), and the conductive pillar is embedded in an insulating resin layer in a semi-cured state. The bottom surface may be crimped to a copper foil or a wiring layer.</p><p> The conductive pillar is not limited to the interlayer connection of the multilayer wiring board, and can be formed on the electrode of an electronic component such as a semiconductor element and used for connecting the electronic component and the wiring circuit on which the electronic component is mounted.</p><p> As the insulating layer that electrically separates the wiring layers to which the above-mentioned conductive pillars are connected, which constitutes the multilayer wiring board of the present invention, for example, a general insulating resin material can be used. The thickness may be set as needed, and may be set to, for example, about 40 to 800 μm. The thickness of the insulating layer may be set together with the height of the conductive pillars.</p><p> Here, examples of the thermoplastic resin material that can be used as the insulating layer include a polycarbonate resin, a polysulfone resin, a thermoplastic polyimide resin, a tetrafluoride polyethylene resin, a hexafluoropolypropylene resin, and a polyether ether ketone resin. .. Those obtained by molding these insulating resin materials into a sheet may be used.</p><p> Further, examples of the thermosetting resin material include epoxy resin, bismaleimide triazine resin, polyimide resin, phenol resin, polyester resin, melamine resin, butagen rubber, butyl rubber and the like. Further, as the thermosetting resin material, sheets of raw rubber such as natural rubber, neoprene rubber, and silicone rubber can also be used. These insulating resin materials may be used alone or may be filled with insulating inorganic substances or organic substances. Further, it may be used in combination with a reinforcing material such as glass cloth, glass mat, synthetic fiber cloth or mat, or paper.</p><p> The electronic component of the present invention has the above-mentioned conductive pillar having a substantially conical shape formed on an electrode formed at a connection portion with an external circuit. Further, in the electronic component package of the present invention, the electronic component is mounted by a conductive pillar.</p><p> The contact portion between the conductive pillar and the electrode of the electronic component has a shape that relaxes the stress concentration acting between the conductive pillar and the electrode. The shape of the contact portion between the conductive pillar and the electrode may be, for example, a portion in which the outer surface of the conductive pillar and the surface of the electrode are smoothly continuous. Further, for example, it may have a portion where the angle θ formed by the outer surface of the conductive pillar and the surface of the electrode is an acute angle.</p><p> The electronic component of the present invention having such a connection shape with an external circuit is mounted on the multilayer wiring board in the same manner as the multilayer process of the multilayer wiring board of the present invention to obtain the electronic component package of the present invention. Can be done.</p><p> For example, first, a wiring layer having a predetermined pattern having a via land at a position corresponding to an electrode of an electronic component and an electronic component having a conductive pillar formed on the electrode are arranged to face each other via an uncured insulating resin layer. .. Then, by applying pressure from both sides, the conductive pillar penetrates the insulating resin layer in the semi-cured state and is connected to the via land while being plastically deformed. By heating at the same time, the insulating resin layer is cured.</p><p> As described above, the electronic component and the electronic component package of the present invention have a great advantage that solder is not required for mounting. Further, by mounting on the multilayer wiring board of the present invention, it is possible to route the lead-out wiring from the electronic component with a plurality of wiring layers, and the mounting density is remarkably improved. In this case, the electronic components mounted on the wiring board can be considered to be structurally equivalent to one of the outermost layers of the multilayer wiring board. Therefore, by connecting the via land of the wiring layer, which is connected to the electrode of the electronic component via the conductive pillar, to the via land of another wiring layer via the conductive pillar, the lead wiring from the electronic component can be routed. It can be performed three-dimensionally with a plurality of wiring layers.</p>

FIG. 1 is a diagram schematically showing an example of the configuration of the multilayer wiring board of the present invention, in which wiring layers made of conductors are laminated via an insulating layer.

In this multilayer wiring board 10, the first wiring layer 12 is formed on the first insulating layer 11a, and the first wiring layer 12 has the first vialand 12a as a part of the circuit pattern. ing. First wiring layer<u style="single">12</u>upon<u style="single">From the side to the top of the first insulating layer 11a</u>A second insulating layer 11b is formed, and a second wiring layer 13 is formed on the second insulating layer 11b.

The second wiring layer has a second vialand 13a at a position facing the vialand 12a of the first wiring layer.

Then, the first vialand and the second vialand arranged to face each other via the second insulating layer 11b are connected by the conductive pillar 14. That is, the multilayer wiring board 10 is interconnected with different wiring layers by the conductive pillars 14.

As one of the features of the multilayer wiring board 10 of the present invention, the first vialand 12a has a means for dispersing the stress applied in the axial direction of the conductive pillar 14, and in this case, the first vialand 12a has a means. A through hole 12b is formed.

FIG. 2 is a diagram schematically showing an example of the shape of the first vialand, and shows the state when the first insulating layer 11a is patterned. The first vialand 12a has one substantially circular through hole 12b, but the shape and number of the through holes 12b are not limited to this. The shape of the through hole 12b may be, for example, an elliptical shape, a star shape, a gourd shape, or the like, in addition to the circular shape. In any case, the shape of the through hole 12b is preferably a shape having no angular portion so that stress is not concentrated on a specific portion.

Further, the first vialand 12a may be provided with a plurality of through holes 12b. FIG. 3A is a diagram schematically showing another example of the shape of the first beer land.

FIG. 4 is an enlarged view showing the interlayer connection portion of the multilayer wiring board of the present invention shown in FIG. The first vialand 12a and the second vialand 13b are via connected by a conductive pillar 14. The conductive pillar 14 has a penetration portion 14b that penetrates into the first insulating layer 11a in a region corresponding to the first vialand 12a. In such a penetration portion 14b, for example, in a state where the conductive pillar is sandwiched between the first vialand and the second vialand, the first insulating layer and the second wiring layer are held in the axial direction of the conductive pillar. It is formed by pressurizing. By adopting such a configuration, the multilayer wiring board of the present invention is formed on the first vialand 12a even when a pressure load is applied in the interlayer connection direction of the multilayer wiring board, that is, in the axial direction of the conductive pillar 14. Damage to the first vialand 12a can be prevented by allowing a part of the conductive pillar to penetrate into the first insulating layer side while being plastically deformed from the through hole 14b, which is a stress distribution means. Therefore, the reliability of the interlayer connection of the multilayer wiring board is improved. Further, if the stress distribution means provided in the first vialand 12a is formed at the same time as the patterning of the first wiring layer 12, it is not necessary to increase the number of steps. Although the rigidity of the conductive pillar is larger than that of the first insulating layer, it is preferable to set it so that it is deformed to some extent at the time of penetration.

FIG. 5 is a cross-sectional view schematically showing another example of the configuration of the multilayer wiring board of the present invention. The multilayer wiring board 20 has four wiring layers made of conductors. Each wiring layer has a via land provided as a part of its circuit pattern, and is an insulating layer.<u style="single">11b</u>The wiring layers are interconnected by connecting a pair of vialands facing each other with conductive pillars 14.

First insulating layer<u style="single">11a</u>A first wiring layer 12 having a first vialand 12a is formed on both sides of the above. A through hole 12b as illustrated in FIG. 3 is formed in the first vialand 12a as a stress distribution means. A second insulating layer 11b is formed on the first wiring layer 12, and a second wiring layer 13 having a second vialand 13a is formed on the second insulating layer 11b. 1st beerland 12a and 2nd beerland<u style="single">13a</u>Is formed so as to face each other via the second insulating layer 11b, and is interconnected by the conductive pillar 14.

Here, both of the wiring layers formed on both sides of the first insulating layer 11a are described as the first wiring layer 12. In any case, of course, the circuit patterns of the first wiring layer 12 formed on both sides of the first insulating layer 11a may be different. Similarly, the circuit pattern of the second wiring layer 13 formed on the outer layer may be different. That is, each wiring layer has a via land at its interlayer connection portion, and its circuit pattern is formed as needed. This also applies unless otherwise specified.

Next, an example of the manufacturing method of the multilayer wiring board 20 of the present invention illustrated in FIG. 5 will be described.

6A, 6B, and 6C are diagrams for explaining the manufacturing process of the multilayer wiring board of the present invention shown in FIG.

First, a double-sided copper-clad laminate is prepared as a core base material in which conductor layers are laminated on both sides of the insulating layer. Here, double-sided copper-clad with a paper-phenol resin-based insulating substrate having a thickness of 1.2 mm, which is the first insulating layer 11a, coated with an electrolytic copper foil having a thickness of 35 μm patterned on the first wiring layer 12. A laminated board (trade name, paper phenol resin copper-clad laminated board R-8705E, manufactured by Matsushita Electric Works) was prepared.

Next, the copper foil, which is the first wiring layer 12 attached to the core base material, is patterned into a predetermined wiring circuit by, for example, a photoetching process. Here, a resist having a predetermined pattern is formed on the copper foil by screen printing, the resist is used as a mask, a ferric chloride solution is used as an etching solution, and the copper foil is selectively etched and removed, and then the resist is removed. , Formed on a first wiring layer 12 having a predetermined circuit pattern (FIG. 6A). At this time, the first vialand is used as a part of the circuit pattern of the first wiring layer 12.<u style="single">12a</u>Also formed. The first vialand 12a was formed in a substantially circular shape with a diameter of about 0.7 mm, and a hole 12b with a diameter of about 0.2 mm was formed in the center thereof.

Although the wiring circuits formed on both sides of the first insulating layer 11a are described as the first wiring circuits here, the circuit pattern of the first wiring layer on both sides of the first insulating layer is Formed in different patterns.

Next, a conductive pillar 14 having a substantially conical shape was formed on the first vialand 12a of the first wiring circuit 12. The conductive pillar 14 was formed by arranging a metal mask having pits formed at a position corresponding to the first vialand 12a and screen-printing the conductive resin. The metal mask used was made of stainless steel with a thickness of about 300 μm and a hole with a diameter of about 0.3 mm. As the conductive resin, in this example, a phenol resin-based conductive paste containing silver powder as a filler was used, but a filler made of a conductor and a binder resin may be selected and used as necessary. After the printed conductive paste was dried, the process of printing and drying at the same position using the same mask was repeated three times. Further heating was performed to form a conductive pillar 14 having a substantially conical shape and a height of about 0.3 mm on the first vialand 12a (Fig. 6B). The shape of the conductive pillar 14 can be formed into a desired shape by adjusting various physical characteristics such as the pit diameter and thickness of the mask to be used, the viscosity of the conductive resin to be printed, and the number of times of printing. ..

After forming the conductive pillar 14, the second insulating layer 11b and the second wiring<u style="single">layer</u>13 is laminated on both sides of the core material. Here, for example, an epoxy resin sheet (B stage) having a thickness of about 70 μm is used as the second insulating layer 11b, and an electrolytic copper foil having a thickness of about 35 μm is used as the second wiring layer 13 (unpatterned). Using.

The second insulating layer 11b and the second wiring layer 13 are placed on both sides of the core base material so that the second wiring layer 13 faces the first wiring layer 12 via the second insulating layer 11b. Arrange (FIG. 6C), and pressurize while heating by sandwiching it with a press plate from the outside of the second wiring layer 13. By heating and pressurizing, the second insulating layer 11b is cured to the C stage. At this time, the substantially conical conductive pillar 14 penetrates the second insulating layer 11b in the semi-cured state and is connected to the opposite second vialand 13a. Curing of the second insulating layer 11b begins after the core base material and the second wiring layer 13 are in contact with both sides of the second insulating layer 11b, so that the conductivity formed on the first wiring layer 12 is conductive. The sex pillar 14 can penetrate the second insulating layer 11b relatively easily.

Here, as the backing plate used for pressing, for example, a metal plate such as a stainless steel plate or a brass plate with little dimensional change or deformation, a polyimide resin plate (sheet), or a polytetrafluoroethylene resin plate (resin sheet). It is preferable to use a heat-resistant resin plate or the like with little change or deformation.

Further, when the insulating layer is heated and pressed in a softened state, the tip of the conductive pillar easily penetrates the insulating layer.

Next, the second wiring layer 13 is patterned to form a predetermined circuit. Here, a resist having a predetermined pattern is formed on the copper foil, which is the second wiring layer 13, by screen printing, and the resist is used as a mask, the ferric chloride solution is used as an etching solution, and the copper foil is selectively etched and removed. After that, the resist was removed to form a predetermined circuit pattern having a second vialand. At this time, a second vialand 13a was also formed at the same time as a portion of the wiring circuit pattern. Through the above steps, a four-layer multilayer wiring board was formed in which each wiring layer had 1000 via connections by conductive pillars (see FIG. 5).

The connection resistance of the wiring circuit of the multilayer wiring board manufactured in this way was about 2.1Ω. This connection resistance corresponds to the resistance when 1000 conductive pillars are connected in series via a wiring made of copper foil, and considering the pattern resistance of the copper foil, the connection resistance value per conductive pillar is The average was about 1 mΩ. In addition, there was little variation in the connection resistance of the conductive pillars and the pattern resistance of the copper foil.

Further, when this multilayer wiring board was cut in a plane parallel to the axial direction of the conductive pillars and the state of the interlayer connection portion was observed, the conductive pillars 14 and the first were as shown schematically in FIG. The beer land and the second beer land were tightly connected and the joint condition was good. The second vialand 12a was slightly recessed toward the first insulating layer, but no cracks were observed. Further, a part of the conductive pillar 14 had a portion that penetrated to the first insulating layer 11a side through the hole 12b formed in the second vialand 12a.

For comparison, a multilayer wiring having the same configuration as that of FIG. 5 was manufactured under the same conditions except that the stress distribution means was not formed on the first vialand 12a. The connection resistance of the wiring pattern of the four-layer multilayer wiring board having 1000 via connections by this conductive pillar was 5.1Ω, which was about 3Ω larger than the connection resistance of the multilayer wiring board of the present invention illustrated in FIG. .. Further, when a multilayer wiring board having no stress distribution means was cut in the first vialand and the state of via connection was observed, the first vialand 12a portion was large and dented toward the first insulating layer 11a. The first beer land 12a had a crack.

As described above, the multilayer wiring board of the present invention can disperse the stress (pressure) applied to the vialand in the axial direction of the conductive pillar by providing the vialand provided with the stress distribution means. Further, the stress applied in the tangential direction of the vialand (tangential stress) is relaxed mainly by the plastic deformation of the conductive pillar. Therefore, the wiring circuit including the via land is not easily damaged, and a highly reliable interlayer connection can be established. In addition, since interlayer connection by through holes can be suppressed to the minimum necessary, high-density mounting can be supported. Further, according to the method for manufacturing a multilayer wiring board of the present invention, it is possible to suppress the occurrence of connection failure and further improve the productivity while maintaining the high productivity of the method for manufacturing a multilayer wiring board using conductive pillars. it can.

7A, 7B, 7C, and 7D are diagrams for explaining another example of the method for manufacturing the multilayer wiring board of the present invention.

First, a double-sided copper-clad laminate is prepared as a core base material in which conductor layers are laminated on both sides of the insulating layer. Here, a double-sided copper-clad laminate (trade name, paper phenol) in which a 35 μm-thick electrolytic copper foil patterned on the first wiring layer 12 is laminated on both sides of a 1.2 mm-thick paper-phenol resin-based insulating substrate. Resin copper-clad laminate R-8705E, manufactured by Matsushita Electric Works) was prepared. Next, the copper foil attached to the core base material is patterned into a predetermined wiring circuit by, for example, a photoetching process. Here, a resist having a predetermined pattern is formed on the copper foil by screen printing, the resist is used as a mask, a ferric chloride solution is used as an etching solution, and the copper foil is selectively etched and removed, and then the resist is removed. , Formed on a first wiring layer 12 having a predetermined circuit pattern (FIG. 7A). At this time, the first vialand was also formed as a part of the wiring circuit pattern of the first wiring layer 12. The first vialand 12a was formed in a substantially circular shape with a diameter of about 0.7 mm, and a hole 12b with a diameter of about 0.2 mm was formed in the center thereof. Although the wiring circuits formed on both sides of the first insulating layer 11a are described as the first wiring circuits here, the circuit pattern of the first wiring layer on both sides of the first insulating layer is Formed in different patterns.

On the other hand, as the second wiring layer 13, an electrolytic copper foil having a thickness of about 35 μm was prepared, and a conductive pillar 14 having a substantially conical shape was formed on the electrolytic copper foil.

This conductive pillar 14 is the second<u style="single">wiring</u>Layer 13<u style="single">To</u>The first vialand formed on the first wiring layer 12 when overlapped with the first wiring layer 12.<u style="single">12a</u>It was formed at the position corresponding to.

The conductive pillar 14 was formed by arranging a metal mask having pits formed therein and screen-printing the conductive resin. The metal mask used was made of stainless steel with a thickness of about 300 μm and a hole with a diameter of about 0.3 mm. As the conductive resin, in this example, a phenol resin-based conductive paste containing silver powder as a filler was used. After the printed conductive paste was dried, the process of printing and drying at the same position using the same mask was repeated three times. Further heating was performed to form a conductive pillar 14 having a substantially conical shape and a height of about 0.3 mm on the first vialand 12a (Fig. 7B).

After preparing the core material in which the first wiring layer 12 is formed on both sides of the first insulating layer 11a and the second wiring layer (unpatterned) in which the conductive pillar 14 is formed, as shown in FIG. 7C. , A second wiring layer is arranged on both sides of the core material via the second insulating layer 11b. At this time, the first vialand 12a and the conductive pillar 14 are aligned and arranged so as to face each other.

As the second insulating layer 11b, a B-stage prepreg having a thickness of about 100 μm in which a glass cloth was impregnated with an epoxy resin was used.

Then, from the outside of the second wiring layer 13, the whole is pressurized while being sandwiched between press plates and heated. The second insulating layer 11b is cured to the C stage by heating and pressurizing.

At this time, the substantially conical conductive pillar 14 penetrates the second insulating layer 11b in the semi-cured state and is connected to the opposite first vialand 12a. Curing of the second insulating layer 11b begins after the core base material and the second wiring layer 13 are in contact with both sides of the second insulating layer 11b, so that the conductivity formed on the second wiring layer 13 begins. The sex pillar 14 can penetrate the second insulating layer 11b relatively easily.

The tip of the conductive pillar 14 is inserted into the through hole 12b, which is a stress distribution means formed in the first vialand 12a, and is brought into close contact with the first vialand 12a while being plastically deformed. Here, the conductive pillar 14 penetrates into the first insulating layer 11a while being plastically deformed, but is not hard enough to easily penetrate the first insulating layer 11a, so that the conductive pillar 14 adheres without damaging the first vialand. be able to.

Next, the second wiring layer is patterned to form a predetermined circuit. Here, a resist having a predetermined pattern is formed on the copper foil, which is the second wiring layer 13, by screen printing, and the resist is used as a mask, the ferric chloride solution is used as an etching solution, and the copper foil is selectively etched and removed. After that, the resist was removed to form a predetermined circuit pattern having a second vialand. Through the above steps, a four-layer multilayer wiring board was formed in which each wiring layer had 1000 via connections by conductive pillars (Fig. 7D).

The connection resistance of the wiring circuit of the multilayer wiring board manufactured in this way was about 2.1Ω. This connection resistance corresponds to the resistance when 1000 conductive pillars are connected in series via a wiring made of copper foil, and considering the pattern resistance of the copper foil, the connection resistance value per conductive pillar is The average was about 1 mΩ. In addition, there was little variation in the connection resistance of the conductive pillars and the pattern resistance of the copper foil.

FIG. 8 is a diagram showing a state in which the multilayer wiring board of FIG. 7D is cut in a plane parallel to the axial direction of the conductive pillar and the state of the interlayer connection portion is observed. A part of the conductive pillar 14 had a portion 14c penetrating toward the first insulating layer 11a through the hole 12b formed in the first vialand 12a, but the conductive pillar 14 and the first vialand and the first vialand The two vialands were tightly connected and the joints were in good condition.

The second vialand 12a was slightly recessed toward the first insulating layer, but no cracks were observed. This is because the conductive bump 14 penetrates into the first insulating layer 11a through the hole 12b provided in the first vialand 12a and is plastically deformed along the first vialand 12a.

For comparison, a multilayer wiring having the same configuration as that shown in FIG. 7D was manufactured under the same conditions except that the stress distribution means was not formed on the first vialand 12a. The connection resistance of the wiring pattern of the four-layer multilayer wiring board having 1000 via connections by this conductive pillar was 5.1Ω, which was about 3Ω larger than the connection resistance of the multilayer wiring board of the present invention illustrated in FIG. 7D. .. Further, when a multilayer wiring board having no stress distribution means was cut in the first vialand and the state of via connection was observed, the first vialand 12a portion was large and dented toward the first insulating layer 11a. The first beer land 12a had a crack (see Fig. 27).

As described above, the multilayer wiring board of the present invention can disperse the stress applied in the axial direction of the conductive pillar by providing the vialand provided with the stress dispersion means. Therefore, the wiring circuit including the via land is not easily damaged, and a highly reliable interlayer connection can be established. In addition, since interlayer connection by through holes can be suppressed to the minimum necessary, high-density mounting can be supported.

Further, according to the method for manufacturing a multilayer wiring board of the present invention, it is possible to suppress the occurrence of connection failure and further improve the productivity while maintaining the high productivity of the method for manufacturing a multilayer wiring board using conductive pillars. it can.

The present invention is not limited to the above embodiment, and various modifications can be taken without departing from the spirit of the invention. For example, the wiring layer may be formed of a conductive composition, and the conductive pillars may be made of metal. Further, the insulating layer is not limited to the epoxy resin, and a thermosetting resin, a thermoplastic resin, or the like can be selected and used as needed.

FIG. 9A is a diagram schematically showing a cross-sectional structure of an interlayer connection portion of the multilayer wiring board of the present invention. FIG. 9B is a diagram schematically showing the structure of the interlayer connection portion shown in FIG. 9A as seen through from the axial direction of the conductive pillar, and FIG. 9C schematically shows the structure of the interlayer connection portion shown in FIG. 9A. It is a perspective view.

The multilayer wiring board is formed on the insulating film 21, the first vialand 22 formed on the first surface of the insulating film 21, and the first vialand formed on the second surface of the insulating film 21. It has a second beer land 23 formed in a region facing the 22.

Here, the first vialand 22 is formed as a part of the circuit pattern 22b of the first wiring layer, and the second vialand 23 is formed as a part of the circuit pattern 23b of the second wiring layer (not shown). There is.

The interlayer connection between the first wiring layer and the second wiring layer is composed of a conductor formed through the insulating film 21 so as to connect the first vialand 22 and the second vialand 23. Established by the conductive pillar 24. The shape of the portion where the outer surface of the conductive pillar 24 and the surface of the first vialand 22 and the second vialand 23 are in contact with each other is the same as that of the conductive pillar 24 and the first vialand 22 or the second vialand 23. It is formed so that stress concentration does not occur at the solid-solid interface of the connection part.

To prevent stress concentration at the interface between the conductive pillar 24 and the first vialand 22, the second vialand 23, for example, the outer surface of the conductive pillar 24 and the first vialand 22 and The contact angle formed by the surface of the second vialand 23 on the insulating film 21 side may be set so that the stress concentration coefficient is as small as possible.

10A, 10B, and 10C are diagrams schematically showing an example of the shape of the connection portion between the conductive pillar 24 and the first vialand 22 (or the second vialand 23) included in the multilayer wiring board of the present invention. Is. 11A and 11B are examples of the undesired shape of the connection between the conductive pillar 24 and the first vialand 22 (or the second vialand 23) shown for comparison.

The present inventor analyzed the stress generated at the via connection portion using the conductive pillar by simulation using the physical property constants of each material, and as a result, the stress acting to peel off the conductive pillar 24 and the wiring layer or via land. It was found that the part where the wiring layer (or vialand) and the conductive pillar 24 are connected depends on the angle formed between the surface of the vialand and the outer peripheral surface of the conductive pillar. Therefore, in the present invention, the contact angle θ between the outer peripheral surface of the conductive pillar having a substantially hyperboloidal shape and the surface of the vialand is controlled so as to reduce the stress concentration coefficient.

For example, if the contact angle θ is set small so that the outer surface of the conductive pillar 24 and the surface of the vialand 22 are smoothly continuous, the bonding strength and the peeling resistance can be improved. For example, the via connection having the shape shown in FIG. 10B has a higher resistance to peeling than the via connection having the shape shown in FIG. 10C. Similarly, the via connection having the shape shown in FIG. 10A has a higher resistance to peeling than the via connection having the shape shown in FIG. 10B. In any case, the via connection having the shape shown in FIG. 10C has much higher peel strength than the via connection having the shape shown in FIGS. 11A and 11B.

That is, when the outer peripheral surface of the conductive pillar and the surface of the via land are smoothly and continuously connected, the strength against peeling is large, but a notch is formed at the joint between the outer peripheral surface of the conductive pillar and the via land. If there is, stress is concentrated on this portion and the peel resistance is reduced, and the sharper the notch, the greater the reduction in the peel resistance.

It was also found that if the outer peripheral surface of the conductive pillar and the surface of the vialand are smoothly connected as a whole, the peel strength can be maintained even if there is a microscopic notch. 12A and 12B are diagrams schematically showing another example of the shape of the connection portion between the conductive pillar and the first vialand or the second vialand. The connection between the outer peripheral surface of the conductive pillar and the surface of the vialand draws a closed curve, for example, a circle, and the peel resistance is maximized when all the parts on the closed curve are smoothly connected. In any case, if at least a part of this closed curve is smoothly connected, the peel resistance is compared with the case where all parts of the closed curve are connected with a notch having a shape having a large stress concentration coefficient. The strength can be increased. For example, the shapes shown in FIGS. 12A and 12B have notches in the microscopic (contact angle ψ), but the outer surface of the conductive pillar 24 and the surface of the vialand are smoothly continuous as a whole. It is connected (contact angle θ), and even when a thermal load is applied in the mounting process such as solder reflow, the via connection between the wiring layers can be stably maintained.

FIG. 13A is a diagram schematically showing an example of the structure of the multilayer wiring board of the present invention, and FIG. 13B is a diagram schematically showing a state when a heat load is applied to the multilayer wiring board of FIG. 13A. This multilayer wiring board has 3000 via connections that employ conductive pillars 24. The interlayer connection portion of the multilayer wiring board of FIG. 13A has a structure similar to that of the multilayer wiring board of the present invention shown in FIG. 9A. The conductive pillar 24 formed through the insulating layer 21 connects the first vialand 23 of the first wiring layer and the second vialand 24 of the second wiring layer separated by the insulating layer 21. ing. The joints between the conductive pillar 24 and the first vialand 22 and the second vialand 23 both have a shape that relieves the stress applied to the triple point 25. In this example, the angle between the outer peripheral surface of the conductive pillar 24 and the surface of the first vialand 22 and the angle between the outer peripheral surface of the conductive pillar 24 and the surface of the second vialand 23 are both formed at an acute angle. Has been done.

When mounting various electronic components on such a multi-layer wiring board, especially during solder reflow, a heat load is applied to the interlayer connection and stress is generated due to the difference in the coefficient of thermal expansion. Stress will be concentrated on.

In the multilayer wiring board of FIG. 13A, an insulating resin base material of FR-4 standard is used as the insulating layer 21, copper foil is used as the wiring layer, and silver fine particles are dispersed in the binder resin as the conductive pillar. The conductive resin that has been made is used.

The coefficient of thermal expansion α1 in the normal direction of the insulating layer 21 at a temperature lower than the glass transition temperature Tg (about 125 ° C) of FR-4 is 5.1 × 10.^-5[° K^-1]. The coefficient of thermal expansion α2 in the thickness direction of FR-4 at a temperature higher than Tg is 2.6 × 10.^-4[° K^-1] And much larger than α1.

On the other hand, the coefficient of thermal expansion of silver, which constitutes the main part of the conductive pillar, is 17.0 × 10.^-6[° K^-1]. Therefore, when a heat load is applied to the multilayer wiring board of FIG. 13A, the insulating layer 21 expands more than the conductive pillar 24. Especially at a temperature higher than the glass transition temperature Tg, the coefficient of thermal expansion of the insulating layer 21 is more than 15 times larger than the coefficient of thermal expansion of silver. Since the eutectic temperature of Pb-Sn-based eutectic solder alloys that are commonly used as solder is 183 ° C, a thermal load of about 220 to 240 ° C is applied to the multilayer board when reflowing the solder. (Fig. 13B).

Therefore, due to the difference between the coefficient of thermal expansion of the conductive pillar 24 and the coefficient of thermal expansion of the insulating layer 21, a large stress is generated in the axial direction of the conductive pillar 24 (parallel to the normal direction of the insulating layer). .. This stress acts as tension on the joint between the conductive pillar 24 and the first vialand 22 and the second vialand 23. In addition, such stress is greatest at the triple point where the insulating layer 21, the conductive pillar 24, and the vialands 22 and 23 are in contact with each other.

When the multilayer wiring board shown in FIG. 13A was heated to 240 ° C. for 20 seconds and the interlayer connection was examined, all the interlayer connections were ensured to be conductive, and the resistance value was also maintained.

The first beer land 22 and the second beer land 23 may be provided with means for releasing the pressure applied between the conductive pillar and the beer land as illustrated in FIG. 2, for example. For example, a through hole in the first beer land 22 or the second beer land 23<u style="single">12b</u>By forming the above, it is possible to prevent damage to the via connection and stably maintain the function of the interlayer connection regardless of whether pressure is applied between the conductive pillar and the via land.

Although FIGS. 9 to 13 show the interlayer connection of the wiring layers formed on both sides of the one-layer insulating layer, the above-mentioned via connection is applied to the multilayer wiring board having three or more wiring layers in exactly the same manner. can do.

Next, a method for manufacturing a multilayer wiring board of the present invention having a shape that relieves stress applied to a joint portion between a conductive pillar and a first vialand and a second vialand will be described. 14A, 14B, 14C, 14D, 14E, 14F, and 14G are diagrams for explaining an example of the method for manufacturing the multilayer wiring board of the present invention.

An electrolytic copper foil having a thickness of about 35 μm to be the first wiring layer 22 was prepared, and the conductive pillar 24 was formed at a predetermined position on the copper foil. The conductive pillar 24 is formed by screen-printing a conductive paste using silver fine particles (average particle size of about 10 μm) as a conductor filler, and has a substantially conical shape with a bottom diameter of about 250 μm and a height of about 250 μm. (Fig. 14A).

After drying the conductive pillar 24, prepare a thermosetting prepreg (trade name, Galaepop prepreg HE, manufactured by Toshiba Chemical Co., Ltd.) with a thickness of about 115 μm in which a glass cloth is impregnated with an epoxy resin as an insulating layer 21. , The first wiring layer 22 was laminated and arranged on the surface on which the conductive pillar 24 was formed. At this time, the insulating layer 21 of the B stage is heated to about 100 ° C (&lt;Tg), and the conductive pillar 24 is pressed by the flexible pressing body 26 so that the conductive pillar 24 is not deformed. It penetrated the insulating layer 21 (Fig. 14B). At this time, the insulating layer 21 is not completely cured and maintains a semi-cured state. This corresponds to the prefabricated material of the multilayer wiring board of the present invention. Here, the prefabricated material means a prefabricated material constituting the multilayer wiring board, and refers to, for example, the state shown in FIG. 14B or the state shown in FIG. 14C. By using such a prefabricated material for the multilayer wiring board of the present invention, the multilayer wiring board of the present invention can be easily constructed. For example, by laminating the prefabricated material of FIG. 14C on both sides of the double-sided laminated board, the multilayer wiring board of the present invention having four wiring layers can be configured.

Then, the tip of the conductive pillar 24 protruding from the insulating layer 21 was deformed by applying pressure in the direction of the central axis of the conductive pillar 24. Here, a hard stainless steel plate with a thickness of about 1 mm was placed on the conductive pillar 24, and a flat plate press was performed at room temperature to plastically deform the tip of the conductive pillar so as to be crushed (Fig. 14C). At this time, the crushed head of the conductive pillar 24 was slightly raised and exposed from the surface of the insulating layer 21. Even in this state, it can be used as a prefabricated material for a multilayer wiring board.

Next, an electrolytic copper foil having a thickness of about 35 μm, which serves as a second wiring layer, was placed on the surface of the insulating layer 21 in which the tip of the conductive pillar 24 was exposed. This laminate is pressed while heating from the outside of the first wiring layer 22 and the second wiring layer 23 to completely cure the semi-cured insulating layer 21 by heating, and the conductive pillars 24 and the second wiring are wired. The layers were crimped (Fig. 14D). In the steps up to this point, a double-sided copper-clad plate in which the first wiring layer 22 and the second wiring layer 23 are interconnected by the conductive pillar 24 via the insulating layer 21 can be obtained. The conductive pillar 24 is formed by controlling its shape, and is first plastically deformed in multiple stages by crushing the head protruding from the insulating layer 21 and then crimping it with the second wiring layer 23. Then, it is possible to obtain a shape in which stress is not concentrated on the joint portion between the conductive pillar 24 and the wiring layer.

Next, the first wiring layer 22 and the second wiring layer 23 were patterned into a predetermined wiring circuit including the first vialand 22a and the second vialand 22b (FIG. 14E). In this production example, a general etching resist ink (PSR-4000H, manufactured by Taiyo Ink KK) is screen-printed to form a mask so that a predetermined wiring circuit pattern can be obtained, and a copper foil is made of cupric chloride. Was etched and the resist mask was peeled off. In the case of manufacturing a multilayer wiring board having more wiring layers by using the two-layer wiring board having the first wiring layer 22 and the second wiring layer 23 shown in FIG. 14E as the core base material, the wiring circuit At the same time as patterning, it is preferable to form stress release means as shown in FIG. 2 in the first vialand 22a and the second vialand 23a (FIG. 14F). By forming the stress release means, damage to the via land and the wiring circuit when forming the interlayer connection with the outer wiring layer can be prevented, and the reliability of the multilayer wiring board can be improved.

When the continuity test of the via connection was performed by the conventional method in the state of FIG. 14E, no abnormality was found in the interlayer connection having all (3000) conductive pillars 24. No abnormality was found in the resistance value.

Next, an example will be described in which a four-layer multi-layer wiring board having the third wiring layers 27a and 27b on both sides of the multi-layer wiring board shown in FIG. 14E as a core base material is manufactured.

In the same manner as described above, a prefabricated material in which the third wiring layers 27a and 27b in which the conductive pillars 24 are formed at predetermined positions and the insulating layer 21b are laminated is prepared as shown in FIG. 14C. Here, the insulating layer 21b uses a prepreg made of the same material as the insulating layer 21, but if necessary, an insulating material made of a different material can be used.

Then, using the double-sided wiring board shown in FIG. 14E as the core base material, the third wiring layers 27a and 27b and the insulating layer 21b are arranged on both sides thereof. At this time, the via connections between the first wiring layer 22 and the second wiring layer 23 and the third wiring layers 27a and 27b are arranged so as to face each other (FIG. 14G).

Next, this laminate is pressed while heating from the outside of the third wiring layers 27a and 27b to completely cure the semi-cured insulating layer 21b by heating, and the conductive pillars 24 and the third wiring layer 27a , 27b was crimped.

Then, by patterning the third wiring layers 27a and 27b into a predetermined wiring circuit, the first wiring layer 22 and the second wiring layer 23 and the third wiring layers 27a and 27b are insulated by the conductive pillar 24. A multilayer wiring board having four wiring layers connected in layers via layer 21b can be obtained (Fig. 14H).

The method for manufacturing the multilayer wiring board of the present invention having such a joint shape having high peel strength will be described in more detail. First, the bonding between the first wiring layer 22 and the conductive pillar 24 will be described, and then the bonding shape between the second wiring layer and the conductive pillar 24 will be described.

In the example of FIG. 14, the joint shape between the first wiring layer 22 and the conductive pillar 24 is substantially determined when the conductive pillar is formed on the first wiring layer 22 such as copper foil. For example, when a conductive resin, a conductive paste, or the like is screen-printed using a mask such as a metal mask to form a conductive pillar, the shape, opening diameter, and thickness of the metal mask are adjusted, while the conductive resin is used. The conductive pillar can be formed into a desired shape by adjusting physical property values such as viscosity, thixotropy, surface tension of the sex resin layer, or surface tension of the mask. Here, a method of forming the conductive pillar will be described. Here, a method of forming a conductive pillar will be described by taking a multilayer wiring board as an example.

15A, 15B, 15C, 15D, and 15E are diagrams for explaining an example of the process of forming the conductive pillar 24.

A metal mask 31 having a substantially cylindrical through hole (pit) 31a formed on the first wiring layer 22 was arranged. Here, the metal mask was made of stainless steel with a thickness of 300 μm, and the diameter of the through hole 31a was set to 3.00 μm.

Then, the conductive resin 33 is filled into the holes 31a of the metal mask 31 by the squeegee 34 via the screen 32 (FIGS. 15A and 15B). FIG. 15C is a diagram for explaining an example of screen printing.

Here, as the conductive resin 33, silver fine particles were kneaded with an epoxy-based binder resin, and a solvent was further mixed and used. Normally, the conductive resin 33 is used by adjusting the viscosity to about several hundred poises, but in the present invention, the viscosity is adjusted much larger than this in order to control the shape of the conductive pillars. Using. If necessary, the thixotropy of the conductive resin 33 may be adjusted by, for example, ultrasonic vibration (provided that the conductive resin 33 has thixotropy).

When the conductive resin 33 whose viscosity is adjusted is filled in the hole 31a of the metal mask 31 in this way, the metal mask 31 and the first wiring layer 22 are separated from each other in the normal direction of the first wiring layer 22 ( Figure 15D). At this time, the conductive resin 33 was deformed while being stretched between the first wiring layer 22 and the metal mask 31, and a conductive pillar 24 having a substantially conical shape was formed on the first wiring layer 22 ( 15E). The diameter r of the bottom surface of the formed substantially conical conductive pillar 24 was about 300 μm, and the height h was about 250 μm. Further, a part of the conductive resin 33 was attached to the hole 31a of the metal mask 31. By such a method, the contact angle θ between the conductive pillar 24 and the surface of the first wiring layer 22 is small, and a joint shape that alleviates the notch effect can be obtained. If you want to form a conductive pillar 24 with a higher aspect ratio (height (h) / bottom diameter (r)), for example, adjust the shape of the through hole 31a and the physical properties of the conductive resin 33. Alternatively, the metal mask 31 may be arranged at the same position and screen printing may be repeated.

Further, the formation of the conductive pillar 24 is not limited to screen printing, and may be formed by a stamping method or the like in which the conductive paste is extruded into the holes of the mask. Also by such a method, the conductive pillar 24 having a high aspect ratio can be formed from the conductive paste, the conductive resin, or the like as in the case of screen printing. Further, a conductive pillar made of metal may be formed by a plating method or the like. In any case, the height and diameter of the conductive pillar 24 may be set according to the configuration of the via connecting portion to be formed, as will be described later.

Although the method for forming the conductive pillars described above has been described by taking the interlayer connection of the multilayer wiring board as an example, it can be formed on the electrodes of electronic components such as semiconductor elements in exactly the same manner. Next, a method of controlling the joint shape between the conductive pillar 24 formed in this way and the second wiring layer 23 will be described.

FIG. 16 is a diagram schematically showing the relationship between the conductive pillar 24 and the insulating layer 21, and corresponds to the state of FIG. 14B of the seventh embodiment. According to the present inventor, the joint shape between the conductive pillar 24 and the second wiring layer 23 is the ratio of the mass of the portion buried in the insulating layer 21 of the conductive pillar 24 and the portion protruding from the surface of the insulating layer 21. , And it was found by experiments that it is related to the physical property values such as the plastic deformability of the conductive pillar 24.

For example, when electrolytic copper foil is used as the wiring layer and silver fine particles are used as the conductor filler constituting the main part of the conductive pillar 24, the conductive pillar 24 has a thickness d with respect to the thickness d of the insulating layer 21. By setting the height h 1 to 5 times larger, more preferably 1.6 to 4 times larger, the notch effect of a small contact angle θ between the conductive pillar 24 and the surface of the second wiring layer 23 is alleviated. It was found that a joint shape can be obtained.

Here, the height h of the conductive pillar 24 is set to be larger than the thickness d of the insulating layer 21 for the following reasons. For example, when the insulating layer 21 is a thermosetting resin, the thickness d shrinks by about 0 to 30% when it is cured from the B stage to the C stage, and when it is a thermoplastic resin, it solidifies from the softened state. As a result, the thickness d shrinks by about 0 to 15%. Therefore, if the height h of the conductive pillar 24 is at least 1.2 times the thickness of the insulating layer 21, at least the tip portion protrudes from the surface of the insulating layer 21. This protruding portion is a portion that is plastically deformed to form a joint shape when crimped with the second wiring layer 23. If the height h of the conductive pillar 24 is 1.2 to 5 times, preferably 1.6 to 4 times the thickness d of the insulating layer 21, the contact angle θ is not destroyed by the second wiring layer 23. It is possible to obtain a joint shape having a small size and alleviating the notch effect.

The above description is applied to the case where the conductive pillar 24 is formed on either one of the two wiring layers connected to each other.

For example, when the conductive pillars 24 are opposed to each other and penetrated from both sides of the semi-cured insulating layer 21 to form an interlayer connection, the height h of the conductive pillars 24 is 0.8 to 0.8 to the thickness d of the insulating layer 21. It is preferable to set the height to about twice.

FIG. 17 is a diagram showing a state in which the first wiring layer 22 and the second wiring layer 23 are arranged with the conductive pillars 24 facing each other from both sides of the insulating layer 21, and FIG. 18 is a diagram showing a state in which the first wiring layer 22 and the second wiring layer 23 are arranged from both sides of the insulating layer 21. It is a figure which shows typically the structure of the interlayer connection part of the multilayer wiring board of this invention, which was formed by penetrating the conductive pillars 24 facing each other.

On the other hand, when the conductive pillar 24 is formed on one of the two wiring layers to be interconnected as described above and the conductive pillar 24 is penetrated from one side of the insulating layer 21 to form the interlayer connection, the conductive pillar 24 is formed. It is preferable to set the height h of the conductive pillar 24 to a height of about 1.6 to 4 times the thickness d of the insulating layer 21.

The multilayer wiring board of the present invention manufactured in Example 8 was cut, and the cross-sectional shape of the conductive pillar 24 and the contact angles between the conductive pillar 24 and the wiring layers 22, 23, 27a, and b were observed. The cross-sectional shape of the conductive pillar 24 on a plane parallel to the axis had a drum shape with a substantially hyperboloidal outer peripheral surface. The contact angle θ was eventually distributed in an angle range of 30 to 80 °.

Prepare five 4-layer multilayer wiring boards with 9000 conductive pillars 24 manufactured as described above, immerse these multilayer wiring boards in a solder bath at 288 ° C for 20 seconds, and then pull them up to make wiring resistance. The change in the test was evaluated. The measured wiring resistance values were within the measurement error range before and after the test, and there was no substantial change. No significant change in resistance was observed after repeating the same test 5 more times.

In addition, five 4-layer multilayer wiring boards having 9000 conductive pillars 24 manufactured as described above were prepared and subjected to a thermal cycle test. In the thermodynamic cycle test, 3000 cycles of leaving the multilayer wiring board at -65 ° C and + 125 ° C for 30 minutes each were repeated. No significant change was observed in the wiring resistance values before and after the test, and all were distributed within the measurement error range.

For comparison, the height of the conductive pillar 24 is made smaller than the thickness of the insulating layer 21 through which the tip of the conductive pillar 24 penetrates by the manufacturing method described in Examples 7 and 8 (insulating layer). (Considering shrinkage due to heat curing of 21) A multi-layer wiring board having four wiring layers was manufactured. The same materials as in Examples 7 and 8 were used for all the materials including the insulating layers 21, 21b wiring layers 22, 23, 27a, and 27b conductive pillars 24.

The wiring circuit was also formed in the same pattern. This multilayer wiring board was cut, and the cross-sectional shape of the conductive pillar 24 and the contact angles between the conductive pillar 24 and the wiring layers 22, 23, 27a, and 27b were observed. The cross-sectional shape of the conductive pillar 24 in a plane parallel to the axis is the shape shown in FIGS. 11A and 11B. The contact angle θ was distributed in the range of 30 to 150 °.

When the multilayer wiring board of this comparative example was immersed in a solder bath at 288 ° C for 20 seconds and then pulled up to test the change in wiring resistance, 95% of the via connections were broken on average. When the cross section was observed in a longitudinal section, peeling occurred at the junction interface between the conductive pillar 24 and the wiring layers 22, 23, 27a, and 27b. This is because the insulating layers 21 and 21b thermally expand in the axial direction of the conductive pillar 24 due to the heat load of the solder bath, which is larger than the conductivity. At this time, in the structure of the multilayer wiring board of the comparative example, the conductive pillar 24 This is because a large amount of stress (tension) is concentrated at the joint interface between the wiring layers 22, 23, 27a, and b, especially at the notch at the joint between the outer surface of the conductive pillar 24 and the wiring layer.

Next, the relationship between the height h of the conductive pillar 24 and the thickness d of the insulating layer 21 will be described. The present inventor prepared the multilayer wiring board of the present invention by changing the height d of the conductive pillar 24, and conducted various tests.

As the insulating layer 21, an epoxy resin prepreg containing a glass cloth having a thickness of about 115 μm was used. On the other hand, as the first wiring layer 22 and the second wiring layer 23, electrolytic copper foil having a thickness of about 35 μm was used. Then, as the conductive pillar 24, screen printing, drying, and curing of a conductive paste using silver fine particles as a conductor filler were repeated to manufacture six types of multilayer wiring boards having different heights d of the conductive pillar 24. Each of the conductive pillars 24 has a substantially conical shape having a substantially circular bottom surface, and the diameter of the bottom surface is about 250 μm. The height d was 100 μm, 140 μm, 200 μm, 300 μm, 570 μm, and 600 μm. Therefore, the contact angle θ between the first wiring layer 22 and the conductive pillar 24 has a shape so that stress is not concentrated in any case. The insulating layer 21 shrinks by about 20% during curing, and its thickness d becomes about 100 μm. Therefore, the height h of the conductive pillar 24 is 100 μm as the protruding height of the conductive pillar 24. In the case of, it is only slightly exposed, and in other cases, it is about 40 μm, 100 μm, 200 μm, 470 μm, or 500 μm.

An insulating layer 21 made of an epoxy resin prepreg containing a glass cloth having a thickness of 115 μm is laminated on the first wiring layer 22 on which such a conductive pillar 24 is formed, and pressed with a stainless steel plate so that the head is plastically deformed. Crushed to. Then, a second wiring layer 23 made of an electrolytic copper foil having a thickness of about 35 μm was laminated and arranged, and pressurized while heating.

While the insulating layer was cured by heating, the first wiring layer 22 and the second wiring layer 23 were connected by conductive pillars 24.

The six types of multilayer wiring boards manufactured in this way were cut, and the structure of the interlayer connection including the conductive pillar 24 was photographed and observed. FIG. 19A shows the structure of the interlayer connection of the multilayer wiring board manufactured by adjusting the height h of the conductive pillar 24 to 100 μm. FIG. 19B, FIG. 19C, FIG. 19D, FIG. 19E, and FIG. 19F show the conductive pillar 24, respectively. It is a figure which shows typically the structure of the interlayer connection of the multilayer wiring board manufactured by adjusting the height d to 140 μm, 200 μm, 300 μm, 570 μm, and 600 μm.

When the height h of the conductive pillar 24 was smaller than the thickness d of the insulating layer 21, the bonding area with the second wiring layer 23 was not sufficient as shown in FIG. 19A. The contact angle θ was larger than 90 ° and was distributed in a range of approximately 100 to 160 °.

On the other hand, when the height h of the conductive pillar 24 is set larger than the thickness d of the insulating layer 21 (h = 140 μm, 200 μm, 300 μm, 570 μm), the bonding area with the second wiring layer 23 is sufficient. In addition, the contact angle θ was smaller than 90 ° and had a shape in which stress was difficult to concentrate. The contact angle θ was distributed in the range of approximately 30 to 80 °.

However, when the height h of the conductive pillar 24 exceeds 5 times the thickness of the insulating layer 21 (FIG. 19F), the second wiring layer 23 is damaged in some parts. A multilayer wiring board in which a second wiring layer is formed on another insulating layer 21c and a stress releasing means as illustrated in FIG. 2 is provided on a via land connected to a conductive pillar 24 having a height h of 600 μm is provided. When manufactured, no damage was observed in the second wiring layer 23 as shown in Fig. 19F (Fig. 19G). The conductive pillar 24 had an intrusion portion 24b in which a part of the conductive pillar 24 penetrated into the insulating layer 21c. Furthermore, a test was conducted in which the first wiring layer 22 and the second wiring layer 23 of the multilayer wiring board shown in FIGS. 19A to 19F were patterned in a wiring circuit, immersed in a solder bath at about 288 ° C for 20 seconds, and then pulled up. Then, the change in wiring resistance before and after that was investigated.

In the multilayer wiring board in which the height h at the time of forming the conductive pillar 24 was set to 100 μm and 600 μm, a connection failure was observed after the test, and the resistance value was also increased in the portion where the continuity was ensured. On the other hand, in the multilayer wiring board in which the height h at the time of forming the conductive pillar 24 was set to 140 to 570 μm, no significant change was observed in the wiring resistance value before and after the test, and it was distributed within the measurement error range. It was. Even if the same test was repeated 5 times, no significant change was observed in the wiring resistance value, and it was distributed within the measurement error range.

Separately, the first wiring layer 22 and the second wiring layer 23 of the multilayer wiring board shown in FIGS. 19A to 19F are patterned in the wiring circuit, and heat is generated at 20 ° C for 20 seconds and at 260 ° C for 5 sec. A hot oil test was conducted by repeating the load cycle, and changes in wiring resistance before and after that were investigated.

In the multilayer wiring board in which the height h at the time of forming the conductive pillar 24 was set to 100 μm and 600 μm, a connection failure was observed after the test, and the resistance value was also increased in the portion where the continuity was ensured. On the other hand, in the multilayer wiring board in which the height h at the time of forming the conductive pillar 24 was set to 140 to 570 μm, no significant change was observed in the wiring resistance value before and after the test, and it was distributed within the measurement error range. It was. Even if the same test was repeated 5 times, no significant change was observed in the wiring resistance value, and it was distributed within the measurement error range.

In addition, a multilayer wiring board (4-layer board) of the present invention having interlayer connections with 10000 conductive pillars was manufactured. In this multilayer wiring board, most of the connection shapes between the outer surface of the conductive pillar 24 and the surface of the wiring layer (via land) have the shapes shown in FIGS. 10A, 10B, and 10C, and some of them. The macroscopic contact angle θ as shown in FIGS. 12A and 12B was smaller than 90 °, but the microscopic contact angle ψ was 90 ° or more.

When the above-mentioned hot oil test was performed on this multilayer wiring board to check the continuity of the interlayer connection, the continuity was ensured at all the connection portions. In addition, no significant change was observed in the wiring resistance value before and after the test, and it was distributed within the measurement error range. Even if the same test was repeated 5 times, no significant change was observed in the wiring resistance value, and it was distributed within the measurement error range.

For comparison, a multi-layer wiring board (4-layer board) having an interlayer connection with 10000 conductive pillars having a macroscopic contact angle θ larger than 90 ° as shown in FIGS. 11A and 11B was manufactured. Then, when the same test was performed, all the connections became poorly conducted.

As described above, since the multilayer wiring board of the present invention has an interlayer connection structure provided with conductive pillars so that stress is not concentrated, it is conductive even when a heat load is applied in the mounting process or the usage environment. It is possible to prevent peeling and disconnection between the sex pillar and the wiring layer. Therefore, it is possible to provide a multi-layer wiring board having high reliability and a simple structure. Further, since the multilayer wiring board of the present invention has a small number of through holes or does not need to have through holes, the mountable area of electronic components can be expanded and high-density mounting can be supported.

Further, according to the method for manufacturing a multilayer wiring board of the present invention, it is possible to manufacture a multilayer wiring board in which the bonding strength between the conductive pillar and the wiring layer is improved without lowering the productivity. According to the method for manufacturing a multilayer wiring board of the present invention, electrical connection between wiring layers can be easily and surely secured. Therefore, a highly reliable multilayer wiring board can be provided at a low cost.

The multilayer wiring board of the present invention can be connected by using it not only as a wiring board for general electronic devices and personal computers, but also as a wiring board for a multi-chip module (MCM) and a wiring board for a CSP (Chip Sized Package). It is possible to improve reliability and mounting density.

FIG. 20A is a perspective view schematically showing an example of the electronic component of the present invention, and FIG. 20B is a view showing the schematic structure of the electronic component as seen through from the opposite surface side of the electrode forming surface. Here, a semiconductor element is shown as an example of an electronic component.

The semiconductor element 41 is in a bare chip state and has 64 electrodes 42 for connecting to an external circuit. On each electrode 42, a conductive pillar 43 having a substantially conical shape similar to that described above is formed. The electronic component is not limited to the semiconductor element, and for example, an elastic surface wave element may be used. Further, the state of the electronic component is not limited to the bare chip, and may be molded with a resin or the like, or may be sealed in a metal case or the like.

The conductive pillar 43 was formed by the same method as described above. 21A, 21B, and 21C are diagrams for explaining an example of a method of forming conductive pillars on electrodes of electronic components. That is, first, from the upper side of the electrode 42, a metal mask 31 having a cylindrical through hole 31a is arranged at a predetermined position (FIG. 21A). Then, the conductive resin 33 is filled by screen printing (FIG. 21B), and the metal mask 31 is pulled up in the normal direction of the surface of the electrode 42 to have a substantially conical shape on the electrode 42 of the semiconductor element 41. Pillar 43 was formed (Fig. 21C). The conductive pillar 43 formed in this way was heat-cured with a binder resin to fix its outer shape.

The contact portion between the conductive pillar 43 and the electrode 42 has a shape in which the outer peripheral surface of the conductive pillar 43 and the surface of the electrode 42 are smoothly continuous, and has a shape in which stress concentration is unlikely to occur. ..

Such an electronic component of the present invention having a conductive pillar as a means for connecting to an external circuit is mounted on the multilayer wiring board in the same manner as the multilayer process of the multilayer wiring board of the present invention, and the electronic component of the present invention is mounted on the multilayer wiring board. You can get a parts package.

For example, first, a wiring layer having a predetermined pattern having a via land at a position corresponding to an electrode of an electronic component and an electronic component having a conductive pillar formed on the electrode are arranged to face each other via an uncured insulating resin layer. .. Then, by applying pressure from both sides, the conductive pillar penetrates the insulating resin layer in the semi-cured state and is connected to the via land while being plastically deformed. By heating at the same time, the insulating resin layer is cured. As described above, the electronic component of the present invention has a great advantage that solder is not required for mounting. Further, by mounting on the multilayer wiring board of the present invention, it is possible to route the lead-out wiring from the electronic component with a plurality of wiring layers, and the mounting density can be remarkably improved.

FIG. 22 is a perspective view schematically showing an example of the electronic component package of the present invention. FIG. 23 is a diagram schematically showing a cross-sectional structure of the electronic component package shown in FIG. 22 in the AA direction.

In this electronic component package, the electronic component 40 of the present invention as illustrated in FIG. 20 is mounted on the multilayer wiring board 50 of the present invention as described above, and electricity between the semiconductor element 41 and the multilayer wiring board 50 is obtained. The target connection is made by the conductive pillar 43.

The electrode 42 of the semiconductor element 41 and the vialand 13a of the wiring board are connected by a conductive pillar 43. The vialand 13a has a through hole as illustrated in FIG. 2, and can release the normal stress applied in the axial direction of the conductive pillar 43. In addition, some vialands 13a are directly connected to vialands 12a in another wiring layer via conductive pillars 14. That is, in the electronic component package of FIG. 22, the electrode 42 of the semiconductor element 41 is connected to a via land formed in a plurality of different wiring layers. For example, the electrode 42a is connected to the wiring layer to which the vialand 13a belongs, while the electrode 42b is connected to the wiring layer to which the vialand 12a belongs. Therefore, even for an electronic component having a high degree of integration and a large number of electrodes, it is possible to easily route the take-out wiring and reduce the mounting area. Further, the connection portion between the electronic component package and the external circuit may form, for example, a pad for PGA, BGA or wire bonding around the electronic component mounting surface of the multilayer wiring board 50 or on the back surface thereof. Good. As a matter of course, a via connection using the via land and the conductive pillar provided in the multilayer wiring board of the present invention as described above may be used for the connection portion of the electronic component package with the external circuit.

The structure of such an electronic component package can also be applied to a chip size package (CSP) in which the size of the package is very close to the size of the chip.

In this way, by combining the multilayer wiring board of the present invention and electronic components, an electronic component package suitable for high-density mounting can be obtained. The number of electronic components mounted on the board is not limited to one, and a plurality of different types of electronic components may be mounted on one multilayer wiring board. For example, the present invention can be applied in exactly the same manner when a multi-chip module is configured by mounting a semiconductor element and a chip capacitor or the like.

As described above, the multilayer wiring board of the present invention is provided with the vialand having the stress releasing means, so that the stress applied to the vialand in the axial direction of the conductive pillar can be released. Further, the stress applied in the tangential direction of the vialand (tangential stress) is relaxed mainly by the plastic deformation of the conductive pillar. Therefore, it is possible to avoid damage to the via land and the wiring circuit and establish a highly reliable interlayer connection. In addition, since interlayer connection by through holes can be suppressed to the minimum necessary, high-density mounting can be supported.

Further, in the multilayer wiring board of the present invention, since the contact portion between the conductive pillar and the vialand or the wiring layer has a shape so that stress is not concentrated, a heat load is applied in the manufacturing process, the mounting process, the usage environment, and the like. It is possible to prevent peeling and disconnection between the conductive pillar and the wiring layer even in such a case. Therefore, it is possible to provide a multi-layer wiring board having high reliability and a simple structure. Further, since the multilayer wiring board of the present invention has a small number of through holes or does not need to have through holes, the mountable area of electronic components can be expanded and high-density mounting can be supported. Furthermore, when used in combination with stress release means, damage to the via connection is prevented and the function of the interlayer connection is stably maintained regardless of whether pressure is applied between the conductive pillar and the via land or tension is applied. Can be done.

Such a multilayer wiring board of the present invention can be used not only as a wiring board for general electronic devices and personal computers, but also as a wiring board for a multi-chip module (MCM) and a wiring board for a CSP (Chip Sized Package). , Connection reliability can be improved, and mounting density can be improved.

According to the prefabricated material of the multilayer wiring board of the present invention, it is possible to easily manufacture a multilayer wiring board having a simple structure and a highly reliable interlayer connection portion using conductive pillars. Further, according to the method for manufacturing a multilayer wiring board of the present invention, it is possible to suppress the occurrence of connection failure while maintaining high productivity of the method for manufacturing a multilayer wiring board using conductive pillars. Further productivity can be improved.

Further, according to the method for manufacturing a multilayer wiring board of the present invention, it is possible to manufacture a multilayer wiring board in which the bonding strength between the conductive pillar and the wiring layer is improved without lowering the productivity. According to the method for manufacturing a multilayer wiring board of the present invention, electrical connection between wiring layers can be easily and surely secured. Therefore, a highly reliable multilayer wiring board can be provided at a low cost.

Further, according to the method for forming a conductive pillar of the present invention, for example, stress is less likely to be concentrated on an electrode of an electronic component, a conductor layer of a wiring board, or a vialand, and a conductive pillar having high connection reliability is formed. Can be done.

The electronic component of the present invention can be mounted without using solder. Therefore, it is possible to protect the health of workers and prevent environmental pollution in the manufacturing process. Further, by mounting the electronic component of the present invention on a multilayer wiring board, it is possible to route the lead-out wiring from the electronic component in a plurality of wiring layers, and the mounting density can be remarkably improved.

According to the electronic component package of the present invention, the mounting surface of the electronic component can be used in multiple layers, and even an electronic component having a high degree of integration and a large number of electrodes can be handled with a small mounting area. Therefore, various electronic component mounting packages such as CSP and MCM can be further miniaturized or the mounting density can be improved. It is easy to route the wiring taken out from the electrodes of electronic parts, and the degree of freedom in design can be greatly improved.

<figref num="1">It is a figure which shows 1 example of the structure of the multilayer wiring board of this invention schematically.</figref><figref num="2">It is a figure which shows one example of the shape of the 1st beer land schematicly.</figref><figref num="3A">It is a figure which shows another example of the shape of the 1st beer land schematicly.</figref><figref num="3B">It is a figure which shows another example of the shape of the 1st beer land schematicly.</figref><figref num="3C">It is a figure which shows another example of the shape of the 1st beer land schematicly.</figref><figref num="3D">It is a figure which shows another example of the shape of the 1st beer land schematicly.</figref><figref num="3E">It is a figure which shows another example of the shape of the 1st beer land schematicly.</figref><figref num="4">It is an enlarged view which shows the interlayer connection part of the multilayer wiring board of this invention shown in FIG.</figref><figref num="5">It is sectional drawing which shows roughly another example of the structure of the multilayer wiring board of this invention.</figref><figref num="6A">It is a figure for demonstrating the manufacturing process of the multilayer wiring board of this invention shown in FIG.</figref><figref num="6B">It is a figure for demonstrating the manufacturing process of the multilayer wiring board of this invention shown in FIG.</figref><figref num="6C">It is a figure for demonstrating the manufacturing process of the multilayer wiring board of this invention shown in FIG.</figref><figref num="7A">It is a figure for demonstrating another example of the manufacturing method of the multilayer wiring board of this invention.</figref><figref num="7B">It is a figure for demonstrating another example of the manufacturing method of the multilayer wiring board of this invention.</figref><figref num="7C">It is a figure for demonstrating another example of the manufacturing method of the multilayer wiring board of this invention.</figref><figref num="7D">It is a figure for demonstrating another example of the manufacturing method of the multilayer wiring board of this invention.</figref><figref num="8">FIG. 7D is a diagram showing a state in which the multilayer wiring board of FIG. 7D is cut in a plane parallel to the axial direction of the conductive pillar and the state of the interlayer connection portion is observed.</figref><figref num="9A">It is a figure which shows schematic the cross-sectional structure of the interlayer connection part of the multilayer wiring board of this invention.</figref><figref num="9B">It is a figure which shows schematic the cross-sectional structure of the interlayer connection part shown in FIG. 9A.</figref><figref num="9C">It is a perspective view which shows schematic structure of the interlayer connection part shown in FIG. 9A.</figref><figref num="10A">It is a figure which shows typically the example of the shape of the connection part between a conductive pillar and a 1st vialand or a 2nd vialand.</figref><figref num="10B">It is a figure which shows typically the example of the shape of the connection part between a conductive pillar and a 1st vialand or a 2nd vialand.</figref><figref num="10C">It is a figure which shows typically the example of the shape of the connection part between a conductive pillar and a 1st vialand or a 2nd vialand.</figref><figref num="11A">It is a figure which shows typically the undesired example of the shape of the connection part between the conductive pillar and the 1st vialand or the 2nd vialand shown for comparison.</figref><figref num="11B">It is a figure which shows typically the undesired example of the shape of the connection part between the conductive pillar and the 1st vialand or the 2nd vialand shown for comparison.</figref><figref num="12A">It is a figure which shows another example of the shape of the connection part of a conductive pillar and a 1st vialand or a 2nd vialand schematically.</figref><figref num="12B">It is a figure which shows another example of the shape of the connection part of a conductive pillar and a 1st vialand or a 2nd vialand schematically.</figref><figref num="13A">It is a figure which shows one example of the structure of the multilayer wiring board of this invention schematically.</figref><figref num="13B">It is a figure which shows typically the state when the heat load is applied to the multilayer wiring board of FIG. 13A.</figref><figref num="14A">It is a figure for demonstrating one example of the manufacturing method of the multilayer wiring board of this invention.</figref><figref num="14B">It is a figure for demonstrating one example of the manufacturing method of the multilayer wiring board of this invention.</figref><figref num="14C">It is a figure for demonstrating one example of the manufacturing method of the multilayer wiring board of this invention.</figref><figref num="14D">It is a figure for demonstrating one example of the manufacturing method of the multilayer wiring board of this invention.</figref><figref num="14E">It is a figure for demonstrating one example of the manufacturing method of the multilayer wiring board of this invention.</figref><figref num="14F">It is a figure for demonstrating one example of the manufacturing method of the multilayer wiring board of this invention.</figref><figref num="14G">It is a figure for demonstrating one example of the manufacturing method of the multilayer wiring board of this invention.</figref><figref num="14H">It is a figure for demonstrating one example of the manufacturing method of the multilayer wiring board of this invention.</figref><figref num="15A">It is a figure for demonstrating an example of the forming process of a conductive pillar 24.</figref><figref num="15B">It is a figure for demonstrating an example of the forming process of a conductive pillar 24.</figref><figref num="15C">It is a figure for demonstrating an example of the forming process of a conductive pillar 24.</figref><figref num="15D">It is a figure for demonstrating an example of the forming process of a conductive pillar 24.</figref><figref num="15E">It is a figure for demonstrating an example of the forming process of a conductive pillar 24.</figref><figref num="16">It is a figure which shows roughly the relationship between the conductive pillar 24 and the insulating layer 21.</figref><figref num="17">It is a figure which shows typically the appearance that the 1st wiring layer and the 2nd wiring layer are arranged with the conductive pillars facing each other from both sides of an insulating layer.</figref><figref num="18">It is a figure which shows typically the structure of the interlayer connection part of the multilayer wiring board of this invention formed by penetrating the conductive pillar 24 from both sides of the insulating layer 21 facing each other.</figref><figref num="19A">19A to 19F are diagrams schematically showing the structure of the interlayer connection of the multilayer wiring board manufactured by changing the height h of the conductive pillars, respectively.</figref><figref num="19B">19A to 19F are diagrams schematically showing the structure of the interlayer connection of the multilayer wiring board manufactured by changing the height h of the conductive pillars, respectively.</figref><figref num="19C">19A to 19F are diagrams schematically showing the structure of the interlayer connection of the multilayer wiring board manufactured by changing the height h of the conductive pillars, respectively.</figref><figref num="19D">19A to 19F are diagrams schematically showing the structure of the interlayer connection of the multilayer wiring board manufactured by changing the height h of the conductive pillars, respectively.</figref><figref num="19E">19A to 19F are diagrams schematically showing the structure of the interlayer connection of the multilayer wiring board manufactured by changing the height h of the conductive pillars, respectively.</figref><figref num="19F">It is a figure which shows typically the structure of the interlayer connection of the multilayer wiring board manufactured by changing the height h of each conductive pillar.</figref><figref num="19G">It is a figure which shows typically the structure of the interlayer connection of the multilayer wiring board of FIG. 19F in which a stress release means is formed in a beer land.</figref><figref num="20A">It is a perspective view which shows one example of the electronic component of this invention schematicly.</figref><figref num="20B">It is the figure which shows the electronic component of FIG. 20A seen through from the back side.</figref><figref num="21A">It is a figure for demonstrating an example of the method of forming a conductive pillar on the electrode of an electronic component.</figref><figref num="21B">It is a figure for demonstrating an example of the method of forming a conductive pillar on the electrode of an electronic component.</figref><figref num="21C">It is a figure for demonstrating an example of the method of forming a conductive pillar on the electrode of an electronic component.</figref><figref num="22">It is a perspective view which shows one example of the electronic component package of this invention schematicly.</figref><figref num="23">It is a figure which shows schematic the cross-sectional structure in the AA direction of the electronic component package shown in FIG.</figref><figref num="24">It is sectional drawing which shows an example of the sectional structure of the conventional multilayer wiring board.</figref><figref num="25A">It is a figure which shows an example of the manufacturing method of the multilayer wiring board which connected the wiring layers by using the conductive bump.</figref><figref num="25B">It is a figure which shows an example of the manufacturing method of the multilayer wiring board which connected the wiring layers by using the conductive bump.</figref><figref num="26A">It is a figure which shows another example of the manufacturing method of the multilayer wiring board which connected the wiring layers by using the conductive bump.</figref><figref num="26B">It is a figure which shows another example of the manufacturing method of the multilayer wiring board which connected the wiring layers by using the conductive bump.</figref><figref num="27">It is a figure which shows typically the via connection part of the multilayer wiring board which the via land became concave by a pressurizing process.</figref>