Semiconductor device and method of manufacturing the same
6 claims: 5 independent, 1 dependent
- 1第1の導体部材(3)の上に、第1の半田部材(4)を介して半導体素子(1、2)を接合する工程と、前記半導体素子の上に、前記第1の半田部材よりも融点の低い第2の半田部材(6)を介して第2の導体部材(7)を接合する工程と、しかる後、前記第2の半田部材のみをリフローさせた状態で、前記第2の導体部材の上方から加圧することにより、前記第1の導体部材と前記第2の導体部材との平行度を調整する工程とを備えることを特徴とする半導体装置の製造方法。
- 2前記第2の半田部材(6)として、Snを90wt%以上含有してなるものを用いることを特徴とする請求項1に記載の半導体装置の製造方法。
- 3一対の導体部材(3、7)により、半導体素子(1、2)の両面を半田部材(4、6)を介して挟んでなる半導体装置において、 前記半導体素子は、2種類の半導体素子からなり、これら2種類の半導体素子のそれぞれの両面を前記半田部材を介して前記一対の導体部材により共通に挟んだ構成となっており、 前記一対の導体部材のうち一方側に位置する半田部材(6)は、他方側に位置する半田部材(4)よりも、融点が低いことを特徴とする半導体装置。
- 4一対の導体部材(3、7)により、半導体素子(1、2)の両面を半田部材(4、6)を介して挟んでなる半導体装置において、 前記一対の導体部材のうち一方側に位置する半田部材(6)は、他方側に位置する半田部材(4)よりも、融点が低く、この 融点の低い方の半田部材(6)は、Snを90wt%以上含有してなるものであることを特徴とす る 半導体装置。
- 5一対の導体部材(3、7)により、半導体素子(1、2)の両面を半田部材(4、6)を介して挟んでなる半導体装置において、 前記一対の導体部材のうち一方側に位置する半田部材(6)は、他方側に位置する半田部材(4)よりも、融点が低く、この 融点の低い方の半田部材(6)が配設される方の前記導体部材(7)には、凹部(7c)が形成され、この凹部内に前記融点の低い方の半田部材が配設されていることを特徴とす る 半導体装置。
- 6前記一対の導体部材(3、7)は、前記半導体素子(1、2)の電極として機能するとともに、前記半導体素子の放熱を行う放熱部材の機能を有するものであることを特徴とする請求項3ないし5のいずれか1つに記載の半導体装置。
Independent claims6
33 paragraphs, as filed
The present invention relates to a semiconductor device in which both sides of a semiconductor element are sandwiched between a pair of conductor members with solder members, and a method for manufacturing the same.
[0002] [Conventional Technology] Examples of this type of semiconductor device include those in which heat radiation members (copper, aluminum, etc.) are solder-bonded to both sides of a semiconductor element, and electrode members (copper, etc.) are attached to both sides of a semiconductor element. Solder-bonded ones are generally known.
[0003] However, in a configuration in which a semiconductor element is sandwiched between such a pair of conductor members, the parallelism of both conductor members is difficult to obtain and the semiconductor element is tilted (for example, the tilt is about 0.5 to 1 mm). ) Therefore, a gap is generated between the semiconductor element and the conductor member, which causes problems such as insufficient contact area and deterioration of bondability. Further, when the cooling member is further provided on the outside of the conductor member as the heat radiating member, a gap is generated between the conductor member and the cooling member, and a problem such as deterioration of heat dissipation occurs.
[0004] In view of the above problems, it is an object of the present invention to appropriately secure parallelism between both conductor members in a semiconductor device in which both sides of a semiconductor element are sandwiched between solder members by a pair of conductor members. And.
[Means for Solving the Problems] In order to achieve the above object, in the invention according to claim 1, the first conductor member (3) is placed on the first solder member (4) via the first solder member (4). The process of joining the semiconductor elements (1, 2) and the second conductor member (7) are joined onto the semiconductor element via the second solder member (6), which has a lower melting point than the first solder member. After that, the parallelism between the first conductor member and the second conductor member is adjusted by applying pressure from above the second conductor member while only the second solder member is reflowed. It is characterized by having a process of performing.
[0006] According to the present manufacturing method, in a work in which both sides of a semiconductor element are sandwiched between the first and second conductor members via the first and second solder members, the second solder member is the first. Since the melting point is lower than that of the solder member, only the second solder member can be reflowed. In this state, if pressure is applied from above the second conductor member, the second solder member is deformed while the semiconductor element is supported by the first solder member, and the parallelism of both conductor members is adjusted. can do.
[0007] Therefore, according to the present invention, it is possible to provide a method for manufacturing a semiconductor device capable of appropriately ensuring the parallelism of both conductor members. Here, as the second solder member (6) as in the invention of claim 2, a member containing 90 wt% or more of Sn (tin) can be used.
[0008] Further, the invention of claims 3 to 6 comprises a pair of conductor members (3, 7) sandwiching both sides of a semiconductor element (1, 2) with a solder member (4, 6). A feature of a semiconductor device is that a solder member (6) located on one side of a pair of conductor members has a lower melting point than a solder member (4) located on the other side.
[0009] According to the present semiconductor device, as described in the manufacturing method of claim 1 described above, only the solder member having the lower melting point can be pressurized while being reflowed, whereby the reflowed solder member can be pressed. The position of the conductor member on the side can be easily adjusted. Therefore, according to the present invention, it is possible to provide a semiconductor device capable of appropriately ensuring the parallelism of both conductor members.
[0010] Here, as in the invention of claim 5, a recess (7c) is formed in the conductor member (7) on which the solder member (6) having the lower melting point is arranged, and the inside of the recess (7c) is formed. If the solder member having the lower melting point is disposed in the above, it is possible to prevent the solder from creeping up when the low melting point solder member is reflowed and pressurized, which is preferable.
[0011] The reference numerals in parentheses of the above means are examples showing the correspondence with the specific means described in the embodiments described later.
[Embodiments of the Invention] Hereinafter, embodiments of the present invention shown in the drawings will be described. FIG. 1 is a schematic cross-sectional view of the semiconductor device according to the embodiment of the present invention. 1 is an IGBT (Insulated Gate Bipolar Transistor) element, and 2 is a diode. In the present embodiment, the IGBT element 1 and the diode 2 form a circuit in pairs, and correspond to the semiconductor element referred to in the present invention.
[0013] These semiconductor elements 1 and 2 have a melting point of, for example, Sn10 wt% and Pb (lead) 90 wt% on one surface 3a of a plate-shaped first lead member (first conductor member) 3 made of copper, for example. Is joined via a first solder member 4 having a temperature of 320 ° C. Further, a block-shaped heat sink 5 made of copper, for example, is bonded to each of the semiconductor elements 1 and 2 via a first solder member 4.
On each heat sink 5, for example, a second lead member (second conductor member) 7 made of copper is passed through a second solder member 6 having a melting point lower than that of the first solder member 4. One side 7a is joined. As the second solder member 6, for example, a solder member 6 containing 90 wt% or more of Sn and having a melting point of 240 ° C. can be adopted.
[0015] In the first lead member 3 and the second lead member 7 facing each other with both sides of the semiconductor elements 1 and 2, the one surfaces 3a and 7a facing each other are substantially parallel (for example, both lead members). The inclination of 3 and 7 is 0.1 mm or less). Further, in this semiconductor device, the external lead 8 for electrically connecting to the external member and the IGBT element 1 are connected by a bonding wire 9 such as Au or Al and are electrically connected.
[0016] Further, each of the members 1 to 9 assembled as described above is sealed so as to be wrapped with a mold resin 10 made of, for example, an epoxy resin, and is protected from the external environment. Further, the other surfaces 3b and 7b of both lead members 3 and 7 are exposed from the mold resin 10, and the exposed surfaces 3b and 7b are heat dissipation surfaces.
[0017] As described above, in the present semiconductor device, the circuit is composed of both semiconductor elements 1 and 2, and both lead members 3 and 7 also have a function as electrodes. Therefore, the signal exchange between the semiconductor elements 1 and 2 and the outside is performed via the lead members 3, 7, the wire 9, and the external lead 8. Further, both lead members 3 and 7 also function as heat radiating members for radiating heat from the semiconductor elements 1 and 2. For example, although not shown, the other surfaces 3b and 7b of both lead members 3 and 7 are provided with an insulating member. By arranging cooling members and the like, heat dissipation is promoted.
Next, a method of manufacturing a semiconductor device according to the present embodiment will be described based on the above configuration. FIG. 2 is a process diagram showing the present manufacturing method in a cross section along FIG. First, the semiconductor elements 1 and 2 are joined to the one surface 3a of the first lead member 3 via the first solder member 4. Next, the heat sink 5 is bonded onto the semiconductor elements 1 and 2 via the first solder member 4. The state up to this point is shown in Fig. 2 (a), and this is referred to as work 50.
Next, one surface 7a of the second reed member 7 is bonded onto the semiconductor elements 1 and 2 to which the heat sink 5 is bonded via the second solder member 6 having a low melting point. Specifically, as shown in FIG. 2B, the second reed member 7 is mounted on the jig 100 with its one side 7a facing up, and is mounted on the one side 7a of the second reed member 7. The second solder member 6 is arranged at a desired portion, and the work 50 shown in FIG. 2 (a) is turned inside out and mounted on one surface 7a of the second lead member 7.
[0020] Further, a plate-shaped weight 101 made of, for example, stainless steel or the like is placed on the other surface 3b of the first lead member 3. Further, the jig 100 is provided with a spacer 102 made of carbon or the like having a constant predetermined height (for example, 1 mm) in order to define the distance between the lead members 3 and 7. This state is shown in Fig. 2 (b). Then, in this state, it is placed in a heating furnace or the like to reflow only the second solder member 6.
[0021] Then, the work 50 is pressurized by the weight 101, and as shown in FIG. 2C, the second solder member 6 is crushed and pushed down to the height of the spacer 102. As a result, the parallelism between both lead members 3 and 7 is adjusted. By the way, for example, when the melting points of the first solder member 4 and the second solder member 6 are 320 ° C and 240 ° C, respectively, the reflow temperature is 250 ° C and the load on the work 50 by the weight 101 is 0.08. g / mm<sup>2</sup>Can be done.
[0022] Further, the thickness of the second solder member 6 having a low melting point is preferably about 100 μm to 300 μm. This range is preferable because if it is too thin, the thickness for adjusting the parallelism is insufficient, and if it is too thick, the thermal conductivity between the semiconductor element and the lead member is insufficient. Further, it is advantageous to use a second solder member 6 containing 90 wt% or more of Sn as described above in terms of ensuring thermal conductivity. After that, wire bonding with the external reed 8 and resin molding are performed to complete the semiconductor device shown in FIG.
[0023] As described above, according to the present manufacturing method, both sides of the semiconductor elements 1 and 2 are passed through the first and second solder members 4 and 6 and the first and second lead members (conductor members) 3 are used. Since the second solder member 6 has a lower melting point than the first solder member 4 in the work 50 sandwiched between the two and 7, only the second solder member 6 can be reflowed.
[0024] Then, in this state, pressure is applied from above the second lead member 7, and the second solder member 6 is deformed while the semiconductor elements 1 and 2 are supported by the first solder member 4. , The parallelism of both lead members 3 and 7 can be adjusted. For example, by adjusting the parallelism, the parallelism of both lead members 3 and 7 could be reduced to 0.1 mm or less.
[0025] As described above, according to the present embodiment, it is possible to provide a method for manufacturing a semiconductor device capable of appropriately ensuring the parallelism of both conductor members 3 and 7. Further, in the semiconductor device shown in FIG. 1, in the state without the mold resin 10, both sides of the semiconductor elements 1 and 2 are sandwiched by the pair of lead members (conductor members) 3 and 7 via the solder members 4 and 6. The semiconductor device is a semiconductor device in which the second solder member 6 located on the second lead member 7 side has a lower melting point than the first solder member 4 on the other side. ..
[0026] According to this semiconductor device, as described in the above manufacturing method, only the second solder member 6 having the lower melting point can be reflowed, whereby the reflowed second solder member 6 can be reflowed. The position of the second lead member 7 on the side can be easily adjusted. Therefore, according to the present embodiment, it is possible to provide a semiconductor device capable of appropriately ensuring the parallelism of both lead members 3 and 7.
[0027] In the present embodiment, as shown in FIG. 3, a recess 7c is formed in a portion of one surface 7a of the second lead member 7 where the second solder member 6 is arranged (for example, a depth). The second solder member 6 may be arranged in the recess 7c (about 0.1 mm).
[0028] The recess 7c reflows and pressurizes the second solder member 6, and when the second solder member 6 is crushed, when the solder member 6 protrudes, the solder does not crawl up. It is possible and preferable. In addition, positioning when the solder member 6 is arranged as a foil (solder foil) becomes easy.
(Other Embodiments) The semiconductor elements 1 and 2 and the second lead member 7 may be directly joined by the second solder member 6 without providing the heat sink 5. Further, the present invention relates to a semiconductor device in which both sides of a semiconductor element are sandwiched between solder members by a pair of conductor members, and even if the pair of conductor members have a function of only a heat radiation member, an electrode is used. It may have only the function.
BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic cross-sectional view of a semiconductor device according to an embodiment of the present invention.
FIG. 2 is a process diagram showing a method of manufacturing a semiconductor device according to the above embodiment.
FIG. 3 is a cross-sectional view showing a portion of the second conductor member in which a recess is formed in a portion where the solder member is arranged.
[Explanation of symbols] 1 ... IGBT element, 2 ... diode, 3 ... 1st lead member, 4 ... 1st solder member, 6 ... 2nd solder member, 7. .. 2nd lead member, 7c ... recess.
3 sheets
Sheet 1 Sheet 2 Sheet 3
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Numbers
- Publication
- 3614079
- Publication, DOCDB
- 3614079
- Publication, EPODOC
- JP3614079B
- Application
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Titles2
- Japanese
- 半導体装置及びその製造方法
- English
- Semiconductor devices and their manufacturing methods
Classification
- CPC, 6
- H10W72/30
- H10W90/736
- H10W72/381
- H10W90/756
- H10W72/884
- H10W74/00
- IPC, 5
- H01L21 52
- H01L25 07
- H01L25 16
- H01L25 18
- H01L23 29
