Digital broadcast receiver

【0001】

[Technical field to which the invention belongs]

The present invention relates to a digital broadcast receiver corresponding to a digital broadcast system in which each carrier is differentially phase modulated and orthogonal frequency division multiplex (OFDM) modulated to transmit a fixed pattern synchronization signal within a frame.

【0002】

[Conventional technology]

There is a digital audio broadcasting system (hereinafter referred to as "DAB") described in ITU-R Recommendation BS.774 as a system for broadcasting audio signal data by digital modulation by the OFDM system.

【0003】

FIG. 9 is a block diagram showing the configuration of a conventional digital broadcast receiver. In the figure, 1 is an antenna, 2 is an RF amplifier, 3 is a frequency converter, 4 is a local oscillator, 5 is an intermediate frequency amplifier, 6 is an orthogonal demodulator, 7 is an A / D converter, 8 is a synchronous signal detector, and 9 Is a synchronous control means, 10 is a DFT processing means, 11 is a differential demodulator, 12 is a phase error detector, 13 is a frequency tuning control means, 14 is a bitabi decoder, 15 is an MPEG audio decoder, and 16 is a D / A conversion. Instrument, 17 is a voice amplifier, 18 is a speaker.

【0004】

In the receiver configured as described above, the broadcast wave received by the antenna 1 is amplified by the RF amplifier 2, the frequency conversion is performed by the frequency converter 3, and the unnecessary components such as the adjacent channel wave are removed by the intermediate frequency amplifier 5. Then, the amplification and the orthogonal demodulator 6 perform detection, and the signal is given to the A / D converter 7 as a baseband signal.

【0005】

The signal sampled by the A / D converter 7 is subjected to complex discrete Fourier transform processing (hereinafter referred to as "DFT processing") by the DFT means 10, and the phase of each transmission carrier subjected to 4-phase differential phase modulation (DQPSK) is changed. Detected. In the subsequent differential demodulator 11, processing (differential demodulation) is performed in which the modulation phases of the same carrier of two temporally adjacent transmission symbols are compared and the phase transition between them is output. The differentially demodulated data is sequentially output to the Viterbi decoder 14 according to the carrier order rule when performing modulation on the transmitting side.

【0006】

The Viterbi decoder 14 cancels the time interleaving performed on the transmitting side across a plurality of transmission symbols, and decodes the data transmitted by convolutional coding. At this time, error correction of data generated in the transmission line is performed.

【0007】

The MPEG audio decoder 15 decompresses the compressed DAB broadcast audio data output from the Viterbi decoder 14 in accordance with the specifications of ISO / MPEG1 layer 2, and gives it to the D / A converter 16. The audio signal converted to analog by the D / A converter 16 is reproduced from the speaker 18 through the audio amplifier 17.

【0008】

Here, the synchronization signal detector 8 detects a null symbol (= period without signal) in the frame synchronization signal in the DAB transmission signal shown in FIG. 10 by envelope detection, and this output is the synchronization control means 9 Through this, it becomes a timing signal for the DFT processing performed by the DFT processing means 9 to be correctly performed in synchronization with the signal transmission frame and each symbol.

【0009】

The phase error detector 12 detects an error from the original phase point of the phase data of each carrier output from the differential demodulator 11. That is, in DAB, when the frequency of the signal given to the orthogonal demodulator 6 is correct, the phases of the operational demodulated data for each carrier output from the differential demodulator 11 are approximately π / 4, 3 · π / 4. , 5 π / 4, 7 π / 4 of 4 phases. Therefore, if the data corresponding to each carrier is squared and the remainder for 2π is taken, this value will be π if the original data has no error, and four times that value if the original data has a phase error. Therefore, the phase error is detected. Actually, the phase error detector 11 performs the above operation on the data of a large number of carriers and averages the results to improve the detection accuracy.

【0010】

Since the phase error ε thus obtained is based on the output of the differential demodulator 11, it has the following relationship with the signal frequency error ζ at this time. ζ = ε / T where T is the symbol period including the guard interval.

【0011】

The frequency control means 13 controls the frequency of the intermediate frequency signal output from the frequency converter 3 by controlling the frequency of the local oscillator 4 so that the phase error ε is reduced, and the baseband given by the orthogonal demodulator 6 is controlled. It operates so that the frequency error ζ of the signal approaches 0.

【0012】

[Problems to be Solved by the Invention]

However, in the frequency control processing based on this phase error detection, if the frequency error of the signal is large and the phase error included in the output data of the differential demodulator 11 is large, the output that correctly reflects the frequency error cannot be obtained. There's a problem. For example, if the phase of the differential demodulator 11 output data appears to deviate from the original phase point by about π / 2, if this data is squared and the remainder for 2π is taken, the phase of this value will be all π. Even if the frequency of the local oscillator 4 is controlled using the result, the deviation of the signal frequency is not corrected. Not only that, the result is that erroneous pull-in control is performed for the signal frequency that causes a phase error of about π / 2 in the differential demodulator 11 output data. This also applies when the phase data of each carrier deviates from the original phase point by π and 3 · π / 2.

【0013】

Further, in the frequency control process based on this phase error detection, each carrier is not identified. Therefore, if the frequency error is larger and exceeds ± 1/2 of each carrier interval of OFDM, this frequency error cannot be detected and corrected. There's a problem.

【0014】

Further, since the timing synchronization processing for the signal transmission frame and each symbol is performed based on the signal detected by envelope detection of the null symbol in the frame synchronization signal by the synchronization signal detector 8, reflected waves and noise are superimposed on the signal. It becomes difficult to obtain accurate timing, such as when doing so. In particular, this problem has been significant for receivers such as in-vehicle receivers and portable receivers that are required to operate under poor reception conditions.

【0015】

The present invention has been made to solve the above-mentioned problems, and for a relatively large signal frequency error in a receiver compatible with digital broadcasting using an OFDM method in which each carrier is differentially phase-modulated. Another object of the present invention is to provide a digital broadcast receiver that correctly detects this and automatically corrects it, and also obtains accurate timing synchronization even when reflected waves or noise are superimposed on the signal.

【0016】

[Means for solving problems]

In the digital broadcast receiver according to the present invention, a synchronous signal detector based on envelope detection of the broadcast wave reception signal and a DFT processing means for collectively detecting the phase of each carrier for each transmission symbol of the broadcast wave reception signal. A differential demodulator based on the phase change of each carrier of transmission symbols adjacent in time, a phase error detector for the output data of this differential demodulator, and a phase reference of each carrier transmitted for each transmission frame. A first frequency error detector that detects frequency errors in units of carrier intervals based on the processing of demodulated data of fixed pattern symbols (phase reference symbols), and a second frequency that detects frequency errors within approximately carrier intervals. It includes an error detector and a control device to which the outputs of the synchronization signal detector, the phase error detector, the first frequency error detector, and the second frequency error detector are connected to each other.

【0017】

In addition, a DFT processing means that collectively detects the phase of each carrier for each transmission symbol of the broadcast wave reception signal, and a differential demodulator based on the phase change of each carrier of the transmission symbols that are adjacent in time. Based on the processing of the demodulated data of the phase error detector for the differential demodulator output data and the demodulated data of the fixed pattern symbol (phase reference symbol) transmitted for each transmission frame and giving the phase reference of each carrier, the frequency error is approximately in units of carrier intervals. The first frequency error detector that performs detection, the second frequency error detector that detects frequency error within approximately the carrier interval, and the DFT processing timing and phase by the DFT processing means based on the demodulation data processing of the phase reference symbol. The output of the time error detector that detects the time error with the reference symbol head timing, the synchronization signal detector, the phase error detector, the first frequency error detector, the second frequency error detector, and the time error detector. Is provided with a control device to which each is connected.

【0018】

Also, the first frequency error detector<u style="single">, Phase reference symbol Correct phase for demodulated data</u>Phase correction means,<u style="single">Stores specified value data for phase correction</u>Phase reference symbol data holding means,<u style="single">For the output of the phase correction means</u>IDFT means that performs inverse discrete Fourier transform processing (hereinafter referred to as "IDFT processing"),<u style="single">Detect the peak value contained in the output of IDFT means</u>Peak detector<u style="single">、</u>and<u style="single">, The maximum peak value is obtained while shifting the data given to the phase correction means from the phase reference symbol data holding means, and the magnitude of the shift at that time is output as the frequency error in the carrier interval unit.</u>It is composed of the maximum value search means.

【0019】

Also, a second frequency error detector<u style="single">, The first phase to correct the phase for the phase symbol demodulated data immediately before the timing when the output of the IDFT means of the first frequency error detector is maximized.</u>Phase correction means,<u style="single">A second phase correction means that corrects the phase for the phase symbol demodulation data one after the timing when the output of the IDFT means is maximized, and stores the specified value data for phase correction.</u>Phase reference symbol data holding means,<u style="single">The first that performs IDFT processing on the output of the first phase correction means</u>IDFT means,<u style="single">The second IDFT means that performs IDFT processing on the output of the second phase correction means, the code of the output of the IDFT means of the first frequency error detector, the sign of the output of the first IDFT means, and the second IDFT means. Determine the frequency error based on the sign of the output of</u>It is composed of frequency error determination means.

【0020】

Also, a time error detector<u style="single">, Phase reference symbol Correct phase for demodulated data</u>Phase correction means,<u style="single">Stores specified value data for phase correction</u>Phase reference symbol data holding means,<u style="single">IDFT processing is performed on the output of the phase correction means.</u>IDFT means,<u style="single">Detects the timing of the peak value included in the output of the IDFT means and outputs it as a time error.</u>Peak detector<u style="single">From</u>It constitutes.

【0021】

BEST MODE FOR CARRYING OUT THE INVENTION

Hereinafter, the present invention will be specifically described with reference to the drawings showing the embodiments thereof. Embodiment 1. FIG. 1 is a block diagram showing a configuration of a digital broadcast receiver according to a first embodiment of the present invention. In the figure, 1 is an antenna, 2 is an RF amplifier, 3 is a frequency converter, 4 is a local oscillator, 5 is an intermediate frequency amplifier, 6 is an orthogonal demodulator, 7 is an A / D converter, 8 is a synchronous signal detector, and 10 Is a DFT processing means, 11 is a differential demodulator, 12 is a phase error detector, 14 is a bitabi decoder, 15 is an MPEG audio decoder, 16 is a D / A converter, 17 is an audio amplifier, 18 is a speaker, and 19 is. The first frequency error detector, 20 is the second frequency error detector, and 21 is the control device. Here, 1 to 8, 10 to 12 and 14 to 18 are equivalent to the conventional ones.

【0022】

In the figure, the first frequency error detector 19 detects the frequency error in units of carrier intervals based on the phase reference symbol demodulation data, and when the signal frequency has a frequency error equal to or greater than the carrier interval of OFDM. Also allows the receiver to correct this error. This operation will be described below. The DAB phase reference symbol can be expressed as follows.

【0023】

[Number 1]<img he="52" id="000002" wi="154" file="2_0003556047.tif" img-format="tif" img-content="drawing" /> 【0024】

Here, Zk is the modulation component for the kth carrier, and in the case of DAB, it is one of four values exp (j n π / 2) with an amplitude of 1 and different phases (however, n = 1 to 3). Is the value of.

【0025】

Here, the value of Zk is fixed. When the signal of equation (1) is subjected to DFT processing, this Zk array is obtained as an output. Therefore, ideally, a perfect correlation is obtained between the output data array of the DFT processing means 10 and the known Zk array. It will be. In addition, when the frequency error is an integral multiple of the carrier interval, the correlation is maximized when a transition corresponding to this frequency shift is given by correlating while transitioning the elements of the Zk array, so frequency error detection can be performed. it can.

【0026】

However, the actual input data of the DFT processing means 10 is transformed by the frequency error ζ of the signal and the time error Δt between the DFT processing timing and the phase reference symbol as shown in the following equation.

【0027】

[Number 2]<img he="27" id="000003" wi="154" file="3_0003556047.tif" img-format="tif" img-content="drawing" /> 【0028】

Expressing this as discrete data gives the following equation.

【0029】

[Number 3]<img he="27" id="000004" wi="154" file="4_0003556047.tif" img-format="tif" img-content="drawing" /> 【0030】

Here, ξ = 2π ζ / ω.

【0031】

Therefore, the output of the DFT processing means 10 is as follows.

【0032】

[Number 4]<img he="86" id="000005" wi="154" file="5_0003556047.tif" img-format="tif" img-content="drawing" /> 【0033】

Here, ak = hk · Zk.

【0034】

Here, the second term I (m) of Eq. (4) is also from carriers other than the m-th carrier, which is generated by breaking the orthogonality between each carrier during DFT processing due to the frequency error ξ of the signal. This is a component (hereinafter referred to as "inter-carrier interference component"). This component has a relatively random property for each carrier-corresponding data, and its influence can be mitigated by sufficiently increasing the number of data when correlating.

【0035】

However, the phase error component 2πmΔ / N caused by the time error has a different value for each carrier-corresponding data, so even if the correlation is taken between the array of demodulated data and the array of Zk while leaving this component, the frequency error. No significant results can be obtained.

【0036】

Therefore, in this embodiment, the first frequency error detection is not a mere correlation calculation, but an IDFT process is performed on the result of multiplying the array of demodulated data and the array of Zk conjugate complex values for each element. Detect the peak value for the result. In addition, the correspondence between the demodulated data array and the Zk conjugate complex value array is changed, and the above processing is repeated to obtain the correspondence that gives the largest peak value. The frequency error is calculated from the magnitude of the transition between the sequences.

【0037】

FIG. 2 is a block diagram showing the configuration of the first frequency error detector. In the figure, 101 is a phase correction means, 102 is a phase reference symbol data holding means, 103 is an IDFT means, 104 is a peak detector, and 105 is a maximum value search means.

【0038】

The phase correction means 101 multiplies the phase reference symbol demodulation data represented by the equation (4) by the conjugate value Zk * of the default value Zk stored in the phase reference symbol data holding means 102. As a result, if there is no frequency error, all the phases of a'm in Eq. (4) are corrected to substantially zero.

【0039】

The IDFT means 103 performs IDFT processing on the phase-corrected output, and this processing can be expressed as the following equation.

【0040】

[Number 5]<img he="52" id="000006" wi="154" file="6_0003556047.tif" img-format="tif" img-content="drawing" /> 【0041】

From this, it can be seen that the phase of the terms to be summed at n = Δ becomes a constant value. Therefore, it is clear that the output of the IDFT means 103 has a large peak at the time point of n = Δ, and no obvious peak occurs at other time points where the phase rotation remains in the summation term. The peak detector 104 determines whether or not there is a clear peak in the output of the IDFT means 103.

【0042】

The condition for this obvious peak to occur is that the phase correction means 101 correctly corrects the phase with the default value Zk. The maximum value search means 105 repeats the above processing while shifting the correspondence between the elements of the array of demodulated data and the array of conjugate complex values of Zk to find the correspondence that gives the largest peak value. The magnitude of the shift in the above is output as a frequency error with the carrier interval as a unit.

【0043】

Further, the second frequency error detector 20 detects the frequency error within approximately the carrier interval based on the phase reference symbol demodulation data, and the frequency tuning control by the phase error detector 12 and the first frequency error detector. If there is still a frequency error after performing the above, this error can be corrected. This operation will be described below.

【0044】

In this case, since the large frequency error in the carrier interval unit is removed by the frequency tuning control based on the output of the first frequency error detector, the frequency error to be detected is based on the output of the phase error detector 12 described above. This is an erroneous pull-in equivalent to N π / 2 generated by frequency control.

【0045】

At this time, the nth data output of the phase reference symbol includes a demodulation component from a relatively large adjacent carrier as shown in FIG. Therefore, by detecting the magnitude and phase of the component leaking from the adjacent carriers, it is possible to know the positive / negative and magnitude of the frequency shift due to erroneous pulling.

【0046】<u style="single">Figure 4</u>Is a block diagram showing the configuration of the second frequency error detector. In the figure, 201 is the first phase correction means, 202 is the second phase correction means, 203 is the phase reference symbol data holding means, 204 is the first IDFT means, 205 is the second IDFT means, and 206 is the frequency error. It is a judgment means.

【0047】

Similar to the first frequency error detector, the first phase correction means 201 multiplies the array of phase reference symbol demodulation data and the array of complex conjugate values of the default value Zk of phase reference symbol modulation for each element. Here, the phase correction process is performed by shifting the array elements of the phase reference symbol data by 1 in the positive direction with respect to the relationship in which the correlation of each array detected by the first frequency error detector is maximized.

【0048】

The first IDFT means 204 performs IDFT processing on the phase-corrected output in this way. At this time, if the number of processed data is sufficiently large, the first IDFT means 204<u style="single">of</u>The output is a component that correlates with the array of phase reference symbol data shifted by one element, that is,<u style="single">Figure 3</u>Obtain the output (indicated as n-1 in the figure) by the adjacent carrier shown in.

【0049】

Next, the second phase correction means 202 shifts the array elements of the phase reference symbol data in the negative direction by 1 with respect to the array of the phase reference symbol demodulation data, and performs the phase correction process. Thus, the second IDFT means 205<u style="single">of</u>The output is a component that correlates with the array of phase reference symbol data shifted by one element, that is,<u style="single">Figure 3</u>The output by the adjacent carrier shown in (indicated as n + 1 in the figure) is obtained.

【0050】

The frequency error determining means 206 receives the outputs of the first IDFT means 204 and the second IDFT means 205 and determines the presence / absence of a frequency error and its positive / negative, for example.<u style="single">Figure 3</u>First IDFT means 204 as shown in<u style="single">of</u>Output (n-1) is the first frequency error detector<u style="single">19</u>It has the same sign as the maximum peak value (corresponding to n in the figure) obtained in the second IDFT means 205.<u style="single">of</u>Output (n + 1) is the first frequency error detector<u style="single">19</u>If the sign is opposite to the maximum peak value (corresponding to n in the figure) obtained in 1 and these amplitudes are larger than the predetermined region values, it is determined that there is a positive error in the frequency of each carrier.

【0051】

Further, when the sign relationship between the first and second IDFT means outputs and the peak maximum value obtained by the first frequency error detector is opposite to the above and these amplitudes are larger than the predetermined region values, the frequency of each carrier. It is judged that there is an error in the negative direction. This determination result is given to the control device 21. Based on this, the control device 21 performs frequency control for the local oscillator 4.

【0052】

Next, the operation of the control device 21 will be described. FIG. 5 is an operation flowchart of the control device according to the first embodiment of the present invention. When it becomes necessary to newly perform synchronization and AFC processing due to power-on of the receiver, change of the receiving station, etc., the control device 21 first performs frame synchronization processing 301 based on the output of the synchronization detector 8. When the synchronization detector 8 detects the timing of the null symbol, the control device 21 activates a timer having a substantially frame cycle. This frame synchronization processing controls the timing of each symbol to be demodulated by the DFT processing means 10, and from the time when this synchronization is established, each symbol data is correctly demodulated and the differential demodulation output is also based on QPSK. The correct data will appear.

【0053】

The control device 21 waits for the establishment of this synchronization and performs phase error detection / frequency control 302. This phase error detection is performed by the phase error detector 12, and can be performed for all differential demodulation data except when a null symbol is included. The control device 21 detects and controls the frequency error of the demodulated data at appropriate intervals, thereby performing fine control while appropriately suppressing the load of these processes. When the frequency error becomes sufficiently small due to the frequency control by the phase error detection, the control device 21 determines the completion of this control 303.<u style="single">Do.</u>【0054】

The control device 21 performs the first frequency error detection 307 as the next step, but since this processing is performed based on the second phase reference symbol demodulation data from the beginning of the frame as explained above, the frame period is first determined by 304. Confirm that has passed, and then confirm that frame synchronization is maintained in process 305 and determination 306. If the frame period has not elapsed, the process returns to the phase error detection and control 302, and if the frame synchronization is not confirmed, the process returns to the frame synchronization process 301.

【0055】

When a frequency error is detected by the first frequency error detection 307<u style="single">(308: Yes)</u>, Control device 21 is a local oscillator<u style="single">4</u>Frequency control according to the error<u style="single">309</u>I do. If no frequency error is detected<u style="single">(308: No)</u>The second frequency error detection described earlier<u style="single">310</u>I do. At this point, as assumed in the above description, a large frequency error exceeding 1/2 of the carrier interval is excluded, so that erroneous pull-in by phase error detection / control can be correctly detected. This process<u style="single">310</u>Judging the result of<u style="single">311</u>If there is an erroneous pull-in, process<u style="single">312</u>Compensates for frequency deviation due to erroneous pull-in.

【0056】

At this time, in the first and second frequency error detection / control operations, the frequency error is not accurately corrected, but the phase error detection / control 302 is repeatedly performed even after these processes are performed, so that the accuracy is high. Good frequency tuning is ensured.

【0057】

Embodiment 2. FIG. 5 is a block diagram showing a configuration of a digital broadcast receiver according to a second embodiment of the present invention. In the figure, 1 is an antenna, 2 is an RF amplifier, 3 is a frequency converter, 4 is a local oscillator, 5 is an intermediate frequency amplifier, 6 is an orthogonal demodulator, 7 is an A / D converter, 8 is a synchronous signal detector, and 10 Is a DFT means, 11 is a differential demodulator, 12 is a phase error detector, 14 is a bitabi decoder, 15 is an MPEG audio decoder, 16 is a D / A converter, 17 is an audio amplifier, 18 is a speaker, and 19 is the first. 1 is a frequency error detector, 30 is a second frequency error detector, 21 is a controller, and 22 is a time error detector. Here, 1 to 8, 10 to 12 and 14 to 30 are the same as those in the first embodiment, and substantially the same operation is performed.

【0058】

FIG. 7 is a block diagram showing the configuration of the time error detector 22. In the figure, 401 is a phase correction means and 402 is.<u style="single">Phase reference symbol data holding means, 403</u>IDFT means,<u style="single">404</u>Is a peak detector. As is clear from the figure, this configuration<u style="single">Excluding the maximum value search means</u>Same as the first frequency error detector.

【0059】

Phase correction means<u style="single">401</u>Is a means for retaining the phase reference symbol data for the phase reference symbol demodulation data represented by the equation (4).<u style="single">402</u>Multiply the conjugate value Zk * of the default value Zk stored in. As a result, if there is no frequency error, the phase of a'm in Eq. (4) is corrected to virtually all zeros. IDFT means<u style="single">403</u>Performs IDFT processing on this phase-corrected output, and this processing can be expressed as in Eq. (5).

【0060】

From this, it can be seen that the phase of the terms to be summed at n = Δ becomes a constant value. Therefore, it is clear that the output of the IDFT means 403 has a large peak at the time point of n = Δ, and no obvious peak occurs at other time points where the phase rotation remains in the summation term. In this case, the peak detector 404 detects the time point n when a clear peak occurs in the output of the IDFT means 403.

【0061】

The time point n at which this obvious peak occurs represents the error in the data input timing of the DFT processing means with respect to the phase reference symbol as described above. Therefore, in order to synchronize the data demodulation timing, the control device 21 does not rely only on the detection signal of the null symbol, but performs the synchronization process with reference to the output of the time error detection signal 22.

【0062】

Next, the operation of the control device 21 will be described. FIG. 8 is an operation flowchart of the control device according to the second embodiment of the present invention. When it becomes necessary to newly perform synchronization and AFC processing due to power-on of the receiver, change of the receiving station, etc., the control device 21 first performs frame synchronization processing 501 based on the null symbol detection signal. When the timing of the null symbol is detected by this process, the control device 21 activates a timer having a substantially frame cycle. This frame synchronization processing controls the timing of each symbol to be demodulated by the DFT processing means, and from the time when this synchronization is established, the demodulation of each symbol data is performed correctly, and the differential demodulation output is also correct based on QPSK. Data will appear.

【0063】

The control device 21 waits for the establishment of this synchronization and performs phase error detection and frequency control 502. This phase error detection can be performed on all differential demodulated data except when it contains a null symbol as described above. The control device 21 detects and controls the frequency error of the demodulated data at appropriate intervals, thereby performing fine control while appropriately suppressing the load of these processes. The control device 21 detects that the frequency error has become sufficiently small by the frequency control by the phase error detection, and determines the completion of the control 503.

【0064】

The control device 21 performs the first frequency error detection 507 as the next step, but since this processing is performed based on the second phase reference symbol demodulation data from the beginning of the frame as explained above, the frame period is first determined by the determination 504. Confirm that has passed, and then confirm that frame synchronization is maintained in process 505 and determination 506. If the frame period has not elapsed, the process returns to the phase error detection and control 502, and if the frame synchronization is not confirmed, the process returns to the frame synchronization process 501.

【0065】

When a frequency error is detected by the first frequency error detection 507<u style="single">(508: Yes)</u>, Control device 21 is a local oscillator<u style="single">4</u>Frequency control according to the error<u style="single">509</u>I do. If no frequency error is detected<u style="single">(508: No)</u>The second frequency error detection 510 described above is performed in the above. At this point, as assumed in the above description, a large frequency error exceeding 1/2 of the carrier interval is excluded, so that erroneous pull-in by phase error detection / control can be correctly detected. If the result of this process 510 is determined by the determination 511 and there is an erroneous pull-in, the process 512 compensates for the frequency shift due to the erroneous pull-in.<u style="single">Further, the data input timing error detection 513 is performed, and it is confirmed by the determination 514 that there is no timing error, and if there is a timing error (514: Yes), the control device 21 performs the data demodulation timing synchronization 515. If there is no timing error (514: No), the process returns to the frame synchronization process 501.</u>【0066】

At this time, in the first and second frequency error detection / control operations, the frequency error is not accurately corrected, but the phase error detection / control 502 is repeatedly performed even after these processes are performed, so that the accuracy is high. Good frequency tuning is ensured.

【0067】

By the way, in the above description, the phase error detector 12, the first frequency error detector 19, the second frequency error detector 20, the control device 21, the time error detector 22, etc. have been described as independent devices. Can each share a single device.

【0068】

In particular, the first frequency error detector, the second frequency error detector, and the time error detector have many common parts in common, and there is an effect that the device can be simplified and the price can be reduced by sharing.

【0069】

Further, the phase error detector 12, the first frequency error detector 19, the second frequency error detector 20, the control device 21, and the time error detector 22 are configured as program processing using a digital signal processor (DSP) or the like. It is also possible to do.

【0070】

[Effect of the invention]

Since the present invention is configured as described above, it has the following effects.

【0071】

Even if an erroneous pull-in occurs in the frequency control process based on the phase error detection, the erroneous pull-in can be canceled based on the output of the second frequency error detector and the lead-in to the correct tuning point can be performed. In addition, even when the frequency error of the signal is large and exceeds each carrier interval of OFDM, the frequency error can be detected and corrected by performing frequency tuning control based on the output of the first frequency error detector. It is possible to perform tuning processing with high pull-in frequency accuracy corresponding to a wide range of frequency errors.

【0072】

Further, when the control device establishes the timing synchronization based on the synchronization detector output, the frequency tuning control is performed based on the output of the phase error detector and the output of the first frequency error detector, and this frequency tuning control is performed. Is completed, each detection of the phase error detector, the first frequency error detector, and the second frequency error detector is performed to operate to perform frequency tuning control based on the output of the second frequency error detector. The operation is performed properly and the frequency tuning process is surely performed.

【0073】

Further, even when a reflected wave or noise is superimposed on the received signal, accurate timing synchronization processing can be performed by performing synchronization processing based on the output of the time error detector.

【0074】

Further, when the control device establishes the timing synchronization by the synchronization means, the frequency tuning control is performed based on the output of the phase error detector and the output of the first frequency error detector, and when the frequency tuning control is completed, the first frequency tuning control is performed. Phase error detector, first frequency error detector, second frequency to operate to perform frequency tuning control based on the output of the frequency error detector 2 and synchronization processing of the demodulation timing based on the output of the time error detector. Each detection operation of the error detector and the time error detector is appropriately performed, and the timing synchronization processing is surely performed.

【0075】

Further, since the first frequency error detector is composed of the phase correction means, the phase reference symbol data holding means, the IDFT means, the peak detector and the maximum value search means, the frequency error can be detected with high accuracy.

【0076】

Also, a second frequency error detector<u style="single">, The first</u>Phase correction means,<u style="single">Second phase correction means,</u>Phase reference symbol data holding means,<u style="single">First</u>IDFT means,<u style="single">Second IDFT means,</u>Since it is composed of frequency error determining means, frequency error can be detected with high accuracy.

【0077】

Further, the time error detector is used as a phase correction means, a phase reference symbol data holding means, an IDFT means,<u style="single">And peak detector</u>Since it is composed of, the time error can be detected with high accuracy.

[Simple explanation of drawings]

FIG. 1 is a block diagram showing a configuration of a digital broadcast receiver according to the first embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of a first frequency error detector.

[Fig. 3]<u style="single">It is a figure which shows the demodulated output by DFT processing when there is a frequency shift in an OFDM received signal.</u>[Fig. 4]<u style="single">It is a block diagram which shows the structure of the 2nd frequency error detector.</u>FIG. 5 is an operation flowchart of a control device according to the first embodiment of the present invention.

FIG. 6 is a block diagram showing a configuration of a digital broadcast receiver according to a second embodiment of the present invention.

FIG. 7 is a block diagram showing a configuration of a time error detector.

FIG. 8 is an operation flowchart of a control device according to a second embodiment of the present invention.

FIG. 9 is a block diagram showing a configuration of a conventional broadcast receiver.

FIG. 10 is a configuration diagram of a DAB data transmission frame.