Method for forming wiring of semiconductor device

Description: TECHNICAL FIELD [Detailed description of the invention]

【0001】

[Industrial application field]

The present invention relates to a wiring forming method for a semiconductor device based on a physical vapor deposition method (PVD method) and a so-called high temperature reflow method.

【0002】

[Conventional technology]

With the increasing integration of semiconductor devices, dimensional rules are becoming finer. In the wiring formation process of semiconductor devices, a technique for stably forming narrow and deep (high aspect ratio) contact holes, via holes, and through holes (hereinafter collectively referred to as connection holes) has become extremely important. There is. The connection hole is formed, for example, by providing an opening in an insulating layer formed above the conductor layer and embedding a metal wiring material in the opening. When a metal wiring material made of an aluminum alloy is formed on an insulating layer including the inside of an opening by a sputtering method, a large amount of sputtered particles of the aluminum alloy do not enter the shadow of the side wall of the opening, so-called shadow. The ing effect is produced. As a result, the coverage of the aluminum-based alloy in the opening is deteriorated, and there is a problem that disconnection failure is likely to occur in the vicinity of the bottom of the opening where the accumulation of the aluminum-based alloy is small. Therefore, there is a demand for a process technique for reliably embedding the inside of the opening with a metal wiring material.

【0003】

One of such process techniques is a high-temperature aluminum reflow method in which an aluminum alloy is formed on an insulating layer by a sputtering method and then heat-treated to pour the aluminum alloy into the opening. In the embedding of openings by the high-temperature aluminum reflow method, the aluminum alloy is heated at a recrystallization temperature or higher (usually about 350 ° C or higher, although it depends on the composition of the aluminum alloy) and a melting point or lower. As a result, the aluminum-based alloy formed on the insulating layer is in a fluidized state and flows into the opening, and the opening is embedded with the aluminum-based alloy. To prevent the surface of the aluminum alloy from being oxidized, it is better to perform the film formation and reflow treatment of the aluminum alloy in the same film forming apparatus without exposing the aluminum alloy to the atmosphere so that the aluminum alloy flows into the opening. Becomes good.

【0004】

Further, in the high temperature aluminum reflow method, a high pressure may be applied in an inert gas during the reflow treatment for the purpose of improving the embedding property of the aluminum alloy in the opening and lowering the reflow temperature. Hereinafter, such a method is referred to as a high pressure reflow method. Also in this case, if the aluminum alloy is formed and reflowed in the same film forming apparatus without exposing the aluminum alloy to the atmosphere, the flow of the aluminum alloy into the opening is improved.

【0005】

(A) and (A) of FIG. 6 are schematic partial cross-sectional views of a semiconductor substrate and the like when the aluminum alloy is formed and reflowed in the same film forming apparatus without exposing the aluminum alloy to the atmosphere. Shown in B). Further, FIG. 7 shows a schematic partial cross-sectional view of a semiconductor substrate or the like when the aluminum alloy is formed into a film, the aluminum alloy is exposed to the atmosphere, and then the aluminum alloy is reflowed. In the figure, reference number 130 is a semiconductor substrate, reference number 131 is an element separation region, reference number 133 is a gate electrode, reference number 135 is a source / drain region, and reference number 140 is an insulating layer formed on the semiconductor substrate 130. , Reference number 136 is an opening formed in the insulating layer 140, reference number 141 is a so-called adhesion layer, and reference number 142 is an aluminum alloy layer. FIG. 6A is a schematic partial cross-sectional view after the aluminum alloy layer 142 is formed on the insulating layer 140. Further, (B) and FIG. 7 of FIG. 6 are schematic partial cross-sectional views after the reflow processing.

【0006】

[Problems to be Solved by the Invention]

As shown in FIG. 7, when the aluminum alloy is formed into a film, the aluminum alloy is exposed to the atmosphere, and then the reflow treatment is performed, the aluminum alloy does not sufficiently flow into the opening 136 and reaches the bottom of the opening 136. Voids are likely to occur. Therefore, it is necessary to perform the film formation and reflow treatment of the aluminum alloy using the same film forming apparatus. However, in order to perform such processing in the same film forming apparatus, the film forming chamber and the reflow (or high pressure reflow) processing chamber must be made into a cluster apparatus. Such a film forming apparatus is expensive and leads to an increase in the manufacturing cost of the semiconductor apparatus.

【0007】

Further, when the reflow treatment is performed by another device after the film formation of the aluminum alloy, a cleaning step is required to remove the oxide film formed on the surface of the aluminum alloy layer 142 by sputter etching or the like immediately before the reflow treatment. It becomes. However, when the cleaning process and the reflow process are performed in the same device, the device becomes expensive, and as a result, the manufacturing cost of the semiconductor device increases.

【0008】

Therefore, an object of the present invention is that when a metal wiring material such as an aluminum alloy is deposited by a physical vapor deposition method and then a reflow treatment is performed, it is not necessary to use the same film forming apparatus. An object of the present invention is to provide a wiring forming method for a semiconductor device, which does not require surface treatment of a metal wiring material before reflow processing.

【0009】

[Means for solving problems]

The method for forming a wiring of a semiconductor component according to the present invention for achieving the above object is (a) a step of forming a metal wiring material layer made of Al-0.5% Cu on a substrate by a physical vapor phase growth method. , (B) A step of forming an antioxidant film made of silicon amorphous having a thickness of about 0.4% with respect to the layer thickness of the metal wiring material layer on the metal wiring material layer, and (c) the metal wiring material. A step of reflowing the layer at a temperature of 440 ° C or higher and 577 ° C or lower to completely dissolve the components constituting the antioxidant film in the metal wiring material, and (d) patterning the metal wiring material layer. It is characterized by consisting of a process of forming wiring.

【0010】

【0011】

Examples of the substrate in the wiring forming method of the semiconductor device of the present invention include an insulating layer formed on the semiconductor substrate. The insulating layer may be formed with connection holes such as contact holes, beer holes, and through holes that are electrically connected to the wiring.

【0012】

Further, in the wiring forming method of forming a wiring composed of a metal wiring material layer and a connection hole in which a metal wiring material constituting the metal wiring material layer is embedded, (a) an insulating layer is provided on a substrate provided with a conductor layer. The step of forming and forming an opening in the insulating layer above the conductor layer, and (b) forming a metal wiring material layer composed of Al-0.5% Cu on the insulating layer by a physical vapor phase growth method. Steps, (c) a step of forming an antioxidant film made of silicon amorphous having a thickness of about 0.4% with respect to the layer thickness of the metal wiring material layer on the metal wiring material layer, and (d) the metal. The wiring material layer is reflowed at a temperature of 440 ° C or more and 577 ° C or less to completely dissolve the components constituting the antioxidant film in the metal wiring material, and the opening is embedded with the metal wiring material. It is characterized by comprising a step of forming a connection hole and (e) a step of patterning the metal wiring material layer to form a wiring.

【0013】

Examples of the conductor layer include a source / drain region formed on a semiconductor substrate corresponding to a substrate, or a wiring layer provided on an insulating layer corresponding to a substrate formed on a semiconductor substrate.

【0014】

In the wiring forming method of the semiconductor device, after the metal wiring material layer is formed by the physical vapor phase growth method, a void remains at the bottom of the opening and the metal wiring material layer is formed above the opening. It is closed, and in the step (d), it is possible to include an embodiment in which the metal wiring material layer is reflowed under high pressure.

【0015】

【0016】

In the wiring forming method of the semiconductor device of the present invention, the antioxidant film is made of a material that does not easily form a strong oxide film at room temperature, and the thickness of the antioxidant film is antioxidative when the metal wiring material layer is reflowed. It is desirable that the film thickness corresponds to an amount equal to or less than the limit amount at which the components constituting the film are completely dissolved in the metal wiring material. Here, the material that is difficult to form a strong oxide film at room temperature is that when the metal wiring material layer is reflowed, the components constituting the antioxidant film are completely dissolved in the metal wiring material, and the metal. It means that the material must not have an antioxidant film or an oxide film of the antioxidant film remaining on the wiring material layer.

【0017】

The antioxidant film must be composed of a material that is completely dissolved in the metal wiring material at the reflow temperature, which is the temperature of the metal wiring material layer when the metal wiring material layer is reflowed, and is not easily oxidized. Ag, Cu , Si and Ge, preferably consisting of at least one material selected from the group. Examples of the metal wiring material include pure aluminum, various aluminum alloys such as Al-Cu, Al-Si, Al-Si-Cu, Al-Ge, and Al-Si-Ge, and copper.

【0018】

In the present invention, the metal wiring material layer is reflowed to completely dissolve the components constituting the antioxidant film in the metal wiring material. That is, for example, a primary solid solution is formed in which a metal wiring material is used as a solvent (atom) and a component constituting an antioxidant film is used as a medium (atom). The reflow temperature depends on the composition of the metal wiring material and the composition of the antioxidant film, but is equal to or higher than the temperature at which the components constituting the antioxidant film are completely dissolved in the metal wiring material (above the temperature at which the primary solid solution is formed). Below the eutectic temperature in the system of the components that make up the metal wiring material and the components that make up the antioxidant film (for example, if the metal wiring material is an aluminum alloy and the antioxidant component is Si, it will partially melt. The crystal temperature is 577 ° C or less).

【0019】

As the physical vapor deposition method, various sputtering methods such as vacuum deposition, magnetron sputtering method, DC sputtering method, RF sputtering method, ECR sputtering method, bias sputtering method in which a bias is applied to a substrate, or a combination thereof can be used. Can be mentioned.

【0020】

[Action]

In the present invention, during the reflow treatment of the metal wiring material layer, the components constituting the antioxidant film are completely dissolved in the metal wiring material. After the reflow treatment of the metal wiring material layer, the antioxidant film does not remain on the surface of the metal wiring material layer. Therefore, the antioxidant film does not have any adverse effect on the subsequent manufacturing process of the semiconductor device or the semiconductor device finally manufactured. Moreover, since the antioxidant film is formed on the surface of the metal wiring material layer before the reflow treatment, it is possible to prevent the surface of the metal wiring material layer from being oxidized even if the semiconductor device is exposed to the atmosphere. Therefore, it is not necessary to use a film forming apparatus in which the film forming chamber and the reflow (or high-pressure reflow) processing chamber are clustered, and the oxide film formed on the surface of the metal wiring material layer is removed before the reflow processing. You don't even have to.

【0021】

If, as shown in FIG. 8, no voids remain at the bottom of the opening and the upper part of the opening is not blocked by the metal wiring material layer, the surface of the metal wiring material layer in the opening is prevented from oxidizing. It becomes difficult to form a film. However, in the wiring forming method for the semiconductor device according to the second aspect of the present invention, after the metal wiring material layer is formed by the physical vapor phase growth method, voids remain at the bottom of the opening and the opening is opened. If the metal wiring material layer is formed so that the upper part of the portion is closed by the metal wiring material layer, an antioxidant film can be surely formed on the surface of the metal wiring material layer. When the metal wiring material layer is formed in such a state, it may be difficult to embed the void formed at the bottom of the opening with the metal wiring material in the normal pressure reflow treatment. In such a case, the metal wiring material layer may be reflowed under high pressure to securely embed the void formed at the bottom of the opening with the metal wiring material.

【0022】

[Example]

Hereinafter, the present invention will be described based on examples with reference to the drawings.

【0023】

(Example 1) Example 1 relates to a wiring forming method for a semiconductor device according to the first aspect of the present invention. In Example 1, the physical vapor deposition method is a DC sputtering method. The metal wiring material is made of Al-0.5% Cu and the antioxidant film is made of amorphous silicon. In Example 1, the substrate comprises an insulating layer 20 formed on the semiconductor substrate 10. Hereinafter, the wiring forming method of the semiconductor device of the first embodiment will be described with reference to FIGS. 1 and 2.

【0024】

The semiconductor substrate 10 has an element separation region 11 having a LOCOS structure or a trench structure, SiO.₂Gate oxide film 12 consisting of gate oxide film 12, gate electrode 13 made of polysilicon, polyside or Silicide, formed on the side wall of the gate electrode and SiO₂A gateside wall 14 and a source / drain region 15 composed of the above are preformed by a known method. Further, the insulating layer 20 is, for example, SiO.₂It is composed of and can be formed by the CVD method. After forming the insulating layer 20 (sometimes referred to as the substrate 20), the insulating layer 20 above the source / drain region 15 is provided with an opening 16 using photolithography and etching techniques.

【0025】

Then, a metal plug 18 is embedded in the opening 16 to form a connection hole 19. In forming the connection hole 19, first, a Ti layer and a TiN layer are sequentially formed on the insulating layer 20 including the inside of the opening 16 by, for example, a sputtering method. The Ti layer is formed for the purpose of reducing the contact resistance between the source / drain region 15 and the metal plug. On the other hand, the TiN layer has a function as a barrier layer for preventing the source / drain region 15 from being damaged by the metal wiring material when the inside of the opening 16 is embedded with the metal wiring material constituting the metal plug. The film forming conditions for the Ti layer and the TiN layer may be the same as the conditions described later. After the formation of the TiN layer, in order to improve the barrier property of the TiN layer, RTA (Rapid Thermal) of about 650 ° C x 60 seconds in a nitrogen gas atmosphere or a mixed gas atmosphere of nitrogen gas and oxygen gas. Annealing) processing is preferable. The Ti layer and TiN layer formed in such a process are collectively referred to as a barrier metal layer 17 below. After that, a metal wiring material made of tungsten is embedded in the opening 16 by the so-called blanket tungsten CVD method to form a connection hole 19. That is, a metal wiring material made of tungsten was deposited on the insulating layer 20 including the inside of the opening 16 by the CVD method. after of tungsten and the barrier metal layer 17 are etched back on the insulating layer 20. The metal wiring material and the barrier metal layer of the above are removed, leaving a metal plug 18 and a barrier metal layer 17 made of tungsten in the opening 16. In this way, the connection hole 19 is formed (see (A) in FIG. 1). Due to etch back, the top surface of the connection hole 19 is usually located below the surface of the insulating layer 20. The conditions of the blanket tungsten CVD method and the conditions of etchback are illustrated below. Blanket Tungsten CVD Conditions Gas used: WF₆/ H₂/ Ar = 80/500/2800sccm Pressure: 1.1 × 10⁵Pa Film formation temperature: 450 ° C Etchback conditions Gas used: SF₆/ Ar = 110 / 90sccm Pressure: 35Pa RF power: 275kW [0026]

It should be noted that such a configuration is not an essential configuration for the wiring forming method of the semiconductor device according to the first aspect of the present invention. The connection hole 19 may not be formed in the insulating layer 20, or a lower layer wiring may be formed at the bottom of the connection hole 19. Such lower layer wiring may be formed on the lower layer insulating layer, or may be embedded in the lower layer insulating layer in some cases.

【0027】

Hereinafter, a wiring forming method for a semiconductor device according to the first aspect of the present invention will be described.

【0028】

[Step-100] First, a metal wiring material layer 22 made of a metal wiring material is formed on a substrate 20 made of an insulating layer by a physical vapor deposition method (specifically, a DC sputtering method). In order to improve the wettability and adhesion of the metal wiring material made of Al-0.5% Cu to the substrate 20, further, even if the metal wiring material layer is broken due to electromigration, stress migration, etc., the entire wiring should not be broken. It is desirable to form a base layer 21 made of Ti on the surface of the substrate 20 in advance by a sputtering method in order to give the wiring a redundant effect. Next, a metal wiring material layer 22 composed of Al-0.5% Cu is formed on the base layer 21 by a DC sputtering method (see (B) in FIG. 1). The film forming conditions of the base layer 21 and the metal wiring material layer 22 are illustrated below. Film formation conditions for the base layer 21 Process gas: Ar = 100sccm Pressure: 0.4Pa DC power: 5kW Film formation temperature: 150 ° C Film formation conditions for the metal wiring material layer 22 Target: Al-0.5% Cu Process gas: Ar = 100sccm Pressure: 0.4Pa DC power: 10kW Film formation temperature: 150 C Film thickness: 0.5 μm [0029]

[Step-110] Next, an antioxidant film 23 is formed on the metal wiring material layer 22 in the same DC sputtering apparatus without exposing the metal wiring material layer 22 to the atmosphere (see (A) in FIG. 2). ). In Example 1, the antioxidant film 23 is made of amorphous silicon. In this case, the thickness of the amorphous silicon is equal to or less than the limit amount at which the components constituting the antioxidant film 23 are completely dissolved in the metal wiring material at the reflow temperature during the subsequent reflow treatment of the metal wiring material layer 22. It is desirable to use the amount. For example, when the reflow temperature is 450 ° C, the thickness of the antioxidant film 23 is about 0.5% (for example, 2.5 nm) or less of the thickness (for example, 0.5 μm) of the metal wiring material layer 22 made of Al-0.5% Cu. Is desirable. Here, the value of about 0.5% is the limit amount at which the components constituting the antioxidant film 23 are completely dissolved in the metal wiring material when the metal wiring material layer 22 is reflowed. Even with the antioxidant film 23 having such a film thickness, it is possible to effectively prevent the surface of the metal wiring material layer 22 from being oxidized. The film formation conditions of the antioxidant film 23 by the RF sputtering method are illustrated below. The thickness of the antioxidant film 23 was set to 2 nm. Process gas: Ar = 100sccm Pressure: 0.4Pa RF power: 3kW Film formation temperature: 150 ° C Film thickness: 2nm [0030]

[Step-120] After that, the semiconductor substrate is taken out from the sputtering device, the semiconductor device (actually, an intermediate of the semiconductor device) is exposed to the atmosphere (exposure), and another device dedicated to reflow processing (for example, a furnace). ) Reflows the metal wiring material layer 22 to completely dissolve the components constituting the antioxidant film 23 in the metal wiring material (see (B) in FIG. 2). That is, a primary solid solution is formed in which Al is a solvent atom and Si is a solute atom. The metal wiring material layer after the components constituting the antioxidant film 23 are completely dissolved in the metal wiring material is represented by reference numeral 22A. In this case, it is not necessary to clean the surface of the metal wiring material layer 22 by sputtering etching or the like in advance before the reflow treatment. The conditions for reflow processing are illustrated below. Reflow temperature: 450 ° C Reflow time: 2 minutes Reflow atmosphere: Argon gas Atmospheric pressure: Atmospheric pressure or less [0031]

A gas heating method on the back surface of the substrate can also be adopted as the reflow processing method. The substrate back surface gas heating method is a substrate by heating a heater block arranged on the back surface of a semiconductor substrate to a predetermined temperature (heating temperature) and introducing a process gas composed of argon between the heater block and the back surface of the semiconductor substrate. It is a method of heating. As the heating method, a lamp heating method or the like can be used in addition to this method.

【0032】

As shown in the Al-Si two-element phase equilibrium diagram of Fig. 5 (A), the reflow temperature is about 440 ° C or higher, in which 0.4% of silicon is completely dissolved in Al constituting the metal wiring material. The eutectic temperature should be below 577 ° C, where the metal wiring material may partially melt. The pressure in the reflow atmosphere is not particularly limited, but it is preferable to perform the reflow treatment in a high-purity inert gas atmosphere so that the metal wiring material layer is not oxidized or nitrided during the reflow treatment.

【0033】

[Step-130] Then, using photolithography technology and etching technology, the metal wiring material layer 22 and the base layer 21 on the insulating layer 20 are patterned to form a wiring layer. The patterning conditions are illustrated below. Gas used: BCl₃/ Cl₂= 60/90 sccm Pressure: 2Pa RF power: 1.2kW [0034]

(Example 2) Example 2 relates to a method for forming wiring of a semiconductor device according to a second aspect of the present invention. In the second embodiment, the substrate is made of a semiconductor substrate, and the source / drain region corresponds to the conductor layer. The physical vapor deposition method was the DC sputtering method. The metal wiring material is made of Al-0.5% Cu and the antioxidant film is made of amorphous silicon. Hereinafter, the wiring forming method of the semiconductor device of the second embodiment will be described with reference to FIGS. 3 and 4.

【0035】

[Step-200] First, based on a known method, an element separation region 31 is formed on a silicon semiconductor substrate which is a substrate 30, and then SiO is formed on the surface of the silicon semiconductor substrate.₂A gate oxide film 32 composed of is formed. Next, the gate electrode 33 made of polysilicon, polyside or VDD is formed by using, for example, a CVD method, a photolithography technique, and an etching technique. After that, ion implantation is performed to form the LDD structure, and then SiO is applied to the entire surface.₂After depositing the membrane, SiO₂Etch back the film and SiO₂A gate side wall 34 composed of the same is formed on the side wall of the gate electrode 33. Next, after ion implantation of impurities, activation annealing treatment is performed to activate the impurities ion-implanted into the substrate 30 to form a source / drain region. In this way, as shown in FIG. 3A, the conductor layer 35 composed of the source / drain region is formed on the substrate 30 made of the silicon semiconductor substrate. In the structure shown in FIG. 3A, the element separation region 31 has a LOCOS structure, but it can also be an element separation region having a so-called trench structure.

【0036】

[Step-210] Next, the insulating layer 40 is formed on the substrate 30 on which the conductor layer 35 is formed. The insulating layer 40 is, for example, SiO.₂It is composed of and can be formed by the CVD method. After that, an opening 36 is provided in the insulating layer 40 above the conductor layer 35 by using a photolithography technique and an etching technique (see (B) in FIG. 3).

【0037】

[Step-220] Next, a Ti layer and a TiN layer are sequentially formed on the insulating layer 40 including the inside of the opening 36 by a sputtering method. The Ti layer is formed for the purpose of reducing the contact resistance between the conductor layer 35 and the metal wiring material formed later. On the other hand, the TiN layer has a function as a barrier layer for preventing the conductor layer 35 from being damaged by the metal wiring material when the inside of the opening 36 is embedded with the metal wiring material. The sputtering conditions for the Ti layer and the TiN layer are illustrated below. After the formation of the TiN layer, in order to improve the barrier property of the TiN layer, RTA treatment of about 650 ° C × 60 seconds can be performed in a nitrogen gas atmosphere or a mixed gas atmosphere of nitrogen gas and oxygen gas. preferable. The Ti layer and TiN layer formed in such a process are collectively referred to as a barrier metal layer 41 below. Ti layer film formation conditions Process gas: Ar = 100sccm Pressure: 0.4Pa DC power: 5kW Film formation temperature: 150 ° C Film thickness: 30nm Film formation conditions for TiN layer Gas: Ar / N₂= 30/80 sccm Pressure: 0.4Pa DC power: 5kW Film formation temperature: 150 ° C Film thickness: 70nm [0038]

[Step-230] Then, on the insulating layer 40 (more specifically, on the barrier metal layer 41 in Example 2), a metal wiring material layer 42 composed of Al-0.5% Cu is physically vaporized. It is formed by the phase growth method (see (C) in Fig. 3). In Example 2, the physical vapor deposition method was a DC sputtering method. Prior to the film formation of the metal wiring material layer 42, a base layer (not shown) made of Ti having a thickness of 20 nm is sputtered on the barrier metal layer 41 in order to improve the wettability of the metal wiring material layer. It is desirable to form in. The film forming conditions of the metal wiring material layer 42 are illustrated below. Film formation conditions for the metal wiring material layer 42 Target: Al-0.5% Cu Process gas: Ar = 100sccm Pressure: 0.4Pa DC power: 20kW Film formation temperature: 300 ° C Film thickness: 0.5 μm [0039]

The shape of the metal wiring material layer 42 made of an aluminum alloy after film formation is preferably a bridge shape as shown in FIG. 3 (C). That is, it is desirable that a void remains at the bottom of the opening 36 and the upper part of the opening 36 is closed by the metal wiring material layer 42. If this shape is not used, that is, if the metal wiring material layer has a shape as shown in FIG. 8, it becomes difficult to form an antioxidant film on the surface of the metal wiring material layer in the opening. Is. In order to form the metal wiring material layer 42 in such a shape, the fluidity of the metal wiring material at the time of film formation may be increased. Therefore, in Example 2, the film formation temperature is set as high as 300 ° C.

【0040】

[Step-240] Next, an antioxidant film 43 is formed on the metal wiring material layer 42 in the same DC sputtering apparatus without exposing the metal wiring material layer 42 to the atmosphere (see (A) in FIG. 4). ). The antioxidant film 43 is made of amorphous silicon having a thickness of 2 nm, as in Example 1. The film forming conditions of the antioxidant film 43 can be the same as in [Step-110] of Example 1.

【0041】

[Step-250] After that, the semiconductor substrate is taken out from the DC sputtering device, the semiconductor device (actually, an intermediate of the semiconductor device) is exposed to the atmosphere, and the metal is used in another device dedicated to reflow processing (for example, a furnace). The wiring material layer 42 is reflowed to completely dissolve the components constituting the antioxidant film 43 in the metal wiring material, and the opening 36 is embedded in the metal wiring material to form the connection hole 39 (FIG. 4). (See (B)). In this case, it is not necessary to clean the surface of the metal wiring material layer 42 by sputtering etching or the like in advance before the reflow treatment. The conditions for the reflow process can be the same as those in [Step-120] of Example 1, for example. The voids at the bottom of the opening 36 are completely embedded with the metal wiring material. The metal wiring material layer after the components constituting the antioxidant film 43 are completely dissolved in the metal wiring material is represented by reference numeral 42A.

【0042】

[Step-260] Then, the metal wiring material layer 42 and the base layer on the insulating layer 40 are patterned using the photolithography technique and the etching technique in the same manner as in [Step-130] of Example 1. Form a wiring layer.

【0043】

【0044】

【0045】

【0046】

【0047】

【0048】

【0049】

Although the present invention has been described above based on preferred examples, the present invention is not limited to these examples. In the embodiment, the wiring is formed on the insulating layers 20 and 40. For example, a groove is formed on the insulating layers 20 and 40, and the base layer, the metal wiring material layer, and the antioxidant are formed on the insulating layer including the inside of the groove. After forming a film and performing a reflow treatment, the metal wiring material layer and the base layer on the insulating layer were removed by an etchback method or a chemical / mechanical polishing method (CMP method) to be embedded in the groove. It can also be a form of wiring structure.

【0050】

In the second embodiment, the conductor layer 35 is a source / drain region, but the conductor layer 35 is provided in the lower wiring layer formed on the lower insulating layer or in the groove formed in the lower insulating layer. It can also be a lower wiring layer.

【0051】

The antioxidant film may be composed of, for example, Ag or Ge in addition to Si. The two-element equilibrium phase diagram of Al-Ag and Al-Ge is shown in FIGS. 5 (C) and 5 (D).

【0052】

In the embodiment, the insulating layers 20 and 40 are made of SiO.₂However, it can also be composed of known insulating materials such as BPSG, PSG, BSG, AsSG, PbSG, SbSG, SOG, SiON or SiN, or those in which these insulating layers are laminated. If necessary, after forming the insulating layer, it is desirable to flatten the insulating layers 20 and 40 by, for example, heat treatment, chemical / mechanical polishing method (CMP method), etchback method, or the like.

【0053】

In the examples, the Ti layer and the TiN layer were formed by the sputtering method, but instead, the film can be formed by using the CVD method. The metal plug 18 is not limited to tungsten, and may be composed of other refractory metal materials or refractory metal compounds such as copper or TiN. The film formation conditions for copper, TiN and Ti by the CVD method are illustrated below. HFA is an abbreviation for hexafluoroacetylacetonate. CVD deposition conditions for copper Gas used: Cu (HFA)₂/ H₂= 10/1000sccm Pressure: 2.6 × 10³Pa Substrate heating temperature: 350 ° C Power: 500W TiN ECR CVD conditions Gas used: TiCl₄/ H₂/ N₂= 20/26 / 8sccm Microwave power 2.8kW Board RF bias: -50W Temperature: 750 ° C Pressure: 0.12Pa ECR CVD conditions for Ti Gas used: TiCl₄/ H₂/ Ar = 15/50/43 sccm Microwave power: 2.0kW Temperature: 500 ° C Pressure: 0.3Pa [0054]

In addition to Ti, the base layer can be composed of a refractory metal having conductivity such as TiN, TiON, TiW, W, or a compound thereof.

【0055】

[Effect of the invention]

In the wiring forming method of the semiconductor device of the present invention, by forming the antioxidant film on the metal wiring material layer, the surface of the metal wiring material layer is oxidized even if the semiconductor device is once exposed to the atmosphere. There is nothing to do. Therefore, the film formation of the metal wiring material layer and the reflow treatment (including high-voltage reflow) can be performed by another device. Further, it is not necessary to perform a surface cleaning treatment of the metal wiring material layer by sputter etching or the like before the reflow treatment. As a result, the cost of the entire wiring forming process can be reduced. That is, it is possible to perform a reflow process including a film formation of a metal wiring material layer and the like and a high-pressure reflow process of the metal wiring material layer by using the conventional film forming apparatus as it is without forming a cluster device. Further, since the reflow processing apparatus or the high-pressure reflow processing apparatus requires only the heat treatment and / or the high-pressure processing portion, it is advantageous in reducing the cost of the apparatus and batch processing. Furthermore, the reflow temperature can be expected to decrease due to the solid solution of the antioxidant film into the metal wiring material, and if the antioxidant film is made of copper, the copper will be solid-solved in the metal wiring material. The reliability of the metal wiring material layer is also improved.

[Simple explanation of drawings]

[Figure 1]

It is a process drawing for demonstrating the wiring formation method of the semiconductor device of Example 1. FIG.

[Figure 2]

Continuing from FIG. 1, it is a process diagram for explaining the wiring forming method of the semiconductor device of the first embodiment.

[Fig. 3]

It is a process drawing for demonstrating the wiring formation method of the semiconductor device of Example 2.

[Fig. 4]

Continuing from FIG. 3, it is a process diagram for explaining the wiring forming method of the semiconductor device of the second embodiment.

[Fig. 5]

It is a two-element system equilibrium state diagram.

[Fig. 6]

It is a figure for demonstrating the conventional high temperature reflow method.

[Fig. 7]

It is a figure for demonstrating the problem in the conventional high temperature reflow method.

[Fig. 8]

It is a figure which shows typically the state of the metal wiring material in the vicinity of the opening after film formation.

[Explanation of symbols]

10,30 Hypokeimenon 11,31 Element separation area 12,32 Gate oxide film 13,33 Gate electrode 14,34 Gateside wall 15, Source / Drain area 16,36 openings 17,41 Barrier metal layer 18 metal plug 19,44 Connection hole 20,40 Insulation layer 21 Underlayer 22,22A,42,42A Metal wiring material layer 23,43 Antioxidant film 35 Conductor layer (source / drain area)