Two-dimensional code reading apparatus
Abstract
This record has no abstract on file.
Term
Term ended
Expired 26 December 2014, 11.7 years ago.
- Priority and filed
- Granted
- Expired
- Today
7 claims: 1 independent, 6 dependent
- 1(57)【特許請求の範囲】 【請求項1】 2進コードで表されるデータをセル化して、2次元のマトリックス上にパターンとして配置し、マトリックス内の、少なくとも2個所の所定位置に、各々中心をあらゆる角度で横切る走査線において同じ周波数成分比が得られるパターンからなる位置決め用シンボルを配置した2次元コードを読み取るための2次元コード読取装置であって、 2次元画像検出手段と、 上記2次元画像検出手段から出力される走査線信号中での、上記周波数成分比の信号の存在を検出する周波数成分比検出回路と、 上記走査線信号を少なくとも一画面記憶する画像データ記憶手段と、 上記周波数成分比検出回路にて該当する信号が存在するとされた場合、該当する走査線信号が含まれる2次元画像中での、上記該当する信号の位置を検出する位置検出手段と、 上記位置検出手段によって検出された上記該当する信号の画面上の位置を記憶するシンボル位置記憶手段と、 上記シンボル位置記憶手段に記憶されている位置に基づいて、2次元コードの配置を決定するコード位置決定手段と、 上記コード位置決定手段にて決定された2次元コードの配置に基づいて、2次元コードの内容を読み取るコード読取手段と、 を備えたことを特徴とする2次元コード読取装置。
- 2【請求項2】 上記周波数成分比検出回路が、更に、上記走査線信号中での、上記周波数成分比の信号および隣接するマージン領域の信号の存在を検出する請求項1記載の2次元コード読取装置。
- 3【請求項3】 上記周波数成分比検出回路が、更に、上記周波数成分比の信号に対する上記マージン領域の信号の隣接方向を検出する請求項1または請求項2記載の2次元コード読取装置。
- 4【請求項4】 更に、 上記2次元画像検出手段からの走査線信号を2値化して上記周波数成分比検出回路に送信する2値化手段と、 上記2値化された走査線信号の状態に応じて、上記2値化手段による2値化の閾値を調節する2値化調節手段と、 を備えた請求項1~請求項3のいずれか記載の2次元コード読取装置。
- 5【請求項5】 上記2値化調節手段が、上記2次元画像検出手段にて得られた前回以前の2次元画像での上記2値化手段による2値化状態に応じて、今回の2次元画像での上記2値化手段による2値化の閾値を調節する請求項4記載の2次元コード読取装置。
- 6【請求項6】 更に、上記周波数成分比検出回路にて上記周波数成分比の信号の存在が検出されなかった場合に、2次元コードは存在しないとして、他の手段による処理を禁止する処理禁止手段を備えた請求項1~請求項5のいずれか記載の2次元コード読取装置。
- 7【請求項7】 更に、上記周波数成分比検出回路にて上記周波数成分比の信号の存在が連続して所定回数検出され、その後、所定時間の間、上記信号の存在が検出されなかった場合に、上記検出により存在を判断した2次元コードは、上記2次元画像検出手段の視野から外れたとして、これを判断し、次に検出される上記周波数成分比の信号の存在が、上記2次元コードと異なる次の2次元コードの存在であることを判断する2次元コード変更判断手段を備えた請求項1~請求項6のいずれか記載の2次元コード読取装置。
Independent claims7
198 paragraphs, as filed
Description: TECHNICAL FIELD [Detailed description of the invention]
【0001】
[Industrial application field]
The present invention reads an optically readable code for inputting information into a computer or the like, particularly a two-dimensional code arranged as a pattern on a two-dimensional matrix by converting data represented by a binary code into cells. 2D code reader for.
【0002】
[Conventional technology]
Generally, in reading a two-dimensional code, an image is taken from a two-dimensional image detecting means such as a TV camera, and first, the position of the target two-dimensional code is detected and only the code is cut out. Next, the size of the code is obtained from the cut out two-dimensional code, the coordinates of the data cell are obtained, "0" and "1" (black, white) of the data cell are discriminated, and the data is converted into character information.
【0003】
Unlike a barcode, such a two-dimensional code can have a relatively large amount of information in a small area.
【0004】
[Problems to be Solved by the Invention]
The conventional two-dimensional code is considered so that it can be read with high accuracy by using coding theory such as error detection / correction code. However, the current situation is that the two-dimensional code reading process relies on software processing by a high-performance CPU as described below, and there is a problem in terms of high-speed reading.
【0005】
This is because the two-dimensional code itself does not have a code configuration suitable for high-speed reading, nor is it a code configuration suitable for processing the rotation of the two-dimensional code. For example, in Japanese Patent Application Laid-Open No. 2-12579 as a conventional example, the two sides of the matrix are only the dark (black) side, and the other two sides are dotted lines in which the bright (white) part and the dark part alternate. The sides are used, and these four sides are detected from the characteristics to determine the direction of the matrix. However, this matrix must scan the resulting image from all directions until the features of the four-sided pattern appear to determine its position and rotation angle.
【0006】
As another conventional example, Japanese Patent Application Laid-Open No. 3-38791 provides positioning boundaries similar to those of Japanese Patent Application Laid-Open No. 2-12579 in two directions, but scans until the characteristics of the pattern of the positioning boundaries appear. , The point that the position and the rotation angle must be determined is the same as that of Japanese Patent Application Laid-Open No. 2-12579.
【0007】
Further, since the size of the image of the matrix is not always constant, the position of the cell also shifts when predicted at a preset interval. Also, when bright and dark areas are continuous, the detection may be different depending on the reading method. In Japanese Patent Application Laid-Open No. 2-12579, bright and dark cells are arranged in a dotted line on two sides, so if the arrangement direction is determined, the position of the entire cell can be accurately predicted from the bright and dark positions on the two sides. It can be read and read accurately. Even in Japanese Patent Application Laid-Open No. 3-38791, dark cells are arranged linearly on two or more sides, so if the arrangement direction is determined, the position of the entire cell can be accurately determined from the bright and dark positions of the two or more sides. The same is true in that it can be predicted and the reading is accurate.
【0008】
However, using such a large number of cells only for determining the position of each cell is not preferable because it reduces the amount of information in the entire matrix. Further, the same pattern as the four sides of the characteristic pattern arranged in the surroundings may occur in the data area, and the same pattern as the four sides in the surroundings may occur depending on the reading direction. Therefore, there is a problem that complicated processing is required for reading and it takes time to read.
【0009】
Originally, a two-dimensional code takes a very long decoding time because the amount of data to be processed is larger than that of a barcode or the like. In addition to this, due to the above-mentioned problems, it took time to cut out only the two-dimensional code from the captured image data.
【0010】
Furthermore, before that, since the two-dimensional code is input to the reading device in a rotating state at any angle in which the two-dimensional code is not constant, rotation angle detection and coordinate conversion processing are required, and pre-decoding processing also takes time. Therefore, an object of the present invention is to provide a two-dimensional code reading device capable of high-speed reading in all directions and having high reading accuracy.
【0011】
[Means for solving problems]
In the invention according to claim 1, as illustrated by a solid line in FIG. 15, data represented by a binary code is cellized and arranged as a pattern on a two-dimensional matrix, and at least two predetermined locations in the matrix are predetermined. A two-dimensional code reading device for reading a two-dimensional code in which a positioning symbol consisting of a pattern obtained by obtaining the same frequency component ratio in a scanning line that crosses the center at any angle is arranged at a position, and is a two-dimensional image detecting means. A frequency component ratio detection circuit that detects the presence of the frequency component ratio signal in the scan line signal output from the two-dimensional image detection means, and image data storage that stores at least one screen of the scan line signal. Means, and when the corresponding signal is found in the frequency component ratio detection circuit, the position detecting means for detecting the position of the corresponding signal in the two-dimensional image including the corresponding scanning line signal, and the position detecting means. A code for determining the arrangement of the two-dimensional code based on the symbol position storage means for storing the position of the corresponding signal on the screen detected by the position detection means and the position stored in the symbol position storage means. A two-dimensional code reading device including a position determining means and a code reading means for reading the contents of the two-dimensional code based on the arrangement of the two-dimensional code determined by the code positioning means. is there.
【0012】
The invention according to claim 2 is the invention according to claim 1, wherein the frequency component ratio detection circuit further detects the presence of the frequency component ratio signal and the signal in the adjacent margin region in the scanning line signal. It is a dimensional code reader.
【0013】
The invention according to claim 3 is the two-dimensional code reading device according to claim 1 or 2, wherein the frequency component ratio detection circuit further detects a direction adjacent to a signal in the margin region with respect to the signal having the frequency component ratio. ..
【0014】
The invention according to claim 4 further includes a binarizing means for binarizing a scanning line signal from the two-dimensional image detecting means and transmitting the scanning line signal to the frequency component ratio detecting circuit, as illustrated by a broken line in FIG. The invention according to any one of claims 1 to 3, wherein the binarization adjusting means for adjusting the threshold value of the binarization by the binarization means according to the state of the binarized scanning line signal is provided. 2D code reader.
【0015】
In the invention according to claim 5, the present invention is based on the state in which the binarization adjusting means is binarized by the binarization means in a two-dimensional image obtained by the two-dimensional image detection means before the previous time. The two-dimensional code reading device according to claim 4, wherein the threshold value for binarization by the above binarizing means in the two-dimensional image of the above is adjusted.
【0016】
According to the invention of claim 6, as illustrated by the broken line in FIG. 15, further, when the presence of the signal of the frequency component ratio is not detected by the frequency component ratio detection circuit, the two-dimensional code does not exist. The two-dimensional code reading device according to any one of claims 1 to 5, further comprising a processing prohibiting means for prohibiting processing by other means.
【0017】
In the invention according to claim 7, as illustrated by the broken line in FIG. 15, the presence of the signal having the frequency component ratio is continuously detected by the frequency component ratio detection circuit a predetermined number of times, and then for a predetermined time. When the presence of the signal is not detected, the two-dimensional code whose existence is determined by the detection determines that it is out of the field of view of the two-dimensional image detecting means, determines this, and then detects the frequency. The two-dimensional according to any one of claims 1 to 6, further comprising a two-dimensional code change determining means for determining that the existence of the component ratio signal is the existence of the next two-dimensional code different from the above two-dimensional code. It is a code reader.
【0018】
【0019】
【0020】
【0021】
[Action and Effect of Invention]
The two-dimensional code reading device according to claim 1 has a two-dimensional code in which positioning symbols having a pattern in which the same frequency component ratio is obtained in scanning lines crossing the center at all angles are arranged at at least two predetermined positions. It is a device for reading, and the frequency component ratio detection circuit detects the presence of the signal of the frequency component ratio in the scanning line signal output from the two-dimensional image detecting means.
【0022】
Therefore, even if the two-dimensional image is image-processed to determine whether or not the two-dimensional code exists, the frequency component ratio detection circuit simply determines the frequency component ratio representing the positioning symbol from the scanning line signal. If the signal is detected, it is found that the two-dimensional code exists in the above-mentioned two-dimensional image. Therefore, after being detected by the frequency component ratio detection circuit, it is sufficient to cut out the two-dimensional code (determine the arrangement) from the detected two-dimensional image for the first time and start decoding. There is no need to perform complicated image processing in the dimensional image and search for the 2D code for a long time, the processing is extremely fast, and it does not interfere with the reading of the article with the 2D code that moves at high speed. ..
【0023】
A margin is usually provided around the two-dimensional code, and in consideration of such a margin, the frequency component ratio detection circuit further increases the frequency component ratio detection circuit in the scanning line signal. It may be configured to detect the presence of a frequency component ratio signal and a signal in an adjacent margin region. By doing so, the positioning symbol can be recognized more reliably, and the accuracy of detecting the existence of the two-dimensional code is improved.
【0024】
Further, in order to improve the detection accuracy of the existence of the two-dimensional code, the frequency component ratio detection circuit may be further configured to detect the direction adjacent to the signal in the margin region with respect to the signal having the frequency component ratio. good. The margin area is usually not all around the positioning symbol, but a part of it. Therefore, the direction in which the margin area is adjacent to the positioning symbol detected from the scanning line signal may be on the right side or the left side, or on both sides, depending on the arrangement state of the positioning symbol in the two-dimensional code. There is. From this, it is possible to more accurately detect whether or not the symbol is a positioning symbol of the two-dimensional code to be detected.
【0025】
Further, since the adjacent direction of the margin area also reflects the arrangement state of the two-dimensional code itself, it can be data that contributes to the detection of the arrangement state of the two-dimensional code. In particular, when there are two positioning symbols, the arrangement of the margin area is referred to for determining the arrangement state of the two-dimensional code.
【0026】
Further, when the corresponding signal is found in the frequency component ratio detection circuit, a position detecting means for detecting the position of the corresponding signal in the two-dimensional image including the corresponding scanning line signal is provided. May be good. By detecting the position of the corresponding scanning line signal in this way, the position of the positioning symbol is immediately known. Once the position of the positioning symbol is known, the overall arrangement of the two-dimensional code including this positioning symbol can be determined or estimated, so that the subsequent cutting (determination of arrangement) and decoding process of the two-dimensional code can be performed quickly. Can be migrated to.
【0027】
Further, depending on the state of the binarizing means for binarizing the scanning line signal from the two-dimensional image detecting means and transmitting it to the frequency component ratio detection circuit and the state of the binarized scanning line signal, the above 2 A binarization adjusting means for adjusting the threshold of binarization by the digitizing means may be provided. When processing the scan line signal digitally, the scan line signal is binarized at an appropriate threshold value. However, for example, due to differences in reflection depending on lighting and location, when binarizing a two-dimensional image using a threshold value, there may be places where it is properly binarized and places where it is not properly binarized. is there. When such a state occurs, even if the two-dimensional code exists, the brightness change pattern of the cell may not be detected.
【0028】
Therefore, the binarization adjusting means adjusts the threshold value of the binarization by the binarization means according to the state of the binarized scanning line signal, so that almost the entire area of the two-dimensional image is appropriate. It is designed to be binarized. For example, when the scanning line signal is binarized by the binarizing means, if there is a region in which almost all are "1", the threshold value in that region is raised and almost all are "0". If there is a region that is "", the binarization adjusting means may perform a process of lowering the threshold value in that region. This makes it possible to accurately and easily detect the light / dark pattern of the cell of the two-dimensional code.
【0029】
The binarization adjusting means is used in the current two-dimensional image according to the binarization state by the binarization means in the previous two-dimensional image obtained by the two-dimensional image detection means. It may be configured to adjust the threshold value of binarization by the above binarization means. Further, when the image data storage means for storing at least one screen of the scanning line signal and the frequency component ratio detection circuit indicate that the corresponding signal exists, the symbol position storage for storing the position of the signal on the screen is stored. A means and a code position determining means for determining the arrangement of the two-dimensional code based on the position stored in the symbol position storing means may be provided.
【0030】
In this way, when the scan line signal used in the frequency component ratio detection circuit is stored for at least one screen and the stored contents indicate that the corresponding signal exists in the frequency component ratio detection circuit, the signal is stored. Since the position of the signal on the screen is memorized and the placement of the two-dimensional code is determined using this position data, the placement of the two-dimensional code can be determined quickly, and the subsequent cutting and decoding of the two-dimensional code can be performed quickly. Can be migrated to.
【0031】
The process of decoding the contents of the two-dimensional code is performed, for example, by reading the contents of the two-dimensional code with the code reading means based on the arrangement of the two-dimensional code determined by the above-mentioned code position determining means. Will be done. Further, when the presence of the signal of the frequency component ratio is not detected by the frequency component ratio detection circuit, it is assumed that the two-dimensional code does not exist, and a processing prohibition means for prohibiting processing by other means is provided. Is also good. As a result, unnecessary processing such as image processing is prevented, and the entire processing is speeded up.
【0032】
Further, when the presence of the signal of the frequency component ratio is continuously detected a predetermined number of times by the frequency component ratio detection circuit, and then the presence of the signal is not detected for a predetermined time, the presence of the signal is detected by the above detection. The determined 2D code is determined to be out of the field of view of the 2D image detecting means, and the presence of the signal having the frequency component ratio detected next is the next 2D code different from the 2D code. Judge that it is the existence of. As a result, it becomes possible to determine for itself that the two-dimensional code captured by the two-dimensional image detecting means is another two-dimensional code that replaces the previously captured two-dimensional code.
【0033】
[Example]
[Example 1] FIG. 1 shows a block diagram of a two-dimensional code reading device 2 as an embodiment. The two-dimensional code reader 2 includes CCD4, binarization circuit 6, frequency component ratio detection circuit 8, serial-parallel conversion circuit 10, address generation circuit 12, address latch circuit 14, memory circuits 16, 18, and frame detection circuit 20. , Timing generation circuit 22, and CPU24.
【0034】
CCD4 captures the outside world and outputs the two-dimensional image as a scanning line signal in the horizontal direction. The binarization circuit 6 binarizes the scan line signal based on the threshold value. The frequency component ratio detection circuit 8 detects a predetermined frequency component ratio from the scanning line signals binarized based on the circuit configuration described later. The serial-parallel conversion circuit 10 converts the scanning line signal output as a serial signal from the binarization circuit 6 into a parallel signal (for example, 8 bits) and transmits it to the memory circuits 16 and 18. The address generation circuit 12 sequentially generates write addresses in the memory circuits 16 and 18 by the clock signal of the timing generation circuit 22, and transmits the write addresses to the memory circuits 16 and 18 and the address latch circuit 14. When the address latch circuit 14 receives a signal (latch signal) indicating that a predetermined frequency component ratio has been detected by the frequency component ratio detection circuit 8, it latches the address signal from the address generation circuit 12 and its address data. Is written to the memory circuits 16 and 18.
【0035】
The frame detection circuit 20 receives the frame switching signal from CCD4, and the binarized scan line signal corresponding to the even-th frame is binarized to one memory circuit 16 corresponding to the odd-th frame. The gates of the memory circuits 16 and 18 are controlled so that the scan line signal is written to the other memory circuit 18 and the address data from the address latch circuit 14 is also written in the same manner. The timing generation circuit 22 in particular generates a clock signal for timing between the frequency component ratio detection circuit 8, the serial-parallel conversion circuit 10, and the address generation circuit 12. The CPU 24 is configured as a microcomputer, and alternately accesses the memory circuit 16 or the memory circuit 18 according to the output signal of the frame detection circuit 20, and as will be described later, the image data for one screen read. Two-dimensional code processing is carried out.
【0036】
FIG. 2 shows an example of the scanning line signal from CCD4 to the frequency component ratio detection circuit 8. FIG. 2A represents an analog scan line signal output from CCD4, and FIG. 2B represents a binarized scan line signal output from the binarization circuit 6. In the frequency component ratio detection circuit 8, a predetermined frequency component ratio is detected when the ratio of the widths d0 to dn of the continuous 1 and 0 of the binarized scan line signal is a predetermined ratio. A signal (latch signal) indicating that the frequency has been detected is output to the address latch circuit 14.
【0037】
FIG. 3 shows the circuit configuration of the frequency component ratio detection circuit 8. The frequency component ratio detection circuit 8 includes an edge detection circuit 30, a counter 31, a latch circuit 32,33,34,35,36,37,38, a comparator 39,40,41,42,43,44, an or circuit 45, It is equipped with an AND circuit 46 and a timing generator 47.
【0038】
As shown in FIG. 2B, the edge detection circuit 30 detects the signal edge when the output from the binarization circuit 6 falls or rises, and outputs the edge detection signal to the counter 31. Each time the edge detection signal is input, the counter 31 outputs the count-up count value to the latch circuit 32, clears its own count value, and starts the count-up again.
【0039】
Each time the latch circuit 32 receives a count value from the counter 31, the latch circuit 32 outputs the count value held up to now to the latch circuit 33 on the right side. Similarly, the other latch circuits 33 to 37 also pass the count value from the left side to the right side. At the same time, the latch circuits 32 to 37 output the count value to the comparators 39 to 43. The last latch circuit 38 only outputs the count value to the comparator 44.
【0040】
Of the latch circuits 32 to 38, the second latch circuit 33 from the left outputs the held count value to all the comparators 39 to 44. The other latch circuits 32 and 34 to 38 output the held count values to the comparators 39 to 44, respectively.
【0041】
These comparators 39 to 44 compare the count value output from the second latch circuit 33 from the left with the count value output from the other latch circuits 32, 34 to 38. As a result, when the output count values of the other latch circuits 32, 34 to 38 are a predetermined multiple or a predetermined multiple or more with respect to the output count value of the latch circuit 33, the comparators 39 to 44 each set "1". Output, and output "0" in other multiples.
【0042】
The comparator 39 on the far left of the figure outputs "1" when the output count value of the latch circuit 32 is at least twice the output count value of the latch circuit 33. The second comparator 40 from the left outputs "1" when the output count value of the latch circuit 34 is 1 times the output count value of the latch circuit 33. The third comparator 41 from the left outputs "1" when the output count value of the latch circuit 35 is three times the output count value of the latch circuit 33. The fourth comparator 42 from the left outputs "1" when the output count value of the latch circuit 36 is 1 times the output count value of the latch circuit 33. The fifth comparator 43 from the left outputs "1" when the output count value of the latch circuit 37 is 1 times the output count value of the latch circuit 33. The sixth comparator 44 from the left outputs "1" when the output count value of the latch circuit 38 is at least twice the output count value of the latch circuit 33.
【0043】
Of the comparators 39 to 44, the outputs of the two comparators 39 and 44 are input to the or circuit 45. The outputs of the other four comparators 40 to 43 are input to the AND circuit 46. Further, the output of the or circuit 45 is also input to the AND circuit 46. Therefore, when all four comparators 40 to 43 in the center output "1", and one or both of the two comparators 39 and 44 on the left and right output "1", and The output of the circuit 46 is "1". This means that the ratio of the output count values of the six latch circuits 32 to 37 on the left side is 2 or more: 1: 1: 3: 1: 1 from the left, or the six latch circuits 33 on the right side. When the ratio of the output count values of ~ 38 is 1: 1: 3: 1: 1: 2 or more from the left, "1" is output from the AND circuit 46, and in other cases, "1" is output. It means that "0" is output.
【0044】
In particular, the above ratio "1: 1: 3: 1: 1" represents a frequency component ratio indicating that the positioning symbol, which will be described later, has been scanned, and thus serves as data for specifying the position of the positioning symbol. In addition, "2 or more" existing on the left and right of the above ratio "1: 1: 3: 1: 1" indicates that a margin always present on one or both of the left and right was detected from the arrangement of the positioning symbols. By adding this "2 or more" to the judgment, the positioning symbol can be detected more accurately.
【0045】
The frequency component ratio detection circuit 8 outputs the outputs of the left and right comparators 39 and 44 to the address latch circuit 14 together with the output signals of the AND circuit 46. As a result, it is possible to determine whether the margin is on the left or right side of the positioning symbol, or on both sides, which is important data for determining the arrangement of the positioning symbol. The signal indicating the presence or absence of this margin is also stored in the memory circuits 16 and 18 together with the address data via the address latch circuit 14.
【0046】
The timing generator 47 takes the timing of the counter 31 and the latch circuits 32 to 38 based on the edge detection signal from the edge detection circuit 30. Here, FIG. 4 shows an example of the two-dimensional code detected by the two-dimensional code reading device 2. This two-dimensional code 52 is printed on a white mount 53, and is composed of three positioning symbols 54, a data area 56, and an origin cell Cst. All of these are arranged in a square shape with the same number of cells vertically and horizontally (21 cells x 21 cells). Each cell is selected from two types of optically different cells, and is distinguished by white (bright) and black (dark) in the figures and explanations. In FIG. 4, for convenience, the pattern of the data cell in the data area 56 is omitted.
【0047】
The positioning symbol 54 is arranged at three of the four vertices of the two-dimensional code 52. In the light-dark arrangement of the cell, a reduced frame-shaped square 54b consisting of a white part is formed in the center of the frame-shaped square 54a consisting of a black part, and a further reduced square 54c consisting of a black part is formed in the center of the frame-shaped square 54b. It is a pattern.
【0048】
FIG. 5 shows the light / dark detection when the positioning symbol 54 is scanned. As shown in FIG. 5 (A), the light / dark detection patterns of the scanning lines (a), (b), and (c) that cross the center of the positioning symbol 54 at a typical angle are shown in FIG. 5 (B). As you can see, they all have the same frequency component ratio. That is, the frequency component ratios of the scanning lines (a), (b), and (c) that cross the center of the positioning symbol 54 are dark: bright: dark: bright: dark = 1: 1: 3: 1: 1. It has become. Of course, the ratio is 1: 1: 3: 1: 1 even for the scanning lines having an angle intermediate between the scanning lines (a), (b), and (c). Further, even if the figure of FIG. 5 (A) is arranged on an oblique surface from the CCD4 side, the frequency component ratios of the scanning lines (a), (b), and (c) are dark: light: dark: Light: Dark = 1: 1: 3: 1: 1.
【0049】
Note that FIG. 5B corresponds to the binarized scan line signal from the binarization circuit 6. Next, FIG. 6 shows a flowchart of a process of recognizing the existence and arrangement of the two-dimensional code 52 in order to decipher the contents of the two-dimensional code 52 described above. This process is executed by CPU24.
【0050】
When the power of the two-dimensional code reading device 2 is turned on, the processing of the CPU 24 and the other configurations of the two-dimensional code reading device 2 also start each processing. That is, by the above-mentioned processing, image data of one frame at a time is alternately accumulated in the memory circuits 16 and 18. Further, upon the accumulation thereof, "2 or more: 1: 1: 3: 1: 1" or "1: 1: 3: 1: 1: 1" or "1: 1: 3: 1: 1: 1" or "1: 1: 3: 1: 1: 1" or "1: 1: 3: 1: 1: 1" or "1: 1: 3: 1: 1: 1" When a frequency component ratio satisfying "2 or more" exists, a latch signal is output from the frequency component ratio detection circuit 8, and is output from the address generation circuit 12 at the latch signal output timing in the address latch circuit 14. The address is latched and stored in the memory circuits 16 and 18 currently writing image data together with the signal representing the left margin or the right margin from the frequency component ratio detection circuit 8.
【0051】
For example, as shown in the upper part of FIG. 7, it is assumed that the two-dimensional code 52 is inclined and attached to the surface of the article W flowing through the line. The code pattern in the data area 56 is omitted. When this image is scanned at the position of the scanning line L1, a binarized scanning line signal as shown in the lower part of FIG. 7 is output from the binarizing circuit 6. When the six latch circuits 32 to 37 are filled with the count values d05, d04, d03, d02, d01, d00 and an edge is detected at time t07, the count value d06 is transferred from the counter 31 to the latch circuit 32. At the same time, the latch circuits 32 to 37 output the held count values d05, d04, d03, d02, d01, d00 to the next latch circuits 33 to 38, respectively. At this time, at the same time, the latch circuits 32 to 37 output to the comparators 39 to 43. In the comparators 39 to 43, the operations of d05 / d04, d03 / d04, d02 / d04, d01 / d04, d00 / d04 are performed. As a result, if d05 / d04 = 2 or more, d03 / d04 = 1, d02 / d04 = 3, d01 / d04 = 1, d00 / d04 = 1, that is, d05: d04: d03: d02: d01: d00. If = 2 or more: 1: 1: 3: 1: 1, the frequency component ratio detection circuit 8 outputs a latch signal, but here, d05: d04: d03: d02: d01: d00 2 or more: 1 Since it is: 1: 3: 1: 1, the latch signal is not output from the frequency component ratio detection circuit 8, and the address and margin data are not stored in the memory circuits 16 and 18 by the address latch circuit 14.
【0052】
Until time t14, the state that is neither "2 or more: 1: 1: 3: 1: 1" or "1: 1: 3: 1: 1: 2 or more" continues. When the time t14 is reached, the count value d13 is output from the counter 31 to the latch circuit 32. At this timing, the count values d12 to d07 are output from the latch circuits 32 to 37 to the latch circuits 33 to 38 and the comparators 39 to 44, respectively. Further, the count value d06 is output from the latch circuit 38 to the comparator 44. The count values d07 and d11 are due to the frame-shaped square 54a consisting of the black part of the positioning symbol 54, and the count values d08 and d10 are caused by the frame-shaped square 54b consisting of the white part of the positioning symbol 54. Is due to the square 54c consisting of the black part of the positioning symbol 54. The ratio of these count values d07 to d11 is "1: 1: 3: 1: 1" from the shape of the positioning symbol 54 as described with reference to FIG.
【0053】
The count value d12 is caused by the margin 53a of the mount 53 and the white part up to the pattern D of the article W. Since the margin 53a is three times as large as, for example, the frame-shaped square 54a, naturally, d12 / d11> 2. Therefore, at time t14, the frequency component ratio of "2 or more: 1: 1: 3: 1: 1" is satisfied. Then, the address latch circuit 14 latches the address output from the address generation circuit 12 by the latch signal output at this time t14, and is currently writing image data together with a signal representing the write margin from the frequency component ratio detection circuit 8. It is stored in one of the memory circuits 16 and 18.
【0054】
Since this stored address corresponds to the screen coordinates of the two-dimensional image obtained by CCD4, it can be converted into screen coordinates and represented at the time of arithmetic processing described later. When these coordinates are shown on FIG. 7, they are the positions shown by the regions Z1, Z2, and Z3 existing in the center of the square 54c.
【0055】
The processing of the CPU 24 is performed in the state where such data exists in the memory circuits 16 and 18. Judging from the output signal of the frame detection circuit 20, the CPU 24 accesses the memory circuits 16 and 18 for which writing has been completed among the memory circuits 16 and 18, and processes the image data. Do as in 6.
【0056】
First, when the processing is started in the CPU 24, the positioning symbol 54 is detected. The address latch circuit 14 has already read all the address data and margin data stored in the image data, and detects the position of the positioning symbol 54 (step 100). If the address data does not exist at all, the two-dimensional code processing is immediately terminated.
【0057】
If the address data exists, and if it is not noise, the address corresponds to the position shown in the regions Z1, Z2, and Z3 in FIG. In each of the regions Z1, Z2, and Z3, there are a large number of address data arranged on the line shown in FIG. In step 100, the address data is first grouped. For example, the data is sorted by the value of the X coordinate and divided into groups with close X coordinates, and each group is further sorted by the value of Y coordinate and divided into groups with close Y coordinates. By doing so, the groups corresponding to the areas Z1, Z2, and Z3 can be obtained from the address data. Then, the central position of each group is calculated. For example, the center position is detected as the position of the positioning symbol 54 by calculating the average value of the XY coordinates.
【0058】
Further, when there is a group in which the number of address data is very small as compared with other groups, the group may be excluded as noise. The number of positions of the positioning symbol 54 thus obtained is checked, and it is determined whether or not the positioning symbol 54 is valid (step 110). In the examples of FIGS. 4 and 7, there are three positioning symbols 54, so if the three positions are determined, they are considered valid and the next process is performed. If the number is less than 3, it is assumed that a valid positioning symbol 54 has not been detected, and the 2D code processing is terminated.
【0059】
If more than three numbers are detected, some of them are not the positioning symbol 54, so the process returns to step 100 to detect the position of the positioning symbol 54 by a different method. A different method is, for example, scanning one frame of data in the memory circuits 16 and 18 in the vertical direction, detecting a position where a predetermined frequency component ratio can be obtained by software, finding the center position thereof, and then step 110 again. Check at. If there are three, move on to the next process. Of course, if the vertical scanning is performed only around the positions of the three or more positioning symbols 54 detected earlier, the processing can be speeded up.
【0060】
As another method, for example, pattern matching of the shape of the positioning symbol 54 is performed at or near each of more than three positions to eliminate those with a low degree of matching. Then, the number remaining in step 110 may be determined again. If the number of remaining positions is 3, move on to the next process.
【0061】
The next step 120 process is a placement determination process for determining which position of the positioning symbol 54 determined as described above is the positioning symbol 54 in the two-dimensional code 52. Here, as shown in FIG. 8, the three positioning symbol positions S1, S2, and S3 obtained in step 100 are connected by straight lines j1, j2, and j3, and the angles θ1, θ2, and θ3 between them are calculated. It is determined whether or not an angle of about 90 ° exists from the angles θ1, θ2, and θ3. In the example of FIG. 8, the angle θ2 at the position S2 is about 90 °. Next, it is determined whether or not the lengths of the straight lines j1 and j2 on both sides thereof are almost equal. The straight lines j1 and j2 in Fig. 8 have almost the same length. Therefore, in the two-dimensional code 52 of FIG. 4, the upper right positioning symbol 54 corresponds to the position S1, the upper left positioning symbol 54 corresponds to the position S2, and the lower left positioning symbol 54 corresponds to the position S3. Turns out.
【0062】
In this way, the three positioning symbol positions S1, S2, and S3 are connected by straight lines j1, j2, and j3, and the angles θ1, θ2, and θ3 between them have an angle of about 90 °, and the straight lines on both sides thereof. If the lengths of the symbols are almost equal, the arrangement of the positioning symbols is determined, and the process moves to the next process. The slope of the two-dimensional code 52 can be determined from the slopes of the straight lines j1 and j2 that intersect the position S2 at an angle of 90 °.
【0063】
When the two-dimensional code 52 is attached to a surface inclined with respect to CCD4, the condition that the angle is about 90 ° and the length of the straight line sandwiching the angle is almost the same may not be satisfied. An example is shown in FIG. In this case, select the position S2 at the angle closest to 90 °, extend the straight lines j1 and j2 that intersect there by a predetermined distance b to the outside, and draw virtual lines k1 and k2 parallel to the straight lines j1 and j2 from that point, respectively. Set. The virtual lines k1 and k2 are up to the extension of the straight line j3. Also, one of the straight lines j1 and j2 is extended by a distance b, and a virtual line k3 parallel to the straight line j3 is set from there. The virtual line k3 is an extension of either straight line j1 or j2. This distance b is slightly longer than the distance from the center of the positioning symbol 54 in FIG. 4 to its end E (1/2 of the length of one side of the positioning symbol 54), and is from the center of the positioning symbol 54. It is set to be shorter than the distance to the corner C. In order to set it more accurately, it may be further adjusted and set according to the length of the straight lines j1 and j2.
【0064】
A white portion having a predetermined width is formed around the two-dimensional code 52 by a margin 53a. Therefore, the image data around the above three virtual lines k1, k2, and k3 are inspected, and the virtual line, which is completely white, has the positioning symbol 54 as shown by the broken line in FIG. It is estimated to be. That is, it can be determined that the virtual line is set on any margin 53a adjacent to the positioning symbol 54 on the upper left of the two-dimensional code 52 in FIG. If there are two virtual lines containing only the white part and one virtual line including the black part, the arrangement of the positioning symbol 54 can be determined. In FIG. 9, assuming that the virtual lines k1 and k2 have only a white part and the virtual line k3 includes a black part, the position S2 on the side where the virtual lines k1 and k2 intersect is the upper left positioning symbol 54 in FIG. The clockwise position S1 of position S2 is determined as the upper right positioning symbol 54, and the counterclockwise position S3 of position S2 is determined as the lower left positioning symbol 54. After making a decision in this way, the process moves on to the next process. Instead of the process shown in FIG. 9, the process shown in FIG. 10 may be performed. That is, the directions V1 and V2 of the two sides E1 and E2 of the frame-shaped square 54a of the corresponding positioning symbol 54 are calculated for any one position determined in step 100, for example, the position S1. Next, from the straight lines j1, j2, and j3, find a straight line parallel to the two directions V1 and V2, respectively. In the example of FIG. 10, the straight line j2 is parallel to the direction V1 and the straight line j1 is parallel to the direction V2. Since the positioning symbol 54 is a square and its four sides are always parallel to the two straight lines j1 and j2 connecting the positioning symbols 54 existing at the adjacent corners of the two-dimensional code 52, these two straight lines j1, It can be determined that the position S2 where j2 intersects is the positioning symbol 54 on the upper left of FIG. 4, in which the positioning symbols 54 are present at the adjacent corners on both sides.
【0065】
When the arrangement of the three positioning symbols 54 is determined in step 120, the posture of the entire two-dimensional code 52 can be determined by the position of the positioning symbol 54 determined in step 100 and the arrangement of the positioning symbols 54. , As shown in FIG. 11, in the actual two-dimensional code 52 (FIG. 4), the positioning symbol 54 is based on the lengths of the orthogonal straight lines j1 and j2 and the inclinations α and β with respect to the scanning line direction L. The shape is estimated and the position of the upper left corner cell Cs0 of each positioning symbol 54 in FIG. 4 is calculated (step 130).
【0066】
Next, the positions of the remaining corner cells Cs1, Cs2, Cs3 and the origin cell Cst of each positioning symbol 54 are determined based on the lengths of the orthogonal straight lines j1 and j2 and the slopes α and β with respect to the scanning line L. (Step 140). Regarding the origin cell Cst, not by calculation, but by following the black parts Bk1 to Bk5 that are continuously continuous on the extension line of the lower side of the positioning symbol 54 at the lower left of the black parts at the edge part of the two-dimensional code 52, and further at the upper right. The origin cell Cst may be determined by tracing the black portions Bk11 to Bk14 that are continuous on the extension line of the right side of the positioning symbol 54 and at the position where both traced directions intersect. Further, among the eight directions around the cell, the origin cell Cst may have a margin 53a in three directions opposite to the three positioning symbols 54 side.
【0067】
When the cells at the four corners of the positioning symbol 54 and the origin cell Cst are determined in step 140, the positions of the four sides G1, G2, G3, and G4 of the two-dimensional code 52 shown in FIG. 12 are detected for each cell. (Step 150). If the number of cells on the four sides is fixed to a predetermined number, the position of each cell can be determined by dividing the length of each side G1, G2, G3, G4 by the predetermined number. The position of the cell is determined. The length of each side G1, G2, G3, G4 is determined by the above processing by the positions of the upper left cell Cs0, lower left cell Cs1, lower right cell Cst, and upper right cell Cs3 of the two-dimensional code 52. Because it is, it is easy to ask.
【0068】
If the number of cells on the four sides is uncertain and unknown, the length and inclination of the four sides of the frame-shaped square 54a of the positioning symbol 54 (the inclination is the value already obtained from the relationship of the positioning symbol 54). It is also good.) Can be obtained from the positions of the corner cells Cs0, Cs1, Cs2, Cs3, and since the number of cells on the four sides of the frame-shaped square 54a is fixed as 7, the length of the four sides is the length of the cell. Dividing by the number 7 reveals the length of one cell. Based on the length of this one cell, the position of each cell in each side G1, G2, G3, G4 of the two-dimensional code 52 can be determined.
【0069】
Next, the positions of all the data cells in the data area 56 are determined based on the positions of each cell on the four sides G1, G2, G3, and G4 (step 160). That is, the intersection position of the straight line connecting the two cells Ca1 and Ca2 at the same position on the two opposite sides G1 and G3 and the straight line connecting the two cells Cb1 and Cb2 at the same position on the other two opposite sides G2 and G4. Is determined as the position of the data cell Cxy. This is performed for all cells in each side G1, G2, G3, G4 to determine the positions of all data cells in the data area 56.
【0070】
Next, the light and dark contents of the data cell whose position is determined in this way are read in a predetermined order, the data cell is decoded, the result is stored, output to another device, or displayed. Then (step 170), the process ends. In order to determine that the signal of the frequency component ratio detected next is a two-dimensional code different from the two-dimensional code read by the above-mentioned processing, that is, the two-dimensional code is replaced. The CPU 24 has the following processing to determine that it has happened. That is, if the presence of the signal having the frequency component ratio is continuously detected a predetermined number of times and then the presence of the signal is not detected for a predetermined time, the two-dimensional code imaged by CCD4 is the field of view of CCD4. This is determined, and the existence of the signal having the frequency component ratio detected next is determined to be the existence of the next two-dimensional code different from the two-dimensional code (two-dimensional). The CPU 24 is equipped with (corresponding to the code change judgment means).
【0071】
In this embodiment, as described above, the frequency component ratio detection circuit 8 detects the presence or absence of the frequency component ratio indicating the existence of the positioning symbol 54 in hardware, so that it is two-dimensional without software image processing. It turns out whether the code 52 is present in the image. The hardware processing by the frequency component ratio detection circuit 8 is extremely quick. Since the software processing is performed in the state where the place where the 2D code 52 may exist is known by the detection of the frequency component ratio detection circuit 8, the software processing is also a time-consuming process of searching for the 2D code 52. Is unnecessary. Therefore, even if the article W is transferred at high speed, it is possible to decipher the code of the two-dimensional code 52 without missing or misreading it. On the contrary, since the two-dimensional code reading device 2 is quickly decoded, the article W can be transferred at high speed, the transfer efficiency can be improved, and the production line of the article W is not adversely affected.
【0072】
Further, as shown in FIG. 5, even if the two-dimensional code 52 is rotated in any direction or is arranged on an oblique surface, the specific frequency of the positioning symbol 54 can be obtained only by scanning in a certain direction. The component ratio can be detected. Therefore, it is not necessary to repeatedly change the scanning direction many times to detect a predetermined pattern as a reference. From this, the position of the two-dimensional code 52 can be quickly identified, and the subsequent software processing can be started at an early stage.
【0073】
Further, since at least positioning can be performed only by scanning in one direction in this way, even if various noises other than the two-dimensional code 52 are detected in the image captured from an image detection device such as a TV camera, the noise is a two-dimensional code. The position of the two-dimensional code 52 is immediately found without having to repeatedly determine whether or not it is 52 by changing the scanning direction. Further, after that, only the periphery of the detected positioning symbol 54 needs to be searched, and the code of the data area is cut out at high speed.
【0074】
In the above embodiment, CCD4 corresponds to the two-dimensional image detecting means, the address latch circuit 14 corresponds to the position detecting means, the binarizing circuit 6 corresponds to the binarizing means, and the memory circuits 16 and 18 correspond to the image data. It corresponds to the storage means, the address latch circuit 14 corresponds to the symbol position storage means, steps 100 to 160 correspond to the processing as the code position determining means, the step 170 corresponds to the processing as the code reading means, and steps 100 and 110 Corresponds to processing as a processing prohibition means.
【0075】
[Example 2] FIG. 13 shows a two-dimensional code reader 202 having another configuration. The difference between the two-dimensional code reading device 202 and the two-dimensional code reading device 2 of the first embodiment is that the binarization control circuit 204 is added.
【0076】
In the reading of the data cell by the CPU 24, for example, when an area that is almost recognized as a white part or a black part appears in the binarization control circuit 204, the binarization control circuit 204 is a binarization circuit in such an area. The threshold at 6 is considered inappropriate. Therefore, the binarization control circuit 204 stores an address-threshold value change table for changing the threshold value according to the address according to the instruction of the CPU 24, and sets the threshold value of the binarization circuit 6 according to the address of the address generation circuit 12. I am changing.
【0077】
As the processing of the CPU 24, for example, when detecting the position of the data cell in step 160 or decoding the data cell in step 170, the change of "1" and "0" of the data cell is checked and immediately before the area where there is almost no change. The address of is stored in the binarization control circuit 204 together with the change value of the threshold value. For example, the CPU 24 sets a change value that raises the threshold value for the address immediately before the area of "1" (white part) appears, and the threshold value for the address immediately before the area of "0" (black part) appears. Performs the process of setting the change value that lowers.
【0078】
Furthermore, in the 1st step, if there is still a part that is almost recognized as a white part or a black part, it is sufficient to set the threshold change values in the 2nd and 3rd steps as necessary. .. With this configuration, even if there is a situation where there are places that are properly binarized and places that are not properly binarized due to differences in reflection depending on the lighting and location, the instructions from the CPU 24 will be used. The binarization control circuit 204 adjusts the threshold value of binarization by the binarization circuit 6 according to the state of the binarized scan line signal. As a result, almost the entire area of the two-dimensional image is appropriately binarized, and the CPU 24 can accurately read the light / dark pattern of the data cell.
【0079】
In the above configuration, the binarization control circuit 204 corresponds to the binarization adjustment means.
[Others] In each of the above embodiments, the positioning symbol 54 is shown as a double square with a frequency component ratio crossing the center of black: white: black: white: black = 1: 1: 3: 1: 1. However, it may be circular as shown in FIG. 14 (a), hexagonal as shown in FIG. 14 (b), or another regular polygon. That is, it suffices as long as the figures are concentrically formed so that similar figures overlap. Further, as long as the frequency component ratio across the center is the same at all angles, the above figure may be made into multiple layers as shown in FIG. 14 (c). Further, in each of the above embodiments, the outer shape of the two-dimensional code 52 is shown as a square, but it may be a rectangle.
【0080】
Further, in each of the above embodiments, the number of positioning symbols 54 is three, but the arrangement within the two-dimensional code 52 is arbitrary. Further, four or more positioning symbols 54 may be provided. Further, the number of positioning symbols 54 may be two. In this case, the directionality of the two-dimensional code 52 is not determined only by the arrangement of the two positioning symbols 54, but if the arrangement of the margin 53a around the positioning symbol 54 is detected, the arrangement of the data area 56 with respect to the positioning symbol 54 is detected. Can be detected.
[Simple explanation of drawings]
[Figure 1]
The block diagram of the 2D code reader of Example 1 is shown.
[Figure 2]
It is explanatory drawing of the scanning line signal from a CCD to a frequency component ratio detection circuit.
[Fig. 3]
It is a block diagram which shows the circuit structure of the frequency component ratio detection circuit.
[Fig. 4]
It is a block diagram of a 2D code.
[Fig. 5]
It is explanatory drawing of light-dark detection at the time of scanning a positioning symbol.
[Fig. 6]
It is a flowchart of 2D code processing which recognizes existence and arrangement of 2D code.
[Fig. 7]
It is explanatory drawing of the scanning process for a 2D code.
[Fig. 8]
It is explanatory drawing of the process with respect to the detected symbol position for positioning.
[Fig. 9]
It is explanatory drawing of the process for specifying the arrangement of the positioning symbol.
[Fig. 10]
It is explanatory drawing of the process for specifying the arrangement of the positioning symbol by another method.
[Fig. 11]
It is explanatory drawing of the process for specifying the position of a reference cell.
[Fig. 12]
It is explanatory drawing of the process for specifying the position of a data cell.
[Fig. 13]
The block diagram of the 2D code reader of Example 2 is shown.
[Fig. 14]
It is explanatory drawing which shows the example of another shape of the positioning symbol.
[Fig. 15]
It is a basic structure example diagram of the invention.
[Explanation of symbols]
2 ... 2D code reader 4 ... CCD 6 ... Binarization circuit 8 ... Frequency component ratio detection circuit 10 ... Serial-parallel conversion circuit 12 ... Address generation circuit 14 ... Address latch circuit 16,18 ... Memory circuit 20 ... Frame detection circuit 22 ... Timing generation circuit 24 ... CPU 30 ... Edge detection circuit 31 ... counter 32,33,34,35,36,37,38 ... Latch circuit 39,40,41,42,43,44 ... Comparator 45 ... Or circuit 46 ... And circuit 47 ... Timing generator 52 ... 2D code 53 ... Mount 53a ... Margin 54 ... Positioning symbol 56 ... Data area 202 ... 2D code reader 204 ... 2D control circuit L1 ... Scan line Ca1, Ca2 ... cell Cb1, Cb2 ... cell Cs0, Cs1, Cs2, Cs3 ... Corner cell
Every citation, both ways
| Document | Relation | Office | Cited during |
|---|---|---|---|
| US12443814B2 | Cited by | United States of America | Applicant |
| EP3361419A1 | Cited by | European Patent Office (EPO) | Applicant |
8 members in 4 offices
Members8
| Document | Office | Kind | |
|---|---|---|---|
| EP0720113A2 | European Patent Office (EPO) | A2 | |
| JPH08180125A | Japan | A | |
| EP0720113A3 | European Patent Office (EPO) | A3 | |
| US5691527A | United States of America | A | |
| JP2867904B2This record | Japan | B2 | |
| EP0720113B1 | European Patent Office (EPO) | B1 | |
| DE69523273D1 | Germany | D1 | |
| DE69523273T2 | Germany | T2 |
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Numbers
- Publication
- 2867904
- Application
- 6322873
Titles2
- Japanese
- 2次元コード読取装置
- English
- [Title of Invention] Two-dimensional code reader
Classification
- CPC, 3
- G06K7/1093
- G06K7/1417
- G06K7/1456
- IPC, 2
- G06K7 00
- G06K7 10