Communication system,transmitter and receiver for use in a communication system,and method for recovering data in a communication system.

Description: TECHNICAL FIELD [Detailed description of the invention]

[Industrial application field] The present invention relates to communication systems, and particularly to the combined use of decision feedback equalizers and error correction coding in such systems.

[Previous technology] An equalizer is a device widely used in communication systems to compensate for linear (amplitude and phase) distortion in a channel. Equalizers can be roughly divided into linear equalizers and judgment feedback equalizers. In many communications applications, linear equalizers are more widely used than decision feedback equalizers. The reason is that the linear equalizer is easier to implement and provides substantially the same compensation gain. However, with the development of high-speed transmission speeds of 19.2 Kb / s or more in voice band modems, it is suitable for compensating for the severe amplitude distortion experienced in high-speed modems. It has a significant advantage over the chemical device and has become a clearly preferred compensator. A problem in implementing the determination feedback equalizer is that it does not work cooperatively in a system that uses error correction coding, as will be described later. Error correction coding is a coding technique used to increase the resistance of digital information signals to the presence of noise. Such high tolerance increases the probability that the information signal will be recovered with high accuracy in the receiver unit of the data communication system. Error correction is characterized as block coding or convolutional coding. Trellis coding is one well-known error correction coding technique that uses convolutional coding and does not adversely affect the bandwidth required by communication systems. In block coding, one or more error correction bits are transmitted along with a "block" of one or more information bits. Each of these error correction bits has a value determined by the value of the information bit in the related block. This process of transmitting an increased number of bits for error correction is also used in convolutional coding, but unlike block coding, the value of each bit in convolutional coding is the associated block and before. It is a function of the information bits of some transmitted blocks. Coding gain is a term used to describe the performance improvement of the system as a result of using error correction. It is defined as the amount by which the signal-to-noise ratio deteriorates before its bit error rate becomes equal to the bit error rate of the system without error correction. This coding gain can be calculated analytically for any system, and the calculated value is called a theoretical coding gain. The combination of the two technologies offers more benefits than using each alone, as the decision feedback equalizer and error correction coding each solve different unwanted effects on the digital communication system: amplitude distortion and noise. provide. However, when the judgment feedback equalizer acts on the digital signal including error correction, the performance of the system is deteriorated. In fact, it results in significantly lower performance than that obtained when using either an error correction or judgment feedback equalizer alone. Therefore, if the benefit of combining both the judgment feedback equalizer and the error correction coding can be obtained in one communication system, the communication can be significantly improved.

[Outline of Invention] The present invention makes it possible to obtain benefits by combining both a judgment feedback equalizer and error correction coding in one communication system. According to the present invention, the determination feedback equalizer uses a plurality of encoders and encoders arranged in the transmitter and the receiver, respectively. The use of multiple coders interleaves the transmit symbols, and each decoder acts on every M symbols accordingly. Where M is the number of encoders or decoders. Proper selection of M can reduce the probability that noise will impair the recovery of two consecutive symbols by the decoder. In addition, the error propagation effects inherent in the decision feedback equalizer are distributed to separate decoders. According to the above-mentioned requirements of the present invention, the benefit of combining the judgment feedback equalizer and the coding gain related to the error correction technique can be obtained.

[Explanation of Examples] FIG. 1 shows a conventional communication system 100. The modem transmitter 101 generates a signal suitable for transmission to the band limiting channel 102. Channels are subject to various channel failures such as linear (amplitude and phase) distortion and additional noise. This damaged signal is processed by the modem receiver 103 and an attempt is made to correct the channel failure result. In the conventional transmitter 101 for unencoded modems, ie modems that do not incorporate error correction, a serial stream of binary data is a sequence of bits of discrete multi-level (usually multidimensional) symbols according to certain mapping rules. It is given directly to the symbol mapping device 104 assigned to the block. One mapping rule used for CCITT's V.32 standard for 9.6Kb / s uncoded data transmission using quadrature amplitude modulation (QAM) is the 16-point signal arrangement shown in Figure 3. Determined by (constellation) 301. Each signal point in one arrangement has a corresponding bit code. For example, signal point 304 has reference numeral 1111. In this example, 4 bits are mapped to one of 16 possible two-dimensional (or complex) symbols. These symbols are generated at a rate of 2400 symbols per second, generate a desired bit rate of 9.6 Kb / s, and are appropriately spectrally formatted for transmission through the transmit filter 109 and over the bandwidth limiting telephone channel 102. To. A typical receiver for such an unencoded signal has an adaptive linear equalizer 110 and a slicer 111 in the receiver 103. The linear equalizer 110 compensates for linear obstacles in the channel, and the slicer 111 determines which of the 16 points of signal arrangement 301 in FIG. 3 was received during each symbolic period. For example, if the output of the equalizer 110 is a complex point 303, the slicer chooses the point (304) with the closest signal arrangement at the Euclidean distance. After slicing, the receiver performs a symbol-bit mapping operation (not shown) that recovers a 9.6 Kb / s binary data stream from the received slice symbol. Of course, the QAM signal needs to be modulated at the transmitter and demodulated at the receiver, but these operation explanations are well known and will be omitted. In another prior art of transmitter 101, for an encoded modem, the input binary data stream first passes through the trellis encoder 105 via the dotted line in the figure instead of the symbol mapping device 104. For example, CCITT's V.32 standard for 9.6Kb / s data transmission has coding options. To that end, the trellis coder 105 is a convolutional coder that produces one additional bit for each of the four input bits, and one of the 32 possible two-dimensional symbols determined by the signal arrangement 302 in Figure 3. Has a symbol mapper that maps the resulting 5 bits. In this example, the trellis encoder 105 uses redundancy in the signal arrangement to ensure that only correctly defined and acceptable symbol sequences are transmitted. A coded V.32 modem receiver typically has a linear adaptive equalizer 110 within the receiver 103, the output of which goes into the trellis decoder 112 via a dotted line instead of the slicer 111. The decoder executes a maximum likelihood sequence estimation algorithm called the Viterbi algorithm. The decrypted sequence is then sent to the symbol-bit mapper to play the 9.6Kb / s bitstream. For trellis-encoded modems, receivers with a linear adaptive equalizer 110 and trellis decoder 112 have been theoretically shown to work well and have higher immunity to additional noise generated in the channel. It has also been confirmed empirically. The revised coded version of the V.32 modem can be used in the public switched telephone network at data rates up to about 14.4 Kb / s and achieve sufficient performance. However, for that purpose, the number of points of the signal arrangement 302 must be increased. A data rate of 14.4 Kb / s can be achieved with a symbol speed of 2400 baud and 6 information bits per symbol. A total of 128 2D points are needed during signal placement, as one additional bit is needed for coding. For data rates of 19.2 Kb / s and above, the modem, even if it can be coded, becomes too sensitive to the additional noise generated in the telephone channel, so the number of points in the signal arrangement. Is difficult to increase. Instead, it is possible to increase the symbolic velocity sent through the channel while keeping the number of points reasonable. Worse, the increase in symbolic speed results in increased bandwidth for the transmitted analog signal, as well as severe amplitude distortion of the low and high frequency signals through the telephone channel. Dealing with severe amplitude distortion causes a so-called noise increase problem, which is very unpleasant for the linear equalizer 110 in Fig. 1. A linear equalizer essentially "inverts" the channel. That is, it produces a large gain in the frequency domain, which causes severe loss in the channel. Such an operation equalizes the channels and eliminates inter-symbol interference, while amplifying noise and degrading receiver performance. It is not desirable to use a linear equalizer for data transmission over the public switched telephone network at 19.2 Kb / s and above, and a decision feedback equalizer (DEF) should be used instead. Has been done. Although such an equalizer suppresses noise increase, it cannot be used in combination with standard trellis coding, as described below. FIG. 2 shows a communication system 200 that employs the present invention. In transmitter 201, bit rate r_dThe input binary data stream of is first entered into the error correction coder 204, which usually has a somewhat higher bit rate r._cEncoded into another bitstream with. As an embodiment, the encoder 204 can implement a Reed-Solomon code or a well-known variant thereof, an interleaved Reed-Solomon code. The bitstream at the output of the encoder 204 then, according to the invention, sends continuous bits, or blocks of bits, through the switch 205 to a plurality of M parallel encoders 206-i. Here, i = 1,2, ..., M. This routing is cyclical for convenience, bit b_nIs sent to the encoder 206-1 and the bits_{n + 1}Is sent to the encoder 206-2, and the following bits are sent in the same way, and after M bits, bit b_{n + M}Is sent to coder 206-1 again and a new cycle is started. Alternatively, blocks of continuous bits can be sent cyclically, i.e., in some ordered way, to the encoder 206-i. As an embodiment, the coder 206-i can use the type of convolutional coder used in standard trellis coders. Switch 207 takes the outputs of encoders 206-i, preferably cyclically, and sends them at symbol speeds 1 / T to a symbol mapping device 208 that produces two-dimensional symbols of the type shown in FIG. Where T is the symbolic period. In this embodiment, where the encoder 206-i is a convolutional code, the cascade of code 206-i with the symbol mapping device 208 can be considered functionally the same as the trellis code. The parallel placement cascade and symbol mapping device 208 of the coder 206-i is functionally the same as the M parallel trellis coders, each producing an output symbol at a speed of 1 / MT, at which the signal is on the phone channel. It is M times slower than the speed transmitted to 1 / T. Time division multiplexing, or interleaving, of the output of M trellis encoders achieves the desired 1 / T symbolic velocity. At receiver 203, the received signal is initially equalized by DFE210 (details below). The output sample of DFE210 is sent separately by switch 215 to the parallel banks of M decoders 216-i. Here, i = 1,2, ..., M. The repathing, or deinterleaving, operation performed on switch 215 must be consistent with the interleaving operation performed by switches 205 and 207 on the transmitter. That is, if the interleave is made cyclically receiving the output of the encoder 206-i, the switch 215 must cyclically send the continuous output from the DFE210 to the decoder 216-i. As an embodiment, each decoder 216-i can be implemented as a trellis decoder that produces a decoding output symbol at a rate M times slower than the rate at which the symbol is sent over the channel. Switch 217 preferably receives the outputs of decoder 216-i cyclically and receives them in bit rate r._cTime-multiplex to the bitstream of. This bitstream is sent to the error-correcting decoder 218, where the bit rate r_dGenerate an information bitstream of. It should be noted in Figure 2 that the behavior of the two switches on the transmitter must be synchronized, and the behavior of the two switches on the receiver must also be synchronized. However, the operation of the transmitter switch does not have to be synchronized with that of the receiver. In order to correctly evaluate the performance gains provided by the communication system 200, it is necessary to understand the shortcomings of the device that combines standard trellis coding and DFE. The DFE210 in FIG. 2 reduces the intersymbol interference caused by the channel amplitude distortion rather than simply repeating the channel amplitude, so that the noise increase can be reduced as compared with the linear equalizer. This is achieved by using the adaptive feedforward filter 211, slicer 213, adaptive feedback filter 214, subtractor 212. The slicer 213 operates in the same manner as the slicer 111 of FIG. 1 used to decode the symbol of the uncoded 9.6 Kb / s modem. That is, within a given symbolic period, the slicer 213 selects the point with the closest signal arrangement at the Euclidean distance to the complex sample present at the input. If the slicer 213 makes an error by selecting the wrong symbol, this error is usually generated by the subtractor 212, even if the additional noise did not generate these errors alone. Affects slicing and leads to more slicing errors. This phenomenon is unique to the operation of the DFE due to the feedback path provided by the feedback filter 214 and is called error propagation. The effect of false propagation is to result in strong, bursty, impulse noise after the subtractor 212. From FIG. 3, it should be noted that standard trellis coding requires an increase in the magnitude of the signal arrangement when compared to an uncoded system that gives the same bit rate. In the case of FIG. 3, when going from the uncoded option to the trellis coded option, the number of points in the signal arrangement had to be doubled. This increase in the number of points in the signal arrangement leads to a decrease in the distance between adjacent points. If the output of the linear equalizer 110 in Figure 1 passes through the slicer for both coded and uncoded operating modes, the probability of misjudgment due to additional noise is higher than the uncoded system. It is clear that the coding system is significantly higher. (In an example of the V.32 modem coding option, the output of the linear equalizer 110 is first processed by the trellis decoder 112 before slicing occurs, and the net result is a real significant increase in noise immunity. Therefore, if DFE210 is used in receiver 103 instead of linear equalizer 110, the probability that the slicer 213 will make an error is significantly higher in coded operation mode than in uncoded operation mode. .. Further, as described above, each slicing error is likely to cause the next slicing error due to the error propagation effect. The burst of noise generated by the DFE significantly reduces the performance of the standard trellis decoder, in which case an uncoded system using the DFE or a trellis coding system using the linear equalizer will use the DFE for a given channel. It has been empirically found to provide better performance than systems using standard trellis coding and DFE. The performance improvement provided by the communication system 200 of the present invention is due to the coordination of the two correction actions for the strong burst-like impulse noise generated at the output of the subtractor 212 when error propagation occurs. The first operation is to separate this burst noise into small jams that can be easily handled by a decoding device such as a trellis decoder. This is achieved by using the encoder 206-i in the transmitter and the decoder 216-i in the receiver. Here, i = 1,2, ..., M. When a noise burst occurs at the output of subtractor 212, a contiguous sample of this noise is sent to a different decoder 216-i. As a result, each decoder handles a small amount of noise, which makes noise correction easier than if a single decoder corrects the entire burst. For example, M trellis decoders (M> It has been empirically found that the parallel device of 1) always shows better performance than the system using only one trellis decoder (M = 1). However, for a channel, one of the trellis decoders, 216-1 for convenience of explanation, may still have a noise sample at its input that is strong enough to interfere with the decoding process. It has been found that there is. In this case, the bitstream obtained after switch 217 is a block of bursty bits generated by decoder 216-1 that are likely to be erroneous, and other decoders 216- that are generally not in erroneous state. Interleaved with a block of other bits generated by i (i 1). There are well-known coding methods such as various variants of the Reed-Solomon code suitable for handling this type of burst string of error bits. The transmitter encoder 204 and the receiver decoder 218 perform such a coding method to provide a second correction operation that mitigates the fault effect of the DFE error propagation problem. It should be pointed out that the use of encoder 204 usually results in a slight increase in bandwidth for analog data signals transmitted by channel 202. However, this increase in bandwidth is kept small enough that the benefits resulting from the use of the transmitter encoder 204 and the corresponding receiver decoder 218 outweigh the degradation in modem performance. There is a third technique to improve the performance of receiver 203 in Figure 2. This technique can be used when the parallel arrangement of M convolutional codes 206-i in transmitter 201 and the symbol mapper 208 are M trellis codes as described above. In this case, the decoder 216-i of receiver 203 must be implemented as a parallel bank of M trellis decoders. This technique is made possible by the implementation of a "smart" slicer whose determination process is determined by the information received from one of the decoders 216-i in a given symbolic period. For purposes of illustration, it is assumed that during the symbolic period considered, the output of subtractor 212 is connected to the input of trellis decoder 216-1 via switch 215. In the next symbolic period, the technique described below is repeated in decoder 216-2, and so on. Before describing the technique, the operation of the trellis encoder will be briefly described with respect to the signal arrangement 302 of the coding V.32 of FIG. See Theory (January 1982)). For the purposes of explanation, only the first partition needs to be considered. This division in the signal arrangement 302 has, for example, 32 points each having 16 points, and the shortest distance between the adjacent points in the subset is the same as the shortest distance between the adjacent points in the uncoded arrangement 301. It can be divided into two subsets A and B, such as. For example, if points 305 and 307 belong to subset A, then points 306 and 308 belong to subset B. In a given symbol cycle, only one of the two subsets A and B can be used to select the symbol transmitted by the channel. The subset to be used is determined by the so-called state of the encoder during this symbolic period. The transition from one state in a given symbol cycle to another in the next symbol cycle is optional and is determined by the selected convolutional code. Returning to receiver 203, suppose trellis decoder 216-1 receives a new input sample from subtractor 212 via switch 215. The trellis decoder 216-1 can monitor all allowed sequences of state transitions and can give each sequence a likelihood metric by processing a long enough string of input samples. In this way, it can determine whether the newly received sample more preferably belongs to either subset A or B. The trellis decoder 216-1 then sends this information to the smart slicer 213 via the dotted line 219, which depending on the information received from the decoder 216-1 is whether subset A or B. Slice with respect to either reference point. If the state information used by the smart slicer 213 is always correct, its performance (probability of making an error) is that of a more simplified "dumb" slicer operating the uncoded signal arrangement 301. Same as performance. In practice, some performance degradation is observed, but the smart slicer always outperforms the dam slicer when manipulating the coding arrangement 302. That technology Although some embodiments of the present invention have been described, those skilled in the art will readily understand other device configurations according to the present invention. For example, although the embodiments of the present invention have described elements that function separately, one or more functions of these elements may be combined with one or more more well-programmed general purpose processors, or It can be provided by dedicated integrated circuits, or digital signal processors, or analog or hybrid counterparts of these devices. For example, although the present invention has been described above with respect to an embodiment suitable for a special two-dimensional signal arrangement, the present invention is also applicable to other two-dimensional signal arrangements. In fact, the present invention is also applicable to signal arrangements other than two dimensions. In addition, although the Reed-Solomon error correction code is implemented in the coder 204 and the decoder 218, other types of codes that correct the burst of error bits can also be used. Further, in the disclosed embodiment, the encoder 206-i and the symbol mapping device 208 operate as a trellis decoder and the decoder 216-i operates as a trellis decoder, while each encoder 206-i It can operate independently of the symbol mapping device so as not to form a trellis coder, but instead to form a block coder or convolutional coder. In such applications, each decoder 216-i operates as a block decoder or a convolutional decoder. Finally, the present invention is not limited to the audio band and can be used for substantially any communication including high-definition television systems.

[Simple explanation of drawings]

FIG. 1 shows a conventional communication system using a linear equalizer with or without error correction. FIG. 2 is a diagram showing an embodiment of a communication system using the present invention. FIG. 3 is a diagram showing a signal arrangement useful for understanding the present invention.