Liquid crystal display device
Abstract
Problem to be solved.To provide a liquid crystal display device having a holding capacity for electrically connecting to a pixel TFT.
Solution.A holding capacitance connected to a pixel TFT is formed from a light-shielding film, a third interlayer insulating film, and a pixel electrode. As the pixel electrode, a transparent conductive film may be used in the case of a transmissive liquid crystal display device, and a metal film may be used in the case of a reflective liquid crystal display device. The light-shielding film is a film containing one or more elements selected from Al, Ti, and Ta as main components. [Selection diagram] Fig. 4

Term
Projected expiry 8 June 2037.
- Priority
- Filed
- Published
- Today
- Projected expiry
3 claims: 2 independent, 1 dependent
- 1表示領域と、駆動回路領域とを有し、 前記表示領域は、 基板上の、第1のゲート電極と、 前記基板上の、第2のゲート電極と、 前記第1のゲート電極上の、ゲート絶縁膜と、 前記第2のゲート電極上の、前記ゲート絶縁膜と、 前記ゲート絶縁膜上の、半導体膜と、 前記半導体膜上の、第1の絶縁膜と、 前記第1の絶縁膜上の、配線と、 前記配線上の、第2の絶縁膜と、 前記第2の絶縁膜上の、第1の電極と、 前記第1の電極上の、第3の絶縁膜と、 前記第3の絶縁膜上の、第2の電極と、を有し、 前記第2の電極は、画素電極として機能する領域を有し、 前記半導体膜は、第1の不純物領域と、第1のチャネル形成領域と、第2の不純物領域と、第2のチャネル形成領域と、第3の不純物領域とを有し、 前記半導体膜は、前記半導体膜上からみたとき、前記第1のチャネル形成領域と、前記第2のチャネル形成領域との間に曲がった領域を有し、 前記第1のチャネル形成領域は、前記第1のゲート電極と重なる領域を有し、 前記第2のチャネル形成領域は、前記第2のゲート電極と重なる領域を有し、 前記第1のゲート電極は、ゲート配線の一部であり、 前記第2のゲート電極は、前記ゲート配線の一部であり、 前記第1の絶縁膜は、第1の開口を有し、 前記第2の絶縁膜は、第2の開口を有し、 前記第3の絶縁膜は、第3の開口を有し、 前記第1の電極は、第4の開口を有し、 前記第1の不純物領域は、前記第1の開口を介して、前記配線と電気的に接続され、 前記第4の開口は、前記第3の開口と重なる領域を有し、 前記第3の開口は、前記第2の開口と重なる領域を有し、 前記第2の電極は、前記第2の開口、前記第3の開口、及び前記第4の開口を介して、前記配線と電気的に接続され、 前記第2の電極は、前記第1の開口と重ならない領域で、前記配線と接する第1の領域を有し、 前記第1の領域は、前記第1のゲート電極と重ならず、 前記第1の領域は、前記第2のゲート電極と重ならず、 前記第2の電極は、前記第3の絶縁膜を介して、前記第1の電極と重なる領域で、容量素子の電極として機能し、 前記第3の絶縁膜は、前記第1の電極を形成する材料の酸化物、又は窒化シリコン膜を有することを特徴とする液晶表示装置。
- 2表示領域と、駆動回路領域とを有し、 前記表示領域は、 基板上の、第1のゲート電極と、 前記基板上の、第2のゲート電極と、 前記第1のゲート電極上の、ゲート絶縁膜と、 前記第2のゲート電極上の、前記ゲート絶縁膜と、 前記ゲート絶縁膜上の、半導体膜と、 前記半導体膜上の、第1の絶縁膜と、 前記第1の絶縁膜上の、配線と、 前記配線上の、第2の絶縁膜と、 前記第2の絶縁膜上の、第1の電極と、 前記第1の電極上の、第3の絶縁膜と、 前記第3の絶縁膜上の、第2の電極と、を有し、 前記第2の電極は、画素電極として機能する領域を有し、 前記半導体膜は、第1の不純物領域と、第1のチャネル形成領域と、第2の不純物領域と、第2のチャネル形成領域と、第3の不純物領域とを有し、 前記半導体膜は、前記半導体膜上からみたとき、前記第1のチャネル形成領域と、前記第2のチャネル形成領域との間に曲がった領域を有し、 前記第1のチャネル形成領域は、前記第1のゲート電極と重なる領域を有し、 前記第2のチャネル形成領域は、前記第2のゲート電極と重なる領域を有し、 前記第1のゲート電極は、ゲート配線の一部であり、 前記第2のゲート電極は、前記ゲート配線の一部であり、 前記第1の絶縁膜は、第1の開口を有し、 前記第2の絶縁膜は、第2の開口を有し、 前記第3の絶縁膜は、第3の開口を有し、 前記第1の電極は、第4の開口を有し、 前記第1の不純物領域は、前記第1の開口を介して、前記配線と電気的に接続され、 前記第4の開口は、前記第3の開口と重なる領域を有し、 前記第3の開口は、前記第2の開口と重なる領域を有し、 前記第2の電極は、前記第2の開口、前記第3の開口、及び前記第4の開口を介して、前記配線と電気的に接続され、 前記第2の電極は、前記第1の開口と重ならない領域で、前記配線と接する第1の領域を有し、 前記第1の領域は、前記第1のゲート電極と重ならず、 前記第1の領域は、前記第2のゲート電極と重ならず、 前記第2の電極は、前記第3の絶縁膜を介して、前記第1の電極と重なる領域で、容量素子の電極として機能し、 前記第3の絶縁膜は、前記第1の電極を形成する材料の酸化物、又は窒化シリコン膜を有し、 前記第4の開口において、前記第3の絶縁膜は、前記第1の電極の側面と重なる領域を有することを特徴とする液晶表示装置。
- 3請求項1又は請求項2において、 前記第2の絶縁膜は、有機材料を有することを特徴とする液晶表示装置。
Independent claims3
23 paragraphs, as filed
0001The present invention is a thin film transistor (hereinafter referred to as TFT) on a substrate having an insulating surface. The present invention relates to a method for manufacturing a semiconductor device having a circuit composed of. In particular, the present invention covers the display area. A liquid crystal in which the provided pixel TFT and the drive circuit provided around the display area are provided on the same substrate. Electro-optic devices represented by display devices, and electronic devices equipped with such electro-optic devices. Can be suitably used for. In the specification of the present application, the semiconductor device uses semiconductor characteristics. Refers to all devices that function with, the above electro-optic device and the electron equipped with the electro-optic device. Equipment is included in that category.
0002A TFT (hereinafter referred to as a crystal) in which an active layer is formed of a crystalline silicon film on a substrate having an insulating surface. Since quality silicon TFT) has high field-effect mobility, it forms various functional circuits. The electro-optical device in which such a functional circuit is integrally formed on the same substrate. The device is being developed. The active matrix type liquid crystal display device is well known as a typical example. It has been.
0003The active matrix type liquid crystal display device using the crystalline silicon TFT has an image display area. A pixel TFT is formed in each pixel of the above, and a drive circuit is provided around the image display area. The drive circuit is a shift register circuit and level shifter circuit formed on the basis of a CMOS circuit. , Buffer circuit, sampling circuit, etc., and such a circuit is formed on the same board. The display device is completed as a unit.
0004Since the operating conditions of the pixel TFT and the drive circuit are not always the same, it is decided to use the TFT. The required characteristics are also quite different. For example, a pixel TFT applies a voltage to a liquid crystal. The function as a switch element for this is required. Since the liquid crystal is driven by alternating current, it is flaky. A method called a boom reversal drive is often adopted. In this method, in order to retain the charge of the holding capacitance, the characteristic required for the pixel TFT is off-electricity. The flow value (drain current flowing when the TFT is off) was to be sufficiently low. on the other hand, Since a high drive voltage is applied to the buffer circuit of the drive circuit, it will not break even if a high voltage is applied. Therefore, it was necessary to increase the withstand voltage of the TFT. Also, in order to increase the current drive capacity, It was necessary to secure a sufficient current value (drain current that flows when the TFT is on).
0005However, there is a problem that the off-current value of the crystalline silicon TFT tends to be high. .. Also, as with MOS transistors used in ICs, crystalline silicon TFTs are not available. Deterioration phenomena such as a decrease in current value are observed. The main cause is hot carrier injection. Yes, hot carriers generated by a high electric field near the drain cause deterioration. It is believed that.
0006Low-concentration drain (LDD: Lightly) as a TFT structure to reduce the off-current value Doped Drain) structure is known. This structure has channel formation regions and high concentrations of impurities Impurity elements are added at a low concentration between the source region or drain region formed by adding elements. The added area is provided, and this area is called the LDD area.
0007Regarding the method for producing a TFT having an LDD region, for example, Japanese Patent No. 2564725 states that The gate insulating film is formed wider in the channel width direction than the gate electrode, and further from the gate insulating film. A thin insulating film is formed next to it, and the gate is made by utilizing the difference in thickness between the insulating film and the gate insulating film. A method of forming an LDD region on a semiconductor film between the end of an electrode and a source or drain region It is disclosed.
0008In addition, as a means to prevent deterioration due to hot carriers, the LDD region is gated with an insulating film. The so-called GOLD (Gate-drain Overla), which is arranged so as to overlap the gate electrode via pped LDD) structure is known. With such a structure, a high electric field near the drain Is alleviated to prevent hot carrier injection, which is effective in preventing deterioration phenomena. For example, "Mutu ko Hatano, Hajime Akimoto and Takeshi Sakai, IEDM97 TECHNICAL DIGEST, p523-526,199 7 "discloses the GOLD structure formed by the side wall made of silicon. However, it has been confirmed that extremely excellent reliability can be obtained compared to TFTs with other structures. ..
0009Impurities such as the source region, drain region, and LDD region of a TFT with such a structure The introduction of the impurity element into the semiconductor layer for forming the region is performed by the gate electrode provided on the semiconductor layer. It was desirable to use a self-aligned method using an insulating film for masks and masks. further, In order to reduce the number of masks, once a gate electrode or an insulating film for masks is used, the entire surface is a conductive type. P-channel TFT or n-channel TFT with higher concentration of impurity elements Introduce a conductive type impurity element opposite to the one conductive type into the impurity region of one of the TFTs. (In this specification, it is referred to as a cross-doping method).
<p num="0010"> However, the pixel TFT and the T of the drive circuit such as the shift register circuit and the buffer circuit The required characteristics of FT are not always the same. For example, in pixel TFT Has a large reverse bias (negative voltage in n-channel TFTs) applied to the gate, but drives The TFT of the circuit basically does not operate in the reverse bias state. Also, regarding the operating speed However, the pixel TFT was good at 1/100 or less of the TFT of the drive circuit.</p><p num="0011"> The GOLD structure is highly effective in preventing deterioration of the on-current value, but on the other hand, it is different from the normal LDD structure. There was a problem that the off-current value became larger than that. Therefore, to apply to pixel TFT Was not a preferred structure. On the contrary, the normal LDD structure is highly effective in suppressing the off-current value. , The effect of relaxing the electric field near the drain and preventing deterioration due to hot carrier injection was low. In this way, a plurality of integrated devices having different operating conditions, such as an active matrix type liquid crystal display device. In a semiconductor device having a circuit, it is not always preferable to form all TFTs with the same structure. It wasn't good. Such a problem has its characteristics, especially in crystalline silicon TFTs. It becomes more apparent as the performance required for active matrix liquid crystal display devices increases. I've been doing it.</p><p num="0012"> In addition, although there are several means for reducing the off-current value of the TFT, the channel formation region Good bond between and the impurity region (LDD region, source region or drain region) Was necessary. For that purpose, the boundary between the channel formation region and the impurity region in contact with it. It was necessary to precisely control the distribution of impurity elements on the surface. However, the aforementioned cross-do When the method is carried out, one conductive impurity element is found in the impurity region of the TFT, and what is it? The opposite conductive type impurity element is introduced, and the distribution of the impurity element at the interface is precisely controlled. It was difficult to control.</p><p num="0013"> Such an LDD structure was formed with an emphasis on the characteristics of the n-channel TFT. .. The p-channel TFTs that are formed on the same substrate to form CMOS circuits, etc. It was often formed with a single drain structure in order to reduce the number of screws as much as possible. However, in that case, the n-channel TF is located in the source or drain region of the p-channel TFT. Phosphorus (P) for LDD formation of T is doped, and there is a defect in the junction with the channel formation region. There was a problem that it was formed and the off-current value increased.</p><p num="0014"> The present invention is a technique for solving such a problem, and is arranged in each circuit of a semiconductor device. By making the structure of the TFT suitable according to the function of the circuit, the operation of the semiconductor device The purpose is to improve the cropping characteristics and reliability.</p>
<p num="0015"> In order to solve the above problems, the configuration of the present invention includes a pixel TFT provided in the display area and the display. The n-channel type TFT and p-channel type TFT of the drive circuit provided around the area are placed on the same board. In the semiconductor device having the pixel TFT and the TFT of the drive circuit, the active layer and the said A gate insulating film provided between the LDD region provided in the active layer and the active layer and the substrate. And a gate electrode provided between the gate insulating film and the substrate, the pixel TFT and the front The LDD region of the n-channel TFT of the drive circuit overlaps with the gate electrode at least in part. The LDD region of the p-channel TFT of the drive circuit is arranged so as to be the gate electric power. It is characterized by being arranged so that all the poles overlap. In addition, with the pixel TFT The LDD region of the n-channel TFT with the drive circuit is the channel provided in the TFT. Arranged so that it does not overlap with the protective insulating film and at least partly overlaps with the gate electrode. Note: Does the LDD region of the p-channel TFT of the drive circuit overlap with the protective insulating film of the TFT? One is that it is arranged so as to overlap with the gate electrode.</p><p num="0016"> Further, in the configuration of another invention, the p-channel type TFT of the drive circuit is impure to give the p-type. Impurity region (A) containing both a physical element and an impurity element that imparts n-type, and a p-type is imparted. It has an impurity region (B) containing only impurity elements, and the impurity region (B) is the impurity. It is formed between the region (A) and the LDD region of the p-channel TFT of the drive circuit. It is characterized by.</p><p num="0017"> This structure is a source or dray of a p-channel TFT without increasing the number of masks. Phosphorus (P) doped in the region is doped at the junction with the channel formation region. The structure is not suitable, and the purpose is to reduce the off-current value.</p><p num="0018"> The holding capacitance connected to the pixel TFT is the capacitance wiring formed on the substrate and the capacitance distribution. It is formed from an insulating film formed on a wire and a semiconductor layer formed on the insulating film. Alternatively, an organic resin film is formed on the pixel TFT, and light shielding is formed on the organic resin film. A film, a dielectric film formed in close contact with the light-shielding film, and a part thereof are provided so as to overlap the light-shielding film. It is characterized in that a capacitance is formed from a pixel electrode connected to the pixel TFT. There is.</p><p num="0019"> In order to solve the above problems, the method for manufacturing a semiconductor device of the present invention is a pixel provided in a display area. TFT and n-channel TFT and p-channel TF of the drive circuit provided around the display area In a method for manufacturing a semiconductor device having T on the same substrate, the pixel TFT and the n chi A step of forming an LDD region in a channel type TFT that at least partially overlaps with the gate electrode. And, in the p-channel type TFT of the drive circuit, the LDD region where all overlaps with the gate electrode is provided. It is characterized by having a step of forming. In addition, the pixel TFT and the n channel The type TFT does not overlap with the channel protective insulating film of the TFT, and at least with the gate electrode. This applies to the process of forming the LDD region where some parts overlap and the p-channel TFT of the drive circuit. LDD area that overlaps with the channel protective insulating film of the TFT and overlaps with the gate electrode. It is characterized by having a process of forming a region.</p><p num="0020"> In the method for manufacturing a semiconductor device, a p-type is added to the p-channel type TFT of the drive circuit. Impurity region (A) containing both the imparting impurity element and the n-type imparting impurity element, and the p-type It has a step of forming an impurity region (B) containing an impurity element that imparts the above-mentioned impurity region. (B) is the impurity region (A) and the LDD region of the p-channel TFT of the drive circuit. It is desirable to form between them.</p><p num="0021"> Further, the configuration of another invention is provided in the pixel TFT provided in the display area and around the display area. A semiconductor device that has an n-channel type TFT and a p-channel type TFT of a drive circuit on the same substrate. In the method of manufacturing the table, the first step of forming the gate electrode on the substrate and the gate electrode The second step of forming the gate insulating film and the first and second semiconductors on the gate insulating film. A third step of forming a layer and forming a channel protective film on the first and second semiconductor layers. In the fourth step and the impurity element that imparts n-type to the first semiconductor layer, the cha The fifth step of forming the LDD region of the n-channel TFT that does not overlap the flannel protective film, and the above By introducing an impurity element that imparts n-type to the first semiconductor layer, the source region of the n-channel TFT The p-type is imparted to the sixth step of forming the region or the drain region and the second semiconductor layer. By introducing an impurity element, the LDD region of the p-channel TFT that overlaps the channel protection film It is characterized by having a seventh step of forming a source region or a drain region.</p><p num="0022"> In the method for manufacturing a semiconductor device of the present invention, the step of forming a capacitive wiring on the substrate A step of forming an insulating layer on the capacitive wiring and a step of forming a semiconductor layer on the insulating layer. The process of forming a holding capacitance connected to the pixel TFT, or organic on the pixel TFT. A step of forming a resin layer, a step of forming a light-shielding film on the organic resin, and a step of closely contacting the light-shielding film. A step of forming a dielectric film and a part of the pixel TFT provided so as to overlap the light-shielding film. It is characterized in that a capacitance is formed from a step of forming a pixel electrode to be connected. The shading The film is made of a material containing one or more selected from aluminum, tantalum and titanium. However, the dielectric film is preferably formed of an oxide of a material that forms the light-shielding film. Most preferably, the anodizing method is used as the method for forming the oxide.</p>
<p num="0023"> By using the present invention, a semiconductor device in which a plurality of functional circuits are formed on the same substrate (here). Then, specifically, in the electro-optical device), the appropriate properties according to the specifications required by the functional circuit. Noh TFTs can be placed, and their operating characteristics and reliability can be greatly improved. Can be done.</p><p num="0024"> In particular, in a bottom gate type or inverted stagger type TFT provided with an LDD area, an image is displayed. The LDD area of the plain TFT is n<sup>-</sup>By forming Loff at the concentration of Can contribute to lowering the power consumption of the pixel TFT. In addition, the drive circuit n The LDD area of the channel type TFT is n<sup>-</sup>By forming Lov + Loff at the concentration of Improves drive capability, prevents deterioration due to hot carriers, and reduces deterioration of on-current value be able to.</p><p num="0025"> Furthermore, in the p-channel type TFT of the drive circuit, the impurity element and n-type that impart p-type are added. Impurity region (B) containing both the impurity element to be added and the impurity element to give the p-type It has an impurity region (A), and the impurity region (A) is the impurity region (A) and the drive. By being formed between the LDD region of the p-channel type TFT of the dynamic circuit, the channel The formation region and the LDD region in contact with it, and the LDD region and the source region or drain region. The bond formation with is ensured, and the characteristics of the p-channel TFT can be maintained well. ..</p><p num="0026"> Further, a semiconductor device having such an electro-optical device as a display medium (specifically, here). The operating performance and reliability of electronic devices) can also be improved.</p>
0027<figref num="1">The figure which shows the manufacturing process of the pixel TFT and the TFT of the drive circuit.</figref><figref num="2">The figure which shows the manufacturing process of the pixel TFT and the TFT of the drive circuit.</figref><figref num="3">The figure which shows the manufacturing process of the pixel TFT and the TFT of the drive circuit.</figref><figref num="4">The figure which shows the manufacturing process of the pixel TFT and the TFT of the drive circuit.</figref><figref num="5">The figure which shows the manufacturing process of a crystalline semiconductor film.</figref><figref num="6">The figure which shows an example of the cross-sectional structure of the holding capacity.</figref><figref num="7">The figure which shows an example of the cross-sectional structure of the holding capacity.</figref><figref num="8">The figure which shows the cross-sectional structure of the active matrix type liquid crystal display device.</figref><figref num="9">A perspective view of an active matrix type liquid crystal display device.</figref><figref num="10">Top view of the pixel.</figref><figref num="11">The figure which shows an example of the semiconductor device.</figref><figref num="12">The figure which shows the manufacturing process of the pixel TFT and the TFT of the drive circuit.</figref><figref num="13">The figure which shows the manufacturing process of the pixel TFT and the TFT of the drive circuit.</figref>
0028Embodiments of the present invention will be described in detail with reference to the following examples.
<p num="0029"> Examples of the present invention will be described with reference to FIGS. 1 to 3. Here, the pixel TFT in the display area and Follow the process for how to simultaneously fabricate the TFTs of the drive circuits provided around the display area. Will be explained in detail.</p><p num="0030">(Formation of gate electrode, gate insulating film, crystalline semiconductor film: Fig. 1 (A)) In FIG. 1 (A), a low alkali glass substrate or a quartz substrate may be used for the substrate 101. it can. A silicon oxide film and a silicon nitride film are formed on the surface of the substrate 101 on which the TFT is formed. Alternatively, an insulating film such as a silicon nitride film may be formed (not shown). Gate electricity The poles 102 to 104 and the capacitance wiring 105 are tantalum (Ta), titanium (Ti), and tongue. Element selected from ten (W), molybdenum (Mo), aluminum (Al) or any Using a material whose main component is K After forming the pattern, the pattern was formed by etching so that the end face had a tapered shape. Example For example, a Ta film is formed to a thickness of 200 nm by a sputtering method, and a resist mask is formed into a predetermined shape. After forming, CF<sub>4</sub>And O<sub>2</sub>If plasma etching treatment is performed with the mixed gas of, it will be processed into the desired shape. can do. Also, the gate electrodes are tantalum nitride (TaN) and Ta or tongue nitride. It may have a two-layer structure of stainless steel (WN) and W (not shown). Although not shown here The gate wiring to be connected to the electrode is also formed at the same time.</p><p num="0031"> The gate insulating film 106 is a material containing silicon oxide and silicon nitride as components, and is 10 to 200. It is formed with a thickness of nm, preferably 50 to 150 nm. For example, in the plasma CVD method, Si H<sub>4</sub>, NH<sub>3</sub>, N<sub>2</sub>Silicon nitride film 106a made from 50nm, SiH<sub>4</sub>And N<sub>2</sub>Original O The silicon nitride film 106b used as a material is laminated to a thickness of 75 nm to form a gate insulating film. You may. Of course, there is no problem even if it is a single layer composed of a silicon nitride film or a silicon oxide film. I. Also, in order to obtain a clean surface, plasma hydrogen treatment is applied before the formation of the gate insulating film. It was good.</p><p num="0032"> Next, a crystalline semiconductor film to be the active layer of the TFT was formed. For materials of crystalline semiconductor membranes Used silicon. First, in close contact with the gate insulating film 106, with a thickness of 20 to 150 nm. The amorphous silicon film was formed by a known film forming method such as a plasma CVD method or a sputtering method. Amorphous The conditions for producing a quality silicon film are not limited, but impurities of oxygen and nitrogen contained in the film are not limited. 5x10 elements<sup>18</sup>cm<sup>-3</sup>It is desirable to reduce it to the following. Also, the gate insulating film and non-gate insulating film Since the crystalline silicon film can be formed by the same film forming method, both may be continuously formed. .. After forming the gate insulating film, it is possible to prevent contamination of the surface by not exposing it to the atmosphere once. To reduce the variation in the characteristics of the manufactured TFT and the fluctuation of the threshold voltage. Can be done. Then, a crystalline silicon film 107 is formed using a known crystallization technique. example For example, laser crystallization method, thermal crystallization method (solid phase growth method), or JP-A-7-130652. In accordance with the technique disclosed in the publication, the crystalline silicon film 107 is formed by a crystallization method using a catalytic element. It may be formed.</p><p num="0033"> A threshold voltage is applied to the region where the n-channel TFT of the crystalline silicon film 107 is formed. 1x10 for control purposes<sup>16</sup>~5×10<sup>17</sup>cm<sup>-3</sup>You may add a certain amount of boron (B). I. Boron (B) may be added by the ion doping method, or an amorphous silicon film is formed. It can also be added at the same time.</p><p num="0034">(Mask insulating film formation, n<sup>-</sup>Region formation: Figure 1 (B)) Next, an impurity element that imparts n-type to form the LDD region of the n-channel TFT. Was added. First, a silicon oxide film or silicon nitride is formed on the surface of the crystalline silicon film 107. A mask insulating film 108 composed of a film is formed to a thickness of 100 to 200 nm, typically 120 nm. It was done. After forming a photoresist film on the entire surface, exposure from the back surface of the substrate 101 By the method, the photoresist film is exposed to light using the gate electrodes 102 to 104 as a mask, and the gate is exposed. Resist masks 109 to 112 were formed on the electrodes. By this method, on the gate electrode Therefore, a resist mask could be formed inside the gate electrode.</p><p num="0035"> Then, n-type is imparted to the crystalline silicon film underneath the mask insulating film 108 via the mask insulating film 108. Impurity elements were added by an ion doping method (an ion implantation method may also be used). Impurity elements that impart n-type in the technical field of semiconductors include elements of Group 15 of the Periodic Table. Phosphorus (P), arsenic (As), antimony (Sb), etc. are applied, here Phosphorus (P) Using. The phosphorus (P) concentration in the formed impurity regions 113 to 118 is 1 × 10.<sup>17</sup>~5×10<sup>18</sup>cm<sup>-3</sup>It is desirable to set it to the range of, here, 5 × 10<sup>17</sup>cm<sup>-3</sup>And said. In the present specification Is the concentration of the impurity element that imparts the n-type contained in the impurity regions 113 to 118 (n).<sup>-</sup>)When Represent.</p><p num="0036">(Channel protection film formation: Fig. 1 (C)) Next, the mask insulating film 108 is etched and removed using this resist mask, and the channel is channeled. Protective films 119 to 122 were formed. Selectivity for the underlying crystalline silicon film 107 In order to etch the mask insulating film 108 well, a hydrofluoric acid-based solution is used here. The etching method was adopted. Of course, the dry etching method may be used, for example, CH. F<sub>3</sub>The insulating film 108 can be etched with gas. In any case, in this process Channel protection film inside the end faces of resist masks 109 to 112 after bar etching 119 ~ 122 were formed.</p><p num="0037">(n<sup>+</sup>Region formation: Fig. 2 (A)) Next, in an n-channel TFT, the impure function as the source region or drain region. The step of forming the formation of the object region was performed. Here, a mask with a resist is used by a normal exposure method. Formed 123-125. Then, using this resist mask, the chi on the capacitance wiring 105 The channel protective film 122 was removed by etching. Next, n-type on the crystalline silicon film 107 The impurity region 126 to 130 to which the impurity element is added is subjected to the ion doping method (ion). It may be formed by the injection method). 1 x 10 in impurity regions 126-130<sup>20</sup>~1×10<sup>21</sup>c m<sup>-3</sup>Here, 5x10<sup>20</sup>cm<sup>-3</sup>Impurity elements were included at the concentration of. This concentration In this specification (n<sup>+</sup>).</p><p num="0038">(p<sup>+</sup>Region formation: Figure 2 (B)) Next, in order to form the source region and drain region of the p-channel TFT of the drive circuit. Was subjected to a step of adding an impurity element that imparts p-type. P-type in the field of semiconductor technology Impurity elements that impart the above are boron (B) and aluminum (from the elements of Group 13 of the Periodic Table). Al), gallium (Ga), etc. were applied, and boron (B) was used here. Channel protection Mask 131 is formed so as to be located inside on the protective film 119, and an n-channel TFT is formed. All areas to be covered were covered with resist masks 132 and 133. And diborane (B<sub>2</sub>H<sub>6</sub>) Impurity regions 134 to 136 by the ion doping method (ion implantation method may be used) using Formed. Impurity regions 135a, 135b, 136a, 136b are tables of crystalline silicon film Impurity elements are added from the surface, and the boron (B) concentration in this region is 1.5 × 10.<sup>20</sup>~3×10<sup>21</sup>cm<sup>-3</sup>In the range of, here 2 × 10<sup>21</sup>cm<sup>-3</sup>And said. Formed here in the present specification Impurity that imparts p-type contained in the impurities regions 135a, 135b, 136a, 136b Concentration of elemental elements (p<sup>+</sup>). On the other hand, the impurity region 134 passes through the channel protection film 119. Since impurity elements are added to the crystalline silicon film, the boron (B) concentration in this region is 1 ×. Ten<sup>16</sup>~1×10<sup>18</sup>cm<sup>-3</sup>It became. In the present specification, the impurity region 13 formed here The concentration of the impurity element that imparts the p-type contained in 4 (p)<sup>-</sup>).</p><p num="0039"> As shown in FIGS. 1 (B) to 2 (A), the previous steps were applied to the impurity regions 135b and 136b. Since phosphorus (P) was added in, a region where boron (B) and phosphorus (P) were mixed was formed. However, p-type induction is achieved by increasing the concentration of boron (B) added in this step to 1.5 to 3 times that concentration. The electrical properties were secured and there was no effect on the characteristics of the TFT. In this specification, this Let the region be the impurity region (B). And the channel of impurity region (B) 135b, 136b Impurity regions 135a and 136a on the le-forming region side are regions containing only boron (B). , In the present specification, this region is referred to as an impurity region (A). It also overlaps the gate electrode 103. In addition, the impurity region 134 that also overlaps with the channel protection film 120 also contains only boron (B). Formed as a region, this region functions as an LDD region.</p><p num="0040">(Formation of the first interlayer insulating film, thermal activation process, hydrogenation process: Fig. 2 (C)) After selectively adding each impurity element to the crystalline silicon film, the crystalline silicon film is added. Protective insulating film that is etched to divide into islands and later becomes part of the first interlayer insulating film 137 Was formed. The protective insulating film 137 is a silicon nitride film, a silicon oxide film, or a silicon oxide film. Alternatively, it may be formed of a laminated film in which they are combined. The film thickness is 100 to 400 nm. It should be done.</p><p num="0041"> Then activate the impurity elements that impart the n-type or p-type added at the respective concentrations. Therefore, a heat treatment step was performed. This process is performed by Furnace Annealing Method, Laser Annealing Method, Alternatively, it can be performed by a rapid thermal annealing method (RTA method) or the like. Here is fa The activation step was carried out by the-ness annealing method. Heat treatment is 300 ~ 6 in a nitrogen atmosphere The heat treatment was performed at 50 ° C., preferably 500 to 550 ° C., here at 525 ° C. for 4 hours. Sa In addition, heat treatment at 300 to 450 ° C for 1 to 12 hours in an atmosphere containing 3 to 100% hydrogen. Was performed, and a step of hydrogenating the active layer was performed. This step is activated by thermally excited hydrogen This is the process of terminating the dangling bond of the layer. Plasma hydrogen as another means of hydrogenation Chemicalization (using hydrogen excited by plasma) may be performed.</p><p num="0042"> Crystallized silicon film 107 as an active layer is crystallized from an amorphous silicon film using a catalytic element. Approximately 1 × 10 in the crystalline silicon film 107 when produced by the chemical method<sup>17</sup>~5×10<sup>19</sup>cm<sup>-3</sup>The catalytic element of the above remained. Of course, even in such a state, the TFT can be completed and operated. There is no problem with this, but it is better to remove the residual catalytic element from at least the channel formation region. I liked it. Gettering with phosphorus (P) as one of the means to remove this catalytic element There was a way to use it. The concentration of phosphorus (P) required for gettering is formed in Fig. 2 (B). Impurity region (n<sup>+</sup>), And by the heat treatment of the activation step carried out here, Phosphorus (P) is added from the channel formation region of n-channel TFT and p-channel TFT. It was possible to getter the catalytic element to the surrounding impurity region to which it was added. resulting in Catalytic element concentration in the channel formation region 5 × 10<sup>17</sup>cm<sup>-3</sup>It is possible to do the following, 1x10 in the impurity region<sup>18</sup>~5×10<sup>20</sup>cm<sup>-3</sup>Catalytic elements were segregated.</p><p num="0043">(Formation of interlayer insulating film, formation of source / drain wiring, formation of passivation film, pixel electricity Pole formation: Figure 3) After the activation process is completed, an interlayer with a thickness of 500 to 1500 nm is provided on the protective insulating film 137. The limbus 138 was formed. The first laminated film composed of the protective insulating film 137 and the interlayer insulating film 138 is used. The interlayer insulating film was used. After that, it reaches the source area or drain area of each TFT. Source wiring 139 to 141 and drain wiring 142, 1 Formed 43. Although not shown, in this embodiment, this electrode is used with a Ti film of 100 nm and T. An aluminum film containing i and a Ti film of 150 nm were continuously formed by the sputtering method. It was a laminated film with a three-layer structure.</p><p num="0044"> The protective insulating film 137 and the interlayer insulating film 138 are a silicon nitride film, a silicon oxide film, or nitrogen. It may be formed of a silicon oxide film, but in any case, the internal stress of the film is used as the compressive stress. It was good to keep it.</p><p num="0045"> Next, a silicon nitride film, a silicon oxide film, or a silicon oxide film is used, and the passive film is used. Formation film 144 is formed with a thickness of 50 to 500 nm (typically 100 to 300 nm). It was. After that, if hydrogenation treatment is performed in this state, favorable results are obtained for improving the characteristics of the TFT. Was done. For example, from 1 to 12 o'clock at 300 to 450 ° C in an atmosphere containing 3 to 100% hydrogen. The same effect was obtained by performing the heat treatment during the period, or by using the plasma hydrogenation method. Here, a contact hole for connecting the pixel electrode and the drain wiring will be formed later. At the position, an opening may be formed in the passivation film 144.</p><p num="0046"> Then, a second interlayer insulating film 145 made of an organic resin film was formed to a thickness of about 1 μm. Suitable The organic resin materials that can be used include polyimide, acrylic, polyamide, and polyimide amide. , BCB (benzocyclobutene) and the like can be used. Here, a type of polyimide that is thermally polymerized after being applied to a substrate is used and fired at 300 ° C to form a shape. It was done. Then, the drain wiring 1 is applied to the second interlayer insulating film 145 and the passivation film 144. A contact hole reaching 43 was formed, and a pixel electrode 146 was provided. Pixel electrode 146 When a transmissive liquid crystal display device is used, a transparent conductive film is used, and when a reflective liquid crystal display device is used. A metal film may be used for this. Here, in order to make it a transmissive liquid crystal display device, Oxidized Indigo An indium tin oxide (ITO) film was formed to a thickness of 100 nm by a sputtering method. Pixel electrode 190 is next to it It is an electrode of a pixel in contact.</p><p num="0047"> In the above steps, the pixel TFT in the display area and the drive provided around the display area are provided on the same substrate. It was possible to form a TFT of the circuit. The drive circuit includes n-channel TFT168 and p. A channel type TFT167 is formed to form a logic circuit based on a CMOS circuit. Made possible. Pixel TFT 169 is an n-channel TFT, and capacitance wiring 10 A pixel TF has a holding capacity of 170 from 5 and the semiconductor layer 166 and the insulating film formed between them. Connected to T169.</p><p num="0048"> The p-channel type TFT 167 of the drive circuit has a channel formation region 147 and a source region 150. Has a, 150b, drain areas 151a, 151b and LDD areas 148, 149 ing. The source region 150b and the drain region 151b are formed by the impurity region (B). , The boron (B) concentration in this region is 1.5 to 3 times the phosphorus (P) concentration. That impurity The source region 150a formed inside the region (B), that is, on the side of the channel formation region 147. And drain region 151a is an impurity region (A), which has the same concentration as the impurity region (B). This is an area that contains only (B). In addition, it overlaps with the gate electrode 103 and protects the channel. LDD regions 148 and 149 that also overlap with the membrane 120 are also formed as regions containing only boron (B). To do. By moving the impurity region (B) away from the channel formation region in this way, the channel The formation region and the LDD region in contact with it, and the LDD region and the source region or drain region. The bond formation with the p-channel TFT was ensured, and the characteristics of the p-channel TFT could be maintained well. ..</p><p num="0049"> The n-channel type TFT168 of the drive circuit has a channel formation region 152 and a source region 15 It has 5 and a drain area 156, and LDD areas 153 and 154. Pixel TFT 169 includes channel formation regions 157, 158 and source or drain regions 163. It has ~ 165 and LDD areas 159 ~ 162. Drive circuit n-channel TFT The LDD region of is the on-current value due to hot carrier injection by relaxing the high electric field near the drain. The main purpose is to prevent the deterioration of the product, and an n-type suitable for that purpose is given. The concentration of impurity elements is 5 × 10<sup>17</sup>~5×10<sup>18</sup>cm<sup>-3</sup>I should have done it. On the other hand, pixel TFT The LDD region of is provided for the main purpose of reducing the off-current value, and its non-LDD region is provided. The concentration of pure elements may be the same as the concentration in the LDD region of the n-channel TFT of the drive circuit. However, it may be 1/2 to 1/10 of the concentration. In Figure 3, the pixel TFT 169 is double-gamed. Although it was completed as a structure, it may be a single gate structure or a machine with multiple gate electrodes. It may be a rutigate structure.</p><p num="0050"> As described above, the present invention configures each circuit according to the specifications required by the pixel TFT and the drive circuit. By optimizing the structure of the TFT, it is possible to improve the operating performance and reliability of semiconductor devices. We were able to.</p>
<p num="0051"> Using FIG. 4 of this embodiment, a holding capacity for connecting to the pixel TFT is provided with a structure different from that of the first embodiment. An example will be described. Drive circuit p-channel type TFT167, n-channel type TFT1 68 and pixel TFT169 were made in the same manner as in Example 1. Hereinafter, the differences from the first embodiment will be described.</p><p num="0052"> A light-shielding film 171 was formed on the second interlayer insulating film 145, at least on the pixel TFT. The light-shielding film 171 is a film containing one or more elements selected from Al, Ti, and Ta as main components. Then, a film was formed with a thickness of 100 to 300 nm, and a pattern was formed into a predetermined shape. In addition, this A third interlayer insulating film 172 was formed on the above using an organic resin film as well as the second interlayer insulating film. .. The thickness of the third interlayer insulating film 172 was 0.5 to 1 μm. And the third interlayer insulating film 1 72, the second interlayer insulating film 145, the passivation film 144 and the drain wiring 143 are reached. A contact hole was formed and a pixel electrode 173 was provided. The pixel electrode 173 is a transmissive liquid crystal. A transparent conductive film is used for a display device, and a metal film is used for a reflective liquid crystal display device. Should be used. Here, indium tin oxide (indium tin oxide) is used to make a transmissive liquid crystal display device. An ITO) film was formed to a thickness of 100 nm by a sputtering method. In this way, pixel TFT1 The holding capacity 174 connected to 69 is the light-shielding film 171 and the third interlayer insulating film 172 and the pixel electrode 1. It could be formed from 73.</p>
<p num="0053"> In this example, a crystalline semiconductor film serving as an active layer of the TFT shown in Examples 1 and 2 is formed. The process to be performed will be described with reference to FIG. First, the substrate (glass substrate in this embodiment) 110 Gate electrodes 1102 and 1103 with a thickness of 100 to 400 nm are formed on one. Gate electricity Pole is shaped from a material containing one or more elements selected from Al, Ti, Ta, Mo, W The pattern is formed so that the end face has a tapered shape. Also, although not shown, before It may be a laminated structure of materials. For example, from the substrate side, tantalum nitride (TaN) and Ta 2 It may be a layered structure. Furthermore, an oxide is coated on the surface of the gate electrode by anodizing or the like. You can keep it. The gate insulating film 1104 is formed of a silicon nitride film, a silicon oxide film, or a silicon dioxide film. It is formed and its thickness is 20 to 200 nm, preferably 75 to 125 nm. And Amorphous semiconductor film with a thickness of 50 nm on the gate insulating film 1104 (in this example, an amorphous silicon film) ) Form 1105 continuously without releasing it to the atmosphere.</p><p num="0054"> Next, an aqueous solution (acetic acid) containing a catalytic element (nickel in this example) of 10 ppm in terms of weight. (Nickel aqueous solution) is applied by the spin coating method, and the catalyst element-containing layer 1106 is an amorphous semiconductor. It is formed on the entire surface of the film 1105. Catalytic elements that can be used here are other than nickel (Ni). , Germanium (Ge), Iron (Fe), Palladium (Pd), Tin (Sn), Lead (Pb) , Cobalt (Co), Platinum (Pt), Copper (Cu), Gold (Au). Well In addition, in this example, the method of adding nickel by the spin coating method was used, but the vapor deposition method and the spatter A thin film (nickel film in the case of this example) made of a catalytic element is placed on an amorphous semiconductor film by the T method or the like. You may take the means to form in. (Fig. 5 (A))</p><p num="0055"> Next, before crystallization, a heat treatment process is performed at 400 to 500 ° C for about 1 hour to remove hydrogen in the membrane. After desorption, 500 to 650 ° C (preferably 550 to 570 ° C) for 4 to 12 hours (preferably) Heat treatment for 4 to 6 hours). In this example, heat treatment is performed at 550 ° C for 4 hours. , Crystalline semiconductor film (crystalline silicon film in this example) Form 1107. (Fig. 5 (B)) </p><p num="0056"> The active layer 1107 formed as described above is a catalytic element that promotes crystallization (here, here. By using nickel), it is possible to form a crystalline semiconductor film with excellent crystallinity. To. Further, in order to further enhance the crystallinity, a laser crystallization method may be used in combination. example For example, using XeF excimer laser light (wavelength 308 nm), a linear beam is formed and oscillated. Frequency 5 ~ 50Hz, energy density 100 ~ 500mJ / cm<sup>2</sup>As a linear beam The crystalline semiconductor film 110 produced in FIG. 5 (B) with a bar wrap ratio of 80 to 98%. 7 was irradiated. As a result, a crystalline semiconductor film 1108 having further excellent crystallinity is formed. Was done. (Fig. 5 (C))</p><p num="0057"> Examples 1 to Examples using the crystalline semiconductor film thus produced on the substrate 1101. Good characteristics can be obtained by preparing the TFT according to the procedure shown in 2. The characteristics of the TFT can be typically expressed by the field effect mobility, but as in this embodiment. The characteristics of the TFT formed from the crystalline semiconductor film produced by the above are 150 ~ for the n-channel TFT. 220cm<sup>2</sup>/ V . sec, p-channel TFT 90 ~ 120cm<sup>2</sup>Get / V · sec Moreover, even if it is operated continuously, the characteristic deterioration from the initial value is hardly observed, and from the viewpoint of reliability. Excellent characteristics were also obtained.</p>
<p num="0058"> In this embodiment, FIG. 6 and FIG. 7 are used for other configurations of the holding capacity connected to the pixel TFT. explain. Here, the manufacturing steps of FIGS. 6 and 7 are in accordance with the manufacturing steps described in Example 1. Since it is the same up to the point where the second interlayer insulating film 145 made of the machine resin film is formed, there. The structure up to is already explained in FIGS. 1 to 3. Therefore, this embodiment is different from the first embodiment. The explanation will be given focusing only on the points.</p><p num="0059"> In FIG. 6A, first, a second interlayer insulating film 145 was formed according to the step of Example 1. The light-shielding film 301 is formed of a material containing an element selected from Al, Ta, and Ti. And 30 to 150 nm (preferably 50 to 75 nm) on the surface of the light-shielding film 301 by anodizing. A dielectric film 302 (an oxide of a material that forms a light-shielding film) having a thickness of 3 is formed.</p><p num="0060"> When forming the dielectric film 302 by the anodizing method, first, the alkali ion concentration is sufficiently low. An ethylene glycol sai tartrate solution was prepared. This is 15% ammonium tartrate water It is a solution in which the liquid and ethylene glycol are mixed at a ratio of 2: 8, and ammonia water is added to this solution. The pH was adjusted to 7 ± 0.5. Then, a platinum electrode serving as a cathode is provided in this solution. The substrate on which the light-shielding film 301 is formed is immersed in a solution, and the light-shielding film 301 is used as an anode to be constant. A direct current of (several mA to several tens of mA) was applied. The voltage between the cathode and the anode in solution is that of the oxide It changes with time as it grows, but the voltage is adjusted so that the current is constant, and it becomes 150V. The voltage is not held at that point, or the holding time is set to several seconds to several tens of seconds. The polar oxidation treatment was completed. By doing so, the light-shielding film 301 comes into contact with the second interlayer insulating film. It can be formed without wrapping the dielectric film around the surface.</p><p num="0061"> Here, the dielectric film is provided only on the surface of the light-shielding film, but the dielectric film is plasma CVD. It may be formed by a vapor phase method such as a method, a thermal CVD method or a sputtering method. Even in that case, the film thickness Is preferably 30 to 150 nm (preferably 50 to 75 nm). Also, oxidation Recon film, silicon nitride film, silicon nitride film, DLC (Diamond like carbon) film Alternatively, an organic resin film may be used. Further, a laminated film in which these are combined may be used.</p><p num="0062"> After that, the pixel electrode 303 is formed in the same manner as in Example 1. In this way, the light-shielding film 301 and the pixels The holding capacity 304 is formed in the region where the electrodes 303 overlap with each other via the dielectric film 302.</p><p num="0063"> The structure of FIG. 6 (B) is the same as that of FIG. 6 (A) after the light-shielding film 301 and the dielectric film 302 are formed. , A spacer 305 made of an organic resin is formed. The organic resin film includes polyimide and poly. Membranes selected from amides, polyimideamides, acrylics, and BCB (benzocyclobutene) Can be used. After that, spacer 305, second interlayer insulating film 145, passive The contact film 143 is etched to form a contact hole, and the same material as in Example 1 is used for drawing. The elementary electrode 306 is formed. In this way, the light-shielding film 301 and the pixel electrode 306 form the dielectric film 302. A holding capacity of 307 is formed in the overlapping regions. Spacer 305 like this A short circuit occurs between the light-shielding film 301 and the pixel electrode 306. Can be prevented.</p><p num="0064"> The structure of FIG. 6 (C) forms the light-shielding film 301 as in FIG. 6 (A), and the end portion of the light-shielding film 301. A spacer 308 made of an organic resin is formed so as to cover the spacer 308. As an organic resin, poly From imide, polyamide, polyimide amide, acrylic, BCB (benzocyclobutene) The selected membrane can be used. Next, the exposed surface of the light-shielding film 301 by the anodizing method. A dielectric film 309 is formed on the surface. A dielectric film is formed in the portion in contact with the spacer 308. Not done. Then, the spacer 308, the second interlayer insulating film 145, and the passivation film 1 43 is etched to form a contact hole, and the pixel electrode 31 is made of the same material as in Example 1. Form 0. In this way, the light-shielding film 301 and the pixel electrode 310 overlap each other via the dielectric film 309. A holding capacity of 311 is formed in the region. In this way, the spacer 308 is provided. Prevents a short circuit that occurs between the light-shielding film 301 and the pixel electrode 310. be able to.</p><p num="0065"> In FIG. 7A, first, the second interlayer insulating film 145 is formed according to the step of Example 1, and then Insulating film with a material such as silicon nitride film, silicon oxide film or silicon nitride film on it Form 312. The insulating film 312 is formed by a known film forming method, among which the sputtering method is used. It was good to use. After that, a light-shielding film, a dielectric film, and a pixel electrode are formed in the same manner as in FIG. 6 (A). The holding capacity 313 is provided. By providing the insulating film 312, the light-shielding film adheres to the base. When the property is improved and the dielectric film is formed by the anodizing method, the dielectric material to the interface with the base of the light-shielding film It is possible to prevent the wraparound formation of the film.</p><p num="0066"> In Fig. 7 (B), after forming the insulating film and the light-shielding film in the same manner, the area does not come into close contact with the light-shielding film of the insulating film. The area was removed by etching to form an insulating film 314 so as to overlap under the light-shielding film. And A pixel electrode 315 was provided. With such a configuration, the adhesion of the light-shielding film to the base is improved. When the dielectric film is formed by the anodizing method, the dielectric film to the interface with the base of the light-shielding film is improved. It is possible to prevent wraparound formation and improve the light transmittance in the pixel region where the light-shielding film is formed. be able to.</p><p num="0067"> In the configuration shown in FIGS. 7 (A) and 7 (B), the spacers shown in FIGS. 6 (B) and 6 (C) are provided. It can also be combined with Naru. In addition, the configuration of this embodiment shown in FIGS. 6 and 7 is implemented. It can be combined with the configuration of Example 1 or Example 2.</p>
<p num="0068"> Pixel TFT formed in the display area described in Example 1 and Example 2 and the periphery of the display area In the method of manufacturing a semiconductor device in which the TFT of the drive circuit provided in the above is provided on the same substrate, Crystalline semiconductor film as an active layer, insulating film such as gate insulating film, interlayer insulating film and base film, Sputtering method is used for all conductive films such as electrode, source wiring, drain wiring and pixel electrode. Can be produced using. The advantage of using the sputtering method is that it is used for film formation of conductive films, etc. Since the DC (direct current) discharge method can be adopted, it is suitable for forming a uniform film on a large-area substrate. ing. In addition, a silicon-based material such as an amorphous silicon film or a silicon nitride film is formed. It is not necessary to use silane (SiH4), which requires a great deal of care in handling, and work safety. Is secured. This kind of point can be utilized as a great merit, especially at the production site. Can be done. The manufacturing process using the sputtering method will be described below according to Example 1.</p><p num="0069"> The gate electrodes 102 to 104 and the capacitance wiring 105 in Fig. 1 (A) are Ta, Ti, W, Mo, etc. It can be easily formed by a known sputtering method using the target material of. W-Mo and Ta-Mo When using any compound material, the target of the compound may be used in the same manner. Also, Ta When forming N or WN, nitrogen (N) in addition to argon (Ar) in the sputtering atmosphere<sub>2</sub>) And ammonia (NH<sub>3</sub>) Can be added appropriately. Also, for spattering Made by adding helium (He), krypton (Kr), and xenon (Xe) in addition to Ar. There is also a method of controlling the internal stress of the coating film.</p><p num="0070"> The silicon nitride film 106a used for the gate insulating film 106 is a silicon (Si) target. Using, Ar, N<sub>2</sub>, Hydrogen (H<sub>2</sub>), NH<sub>3</sub>Can be formed by properly mixing. Or, nitriding It can be similarly formed by using a recon target material. Silicon Nitride Film 10 6b uses Si target, Ar, N<sub>2</sub>, H<sub>2</sub>, N<sub>2</sub>Mix O properly and sputter It is made by.</p><p num="0071"> Similarly, for the amorphous silicon film, use Si target, Ar, H<sub>2</sub>For sputter gas To make. If you want to add a small amount of boron (B) to the amorphous silicon film, Dozens to thousands of ppm of boron (B) in the Ecklonia cava target Diborane (B) may be added to the sputter gas.<sub>2</sub>H<sub>6</sub>) Can also be added To.</p><p num="0072"> The silicon oxide film applicable to the channel protection films 119 to 122 is silicon oxide (or (Quartz) is used as the target material, and it is sputtered with Ar or a mixed gas of Ar and oxygen (O2). Can be produced by. Protective insulating film 137, interlayer insulating film 138, passivation film 14 The silicon nitride film, silicon oxide film, and silicon nitride film used in 4 are prepared as described above. Just do it.</p><p num="0073"> Al is used in the source wirings 139 to 141 and the drain wirings 142 and 143. In some cases, Ti, Si, scandium (Sc), vanadium (V), Cu, etc. are 0.01 ~ It is effective in preventing hillock when it is contained in an amount of about 5% by weight. Ti used for the light-shielding film 171 Ta, Al, etc., ITO, ZnO, SnO used for pixel electrode 146<sub>2</sub>Etc. are all known The film may be formed by the sputtering method of.</p><p num="0074"> As described above, other than the second interlayer insulating film 145 and the third interlayer insulating film 172 made of organic resin. In each case, a film can be formed by using a sputtering method. In addition, the practitioner should declare the detailed experimental conditions. Just decide.</p>
<p num="0075"> This embodiment describes pixel TFTs and drive circuit TFTs, especially other p-channel TFTs. An example is shown. First, the steps from FIG. 1 (A) to FIG. 2 (A) described in the first embodiment. In the same way. FIG. 12 (A) is a drawing corresponding to FIG. 2 (A), and the resist mask 1 123 ~ 1125, Impurity region 1126 ~ 113 to which an impurity element that imparts n-type is added 0 indicates the formed state.</p><p num="0076"> Then, as shown in Fig. 12 (B), p<sup>+</sup>Form the region. On channel protective film 1119 The region that forms the mask 1131 so that it is located inside the n-channel TFT is All were covered with resist masks 1132 and 1133. Furthermore, c using a hydrofluoric acid-based solution The end of the channel protection film 1119 almost coincides with the end of the mask 1131 by the et etching method. Etching to form a channel protective insulating film 1119b with a new shape. did. And diborane (B<sub>2</sub>H<sub>6</sub>) High-concentration impurity region 1134 ~ by the ion doping method (ion implantation method may be used) using Formed 1136. Impurity regions 1134 to 1136 are impure from the surface of the crystalline silicon film Element elements are added, and the boron (B) concentration in this region is 1.5 × 10.<sup>20</sup>~3×10<sup>21</sup>cm<sup>-3</sup>of Range, here 2x10<sup>21</sup>cm<sup>-3</sup>And said. In the present specification, the impurities formed here The concentration of the impurity element that imparts the p-type contained in the regions 1134 to 1136 (p)<sup>+</sup>). In this way, the end of the p-channel TFT in contact with the channel-forming region of the high-concentration impurity region. Channels are formed from the ends of the low-concentration impurity regions 1113 and 1114 formed in the previous step. By providing it on the region side, the joint state in this portion can be improved. ..</p><p num="0077"> As shown in FIGS. 1 (B) to 2 (A), the previous steps were applied to the impurity regions 1135 and 1136. Since phosphorus (P) was added in, a region where boron (B) and phosphorus (P) were mixed was formed. However, p-type induction is achieved by increasing the concentration of boron (B) added in this step to 1.5 to 3 times that concentration. The electrical properties were secured and there was no effect on the characteristics of the TFT. In this specification, this Let the area be the area (B). And the impurity region 134 on the channel formation region side is boron. It is an area including only (B), and this area is referred to as area (A) in the present specification.</p><p num="0078"> After selectively adding each impurity element to the crystalline silicon film, the crystalline silicon film is added. Protective insulating film 113 that is etched to divide into islands and later becomes part of the first interlayer insulating film 113 Formed 7. The protective insulating film 1137 is a silicon nitride film, a silicon oxide film, and silicon nitride. It may be formed of a thin film or a laminated film in which they are combined. Also, the film thickness is 100 to 400. It should be nm.</p><p num="0079"> Then activate the impurity elements that impart the n-type or p-type added at the respective concentrations. Therefore, a heat treatment step was performed. Nitrogen atmosphere when activating by Furnace anneal method 300-650 ° C in the air, preferably 500-550 ° C, here at 525 ° C at 4 o'clock The heat treatment was performed during the period. When applying the laser annealing method, use an excimer laser as the light source. As a result, the laser beam is used as an optical system with a line width of 100 to 500 μm and a linear beam, and the oscillation frequency. Several tens to 100Hz, oscillation pulse width 20 to 50nsec (preferably 30nsec), d Irradiate with an energy density of 100 to 500 mJ / cm2. In addition, it contains 3-100% hydrogen Heat treatment at 300 to 450 ° C for 1 to 12 hours in a warm atmosphere to hydrogenate the active layer. I went about. This step terminates the dangling bonds in the active layer with thermally excited hydrogen. It is a process to do. As another means of hydrogenation, plasma hydrogenation (excited by plasma) (Hydrogen is used) may be performed.</p><p num="0080"> After the activation process is completed, layers with a thickness of 500 to 1500 nm are placed on the protective insulating film 1137. An insulating film 1138 was formed. Lamination of the protective insulating film 1137 and the interlayer insulating film 1138 The film was used as the first interlayer insulating film. After that, the source area or drain area of each TFT Form a contact hole that reaches the area, source wiring 1139 to 1141 and drain distribution Lines 1142 and 1143 were formed. Although not shown, in this embodiment, this electrode is used as a Ti film. 100 nm, aluminum film containing Ti 300 nm, Ti film 150 nm by sputtering method It was a continuously formed three-layered laminated film.</p><p num="0081"> The protective insulating film 1137 and the interlayer insulating film 1138 are a silicon nitride film, a silicon oxide film, or the like. May be formed of a silicon nitride film or the like, but in any case, the internal stress of the film is the compressive stress. It was good to leave it as.</p><p num="0082"> Next, a silicon nitride film, a silicon oxide film, or a silicon oxide film is used, and the passive film is used. Formation film 1144 formed with a thickness of 50 to 500 nm (typically 100 to 300 nm) did. After that, if hydrogenation treatment is performed in this state, favorable results will be obtained for improving the characteristics of the TFT. Obtained. For example, 1-12 at 300-450 ° C in an atmosphere containing 3-100% hydrogen. It is better to heat-treat for a long time, or the same effect was obtained by using the plasma hydrogenation method. .. Here, a contact hole for connecting the pixel electrode and the drain wiring will be formed later. An opening may be formed in the passivation film 1144 at a certain position.</p><p num="0083"> Then, as in Example 1, a second interlayer insulating film 1145 made of an organic resin film was applied to a thickness of about 1 μm. Formed to thickness. Then, the second interlayer insulating film 1145 and the passivation film 1144 are formed. A contact hole reaching the rain wiring 1143 was formed, and a pixel electrode 1146 was provided. Picture When the elementary electrode 1146 is a transmissive liquid crystal display device, a transparent conductive film is used and a reflective liquid crystal is used. When it is used as a display device, a metal film may be used. Here, a transmissive liquid crystal display device is used. Therefore, an indium tin oxide (ITO) film was formed to a thickness of 100 nm by a sputtering method. Pixel electrode 1190 is an electrode of adjacent pixels.</p><p num="0084"> In the above steps, the pixel TFT in the display area and the drive provided around the display area are provided on the same substrate. It was possible to form a TFT of the circuit. For the drive circuit, n-channel type TFT1168 A p-channel type TFT1167 is formed, forming a logic circuit based on a CMOS circuit. It was possible to do. Pixel TFT1169 is an n-channel TFT, and has a capacity distribution. Retention capacity 1170 from wire 105, semiconductor layer 1166, and insulating film formed between them Is connected to pixel TFT1169.</p><p num="0085"> The p-channel type TFT1167 of the drive circuit has a channel formation region of 1147 and high-concentration impurities. Source regions 1148, 1150 and drain regions 1149, 1151 formed by regions have. The source region 1150 and the drain region 1151 are formed by region (B). The boron (B) concentration in the region is 1.5 to 3 times the phosphorus (P) concentration. Its impurity region Source region 1148 and drain formed inside (B), that is, on the side of channel formation region 1147. In-region 1149 is region (A) and contains only boron (B) at the same concentration as region (B). It is an area. This region (A) completely overlaps with the gate electrode 1103, while the region (B) Has a structure that partially overlaps with the gate electrode 1103. In this way, p-channel type TF A high-concentration impurity region of T is formed from a region (B) and a region (A), and the region (B) is a channel type. Good bonding between the channel formation region and the high-concentration impurity region by moving away from the growth region Can be.</p><p num="0086"> The n-channel type TFT1168 of the drive circuit has a channel formation region 1152 and a source region. It has 1155 and drain areas 1156 and LDD areas 1153 and 1154. .. Pixel TFT1169 has channel formation regions 1157, 1158 and source regions or It has a drain area of 1163 to 1165 and an LDD area of 1159 to 1162. Drive The LDD region of the n-channel TFT of the dynamic circuit relaxes the high electric field near the drain and is hot-keyed. The main purpose is to prevent deterioration of the on-current value due to carrier injection, and its main purpose is to prevent deterioration. Concentration of impurity element that imparts n-type suitable for<sup>17</sup>~5×10<sup>18</sup>cm<sup>-3</sup>given that Was good. On the other hand, the LDD region of the pixel TFT has the main purpose of reducing the off-current value. The concentration of the impurity element is the LDD area of the n-channel TFT of the drive circuit. It may be the same as the concentration in the region, but it may be 1/2 to 1/10 of the concentration. In Figure 3 The element TFT1169 was completed as a double gate structure, but a single gate structure is also acceptable. , A multi-gate structure in which a plurality of gate electrodes are provided may be used.</p><p num="0087"> The TFTs produced by the above steps have channel protective insulating films 1119b, 112. Since 0 to 1122 are formed without being damaged by the ion doping method, etc. , The characteristics of TFT can be stabilized. For example, bias / heat stress (BT) S) As a test, apply a voltage of -1.7MV to ± to the gate electrode and release it at 150 ° C for 1 hour. Even if it is set, changes in threshold voltage, field effect mobility, sub-threshold constant, on-current value, etc. Movement is rarely observed. Further, the present invention is required by the pixel TFT and the drive circuit. The structure of the TFT that composes each circuit is optimized according to the specifications, and the operating performance and reliability of the semiconductor device Was able to be improved.</p><p num="0088"> Further, the configuration of the holding capacity shown in FIG. 13 was described with reference to FIGS. 6 and 7 in the fourth embodiment. It is formed from a light-shielding film, a dielectric layer formed on the surface thereof by an anodization method, and a pixel electrode. You may.</p>
<p num="0089"> In this example, the active matrix type liquid is formed from the substrate on which the pixel TFT and the drive circuit are formed. The process of manufacturing the crystal display device will be described. As shown in FIG. 8, the state of FIG. 3 produced in Example 1 An alignment film 601 is formed on the substrate in the state. Polyimide wood is usually used for the alignment film of liquid crystal display elements. A lot of fat is used. The substrate 602 on the opposite side has a light-shielding film 603 and a transparent conductive film 604. And the alignment film 605 is formed. After forming the alignment film, the liquid crystal molecules are subjected to rubbing treatment. The orientation was made to have a constant pre-tilt angle. And the pixel TFT and the drive circuit are shaped A sealing material or a spacer ( Both are not shown) and are pasted together. After that, liquid crystal material 606 is injected between both substrates. And completely sealed with a sealant (not shown). A known liquid crystal material is used as the liquid crystal material. Just do it. In this way, the active matrix type liquid crystal display device shown in FIG. 8 is completed.</p><p num="0090"> Next, the configuration of this active matrix type liquid crystal display device is shown in the perspective view of FIG. 9 and FIG. This will be described with reference to the top view. Note that FIGS. 9 and 10 correspond to the cross-sectional structural views of FIGS. 1 to 3 and 8. Therefore, a common code is used. The cross-sectional structure along A-A'shown in FIG. 10 is It corresponds to the cross-sectional view of the pixel TFT 169 and the holding capacity 170 shown in FIG.</p><p num="0091"> The perspective view shown in FIG. 9 shows the display area 701 formed on the glass substrate 101 and the scan (ge). It is composed of a line drive circuit 702 and a signal (source) line drive circuit 703. In the display area Pixel TFT169 is provided, and the drive circuit provided around the display area is based on a CMOS circuit. It is organized as a book. Scan (gate) line drive circuit 702 and signal (source) line drive times Each of the roads 703 is a gate wiring 104 (in the sense that it is connected to the gate electrode and is formed extending). (Represented using the same code) and connected to the pixel TFT of the display area 701 by the source wiring 141 There is. In addition, FPC731 is connected to the external input / output terminal 734.</p><p num="0092"> FIG. 10 is a top view showing substantially one pixel of the display area 701. The gate wiring 104 is shown in the figure. It intersects with the active layer beneath it via an ungate insulating film. Although not shown , The active layer includes source region, drain region, n<sup>-</sup>An LDD region consisting of regions is formed .. In addition, 180 is the contact part between the source wiring 141 and the source area 163, and 181 is the drain. The contact part between the in wiring 143 and the drain area 165, and 182 is the drain wiring 143. It is a contact portion of the pixel electrode 146. The holding capacity 170 is the drain of pixel TFT169. The semiconductor layer 166 connected to the region 165, the capacitive wiring 105, and the insulation formed between them. It is formed in the area where the membranes overlap.</p><p num="0093"> The active matrix type liquid crystal display device of this embodiment has the structure described in Example 1. Although explained in light of reference, the act can be freely combined with any of the configurations of Examples 1 to 6. A live matrix type liquid crystal display device can be manufactured.</p>
<p num="0094"> A substrate in which a pixel TFT and a drive circuit produced by carrying out the present invention are integrally formed on the same substrate. Is a variety of electro-optical devices (active matrix liquid crystal display device, active matrix) X-type EL display device, active matrix type EC display device) Can be used for. That is, an electronic device incorporating these electro-optical devices as a display medium. The present invention can be carried out on all vessels.</p><p num="0095"> Such electronic devices include video cameras, digital cameras and projectors (rear). Type or front type), head-mounted display (goggles type display), car Navigation, personal computers, mobile phones or ebooks, etc.) .. An example of them is shown in FIG.</p><p num="0096"> Fig. 11 (A) shows a mobile phone, which is the main body 9001, the voice output unit 9002, and the voice input unit 90. 03, display device 9004, operation switch 9005, antenna 9006 .. The present invention covers the audio output unit 9002, the audio input unit 9003, and the display area and its surroundings. It can be applied to an active matrix type display device 9004 equipped with a drive circuit.</p><p num="0097"> Fig. 11 (B) shows a video camera, which is the main body 9101, display device 9102, and audio input unit 9. It consists of 103, operation switch 9104, battery 9105, and image receiving part 9106. The present invention is an act equipped with a voice input unit 9103 and a drive circuit in and around the display area. It can be applied to a live matrix type display device 9102 and an image receiving unit 9106.</p><p num="0098"> Figure 11 (C) shows a mobile computer, which includes the main unit 9201, camera unit 9202, and image receiver. It consists of a unit 9203, an operation switch 9204, and a display device 9205. The invention of the present application is accepted Active matrix type with image unit 9203 and drive circuit in and around the display area Can be applied to the display device 9205.</p><p num="0099"> Figure 11 (D) shows a goggle-type display, which includes the main unit 9301, display device 9302, and a. It is composed of the room part 9303. The present invention includes a drive circuit in and around the display area. It can be applied to the active matrix type display device 9302. Also displayed Although not, it can also be used for other signal control circuits.</p><p num="0100"> Figure 11 (E) shows the rear projector, which includes the main unit 9401, light source 9402, and display device. 9403, Polarizing Beam Splitter 9404, Reflectors 9405, 9406, Screen It is composed of 9407. The present invention is an acty provided with a drive circuit in and around the display area. It can be applied to the Bmatrix type display device 9403.</p><p num="0101"> Figure 11 (F) shows a mobile book, which is the main body 9501, display devices 9502, 9503, and storage medium. It consists of a body 9504, an operation switch 9505, and an antenna 9506. Data stored in a digital video disc (MD) or digital video disc (DVD), or received by an antenna It displays the data that has been created. Display devices 9502 and 9503 are the display area and its circumference. It is an active matrix type direct-view display device provided with a drive circuit on the side, and the present invention is suitable for this. Can be used.</p><p num="0102"> In addition, although not shown here, the present invention also includes a car navigation system. And image sensor It can also be applied to the display part of a personal computer. This As described above, the scope of application of the present invention is extremely wide, and it can be applied to electronic devices in all fields. Noh. In addition, the electronic device of this embodiment is composed of any combination of Examples 1 to 7. It can also be realized by using Naru.</p>
0103101 board 102 ~ 104 Gate electrode 105 Capacitive wiring 106 Gate insulating film 107 Crystalline silicon film 108 Mask insulating film 119 ~ 121 Channel protective film 139 ~ 141 Source electrode 142 ~ 143 Drain electrode 137 Protective insulating film 138 Interlayer insulating film 144 Passivation membrane 145 Second interlayer insulating film 146 pixel electrode
14 sheets
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| Document | Relation | Office | Category | Cited during | Relevant claims |
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| JP2690067B2 | Cites | Japan | Y | Search report | 1-3 |
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Priority claims4
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| 1999099481 | Japan | – | |
| 9948199 | Japan | A | |
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Numbers
- Publication
- 2017191327
- Application
- 113301
Titles2
- Japanese
- 液晶表示装置
- English
- Liquid crystal display device
Classification
- CPC, 13
- H10D30/0316
- G02F1/13454
- H10D86/441
- H10D86/60
- H10D86/481
- H10D30/673
- H10D30/6737
- H10D30/6743
- H10D30/6739
- H10D30/0321
- H10D30/6715
- H10D30/6719
- H10D30/6723
- IPC, 6
- G02F1 1368
- H01L29 786
- H01L21 336
- G02F1 1362
- H10P95 00
- H01L27 12