Semiconductor device

0001The present invention relates to a liquid crystal display device. In particular, a shift register constructed using transistors The present invention relates to a liquid crystal display device having a data. Further, the present invention relates to a method of driving the liquid crystal display device. Also, The present invention relates to an electronic device having the liquid crystal display device in the display unit.

0002In recent years, the development of liquid crystal display devices has been actively promoted due to the increase in large display devices such as liquid crystal televisions. It has been. In particular, on a non-crystalline semiconductor (hereinafter, also referred to as amorphous silicon) on an insulating substrate Therefore, using the transistor configured therefor, the drive times including the pixel circuit, shift register, etc. The technology for integrally forming a road (hereinafter, also referred to as an internal circuit) is great for reducing power consumption and cost. Development is being actively promoted in order to contribute significantly. The internal circuit formed on the insulating substrate is F. It is connected to a controller IC, etc. (hereinafter, also referred to as an external circuit) via a PC, etc., and its operation is Be controlled.

0003Among the internal circuits shown above, a transistor using a transistor composed of an amorphous semiconductor is used. A ft register has been devised (for example, Patent Document 1). Shift shown in Patent Document 1 Since the output terminal of the register is floating for a long period of time, noise shifts. There was a problem that it was generated in the output signal of the data. The problem of the shift register in Patent Document 1 To solve this, a shift register configuration was devised that did not float the output terminals. (For example, Non-Patent Document 1)

<p num="0004"><patcit num="1"><text>Special table 10-500243</text></patcit></p>

<p num="0005"><nplcit num="1"><text>2.0inch a-Si: H TFT-LCD with Low Noise Integrated Gate Driver SID'05 Digest P942-945</text></nplcit></p>

<p num="0006">In Non-Patent Document 1 described above, the output terminal and the negative power supply are connected during the non-selection period. Langista is turned on. Therefore, the output terminal of the shift register shown in Non-Patent Document 1. Does not float, and the shift register shown in Non-Patent Document 1 causes noise in the output signal. It can be made smaller.</p><p num="0007">However, a transistor composed of an amorphous semiconductor is applied for a period of time when it is turned on. It is known that the characteristics deteriorate according to the voltage applied. Above all, the threshold voltage The threshold voltage shift that shifts (rises) is one of the major causes of shift register malfunction. It is one. Therefore, in the shift register shown in Non-Patent Document 1, in the non-selection period This transistor is turned on because the transistor connected between the output terminal and the negative power supply is turned on. Malfunction occurs due to deterioration of the characteristics of.</p><p num="0008">In view of these problems, the noise of the output signal is small and the transistor is in the non-selection period. A liquid crystal display device having a shift register that can suppress deterioration of the characteristics of the gista, and the present An object of the present invention is to provide an electronic device including the liquid crystal display device.</p>

<p num="0009">The liquid crystal display device according to the present invention has a pixel portion and a shift integrally formed with the pixel portion on an insulating substrate. It has a register. And the shift register has a plurality of flip-flops, and this Each of the multiple flip-flops is turned on at regular intervals during the non-selection period, and the output terminal It has a transistor that outputs the power supply potential on the (scanning line). This transistor is a commuter pass Multiple flip-flops by turning on every interval and supplying power potential to the scanning line Each suppresses fluctuations in the potential of the scanning line and suppresses deterioration of the characteristics of the transistor.</p><p num="0010">The liquid crystal display device of the present invention includes a first pixel and a second pixel having a liquid crystal element, a drive circuit, and a drive circuit. 1st wiring, 2nd wiring, 3rd wiring, 4th wiring, 5th wiring, 6th wiring And, the first pixel is electrically connected to the drive circuit via the fifth wiring. The second pixel is electrically connected to and driven by the drive circuit via the sixth wiring. The circuit has a shift register, the shift register has multiple flip-flops, and multiple At least one of the number of flip-flops is the first transistor, the second transistor It has a third transistor and a fourth transistor, and is the first terminal of the first transistor. Is electrically connected to the first wire, and the second terminal of the first transistor is the second transistor. Is electrically connected to the gate terminal of the first transistor, and the gate terminal of the first transistor is electrically connected to the fifth wiring. The first terminal of the second transistor is electrically connected to the third wire and the second end The child is electrically connected to the 6th wire and the 1st terminal of the 3rd transistor is electrically connected to the 2nd wire. The second terminal is electrically connected to the gate terminal of the second transistor, and the gate The terminals are electrically connected to the 4th wire, and the 1st terminal of the 4th transistor is connected to the 2nd wire. Air-connected, the second terminal of the fourth transistor is electrically connected to the sixth wire, the fourth The feature is that the gate terminal of the transistor of the above is electrically connected to the fourth wiring. To.</p><p num="0011">Further, the liquid crystal display device of the present invention has a first pixel and a second pixel having a liquid crystal element, and a drive rotation. It has a road, a first wiring, a second wiring, a third wiring, a fourth wiring, and a fifth wiring. Then, the first pixel is electrically connected to the drive circuit via the fifth wiring, and the first pixel is electrically connected to the drive circuit. The second pixel is electrically connected to the drive circuit via the first wiring, and the drive circuit is It has a shift register, which has multiple flip-flops and multiple flip-flops. At least one of the upflops is the first transistor, the second transistor, the third The first transistor has a fifth terminal. Electrically connected to the wiring of the second transistor, and the second terminal is electrically connected to the gate terminal of the second transistor. The gate terminal is electrically connected to the fifth wire, and the second transistor has the first terminal. Electrically connected to the third wire, the second terminal is electrically connected to the first wire, and the third tiger In the engineer, the first terminal is electrically connected to the gate terminal of the second transistor, and the second terminal Is electrically connected to the second wire, the gate terminal is electrically connected to the fourth wire, and the fourth In the transistor, the first terminal is electrically connected to the first wiring, and the second terminal is electrically connected to the second wiring. It is characterized by being air-connected and the gate terminal being electrically connected to the fourth wire. To.</p><p num="0012"> In the present invention, the first transistor, the second transistor, and the third transistor The transistor and the fourth transistor may be N-channel transistors.</p><p num="0013"> Further, in the present invention, the first transistor, the second transistor, and the third transistor The second transistor and the fourth transistor have a semiconductor layer, and the semiconductor layer is made of amorphous silicon. There may be.</p><p num="0014"> Further, in the present invention, a capacitive element is located between the second terminal and the gate terminal of the first transistor. May be arranged.</p><p num="0015">Further, the liquid crystal display device of the present invention has a first pixel and a second pixel having a liquid crystal element, and a drive rotation. Road, 1st wiring, 2nd wiring, 3rd wiring, 4th wiring, 5th wiring, 6th The first pixel is driven via the fifth wiring. Electrically connected to the circuit, the second pixel is connected to the drive circuit via the sixth wire. Air-connected, the drive circuit has a shift register, and the shift register has multiple flickers. It has a flip-flop and at least one of the flip-flops is the first transition. T, 2nd transistor, 3rd transistor, 4th transistor and 5th transistor The first transistor has a star, the first terminal is electrically connected to the first wiring, and the second end The child is electrically connected to the gate terminal of the second transistor, and the gate terminal is connected to the fifth wire. Air-connected, the second transistor has the first terminal electrically connected to the third wire and the second The 2nd terminal is electrically connected to the 6th wire, and the 3rd transistor has the 1st terminal as the 2nd transistor. Electrically connected to the gate terminal of the engineer, the second terminal is electrically connected to the second wiring, The gate terminal is electrically connected to the 4th wire, and the 4th transistor has the 1st terminal as the 6th. Electrically connected to the wiring, the second terminal is electrically connected to the second wiring, the gate terminal is the fourth The fifth transistor is electrically connected to the wiring of, and the first terminal is electrically connected to the sixth wiring. The second terminal is electrically connected to the second wire, and the gate terminal is electrically connected to the seventh wire. It is characterized by being connected.</p><p num="0016">Further, the liquid crystal display device of the present invention has a first pixel and a second pixel having a liquid crystal element, and a drive rotation. Road, 1st wiring, 2nd wiring, 3rd wiring, 4th wiring, 5th wiring, 6th The first pixel is electrically connected to the drive circuit via the fifth wiring. Connected, the second pixel is electrically connected to the drive circuit via the first wiring. , The drive circuit has a shift register and the shift register has multiple flip-flops. However, at least one of the multiple flip-flops is the first transistor and the second transistor. It has an engineer, a third transistor, a fourth transistor and a fifth transistor, and the first In the transistor 1, the first terminal is electrically connected to the fifth wiring, and the second terminal is the second transistor. It is electrically connected to the gate terminal of the engineer, and the gate terminal is electrically connected to the fifth wire. , The second transistor has the first terminal electrically connected to the third wire and the second terminal is the sixth Electrically connected to the wire, the third transistor has the first terminal electrically connected to the second wire The second terminal is electrically connected to the gate terminal of the second transistor, and the gate terminal is the first. Electrically connected to the 4th wire, the 4th transistor has the 1st terminal electrically connected to the 1st wire. Connected, the second terminal is electrically connected to the second wire, the gate terminal is electrically connected to the fourth wire The fifth transistor is connected to the second end, the first terminal is electrically connected to the sixth wire. The child is electrically connected to the second wire and the gate terminal is electrically connected to the first wire. It is characterized by that.</p><p num="0017"> In the present invention, the first transistor, the second transistor, and the third transistor The fourth transistor and the fifth transistor are N-channel transistors. May be good.</p><p num="0018"> Further, in the present invention, the first transistor, the second transistor, and the third transistor The data, the fourth transistor, and the fifth transistor have a semiconductor layer, and the semiconductor layer is ammo. It may be rufus silicon.</p><p num="0019"> Further, in the present invention, the second terminal of the first transistor and the gate of the first transistor A capacitive element may be arranged between the terminal and the terminal.</p><p num="0020">Further, the liquid crystal display device of the present invention includes a first pixel to a fourth pixel having a liquid crystal element and a first pixel. Drive circuit, second drive circuit, first wiring, second wiring, third wiring, fourth arrangement Wires, 5th wiring, 6th wiring, 7th wiring, 8th wiring, 9th wiring, 1st It has 0 wiring, 11th wiring, and 12th wiring, and the 1st pixel is the 5th wiring. It is electrically connected to the first drive circuit via wiring, and the second pixel is the sixth arrangement. It is electrically connected to the first drive circuit via a wire, and the third pixel is the eleventh arrangement. It is electrically connected to the second drive circuit via a wire, and the fourth pixel is the twelfth arrangement. It is electrically connected to the second drive circuit via a wire, and the first drive circuit is a first shifter. The second drive circuit has a second shift register and has a first shift register. Has multiple flip-flops, at least one of the multiple flip-flops 1st transistor, 2nd transistor, 3rd transistor and 4th transistor In the first transistor, the first terminal is electrically connected to the first wiring, and the second terminal is It is electrically connected to the gate terminal of the second transistor, and the gate terminal is electrically connected to the fifth wiring. The second transistor is connected to, the first terminal is electrically connected to the third wire, and the second end The child is electrically connected to the 6th wire, and the 3rd transistor has the 1st terminal connected to the 2nd wire. Air-connected, the second terminal is electrically connected to the gate terminal of the second transistor, The terminal is electrically connected to the 4th wire, and the 4th transistor has the 1st terminal as the 2nd wire. The second terminal is electrically connected to the sixth wire, and the gate terminal is the fourth arrangement. Electrically connected to the wire, the second shift register has multiple flip-flops and multiple At least one of the flip-flops is the 5th transistor, the 6th transistor , 7th transistor and 8th transistor, 5th transistor is the 1st terminal Is electrically connected to the 7th wire, and the 2nd terminal is electrically connected to the gate terminal of the 6th transistor. The gate terminal is electrically connected to the 11th wire, and the 6th transistor is the 1st Terminal 1 is electrically connected to the 9th wire, terminal 2 is electrically connected to the 12th wire, In the 7th transistor, the 1st terminal is electrically connected to the 8th wire, and the 2nd terminal is the 6th transistor. Electrically connected to the gate terminal of the Langista, the gate terminal is electrically connected to the 10th wire Then, in the eighth transistor, the first terminal is electrically connected to the eighth wiring, and the second terminal is the second. It is electrically connected to the 12th wire and the gate terminal is electrically connected to the 10th wire. It is characterized by.</p><p num="0021"> In the present invention, the fifth wiring and the eleventh wiring are electrically connected, and the sixth wiring And the twelfth wiring may be electrically connected.</p><p num="0022"> Further, in the present invention, the fifth wiring and the eleventh wiring are the same wiring, and the sixth wiring And the twelfth wiring may be the same wiring.</p><p num="0023"> Further, in the present invention, the first wiring and the seventh wiring are electrically connected, and the second wiring and the second wiring And the 8th wire is electrically connected, the 3rd and 9th wires are electrically connected, and the 4th wire is connected. Wiring and the tenth wiring may be electrically connected.</p><p num="0024"> Further, in the present invention, the first wiring and the seventh wiring are the same wiring, and the second wiring and the second wiring And the 8th wiring is the same wiring, the 3rd wiring and the 9th wiring are the same wiring, and the 4th wiring Wiring and the tenth wiring may be the same wiring.</p><p num="0025"> Further, in the present invention, the first wiring and the seventh wiring are electrically connected, and the second wiring and the second wiring And the 8th wire is electrically connected, the 3rd and 9th wires are electrically connected, and the 4th wire is connected. Wiring and the 10th wire are electrically connected, and the 5th and 11th wires are electrically connected. Subsequently, the sixth and twelfth wires may be electrically connected.</p><p num="0026"> Further, in the present invention, the first wiring and the seventh wiring are the same wiring, and the second wiring and the second wiring And the 8th wiring is the same wiring, the 3rd wiring and the 9th wiring are the same wiring, and the 4th wiring Wiring and the 10th wiring are the same wiring, and the 5th wiring and the 11th wiring are the same wiring. Therefore, the sixth wiring and the twelfth wiring may be the same wiring.</p><p num="0027">Further, the liquid crystal display device of the present invention includes a first pixel to a fourth pixel having a liquid crystal element and a first pixel. Drive circuit, second drive circuit, first wiring, second wiring, third wiring, fourth arrangement Wires, 5th wiring, 6th wiring, 7th wiring, 8th wiring, 9th wiring, 1st It has 0 wirings, and the 1st pixel is connected to the 1st drive circuit via the 5th wiring. Electrically connected, the second pixel is electrically connected to the first drive circuit via the first wiring. Air-connected, the third pixel is connected to the second drive circuit via the tenth wire. Air-connected, the fourth pixel is electrically connected to the second drive circuit via the sixth wire. The first drive circuit has a first shift register and the second drive circuit has a first shift register. It has two shift registers, the first shift register has multiple flip-flops, At least one of the flip-flops is the first transistor, the second transition It has a star, a third transistor and a fourth transistor, and the first transistor is the first. The terminal is electrically connected to the 5th wire and the 2nd terminal is connected to the gate terminal of the 2nd transistor. It is air-connected, the gate terminal is electrically connected to the fifth wire, and the second transistor is The first terminal is electrically connected to the third wire, the second terminal is electrically connected to the first wire, In the third transistor, the first terminal is electrically connected to the gate terminal of the second transistor. , The second terminal is electrically connected to the second wire and the gate terminal is electrically connected to the fourth wire In the fourth transistor, the first terminal is electrically connected to the first wiring, and the second terminal is the second. Electrically connected to the wiring of, the gate terminal is electrically connected to the fourth wiring, the second shift The register has multiple flip-flops and at least one of the multiple flip-flops. One is the 5th transistor, the 6th transistor, the 7th transistor and the 8th transistor. The fifth transistor has an engineer, the first terminal is electrically connected to the tenth wiring, The second terminal is electrically connected to the gate terminal of the sixth transistor, and the gate terminal is the tenth. Electrically connected to the wire, the sixth transistor has the first terminal electrically connected to the eighth wire The second terminal is electrically connected to the sixth wire, and the seventh transistor has the first terminal as the first. It is electrically connected to the gate terminal of the 6 transistor, and the 2nd terminal is electrically connected to the 7th wire. The gate terminal is electrically connected to the 9th wire, and the 8th transistor is the 1st terminal. Is electrically connected to the 6th wire, the 2nd terminal is electrically connected to the 7th wire, and the gate end It is characterized in that the child is electrically connected to the ninth wire.</p><p num="0028"> In the present invention, the first wiring and the sixth wiring are electrically connected, and the fifth wiring and the fifth wiring And the tenth wire may be electrically connected.</p><p num="0029"> Further, in the present invention, the first wiring and the sixth wiring are the same wiring, and the fifth wiring and the fifth wiring And the tenth wiring may be the same wiring.</p><p num="0030"> Further, in the present invention, the second wiring and the seventh wiring are electrically connected, and the third wiring and the third wiring And the 8th wire is electrically connected, and the 4th and 9th wires are electrically connected. May be good.</p><p num="0031"> Further, in the present invention, the second wiring and the seventh wiring are the same wiring, and the third wiring and the third wiring And the 8th wiring may be the same wiring, and the 4th wiring and the 9th wiring may be the same wiring. I.</p><p num="0032"> Further, in the present invention, the first wiring and the sixth wiring are electrically connected, and the second wiring and the second wiring And the 7th wire is electrically connected, the 3rd and 8th wires are electrically connected, and the 4th wire is connected. Wiring and 9th wiring are electrically connected, and 5th and 10th wiring are electrically connected. It may have been.</p><p num="0033"> Further, in the present invention, the first wiring and the sixth wiring are the same wiring, and the second wiring and the second wiring And the 7th wiring is the same wiring, the 3rd wiring and the 8th wiring are the same wiring, and the 4th wiring Wiring and the 9th wiring are the same wiring, and the 5th wiring and the 10th wiring are the same wiring. There may be.</p><p num="0034"> Further, in the present invention, the first transistor, the second transistor, and the third transistor 4th transistor, 5th transistor, 6th transistor, 7th transistor The transistor and the eighth transistor may be N-channel transistors.</p><p num="0035"> Further, in the present invention, the first transistor, the second transistor, and the third transistor 4th transistor, 5th transistor, 6th transistor, 7th transistor The second transistor and the eighth transistor have a semiconductor layer, and the semiconductor layer is made of amorphous silicon. There may be.</p><p num="0036"> Further, in the present invention, the second terminal of the first transistor and the game of the first transistor The first capacitive element is arranged between the terminal and the second terminal of the fifth transistor and the fifth. A second capacitive element may be arranged between the gate terminal of the transistor and the gate terminal of the transistor.</p><p num="0037">Further, the liquid crystal display device of the present invention includes a first pixel to a fourth pixel having a liquid crystal element and a first pixel. Drive circuit, second drive circuit, first wiring, second wiring, third wiring, fourth arrangement Wires, 5th wiring, 6th wiring, 7th wiring, 8th wiring, 9th wiring, 1st It has 0 wiring, 11th wiring, 12th wiring, 13th wiring, and 14th wiring. Then, the first pixel is electrically connected to the first drive circuit via the fifth wiring. , The second pixel is electrically connected to the first drive circuit via the sixth wiring. The third pixel is electrically connected to the second drive circuit via the twelfth wiring. The fourth pixel is electrically connected to the second drive circuit via the thirteenth wiring. The first drive circuit has a first shift register and the second drive circuit has a second shift register. It has a star and the first shift register has multiple flip-flops and multiple flips. At least one of the flops is the first transistor, the second transistor, the third transistor It has a Langista, a 4th transistor and a 5th transistor, the 1st transistor , The first terminal is electrically connected to the first wiring, and the second terminal is the gate end of the second transistor. Electrically connected to the child, the gate terminal is electrically connected to the fifth wire, the second transition The first terminal is electrically connected to the third wire, and the second terminal is electrically connected to the sixth wire. Then, in the third transistor, the first terminal is electrically connected to the second wiring, and the second terminal is the second. It is electrically connected to the gate terminal of the second transistor, and the gate terminal is electrically connected to the fourth wire. Connected, the 4th transistor has the 1st terminal electrically connected to the 2nd wire and the 2nd terminal Is electrically connected to the 6th wire, the gate terminal is electrically connected to the 4th wire, and the 5th The first terminal of the transistor is electrically connected to the second wire, and the second terminal is connected to the sixth wire. Electrically connected, the gate terminal is electrically connected to the 7th wire, the 2nd shift register Has multiple flip-flops, at least one of the multiple flip-flops 6th transistor, 7th transistor, 8th transistor, 9th transistor and And the 10th transistor, the 6th transistor has the 1st terminal electrically connected to the 8th wiring The second terminal is electrically connected to the gate terminal of the seventh transistor, and the gate end The child is electrically connected to the 12th wire, and the 7th transistor has the 1st terminal as the 10th wire. Electrically connected to, the second terminal is electrically connected to the thirteenth wire, and the eighth transistor The first terminal is electrically connected to the ninth wire, and the second terminal is the gate of the seventh transistor. Electrically connected to the terminal, the gate terminal is electrically connected to the 11th wire, and the 9th transformer In the Jista, the first terminal is electrically connected to the thirteenth wire, and the second terminal is electrically connected to the ninth wire. The gate terminal is electrically connected to the 11th wire, and the 10th transistor is The first terminal is electrically connected to the thirteenth wire and the second terminal is electrically connected to the ninth wire. , The feature is that the gate terminal is electrically connected to the 14th wiring.</p><p num="0038"> In the present invention, the fifth wiring and the twelfth wiring are electrically connected, and the sixth wiring And the thirteenth wire may be electrically connected.</p><p num="0039"> Further, in the present invention, the fifth wiring and the twelfth wiring are the same wiring, and the sixth wiring And the thirteenth wiring may be the same wiring.</p><p num="0040"> Further, in the present invention, the first wiring and the eighth wiring are electrically connected, and the second wiring and the second wiring And the 9th wire is electrically connected, and the 3rd and 10th wires are electrically connected, The 4th and 11th wires are electrically connected, and the 7th and 14th wires are electrically connected. It may be connected.</p><p num="0041"> Further, in the present invention, the first wiring and the eighth wiring are the same wiring, and the second wiring and the second wiring And the 9th wiring is the same wiring, the 3rd wiring and the 10th wiring are the same wiring, and the 1st wiring The 4th wiring and the 11th wiring are the same wiring, and the 7th wiring and the 14th wiring are the same wiring. It may be a line.</p><p num="0042"> Further, in the present invention, the first wiring and the eighth wiring are electrically connected, and the second wiring and the second wiring And the 9th wire is electrically connected, and the 3rd and 10th wires are electrically connected, The 4th and 11th wires are electrically connected, and the 5th and 12th wires are electrically connected. Connected, the 6th and 13th wires are electrically connected, the 7th and 14th wires The wires may be electrically connected.</p><p num="0043"> Further, in the present invention, the first wiring and the eighth wiring are the same wiring, and the second wiring and the second wiring And the 9th wiring is the same wiring, the 3rd wiring and the 10th wiring are the same wiring, and the 1st wiring The 4th wiring and the 11th wiring are the same wiring, and the 5th wiring and the 12th wiring are the same wiring. It is a wire, and the 6th wiring and the 13th wiring are the same wiring, and the 7th wiring and the 14th wiring are arranged. The wires may be the same wiring.</p><p num="0044">Further, the liquid crystal display device of the present invention includes a first pixel to a fourth pixel having a liquid crystal element and a first pixel. Drive circuit, second drive circuit, first wiring, second wiring, third wiring, fourth arrangement Wires, 5th wiring, 6th wiring, 7th wiring, 8th wiring, 9th wiring, 1st It has 0 wiring, 11th wiring, and 12th wiring, and the 1st pixel is the 5th wiring. It is electrically connected to the first drive circuit via wiring, and the second pixel is the sixth arrangement. It is electrically connected to the first drive circuit via a wire, and the third pixel is the eleventh arrangement. It is electrically connected to the second drive circuit via a wire, and the fourth pixel is the twelfth arrangement. It is electrically connected to the second drive circuit via a wire, and the first drive circuit is a first shifter. The second drive circuit has a second shift register and has a first shift register. Has multiple flip-flops, at least one of the multiple flip-flops 1st transistor, 2nd transistor, 3rd transistor, 4th transistor and And has a fifth transistor, the first transistor has a first terminal electrically connected to the fifth wire. Connected, the second terminal is electrically connected to the gate terminal of the second transistor, the gate terminal Is electrically connected to the 5th wire, and the 2nd transistor has the 1st terminal electrically connected to the 3rd wire. The second terminal is electrically connected to the sixth wire, and the third transistor is the first The terminal is electrically connected to the gate terminal of the second transistor, and the second terminal is connected to the second wiring. It is air-connected, the gate terminal is electrically connected to the fourth wire, and the fourth transistor is The first terminal is electrically connected to the sixth wire, the second terminal is electrically connected to the second wire, The gate terminal is electrically connected to the 4th wire, and the 5th transistor has the 1st terminal as the 6th. Electrically connected to the wiring, the second terminal is electrically connected to the second wiring, the gate terminal is the first Electrically connected to the wiring of, the second shift register has multiple flip-flops, At least one of the multiple flip-flops is the sixth transistor, the seventh transition. It has a star, an 8th transistor, a 9th transistor and a 10th transistor, and a 6th transistor. The first terminal of the transistor is electrically connected to the eleventh wire, and the second terminal is the seventh transistor. It is electrically connected to the gate terminal of the engineer, and the gate terminal is electrically connected to the 11th wire. In the 7th transistor, the 1st terminal is electrically connected to the 9th wiring, and the 2nd terminal is the 1st. Electrically connected to the second wire, the eighth transistor has the first terminal electrically connected to the eighth wire. Connected, the second terminal is electrically connected to the gate terminal of the seventh transistor, the gate terminal Is electrically connected to the 10th wire, and the 9th transistor has the 1st terminal connected to the 8th wire. It is air-connected, the second terminal is electrically connected to the twelfth wire, and the gate terminal is the tenth arrangement. Electrically connected to the wire, the 10th transistor has the 1st terminal electrically connected to the 8th wire The second terminal is electrically connected to the twelfth wire and the gate terminal is electrically connected to the seventh wire. It is characterized by being connected.</p><p num="0045"> In the present invention, the fifth wiring and the eleventh wiring are electrically connected, and the sixth wiring And the twelfth wiring may be electrically connected.</p><p num="0046"> In the present invention, the fifth wiring and the eleventh wiring are the same wiring, and the sixth wiring. And the twelfth wiring may be the same wiring.</p><p num="0047"> In the present invention, the first wiring and the seventh wiring are electrically connected, and the second wiring and the second wiring And the 8th wire is electrically connected, the 3rd and 9th wires are electrically connected, and the 4th wire is connected. Wiring and the tenth wiring may be electrically connected.</p><p num="0048"> In the present invention, the first wiring and the seventh wiring are the same wiring, and the second wiring and the second wiring And the 8th wiring is the same wiring, the 3rd wiring and the 9th wiring are the same wiring, and the 4th wiring Wiring and the tenth wiring may be the same wiring.</p><p num="0049"> In the present invention, the first wiring and the seventh wiring are electrically connected, and the second wiring and the second wiring And the 8th wire is electrically connected, the 3rd and 9th wires are electrically connected, and the 4th wire is connected. Wiring and the 10th wire are electrically connected, and the 5th and 11th wires are electrically connected. Subsequently, the sixth and twelfth wires may be electrically connected.</p><p num="0050"> In the present invention, the first wiring and the seventh wiring are the same wiring, and the second wiring and the second wiring And the 8th wiring is the same wiring, the 3rd wiring and the 9th wiring are the same wiring, and the 4th wiring Wiring and the 10th wiring are the same wiring, and the 5th wiring and the 11th wiring are the same wiring. Therefore, the sixth wiring and the twelfth wiring may be the same wiring.</p><p num="0051"> In the present invention, the first transistor, the second transistor, and the third transistor 4th transistor, 5th transistor, 6th transistor, 7th transistor The 8th transistor, the 9th transistor and the 10th transistor are N channels. It may be a type transistor.</p><p num="0052"> In the present invention, the first transistor, the second transistor, and the third transistor 4th transistor, 5th transistor, 6th transistor, 7th transistor The 8th transistor, the 9th transistor, and the 10th transistor are semiconductor layers. The semiconductor layer may be amorphous silicon.</p><p num="0053"> In the present invention, the second terminal of the first transistor and the game of the first transistor The first capacitive element is arranged between the terminal and the second terminal of the sixth transistor and the first. A second capacitive element may be arranged between the gate terminal of the transistor and the gate terminal of the transistor.</p><p num="0054">The present invention is an electronic device including the liquid crystal display device described above.</p><p num="0055">The switches shown in the present specification may have various forms, and as an example, they may be used. There are electrical switches and mechanical switches. In other words, it can control the flow of current. Anything is sufficient, and various things can be used without being limited to a specific one. For example, a tiger It can be a diode or a diode (eg, a PN diode, a PIN diode, a shocker). It can be a tokey diode, a diode-connected transistor, etc.) or a thyristor. However, it may be a logic circuit that combines them. Therefore, the transistor is used as a switch. When used, the transistor acts as a mere switch, so the transistor The polarity (conductive type) is not particularly limited. However, if less off current is desired, then off It is desirable to use a transistor with the polarity with the smaller current. Tran with low off current Gistas include those with an LDD area and those with a multi-gate structure. To. In addition, the potential of the source terminal of the transistor that operates as a switch is the power supply on the low potential side. When operating in a state close to (Vss, GND, 0V, etc.), use the N-channel type, and vice versa. P channel when the potential of the terminal is close to the high potential side power supply (Vdd, etc.) It is desirable to use a mold. Because the absolute value of the voltage between the gate and the source can be increased Therefore, the operation as a switch can be performed more accurately.</p><p num="0056">A CMOS type switch may be used by using both N channel type and P channel type. .. If a CMOS type switch is used, the P-channel type or N-channel type switch will conduct. For example, since a current can flow, the operation as a switch can be performed more accurately. For example, the voltage is output appropriately regardless of whether the voltage of the input signal to the switch is high or low. Can be made to. Also, the voltage amplitude value of the signal for turning the switch on or off Since it can be made smaller, the power consumption can also be reduced. Also, as a switch When using a transistor, the input terminal (either the source terminal or the drain terminal) and Output terminal (the other of the source terminal or drain terminal) and the terminal that controls continuity (gate terminal) ) And. On the other hand, when a diode is used as a switch, the end that controls continuity May have no children. Therefore, it is possible to reduce the wiring for controlling the terminals. I can.</p><p num="0057">In addition, in this specification, being connected is functionally different from the case of being electrically connected. It shall include the case of being connected and the case of being directly connected. Therefore, this specification In the structure disclosed by the document, things other than the prescribed connection relationship shall be included. For example, Elements that allow electrical connections between parts (eg, switches and transitions) Even if one or more stars, capacitive elements, inductors, resistance elements, diodes, etc.) are arranged Good. In addition, circuits that enable functional connections (for example, logic circuits (inverters and NAND) Circuits, NOR circuits, etc.) and signal conversion circuits (DA conversion circuits, AD conversion circuits, gamma correction circuits, etc.) Etc.) and potential level conversion circuit (power supply circuit such as step-up circuit and step-down circuit, H signal and L signal electricity Level shifter circuit that changes the order level), voltage source, current source, switching circuit, amplifier circuit (such as amplifier circuit) Signal amplitude and current amount of operational amplifiers, differential amplifier circuits, source follower circuits, buffer circuits, etc. (Circuit that can increase etc.), signal generation circuit, storage circuit, control circuit, etc.) It may be placed on top. Alternatively, it is directly connected without sandwiching another element or other circuit between them. And may be arranged.</p><p num="0058">If it includes only the case where elements and circuits are connected without intervening, they are directly connected. It shall be stated that there is. Also, if it is stated that it is electrically connected, it is electric. (That is, when they are connected with another element in between) and functional Direct connection when connected to (that is, when connected with another circuit in between) (That is, when another element or another circuit is connected without sandwiching it) It shall include.</p><p num="0059">Various forms can be used for the display element, the display device, the light emitting element, and the light emitting device. In addition, it can have various elements. For example, display elements, display devices, light emitting elements, and light emitting devices. As a device, an EL element (organic EL element, inorganic EL element or EL element including organic matter and inorganic matter) Child), electron emitting element, liquid crystal element, electronic ink, grating light bulb (GLV), Plasma display (PDP), Digital Micromirror Device (DMD), Piezoelectric device Ramic display, carbon nanotubes, etc. A display medium whose trust changes can be applied. A display device using an EL element As an EL display, as a display device using an electron emitting element, a field emissi Display (FED) and SED flat display (SED: Surface) -conduction Electron-emitter Disply), etc. Display devices that use crystal elements include liquid crystal displays, transmissive liquid crystal displays, and semi-transmissive types. Liquid crystal display, reflective liquid crystal display, electronic display device using electronic ink There is paper.</p><p num="0060">In addition, in this specification, a transistor of various forms is applied as a transistor. Can be done. Therefore, there is no limitation on the types of transistors that can be applied. So, for example, Thin film transitions with non-single crystal semiconductor films typified by amorphous silicon and polycrystalline silicon (TFT) etc. can be applied. Therefore, when a single crystal semiconductor film is used It can be manufactured at a lower manufacturing temperature, at a lower cost, on a large substrate, and transparent. A transistor that can be manufactured on a bright substrate and can transmit light can be manufactured, and a transistor can be manufactured. It is possible to control the transmission of light in the display element using a gista. Also, semiconductor substrates and SO It can be formed using an I substrate or the like. In addition, MOS type transistors and junction type transistors Gista, bipolar transistor, etc. can be applied. Due to these, there are variations Can be manufactured with a small number of transistors, or can be manufactured with a high current supply capacity. , Can manufacture small-sized transistors and construct circuits with low power consumption. Can be done. In addition, compound semiconductors such as ZnO, a-InGaZnO, SiGe, and GaAs And a thin film transistor made by thinning them is applied. Can be done. As a result, it can be manufactured at a low manufacturing temperature and at room temperature, and has low heat resistance. Transistors can be formed directly on a substrate, such as a plastic substrate or a film substrate. To. In addition, transistors formed using inkjet or printing methods can be applied. I can. As a result, it can be manufactured at room temperature, in a low vacuum state, and on a large substrate. Can be manufactured. In addition, it is possible to manufacture without using a mask (reticle). Therefore, the layout of the transistor can be easily changed. Also, organic semiconductors And transistors with carbon nanotubes, and other transistors can be applied. it can. These make it possible to form a bendable transistor. It should be noted that , The non-single crystal semiconductor film may contain hydrogen or halogen. Also, a transistor Various types of substrates can be used, and the type of substrate on which is formed is limited to a specific one. There is nothing. Therefore, for example, as a substrate, a single crystal substrate, an SOI substrate, a glass substrate, quartz Substrate, plastic substrate, paper substrate, cellophane substrate, stone substrate, stainless steel substrate , A substrate having a stainless steel still foil or the like can be used. Also, a certain board Then, move the transistor to another board and place it on another board. You may put it. Other substrates placed include single crystal substrates, SOI substrates, and glass. Substrates, quartz substrates, plastic substrates, paper substrates, cellophane substrates, stone substrates, stainless steel -A still substrate, a substrate having a stainless steel still foil, or the like can be used. This By using these substrates, transistors with good characteristics can be formed and erased. It is possible to form a transistor with low power consumption and make it a device that is hard to break. It can also have heat resistance.</p><p num="0061">The transistor configuration can take various forms. Not limited to a specific configuration I. For example, a multi-gate structure having two or more gate electrodes may be used. Maru In the chigate structure, the channel areas are connected in series, so there are multiple channels. The configuration is such that transistors are connected in series. By making it a multi-gate structure , Off-current can be reduced, and the withstand voltage of the transistor can be improved to improve reliability. Also, when operating in the saturated region, even if the voltage between the drain and the source changes, the drain The current between the sources does not change so much, and flat characteristics can be obtained. Also, Cha The structure may be such that gate electrodes are arranged above and below the flannel. Gate electrodes above and below the channel By making the structure arranged, the channel area increases, so the current value is increased. In addition, the depletion layer can be easily formed and the S value can be reduced. channel When the gate electrodes are arranged above and below, multiple transistors are connected in parallel. Will be.</p><p num="0062">In addition, the structure is such that the gate electrode is placed above the channel, and the gate electrode is placed below the channel. The placed structure, normal stagger structure, reverse stagger structure, and channel area are divided into multiple areas. The structure should be such that the gate electrodes are connected in parallel or connected in series. Is possible. Also, the source and drain electrodes overlap the channel (or part of it). May be. Source and drain electrodes overlap the channel (or part of it) Due to the structure, the electric charge accumulates in a part of the channel and the operation becomes unstable. Can be prevented. It is also possible to have a configuration in which an LDD area is provided. LD By providing the D region, the off-current is reduced and the withstand voltage of the transistor is improved. It can be reliable and the voltage between the drain and source when operating in the saturated region. Even if the current changes, the current between the drain and the source does not change so much, and the characteristics should be flat. Can be done.</p><p num="0063">Various types of transistors can be used in the present specification, and various substrates can be used. Can be formed on top. Therefore, the entire circuit is formed on the glass substrate. It may be formed on a plastic substrate, or it may be formed on a single crystal substrate. It may be formed on an SOI substrate, or it may be formed on any substrate. May be good. Since all the circuits are formed on the same board, the number of parts is reduced and the cost is reduced. The number of connection points with circuit components can be reduced to improve reliability. can do. Alternatively, part of the circuit is formed on one board and another part of the circuit. The portion may be formed on another substrate. That is, all of the circuits are formed on the same board. It does not have to be. For example, a part of a circuit is formed by using transistors on a glass substrate, and the circuit Another part of is formed on a single crystal substrate, and its IC chip is COG (Chip On Gla). It may be connected by ss) and placed on a glass substrate. Alternatively, use the IC chip as TAB (T). Contact with glass substrate using ape Automated Bonding) or printed circuit board You may continue. In this way, a part of the circuit is formed on the same board, so that the component points The number can be reduced to reduce the cost, and the number of connection points with circuit components can be reduced for reliability. It is possible to improve the sex. Also, the part where the drive voltage is high and the part where the drive frequency is high. Will consume a lot of power, so do not form such parts on the same board. By doing so, it is possible to prevent an increase in power consumption.</p><p num="0064">In addition, in this specification, one pixel means one element which can control brightness. To. Therefore, as an example, one pixel indicates one color element, and one color element thereof. Express the brightness with. Therefore, at that time, it consists of R (red) G (green) B (blue) color elements. In the case of a color display device, the smallest unit of an image is three strokes of R pixel, G pixel, and B pixel. It shall be composed of elements. The color elements are not limited to three colors, and a larger number is used. You may add colors other than RGB. For example, add white and RGBW (W is White) may be used. Also, in RGB, for example, yellow, cyan, magenta, emerald One or more colors such as green and vermilion may be added. Also, for example, less in RGB Similar colors may be added for both colors. For example, R, G, B1, B2 Good. Both B1 and B2 are blue, but their frequencies are slightly different. like this By using color elements, it is possible to display more realistically and reduce power consumption. Can be done. As another example, one color element is brightened using a plurality of areas. When controlling the pixel, one pixel is set for one area. Therefore, as an example, area gradation When performing, there are multiple areas for controlling the brightness for each color element, and the gradation is adjusted as a whole. Although it is expressed, one pixel is defined as one area for controlling brightness. Therefore, on the spot In that case, one color element is composed of a plurality of pixels. In that case, it depends on the pixel. Therefore, the size of the area that contributes to the display may be different. Also, for one color element In multiple areas that control brightness, that is, multiple images that make up one color element In the element, make the signals supplied to each slightly different so that the viewing angle is widened. You may. When describing one pixel (three colors), the three pixels of R, G, and B are one pixel. Suppose that it is considered. When describing one pixel (one color), one color element When there are a plurality of pixels, it is assumed that they are collectively considered as one pixel.</p><p num="0065">In this specification, the pixels include the case where they are arranged (arranged) in a matrix. There is. Here, the fact that the pixels are arranged (arranged) in the matrix means that the pixels are arranged in the vertical direction or the horizontal direction. Including the case where they are arranged side by side on a straight line or the case where they are arranged side by side on a jagged line. I'm sorry. Therefore, for example, when performing full-color display with three color elements (for example, RGB) , When the stripes are arranged, or when the dots of the three color elements are arranged in so-called deltas. It shall include the case where there is. In addition, it also includes the case where it is placed as a Bayer. In addition, it should be noted. The color element is not limited to three colors, and may be more than that, for example, RGBW (W is white) or RG. B has one or more colors such as yellow, cyan, and magenta added. Also, color required The size of the display area may be different for each element dot. This reduces power consumption Below, the life of the display element can be extended.</p><p num="0066">The transistor includes at least a gate, a drain, and a source, respectively. It is an element with three terminals and has a channel region between the drain region and the source region. Therefore, a current can flow through the drain region, the channel region, and the source region. This Here, the source and drain change depending on the transistor structure, operating conditions, etc. It is difficult to limit whether the deviation is source or drain. Therefore, in this specification In this case, the area that functions as a source and drain is not called a source or drain. In some cases. In that case, as an example, when each is described as the first terminal and the second terminal, respectively. There is. There are at least three transistors, including a base, an emitter, and a collector. It may be an element having a terminal. In this case as well, the emitter and collector are at the first end. It may be referred to as a child or the second terminal.</p><p num="0067">The gate is a gate electrode and a gate wiring (also referred to as a gate line or a gate signal line). Refers to the whole including and or a part of them. The gate electrode is the channel region And the semiconductor film that forms the LDD (Lightly Doped Drain) region, etc. It refers to the conductive film of the portion that overlaps through the gate insulating film. With gate wiring Is a device for connecting between the gate electrodes of each pixel, or for connecting the gate electrode and another wiring. Refers to the line.</p><p num="0068">However, there are some parts that also function as gate electrodes and also as gate wiring. .. Such a region may be referred to as a gate electrode or a gate wiring. In other words There is also a region where the gate electrode and the gate wiring cannot be clearly distinguished. For example If there is a channel area that overlaps with the extended gate wiring, that area The area functions as a gate wiring, but it also functions as a gate electrode. Yo Therefore, such a region may be called a gate electrode or a gate wiring.</p><p num="0069">In addition, the area that is formed of the same material as the gate electrode and is connected to the gate electrode is also gated. You may call it a pole. Similarly, it is made of the same material as the gate wiring and is connected to the gate wiring. The area where the wiring is located may also be referred to as gate wiring. Such areas are, in a strict sense, channels. Does not overlap with the region or has the function of connecting to another gate electrode It may happen. However, due to the margin provided during manufacturing, gate electrodes and gates There is an area that is made of the same material as the wiring and is connected to the gate electrode and the gate wiring. Yo Therefore, such a region may also be referred to as a gate electrode or a gate wiring.</p><p num="0070">Also, for example, in a multi-gate transistor, the gate electrode of one transistor And the gate electrode of another transistor are in contact with a conductive film made of the same material as the gate electrode. Often continued. Such a region is for connecting the gate electrode and the gate electrode. Since it is an area, it may be called gate wiring, but a multi-gate transistor is one transistor. Since it can be regarded as a Langista, it may be called a gate electrode. In other words, game Those that are made of the same material as the electrodes and gate wiring and are connected to them are It may be called a gate electrode or a gate wiring. Also, for example, the gate electrode and the gate wiring are in contact with each other. The conductive film of the continuous part may also be called a gate electrode or a gate wiring. ..</p><p num="0071">The gate terminal is a gate region, a part of the gate electrode, or the gate electrode and electricity. Refers to part or all of the area that is air-connected.</p><p num="0072">The source is the source region, the source electrode, and the source wiring (source line or source signal line). Etc.), or a part of them. What is the source area? Half that contains a lot of P-type impurities (boron, gallium, etc.) and N-type impurities (phosphorus, arsenic, etc.) Refers to the conductor area. Therefore, a region containing a small amount of P-type impurities and N-type impurities, so to speak. The LDD (Lightly Doped Drain) area is included in the source area. I can't. The source electrode is formed of a material different from the source region and is in electrical contact with the source region. It refers to the conductive layer of the part that is continuously arranged. However, the source electrode is in the source region. It may also be called a source electrode including the above. The source wiring is the connection between the source electrodes of each pixel. , Or the wiring for connecting the source electrode and another wiring.</p><p num="0073">However, there are some parts that also function as source electrodes and as source wiring. Exists. Such a region may be referred to as a source electrode or a source wiring. That is, there is a region where the source electrode and the source wiring cannot be clearly distinguished. example For example, if there is a source area that overlaps the stretched source wiring, The area of is functioning as the source wiring, but it also functions as the source electrode. .. Therefore, such a region may be referred to as a source electrode or a source wiring. ..</p><p num="0074">In addition, the area that is formed of the same material as the source electrode and is connected to the source electrode, and the source electricity The part that connects the pole and the source electrode may also be called the source electrode. Also, the source area and -The bar-wrapped part may also be called the source electrode. Similarly, the same material as the source wiring The area formed by the material and connected to the source wiring may also be called the source wiring. This Such regions may not, in the strict sense, have the ability to connect to another source electrode. To. However, due to the margin provided during manufacturing, it is made of the same material as the source electrode and source wiring. There is an area that is connected to the source electrode and source wiring. Therefore, such an area It may be called a source electrode or source wiring.</p><p num="0075">Further, for example, the conductive film of the portion connecting the source electrode and the source wiring is also the same as the source electrode. You can call it, or you can call it source wiring.</p><p num="0076">The source terminal is electrically the source region, a part of the source electrode, or the source electrode. Refers to part or all of the connected area.</p><p num="0077">The drain is the same as the source.</p><p num="0078">In this specification, the semiconductor device is a semiconductor element (transistor, diode, etc.). Refers to a device having a circuit including. In addition, all devices that can function by using semiconductor characteristics It may be. A display device is a device having a display element (liquid crystal element, light emitting element, etc.). Say. It should be noted that a plurality of pixels including display elements such as a liquid crystal element and an EL element and those pixels are used. It may be a display panel main body in which peripheral drive circuits to be driven are formed on the same substrate. Also , Peripheral drive circuits arranged on the board by wire bonding or bumps, so-called It may include an IC chip connected by chip-on-glass (COG). further, Flexib with IC, resistor element, capacitive element, inductor, transistor, etc. A printed circuit board (FPC) or printed wiring board (PWB) may also be included. Furthermore May include an optical sheet such as a polarizing plate or a retardation plate. In addition, the backlight uni (Light guide plate, prism sheet, diffusion sheet, reflective sheet, light source (LED, cold cathode tube, etc.) ) May be included.) May be included. In addition, the light emitting device is especially an EL element or FE. A display device having a self-luminous display element such as the element used in D. With liquid crystal display device Refers to a display device having a liquid crystal element.</p><p num="0079">In addition, in this specification, it is formed on, or is formed on. For the description of "on" or "on", on something It is not limited to being in direct contact. If you are not in direct contact, that is, there is something else in between It shall include the case where it is pinched. So, for example, on layer A (or on layer A), If layer B is formed, it means that layer B is formed in direct contact with layer A. And another layer (for example, layer C or layer D) is formed in direct contact with layer A, and on top of that It shall include the case where the layer B is formed in direct contact with the case. Also, above the ~ The same is true for loading, not limited to being in direct contact with one thing, but another in between. It shall also include the case where is sandwiched. So, for example, layer B is formed above layer A. If so, there are cases where layer B is formed in direct contact with layer A and cases where it is directly on layer A. Another layer (for example, layer C or layer D) is formed by contacting, and layer B is directly in contact with it. It shall include the case where it is formed. In addition, the place under ~ or below ~ The same applies to the case, and includes cases where they are in direct contact with each other and cases where they are not in direct contact with each other. To.</p>

<p num="0080">According to the present invention, deterioration of transistor characteristics can be suppressed. Therefore, Transis It is possible to prevent the shift register from malfunctioning due to deterioration of the characteristics of the data. Also, shift It is possible to suppress display defects of the liquid crystal display device caused by the malfunction of the Jista.</p>

0081<figref num="1">The figure explaining Embodiment 1.</figref><figref num="2">The figure explaining Embodiment 1.</figref><figref num="3">The figure explaining Embodiment 1.</figref><figref num="4">The figure explaining Embodiment 1.</figref><figref num="5">The figure explaining Embodiment 1.</figref><figref num="6">The figure explaining Embodiment 1.</figref><figref num="7">The figure explaining Embodiment 1.</figref><figref num="8">The figure explaining Embodiment 1.</figref><figref num="9">The figure explaining Embodiment 1.</figref><figref num="10">The figure explaining Embodiment 1.</figref><figref num="11">The figure explaining Embodiment 1.</figref><figref num="12">The figure explaining Embodiment 1.</figref><figref num="13">The figure explaining Embodiment 2.</figref><figref num="14">The figure explaining Embodiment 2.</figref><figref num="15">The figure explaining Embodiment 2.</figref><figref num="16">The figure explaining Embodiment 2.</figref><figref num="17">The figure explaining Embodiment 2.</figref><figref num="18">The figure explaining Embodiment 2.</figref><figref num="19">The figure explaining Embodiment 3.</figref><figref num="20">The figure explaining Embodiment 3.</figref><figref num="21">The figure explaining Embodiment 3.</figref><figref num="22">The figure explaining Embodiment 3.</figref><figref num="23">The figure explaining Embodiment 4.</figref><figref num="24">The figure explaining Embodiment 4.</figref><figref num="25">The figure explaining Embodiment 4.</figref><figref num="26">The figure explaining Embodiment 4.</figref><figref num="27">The figure explaining Embodiment 5.</figref><figref num="28">The figure explaining Embodiment 5.</figref><figref num="29">The figure explaining Embodiment 5.</figref><figref num="30">The figure explaining Embodiment 5.</figref><figref num="31">The figure explaining Embodiment 5.</figref><figref num="32">The figure explaining Embodiment 6.</figref><figref num="33">The figure explaining Embodiment 6.</figref><figref num="34">The figure explaining Embodiment 6.</figref><figref num="35">The figure explaining Embodiment 6.</figref><figref num="36">The figure explaining Embodiment 7.</figref><figref num="37">The figure explaining Embodiment 7.</figref><figref num="38">The figure explaining Embodiment 7.</figref><figref num="39">The figure explaining Embodiment 7.</figref><figref num="40">The figure explaining Embodiment 8.</figref><figref num="41">The figure explaining Embodiment 8.</figref><figref num="42">The figure explaining Embodiment 8.</figref><figref num="43">The figure explaining Embodiment 8.</figref><figref num="44">The figure explaining Embodiment 1.</figref><figref num="45">The figure explaining Embodiment 1.</figref><figref num="46">The figure explaining Embodiment 9.</figref><figref num="47">The figure explaining Embodiment 9.</figref><figref num="48">The figure explaining Embodiment 9.</figref><figref num="49">The figure explaining Embodiment 9.</figref><figref num="50">The figure explaining Embodiment 9.</figref><figref num="51">The figure explaining Embodiment 9.</figref><figref num="52">The figure explaining Embodiment 9.</figref><figref num="53">The figure explaining Embodiment 9.</figref><figref num="54">The figure explaining Embodiment 9.</figref><figref num="55">The figure explaining Embodiment 9.</figref><figref num="56">The figure explaining Embodiment 11.</figref><figref num="57">The figure explaining Embodiment 11.</figref><figref num="58">The figure explaining Embodiment 11.</figref><figref num="59">The figure explaining Embodiment 11.</figref><figref num="60">The figure explaining Embodiment 11.</figref><figref num="61">The figure explaining Embodiment 12.</figref><figref num="62">The figure explaining Embodiment 12.</figref><figref num="63">The figure explaining Embodiment 13.</figref><figref num="64">The figure explaining Embodiment 12.</figref><figref num="65">The figure explaining Embodiment 10.</figref><figref num="66">The figure explaining Embodiment 10.</figref><figref num="67">The figure explaining Embodiment 10.</figref><figref num="68">The figure explaining Embodiment 10.</figref><figref num="69">The figure explaining Embodiment 10.</figref><figref num="70">The figure explaining Embodiment 10.</figref><figref num="71">The figure explaining Embodiment 10.</figref><figref num="72">The figure explaining Embodiment 10.</figref><figref num="73">The figure explaining Embodiment 10.</figref><figref num="74">The figure explaining Embodiment 10.</figref><figref num="75">The figure explaining embodiment 14.</figref><figref num="76">The figure explaining embodiment 14.</figref><figref num="77">The figure explaining embodiment 14.</figref><figref num="78">The figure explaining embodiment 14.</figref><figref num="79">The figure explaining embodiment 14.</figref><figref num="80">The figure explaining embodiment 14.</figref><figref num="81">The figure explaining embodiment 14.</figref><figref num="82">The figure explaining embodiment 14.</figref><figref num="83">The figure explaining embodiment 14.</figref><figref num="84">The figure explaining embodiment 14.</figref><figref num="85">The figure explaining embodiment 15.</figref><figref num="86">The figure explaining embodiment 17.</figref><figref num="87">The figure explaining embodiment 18.</figref><figref num="88">The figure explaining embodiment 18.</figref><figref num="89">The figure explaining embodiment 18.</figref><figref num="90">The figure explaining embodiment 19.</figref><figref num="91">The figure explaining embodiment 20.</figref><figref num="92">The figure explaining Embodiment 1.</figref><figref num="93">The figure explaining embodiment 22.</figref><figref num="94">The figure explaining embodiment 23.</figref><figref num="95">The figure explaining embodiment 23.</figref><figref num="96">The figure explaining embodiment 23.</figref><figref num="97">The figure explaining embodiment 23.</figref><figref num="98">The figure explaining embodiment 23.</figref><figref num="99">The figure explaining embodiment 23.</figref><figref num="100">The figure explaining embodiment 14.</figref><figref num="101">The figure explaining embodiment 14.</figref><figref num="102">The figure explaining embodiment 17.</figref><figref num="103">The figure explaining embodiment 21.</figref><figref num="104">The figure explaining Embodiment 16.</figref><figref num="105">The figure explaining Embodiment 16.</figref>

0082Hereinafter, embodiments of the present invention will be described with reference to the drawings. However, the present invention has many It can be carried out in different embodiments and does not deviate from the gist of the present invention and its scope. It is easily understood by those skilled in the art that the form and details of the damn can be changed in various ways. Therefore The interpretation is not limited to the description of the present embodiment.

0083(Embodiment 1) In this embodiment, refer to the drawings for the basic configuration of the shift register of the display device of the present invention. I will explain. Figure 1 shows one of the multiple flip-flops that the shift register has. (For example, the first stage) flip-flop is shown. The flip-flop shown in Fig. 1 is the first Transistor 101 of 1, second transistor 102, third transistor 103 and first It has 4 transistors 104. The flip-flops are the first wiring 111 and the second. Wiring 112, 3rd Wiring 113, 4th Wiring 114, 5th Wiring 115 and 6th Wiring Connected to 116. In the present embodiment, the first transistor 101 and the second transistor 101 Langista 102, 3rd transistor 103 and 4th transistor 104 are N channels It is a transistor, and the voltage (Vgs) between its gate and source is the threshold voltage (Vth). ), It shall be in a conductive state. The first wiring 111 and the second wiring 112 may be referred to as a first power line and a second power line, respectively. Also, the third wiring 11 The third and fourth wires 114 may be referred to as a first signal line and a second signal line, respectively.

0084The first terminal (one of the source terminal and the drain terminal) of the first transistor 101 is the first arrangement. Connected to wire 111, the second terminal (the other of the source and drain terminals) is the second transition. It is connected to the gate terminal of the star 102, and the gate terminal is connected to the fifth wiring 115. The first terminal of the third transistor 103 is connected to the second wire 112, and the second terminal is the second. It is connected to the gate terminal of the transistor 102, and the gate terminal is connected to the fourth wire 114. ing. The first terminal of the second transistor 102 is connected to the sixth wiring 116, and the second terminal Is connected to the third wire 113. The first terminal of the fourth transistor 104 is the sixth arrangement Connected to wire 116, the second terminal is connected to the second wire 112, the gate terminal is the fourth wire Connected to 114. The second terminal of the first transistor 101 and the second transistor No connection point between the gate terminal of the Gista 102 and the first terminal of the third transistor 103 Do 121.

0085The second terminal of the third transistor 103 and the second terminal of the fourth transistor 104 are , Not limited to being connected to the second wire 112, even if connected to different wires Good. In addition, the gate terminal of the third transistor 103 and the gate terminal of the fourth transistor 104 The terminal is not necessarily connected to the fourth wire 114, but is connected to a separate wire. You may.

0086Next, regarding the operation of the flip-flop shown in FIG. 1, the timing chart and the figure of FIG. 2 are shown. This will be explained with reference to 3. In Fig. 2, the set period, selection period, and non-selection period are described. I will explain. The non-selection period is the first non-selection period, the second non-selection period, and the third non-selection period. It is divided into selection periods, and the first non-selection period, the second non-selection period, and the third non-selection period are repeated in order. I'm turning back.

0087The potential of V1 is supplied to the first wiring 111, and the potential of V2 is supplied to the second wiring 112. ing. However, V1&gt; V2.

0088However, the potential of V1 is not always supplied to the first wiring 111, and other potentials are supplied. It may be supplied, or a digital signal or an analog signal may be input. Also , The second wire 112 is not necessarily supplied with the potential of V2, but other potentials are supplied. It may be input, or a digital signal or an analog signal may be input.

0089A signal is input to the third wiring 113, the fourth wiring 114, and the fifth wiring 115. There is. The signal input to the third wiring 113 is the first clock signal, and the fourth wiring 11 The signal input to 4 is the second clock signal, and the signal input to the fifth wiring 115 is This is the start signal. In addition, the third wiring 113, the fourth wiring 114, and the fifth wiring 115 The potential of the H signal is V1 (hereinafter, also referred to as H level), and the potential of the L signal is V1 (hereinafter, also referred to as H level). It is a V2 (hereinafter also referred to as L level) digital signal.

0090However, the first clock signal is not always input to the third wiring 113, and other Signal may be input, or a constant potential or current may be input. Also, the 4th The second clock signal is not always input to the wiring 114 of, but other signals are input. It may be input, or a constant potential or current may be input. Also, the fifth wiring 115 Is not limited to the start signal being input to, and other signals may be input. A constant potential or current may be input.

0091Further, the H of the signal input to the third wiring 113, the fourth wiring 114, and the fifth wiring 115. The signal potential is not limited to V1 and the L signal potential is not limited to V2, and the H signal potential is the L signal potential. If it is too high, their potentials are not particularly limited.

0092A signal is output from the sixth wiring 116. Signal output from 6th wire 116 Is the output signal of the flip-flop, and also the start signal of the flip-flop of the next stage. is there. The signal output from the sixth wiring 116 is the fifth of the flip-flops in the next stage. It is input to the wiring 115 of. The signal output from the sixth wiring 116 is the H signal. The position is V1 (hereinafter also referred to as H level), and the potential of the L signal is V2 (hereinafter also referred to as L level). It is a digital signal of.

0093In FIG. 2, the signal 213 is the signal input to the third wiring 113, and the signal 214 is the third wiring 113. The signal input to the wiring 114 of 4, and the signal 215 is the signal input to the fifth wiring 115. The signal 216 is a signal output from the sixth wiring 116. Also, the potential 221 Is the potential of node 121 in FIG.

0094First, in the period A of FIG. 2 and the set period shown in FIG. 3 (A), the signal 213 is at the L level. , Signal 214 is at L level and signal 215 is at H level. Therefore, the third tiger The engineer 103 and the fourth transistor 104 are turned off, and the first transistor 101 Is turned on. At this time, the second terminal of the first transistor 101 becomes the source terminal, and The potential (potential 221) of the disk 121 is from the potential of the fifth wiring 115 to the first transistor 10. Since the value is obtained by subtracting the threshold voltage (Vth101) of 1, it becomes V1-Vth101. Therefore, the second transistor 102 is turned on, and the potential of the sixth wiring 116 is the third wiring. Since it is equal to the potential of 113, it becomes V2. In this way, during the set period, flip flow The L level is output from the 6th wiring 116 while the 2nd transistor 102 is on. To do.

0095In the period B of FIG. 2 and the selection period shown in FIG. 3 (B), the signal 213 becomes the H level and the signal 2 14 remains at L level and signal 215 is at L level. Therefore, the third tran Gista 103 and fourth transistor 104 remain off, first transistor 1 01 is off. At this time, the second terminal of the second transistor 102 becomes the source terminal. , The potential of the sixth wiring 116 begins to rise. The potential of node 121 (potential 221) is no Since the de 121 is in a floating state (hereinafter, also referred to as a floating state), the second unit 6th wiring by capacitive coupling of parasitic capacitance between the gate terminal and the 2nd terminal of the Langista 102 It rises at the same time as the potential of 116 (also called bootstrap operation). Therefore, the second tiger The voltage Vgs between the gate and source of the engineer 102 is Vth102 + α (Vth102: No. The threshold voltage of the transistor 102 of 2, α: any positive number), and the sixth wiring 116 The potential of is H level (V1). Thus, during the selection period, flip-flops are no By setting the potential of the unit 121 to V1 + Vth102 + α, the H level is set to the sixth wiring 1 It can be output from 16.

0096In the period C of FIG. 2 and the first non-selection period shown in FIG. 3 (C), the signal 213 becomes the L level. , Signal 214 goes to H level and signal 215 remains at L level. Therefore, the third Transistor 103 and the fourth transistor 104 are turned on, and the first transistor 101 remains off. Node 121 and the sixth wire 116 are the third tigers, respectively. The potential of the second wiring 112 is supplied through the engineer 103 and the fourth transistor 104. Therefore, it becomes L level.

0097During period D in FIG. 2 and the second non-selection period shown in FIG. 3 (D), signal 213 remains at L level. The signal 214 is at the L level and the signal 215 remains at the L level. Therefore , The third transistor 103 and the fourth transistor 104 are turned off, and the first transistor Gista 101 remains off. Therefore, the node 121 and the sixth wire 116 are L. Maintain the level.

0098In the period E of FIG. 2 and the third non-selection period shown in FIG. 3 (E), the signal 213 becomes the H level. , Signal 214 remains at L level and signal 215 remains at L level. Therefore , 1st transistor 101, 3rd transistor 103 and 4th transistor 104 Remains off. Therefore, node 121 and sixth wire 116 maintain L level. To do.

0099From the above, the flip-flop of FIG. 1 is the third transistor 103 and the fourth transistor. Since the engineer 104 is turned on only during the first non-selection period, the third transistor 103 and And the deterioration of the characteristics of the fourth transistor 104 (shift of the threshold voltage) can be suppressed. To. The flip-flop in FIG. 1 is the first transistor 101 and the second transistor. Since the data 102 is turned on only during the set period, and only during the set period and the selection period, the first Deterioration of the characteristics of the 1st transistor 101 and the 2nd transistor 102 can also be suppressed. To.

0100Further, the flip-flop of FIG. 1 is no in the first non-selection period of the non-selection period. Since V2 is supplied to the 121 and the 6th wiring 116, the malfunction of the flip-flop is suppressed. can do. Because, in the non-selection period, at regular intervals (first non-selection period) V2 is supplied to the node 121 and the sixth wiring 116, and the node 121 and the sixth wiring 116 are supplied. This is because the potential of the wire 116 can be stably maintained at V2.

0101The flip-flops in FIG. 1 are the first transistor 101 and the second transistor 10. The second, third transistor 103 and fourth transistor 104 are all N-channel transistors. It is characterized by being composed of a gista. Therefore, the flip-flop in Fig. 1 is Amorphous silicon can be used as the semiconductor layer of the Langista, so it is a manufacturing process. It is possible to reduce the manufacturing cost and improve the yield. Further, it becomes possible to manufacture a semiconductor device such as a large display panel. Also, Tran Simplify the manufacturing process even if polysilicon or single crystal silicon is used as the semiconductor layer of the gista. Can be planned.

0102Further, the flip-flop shown in FIG. 1 has deteriorated characteristics (threshold voltage) as a semiconductor layer of a transistor. Even if Amovfus silicon, which causes a remarkable pressure shift), is used, the characteristics of the transistor deteriorate. Therefore, it is possible to manufacture semiconductor devices such as display panels with a long life. Wear.

0103Here, the first transistor 101, the second transistor 102, and the third transistor 1 The functions of 03 and the fourth transistor 104 will be described. First transistor 101 Has a function of selecting the timing of supplying the potential of the first wiring 111, and is an input transformer. Functions as a gista. The second transistor 102 sets the potential of the third wiring 113 to the sixth. Select the timing to supply to the wiring 116 and bootstrap the potential of node 121. It has a function of raising by, and functions as a transistor for boot strap. number 3 Transistor 103 supplies the potential of the second wiring 112 to the node 121. Has a function of selecting, and functions as a switching transistor. 4th transistor The 104 has a function of supplying the potential of the second wiring 112 to the sixth wiring 116, and is a switch. Functions as a transistor.

0104If the operation is the same as in Fig. 1, the arrangement and number of transistors are limited to Fig. 1. Not determined. As can be seen from FIG. 3 which explains the operation of the flip-flop of FIG. In the form, a set period, a selection period, a first non-selection period, a second non-selection period and a third non-selection period. The selection period may be as long as the solid lines shown in FIGS. 3 (A) to 3 (E) are conducting. Therefore, if the configuration is such that transistors and the like can be arranged and operated so as to satisfy this, the transistor Semiconductors, other elements (resistors, capacitive elements, etc.), diodes, switches, various theories A physical circuit or the like may be newly arranged.

0105For example, as shown in FIG. 4, the gate terminal and the second transistor 102 of the second transistor 102 shown in FIG. The capacitance element 401 may be arranged between the terminal and the terminal. By arranging the capacitive element 401 , The boot strap operation during the selected period can be performed more stably. Also, the second Since the parasitic capacitance between the gate terminal and the second terminal of the Langista 102 can be reduced, each tiger The engineer can be switched at high speed. The capacitive element 401 is provided with an insulating layer. Then, the gate electrode layer and the wiring layer may be used as the conductive layer by using the gate insulating film, or insulation may be used. A gate insulating film is used as a layer, a gate electrode layer is used as a conductive layer, and a semiconductor to which impurities are added. A layer may be used, an interlayer film (insulating film) is used as an insulating layer, and a wiring layer and a transparent layer are used as a conductive layer. A bright electrode layer may be used. In addition, what is common to the configuration in Fig. 1 is to use a common code. The explanation is omitted.

0106The same operation as in FIG. 1 can be performed in the flip-flop of FIG. Shown in Figure 5 As described above, the first transistor 101 shown in FIG. 1 may be connected by a diode. The first wiring 111 is not connected due to the diode connection of the first transistor 101. In short, wiring and power supply (V1) can be reduced one by one. In addition, it is the same as the configuration of Fig. 1. A common reference numeral is used for the passage, and the description thereof will be omitted.

0107Subsequently, FIG. 6 shows the shift register having the flip-flop of the present embodiment described above. Will be described with reference to.

0108The shift register has the first wiring 611, the second wiring 612, the third wiring 613, and the fourth wiring. Wire 614, 5th wire 615, 6th wire 616, wires 622_1 to 622_n and n It has (n-stage) flip-flops 601_1 to 601_n. And the 1 + 3N stage ( N: 0 or a positive integer) flip-flop 601 is the first wire 611, the second wire 6 12, connected to the third wire 613 and the fourth wire 614. 2 + 3N stage flirt The pflop 601 has a first wiring 611, a second wiring 612, a fourth wiring 614, and a fifth wiring. It is connected to wiring 615. The 3 + 3N stage flip-flop 601 is the first wiring 61 It is connected to the first, second wiring 612, fifth wiring 615, and third wiring 613. Also For example, the i-th stage flip-flop 601_i (flip-flop 601_1 to 601_) Of any one of n), flip-flop 601_2 ~ flip-flop 601_ n-1 is the flip-flop 601_i-1 of the i-1st stage and the flip-flop of the i + 1th stage. Connected to 601_i + 1, the i-stage flip-flop 601_i and i + 1-stage flip-flop The connection point with the lip flop 601_i + 1 is wiring 622_i (wiring 622_1 to 622) It is connected to any one of _n). The first stage flip-flop 601_1 Is connected to the 6th wire 616 and the 2nd stage flip-flop 601_2, and the 1st stage flip-flop Wiring 622 is the connection point between the flip-flop 601_1 and the second-stage flip-flop 601_2. Connected to _1. The nth-stage flip-flop 601_n pretends to be the n-1th stage. It is connected to the desktop 601_n-1 and the wiring 622_n.

0109In the 1 + 3N stage flip-flop 601, the first wiring 611 and the second wiring 61 The second and third wirings 613 and the fourth wiring 614 are the first wiring 111 and the second wiring in FIG. 1, respectively. It is connected to the wiring 112, the third wiring 113, and the fourth wiring 114. 2 + 3Nth stage In the lip flop 601, the first wiring 611, the second wiring 612, the fourth wiring 114, The fifth wiring 615 is the first wiring 111, the second wiring 112, and the third wiring in FIG. 1, respectively. 113, connected to the 4th wiring 114. 3 + 3N stage flip-flop 601 The first wiring 611, the second wiring 612, the fifth wiring 615, and the third wiring 613 are 1st wiring 111, 2nd wiring 112, 3rd wiring 113, 4th wiring 61, respectively, in FIG. Connected to 4. Also, for example, in the flip-flop 601_i of the i-th stage, the flip-flop Fifth wiring 115 shown in FIG. 1 of flip-flops 601_2 to flip-flops 601_n-1 And the sixth wiring 116 are shown in FIG. 1 of the flip-flop 601_i-1 of the i-1st stage, respectively. 6th wiring 116 shown in FIG. 1, i + 1th stage flip-flop 601_i + 1 shown in FIG. It is connected to the wiring 115 of 5. In addition, in Fig. 1 of the first stage flip-flop 601_1 The fifth wiring 115 and the sixth wiring 116 shown are the sixth wiring 616 and two stages in FIG. 6, respectively. The eye flip-flop 601_2 is connected to the fifth wire 115 shown in FIG. It should be noted that , Nth stage flip-flop 601_n 5th wiring 115 and 6th wiring 1 shown in FIG. 16 is the sixth wiring shown in Fig. 1 of the n-1st stage flip-flop 601_n-1. 116, connected to wiring 622_n in Figure 6.

0110Next, FIG. 92 shows one form of the top view of the shift register shown in FIG. It should be noted that it is shown in FIG. The shift register is a shift register when the flip-flop of FIG. 1 is used, and is n. Flip-flop 601_n in the first stage and flip-flop 601_n + 1 in the n + 1 stage Shown. The flip-flop of the shift register of FIG. 92 has a first transistor 10 1, 2nd transistor 102, 3rd transistor 103 and 4th transistor 10 4 is placed. And each flip-flop of the shift register in FIG. This is the first wiring 611, the second wiring 612, the third wiring 613, the fourth wiring 614 and It is connected to the fifth wire 615. The first transistor 101 and the second transition The star 102, the third transistor 103, and the fourth transistor 104 are of the reverse stagger type. A case of a transistor structure and a channel etch type will be described. However, the first Langista 101, 2nd transistor 102, 3rd transistor 103 and 4th transistor The Langista 104 may be channel protected. Also, the first transistor 101, the second Transistor 102, third transistor 103 and fourth transistor 104 It may be a plug-gate type transistor.

0111Further, the layout diagram of the shift register shown in FIG. 92 shows the first conductive film 9201 and the semiconductor layer. It is composed of 9202, contact 9203 and a second conductive film 9204. It should be noted that , The first conductive film 9201 functions as a gate electrode. Semiconductor layer 9202 contains impurities It is not a genuine amorphous semiconductor film. Contact 9203 is the first conductive film 9201 and the second Functions to electrically connect to the conductive film 9204 of.

0112In the shift register of FIG. 92, the wiring width of the first wiring 611 is set to the wiring width of the third wiring 613. It can be made smaller than the wiring width of the wiring 614 of 4 and the wiring width of the 5th wiring 615. This is because the current flowing through the first wire 611 is the third wire 613, the fourth wire 614, and the first wire. Since it is smaller than the wiring 615 of 5, even if the wiring width of the first wiring 611 is reduced, the shift shift will occur. This is because the influence on the operation of the gista is small. Similarly, the shift register in Figure 92 is the second The wiring width of the wiring 612 is the wiring width of the third wiring 613, the wiring width of the fourth wiring 614, and the fifth. It can be made smaller than the wiring width of the wiring 615. However, it flows to the second wiring 612 Since the current is larger than the current flowing through the first wiring 611, the wiring width of the second wiring 612 is the first. It is desirable that it is larger than the wiring width of wiring 611 of 1. Therefore, the shift register in Figure 92 The star can reduce the pitch of the flip-flop for one stage. In addition, the shift register shown in Fig. 92 The star can efficiently arrange each transistor. The shift register in FIG. 92 is for each register. The channel width of the Langista can be increased.

0113Further, the shift register of FIG. 92 increases the channel width of the second transistor 102. Therefore, the boot strap operation can be performed more easily. Because the second tiger Due to the large channel width of the transistor 102, the gate terminal and the second transistor 102 of the second transistor 102 This is because the parasitic capacitance between the two terminals increases. The shift register in FIG. 92 is the first By increasing the channel width of transistor 102 of 2, it is possible to obtain high drive capability. Wear. Because the channel width of the second transistor 102 is large, the second transition This is because the current supply capacity of the star 102 is increased. As already mentioned, Fig. 92 The shift register of is reduced the wiring width of the first wiring 611 and the second wiring 612, and each is The area where the Langista can be placed can be increased. In that case, the shift register in FIG. 92 is the second Higher drive capability is obtained by preferentially increasing the channel width of transistor 102. be able to. Therefore, the channel width of the second transistor is the first transistor 1 01 channel width, 3rd transistor 103 channel width, 4th transistor 104 It is desirable to make it larger than the channel width of.

0114Further, the shift register in FIG. 92 has a U-shape in the channel shape of the second transistor 102. By doing so, the channel width of the second transistor 102 can be increased.

0115The features of the layout diagram shown in FIG. 92 can be applied to other shift registers. Wear.

0116Next, for the operation of the shift register shown in FIG. 6, refer to the timing chart in FIG. I will explain.

0117The potential of V1 is supplied to the first wiring 611, and the potential of V2 is supplied to the second wiring 612. ing. However, V1&gt; V2.

0118However, the potential of V1 is not always supplied to the first wiring 611, and other potentials are supplied. It may be supplied, or a digital signal or an analog signal may be input. Also , The second wiring 612 is not necessarily supplied with the potential of V2, but other potentials are supplied. It may be input, or a digital signal or an analog signal may be input.

0119The third wiring 613, the fourth wiring 614, the fifth wiring 615, and the sixth wiring 616 The signal is being input. Input to 3rd wire 613, 4th wire 614, 5th wire 615 The signal to be generated is a three-phase clock signal whose phase is shifted by 120 degrees. To the sixth wiring 616 The input signal is the start signal. In addition, the third wiring 613, the fourth wiring 614, the third The signals input to the 5th wiring 615 and the 6th wiring 616 have H signal potentials of V1 and L signals. It is a digital signal with a potential of V2.

0120However, the third wiring 613, the fourth wiring 614, and the fifth wiring 615 have different phases, respectively. It is not always the case that a three-phase clock signal that is offset by 120 degrees is input, but another signal is input. It may be forced or a constant potential or current may be input. Also, the sixth wiring 61 The start signal is not limited to 6 and other signals may be input. A constant potential or current may be input.

0121In addition, to the third wiring 613, the fourth wiring 614, the fifth wiring 615, and the sixth wiring 616. The potential of the H signal of the input signal is not limited to V1 and the potential of the L signal is not limited to V2. If the position is higher than the potential of the L signal, the potential is not particularly limited.

0122A signal is output from the wiring 622. For example, wiring 622_i (i is any positive number The signal output from) is the output signal of the i-th stage flip-flop 601_i, and i + It is also the first-stage flip-flop 601_i + 1 input signal.

0123In FIG. 7, the signal 716 shows the signal input to the sixth wiring 616. Also, Shin No. 722_1, signal 722_i, signal 722_i + 1, signal 722_n are each one stage Signal output from wiring 622 in the third, i-th, i + 1-th, and n-th stages (potential of wiring 622) Is shown.

0124As shown in FIG. 7, for example, when the flip-flop 601_i in the i-th stage reaches the selection period, it is distributed. Output the H signal (722_i) to line 622_i. At this time, i + 1st stage flip flow 601_i + 1 is the set period, and the L signal is output to the wiring 622_i + 1. afterwards , The i-th stage flip-flop 601_i is the first non-selection period, and the L signal is connected to the wiring 622_i. Output the number. At this time, the flip-flop 601_i + 1 in the i + 1 stage is the selection period. Outputs H signal to wiring 622_i + 1. After that, the i-stage flip-flop 601_ i is the second non-selection period, and wiring 622_i is in a floating state while maintaining the L level. At this time, the flip-flop 601_i + 1 in the i + 1 stage becomes the first non-selection period and is wired. Output the L signal to 622_i + 1. After that, the i-th stage flip-flop 601_i is the first In the non-selection period of 3, wiring 622_i remains in a floating state while maintaining the L level. At this time, the flip-flop 601_i + 1 in the i + 1 stage becomes the second non-selection period and is wired. 622_i + 1 floats while maintaining the L level. After that, the i-stage flip Flop 601_i is the first non-selected period, the second non-selected period, and the third until the next set period. The non-selection period of is repeated in order. Similarly, the flip-flop 601_i + 1 in the i + 1 stage is , 3rd non-selection until the next set period (selection period of i-th flip-flop 601_i) The selection period, the first non-selection period, and the second non-selection period are repeated in this order.

0125From the above, the shift register in FIG. 6 can use a three-phase clock signal. Therefore, the number of rises and falls can be reduced, and power saving can be realized. Well Further, the shift register of the present embodiment has each clock signal line (third wiring 613, fourth arrangement). The number of stages of the flip-flop 601 connected to the wire 614 and the fifth wiring 615) is single-phase. Since it is 2/3 of the case where a clock signal is used, the load on each clock signal line should be reduced. Can be done.

0126The shift register in FIG. 6 buffers the output signal of the flip-flop 601 in each stage. Each of them may be output to the wiring 622 of each stage via the above, and such a configuration is shown in FIG. Figure In the shift register of 8, each stage flip-flop 601 passes through the buffer 801. Since it is connected to the wiring 622 of each stage, it is possible to obtain a wide margin during operation. Wear. This is because a large load is connected to the wiring 622, and the signal of the wiring 622 has a delay or waveform. This is because even if a blunt occurs, it does not affect the operation of the shift register. The buffer 80 1 is an inverter, logic circuits such as NAND and NOR, operational amplifiers, etc., and these are assembled. A combined circuit can be used.

0127Subsequently, refer to FIG. 9 for the display device having the shift register of the present embodiment described above. I will explain.

0128The display device includes a signal line drive circuit 901, a scanning line drive circuit 902, and a pixel unit 903, and has an image. The element 903 is a plurality of signal lines S1 extending in the column direction from the signal line drive circuit 901. ~ Sm, multiple scanning lines G1 ~ Gn arranged extending in the row direction from the scanning line drive circuit 902 And a plurality of signals arranged in a matrix corresponding to the signal lines S1 to Sm and the scanning lines G1 to Gn. It has a pixel 904 of. Then, each pixel 904 has a signal line Sj (of the signal lines S1 to Sm). Any one), it is connected to the scanning line Gi (any one of the scanning lines G1 to Gn).

0129The scanning lines G1 to Gn correspond to the wirings 622_1 to 622_n in FIGS. 6 and 8.

0130The wiring and electrodes are aluminum (Al), tantalum (Ta), titanium (Ti), and moly. Butene (Mo), Tungsten (W), Neodymium (Nd), Chromium (Cr), Nickel (Ni), Platinum (Pt), Gold (Au), Silver (Ag), Copper (Cu), Magnesium (Mg) , Scandium (Sc), Cobalt (Co), Zinc (Zn), Niobium (Nb), Sirico Silicon (Si), Phosphorus (P), Boron (B), Arsenic (As), Gallium (Ga), Indium One or more elements or groups selected from (In), tin (Sn), and oxygen (O) Compounds and alloying materials (eg, indium tin) containing one or more elements selected from Indium tin with oxides (ITO), indium zinc oxide (IZO), and silicon oxide Oxide (ITSO), zinc oxide (ZnO), aluminum neodymium (Al-Nd), magnesi It has um silver (Mg-Ag), etc.) or a substance that combines these compounds. Is formed. Alternatively, they and a compound of silicon (0045) (eg, aluminum) Recon, molybdenum silicon, nickel silicide, etc. and compounds of them and nitrogen (eg For example, it is formed with titanium nitride, tantalum nitride, molybdenum nitride, etc.). In addition, Siri Silicon (Si) contains a large amount of n-type impurities (phosphorus, etc.) and p-type impurities (boron, etc.). You may. By containing these impurities, the conductivity is improved, and it is similar to a normal conductor. Since it behaves, it is easy to use as wiring and electrodes. Silicon is a single crystal It may be polycrystalline (polysilicon) or amorphous (amorphous silicon). I. Resistance can be reduced by using single crystal silicon or polycrystalline silicon. To. Further, by using amorphous silicon, it can be produced by a simple manufacturing process. Na Oh, aluminum and silver have high conductivity, so signal delay can be reduced, and d. Since it is easy to hatch, it is easy to pattern and fine processing can be performed. In addition, copper Because of its high conductivity, signal delay can be reduced. Molybdenum is ITO Even if it comes into contact with oxide semiconductors such as IZO and silicon, problems such as material defects occur. Because it can be manufactured without any problems, it is easy to pattern and etch, and it has high heat resistance. ,desirable. Titanium comes into contact with oxide semiconductors such as ITO and IZO, and silicon. However, it is desirable because it can be manufactured without problems such as defective materials and has high heat resistance. I. Tungsten is desirable because it has high heat resistance. Neodymium is heat resistant Is desirable because it is expensive. In particular, when using an alloy of neodymium and aluminum, heat resistance is suitable. It is desirable because aluminum is less likely to cause hillock. In addition, silicon is It is desirable because it can be formed at the same time as the semiconductor layer of the transistor and has high heat resistance. Na Oh, add indium tin oxide (ITO), indium zinc oxide (IZO), silicon oxide Indium tin oxide (ITSO), zinc oxide (ZnO), silicon (Si) are translucent It is desirable because it has the property and can be used for a part that transmits light. For example, it can be used as a pixel electrode or a common electrode.

0131It should be noted that these may form wirings and electrodes in a single layer, or may have a multi-layer structure. .. By forming with a single layer structure, the manufacturing process can be simplified and the process time is reduced. It can be done and the cost can be reduced. In addition, by making it a multi-layer structure, each material Utilizing the advantages of materials, the disadvantages of one material can be reduced by using other materials. , It is possible to form wiring and electrodes with good performance. For example, a material with low resistance (Alumini) By including um, etc. in the multi-layer structure, it is possible to reduce the resistance of the wiring. Wear. Also, if a material with high heat resistance is included, for example, the heat resistance is weak, but another meli. By forming a laminated structure in which the material with the wire is sandwiched between materials with high heat resistance, wiring and The heat resistance of the electrode as a whole can be increased. For example, a layer containing aluminum It is desirable to have a laminated structure that is sandwiched between layers containing ribden and titanium. Also, another If there are parts that come into direct contact with the wiring or electrodes of the material, they will adversely affect each other. There is. For example, one material can get inside the other and change its properties. It cannot achieve its original purpose, or it cannot be manufactured normally due to problems when manufacturing. It may become. In such cases, one layer may be sandwiched or covered by another. By, the problem can be solved. For example, indium tin oxide (ITO) and a If you want to bring luminium into contact, it is desirable to put titanium or molybdenum between them. Well Also, if you want to bring silicon and aluminum into contact, insert titanium or molybdenum between them. Is desirable.

0132The wiring and electrodes described above should also be applied to other display devices and shift registers. Can be done.

0133In the signal line drive circuit 901, the potential or electric potential corresponding to the video signal is connected to the signal lines S1 to Sm. Enter the flow. Further, the signal line drive circuit 901 is formed on the same substrate as the pixel unit 903. It is not necessary, it may be formed on a single crystal substrate such as an IC, and a part of it may be formed with the pixel portion 903. It may be formed on the same substrate, and the remaining portion may be formed on a single crystal substrate such as an IC.

0134The scanning line drive circuit 902 inputs a signal to the scanning lines G1 to Gn and sets the scanning lines G1 to Gn. Select in order from the first line (hereinafter, also referred to as scanning). And connect to the selected scan line A plurality of pixels 904 that are used are also selected at the same time. In addition, one scanning line is selected. The period is called the 1-gate selection period, and the period when one scan line is not selected is called the non-selection period. Bu. Further, the scanning line drive circuit 902 shall apply the shift register shown in FIG. 6 or FIG. Can be done. Further, the scanning line drive circuit 902 is formed on the same substrate as the pixel portion 903. It is characterized by that.

0135When the pixel 904 is selected, the pixel 904 is transmitted from the signal line drive circuit 901 via the signal line. The potential or current corresponding to the video signal is input. However, if it is not selected No potential or current corresponding to the video signal is input.

0136Next, the operation of the display device shown in FIG. 9 is explained with reference to the timing chart of FIG. I will reveal. In addition, in FIG. 10, one frame period corresponding to the period for displaying an image for one screen Show the interval. The one-frame period is not particularly limited, but people who see the image flicker (pretend). It is preferable to set it to 1/60 second or less so as not to feel the ker).

0137In the timing chart of FIG. 10, the scanning lines G1 on the first line and the scanning lines Gi and i on the i-th line are shown. Indicates the timing at which the scanning line Gi + 1 on the +1st line and the scanning line Gn on the nth line are selected, respectively. doing.

0138In FIG. 10, for example, the scan line Gi on the i-th line is selected and is connected to the scan line Gi. The number of pixels 904 is selected. Then, to the plurality of pixels 904 connected to the scanning line Gi A video signal is written to each, and the brightness or transmittance of each display element is video. The value corresponds to the signal. After that, when the scan line Gi on the i-th line is deselected, the run on the i + 1 line The inspection line Gi + 1 is selected, and the plurality of pixels 904 connected to the scanning line Gi + 1 are selected. To. Then, a video signal is sent to each of the plurality of pixels 904 connected to the scanning line Gi + 1. Is written, and the brightness or transmittance of each display element becomes a value according to the video signal. .. Since each pixel 904 retains the written video signal even in the non-selected state, Each display element maintains brightness or transmittance according to the video signal.

0139From the above, each of the scanning lines G1 to Gn has one gate selection period in one frame period. It is selected with, and it is not selected because it is a non-selection period other than the 1 gate selection period. 1 gate selection period Since the length of the interval is approximately equal to the length of the 1-frame period divided by n, the 1-frame period Most of the period is a non-selection period. That is, the scanning line drive circuit 902 is shown in FIG. 6 or When the shift register shown in FIG. 8 is applied, the flip-flop shown in FIG. 6 or FIG. 8 is applied. 601_1 to 601_i Each is the first non-selection for most of the one-frame period The period, the second non-selection period, and the third non-selection period are repeated in order. Therefore, scanning The line drive circuit 902 includes flip-flops 601_1 to 601_i shown in FIGS. 6 and 8. Since the deterioration of each transistor can be suppressed, the life can be extended. Wear. Further, the display of FIG. 9 in which the long-life scanning line drive circuit 902 is integrally formed with the pixel unit 903. The device can also extend its life.

0140If a pixel can be selected and a video signal can be written to the pixel as shown in FIG. 9, it will be driven. The number and arrangement of circuits are not limited to FIG.

0141For example, as shown in FIG. 11, the scanning lines G1 to Gn are referred to as the first scanning line driving circuit 1101. And may be scanned by the second scanning line drive circuit 1102. The first scanning line drive times The road 1101 and the second scan line drive circuit 1102 are the same as the scan line drive circuit 902 shown in FIG. It has the same configuration and scans the scanning lines G1 to Gn at the same timing. Scan line G1 ~ Scan line Gn by the first scan line drive circuit 1101 and the second scan line drive circuit 1102 By scanning, the delay or bluntness of the signal output to each of the scanning lines G1 to Gn Is reduced, and scanning lines G1 to Gn are scanned at high speed. That is, the display device in FIG. 11 , The panel size becomes large, and the wiring resistance and parasitic capacitance of scanning lines G1 to Gn become large. However, the delay and bluntness of the signals output to each of the scanning lines G1 to Gn are reduced. Therefore, it is possible to increase the size. Further, the display device of FIG. 11 has a large panel size. Scan line G1 ~ scan as the number of pixels increases due to the sharpness or the panel becoming high definition. Even if it is necessary to scan the line Gn at high speed, the scanning line G1 to the scanning line Gn should be scanned at high speed. Therefore, it is possible to increase the size and the definition. Further, the display device of FIG. Is defective in one of the first scan line drive circuit 1101 and the second scan line drive circuit 1102. Is generated, the other scanning line G1 to scanning line Gn can be scanned, so that redundancy can be provided. it can. It should be noted that the common reference numerals are used for the parts common to the configuration of FIG. 9, and the description thereof will be omitted. As in the case of FIG. 9, the timing chart of FIG. 10 may be used for the display device of FIG. it can.

0142Also in the display device shown in FIG. 12, pixels are selected as shown in FIG. 9 and a video signal is written in the pixels. You can squeeze in. As shown in FIG. 12, the first scan line drive circuit 1201 and the second run The scanning line G1 to the scanning line Gn may be scanned line by line by the inspection line drive circuit 1202. Na The first scan line drive circuit 1201 and the second scan line drive circuit 1202 are shown in FIG. It has the same configuration as the scanning line drive circuit 902, but the drive timing is different. First scan line drive Circuit 1201 scans the scan lines on the odd-numbered lines, and the second scan line drive circuit 1202 scans the scan lines on the even-numbered lines. By scanning the scan lines, the first scan line drive circuit 1201 and the second scan line drive times The drive frequency of the road 1202 can be reduced, and the first scan line drive circuit 1201 and the second scan line can be reduced. The pitch of one step of the flip-flop of the drive circuit 1202 is widened. That is, Figure 12 The display device of is the drive of the first scan line drive circuit 1201 and the second scan line drive circuit 1202. Since the frequency can be reduced, power saving can be realized. Further, the display device of FIG. 12 is the first Flip-flops of the scan line drive circuit 1201 and the second scan line drive circuit 1202 Because the pitch of one step is widened, it can be laid out efficiently and the frame can be made smaller. To. Further, the display device of FIG. 12 has a first scan line drive circuit 1201 and a second scan line drive. Since the circuit 1202 is arranged on the left and right, the frame can be made uniform on the left and right. The structure of Fig. 9 The common reference points are used and the description thereof will be omitted. The display device shown in FIG. The timing chart of FIG. 10 can be used as in FIG.

0143Further, also in the display device shown in FIG. 44, pixels are selected as shown in FIG. You can write the number. As shown in FIG. 44, the first scan line drive circuit 4402 and the first Scan line G1 to scan line Gn may be scanned line by line by the scan line drive circuit 4403 of 2. I. Further, the pixel 904 is connected to the left and right signal lines line by line. For example, the j-th column The number pixel 904 is one of the signal line Sj (signal line S1 to signal line Sm + 1) in the i-th line. Connected to 1), connected to the signal line Sj + 1 on the i + 1 line, and signal line Sj on the i-1 line Connected to +1.

0144The operation of the display device shown in FIG. 44 will be described with reference to the timing chart of FIG. 45. To. In addition, in FIG. 45, one frame period corresponding to the period for displaying an image for one screen is set. Shown. The one-frame period is not particularly limited, but the viewer of the image flickers (flicker). It is preferable to set it to 1/60 second or less so as not to feel (-).

0145In the timing chart of FIG. 45, the scanning line G1 on the first line and the scanning line Gi on the i-1 line. -1, scan line Gi on line i, scan line Gi + 1 on line i + 1, and scan line Gn on line n It shows the timing of each selection. In the timing chart of Figure 45, one choice The period is divided into a selection period Ta and a selection period Tb.

0146In addition, the display device of FIG. 44 has a positive electrode video signal for each signal line in one frame period. Dot inversion drive can be performed simply by inputting the number and the video signal of the negative electrode. Also, The display device of FIG. 44 inverts the polarity of the video signal input to each signal line every frame period. By doing so, the frame inversion drive can be performed. In addition, in the timing chart of Fig. 45 Describes the case where the display device performs dot inversion drive and frame inversion drive.

0147In FIG. 45, for example, the selection period Ta of the scanning line Gi on the i-th line is the scanning line Gi on the i-1th line. It overlaps with the selection period of -1, and the selection period Tb of the scan line Gi on the i-th line is the run on the i + 1 line. It overlaps with the selection period of inspection line Gi + 1. Therefore, in the selection period Ta, line i-1 -The same video signal input to pixel 904 in the j + 1 column is the pixel 9 in the i-row and j-th column. Entered in 04. Also, in the selection period Tb, it is input to pixel 904 in the i-th row and j-th column. A video signal similar to the video signal is input to pixel 904 in the i + 1 row and j-1 column. In addition, selection The video signal input to pixel 904 during the selection period Tb is the original video signal and is selected. The video signal input to the pixel 904 in the period Ta is the pixel 904 for precharging. It is a deo signal. Therefore, each of the pixels 904 is input in the selection period Ta. Precharged by the video signal and retains the input video signal during the selection period Tb To have.

0148From the above, the display device of FIG. 44 can write a video signal to the pixel 904 at high speed. Therefore, it is possible to easily realize large size and high definition. Furthermore, the display device of FIG. 44 Since each signal line receives a video signal of the same polarity in one frame period, each signal line is input. There is little charge and discharge of the signal line, and low power consumption can be realized. The display device shown in FIG. 44 is a bidet. Since the load on the IC for supplying the signal is greatly reduced, the heat generation and power consumption of the IC, etc. Can be reduced. Further, the display device of FIG. 44 is a first scanning line drive circuit 4402. And the drive frequency of the second scanning line drive circuit 4403 can be halved.

0149The display devices of FIGS. 9, 11, 12, and 44 are different depending on the configuration of the pixel 904. Wiring etc. may be added. For example, a power supply line kept at a constant potential, a new scanning line, and so on. And capacitance lines may be added. When adding a new scanning line, Fig. 6 and Fig. 8 A scanning line drive circuit to which the shift register shown in the above is applied may be newly added.

0150The shift register and flip-flop shown in the present embodiment are referred to as other elements in the present specification. It can be implemented in any combination with the configuration of the display device shown in the form of application. Also a book The shift register and flip-flop configurations shown in the embodiment can be freely combined. can do.

0151(Embodiment 2) In the present embodiment, FIG. 13 shows a flip-flop having a configuration different from that of the first embodiment. Na Oh, the same parts as in the first embodiment are shown by using a common reference numeral, and the same parts or the same parts are used. A detailed description of the functional portion will be omitted.

0152The flip-flop shown in FIG. 13 includes a first transistor 101 and a second transistor 10. 2, 3rd transistor 103, 4th transistor 104 and 5th transistor 13 Has 05. The flip-flops are the first wiring 111, the second wiring 112, and the third wiring. Wiring 113, 4th Wiring 114, 5th Wiring 115, 6th Wiring 116 and 7th Wiring It is connected to 1317. In the present embodiment, the fifth transistor 1305 is an N transistor. It is a channel type transistor, and the voltage (Vgs) between its gate and source is the threshold voltage (V). When it exceeds th), it shall be in a conductive state. In addition, the 7th wiring 1317, the 3rd It may be called the signal line of.

0153The first terminal (one of the source terminal and the drain terminal) of the first transistor 101 is the first arrangement. Connected to wire 111, the second terminal (the other of the source and drain terminals) is the second transition. It is connected to the gate terminal of the star 102, and the gate terminal is connected to the fifth wiring 115. The first terminal of the third transistor 103 is connected to the gate terminal of the second transistor 102. The second terminal is connected to the second wire 112, and the gate terminal is connected to the fourth wire 114. ing. The first terminal of the second transistor 102 is connected to the third wiring 113, and the second terminal Is connected to the sixth wire 116. The first terminal of the fourth transistor 104 is the sixth arrangement Connected to wire 116, the second terminal is connected to the second wire 112, the gate terminal is the wire 114 It is connected to the. The first terminal of the fifth transistor 1305 is connected to the sixth wire 116. The second terminal is connected to the second wire 112, and the gate terminal is connected to the seventh wire 1317. It has been.

0154The second terminal of the third transistor 103, the second terminal of the fourth transistor 104, and The second terminal of the fifth transistor 1305 is not limited to being connected to the second wire 112. Instead, they may be connected to separate wires. Also, the gate of the third transistor 103 When the terminal and the gate terminal of the fourth transistor 104 are connected to the fourth wiring 114 Is not limited and may be connected to separate wires.

0155Next, regarding the operation of the flip-flop shown in FIG. 13, the timing chart of FIG. 14 is shown. It will be explained with reference to it. Note that FIG. 14 shows the flip-flop of FIG. 13 as shown in FIG. It is a timing chart when operating like a flop. The timing in Fig. 2 The parts common to the chart will be omitted by using common codes.

0156A signal is input to the seventh wiring 1317. Input to the 7th wire 1317 The signal is a third clock signal. The signal input to the 7th wiring 1317 is H. The potential of the signal is V1 (hereinafter, also referred to as H level), and the potential of the L signal is V2 (hereinafter, L level). It is also a digital signal.

0157However, it is not always the case that the third clock signal is input to the seventh wiring 1317. Other signals may be input, or a constant potential or current may be input.

0158In FIG. 14, signal 1417 is a signal input to the seventh wiring 1317.

0159In the flip-flop of FIG. 13, in the set period and the second non-selection period, the fifth tiger The engineer 1305 is turned on. And the sixth wiring 116 is the fifth transistor 13 Since the potential of the second wiring 112 is supplied through 05, the L level is maintained.

0160From the above, the flip-flop of FIG. 13 has a first non-selection period and a second non-selection period. Of the third non-selection period, in the first non-selection period and the second non-selection period, the sixth wiring Since V2 is supplied to 116, the malfunction of the flip-flop can be further suppressed. .. Because, in the non-selection period, every fixed period (first non-selection period and second non-selection period) ), V2 is supplied to the 6th wiring 116, and the potential of the 6th wiring 116 is stabilized to V2. Because it can be maintained at.

0161Further, the fifth transistor 1305 of the flip-flop of FIG. 13 has a set period and a third. Since it is turned on only during the non-selection period of 2, it suppresses the deterioration of the characteristics of the 5th transistor 1305. Can be

0162The flip-flops in FIG. 13 are the first transistor 101 and the second transistor 1. 02, 3rd transistor 103, 4th transistor 104 and 5th transistor 1 The feature is that all 305s are composed of N-channel transistors. Therefore , The flip-flop of FIG. 13 is amorphous silicon as the semiconductor layer of the transistor. Because it is possible to use, the manufacturing process can be simplified, the manufacturing cost can be reduced, and the steps can be taken. It is possible to improve the stay. Furthermore, we will manufacture semiconductor devices such as large display panels. It is also possible. Also, as a semiconductor layer of a transistor, polysilicon or a single crystal series The manufacturing process can be simplified by using a computer.

0163Further, the flip-flop of FIG. 13 has a characteristic deterioration (threshold value) as a semiconductor layer of a transistor. Transistor characteristics are inferior even when using Amofus silicon, which causes a marked voltage shift). Since it is possible to suppress the formation of semiconductor devices, it is possible to manufacture semiconductor devices such as display panels with a long life. it can.

0164Here, the function of the fifth transistor 1305 will be described. Fifth transistor 13 05 is a machine that selects the timing to supply the potential of the second wiring 112 to the sixth wiring 116. It has the function and functions as a switching transistor.

0165If the same operation as in FIG. 13 is performed, the arrangement and number of transistors are shown in FIG. Not limited to. Therefore, transistors, other elements (resistors, capacitive elements, etc.), da Iodes, switches, various logic circuits, etc. may be newly arranged.

0166For example, as shown in FIG. 15, with the gate terminal of the second transistor 102 shown in FIG. The capacitance element 1501 may be arranged between the second terminal and the second terminal. Placing the capacitive element 1501 Therefore, the boot strap operation during the selected period can be performed more stably. Also, Because the parasitic capacitance between the gate terminal and the second terminal of the second transistor 102 can be reduced. , Each transistor can be switched at high speed. The capacitive element 1501 , A gate insulating film may be used as the insulating layer, and a gate electrode layer and a wiring layer may be used as the conductive layer. A gate insulating film is used as the insulating layer, and a gate electrode layer and impurities are added as the conductive layer. A semiconductor layer may be used, or an interlayer film (insulating film) is used as an insulating layer and arranged as a conductive layer. A linear layer and a transparent electrode layer may be used. Note that the common reference numerals are common to the configuration shown in FIG. The description thereof will be omitted with reference to.

0167In the flip-flop of FIG. 16, the same operation as in FIG. 13 can be performed. Figure 16 As shown in FIG. 13, the first transistor 101 shown in FIG. 13 may be diode-connected. The first wiring 111 is not connected due to the diode connection of the first transistor 101. Necessary, wiring and power supply (V1) can be reduced one by one. The configuration shown in FIG. The common reference numerals are used for the points in common with the above, and the description thereof will be omitted.

0168Subsequently, FIG. 1 shows the shift register having the flip-flop of the present embodiment described above. This will be explained with reference to 7. The shift register having the flip-flop shown in FIG. 1 is used. The parts common to FIG. 6 described will be omitted by using common reference numerals.

0169The shift register has the first wiring 611, the second wiring 612, the third wiring 613, and the fourth wiring. Wire 614, 5th wire 615, 6th wire 616, wires 622_1 to 622_n and n It has (n-stage) flip-flops 1701_1 to 1701_n. And n (n steps) ) Flip-flops 1701_1 to 1701_n, respectively, the first wiring 611 and the second Wiring 612, 3rd Wiring 613, 4th Wiring 614, 5th Wiring 615 To. Also, for example, the i-th stage flip-flop 1701_i (flip-flop 1701_) Flip flip 1701_2 ~ flip out of any one of 1 ~ 1701_n) The flop_n-1 is the flip-flop 1701_i-1 of the i-1st stage and the i + 1th stage. Connected to flip-flop 1701_i + 1, i-th stage flip-flop 1701_i Wiring 622_i (wiring) is the connection point between and i + 1th stage flip-flop 1701_i + 1. It is connected to any one of 622_1 to 622_n). The first flip Flop 1701_1 connects to 6th wire 616 and 2nd stage flip-flop 1701_2 Next, the first-stage flip-flop 1701_1 and the second-stage flip-flop 1701_ The connection point with 2 is connected to wiring 622_1. The nth stage flip-flop 1 701_n is connected to the n-1st stage flip-flop 1701_n-1 and wiring 622_n. It has been.

0170In the 1 + 3N stage flip-flop 1701, the first wiring 611 and the second wiring 6 12, the third wiring 613, the fourth wiring 614, and the fifth wiring 615 are the first in FIG. 13, respectively. 1 wiring 111, 2nd wiring 112, 3rd wiring 113, 4th wiring 114, 7th wiring It is connected to 1317. In the 2 + 3N stage flip-flop 1701, the first wiring 611, 2nd wiring 612, 4th wiring 614, 5th wiring 615, 3rd wiring 613 , 1st wiring 111, 2nd wiring 112, 3rd wiring 113, 4th wiring, respectively, in FIG. It is connected to wire 114 and the seventh wire 1317. 3 + 3N stage flip-flop 60 In 1, the first wiring 611, the second wiring 612, the fifth wiring 615, the third wiring 613, The fourth wiring 614 is the first wiring 111, the second wiring 112, and the third wiring in FIG. 13, respectively. It is connected to wire 113, the fourth wire 614, and the seventh wire 1317. Also, for example, i-stage Of the flip-flops 1701_i of the eyes, flip-flops 1701_2 ~ flip-flops The fifth wire 115 and the sixth wire 116 shown in FIG. 13 of the rop 1701_n-1 are the same. The sixth wiring 116 shown in Fig. 13 of the flip-flop 1701_i-1 in the first stage of i-1 respectively, Connect to the fifth wire 115 shown in Fig. 13 of the flip-flop 1701_i + 1 in the first stage of i + 1. Has been done. The fifth wiring 1 shown in FIG. 13 of the first-stage flip-flop 1701_1. The 15th and 6th wirings 116 are the 6th wiring 616 and the 2nd stage flipf of FIG. 17, respectively. It is connected to the fifth wire 115 shown in FIG. 13 of rop 1701_2. The nth stage The fifth wire 115 and the sixth wire 116 shown in FIG. 13 of the flip-flop 1701_n are , The sixth wiring 1 shown in FIG. 13 of the flip-flop 1701_n-1 of the n-1st stage, respectively. 16 , It is connected to the wiring 622_n in Fig. 17.

0171The shift register shown in FIG. 17 operates in the same manner as the shift register shown in FIG. I can. Therefore, the shift register shown in FIG. 17 has the timing register shown in FIG. You can use a jar.

0172Therefore, the shift register in FIG. 17 uses a three-phase clock signal as in the first embodiment. Therefore, power saving can be realized. Further, the shift register of this embodiment is used for each unit. Connected to the lock signal line (3rd wire 613, 4th wire 614, 5th wire 615) The number of stages of the flip-flop 1701 is 2/3 of that when a single-phase clock signal is used. Therefore, the load on each clock signal line can be reduced.

0173The shift register in FIG. 17 buffs the output signal of the flip-flop 1701 of each stage. Each of them may be output to the wiring 622 of each stage, and such a configuration is shown in FIG. I will. In the shift register of FIG. 18, the flip-flop 1701 of each stage uses the buffer 1801. Since each is connected to the wiring 622 of each stage via, a wide margin in operation is obtained. Can be Because a large load is connected to the wiring 622 and the signal of the wiring 622 is slow. This is because even if the spread or the waveform is blunted, it does not affect the operation of the shift register. In addition, Iffa 1801 is an inverter, logic circuits such as NAND and NOR, operational amplifiers, etc. , A circuit combining these can be used.

0174Further, the shift register shown in the present embodiment is displayed in FIGS. 9, 11, 12, and 44. It can be applied to the device. Similar to the first embodiment, the scanning line drive circuit integrally formed with the pixel portion. By applying the present embodiment to the above, the life of the display device can be extended.

0175The shift register and flip-flop shown in the present embodiment are referred to as other elements in the present specification. It can be implemented in any combination with the configuration of the display device shown in the form of application. Also a book The shift register and flip-flop configurations shown in the embodiment can be freely combined. can do.

0176(Embodiment 3) In the present embodiment, a flip-flop having a configuration different from that of the first and second embodiments is used. It is shown in FIG. It should be noted that the same reference numerals as those in the first and second embodiments are used. The detailed description of the same part or the part having the same function will be omitted.

0177The flip-flop shown in FIG. 19 includes a first transistor 101 and a second transistor 10. 2, 3rd transistor 103, 4th transistor 104, 5th transistor 130 5, 6th transistor 1906, 7th transistor 1907, 8th transistor 1 It has a 908 and a ninth transistor 1909. The flip-flop is the first Wiring 111, 2nd Wiring 112, 3rd Wiring 113, 4th Wiring 114, 5th Wiring 1 15, connected to the 6th wire 116 and the 7th wire 1317. Smell of this embodiment 6th transistor 1906, 7th transistor 1907, 8th transistor 1 The 908 and the 9th transistor 1909 are N-channel transistors, and their gates When the voltage between the sources (Vgs) exceeds the threshold voltage (Vth), it becomes conductive. To be.

0178The first terminal (one of the source terminal and the drain terminal) of the first transistor 101 is the first arrangement. Connected to wire 111, the second terminal (the other of the source and drain terminals) is the second transition. It is connected to the gate terminal of the star 102, and the gate terminal is connected to the fifth wiring 115. The first terminal of the third transistor 103 is connected to the gate terminal of the second transistor 102. The second terminal is connected to the second wire 112, and the gate terminal is connected to the fourth wire 114. ing. The first terminal of the second transistor 102 is connected to the third wiring 113, and the second terminal Is connected to the sixth wire 116. The first terminal of the fourth transistor 104 is the sixth arrangement Connected to wire 116, the second terminal is connected to the second wire 112, the gate terminal is the wire 114 It is connected to the. The first terminal of the fifth transistor 1305 is connected to the sixth wire 116. The second terminal is connected to the second wire 112, and the gate terminal is connected to the seventh wire 1317. It has been. The first terminal of the 6th transistor 1906 is the game of the 8th transistor 1908. The second terminal is connected to the second wiring 112, and the gate terminal is connected to the second transformer. It is connected to the gate terminal of Gista 102. The first terminal of the seventh transistor 1907 is It is connected to the first wire 111, and the second terminal is in contact with the gate terminal of the eighth transistor 1908. Subsequently, the gate terminal is connected to the first wire 111. 8th transistor 1908 The first terminal of is connected to the third wiring 113, and the second terminal is the device of the ninth transistor 1909. It is connected to the terminal. The first terminal of the ninth transistor 1909 is the sixth wire 116 The second terminal is connected to the second wire 112. The sixth transistor 1906 Terminal 1, 7th Transistor 1907 Terminal 2 and 8th Transistor 1 The connection point of the gate terminal of 908 is node 1922. Also, the eighth transistor 19 Node 192 at the connection point of the 2nd terminal of 08 and the gate terminal of the 9th transistor 1909 Let it be 3.

0179The second terminal of the third transistor 103, the second terminal of the fourth transistor 104, and the second terminal 5th transistor 1305 2nd terminal, 6th transistor 1906 2nd terminal and 9th The second terminal of the transistor 1909 is not necessarily connected to the second wire 112. , May be connected to separate wires. In addition, the gate terminal of the third transistor 103 and And the gate terminal of the 4th transistor 104 is not necessarily connected to the 4th wiring. , May be connected to separate wires. In addition, the first terminal and the first terminal of the first transistor 101 The 1st terminal of the 7th transistor 1907 and the gate terminal of the 7th transistor 1907 are the 1st. It is not limited to being connected to the wiring 111 of 1, and may be connected to different wirings. Also, the first terminal of the second transistor 102 and the first terminal of the eighth transistor 1908. Is not necessarily connected to the third wire 113, but may be connected to a separate wire. I.

0180Next, regarding the operation of the flip-flop shown in FIG. 19, the timing chart of FIG. 20 is shown. It will be explained with reference to it. Note that FIG. 20 shows the flip-flop of FIG. 19 in FIGS. 1 and 13. It is a timing chart when operating in the same manner as a flip-flop. In addition, Fig. 2 and In addition, the parts common to the timing chart of FIG. 14 are referred to with common reference numerals and the description thereof will be omitted.

0181In FIG. 20, the potential 2022 is the potential of node 1922 in FIG. 19, and the potential 2023 is This is the potential of node 1923 in FIG.

0182In the flip-flop of FIG. 19, in the third non-selection period, the ninth transistor 190 9 turns on. Then, the sixth wiring 116 is passed through the ninth transistor 1909. Since the potential of the wiring 112 of 2 is supplied, the L level is maintained.

0183Specifically, the on / off control of the ninth transistor 1909 will be described. First, the sixth The Langista 1906 and the 7th transistor 1907 make up the inverter, and the 6th transistor When the H level is input to the gate terminal of transistor 1906, the potential of node 1922 (Electric potential 2022) is approximately V2. However, the potential 2022 at this time is at this time. Determined by the resistivity ratio between the 6th transistor 1906 and the 7th transistor 1907 Therefore, it is a little higher than V2. Also, the gate terminal of the 6th transistor 1906 When the L level is input to, the potential of node 1922 becomes the 7th from the potential of the 1st wiring 111. V1-V because it is the value obtained by subtracting the threshold voltage (Vth1907) of transistor 1907. It becomes th1907. Therefore, the first non-selection period, the second non-selection period and the third non-selection period In the selection period, node 121 is at L level and node 1922 is at H level, so the 8th Transistor 1908 is turned on. Therefore, the 9th transistor 1909 is the 3rd transistor. Since it is controlled by the signal input to the wiring 113, it is turned on during the third non-selection period. It becomes off in the first non-selection period and the second non-selection period. On the other hand, the set period During the interval and selection period, node 121 is at H level and node 1922 is at L level. Therefore, the 8th transistor 1908 is turned off. Therefore, of the 9th transistor 1909 The potential of the first non-selection period in which the potential of the gate terminal is the period before the set period, that is, the L level The ninth transistor 1909 is turned off to maintain the power.

0184From the above, the flip-flop of FIG. 19 covers the first non-selection period and the second non-selection period. And in the third non-selection period, V2 is supplied to the wiring 116, so that the flip-flop Malfunction can be further suppressed. Because, in the non-selection period, the sixth wiring 11 This is because V2 can be supplied to 6. The flip-flop in Fig. 19 is not selected. Since V2 is supplied to the 6th wire 116 during the selection period, the noise of the 6th wire 116 is reduced. Can be reduced.

0185Further, the flip-flop of FIG. 19 shows the sixth transistor 1906 and the seventh transistor. Deterioration of characteristics of 1907, 8th transistor 1908 and 9th transistor 1909 It can be suppressed. Because the 6th transistor 1906 has a set period and a selection period This is because it turns on only in between. Also, the 7th transistor 1907 is the 1st after the selection period. During the non-selection period of 1 when the potential of node 1922 rises to V1-Vth1907 This is because it turns on only. In addition, the eighth transistor 1908 is the first non-selection period, the first Of the 2 non-selection period and the 3rd non-selection period, the potential of node 1923 is V1-β (β: Vt). This is because it is turned on only during the period when it rises to h1907 + Vth1908). Also, the first This is because the transistor 1909 of 9 is turned on only in the third non-selection period.

0186The flip-flops in FIG. 19 are the first transistor 101 and the second transistor 1. 02, 3rd transistor 103, 4th transistor 104, 5th transistor 13 05, 6th transistor 1906, 7th transistor 1907, 8th transistor 1908 and 9th transistor 1909 are all composed of N-channel transistors It is characterized by being. Therefore, the flip-flop in FIG. 19 is a semi-conducting transistor. Amorphous silicon can be used as the body layer, which simplifies the manufacturing process. This makes it possible to reduce manufacturing costs and improve yields. In addition, a large table It is also possible to manufacture semiconductor devices such as display panels. Also, the semiconductor layer of the transistor As a result, the manufacturing process can be simplified by using polysilicon or single crystal silicon. ..

0187Further, the flip-flop of FIG. 19 has a characteristic deterioration (threshold value) as a semiconductor layer of a transistor. Transistor characteristics are inferior even when using Amofus silicon, which causes a marked voltage shift). Since it is possible to suppress the formation of semiconductor devices, it is possible to manufacture semiconductor devices such as display panels with a long life. it can.

0188Here, the 6th transistor 1906, the 7th transistor 1907, the 8th transistor The functions of the data 1908 and the ninth transistor 1909 will be described. 6th Transis The 1906 selects the timing to supply the potential of the second wire 112 to the node 1922. It has a function to function as a switching transistor. 7th transistor 1907 Has a function to select the timing to supply the potential of the first wiring 111 to the node 1922. And functions as a diode. The eighth transistor 1908 is the electric power of the third wiring 113. It has a function to select the timing to supply the position to the node 1923, and has a switching transition. Functions as a star. The ninth transistor 1909 sets the potential of the second wiring 112 to the sixth. It has a function to select the timing to supply to the wiring 116, and is used as a switching transistor. Works.

0189If the same operation as in FIG. 19 is performed, the arrangement and number of transistors are shown in FIG. Not limited to. Therefore, transistors, other elements (resistors, capacitive elements, etc.), da Iodes, switches, various logic circuits, etc. may be newly arranged.

0190For example, as shown in FIG. 21, with the gate terminal of the second transistor 102 shown in FIG. The capacitive element 2101 may be arranged between the second terminal and the second terminal. Placing the capacitive element 2101 Therefore, the boot strap operation during the selected period can be performed more stably. Also, Because the parasitic capacitance between the gate terminal and the second terminal of the second transistor 102 can be reduced. , Each transistor can be switched at high speed. The capacitive element 2101 is , A gate insulating film may be used as the insulating layer, and a gate electrode layer and a wiring layer may be used as the conductive layer. A gate insulating film is used as the insulating layer, and a gate electrode layer and impurities are added as the conductive layer. A semiconductor layer may be used, or an interlayer film (insulating film) is used as an insulating layer and arranged as a conductive layer. A linear layer and a transparent electrode layer may be used. Note that the common reference numerals are common to the configuration shown in FIG. The description thereof will be omitted with reference to.

0191In the flip-flop of FIG. 22, the same operation as in FIG. 19 can be performed. Figure 22 As shown in FIG. 19, the first transistor 101 shown in FIG. 19 may be diode-connected. By connecting the first transistor 101 with a diode, it flows to the first wiring 111. Since the current generated is small, the wiring width of the first wiring 111 can be reduced. It should be noted that , The common reference points with the configuration of FIG. 19 are used, and the description thereof will be omitted.

0192Further, the flip-flop shown in the present embodiment is suitable for the shift register of FIGS. 17 and 18. Can be used. As in the first and second embodiments, a three-phase clock signal is used. Therefore, power saving can be realized. Further, the shift registers of the present embodiment are each. Connected to the clock signal line (3rd wire 613, 4th wire 614, 5th wire 615) The number of stages of the flip-flop 1701 is 2/3 when a single-phase clock signal is used. Therefore, the load on each clock signal line can be reduced.

0193Further, the shift register shown in the present embodiment is displayed in FIGS. 9, 11, 12, and 44. It can be applied to the device. Similar to the first embodiment and the second embodiment, it is integrally formed with the pixel portion. By applying this embodiment to the scanning line drive circuit, the life of the display device can be extended. Can be done.

0194The shift register and flip-flop shown in the present embodiment are referred to as other elements in the present specification. It can be implemented in any combination with the configuration of the display device shown in the form of application. Also a book The shift register and flip-flop configurations shown in the embodiment can be freely combined. can do.

0195(Embodiment 4) In the present embodiment, pretending to have a configuration different from that of the first, second, and third embodiments. The upflop is shown in FIG. Same as Embodiment 1, Embodiment 2 and Embodiment 3. Such items are indicated by using a common code, and details of the same part or the part having the same function are shown. Detailed explanation will be omitted.

0196The flip-flop shown in FIG. 23 is the first transistor 101 and the second transistor 10. 2, 3rd transistor 103, 4th transistor 104, 5th transistor 130 5, 6th transistor 1906, 7th transistor 1907, 8th transistor 1 908, 9th transistor 1909, 10th transistor 2310, 11th transistor It has a Gista 2311 and a twelfth transistor 2312. In addition, flip flo The first wiring 111, the second wiring 112, the third wiring 113, the fourth wiring 114, and the first It is connected to the 5th wiring 115, the 6th wiring 116, and the 7th wiring 1317. This implementation In the form, the tenth transistor 2310, the eleventh transistor 2311 and the first Transistor 2312 of 2 is an N-channel transistor, and between its gate and source. When the voltage (Vgs) exceeds the threshold voltage (Vth), it shall be in a conductive state.

0197The first terminal (one of the source terminal and the drain terminal) of the first transistor 101 is the first arrangement. Connected to wire 111, the second terminal (the other of the source and drain terminals) is the second transition. It is connected to the gate terminal of the star 102, and the gate terminal is connected to the fifth wiring 115. The first terminal of the third transistor 103 is connected to the second wire 112, and the second terminal is the second. It is connected to the gate terminal of the transistor 102, and the gate terminal is connected to the fourth wire 114. ing. The first terminal of the second transistor 102 is connected to the third wiring 113, and the second terminal Is connected to the sixth wire 116. The first terminal of the fourth transistor 104 is the second arrangement Connected to wire 112, the second terminal is connected to the sixth wire 116, the gate terminal is the fourth wire Connected to 114. The first terminal of the fifth transistor 1305 is connected to the second wire 112. Connected, the second terminal is connected to the sixth wire 116, the gate terminal is connected to the seventh wire 1317 It is connected. The first terminal of the sixth transistor 1906 is connected to the second wire 112. , The second terminal is the gate terminal of the 8th transistor 1908 and the 11th transistor 231 Connected to the gate terminal of 1, the gate terminal is connected to the gate terminal of the second transistor 102 Has been done. The first terminal of the seventh transistor 1907 is connected to the first wiring 111, and the first The 2 terminals are the gate terminal of the 8th transistor 1908 and the 11th transistor 2311. It is connected to the gate terminal, and the gate terminal is connected to the first wiring 111. 8th Tran The first terminal of the Gista 1908 is connected to the third wire 113, and the second terminal is the ninth transition. It is connected to the gate terminal of the 1909 and the gate terminal of the 10th transistor 2310. To. The first terminal of the ninth transistor 1909 is connected to the second wire 112, and the second terminal is It is connected to the sixth wire 116. The first terminal of the tenth transistor 2310 is the second Connected to wire 112, the second terminal is connected to the gate terminal of the second transistor 102 There is. The first terminal of the eleventh transistor 2311 is connected to the seventh wire 1317, and the second The terminal is connected to the gate terminal of the twelfth transistor 2312. 12th transition The first terminal of the star 2312 is connected to the second wiring 112, and the second terminal is the second transistor. It is connected to the gate terminal of 102. The second terminal of the 11th transistor 2311 And the connection point of the gate terminal of the twelfth transistor 2312 is node 2324.

0198The first terminal of the third transistor 103, the first terminal of the fourth transistor 104, and the first terminal 5th transistor 1305 1st terminal, 6th transistor 1906 1st terminal, 9th First terminal of transistor 1909, first terminal and twelfth of tenth transistor 2310 The first terminal of transistor 2312 is not necessarily connected to the second wire 112. , May be connected to separate wires. In addition, the gate terminal of the third transistor 103 and And the gate terminal of the 4th transistor 104 is not limited to being connected to the 4th wiring 114. Instead, they may be connected to separate wires. Also, the first end of the first transistor 101 Child, 1st terminal of 7th transistor 1907 and gate end of 7th transistor 1907 The child is not necessarily connected to the first wire 111, even if it is connected to a separate wire. Good. Also, the 1st terminal of the 2nd transistor 102 and the 1908th of the 8th transistor 1908. One terminal is not necessarily connected to the third wire 113, but is connected to a separate wire. You may. Also, the gate terminal of the 5th transistor 1305 and the 11th transistor 2 The first terminal of the 311 is not necessarily connected to the seventh wire 1317, but to a separate wire. It may be connected.

0199Next, regarding the operation of the flip-flop shown in FIG. 23, the timing chart of FIG. 24 is shown. It will be explained with reference to it. FIG. 24 shows the flip-flop of FIG. 23 in FIGS. 1, 13 and 19. It is a timing chart when operating in the same manner as the flip-flop. In addition, Fig. 2 , Explain what is common to the timing charts in FIGS. 14 and 20 using common symbols. Omit.

0200In FIG. 24, the potential 2424 is the potential of node 2324 in FIG.

0201In the flip-flop of FIG. 23, the tenth transistor 231 in the third non-selection period. 0 turns on. Then, the node 121 is connected to the second transistor via the tenth transistor 2310. Since the potential of the wiring 112 is supplied, the L level can be maintained more stably. In addition, Figure 2 In the flip-flop of 3, the twelfth transistor 2312 is in the first non-selection period. Turn on. Then, the node 121 is arranged in the second position via the twelfth transistor 2312. Since the potential of the wire 112 is supplied, the L level can be maintained more stably.

0202Specifically, the on / off control of the twelfth transistor 2312 will be described. The 10th The on and off control of the transistor 2310 of the 9th transition shown in the third embodiment is performed. It is similar to the on and off control of the Star 1909. First, the same as the flip-flop in Fig. 19. Thus, the 6th transistor 1906 and the 7th transistor 1907 constitute an inverter. ing. Therefore, in the first non-selection period, the second non-selection period and the third non-selection period, The eleventh transition because node 121 is at L level and node 1922 is at H level Ta 2311 is turned on. Therefore, the twelfth transistor 2312 is the seventh wiring 131. Since it is controlled by the signal input to 7, it is turned on during the second non-selection period, and the second It is turned off during the 1st non-selection period and the 3rd non-selection period. On the other hand, set period and selection In the period, node 121 is at H level and node 1922 is at L level, so the 11th Transistor 2311 is turned off. Therefore, the gate end of the twelfth transistor 2312 The potential of the child maintains the potential of the first non-selection period, that is, the L level, which is the period before the set period. Therefore, the twelfth transistor 2312 is turned off.

0203From the above, the flip-flop of FIG. 23 includes the first non-selection period and the second non-selection period. And during the third non-selection period, V2 was supplied to the sixth wire 116 and node 121. Therefore, the malfunction of the flip-flop can be further suppressed. Because during the non-selection period This is because V2 can be supplied to the sixth wiring 116 and the node 121. In addition, the flip-flop of FIG. 23 shows the sixth wiring 116 and the node 1 during the non-selection period. Since V2 is supplied to 21, the noise of the sixth wiring 116 and node 121 is reduced. be able to.

0204Further, the flip-flop of FIG. 23 has the tenth transistor 2310 and the eleventh transistor. Deterioration of the characteristics of the Gista 2311 and the 12th transistor 2312 can be suppressed. This is because the tenth transistor 2310 is turned on only during the third non-selection period. To. Further, the eleventh transistor 2311 has a first non-selection period, a second non-selection period and a second non-selection period. The potential of node 2324 is V1-γ (γ: Vth1907 + Vth2) in the non-selection period of 3. This is because it is turned on only during the period when it rises to 311). Also, the twelfth transistor 2 This is because 312 is turned on only during the second non-selection period.

0205The flip-flops in FIG. 23 are the first transistor 101 and the second transistor 1. 02, 3rd transistor 103, 4th transistor 104, 5th transistor 13 05, 6th transistor 1906, 7th transistor 1907, 8th transistor 1908, 9th transistor 1909, 10th transistor 2310, 11th tiger The engineer 2311 and the twelfth transistor 2312 are all N-channel transistors. It is characterized by being configured. Therefore, the flip-flop in FIG. 23 is a transition. Amorphous silicon can be used as the semiconductor layer of the star, which simplifies the manufacturing process. The abbreviation can be achieved, and the manufacturing cost can be reduced and the yield can be improved. further It is also possible to manufacture semiconductor devices such as large display panels. Also, a transistor Even if polysilicon or single crystal silicon is used as the semiconductor layer of the above, the manufacturing process can be simplified. Can be done.

0206Further, the flip-flop of FIG. 23 has a characteristic deterioration (threshold value) as a semiconductor layer of a transistor. Transistor characteristics are inferior even when using Amofus silicon, which causes a marked voltage shift). Since it is possible to suppress the formation of semiconductor devices, it is possible to manufacture semiconductor devices such as display panels with a long life. it can.

0207Here, the tenth transistor 2310, the eleventh transistor 2311 and the twelfth transistor The functions of the Langista 2312 will be described. The tenth transistor 2310 is the second It has a function to select the timing to supply the potential of the wiring 112 to the node 121, and is a switch. Functions as a transistor. The eleventh transistor 2311 is the seventh wiring 131. It has a function to select the timing to supply the potential of 7 to the node 2324, and it is switched. Functions as a Langista. The twelfth transistor 2312 holds the potential of the second wiring 112. It has a function to select the timing to supply to the node 121, and has a switching transistor. And work.

0208If the same operation as in FIG. 23 is performed, the arrangement and number of transistors are shown in FIG. 23. Not limited to. Therefore, transistors, other elements (resistors, capacitive elements, etc.), da Iodes, switches, various logic circuits, etc. may be newly arranged.

0209For example, as shown in FIG. 25, with the gate terminal of the second transistor 102 shown in FIG. The capacitance element 2501 may be arranged between the second terminal and the second terminal. Placement of capacitive element 2501 Therefore, the boot strap operation during the selected period can be performed more stably. Also, Because the parasitic capacitance between the gate terminal and the second terminal of the second transistor 102 can be reduced. , Each transistor can be switched at high speed. The capacitive element 2501 , A gate insulating film may be used as the insulating layer, and a gate electrode layer and a wiring layer may be used as the conductive layer. A gate insulating film is used as the insulating layer, and a gate electrode layer and impurities are added as the conductive layer. A semiconductor layer may be used, or an interlayer film (insulating film) is used as an insulating layer and arranged as a conductive layer. A linear layer and a transparent electrode layer may be used. In addition, what is common to the configuration of FIG. 23 is a common code. The description thereof will be omitted with reference to.

0210In the flip-flop of FIG. 26, the same operation as in FIG. 23 can be performed. Figure 26 As shown in FIG. 23, the first transistor 101 shown in FIG. 23 may be diode-connected. By connecting the first transistor 101 with a diode, it flows to the first wiring 111. Since the current generated is small, the wiring width of the first wiring 111 can be reduced.

0211Further, the flip-flop shown in the present embodiment is suitable for the shift register of FIGS. 17 and 18. Can be used. Similar to Embodiment 1, Embodiment 2 and Embodiment 3, three-phase black Since a click signal can be used, power saving can be realized. In addition, the shift of this embodiment The register is each clock signal line (third wire 613, fourth wire 614, fifth wire 61). When the number of stages of the flip-flop 1701 connected to 5) uses a single-phase clock signal Since it is 2/3 of the total, the load on each clock signal line can be reduced.

0212Further, the shift register shown in the present embodiment is displayed in FIGS. 9, 11, 12, and 44. It can be applied to the device. Pixels as in Embodiment 1, Embodiment 2 and Embodiment 3. By applying this embodiment to the scanning line drive circuit integrally formed with the unit, the display device can be used for a long time. You can prolong your life.

0213The shift register and flip-flop shown in the present embodiment are referred to as other elements in the present specification. It can be implemented in any combination with the configuration of the display device shown in the form of application. Also a book The shift register and flip-flop configurations shown in the embodiment can be freely combined. can do.

0214(Embodiment 5) In this embodiment, a P-channel transistor is used as the transistor of the flip-flop. The case of application will be described with reference to FIG. 27. A P-channel transistor can be used. The flip-flop made is a flip-flop composed of N-channel transistors. And the basic configuration is the same. However, the H level and L level of the power supply potential and signal are reversed. ing.

0215FIG. 27 shows one stage (for example, 1) of the plurality of flip-flops of the shift register. The flip-flop of the stage) is shown. The flip-flop shown in FIG. 27 is the first tiger. Engineer 2701, 2nd transistor 2702, 3rd transistor 2703 and 4th Has a transistor 2704. The flip-flops are the first wiring 2711 and the first. 2nd wiring 2712, 3rd wiring 2713, 4th wiring 2714, 5th wiring 2715 and It is connected to the sixth wire 2716. In this embodiment, the first transistor 27 01, 2nd transistor 2702, 3rd transistor 2703 and 4th transistor The data 2704 is a P-channel transistor, and the absolute value of the voltage between its gate and source (| When Vgs |) exceeds the threshold voltage (| Vth |) (Vgs falls below Vth) G), it shall be in a conductive state. In addition, the first wiring 2711 and the second wiring 2712 , May be called the first power line and the second power line, respectively. In addition, the third wiring 2713 and The fourth wiring 2714 may be referred to as a first signal line and a second signal line, respectively.

0216The first transistor 2701, the second transistor 2702, and the third transistor The 2703 and the fourth transistor 2704 are the first transistor 101 in FIG. 1, respectively. , 2nd transistor 102, 3rd transistor 103 and 4th transistor 104 Corresponds to. Also, the first wiring 2711, the second wiring 2712, the third wiring 2713, the first 4 wiring 2714, 5th wiring 2715 and 6th wiring 2716 are the first in FIG. 1, respectively. Wiring 111, 2nd Wiring 112, 3rd Wiring 113, 4th Wiring 114, 5th Wiring 1 It corresponds to the 15th and 6th wiring 116.

0217The first terminal (one of the source terminal and the drain terminal) of the first transistor 2701 is the first. Connected to wire 2711, the second terminal (the other of the source and drain terminals) is the second tiger. It is connected to the gate terminal of the engineer 2702, and the gate terminal is connected to the fifth wire 2715. ing. The first terminal of the third transistor 2703 is connected to the second wire 2712 and the second The terminal is connected to the gate terminal of the second transistor 2702, and the gate terminal is the fourth wiring 2 Connected to 714. The first terminal of the second transistor 2702 is the third wiring 2713 The second terminal is connected to the sixth wire 2716. Fourth transistor 27 The first terminal of 04 is connected to the second wire 2712, and the second terminal is connected to the sixth wire 2716. The gate terminal is connected to the fourth wire 2714. The first transistor 2 The second terminal of 701, the gate terminal of the second transistor 2702, and the third transistor The connection point with the second terminal of 2703 is node 2721.

0218The second terminal of the third transistor 2703 and the second end of the fourth transistor 2704 The child is not necessarily connected to the second wire 2712, but to a separate wire. You may. In addition, the gate terminal of the third transistor 2703 and the fourth transistor 27 The gate terminal of 04 is not limited to being connected to the 4th wire 2714, but to a separate wire. It may be connected.

0219Next, regarding the operation of the flip-flop shown in FIG. 27, the timing chart of FIG. 28 and This will be described with reference to FIG. 29. In addition, in FIG. 28, a set period, a selection period, and a non-selection period The interval will be explained. The non-selection period includes the first non-selection period, the second non-selection period, and the second non-selection period. Divided into 3 non-selected periods, 1st non-selected period, 2nd non-selected period and 3rd non-selected period Are repeated in order.

0220The potential of V2 is supplied to the first wiring 2711, and the potential of V1 is supplied to the second wiring 2712. Has been done. However, V1&gt; V2.

0221However, the potential of V2 is not always supplied to the first wiring 2711, and other potentials are used. May be supplied, or a digital signal or an analog signal may be input. Well In addition, the potential of V1 is not always supplied to the second wiring 2712, and other potentials are supplied. It may be supplied, or a digital signal or an analog signal may be input.

0222Signals are input to the third wiring 2713, the fourth wiring 2714, and the fifth wiring 2715. Has been done. The signal input to the third wire 2713 is the first clock signal and the fourth The signal input to wire 2714 is the second clock signal and is input to wire 515. The signal to be made is the start signal. In addition, the third wiring 2713, the fourth wiring 2714 and The signal input to the fifth wiring 2715 has an H signal potential of V1 (hereinafter, also referred to as H level). ), The potential of the L signal is a digital signal of V2 (hereinafter, also referred to as L level).

0223However, it is not always the case that the first clock signal is input to the third wiring 2713. Other signals may be input, or a constant potential or current may be input. Also, the first The second clock signal is not always input to the wiring 2714 of 4, and other signals are input. It may be input, or a constant potential or current may be input. Also, the fifth wiring 2 The start signal is not limited to the input to the 715, and other signals may be input. However, a constant potential or current may be input.

0224In addition, the signals input to the third wiring 2713, the fourth wiring 2714, and the fifth wiring 2715. The potential of the H signal is not limited to V1 and the potential of the L signal is not limited to V2, and the potential of the H signal is that of the L signal. If it is higher than the electric potential, the electric potential is not particularly limited.

0225A signal is output from the sixth wiring 2716. Output from the 6th wiring 2716 The signal is the output signal of the flip-flop and the start signal of the flip-flop of the next stage. But also. The signal output from the 6th wiring 2716 is the flip-flop of the next stage. It is input to the fifth wiring 2715 of. Also, the signal output from the 6th wiring 2716 is The potential of the H signal is V1 (hereinafter, also referred to as H level), and the potential of the L signal is V2 (hereinafter, L level). It is also called a digital signal.

0226In FIG. 28, the signal 2813 is a signal input to the third wiring 2713, and the signal 28 14 is the signal input to the 4th wire 2714, and signal 2815 is the 5th wire 2715. Is the signal input to, and signal 2816 is the signal output from the sixth wire 2716. .. Further, the potential 2821 is the potential of the node 2721 in FIG. 27.

0227First, in the period A of FIG. 28 and the set period shown in FIG. 29 (A), the signal 2813 and the signal 2 814 is the H level and signal 2815 is the L level. Therefore, the third transition Star 2703 and 4th transistor 2704 are turned off and 1st transistor 270 1 is on. At this time, the second terminal of the first transistor 2701 becomes the source terminal. , Node 2721 potential (potential 2821) is the potential of the fifth wire 2715 and the first transition Since it is the sum of the absolute value of the threshold voltage of the star 2701, it becomes V2 + | Vth2701 |. .. Therefore, the second transistor 2702 is turned on, and the potential of the sixth wiring 2716 is the third. It becomes V1 because it becomes equal to the potential of the wiring 2713 of. In this way, during the set period, pretending The upflop keeps the second transistor 2702 on and sets the H level to the sixth wire 27 Output from 16.

0228In the period B of FIG. 28 and the selection period shown in FIG. 29 (B), the signal 2813 becomes the L level. Signal 2814 remains at H level and signal 2815 is at H level. Therefore, the first The third transistor 2703 and the fourth transistor 2704 remain off and the first Transistor 2701 is turned off. At this time, the second terminal of the second transistor 2702 Becomes the source terminal, and the potential of the sixth wiring 2716 begins to decrease. Potential of node 2721 In (potential 2821), node 2721 is in a floating state (hereinafter, also referred to as a floating state). Therefore, the parasitism between the gate terminal and the second terminal of the second transistor 2702 Due to the capacitive coupling, it decreases at the same time as the potential of the 6th wire 2716 (bootstrap operation). Also called). Therefore, the voltage Vgs between the gate and source of the second transistor 2702 is- | Vth2702 | -α (Vth2702: Threshold voltage of the second transistor 2702 , Α: Arbitrary positive number), and the potential of the sixth wiring 2716 is L level (V2). This In the selection period, the flip-flops set the potential of node 2721 to V2- | Vth2. By setting 702 | -α, the L level can be output from the 6th wiring 2716. Wear.

0229During period C in FIG. 28 and the first non-selection period shown in FIG. 29 (C), signal 2813 has an H level. The signal 2814 becomes the L level, and the signal 2815 remains at the H level. But Therefore, the third transistor 2703 and the fourth transistor 2704 are turned on, and the first Transistor 2701 remains off. Node 2721 and 6th wire 2716 , The second arrangement via the third transistor 2703 and the fourth transistor 2704, respectively. Since the potential of line 2712 is supplied, it becomes H level.

0230In period D of FIG. 28 and the second non-selection period shown in FIG. 29 (D), signal 2813 has an H level. The signal 2814 remains at the H level and the signal 2815 remains at the H level. Therefore, the third transistor 2703 and the fourth transistor 2704 are turned off. , The first transistor 2701 remains off. Therefore, node 2721 and the first Wiring 2716 of 6 maintains H level.

0231In period E in FIG. 28 and in the third non-selection period shown in FIG. 29 (E), signal 2813 is at L level. And the signal 2814 remains at H level and the signal 2815 remains at H level. Therefore, the first transistor 2701, the third transistor 2703 and the fourth transistor Engineer 2704 remains off. Therefore, node 2721 and the sixth wire 27 16 maintains H level.

0232From the above, the flip-flop of FIG. 27 is the third transistor 2703 and the fourth transistor. Transistor 2704 is turned on only during the first non-selection period, so third transistor 2 Suppresses characteristic deterioration (threshold voltage shift) of 703 and 4th transistor 2704 be able to. The flip-flop of FIG. 27 is the first transistor 2701 and the first transistor. Transistor 2702 of 2 is set period only, set period and selection period only. Therefore, the characteristics of the first transistor 2701 and the second transistor 2702 deteriorate. Can also be suppressed.

0233Further, the flip-flop of FIG. 27 is shown in the first non-selection period of the non-selection periods. Flip-flop malfunction due to V1 being supplied to the 2721 and 6th wiring 2716 Can be suppressed. Because, in the non-selection period, every fixed period (first non-selection period) V1 is supplied to node 2721 and the sixth wire 2716, and node 2721 This is because the potential of the sixth wiring 2716 can be stably maintained at V1.

0234The flip-flop in FIG. 27 is the first transistor 2701 and the second transistor. 2702, 3rd transistor 2703 and 4th transistor 2704 are all P channels It is characterized in that it is composed of a le-type transistor. Therefore, the flip-off in Figure 27 Ropp can simplify the manufacturing process, reduce manufacturing costs and improve yields. Can be Also, as the semiconductor layer of the transistor, polysilicon or single crystal silicon Can also be used to simplify the manufacturing process.

0235Here, the first transistor 2701, the second transistor 2702, and the third transistor The functions of the data 2703 and the fourth transistor 2704 will be described. First Transis The data 2701 has a function of selecting the timing of supplying the potential of the first wiring 2711. Functions as an input transistor. The second transistor 2702 is the third wire 271 Select the timing to supply the potential of 3 to the 6th wire 2716, and set the potential of node 2721. It has a function to reduce by bootstrap operation, and is a transistor for bootstrap. Functions as. The third transistor 2703 sets the potential of the second wire 2712 to node 2. It has a function to select the timing to supply to 721, and it is a machine as a switching transistor. It works. The fourth transistor 2704 sets the potential of the second wire 2712 to the sixth wire 271. It has a function to supply to 6 and functions as a switching transistor.

0236If the same operation as in FIG. 27 is performed, the arrangement and number of transistors are shown in FIG. 27. Not limited to. As can be seen from FIG. 29, which illustrates the operation of the flip-flop of FIG. 27. In this embodiment, a set period, a selection period, a first non-selection period, a second non-selection period, and a first non-selection period. During the non-selection period of 3, conduction is established as shown by the solid lines shown in FIGS. 29 (A) to 29 (E), respectively. Just do it. Therefore, it is possible to arrange and operate transistors and the like so as to satisfy this. If so, transistors, other elements (resistors, capacitive elements, etc.), diodes, switches , Various logic circuits and the like may be newly arranged.

0237For example, as shown in FIG. 30, the gate terminal of the second transistor 2701 shown in FIG. 27. The capacitive element 3001 may be arranged between the device and the second terminal. Placement of capacitive element 3001 Therefore, the boot strap operation during the selected period can be performed more stably. Also , The parasitic capacitance between the gate terminal and the second terminal of the second transistor 2702 can be reduced. Therefore, each transistor can be switched at high speed. The capacitive element 300 1 uses a gate insulating film as an insulating layer and a gate electrode layer and a wiring layer as a conductive layer. Alternatively, a gate insulating film is used as the insulating layer, and a gate electrode layer and impurities are added as the conductive layer. The added semiconductor layer may be used, or an interlayer film (insulating film) is used as the insulating layer to form a conductive layer. A wiring layer and a transparent electrode layer may be used. It should be noted that the common points with the configuration shown in FIG. 27 are common. The description will be omitted using reference numerals.

0238The capacitive element 3001 corresponds to the capacitive element 401 in FIG.

0239In the flip-flop of FIG. 31, the same operation as in FIG. 27 can be performed. Figure 31 As shown in, the first transistor 2701 shown in FIG. 27 has a diode connection. You may. By connecting the first transistor 2701 with a diode, the first arrangement Wire 2711 is no longer needed and wiring and power supply (V2) can be reduced one by one. It should be noted that , The common reference points with the configuration of FIG. 27 are used, and the description thereof will be omitted.

0240Further, the flip-flop shown in the present embodiment is applied to the shift registers of FIGS. 6 and 8. Can be As in the first to fourth embodiments, a three-phase clock signal is used. Because it can be done, power saving can be realized. Further, the shift register of the present embodiment is a black register. It is connected to the signal line (3rd wiring 613, 4th wiring 614, 5th wiring 615). The number of stages of the flip-flop 601 is 2/3 of that when a single-phase clock signal is used. Therefore, the load on each clock signal line can be reduced. However, the first wiring 611 And the potential supplied to the second wiring 612, the third wiring 613, the fourth wiring 614, the fifth The signal input to the wiring 615 and the sixth wiring 616 and the signal output to the wiring 622 are Flip-flops composed of N-channel transistors are shown in FIGS. 6 and 8, respectively. The H level and L level are inverted compared to the case where it is applied to the foot register.

0241Further, the shift register shown in the present embodiment is displayed in FIGS. 9, 11, 12, and 44. It can be applied to the device. As in the first to fourth embodiments, it is integrally formed with the pixel portion. By applying this embodiment to the scanning line drive circuit, the life of the display device can be extended. Can be done.

0242The shift register and flip-flop shown in the present embodiment are referred to as other elements in the present specification. It can be implemented in any combination with the configuration of the display device shown in the form of application. Also a book The shift register and flip-flop configurations shown in the embodiment can be freely combined. can do.

0243(Embodiment 6) In the present embodiment, the P-channel transistor having a configuration different from that of the fifth embodiment is configured. The flip-flop is shown in Fig. 32. It should be noted that the same items as in the fifth embodiment are common. It is indicated by a reference numeral, and a detailed description of the same portion or a portion having a similar function will be omitted.

0244The flip-flops shown in FIG. 32 are the first transistor 2701 and the second transistor 2. 702, 3rd transistor 2703, 4th transistor 2704 and 5th transistor It has a star 3205. The flip-flops are the first wiring 2711 and the second wiring 2. 712, 3rd wiring 2713, 4th wiring 2714, 5th wiring 2715, 6th wiring 2 It is connected to 716 and the 7th wire 3217. In the present embodiment, the fifth tran The Gista 3205 is a P-channel transistor, and the absolute value of the voltage between its gate and source. When (| Vgs |) exceeds the threshold voltage (| Vth |) (Vgs falls below Vth) When), it shall be in a conductive state. The 7th wiring 3217 is called the 3rd signal line. It doesn't matter.

0245The fifth transistor 3205 corresponds to the fifth transistor 1305 in FIG. .. Further, the seventh wiring 3217 corresponds to the seventh wiring 1317 in FIG.

0246The first terminal (one of the source terminal and the drain terminal) of the first transistor 2701 is the first. Connected to wire 2711, the second terminal (the other of the source and drain terminals) is the second tiger. It is connected to the gate terminal of the engineer 2702, and the gate terminal is connected to the fifth wire 2715. ing. The first terminal of the third transistor 2703 is connected to the second wire 2712 and the second The terminal is connected to the gate terminal of the second transistor 2702, and the gate terminal is the fourth wiring 2 Connected to 714. The first terminal of the second transistor 2702 is the third wiring 2713 The second terminal is connected to the sixth wire 2716. Fourth transistor 27 The first terminal of 04 is connected to the second wire 2712, and the second terminal is connected to the sixth wire 2716. The gate terminal is connected to the fourth wire 2714. Fifth transistor 3205 The first terminal of is connected to the second wire 2712, and the second terminal is connected to the sixth wire 2716. , The gate terminal is connected to the 7th wire 3217.

0247The first terminal of the third transistor 2703 and the first terminal of the fourth transistor 2704 And the first terminal of the fifth transistor 3205 is connected to the second wire 2712. Is not limited and may be connected to separate wires. Also, the third transistor 2703 Gate terminal and the gate terminal of the 4th transistor 2704 are connected to the 4th wiring 2714. It is not limited to the above, and may be connected to different wirings.

0248Next, regarding the operation of the flip-flop shown in FIG. 32, the timing chart of FIG. 33 is shown. It will be explained with reference to it. In FIG. 33, the flip-flop of FIG. 32 is shown in FIG. 27. It is a timing chart when operating in the same manner as a flop. In addition, Taimi in Fig. 28 The parts that are common to the chart are the same as the symbols, and the description thereof will be omitted.

0249A signal is input to the seventh wiring 3217. Input to the 7th wire 3217 The signal is a third clock signal. The signal input to the 7th wiring 3217 is H. The potential of the signal is V1 (hereinafter, also referred to as H level), and the potential of the L signal is V2 (hereinafter, L level). It is also a digital signal.

0250However, it is not always the case that the third clock signal is input to the seventh wiring 3217. Other signals may be input, or a constant potential or current may be input.

0251In FIG. 33, the signal 3317 is a signal input to the seventh wiring 3217.

0252In the flip-flop of FIG. 32, in the set period and the second non-selection period, the fifth tiger The engineer 3205 is turned on. And the sixth wiring 2716 is the fifth transistor 3 The potential of the second wiring 2712 is supplied via 205, so the H level is maintained.

0253From the above, the flip-flop of FIG. 32 has a first non-selection period and a second non-selection period. Of the third non-selection period, in the first non-selection period and the second non-selection period, the sixth wiring Since V1 is supplied to 2716, the malfunction of the flip-flop can be further suppressed. To. Because, in the non-selection period, every fixed period (first non-selection period and second non-selection period) V1 is supplied to the 6th wiring 2716, and the potential of the 6th wiring 2716 is stabilized. Because it can be maintained at V1.

0254Further, in the flip-flop of FIG. 32, the fifth transistor 3205 has a set period and the fifth transistor 3205. Since it is turned on only during the non-selection period of 2, the deterioration of the characteristics of the fifth transistor 3205 is suppressed. Can be

0255The flip-flops in FIG. 32 are the first transistor 2701 and the second transistor. 2702, 3rd transistor 2703, 4th transistor 2704 and 5th transistor The feature is that the Gista 3205 is composed entirely of P-channel transistors. Shi Therefore, the flip-flop of FIG. 32 can simplify the manufacturing process, and the manufacturing cost can be simplified. It is possible to reduce the yield and improve the yield. Also, as a semiconductor layer of a transistor, The manufacturing process can also be simplified by using polysilicon or single crystal silicon.

0256Here, the function of the fifth transistor 3205 will be described. Fifth transistor 32 05 selects the timing to supply the potential of the second wiring 2712 to the sixth wiring 276. It has a function and functions as a switching transistor.

0257If the same operation as in FIG. 32 is performed, the arrangement and number of transistors are shown in FIG. 32. Not limited to. Therefore, transistors, other elements (resistors, capacitive elements, etc.), da Iodes, switches, various logic circuits, etc. may be newly arranged.

0258For example, as shown in FIG. 34, the gate terminal of the second transistor 2702 shown in FIG. 32. A capacitive element 3401 may be arranged between the device and the second terminal. Placement of capacitive element 3401 Therefore, the boot strap operation during the selected period can be performed more stably. Also , The parasitic capacitance between the gate terminal and the second terminal of the second transistor 2702 can be reduced. Therefore, each transistor can be switched at high speed. The capacitive element 340 1 uses a gate insulating film as an insulating layer and a gate electrode layer and a wiring layer as a conductive layer. Alternatively, a gate insulating film is used as the insulating layer, and a gate electrode layer and impurities are added as the conductive layer. The added semiconductor layer may be used, or an interlayer film (insulating film) is used as the insulating layer to form a conductive layer. A wiring layer and a transparent electrode layer may be used. The common points with the configuration shown in Fig. 32 are common. The description will be omitted using reference numerals.

0259The capacitive element 3401 corresponds to the capacitive element 1501 in FIG.

0260In the flip-flop of FIG. 35, the same operation as in FIG. 32 can be performed. Figure 35 As shown in, the first transistor 2701 shown in FIG. 32 is diode-connected. May be good. The first wiring is made by connecting the first transistor 2701 with a diode. 2711 is no longer needed and wiring and power supply (V2) can be reduced one by one. In addition, it should be noted. The common reference numerals are used for the parts that are common to the configuration shown in FIG.

0261Further, the flip-flop shown in the present embodiment is suitable for the shift register of FIGS. 17 and 18. Can be used. As in the first to fifth embodiments, a three-phase clock signal is used. Therefore, power saving can be realized. Further, the shift registers of the present embodiment are each. Connected to the clock signal line (3rd wire 613, 4th wire 614, 5th wire 615) The number of stages of the flip-flop 1701 is 2 / compared to the case where a single-phase clock signal is used. Since it becomes 3, the load of each clock signal line can be reduced. However, the first wiring The potential supplied to the 611 and the second wiring 612, and the third wiring 613 and the fourth wiring 614 , The signal input to the 5th wiring 615 and the 6th wiring 616, and the output to the wiring 622 The signals are flip-flops composed of N-channel transistors, respectively, shown in FIG. 17 and Compared to the case where it is applied to the shift register in Fig. 18, the H level and L level are inverted. ..

0262Further, the shift register shown in the present embodiment is displayed in FIGS. 9, 11, 12, and 44. It can be applied to the device. As in the first to fifth embodiments, it is integrally formed with the pixel portion. By applying this embodiment to the scanning line drive circuit, the life of the display device can be extended. Can be done.

0263The shift register and flip-flop shown in the present embodiment are referred to as other elements in the present specification. It can be implemented in any combination with the configuration of the display device shown in the form of application. Also a book The shift register and flip-flop configurations shown in the embodiment can be freely combined. can do.

0264(Embodiment 7) In the present embodiment, a flip-flop having a configuration different from that of the fifth and sixth embodiments is used. It is shown in FIG. It should be noted that the same reference numerals as those in the fifth and sixth embodiments are used. The detailed description of the same part or the part having the same function will be omitted.

0265The flip-flop shown in FIG. 36 includes a first transistor 2701 and a second transistor 2. 702, 3rd transistor 2703, 4th transistor 2704, 5th transistor Data 3205, 6th transistor 3606, 7th transistor 3607, 8th transistor It has a Gista 3608 and a ninth transistor 3609. Flip-flop 1st wiring 2711, 2nd wiring 2712, 3rd wiring 2713, 4th wiring 271 4, connected to the 5th wire 2715, the 6th wire 2716 and the 7th wire 3217 .. In this embodiment, the sixth transistor 3606, the seventh transistor 3607, The eighth transistor 3608 and the ninth transistor 3609 are P-channel transistors. The absolute value of the voltage between the gate and the source (| Vgs |) is the threshold voltage (| Vth). When it exceeds (|) (when Vgs falls below Vth), it shall be in a conductive state.

0266The first terminal (one of the source terminal and the drain terminal) of the first transistor 2701 is the first. Connected to wire 2711, the second terminal (the other of the source and drain terminals) is the second tiger. It is connected to the gate terminal of the engineer 2702, and the gate terminal is connected to the fifth wire 2715. ing. The first terminal of the third transistor 2703 is connected to the second wire 2712 and the second The terminal is connected to the gate terminal of the second transistor 2702, and the gate terminal is the fourth wiring 2 Connected to 714. The first terminal of the second transistor 2702 is the third wiring 2713 The second terminal is connected to the sixth wire 2716. Fourth transistor 27 The first terminal of 04 is connected to the second wire 2712, and the second terminal is connected to the sixth wire 2716. The gate terminal is connected to the fourth wire 2714. Fifth transistor 3205 The first terminal of is connected to the second wire 2712, and the second terminal is connected to the sixth wire 2716. , The gate terminal is connected to the 7th wire 3217. 6th transistor 3606th Terminal 1 is connected to the second wire 2712, and terminal 2 is the game of the eighth transistor 3208. The gate terminal is connected to the gate terminal of the second transistor 2702. There is. The first terminal of the seventh transistor 3607 is connected to the first wire 2711 and the second end. The child is connected to the gate terminal of the eighth transistor 3608, and the gate terminal is the first wiring 27. Connected to 11. The first terminal of the eighth transistor 3608 is on the third wire 2713. It is connected and the second terminal is connected to the gate terminal of the ninth transistor 3609. 9th The first terminal of transistor 3609 is connected to the second wire 2712, and the second terminal is the sixth. It is connected to wiring 2716. The second terminal of the sixth transistor 3606, the seventh Connection of the 2nd terminal of transistor 3607 and the gate terminal of 8th transistor 3608 Let's call it node 3622. In addition, the second terminal and the ninth transistor of the eighth transistor 3608 The connection point of the gate terminal of the Langista 3609 is the node 3623.

0267The first terminal of the third transistor 2703 and the first terminal of the fourth transistor 2704 , 1st terminal of 5th transistor 3205, 1st terminal of 6th transistor 3606 and The first terminal of the ninth transistor 3609 is not limited to being connected to the second wire 2712. Instead, they may be connected to separate wires. Also, the game of the third transistor 2703 The terminal and the gate terminal of the 4th transistor 2704 are connected to the 4th wiring 2714. It is not limited to the presence, and may be connected to different wirings. Also, the first transistor 2 Terminal 1 of 701, Terminal 1 of Transistor 3607 and Transistor 36 The gate terminal of 07 is not necessarily connected to the first wire 2711, but to a separate wire. It may be connected. In addition, the first terminal and the eighth transistor of the second transistor 2702 The first terminal of the Gista 3608 is not necessarily connected to the third wire 2713, but is separate. It may be connected to the wiring of.

0268Next, regarding the operation of the flip-flop shown in FIG. 36, the timing chart of FIG. 37 is shown. It will be explained with reference to it. Note that FIG. 37 shows the flip-flop of FIG. 36 in FIGS. 27 and 32. It is a timing chart when operating in the same manner as the flip-flop. In addition, Fig. 2 The points that are common to the timing charts in 8 and Fig. 33 are the same, and the explanations are omitted. To.

0269In FIG. 37, the potential 3722 is the potential of node 3622 in FIG. 36 and the potential 3723 is This is the potential of node 3623 in FIG.

0270In the flip-flop of FIG. 36, in the third non-selection period, the ninth transistor 360 9 turns on. The sixth wire 2716 is then routed through the ninth transistor 3609. The H level is maintained because the potential of the second wiring 2712 is supplied.

0271Specifically, the on / off control of the ninth transistor 3609 will be described. First, the sixth The Langista 3606 and the 7th transistor 3607 make up the inverter and are the transistors. When the L level is input to the gate terminal of the engineer 3606, the potential of node 3622 (potential) 3722) is generally V1. However, the potential 3722 at this time is the sixth at this time. To determine by the resistivity ratio between the transistor 3606 of the transistor 3606 and the transistor 3607 of the seventh transistor , It is a little lower than V1. In addition, the gate terminal of the 6th transistor 3606 is H-re. When the bell is input, the potential of node 3622 becomes the potential of the first wire 2711 and the potential of the seventh tram. V2 + | Vth3607 | because it is the sum of the absolute value of the threshold voltage of Gista 3607. To. Therefore, in the first non-selection period, the second non-selection period and the third non-selection period, no Eighth transistor because node 2721 is at H level and node 3622 is at L level 3608 is turned on. Therefore, the ninth transistor 3609 is connected to the third wiring 2713. Since it is controlled by the input signal, it is turned on during the third non-selection period and the first It is turned off during the non-selection period and the second non-selection period. On the other hand, set period and selection period Now, node 2721 is at L level and node 3622 is at H level, so the 8th G Langista 3608 is turned off. Therefore, at the gate terminal of the 9th transistor 3609 Maintain the potential of the first non-selection period, that is, the H level, where the potential is the period before the set period. Therefore, the ninth transistor 3609 is turned off.

0272From the above, the flip-flop of FIG. 36 includes the first non-selection period and the second non-selection period. And in the third non-selection period, V1 is supplied to the sixth wire 2716, so the flip It is possible to further suppress the malfunction of the rop. Because in the non-selection period, the sixth This is because V1 can be supplied to the wiring 2716. Also, the flip floc in Figure 36 Since V1 is supplied to the 6th wire 2716 during the non-selection period, the 6th wire 27 16 noise can be reduced.

0273In addition, the flip-flop of FIG. 36 is the sixth transistor 3606, the seventh transistor. Deterioration of characteristics of the 3607, 8th transistor 3608 and 9th transistor 3609 It can be suppressed. Because the 6th transistor 3606 has a set period and a selection period This is because it turns on only in between. Also, the 7th transistor 3607 is the 1st after the selection period. The period during which the potential of node 3622 decreases to V2 + | Vth3607 | during the non-selection period of 1. This is because it turns on only in between. In addition, the eighth transistor 3608 has a first non-selection period. , The potential of node 3623 of the second non-selection period and the third non-selection period is V2 + δ (δ :) This is because it turns on only during the period when it decreases to | Vth3607 | + | Vth3608 |). To. Also, the ninth transistor 3609 is turned on only during the third non-selection period. ..

0274The flip-flop in FIG. 36 is the first transistor 2701 and the second transistor. 2702, 3rd transistor 2703, 4th transistor 2704, 5th transition Star 3205, 6th transistor 3606, 7th transistor 3607, 8th tiger The transistor 3608 and the ninth transistor 3609 are all P-channel transistors. It is characterized by being made. Therefore, the flip-flop in Figure 36 is a transition. Simplify the manufacturing process by using polysilicon or single crystal silicon as the semiconductor layer. be able to.

0275Here, the sixth transistor 3606, the seventh transistor 3607, the eighth transistor The functions of the data 3608 and the ninth transistor 3609 will be described. 6th Transis The data 3606 selects the timing to supply the potential of the second wire 2712 to the node 3622. It has a function to function as a switching transistor. 7th transistor 360 7 is a function to select the timing to supply the potential of the first wiring 2711 to the node 3622. And functions as a diode. The eighth transistor 3608 is the third wiring 271. It has a function to select the timing to supply the potential of 3 to the node 3623, and is switched. Functions as a Langista. The ninth transistor 3609 has the potential of the second wiring 2712. Has the function of selecting the timing to supply the 6th wiring 2716, and the switching transformer. Functions as a gista.

0276If the same operation as in FIG. 36 is performed, the arrangement and number of transistors are shown in FIG. 36. Not limited to. Therefore, transistors, other elements (resistors, capacitive elements, etc.), da Iodes, switches, various logic circuits, etc. may be newly arranged.

0277For example, as shown in FIG. 38, the gate terminal of the second transistor 2702 shown in FIG. A capacitive element 3801 may be arranged between the device and the second terminal. Placement of capacitive element 3801 Therefore, the boot strap operation during the selected period can be performed more stably. Also , The parasitic capacitance between the gate terminal and the second terminal of the second transistor 2702 can be reduced. Therefore, each transistor can be switched at high speed. Capacitive element 380 1 uses a gate insulating film as an insulating layer and a gate electrode layer and a wiring layer as a conductive layer. Alternatively, a gate insulating film is used as the insulating layer, and a gate electrode layer and impurities are added as the conductive layer. The added semiconductor layer may be used, or an interlayer film (insulating film) is used as the insulating layer to form a conductive layer. A wiring layer and a transparent electrode layer may be used. It should be noted that the common points with the configuration shown in FIG. 36 are common. The description will be omitted using reference numerals.

0278In the flip-flop of FIG. 39, the same operation as in FIG. 36 can be performed. Figure 39 As shown in FIG. 36, the first transistor 2701 shown in FIG. 36 may be diode-connected. .. By connecting the first transistor 2701 with a diode, the first wiring 271 Since the current flowing through 1 becomes smaller, the wiring width of the first wiring 2711 can be reduced. To. It should be noted that the common reference numerals are used for the parts common to the configuration of FIG. 36, and the description thereof will be omitted.

0279Further, the flip-flop shown in the present embodiment is suitable for the shift register of FIGS. 17 and 18. Can be used. As in the first to sixth embodiments, a three-phase clock signal is used. Therefore, power saving can be realized. Further, the shift registers of the present embodiment are each. Connected to the clock signal line (3rd wire 613, 4th wire 614, 5th wire 615) The number of stages of the flip-flop 1701 is 2/3 of that when a single-phase clock signal is used. Therefore, the load on each clock signal line can be reduced. However, the first wiring 611 And the potential supplied to the second wiring 612, the third wiring 613, the fourth wiring 614, the fifth The signal input to the wiring 615 and the sixth wiring 616 and the signal output to the wiring 622 are Flip-flops composed of N-channel transistors are shown in FIGS. 17 and 18, respectively. Compared to the case where it is applied to the shift register of, the H level and L level are inverted.

0280Further, the shift register shown in the present embodiment is displayed in FIGS. 9, 11, 12, and 44. It can be applied to the device. As in the first to sixth embodiments, it is integrally formed with the pixel portion. By applying this embodiment to the scanning line drive circuit, the life of the display device can be extended. Can be done.

0281The shift register and flip-flop shown in the present embodiment are referred to as other elements in the present specification. It can be implemented in any combination with the configuration of the display device shown in the form of application. Also a book The shift register and flip-flop configurations shown in the embodiment can be freely combined. can do.

0282(Embodiment 8) In the present embodiment, pretending to have a configuration different from that of the fifth, sixth and seventh embodiments. The upflop is shown in Figure 40. Same as Embodiment 5, Embodiment 6 and Embodiment 7. Such items are indicated by using a common code, and details of the same part or the part having the same function are shown. Detailed explanation will be omitted.

0283The flip-flop shown in FIG. 40 includes a first transistor 2701 and a second transistor 2. 702, 3rd transistor 2703, 4th transistor 2704, 5th transistor Data 3205, 6th transistor 3606, 7th transistor 3607, 8th transistor Gista 3608, 9th transistor 3609, 10th transistor 4010, 11th It has a transistor 4011 and a twelfth transistor 4012. In addition, The pflops are the first wire 2711, the second wire 2712, the third wire 2713, and the fourth wire. Connect to Wiring 2714, 5th Wiring 2715, 6th Wiring 2716 and 7th Wiring 3217 Has been done. In this embodiment, the tenth transistor 4010 and the eleventh transition The star 4011 and the twelfth transistor 4012 are P-channel transistors. Absolute value of voltage between gate and source (| Vgs |) exceeds threshold voltage (| Vth |) When (Vgs falls below Vth), it shall be in a conductive state.

0284The first terminal (one of the source terminal and the drain terminal) of the first transistor 2701 is the first. Connected to wire 2711, the second terminal (the other of the source and drain terminals) is the second tiger. It is connected to the gate terminal of the engineer 2702, and the gate terminal is connected to the fifth wire 2715. ing. The first terminal of the third transistor 2703 is connected to the second wire 2712 and the second The terminal is connected to the gate terminal of the second transistor 2702, and the gate terminal is the fourth wiring 2 Connected to 714. The first terminal of the second transistor 2702 is the third wiring 2713 The second terminal is connected to the sixth wire 2716. Fourth transistor 27 The first terminal of 04 is connected to the second wire 2712, and the second terminal is connected to the sixth wire 2716. The gate terminal is connected to the fourth wire 2714. Fifth transistor 3205 The first terminal of is connected to the second wire 2712, and the second terminal is connected to the sixth wire 2716. , The gate terminal is connected to the 7th wire 3217. 6th transistor 3606th Terminal 1 is connected to the second wire 2712, and terminal 2 is the game of the eighth transistor 3608. It is connected to the gate terminal and the gate terminal of the 11th transistor 4011, and the gate terminal is the second It is connected to the gate terminal of transistor 2702. 7th transistor 3607 The first terminal is connected to the first wiring 2711, and the second terminal is the game of the eighth transistor 3608. It is connected to the G terminal and the gate terminal of the 11th transistor 4011, and the gate terminal is the 1st It is connected to wiring 2711. The first terminal of the eighth transistor 3608 is the third wiring 2 Connected to 713, the second terminal is the gate terminal of the ninth transistor 3609 and the tenth transistor. It is connected to the gate terminal of the Langista 4010. 1st of 9th transistor 3609 The terminal is connected to the second wire 2712 and the second terminal is connected to the sixth wire 2716. .. The first terminal of the tenth transistor 4010 is connected to the second wiring 2712, and the second terminal Is connected to the gate terminal of the second transistor 2702. 11th transistor 4 The first terminal of 011 is connected to the seventh wire 3217, and the second terminal is the twelfth transistor 4 It is connected to the gate terminal of 012. The first terminal of the twelfth transistor 4012 is the second Connected to the wiring 2712, the second terminal connects to the gate terminal of the second transistor 2702 Has been done. The second terminal and the twelfth transistor of the eleventh transistor 4011 The connection point of the gate terminal of 4012 is node 4024.

0285The second terminal of the third transistor 2703 and the second terminal of the fourth transistor 2704 , 2nd terminal of 5th transistor 3205, 2nd terminal of 6th transistor 3606, 2nd 9th transistor 3609 2nd terminal, 10th transistor 4010 2nd terminal and 1st The second terminal of the 12 transistors 4012 is not limited to being connected to the second wire 2712. Instead, they may be connected to separate wires. Also, the game of the third transistor 2703 The terminal and the gate terminal of the 4th transistor 2704 are connected to the 4th wiring 2714. It is not limited to the presence, and may be connected to different wirings. Also, the first transistor 2 Terminal 1 of 701, Terminal 1 of Transistor 3607 and Transistor 36 The gate terminal of 07 is not necessarily connected to the first wire 2711, but to a separate wire. It may be connected. In addition, the first terminal and the eighth transistor of the second transistor 2702 The first terminal of the Gista 3608 is not necessarily connected to the third wire 2713, but is separate. It may be connected to the wiring of. Also, the gate terminal of the 5th transistor 3205 and the 5th transistor The first terminal of the 11th transistor 4011 is not limited to being connected to the 7th wire 3217. Instead, they may be connected to separate wires.

0286Next, regarding the operation of the flip-flop shown in FIG. 40, the timing chart of FIG. 41 is shown. It will be explained with reference to it. FIG. 41 shows the flip-flops of FIG. 40 in FIGS. 27, 32 and 36. It is a timing chart when it operates in the same manner as the shown flip-flop. In addition, the figure 28, the common points with the timing charts in Fig. 33 and Fig. 37 are explained using common codes. Ming is omitted.

0287In FIG. 41, the potential 4124 is the potential of node 4024 in FIG.

0288In the flip-flop of FIG. 40, the tenth transistor 401 in the third non-selection period 0 turns on. Node 2721 then passes through the tenth transistor 4010. Since the potential of wiring 2712 of 2 is supplied, the H level can be maintained more stably. further, In the flip-flop of FIG. 40, the twelfth transistor 401 in the first non-selection period 2 turns on. Then, node 2721 is connected to the twelfth transistor 4012 via the twelfth transistor 4012. Since the potential of wiring 2712 of 2 is supplied, the H level can be maintained more stably.

0289Specifically, the on / off control of the twelfth transistor 4012 will be described. The 10th The control of turning on and off the transistor 4010 of the transistor 4010 is the ninth transition shown in the seventh embodiment. It is the same as the on / off control of the star 3609. First, the same as the flip-flop in Fig. 36 Thus, the 6th transistor 3606 and the 7th transistor 3607 constitute an inverter. ing. Therefore, in the first non-selection period, the second non-selection period and the third non-selection period, The eleventh tran because node 2721 is at H level and node 3622 is at L level. Gista 4011 turns on. Therefore, the twelfth transistor 4012 is the seventh wiring 3 Since it is controlled by the signal input to 217, it is turned on after the second non-selection period, and the first Turns off during the non-selection period and the third non-selection period. On the other hand, set period and selection period In between, node 2721 is at L level and node 3622 is at H level, so the eleventh Transistor 4011 is turned off. Therefore, the gate end of the twelfth transistor 4012 The potential of the child maintains the potential of the first non-selection period, that is, the H level, which is the period before the set period. Therefore, the twelfth transistor 4012 is turned off.

0290From the above, the flip-flop of FIG. 40 includes the first non-selection period and the second non-selection period. And during the third non-selection period, V1 is supplied to the sixth wire 2716 and node 2721. Therefore, the malfunction of the flip-flop can be further suppressed. Because the non-selection period Because V1 can be supplied to the sixth wire 2716 and node 2721 in between. Is. In addition, the flip-flop of FIG. 40 has the sixth wiring 2716 and the sixth wiring during the non-selection period. And since V1 is supplied to node 2721, the sixth wiring 2716 and node 2721 Izu can be reduced.

0291Further, the flip-flop of FIG. 40 shows the tenth transistor 4010 and the eleventh transistor. Deterioration of the characteristics of the Gista 4011 and the 12th transistor 4012 can be suppressed. This is because the tenth transistor 4010 is turned on only during the third non-selection period. To. Further, the eleventh transistor 4011 has a first non-selection period, a second non-selection period and a second non-selection period. The potential of node 4024 is V2 + ε (ε: | Vth3607 | + | V This is because it is turned on only during the period when it decreases to th4011 |). Also, the twelfth tran This is because Gista 4012 is turned on only during the second non-selection period.

0292The flip-flop in FIG. 40 is the first transistor 2701 and the second transistor. 2702, 3rd transistor 2703, 4th transistor 2704, 5th transition Star 3205, 6th transistor 3606, 7th transistor 3607, 8th tiger Engineer 3608, 9th transistor 3609, 10th transistor 4010, 1st 1 transistor 4011 and 12th transistor 4012 are all P-channel transistors It is characterized by being composed of a gista. Therefore, the flip-flop in FIG. 40 is Even if polysilicon or single crystal silicon is used as the semiconductor layer of the transistor, the manufacturing process is simplified. It can be abbreviated.

0293Here, the tenth transistor 4010, the eleventh transistor 4011 and the twelfth transistor The functions of the Langista 4012 will be described. The tenth transistor 4010 is the second It has a function to supply the potential of wiring 2712 to node 2721, and is a switching transistor. Functions as. The eleventh transistor 4011 nodes the potential of the seventh wire 3217. It has a function to supply to 4024 and functions as a switching transistor. 12th The Langista 4012 has the function of supplying the potential of the second wire 2712 to the node 2721. , Functions as a switching transistor.

0294If the same operation as in FIG. 40 is performed, the arrangement and number of transistors are shown in FIG. 23. Not limited to. Therefore, transistors, other elements (resistors, capacitive elements, etc.), da Iodes, switches, various logic circuits, etc. may be newly arranged.

0295For example, as shown in FIG. 42, the gate terminal of the second transistor 2702 shown in FIG. 40. A capacitive element 4201 may be arranged between the device and the second terminal. Placing the capacitive element 4201 Therefore, the boot strap operation during the selected period can be performed more stably. Also , The parasitic capacitance between the gate terminal and the second terminal of the second transistor 2702 can be reduced. Therefore, each transistor can be switched at high speed. Capacitive element 420 1 uses a gate insulating film as an insulating layer and a gate electrode layer and a wiring layer as a conductive layer. Alternatively, a gate insulating film is used as the insulating layer, and a gate electrode layer and impurities are added as the conductive layer. The added semiconductor layer may be used, or an interlayer film (insulating film) is used as the insulating layer to form a conductive layer. A wiring layer and a transparent electrode layer may be used. The common points with the configuration shown in Fig. 40 are common. The description will be omitted using reference numerals.

0296The flip-flop of FIG. 43 can also perform the same operation as that of FIG. 40. Figure 43 As shown in, the first transistor 2701 shown in FIG. 40 may be diode-connected. .. By connecting the first transistor 2701 with a diode, the first wiring 271 Since the current flowing through 1 becomes smaller, the wiring width of the first wiring 2711 is reduced.

0297Further, the flip-flop shown in the present embodiment is suitable for the shift register of FIGS. 17 and 18. Can be used. As in the first to seventh embodiments, a three-phase clock signal is used. Therefore, power saving can be realized. Further, the shift registers of the present embodiment are each. Clock signal line (3rdConnected to the wire 613, 4th wire 614, 5th wire 615) The number of stages of the flip-flop 1701 is 2 / compared to the case where a single-phase clock signal is used. Since it becomes 3, the load of each clock signal line can be reduced. However, the first wiring The potential supplied to the 611 and the second wiring 612, and the third wiring 613 and the fourth wiring 614 , The signal input to the 5th wiring 615 and the 6th wiring 616, and the output to the wiring 622 The signals are flip-flops composed of N-channel transistors, respectively, shown in FIG. 17 and Compared to the case where it is applied to the shift register in Fig. 18, the H level and L level are inverted. ..

0298Further, the shift register shown in the present embodiment is displayed in FIGS. 9, 11, 12, and 44. It can be applied to the device. As in the first to seventh embodiments, it is integrally formed with the pixel portion. By applying this embodiment to the scanning line drive circuit, the life of the display device can be extended. Can be done.

0299The shift register and flip-flop shown in the present embodiment are referred to as other elements in the present specification. It can be implemented in any combination with the configuration of the display device shown in the form of application. Also a book The shift register and flip-flop configurations shown in the embodiment can be freely combined. can do.

0300(Embodiment 9) In the present embodiment, an example of pixels included in the display device shown in the first to eighth embodiments. Will be described with reference to FIG. 46.

0301The pixel configuration of FIG. 46 will be described. The pixel shown in FIG. 46 (A) is the transistor 4601. , Capacitive element 4602, display element 4621. The pixels are the first wiring 4611, It is connected to the second wire 4612 and the third wire 4613. In addition, the display element 4621 Due to the electric field between the pixel electrode 4623 and the counter electrode 4622 as shown in Fig. 46 (B). A case where the liquid crystal element 4631 whose light transmittance changes is used will be described. The first Wiring 4611 may be called a signal line. Also, the second wire 4612 may be called a scanning line. I. Further, the third wiring 4613 may be referred to as a holding capacitance line.

0302The transistor 4601 shows an N-channel type transistor, but it is a P-channel. It may be a transistor type. In the first to fourth embodiments, the transistor It is preferable to use an N-channel transistor as the 4601. Because Tran Since amorphous silicon can be used as the semiconductor layer of the gista, it can be used in the manufacturing process. This is because it can be simplified, manufacturing costs can be reduced, and yield can be improved. is there. Furthermore, it is possible to manufacture semiconductor devices such as large display panels. To. It can also be manufactured by using polysilicon or single crystal silicon as the semiconductor layer of the transistor. The manufacturing process can be simplified. Further, in the fifth to eighth embodiments, the tran It is desirable to use a P-channel transistor as the Gista 4601. Because The manufacturing process can be simplified, the manufacturing cost can be reduced, and the yield can be improved. Because it can be done.

0303The first wiring 4611 is the signal shown on the display devices of FIGS. 9, 11, 12, and 44. Corresponds to any one of lines S1 to Sm. The second wiring 4612 is shown in FIGS. 9, 11, 12 and It corresponds to any one of the scanning lines G1 to Gn shown in the display device of FIG.

0304Although the third wiring 4613 is not shown in FIGS. 9, 11, 12, and 44, As already mentioned, it may be added to FIGS. 9, 11, 12, and 44 as needed.

0305The capacitive element 4602 serves to hold the potential of the pixel electrode 4623 of the display element 4621. I am doing. Therefore, the capacitive element 4602 has the pixel electrode 4623 and the third wiring 4613. It is connected in between, but is not limited to this. To hold the potential of the pixel electrode 4623 It only needs to be placed and is connected to the second wire 4612 of another pixel (eg, the previous row). It may be connected to the counter electrode 4622 or the electrode corresponding to the counter electrode 4622. Good. Further, if the display element 4621 has a capacitive property, the capacitive element 4602 and the third arrangement Line 4613 is not always necessary.

0306As the operation method, select the first wiring 4611 and turn on the transistor 4601. Then, the video signal is input from the first wiring 4611 to the pixel electrode 4623 and the capacitive element 4602. Power. Then, the display element 4621 has a transmittance corresponding to the video signal.

0307Here, a driving method capable of improving the image quality of the display device will be described. The display device has high image quality. Overdrive drive method and common line (retention capacitance line) are controlled as drive methods that can be used. The driving method, backlight scanning, high-frequency driving method, etc. will be explained. Also, these drives The movement methods can be freely combined and implemented.

0308First, the overdrive drive will be described with reference to FIG. 47. Figure 47 (A) is a table It represents the time change of the output brightness of the indicator element with respect to the input voltage. Input represented by a broken line The time change of the output brightness of the display element with respect to the voltage 1 is as shown by the output brightness 1 also represented by the broken line. become. That is, the voltage for obtaining the desired output brightness Low is Vi, but with the input voltage. When Vi is input as it is, the response of the element is reached before the target output brightness Low is reached. It takes time corresponding to the speed.

0309Overdrive drive is a technique for increasing this response speed. Specifically, first By giving Vo, which is a voltage higher than Vi, to the device for a certain period of time, the response speed of the device is increased. , After approaching the target output brightness Low, the input voltage is returned to Vi. This In this case, the input voltage is shown in the input voltage 2 and the output brightness is shown in the output brightness 2. Output brightness 2 In the graph of, the time to reach the target brightness Low is shorter than the graph of output brightness 1. ing.

0310In addition, in FIG. 47 (A), the case where the output luminance changes positively with respect to the input voltage As described above, the present invention also includes the case where the output luminance changes negatively with respect to the input voltage.

0311See FIGS. 47 (B) and 47 (C) for circuits to achieve such drive. I will explain. First, referring to FIG. 47 (B), the input video signal Gi has an analog value (discrete value). It is a signal that takes an analog value (may be), and the output video signal Go is also a signal that takes an analog value. I will explain. The overdrive circuit shown in Fig. 47 (B) is the coding circuit 4701 and the frame. It is equipped with a memory memory 4702, a correction circuit 4703, and a DA conversion circuit 4704.

0312The input video signal Gi is first input to the coding circuit 4701 and encoded. In other words, a The nalog signal is converted to a digital signal with an appropriate number of bits. After that, the converted digital The Tal signal is input to the frame memory 4702 and the correction circuit 4703, respectively. The correction circuit 4703 has a video signal of the previous frame held in the frame memory 4702. Is also input at the same time. Then, in the correction circuit 4703, the video signal of the frame is used. , Corrected from the video signal of the previous frame according to the numerical table prepared in advance. Outputs the recorded video signal. At this time, the output switching signal is input to the correction circuit 4703 to correct it. The recorded video signal and the video signal of the frame may be switched and output. next , The corrected video signal or the video signal of the frame is input to the DA conversion circuit 4704. Is done. Then, the value according to the corrected video signal or the video signal of the frame is analyzed. The output video signal Go, which is a log signal, is output. In this way, overdrive drive Can be realized.

0313Subsequently, with reference to FIG. 47 (C), the input video signal Gi is a signal that takes a digital value, and is output. The case where the power image signal Go is also a signal that takes a digital value will be described. Shown in Figure 47 (C) The overdrive circuit includes a frame memory 4712 and a correction circuit 4713.

0314The input video signal Gi is a digital signal. First, the frame memory 4712 and the correction circuit It is entered in 4713 and, respectively. The correction circuit 4713 has a frame memory 4712. The held video signal of the previous frame is also input at the same time. And the correction circuit 4713 Is prepared in advance from the video signal of the relevant frame and the video signal of the previous frame. The corrected video signal is output according to the numerical table. At this time, the correction circuit 47 Input the output switching signal to 13 to switch between the corrected video signal and the video signal of the frame. It may be possible to output. In this way, overdrive drive can be realized.

0315The combination of numerical tables for obtaining the corrected video signal is taken in 1SF. It is the product of the number of possible gradations and the number of possible gradations in 2SF. The number of this combination is , The smaller the amount, the smaller the amount of data stored in the correction circuit 4713, which is preferable. Book In the embodiment, the subframe for displaying a bright image is in halftone until the maximum brightness is reached. The brightness of the dark image is 0, and the subframe displaying the bright image has the highest brightness. Since the brightness of the bright image is constant from to the highest gradation, the number of this combination is greatly increased. Can be made smaller.

0316In the overdrive circuit in the present invention, the input video signal Gi is an analog signal. , Including the case where the output video signal Go is a digital signal. At this time, it is shown in Fig. 47 (B). The DA conversion circuit 4704 may be omitted from the circuit. In addition, the overd in the present invention In the live circuit, the input video signal Gi is a digital signal and the output video signal Go is an analog signal. Including the case of the issue. In this case, from the circuit shown in Fig. 47 (B), the coding circuit 4701 Should be omitted.

0317Next, the drive for manipulating the potential of the common line will be described with reference to FIG. 48. Figure 48 (A ) Is a scanning line in a display device using a display element having a capacitive property such as a liquid crystal element. It is a figure showing a plurality of pixel circuits when one common line is arranged for one. The pixel circuit shown in FIG. 48 (A) has a transistor 4801, an auxiliary capacity 4802, and a display element 4. It is equipped with 803, video signal line 4804, scanning line 4805, and common line 4806.

0318Transistor 4801, auxiliary capacity 4802, display element 4803, video signal line 480 4. Scanning line 4805 and common line 4806 are each transistor 460 shown in Fig. 46. 1, Capacitive element 4602, Display element 4621, 1st wiring 4611, 2nd wiring 4612, Corresponds to the third wiring 4613.

0319The gate terminal of transistor 4801 is electrically connected to scan line 4805 and is a transistor. One of the source terminal or drain terminal of the data 4801 is electrically connected to the video signal line 4804. Continuing, the other of the source and drain terminals of transistor 4801 has an auxiliary capacitance of 48. It is electrically connected to one terminal of 02 and one terminal of display element 4803. Well The other terminal of the auxiliary capacity 4802 is electrically connected to the common wire 4806.

0320First, the pixel selected by scan line 4805 has transistor 4801 turned on. Therefore, the display element 4803 and the auxiliary capacity 4802 are passed through the video signal line 4804, respectively. The voltage corresponding to the video signal is applied to. At this time, the video signal comes into contact with the common line 4806. If the lowest gradation is displayed for all subsequent pixels, or common line 4 If the highest gradation is displayed for all pixels connected to the 806, the pixels will be displayed. It is not necessary to write a video signal via the video signal line 4804, respectively. Video signal line 480 Display by moving the potential of the common line 4806 instead of writing the video signal via 4. The voltage applied to the element 4803 can be changed.

0321Subsequently, FIG. 48 (B) shows a display device using a display element having a capacitive property such as a liquid crystal element. Multiple pixel circuits when two common lines are arranged for one scanning line It is a figure showing. The pixel circuit shown in Fig. 48 (B) has a transistor 4811 and an auxiliary capacity of 4. 812, display element 4813, video signal line 4814, scanning line 4815, first common line 48 It has 16, a second common line 4817.

0322The gate terminal of transistor 4811 is electrically connected to scan line 4815 and is a transistor. One of the source terminal or drain terminal of the data 4811 is electrically connected to the video signal line 4814. Continuing, the other of the source or drain terminals of transistor 4811 has an auxiliary capacitance of 48. It is electrically connected to one terminal of 12 and one terminal of display element 4813. Well Also, the other terminal of the auxiliary capacity 4812 is electrically connected to the first common wire 4816. To. Further, in the pixel adjacent to the pixel, the other terminal of the auxiliary capacity 4812 is the second terminal. It is electrically connected to the common line 4817 of.

0323In the pixel circuit shown in Fig. 48 (B), there are few pixels that are electrically connected to one common line. Therefore, instead of writing the video signal via the video signal line 4814, the first common line 48 By moving the potential of the 16th or second common line 4817, the electricity applied to the display element 4813 The frequency with which the pressure can be changed is significantly increased. Also, source inversion drive or dot Reverse drive is possible. Improves device reliability by source inversion drive or dot inversion drive It can be raised and flicker can be suppressed.

0324Next, the scanning backlight will be described with reference to FIG. 49. Figure 49 (A) shows the cold shade It is a figure which shows the scanning type backlight in which the electrode tube is juxtaposed. Scanning buckler shown in Fig. 49 (A) It includes a diffuser 4901 and N cold-cathode tubes 4902-1 to 4902-N. .. Place N cold-cathode tubes 4902-1 to 4902-N behind the diffuser 4901. Then, N cold-cathode tubes 4902-1 to 4902-N are scanned by changing their brightness. be able to.

0325The change in the brightness of each cold-cathode tube during scanning will be described with reference to FIG. 49 (C). First, cold shade The brightness of the electrode tube 4902-1 is changed for a certain period of time. And after that, the cold cathode fluorescent lamp 4902 The brightness of the cold-cathode tube 4902-2 arranged next to -1 is changed by the same time. This In this way, the brightness is changed in order from the cold cathode fluorescent lamp 4902-1 to 4902-N. In addition, Fig. 4 In 9 (C), the brightness that is changed for a certain period of time is smaller than the original brightness. May be greater than the brightness of. Also, scan from cold cathode tubes 4902-1 to 4902-N. However, the cold-cathode tubes 4902-N to 4902-1 may be scanned in the opposite direction.

0326The backlight brightness during the period when the brightness is low is the highest brightness of the subframe into which the dark image is inserted. It is preferable that the degree is the same as the degree. Specifically, when inserting a dark image into 1SF, 1S Maximum brightness Lmax of F, maximum brightness Lmax of 2SF when inserting a dark image into 2SF 2, is preferable.

0327An LED may be used as the light source of the scanning backlight. Scanning back in that case Clite looks like Figure 49 (B). The scanning backlight shown in FIG. 49 (B) is It is equipped with a diffuser plate 4911 and light sources 4912-1 to 4912-N in which LEDs are juxtaposed. When an LED is used as the light source for the scanning backlight, the backlight can be made thinner and lighter. There is an advantage. In addition, there is an advantage that the color reproduction range can be widened. In addition, LE The same applies to the LEDs juxtaposed in each of the light sources 4912-1 to 4912-N in which D is juxtaposed. Since it can be scanned, it can also be a point scanning type backlight. Point scanning type Then, the image quality of the moving image can be further improved.

0328Next, the high frequency drive will be described with reference to FIG. Figure 50 (A) shows the frame frequency. It is a figure when a dark image is inserted and driven when the number is 60Hz. 5001 is the frame The bright image of the frame, 5002 is the dark image of the relevant frame, 5003 is the bright image of the next frame, 500 4 is the dark image of the next frame. When driving at 60Hz, the frame rate of the video signal There is an advantage that it is easy to obtain consistency with the image processing circuit and the image processing circuit is not complicated.

0329Fig. 50 (B) is a diagram when a dark image is inserted and driven when the frame frequency is 90 Hz. Is. 5011 is the bright image of the frame, 5012 is the dark image of the frame, 5013 Is a bright image of the first image created from the frame, the next frame, and the frames one after another, 5014 Is the dark image of the first image created from the frame, the next frame, and the frames one after another, 5015 Is a bright image of the second image created from the frame, the next frame, and the frames one after another, 5016 Is a dark image of the second image created from the frame, the next frame, and the frames one after another. 9 When driving at 0Hz, it is effective without increasing the operating frequency of the peripheral drive circuit so much. As a result, there is an advantage that the image quality of moving images can be improved.

0330Figure 50 (C) shows the case where a dark image is inserted and driven when the frame frequency is 120 Hz. It is a figure. 5021 is the bright image of the frame, 5022 is the dark image of the frame, 502 3 is a bright image of the image created from the frame and the next frame, and 5024 is the frame and the next. Dark image of the image created from the frame, 5025 is the bright image of the next frame, 5026 is the next frame Dark image of the room, 5027 is a bright image of the image created from the next frame and one frame after another, 502 8 is a dark image of the image created from the next frame and the frames one after another. Drive at 120Hz In this case, the effect of improving the image quality of moving images is remarkable, and there is an advantage that almost no afterimage is felt. is there.

0331Top views and cross-sectional views of the pixels shown in FIG. 46 are shown in FIGS. 51 to 55. 51 to 55 show , The operation mode of the liquid crystal is different.

0332First, FIG. 51 shows a thin film tiger in the pixel structure of the liquid crystal display device, which is called the TN method. It is a cross-sectional view and a top view of a pixel when an engineer (TFT) is combined. Figure 51 (A) shows , FIG. 51 (B) is a top view of the pixel. Also shown in Fig. 51 (A). The cross-sectional view of the pixel corresponds to the line segment a-a'in the top view of the pixel shown in FIG. 51 (B). To. By applying the present invention to the liquid crystal display device having a pixel structure shown in FIG. 51, a liquid crystal can be inexpensively used. Display devices can be manufactured.

0333The pixel structure of the TN type liquid crystal display device will be described with reference to FIG. 51 (A). LCD table The display device has a core portion for displaying an image, which is called a liquid crystal panel. The liquid crystal panel is added Two processed substrates are bonded together with a gap of several μm, and a liquid crystal is displayed between the two substrates. It is made by injecting material. In FIG. 51 (A), the two substrates are the first substrate 5 101, and the second substrate 5116. TFT and pixel electrodes are made on the first substrate. The second substrate is made of light-shielding film 5114, color filter 5115, and fourth conductive film. Layer 5113, spacer 5117, and second alignment film 5112 may be made.

0334The present invention can be carried out without forming a TFT on the first substrate 5101. TFT When the present invention is carried out without producing the above, the number of steps is reduced, so that the manufacturing cost can be reduced. Can be done. Moreover, since the structure is simple, the yield can be improved. on the other hand, When a TFT is manufactured to carry out the present invention, a larger display device can be obtained.

0335The TFT shown in FIG. 51 is a bottom gate type TFT using an amorphous semiconductor, and is large. There is an advantage that it can be manufactured at low cost by using a substrate having an area. However, the present invention is limited to this. It is not something that will be done. The structure of the TFT that can be used is the channel in the bottom gate type TFT. There are etch type and channel protection type. Moreover, the top gate type may be used. In addition, amorphous Not only semiconductors but also polycrystalline semiconductors can be used.

0336The present invention can be carried out without forming the light-shielding film 5114 on the second substrate 5116. .. When the present invention is carried out without producing the light-shielding film 5114, the number of steps is reduced, so that the production process is reduced. The strike can be reduced. Also, since the structure is simple, improve the yield. Can be done. On the other hand, when the light-shielding film 5114 is manufactured to carry out the present invention, light leakage occurs when black is displayed. It is possible to obtain a display device with a small number of.

0337The present invention is carried out without manufacturing the color filter 5115 on the second substrate 5116. It is possible. When the present invention is carried out without producing the color filter 5115, the number of steps is increased. Since it is reduced, the manufacturing cost can be reduced. Also, because the structure is simple, the yield It is possible to improve the ball. On the other hand, the present invention was realized by producing a color filter 5115. In the case of application, a display device capable of color display can be obtained.

0338In the present invention, the spacer 5117 is not formed on the second substrate 5116, and a spherical spacer is used. It can also be carried out by spraying. A place where the present invention is carried out by spraying a spherical spacer. In that case, the number of steps is reduced, so that the manufacturing cost can be reduced. Also, the structure is simple Therefore, the yield can be improved. On the other hand, we made spacer 5117 and started this When performing light, the position of the spacer does not vary, so the distance between the two boards should be uniform. It is possible to obtain a display device with less display unevenness.

0339Next, the processing performed on the first substrate 5101 will be described. The first substrate 5101 is translucent The substrate to have is preferable, and for example, a quartz substrate, a glass substrate or a plastic substrate may be used. .. The first substrate 5101 may be a light-shielding substrate, and may be a semiconductor substrate or SOI (Silic). on On Insulator) A substrate may be used.

0340First, the first insulating film 5102 may be formed on the first substrate 5101. First insulating film 51 02 is a silicon oxide film, a silicon nitride film, a silicon nitride nitride film (SiOxNy), etc. It may be an insulating film of. Alternatively, a stack of at least two of these films combined A structural insulating film may be used. When the first insulating film 5102 is formed into a film to carry out the present invention , Prevents impurities from the substrate from affecting the semiconductor layer and changing the properties of the TFT Therefore, a highly reliable display device can be obtained. The first insulating film 51 When the present invention is carried out without forming 02, the number of steps is reduced, so that the manufacturing cost is reduced. Can be Moreover, since the structure is simple, the yield can be improved.

0341Next, the first conductive layer 5103 is formed on the first substrate 5101 or the first insulating film 5102. To be done. The first conductive layer 5103 may be formed by processing its shape. Process the shape The process is preferably as follows. First, the entire surface of the first conductive layer 5103 To form a film. At this time, a deposition apparatus such as a sputtering apparatus or a CVD apparatus may be used. .. Next, a photosensitive resist material is formed on the entire surface of the first conductive layer 5103 formed on the entire surface. To do. Next, follow the shape you want to form by photolithography or laser direct drawing. To expose the resist material to light. Next, the resist material that was exposed to light, or not exposed to light. By removing one of the resist materials by etching, the first conductivity A mask for shaping layer 5103 can be obtained. After that, the formed mask pa The desired pattern is obtained by removing the first conductive layer 5103 by etching according to the turn. The first conductive layer 5103 can be shaped. The first conductive layer 5103 There are two methods for etching, a chemical method (wet etching) and a physical method (do). Li-etching), but under the material of the first conductive layer 5103 and the first conductive layer 5103 Select as appropriate in consideration of the properties of the material in the layer. Used for the first conductive layer 5103 As the material, Mo, Ti, Al, Nd, Cr and the like are suitable. Or, these laminated structures It may be. Further, these alloys are formed into a single layer or a laminated structure, and the first conductive layer 51 It may be formed as 03.

0342Next, the second insulating film 5104 is formed. At this time, it is a sputtering device or a CVD device. Any film forming apparatus may be used. The material used for the second insulating film 5104 is a thermal oxide film. , Silicon oxide film, silicon nitride film, silicon nitride film and the like are suitable. Or , These may be a laminated structure. The second portion of the portion in contact with the first semiconductor layer 5105. It is particularly preferable that the insulating film 5104 is a silicon oxide film. It's Oxidized Siri This is because the trap level at the interface with the semiconductor layer 5105 is reduced when the film is used. .. When the first conductive layer 5103 is formed of Mo, it is in contact with the first conductive layer 5103. The second insulating film 5104 of the portion is preferably a silicon nitride film. That is, the silicon nitride film is M This is because it does not oxidize o.

0343Next, the first semiconductor layer 5105 is formed. After that, the second semiconductor layer 5106 is continuously formed. It is preferable to form. The first semiconductor layer 5105 and the second semiconductor layer 5106 May be formed by processing the shape. The method of processing the shape is the photolithography described above. It is preferable to use a method such as the i method. The material used for the first semiconductor layer 5105 is , Silicon or silicon germanium (SiGe) and the like are suitable. Also the second half The material used for the conductor layer 5106 is preferably silicon or the like containing phosphorus or the like.

0344Next, the second conductive layer 5107 is formed. At this time, the sputtering method or the printing method is used. Is preferable. Even if the material used for the second conductive layer 5107 has transparency, It may have reflectivity. If it is transparent, for example, indium oxide and tin oxide Indium tin oxide (ITO) film mixed with indium tin oxide (ITO) and silica oxide Indium tin oxide silicon oxide (ITSO) film mixed with element, zinc oxide mixed with indium oxide Indium zinc oxide (IZO) film, zinc oxide film, or tin oxide film can be used. Wear. IZO is a mixture of ITO and 2 to 20 wt% zinc oxide (ZnO). A transparent conductive material formed by sputtering using a gett. On the other hand, reflectivity If it has, Ti, Mo, Ta, Cr, W, Al and the like can be used. Also, T Two-layer structure in which i, Mo, Ta, Cr, W and Al are laminated, Al is Ti, Mo, Ta, Cr A three-layer laminated structure sandwiched between metals such as W and W may be used. The second conductive layer 5107 has a shape. The shape may be processed to form. The method of processing the shape is the above-mentioned photolithography method or the like. Is preferable. The etching method is dry etching. Is preferable. Dry etching is ECR (Electron Cycrotron R) esonance) and ICP (Inductive Coupled Plazma) It may be performed by a dry etching apparatus using any high-density plasma source.

0345Next, the channel region of the TFT is formed. At this time, the second conductive layer 5107 is used as a mask. The second semiconductor layer 5106 may be etched. By doing this, the mask sheet Since the number can be reduced, the manufacturing cost can be reduced. A second with conductivity By etching the semiconductor layer 5106, the removed part is the channel region of the TFT. Will be. It should be noted that the first semiconductor layer 5105 and the second semiconductor layer 5106 are not formed in succession. After the formation of the first semiconductor layer 5105, a stopper is placed on the part that becomes the channel region of the TFT. The film may be formed and patterned to form a second semiconductor layer 5106. .. By doing so, the second conductive layer 5107 is not used as a mask, and the TFT channel Since the area can be formed, there is an advantage that the degree of freedom of the layout pattern is increased. .. Also, when the second semiconductor layer 5106 is etched, the first semiconductor layer 5105 is etched. Since it does not squeeze, it ensures that the TFT channel area does not cause etching defects. Has the advantage of being able to form.

0346Next, a third insulating film 5108 is formed. The third insulating film 5108 has transparency. Is preferable. The material used for the third insulating film 5108 is an inorganic material (silico oxide). , Silicon nitride, silicon oxide, etc.) or organic compound materials with low dielectric constant (photosensitivity) Alternatively, a non-photosensitive organic resin material) or the like is suitable. Also, using a material containing siloxane May be good. The skeleton structure of siloxane is composed of the bond between silicon (Si) and oxygen (O). It is a material. Organic groups containing at least hydrogen as substituents (eg alkyl groups, aromatic coals) (Hydrogen) is used. A fluoro group may be used as the substituent. Or as a substituent An organic group containing at least hydrogen and a fluoro group may be used. The third insulating film 5108 A laminated structure may be used. The third insulating film 5108 may be formed by processing its shape. form The method for processing the shape is preferably a method such as the photolithography method described above. At this time, by etching the second insulating film 5104 at the same time, the third insulating film 5108 Not only that, a contact hole with the first conductive layer 5103 can be formed. Na It is preferable that the surface of the third insulating film 5108 is as flat as possible. that is, This is because the orientation of the liquid crystal molecules is affected by the unevenness of the surface in contact with the liquid crystal.

0347Next, the third conductive layer 5109 is formed. At this time, the sputtering method or the printing method is used. Is preferable. The material used for the third conductive layer 5109 is the second conductive layer 5107. Similarly, it may be transparent or may be reflective. The third conductive layer 510 The material that can be used as 9 may be the same as that of the second conductive layer 5107. Also, the third conductive layer The 5109 may be formed by processing the shape. The method of processing the shape is the second conductive layer 51. It may be the same as 07.

0348Next, the first alignment film 5110 is formed. The alignment film 5110 has a polymer such as polyimide. Membranes can be used. After forming the first alignment film 5110, the orientation of the liquid crystal molecules is controlled. In order to do so, rubbing may be performed. Rubbing is done by rubbing the alignment film with a cloth , This is the process of making streaks on the alignment film. By rubbing, the alignment film is oriented. Can have.

0349The first substrate 5101 manufactured as described above, the light-shielding film 5114, and the color filter 511. 5. A fourth conductive layer 5113, a spacer 5117, and a second alignment film 5112 were prepared. The second substrate 5116 is bonded together with a gap of several μm by the sealing material, and two sheets are attached. A liquid crystal panel can be manufactured by injecting a liquid crystal material between the substrates. It should be noted that it is shown in Fig. 51. In the TN liquid crystal panel, the fourth conductive layer 5113 is the second substrate 5116. It may be made on the entire surface.

0350Next, the features of the pixel structure of the TN type liquid crystal panel shown in FIG. 51 will be described. Figure 51 The liquid crystal molecule 5118 shown in (A) is an elongated molecule having a major axis and a minor axis. Liquid crystal molecule 5 In order to show the direction of 118, it is represented by its length in FIG. 51 (A). Su That is, the long-represented liquid crystal molecule 5118 has a long axis oriented parallel to the paper surface and is short. As for the expressed liquid crystal molecule 5118, the direction of its long axis is closer to the normal direction of the paper surface. To do. That is, the liquid crystal molecule 5118 shown in FIG. 51 (A) is close to the first substrate 5101. The orientation of the long axis is 90 degrees different between that and the one close to the second board 5116. The orientation of the long axis of the liquid crystal molecule 5118 located in the middle of them seems to connect them smoothly. It will be oriented. That is, the liquid crystal molecule 5118 shown in FIG. 51 (A) is the first substrate 5101. The orientation is such that it is twisted 90 degrees between and the second substrate 5116.

0351Next, with reference to FIG. 51 (B), an image when the present invention is applied to a TN type liquid crystal display device. An example of a plain layout will be described. Image of TN liquid crystal display device to which the present invention is applied The elements are scanning line 5121, video signal line 5122, capacitance line 5123, and TFT 5124. , The pixel electrode 5125 and the pixel capacity 5126 may be provided.

0352The scan line 5121 is electrically connected to the gate terminal of the TFT 5124, so that it is the first conductor. It is preferably composed of layer 5103.

0353The video signal line 5122 is electrically connected to the source terminal or drain terminal of the TFT 5124. Therefore, it is preferable that it is composed of the second conductive layer 5107. Also, scanning line 51 Since 21 and the video signal line 5122 are arranged in a matrix, at least different layers It is preferably formed of a conductive layer.

0354The capacitance line 5123 forms a pixel capacitance 5126 by being arranged parallel to the pixel electrode 5125. It is a wiring for forming, and it is preferable that it is composed of the first conductive layer 5103. It should be noted that , As shown in FIG. 51 (B), the capacitance line 5123 is a video signal along the video signal line 5122. It may be extended so as to surround the line 5122. By doing this, the video signal line 5122 A phenomenon in which the potential of the electrode that should hold the potential changes with the change in the potential of Loss talk can be reduced. In addition, the cross capacitance with the video signal line 5122 is reduced. Therefore, as shown in FIG. 51 (B), the first semiconductor layer 5105 is connected to the capacitance line 5123 and the video communication. It may be provided in the intersection area of line 5122.

0355TFT5124 is a switch that conducts the video signal line 5122 and the pixel electrode 5125. Operate. As shown in FIG. 51 (B), the source area or dray of the TFT 5124 Even if one of the regions is arranged so as to surround the other of the source region and the drain region. Good. By doing this, a large channel width can be obtained in a small area, and switching can be obtained. You can increase your ability. As shown in Fig. 51 (B), the TFT 5124 The terminal may be arranged so as to surround the first semiconductor layer 5105.

0356The pixel electrode 5125 is electrically connected to either the source terminal or the drain terminal of the TFT 5124. Be connected. The pixel electrode 5125 liquids the signal voltage transmitted by the video signal line 5122. It is an electrode for giving to a crystal element. In addition, a capacitance line 5123 and a pixel capacitance 5126 are formed. May be good. By doing so, the role of holding the signal voltage transmitted by the video signal line 5122 You can also have a percentage. The pixel electrode 5125 is rectangular as shown in FIG. 51 (B). It may be. By doing this, the aperture ratio of the pixels can be increased, so the liquid crystal table The efficiency of the indicator is improved. Also, when the pixel electrode 5125 is made of a transparent material. Can obtain a transmissive liquid crystal display device. The transmissive liquid crystal display device has high color reproducibility. It is possible to display high-quality images with high image quality. It also reflects the pixel electrode 5125. When made of a material having a property, a reflective liquid crystal display device can be obtained. Reflective liquid The crystal display device has high visibility in a bright environment such as outdoors, and the backlight is not used. Therefore, the power consumption can be reduced very much. The pixel electrode 5125 is transparent. Combine the advantages of both when created using both sexual and reflective materials It is possible to obtain a semi-transmissive liquid crystal display device having. The pixel electrode 5125 is reflective. The surface of the pixel electrode 5125 may have irregularities when it is made of a material having the above. This As a result, the reflected light is diffusely reflected, which has the advantage of reducing the angle dependence of the intensity distribution of the reflected light. is there. In other words, it is possible to obtain a reflective liquid crystal display device with a constant brightness regardless of the angle. Can be done.

0357Next, referring to FIG. 52, the liquid crystal in VA (Vertical Alignment) mode. The case where the present invention is applied to the display device will be described. FIG. 52 shows a liquid crystal display device in VA mode. By using the orientation control protrusions in the pixel structure, the liquid crystal molecules can be controlled to have various orientations. So-called MVA (Multi-domain Vertic) with a large viewing angle In the cross-sectional view and top view of the pixels when the present invention is applied to the al Alignment) method. is there. FIG. 52 (A) is a cross-sectional view of the pixel, and FIG. 52 (B) is a top view of the pixel. Well The cross-sectional view of the pixel shown in FIG. 52 (A) is a line segment in the top view of the pixel shown in FIG. 52 (B). It corresponds to a-a'. The present invention is applied to a liquid crystal display device having a pixel structure shown in FIG. A liquid crystal display device having a large viewing angle, a fast response speed, and a high contrast can be obtained. be able to.

0358The pixel structure of the MVA type liquid crystal display device will be described with reference to FIG. 52 (A). liquid crystal The display device has a core portion for displaying an image, which is called a liquid crystal panel. The liquid crystal panel Two processed substrates are bonded together with a gap of several μm, and liquid is applied between the two substrates. It is made by injecting a crystal material. In FIG. 52 (A), the two substrates are the first substrate. 5201 and the second substrate 5216. TFT and pixel electrodes are placed on the first substrate. Also, on the second substrate, a light-shielding film 5214, a color filter 5215, and a fourth guide Electric layer 5213, spacer 5217, second alignment film 5212, and orientation control protrusion 521 9 may be made.

0359The present invention can be carried out without forming a TFT on the first substrate 5201. TFT When the present invention is carried out without producing the above, the number of steps is reduced, so that the manufacturing cost can be reduced. Can be done. Moreover, since the structure is simple, the yield can be improved. on the other hand, When a TFT is manufactured to carry out the present invention, a larger display device can be obtained.

0360The TFT shown in FIG. 52 is a bottom gate type TFT using an amorphous semiconductor, and is large. There is an advantage that it can be manufactured at low cost by using a substrate having an area. However, the present invention is limited to this. It is not something that will be done. The structure of the TFT that can be used is the channel in the bottom gate type TFT. There are etch type and channel protection type. Moreover, the top gate type may be used. In addition, amorphous Not only semiconductors but also polycrystalline semiconductors can be used.

0361The present invention can be carried out without forming the light-shielding film 5214 on the second substrate 5216. .. When the present invention is carried out without producing the light-shielding film 5214, the number of steps is reduced, so that the production process is reduced. The strike can be reduced. Also, since the structure is simple, improve the yield. Can be done. On the other hand, when the light-shielding film 5214 is manufactured to carry out the present invention, light leakage occurs when black is displayed. It is possible to obtain a display device with a small number of.

0362The present invention is carried out without forming the color filter 5215 on the second substrate 5216. It is possible. When the present invention is carried out without producing the color filter 5215, the number of steps is increased. Since it is reduced, the manufacturing cost can be reduced. Also, because the structure is simple, the yield It is possible to improve the ball. On the other hand, the present invention was realized by producing a color filter 5215. In the case of application, a display device capable of color display can be obtained.

0363In the present invention, the spacer 5217 is not formed on the second substrate 5216, but a spherical spacer is used. It can also be carried out by spraying. A place where the present invention is carried out by spraying a spherical spacer. In that case, the number of steps is reduced, so that the manufacturing cost can be reduced. Also, the structure is simple Therefore, the yield can be improved. On the other hand, we made spacer 5217 and started this When performing light, the position of the spacer does not vary, so the distance between the two boards should be uniform. It is possible to obtain a display device with less display unevenness.

0364Next, for the processing performed on the first substrate 5201, the method described with reference to FIG. 51 may be used. Therefore, it is omitted. Here, the first substrate 5201, the first insulating film 5202, and the first conductive layer 5 203, second insulating film 5204, first semiconductor layer 5205, second semiconductor layer 5206, first 2 conductive layer 5207, 3rd insulating film 5208, 3rd conductive layer 5209, 1st alignment film 52 10 are the first substrate 5101, the first insulating film 5102, and the first in FIG. 51, respectively. Conductive layer 5103, second insulating film 5104, first semiconductor layer 5105, second semiconductor layer 51 06, 2nd conductive layer 5107, 3rd insulating film 5108, 3rd conductive layer 5109, 1st arrangement Corresponds to the capsular membrane 5110. Although not shown, the orientation control protrusions are also formed on the first substrate side. May be provided. By doing so, the orientation of the liquid crystal molecules can be controlled more reliably. Further, the first alignment film 5210 and the second alignment film 5212 may be vertical alignment films. like this By doing so, the liquid crystal molecules 5218 can be oriented vertically.

0365The first substrate 5201 prepared as described above, the light-shielding film 5214, and the color filter 521. 5. A fourth conductive layer 5213, a spacer 5217, and a second alignment film 5212 were prepared. The second substrate 5216 is bonded together with a gap of several μm by the sealing material, and two sheets are attached. A liquid crystal panel can be manufactured by injecting a liquid crystal material between the substrates. It is shown in Fig. 52. In the MVA type liquid crystal panel, the fourth conductive layer 5213 is the second substrate 5216. It may be made on the entire surface of. In addition, the protrusion for orientation control is in contact with the fourth conductive layer 5213. 5219 may be made. The shape of the orientation control protrusion 5219 is not limited, but it slides. It is preferable that the shape has a curved surface. By doing this, the liquid crystal molecules in close proximity 521 Since the orientation of 8 is very close, poor orientation is reduced. In addition, the second alignment film 5212 , The alignment film is also defective due to the step breakage caused by the alignment control protrusion 5219. Can be reduced.

0366Next, the features of the pixel structure of the MVA type liquid crystal panel shown in FIG. 52 will be described. Figure 5 The liquid crystal molecule 5218 shown in 2 (A) is an elongated molecule having a major axis and a minor axis. Liquid crystal In order to show the orientation of the child 5218, in (A) of FIG. 52, it is expressed by its length. To. That is, the long-represented liquid crystal molecule 5218 has its long axis oriented parallel to the paper surface. , The shorter the liquid crystal molecule 5218, the closer its long axis is to the normal direction of the paper. Suppose you are. That is, the liquid crystal molecules 5218 shown in FIG. 52 (A) are arranged in the orientation of their long axes. It is oriented so as to face the normal direction of the facing film. Therefore, the part with the orientation control protrusion 5219 The liquid crystal molecule 5218 is oriented radially around the orientation control protrusion 5219. This state A liquid crystal display device having a large viewing angle can be obtained.

0367Next, referring to (B) of FIG. 52, when the present invention is applied to an MVA type liquid crystal display device. , An example of pixel layout will be described. MVA type liquid crystal display device to which the present invention is applied The pixels are the scanning line 5221, the video signal line 5222, the capacitance line 5223, and the TFT 52. 24, a pixel electrode 5225, a pixel capacity 5226, and an orientation control protrusion 5219. You may be.

0368Scan line 5221 is electrically connected to the gate terminal of TFT 5224, so that it is the first conductor. It is preferably composed of layer 5203.

0369The video signal line 5222 is electrically connected to the source terminal or drain terminal of the TFT 5224. Therefore, it is preferable that it is composed of the second conductive layer 5207. Also, scanning line 52 21 and the video signal line 5222 are arranged in a matrix, so at least they are in different layers. It is preferably formed of a conductive layer.

0370The capacitance line 5223 forms a pixel capacitance 5226 by being arranged parallel to the pixel electrode 5225. It is a wiring for forming, and it is preferable that it is composed of a first conductive layer 5203. It should be noted that , As shown in FIG. 52 (B), the capacitance line 5223 is a video signal along the video signal line 5222. It may be extended so as to surround line 5222. By doing this, the video signal line 5222 A phenomenon in which the potential of the electrode that should hold the potential changes with the change in the potential of Loss talk can be reduced. In addition, the cross capacitance with the video signal line 5222 is reduced. Therefore, as shown in FIG. 52 (B), the first semiconductor layer 5205 is connected to the capacitance line 5223 and the video communication. It may be provided at the intersection area of line 5222.

0371TFT5224 is a switch that conducts the video signal line 5222 and the pixel electrode 5225. Operate. As shown in FIG. 52 (B), the source area or dray of TFT5224 Even if one of the regions is arranged so as to surround the other of the source region and the drain region. Good. By doing this, a large channel width can be obtained in a small area, and switching can be obtained. You can increase your ability. As shown in Fig. 52 (B), the TFT 5224 The terminal may be arranged so as to surround the first semiconductor layer 5205.

0372The pixel electrode 5225 is electrically connected to either the source terminal or the drain terminal of the TFT 5224. Be connected. Pixel electrode 5225 liquids the signal voltage transmitted by the video signal line 5222. It is an electrode for giving to a crystal element. In addition, a capacitance line 5223 and a pixel capacitance 5226 are formed. May be good. By doing so, the role of holding the signal voltage transmitted by the video signal line 5222 You can also have a percentage. The pixel electrode 5225 is rectangular as shown in FIG. 52 (B). It may be. By doing this, the aperture ratio of the pixels can be increased, so the liquid crystal table The efficiency of the indicator is improved. Also, when the pixel electrode 5225 is made of a transparent material. Can obtain a transmissive liquid crystal display device. The transmissive liquid crystal display device has high color reproducibility. It is possible to display high-quality images with high image quality. It also reflects the pixel electrode 5225. When made of a material having a property, a reflective liquid crystal display device can be obtained. Reflective liquid The crystal display device has high visibility in a bright environment such as outdoors, and the backlight is not used. Therefore, the power consumption can be reduced very much. The pixel electrode 5225 is transparent. Combine the advantages of both when created using both sexual and reflective materials It is possible to obtain a semi-transmissive liquid crystal display device having. The pixel electrode 5225 is reflective. The surface of the pixel electrode 5225 may have irregularities when it is made of a material having the above. This As a result, the reflected light is diffusely reflected, which has the advantage of reducing the angle dependence of the intensity distribution of the reflected light. is there. In other words, it is possible to obtain a reflective liquid crystal display device with a constant brightness regardless of the angle. Can be done.

0373Next, referring to FIG. 53, the liquid crystal in VA (Vertical Alignment) mode. Another example when the present invention is applied to the display device will be described. Figure 53 shows the liquid crystal in VA mode. Of the pixel structure of the display device, the liquid crystal component is formed by applying pattern processing to the fourth conductive layer 5313. The so-called PVA (Pater), in which the child is controlled to have various orientations and the viewing angle is increased. Image when the present invention is applied to the ned Vertical Alignment) method It is a cross-sectional view and a top view of the element. FIG. 53 (A) is a cross-sectional view of the pixel, and FIG. 53 (B) is an image. It is a top view of the element. The cross-sectional view of the pixels shown in FIG. 53 (A) is the pixels shown in FIG. 53 (B). Corresponds to the line segment a-a'in the top view of. For the liquid crystal display device with the pixel structure shown in FIG. 53 By applying the present invention, the viewing angle is large, the response speed is fast, and the contrast is large. A liquid crystal display device can be obtained.

0374The pixel structure of the PVA type liquid crystal display device will be described with reference to FIG. 53 (A). liquid crystal The display device has a core portion for displaying an image, which is called a liquid crystal panel. The liquid crystal panel Two processed substrates are bonded together with a gap of several μm, and liquid is applied between the two substrates. It is made by injecting a crystal material. In FIG. 53 (A), the two substrates are the first substrate. 5301 and the second substrate 5316. TFT and pixel electrodes are placed on the first substrate. Also, on the second substrate, a light-shielding film 5314, a color filter 5315, and a fourth guide The electric layer 5313, the spacer 5317, and the second alignment film 5312 may be prepared.

0375The present invention can be carried out without forming a TFT on the first substrate 5301. TFT When the present invention is carried out without producing the above, the number of steps is reduced, so that the manufacturing cost can be reduced. Can be done. Moreover, since the structure is simple, the yield can be improved. on the other hand, When a TFT is manufactured to carry out the present invention, a larger display device can be obtained.

0376The TFT shown in FIG. 53 is a bottom gate type TFT using an amorphous semiconductor, and is large. There is an advantage that it can be manufactured at low cost by using a substrate having an area. However, the present invention is limited to this. It is not something that will be done. The structure of the TFT that can be used is the channel in the bottom gate type TFT. There are etch type and channel protection type. Moreover, the top gate type may be used. In addition, amorphous Not only semiconductors but also polycrystalline semiconductors can be used.

0377The present invention can be carried out without forming the light-shielding film 5314 on the second substrate 5316. .. When the present invention is carried out without producing the light-shielding film 5314, the number of steps is reduced, so that the production process is reduced. The strike can be reduced. Also, since the structure is simple, improve the yield. Can be done. On the other hand, when the light-shielding film 5314 is manufactured to carry out the present invention, light leakage occurs when black is displayed. It is possible to obtain a display device with a small number of.

0378The present invention is carried out without forming the color filter 5315 on the second substrate 5316. It is possible. When the present invention is carried out without producing the color filter 5315, the number of steps is increased. Since it is reduced, the manufacturing cost can be reduced. Also, because the structure is simple, the yield It is possible to improve the ball. On the other hand, the present invention was realized by producing a color filter 5315. In the case of application, a display device capable of color display can be obtained.

0379In the present invention, the spacer 5317 is not formed on the second substrate 5316, and a spherical spacer is used. It can also be carried out by spraying. A place where the present invention is carried out by spraying a spherical spacer. In that case, the number of steps is reduced, so that the manufacturing cost can be reduced. Also, the structure is simple Therefore, the yield can be improved. On the other hand, we made spacer 5317 and started this When performing light, the position of the spacer does not vary, so the distance between the two boards should be uniform. It is possible to obtain a display device with less display unevenness.

0380Next, for the processing performed on the first substrate 5301, the method described with reference to FIG. 51 may be used. Therefore, it is omitted. Here, the first substrate 5301, the first insulating film 5302, and the first conductive layer 5 303, second insulating film 5304, first semiconductor layer 5305, second semiconductor layer 5306, first 2 conductive layer 5307, 3rd insulating film 5308, 3rd conductive layer 5309, 1st alignment film 53 10 are the first substrate 5101, the first insulating film 5102, and the first in FIG. 51, respectively. Conductive layer 5103, second insulating film 5104, first semiconductor layer 5105, second semiconductor layer 51 06, 2nd conductive layer 5107, 3rd insulating film 5108, 3rd conductive layer 5109, 1st arrangement Corresponds to the capsular membrane 5110. It should be noted that the third conductive layer 5309 on the first substrate 5301 side is covered with electricity. A very notched portion may be provided. By doing this, the orientation of the liquid crystal molecules can be controlled more reliably. Can be done. The first alignment film 5310 and the second alignment film 5312 are vertical alignment films. May be good. By doing so, the liquid crystal molecule 5318 can be vertically oriented.

0381The first substrate 5301 prepared as described above, the light-shielding film 5314, and the color filter 531 5. A fourth conductive layer 5313, a spacer 5317, and a second alignment film 5312 were prepared. The second substrate 5316 is bonded together with a gap of several μm by the sealing material, and two sheets are attached. A liquid crystal panel can be manufactured by injecting a liquid crystal material between the substrates. It is shown in Fig. 53. In the PVA type liquid crystal panel, the fourth conductive layer 5313 is patterned. The electrode cutout portion 5319 may be prepared. In addition, in the shape of the electrode notch 5319 Although there is no limitation, it is preferable that the shape is a combination of a plurality of rectangles having different orientations. .. By doing so, multiple regions with different orientations can be formed, so a liquid crystal display with a large viewing angle can be formed. You can get the device. In addition, the boundary between the electrode notch 5319 and the fourth conductive layer 5313. The shape of the fourth conductive layer 5313 in the above is preferably a smooth curve. This As a result, the orientation of the adjacent liquid crystal molecules 5318 becomes very close, and the orientation failure is reduced. To. In addition, the second alignment film 5312 is cut off by the electrode notch 5319. It is also possible to reduce defects in the alignment film due to the storage.

0382Next, the features of the pixel structure of the PVA type liquid crystal panel shown in FIG. 53 will be described. Figure 5 The liquid crystal molecule 5318 shown in 3 (A) is an elongated molecule having a major axis and a minor axis. Liquid crystal molecules In order to show the direction of 5318, it is represented by its length in FIG. 53 (A). That is, the long-represented liquid crystal molecule 5318 has a long axis oriented parallel to the paper surface and is short. The more the liquid crystal molecule 5318 is expressed, the closer the direction of its long axis is to the normal direction of the paper surface. And. That is, the liquid crystal molecule 5318 shown in FIG. 53 (A) has an orientation film whose long axis is oriented. It is oriented so that it faces the normal direction. Therefore, the liquid crystal in the part where the electrode notch 5319 is located. The molecule 5318 is released around the boundary between the electrode notch 5319 and the fourth conductive layer 5313. It is oriented in a radial pattern. In this state, a liquid crystal display device with a large viewing angle can be obtained. Can be done.

0383Next, with reference to FIG. 53 (B), when the present invention is applied to a PVA type liquid crystal display device, An example of the pixel layout will be described. PVA type liquid crystal display device to which the present invention is applied The pixels of are the scanning line 5321, the video signal line 5322, the capacitance line 5323, and the TFT 532. 4, a pixel electrode 5325, a pixel capacity 5326, and an electrode notch 5319 are provided. You may.

0384The scan line 5321 is electrically connected to the gate terminal of the TFT 5324, so that it is the first conductor. It is preferably composed of layer 5303.

0385The video signal line 5322 is electrically connected to the source terminal or drain terminal of the TFT 5324. Therefore, it is preferable that it is composed of the second conductive layer 5307. Also, scanning line 53 21 and the video signal line 5322 are arranged in a matrix, so at least they are in different layers. It is preferably formed of a conductive layer.

0386The capacitance line 5323 forms a pixel capacitance 5326 by being arranged parallel to the pixel electrode 5325. It is a wiring for forming, and it is preferable that it is composed of a first conductive layer 5303. It should be noted that , As shown in FIG. 53 (B), the capacitance line 5323 is a video signal along the video signal line 5322. It may be extended so as to surround the line 5322. By doing this, the video signal line 5322 A phenomenon in which the potential of the electrode that should hold the potential changes with the change in the potential of Loss talk can be reduced. In addition, the cross capacitance with the video signal line 5322 is reduced. Therefore, as shown in (B) of FIG. 53, the first semiconductor layer 5305 is connected to the capacitance line 5323 and the image. It may be provided in the intersection area of the signal line 5322.

0387TFT5324 is a switch that conducts the video signal line 5322 and the pixel electrode 5325. Operate. As shown in Fig. 53 (B), the source area or dray of TFT5324 Even if one of the regions is arranged so as to surround the other of the source region and the drain region. Good. By doing this, a large channel width can be obtained in a small area, and switching can be obtained. You can increase your ability. As shown in FIG. 53 (B), the TFT 5324 The gate terminal may be arranged so as to surround the first semiconductor layer 5305.

0388The pixel electrode 5325 is electrically connected to either the source terminal or the drain terminal of the TFT 5324. Be connected. The pixel electrode 5325 liquids the signal voltage transmitted by the video signal line 5322. It is an electrode for giving to a crystal element. In addition, the capacitance line 5323 and the pixel capacitance 5326 are formed. May be good. By doing so, the role of holding the signal voltage transmitted by the video signal line 5322 You can also have a percentage. As shown in FIG. 53 (B), the pixel electrode 5325 has a fourth pixel electrode 5325. Electrode notch 53 according to the shape of the electrode notch 5319 provided in the conductive layer 5313 It is preferable to form a portion in which the pixel electrode 5325 is cut out in a portion without 19. like this By doing so, it is possible to form a plurality of regions in which the orientation of the liquid crystal molecules 5318 is different. A liquid crystal display device having a large viewing angle can be obtained. In addition, the pixel electrode 5325 is made transparent. A transmissive liquid crystal display device can be obtained when it is made of a material having a shaving. Transmissive liquid crystal table The display device can display an image having high color reproducibility and high image quality. Also, the picture When the elementary electrode 5325 is made of a reflective material, a reflective liquid crystal display device can be obtained. Can be done. The reflective liquid crystal display device has high visibility in a bright environment such as outdoors. Moreover, since no backlight is required, the power consumption can be extremely reduced. In addition, the picture A field in which the elementary electrode 5325 is created using both a transparent material and a reflective material. In that case, a semi-transmissive liquid crystal display device having both advantages can be obtained. In addition, pixel When the electrode 5325 is made of a reflective material, the surface of the pixel electrode 5325 has irregularities. You may have it. By doing this, the reflected light is diffusely reflected, so it depends on the angle of the intensity distribution of the reflected light. It has the advantage of being less viable. In other words, it is a reflective type with constant brightness regardless of the angle. Liquid crystal display device can be obtained.

0389Next, a case where the present invention is applied to a horizontal electric field type liquid crystal display device will be described with reference to FIG. 54. To. In FIG. 54, switching is performed so that the orientation of the liquid crystal molecules is always horizontal with respect to the substrate. Therefore, among the pixel structures of the liquid crystal display device of the type that applies an electric field in the horizontal direction, the pixel electrode 542 A method of applying an electric field in the lateral direction by applying a comb-shaped pattern to 5 and the common electrode 5423. , The present invention is applied to the so-called IPS (In-Plane-Switching) method. It is a cross-sectional view and a top view of a pixel in the case. FIG. 54 (A) is a cross-sectional view of the pixel, which is shown in FIG. 54 (A). B) is a top view of the pixel. The cross-sectional view of the pixel shown in FIG. 54 (A) is shown in FIG. 54 (B). ) Corresponds to the line segment a-a'in the top view of the pixel. Liquid with pixel structure shown in Fig. 54 By applying the present invention to a crystal display device, in principle, the viewing angle is large and the response speed is gradation. A liquid crystal display device having a small dependence can be obtained.

0390The pixel structure of the IPS liquid crystal display device will be described with reference to FIG. 54 (A). liquid crystal The display device has a core portion for displaying an image, which is called a liquid crystal panel. The liquid crystal panel Two processed substrates are bonded together with a gap of several μm, and liquid is applied between the two substrates. It is made by injecting a crystal material. In FIG. 54 (A), the two substrates are the first substrate. 5401 and a second substrate 5416. TFT and pixel electrodes are placed on the first substrate. Also, on the second substrate, a light-shielding film 5414, a color filter 5415, and a spacer 5417 and a second alignment film 5412 may be prepared.

0391The present invention can be carried out without forming a TFT on the first substrate 5401. TFT When the present invention is carried out without producing the above, the number of steps is reduced, so that the manufacturing cost can be reduced. Can be done. Moreover, since the structure is simple, the yield can be improved. on the other hand, When a TFT is manufactured to carry out the present invention, a larger display device can be obtained.

0392The TFT shown in FIG. 54 is a bottom gate type TFT using an amorphous semiconductor, and is large. There is an advantage that it can be manufactured at low cost by using a substrate having an area. However, the present invention is limited to this. It is not something that will be done. The structure of the TFT that can be used is the channel in the bottom gate type TFT. There are etch type and channel protection type. Moreover, the top gate type may be used. In addition, amorphous Not only semiconductors but also polycrystalline semiconductors can be used.

0393The present invention can be carried out without forming the light-shielding film 5414 on the second substrate 5416. .. When the present invention is carried out without producing the light-shielding film 5414, the number of steps is reduced, so that the production process is reduced. The strike can be reduced. Also, since the structure is simple, improve the yield. Can be done. On the other hand, when the light-shielding film 5414 is manufactured to carry out the present invention, light leakage occurs when black is displayed. It is possible to obtain a display device with a small number of.

0394The present invention is carried out without forming the color filter 5415 on the second substrate 5416. It is possible. When the present invention is carried out without producing the color filter 5415, the number of steps is increased. Since it is reduced, the manufacturing cost can be reduced. Also, because the structure is simple, the yield It is possible to improve the ball. On the other hand, the present invention was realized by producing a color filter 5415. In the case of application, a display device capable of color display can be obtained.

0395In the present invention, the spacer 5417 is not formed on the second substrate 5416, but a spherical spacer is used. It can also be carried out by spraying. A place where the present invention is carried out by spraying a spherical spacer. In that case, the number of steps is reduced, so that the manufacturing cost can be reduced. Also, the structure is simple Therefore, the yield can be improved. On the other hand, we made spacer 5417 and started this When performing light, the position of the spacer does not vary, so the distance between the two boards should be uniform. It is possible to obtain a display device with less display unevenness.

0396Next, for the processing performed on the first substrate 5401, the method described with reference to FIG. 51 may be used. Therefore, it is omitted. Here, the first substrate 5401, the first insulating film 5402, and the first conductive layer 5 403, second insulating film 5404, first semiconductor layer 5405, second semiconductor layer 5406, first 2 conductive layer 5407, 3rd insulating film 5408, 3rd conductive layer 5409, 1st alignment film 54 10 are the first substrate 5101, the first insulating film 5102, and the first in FIG. 51, respectively. Conductive layer 5103, second insulating film 5104, first semiconductor layer 5105, second semiconductor layer 51 06, 2nd conductive layer 5107, 3rd insulating film 5108, 3rd conductive layer 5109, 1st arrangement Corresponds to the capsular membrane 5110. It should be noted that a pattern is applied to the third conductive layer 5409 on the first substrate 5401 side. It may be processed into two comb-shaped shapes that mesh with each other. Also one The comb-shaped electrode is electrically connected to either the source terminal or the dray terminal of the TFT 5424. The other comb-shaped electrode may be electrically connected to the common electrode 5423. This As a result, a lateral electric field can be effectively applied to the liquid crystal molecules 5418.

0397The first substrate 5401 manufactured as described above, the light-shielding film 5414, and the color filter 541 5, the spacer 5417, and the second substrate 5416 on which the second alignment film 5412 was prepared, The sealing material is used to create a gap of several μm, and the liquid crystal material is poured between the two substrates. By inserting it, a liquid crystal panel can be manufactured. Although not shown, on the second substrate 5416 side , A conductive layer may be formed. By forming a conductive layer on the second substrate 5416 side, from the outside It is possible to reduce the influence of electromagnetic noise.

0398Next, the features of the pixel structure of the IPS liquid crystal panel shown in FIG. 54 will be described. Figure 5 The liquid crystal molecule 5418 shown in 4 (A) is an elongated molecule having a major axis and a minor axis. Liquid crystal molecules In order to show the direction of 5418, in FIG. 54 (A), it is expressed by its length. That is, the long-represented liquid crystal molecule 5418 has a long axis oriented parallel to the paper surface and is short. The more the liquid crystal molecule 5418 is expressed, the closer the direction of its long axis is to the normal direction of the paper surface. And. That is, the liquid crystal molecule 5418 shown in FIG. 54 (A) is always oriented in the long axis of the substrate. It is oriented so that it faces the horizontal direction. In Fig. 54 (A), there is no electric field. When an electric field is applied to the liquid crystal molecule 5418, the direction of its long axis is It rotates in a horizontal plane while always maintaining a horizontal orientation with the substrate. By being in this state , A liquid crystal display device having a large viewing angle can be obtained.

0399Next, with reference to FIG. 54 (B), when the present invention is applied to an IPS liquid crystal display device, An example of the pixel layout will be described. IPS liquid crystal display device to which the present invention is applied The pixels of are the scanning line 5421, the video signal line 5422, the common electrode 5423, and the TFT 54. 24 and a pixel electrode 5425 may be provided.

0400The scan line 5421 is electrically connected to the gate terminal of the TFT 5424, so that it is the first conductor. It is preferably composed of layer 5403.

0401The video signal line 5422 is electrically connected to the source terminal or drain terminal of the TFT 5424. Therefore, it is preferable that it is composed of the second conductive layer 5407. Also, scanning line 54 21 and the video signal line 5422 are arranged in a matrix, so at least they are in different layers. It is preferably formed of a conductive layer. As shown in FIG. 54 (B), the video signal line 54 22 bends within the pixel to match the shape of the pixel electrode 5425 and the common electrode 5423. It may be formed by bending. By doing so, the aperture ratio of the pixels can be increased. Therefore, the efficiency of the liquid crystal display device can be improved.

0402The common electrode 5423 generates a lateral electric field by being arranged parallel to the pixel electrode 5425. It is an electrode for making the conductor, and is composed of a first conductive layer 5403 and a third conductive layer 5409. Is preferable. As shown in FIG. 54 (B), the common electrode 5423 is used for video transmission. It may be extended along the line 5422 so as to surround the video signal line 5422. This As a result, the potential of the electrode that should hold the potential changes as the potential of the video signal line 5422 changes. It is possible to reduce the phenomenon of crosstalk, so-called crosstalk. Video signal line 5 As shown in FIG. 54 (B), the first semiconductor layer 54 is used to reduce the cross capacitance with the 422. 05 may be provided at the intersection region of the common electrode 5423 and the video signal line 5422.

0403TFT5424 is a switch that conducts the video signal line 5422 and the pixel electrode 5425. Operate. As shown in Fig. 54 (B), the source area or dray of TFT5424 Even if one of the regions is arranged so as to surround the other of the source region and the drain region. Good. By doing this, a large channel width can be obtained in a small area, and switching can be obtained. You can increase your ability. As shown in Fig. 54 (B), the TFT 5424 The terminal may be arranged so as to surround the first semiconductor layer 5405.

0404The pixel electrode 5425 is electrically connected to either the source terminal or the drain terminal of the TFT 5424. Be connected. Pixel electrode 5425 liquids the signal voltage transmitted by the video signal line 5422. It is an electrode for giving to a crystal element. Further, a pixel capacitance may be formed with the common electrode 5423. .. By doing so, it also has the role of holding the signal voltage transmitted by the video signal line 5422. Can be The pixel electrode 5425 and the comb-shaped common electrode 5423 are shown in FIG. 54 ( As shown in B), it is preferable to form it as a bent comb-teeth shape. To do this Since it is possible to form multiple regions with different orientations of the liquid crystal molecules 5418, the viewing angle A large liquid crystal display device can be obtained. In addition, the pixel electrode 5425 and the comb-shaped common electric power When the pole 5423 is made of a transparent material, a transmissive liquid crystal display device can be obtained. it can. The transmissive liquid crystal display device displays images with high color reproducibility and high image quality. be able to. In addition, the pixel electrode 5425 and the comb-shaped common electrode 5423 are also reflective. When made of one material, a reflective liquid crystal display device can be obtained. Reflective liquid crystal display The device is highly visible in bright environments such as outdoors and does not require a backlight. Therefore, the power consumption can be made very small. In addition, the pixel electrode 5425 and the comb-teeth shape Common electrode 5423 was made using both transparent and reflective materials. In the case, a semi-transmissive liquid crystal display device having both advantages can be obtained. In addition, the picture When the elementary electrode 5425 and the comb-shaped common electrode 5423 are made of a reflective material , The surface of the pixel electrode 5425 and the comb-shaped common electrode 5423 may be provided with irregularities. This By doing so, the reflected light is diffusely reflected, so that the angle dependence of the intensity distribution of the reflected light becomes smaller. There is a point. In other words, a reflective liquid crystal display device with constant brightness is obtained regardless of the angle. Can be

0405The comb-shaped pixel electrode 5425 and the comb-shaped common electrode 5423 are both made of a third conductive layer. Although it is said that it is formed by 5409, the pixel configuration to which the present invention can be applied is not limited to this, and is suitable. You can choose as you like. For example, a comb-shaped pixel electrode 5425 and a comb-shaped common electrode 54. 23 may both be formed by the second conductive layer 5407, or both may be formed by the first conductive layer 5403. Either one is formed by the third conductive layer 5409 and the other is formed by the second conductive layer. It may be formed of layer 5407, one of which is formed of a third conductive layer 5409 and the other. It may be formed by the first conductive layer 5403, or one of them may be formed by the second conductive layer 5407. The other may be formed of the first conductive layer 5403.

0406Next, with reference to FIG. 55, a case where the present invention is applied to another horizontal electric field type liquid crystal display device will be described. I will reveal. Figure 55 shows switching so that the orientation of the liquid crystal molecules is always horizontal to the substrate. It is a figure which shows another pixel structure of the liquid crystal display device of the type which applies an electric field in the lateral direction in order to carry out. .. More specifically, one of the pixel electrode 5525 and the common electrode 5523 has a comb-like shape. By applying pattern processing and forming electrodes uniformly in the area where the other overlaps the comb-shaped shape, A method of applying an electric field in the lateral direction, the so-called FFS (Fringe Field Switch) ing) is a cross-sectional view and a top view of pixels when the present invention is applied to the method. Figure 55 (A) Is a cross-sectional view of the pixel, and FIG. 55 (B) is a top view of the pixel. Also, in Fig. 55 (A) The cross-sectional view of the pixel shown corresponds to the line segment a-a'in the top view of the pixel shown in FIG. 55 (B). There is. By applying the present invention to the liquid crystal display device having a pixel structure shown in FIG. 55, in principle. It is possible to obtain a liquid crystal display device having a large viewing angle and a small gradation dependence of the response speed.

0407The pixel structure of the FFS type liquid crystal display device will be described with reference to FIG. 55 (A). liquid crystal The display device has a core portion for displaying an image, which is called a liquid crystal panel. The liquid crystal panel Two processed substrates are bonded together with a gap of several μm, and liquid is applied between the two substrates. It is made by injecting a crystal material. In FIG. 55 (A), the two substrates are the first substrate. 5501 and the second substrate 5516. TFT and pixel electrodes are placed on the first substrate. Also, on the second substrate, a light-shielding film 5514, a color filter 5515, and a spacer 5517 and a second alignment film 5512 may be made.

0408The present invention can be carried out without forming a TFT on the first substrate 5501. TFT When the present invention is carried out without producing the above, the number of steps is reduced, so that the manufacturing cost can be reduced. Can be done. Moreover, since the structure is simple, the yield can be improved. on the other hand, When a TFT is manufactured to carry out the present invention, a larger display device can be obtained.

0409The TFT shown in FIG. 55 is a bottom gate type TFT using an amorphous semiconductor, and is large. There is an advantage that it can be manufactured at low cost by using a substrate having an area. However, the present invention is limited to this. It is not something that will be done. The structure of the TFT that can be used is the channel in the bottom gate type TFT. There are etch type and channel protection type. Moreover, the top gate type may be used. In addition, amorphous Not only semiconductors but also polycrystalline semiconductors can be used.

0410The present invention can be carried out without forming a light-shielding film 5514 on the second substrate 5516. .. When the present invention is carried out without producing the light-shielding film 5514, the number of steps is reduced, so that the production process is reduced. The strike can be reduced. Also, since the structure is simple, improve the yield. Can be done. On the other hand, when the light-shielding film 5514 is manufactured to carry out the present invention, light leakage occurs when black is displayed. It is possible to obtain a display device with a small number of.

0411The present invention is carried out without forming the color filter 5515 on the second substrate 5516. It is possible. When the present invention is carried out without producing the color filter 5515, the number of steps is increased. Since it is reduced, the manufacturing cost can be reduced. Also, because the structure is simple, the yield It is possible to improve the ball. On the other hand, the present invention was realized by producing a color filter 5515. In the case of application, a display device capable of color display can be obtained.

0412In the present invention, the spacer 5517 is not formed on the second substrate 5516, and a spherical spacer is used. It can also be carried out by spraying. A place where the present invention is carried out by spraying a spherical spacer. In that case, the number of steps is reduced, so that the manufacturing cost can be reduced. Also, the structure is simple Therefore, the yield can be improved. On the other hand, we made spacer 5517 and started this When performing light, the position of the spacer does not vary, so the distance between the two boards should be uniform. It is possible to obtain a display device with less display unevenness.

0413Next, for the processing performed on the first substrate 5501, the method described with reference to FIG. 51 may be used. Therefore, it is omitted. Here, the first substrate 5501, the first insulating film 5502, and the first conductive layer 5 503, second insulating film 5504, first semiconductor layer 5505, second semiconductor layer 5506, first 2 conductive layer 5507, 3rd insulating film 5508, 3rd conductive layer 5509, 1st alignment film 55 10 are the first substrate 5101, the first insulating film 5102, and the first in FIG. 51, respectively. Conductive layer 5103, second insulating film 5104, first semiconductor layer 5105, second semiconductor layer 51 06, 2nd conductive layer 5107, 3rd insulating film 5108, 3rd conductive layer 5109, 1st arrangement Corresponds to the capsular membrane 5110.

0414However, the difference from FIG. 51 is that the first substrate 5501 side has a fourth insulating film 5519 and a fourth insulating film. The point is that the conductive layer 5513 of 4 may be formed. More specifically, the third conductive layer 55 After pattern processing was applied to 09, a fourth insulating film 5519 was formed and patterned. After forming the contact hole, a fourth conductive layer 5513 is formed and patterned in the same manner. After the above, the first alignment film 5510 may be formed. The fourth insulating film 5519 and The materials and processing methods that can be used for the fourth conductive layer 5513 are the third insulating film 5508 and the processing method. And the same ones used for the third conductive layer 5509 can be used. Also, comb-shaped Electrodes are electrically connected to either the source or drain terminals of the TFT5524. The uniform electrode may be electrically connected to the common electrode 5523. By doing this, the liquid A lateral electric field can be effectively applied to the crystal molecule 5518.

0415The first substrate 5501 manufactured as described above, the light-shielding film 5514, and the color filter 551. 5, the spacer 5517, and the second substrate 5516 from which the second alignment film 5512 was prepared, The sealing material is used to create a gap of several μm, and the liquid crystal material is poured between the two substrates. By inserting it, a liquid crystal panel can be manufactured. Although not shown, on the second substrate 5516 side , A conductive layer may be formed. By forming a conductive layer on the side of the second substrate 5516, from the outside It is possible to reduce the influence of electromagnetic noise.

0416Next, the features of the pixel structure of the FFS type liquid crystal panel shown in FIG. 55 will be described. Figure 5 The liquid crystal molecule 5518 shown in 5 (A) is an elongated molecule having a major axis and a minor axis. Liquid crystal molecules In order to show the direction of 5518, it is represented by its length in FIG. 55 (A). That is, the long-represented liquid crystal molecule 5518 has a long axis oriented parallel to the paper surface and is short. The more the liquid crystal molecule 5518 is expressed, the closer the direction of its long axis is to the normal direction of the paper surface. And. That is, the liquid crystal molecule 5518 shown in FIG. 55 (A) is always oriented in the long axis of the substrate. It is oriented so that it faces the horizontal direction. In Fig. 55 (A), there is no electric field. When an electric field is applied to the liquid crystal molecule 5518, the direction of its long axis is It rotates in a horizontal plane while always maintaining a horizontal orientation with the substrate. By being in this state , A liquid crystal display device having a large viewing angle can be obtained.

0417Next, with reference to FIG. 55 (B), when the present invention is applied to an FFS type liquid crystal display device, An example of the pixel layout will be described. FFS type liquid crystal display device to which the present invention is applied Pixels are scanning line 5521, video signal line 5522, common electrode 5523, and TFT55. 24 and a pixel electrode 5525 may be provided.

0418The scan line 5521 is electrically connected to the gate terminal of the TFT 5524, so that it is the first conductor. It is preferably composed of layers 5503.

0419The video signal line 5522 is electrically connected to the source terminal or drain terminal of the TFT 5524. Therefore, it is preferable that it is composed of a second conductive layer 5507. Also, scanning line 55 21 and the video signal line 5522 are arranged in a matrix, so at least they are in different layers. It is preferably formed of a conductive layer. As shown in FIG. 55 (B), the video signal line 55 22 is formed by bending in the pixel so as to match the shape of the pixel electrode 5525. Good. By doing so, the aperture ratio of the pixels can be increased, so that the liquid crystal display device is effective. The rate can be improved.

0420The common electrode 5523 generates a lateral electric field by being arranged parallel to the pixel electrode 5525. It is an electrode for making the conductor, and is composed of a first conductive layer 5503 and a third conductive layer 5509. Is preferable. As shown in FIG. 55 (B), the common electrode 5523 is used for video transmission. It may be formed in a shape along the line 5522. By doing this, the video signal line 552 A phenomenon in which the potential of the electrode that should hold the potential changes with the change in the potential of 2, so-called Crosstalk can be reduced. The cross capacitance with the video signal line 5522 has been reduced. As shown in Fig. 55 (B), the first semiconductor layer 5505 is projected as the common electrode 5523. It may be provided in the intersection region of the image signal line 5522.

0421TFT5524 is a switch that conducts the video signal line 5522 and the pixel electrode 5525. Operate. As shown in Fig. 55 (B), the source area or dray of TFT5524 Even if one of the regions is arranged so as to surround the other of the source region and the drain region. Good. By doing this, a large channel width can be obtained in a small area, and switching can be obtained. You can increase your ability. As shown in Fig. 55 (B), the TFT 5524 The terminal may be arranged so as to surround the first semiconductor layer 5505.

0422The pixel electrode 5525 is electrically connected to either the source terminal or the drain terminal of the TFT 5524. Be connected. The pixel electrode 5525 liquidizes the signal voltage transmitted by the video signal line 5522. It is an electrode for giving to a crystal element. Further, a pixel capacitance may be formed with the common electrode 5523. .. By doing so, it also has the role of holding the signal voltage transmitted by the video signal line 5522. Can be The pixel electrode 5525 is a bent comb as shown in FIG. 55 (B). It is preferably formed as a tooth-like shape. By doing this, the orientation of the liquid crystal molecules 5518 Since a plurality of different regions can be formed, a liquid crystal display device having a large viewing angle can be obtained. Can be done. In addition, the pixel electrode 5525 and the comb-shaped common electrode 5523 are made of a transparent material. When manufactured with a material, a transmissive liquid crystal display device can be obtained. Transmissive liquid crystal display device Can display images with high color reproducibility and high image quality. Also, pixel electrodes Reflection when the 5525 and comb-toothed common electrode 5523 are made of reflective material A type liquid crystal display device can be obtained. The reflective liquid crystal display device is used in bright environments such as outdoors. High visibility underneath and no backlight required, resulting in very low power consumption Can be The pixel electrode 5525 and the comb-shaped common electrode 5523 are made transparent. If it is made using both a material that has and a material that has reflectivity, it has the advantages of both. , A semi-transmissive liquid crystal display device can be obtained. In addition, the pixel electrode 5525 and the comb-teeth shape If the common electrode 5523 is made of a reflective material, the pixel electrode 5525 and the comb teeth The surface of the common electrode 5523 may have irregularities. By doing this, the reflected light is diffusely reflected. Therefore, there is an advantage that the angle dependence of the intensity distribution of the reflected light becomes small. That is, at what angle Even if you look at it, you can get a reflective liquid crystal display device with a certain brightness.

0423The comb-shaped pixel electrode 5525 is formed of a fourth conductive layer 5513 and is a uniform common electrode. Although the 5523 is said to be formed of the third conductive layer 5509, the pixel configuration to which the present invention can be applied is applied. Is not limited to this, and can be appropriately selected as long as certain conditions are satisfied. More details In detail, the comb-shaped electrode is closer to the liquid crystal than the uniform electrode when viewed from the first substrate 5501. It suffices to be located in. This is because the lateral electric field is always present when viewed from the comb-shaped electrodes. This is because it occurs in the opposite direction to the uniform electrode. In other words, in order to apply a transverse electric field to the liquid crystal This is because the comb-shaped electrode must be located closer to the liquid crystal than the uniform electrode. ..

0424To satisfy this condition, for example, a comb-shaped electrode is formed by the fourth conductive layer 5513 and is uniform. The electrode may be formed of a third conductive layer 5509, or the comb-shaped electrode may be formed of a fourth conductive layer 5513. The uniform electrode may be formed by the second conductive layer 5507, or the comb-shaped electrode may be formed by the fourth conductive layer 5507. May be formed by the conductive layer 5513 of the above, and a uniform electrode may be formed by the first conductive layer 5503, or a comb. The tooth-shaped electrode is formed by the third conductive layer 5509, and the uniform electrode is formed by the second conductive layer 5507. Alternatively, a comb-shaped electrode may be formed by a third conductive layer 5509, and a uniform electrode may be formed by the first conductive layer. It may be formed by layer 5503, or a comb-shaped electrode may be formed by a second conductive layer 5507 and is uniform. The electrode may be formed of the first conductive layer 5503. The comb-shaped electrode is TFT5524. Electrically connected to either the source or drain region of the, a uniform electrode is the common electrode 5 Although it is said that it is electrically connected to the 523, this connection may be reversed. In that case, uniform electricity The poles may be formed independently for each pixel.

0425The operation mode of the liquid crystal element of the liquid crystal display device of the present invention is TN (Twisted). Nematic) mode, IPS (In-Plane-Switching) mode, F FS (Fringe Field Switching) mode, MVA (Multi- domain Vertical Alignment) mode, PVA (Patter) ned Vertical Alignment), ASM (Axially Symm) etric aligned Micro-cell) mode, OCB (Optical) Compensated Bend) mode, FLC (Ferroelectric) Liquid Crystal) mode, AFLC (Anti Ferroelectri) c Liquid Crystal) mode, PDLC (Polymer Disper) sed Liquid Crystal) mode etc. can be used freely.

0426By applying the configuration of the display device shown in the above embodiment to the liquid crystal display device, a transition can be made. Deterioration of star characteristics can be suppressed. Therefore, the cause is deterioration of transistor characteristics. It is possible to prevent the malfunction of the foot register. Also, the cause is a malfunction of the shift register. It is possible to suppress display defects in the liquid crystal display device.

0427The pixel configuration shown in this embodiment is the display device shown in other embodiments in the present specification. It can be implemented in any combination with the configuration of the device. Further, the pixels shown in the present embodiment Can be freely combined and implemented.

0428(Embodiment 10) In the present embodiment, an example of pixels included in the display device shown in the first to eighth embodiments. Will be described as an example different from that of the ninth embodiment.

0429The pixel configuration of FIG. 65 (A) will be described. The pixel circuit shown in FIG. 65 (A) is a capacitive element 6 500, 1st transistor 6501, 2nd transistor 6502 and display element 652 Have one. The pixels are the first wiring 6511, the second wiring 6512, and the third wiring 65. Connected to 13. Further, in the display element 6521, the light emitting layer is a pixel electrode and a counter electrode 6522. Applying an EL element that is sandwiched between the pixel electrode and the current flows from the pixel electrode to the counter electrode 6522. Can be done. The first wiring 6511 may be called a signal line. Also, the second wiring 65 12 may be called a power line. Further, the third wiring 6513 may be referred to as a scanning line. It should be noted that , The first transistor 6501 may be called a drive transistor. Also, the second tran The Gista 6502 may be called a selection transistor.

0430A case where a light emitting element such as an EL element is applied as the display element 6521 will be described. To.

0431The transistor 6501 and the transistor 6502 are N-channel type transistors. However, it may be a P-channel type transistor. Embodiment 1 to Implementation In the fourth form, the N-channel type transistor is used as the transistor 6501 and the transistor 6502. It is preferable to use an engineer. Because, as a semiconductor layer of a transistor, Amorph Since as silicon can be used, the manufacturing process can be simplified and the manufacturing cost can be simplified. This is because it is possible to reduce the yield and improve the yield. In addition, it is a large display panel This is because any semiconductor device can be manufactured. Also, the semiconductor layer of the transistor As a result, the manufacturing process can be simplified by using polysilicon or single crystal silicon. .. Further, in the fifth to eighth embodiments, the transistor 6501 and the transistor 6 It is desirable to use a P-channel transistor as the 502. Because the manufacturing process Because it is possible to simplify the manufacturing cost and improve the yield. Is.

0432The first wiring 6511 is the signal shown in the display devices of FIGS. 9, 11, 12, and 44. Corresponds to any one of lines S1 to Sm. The third wiring 6513 is shown in FIGS. 9, 11, 12 and It corresponds to any one of the scanning lines G1 to Gn shown in the display device of FIG.

0433Although the second wiring 6512 is not shown in FIGS. 9, 11, 12, and 44, As already mentioned, it may be added to FIGS. 9, 11, 12, and 44 as needed.

0434The first terminal of the first transistor 6501 is connected to the second wire 6512, and the second terminal is shown in the table. It is connected to the pixel electrode of the indicator element 6521. The first terminal of the second transistor 6502 is Connected to the first wire 6511, the second terminal is the gate terminal of the first transistor 6501 Connected, the gate terminal is connected to the third wire 6513. First of the capacitive element 6500 Electrode is connected to the second wire 6512, and the second electrode is the device of the first transistor 6501. It is connected to the terminal.

0435The capacitive element 6500 holds the voltage of the gate terminal of the first transistor 6501. It has a role. Therefore, the capacitive element 6500 has the first transistor 6501 and the second transistor. It is connected to line 6512, but is not limited to this. Capacitive element 6500 is the first It suffices if it is arranged so as to hold the voltage of the gate terminal of the transistor 6501, and it is different. It may be connected to the third wire 6513 of the pixel of (for example, the previous row). In addition, the capacitive element 6 500 may be omitted by using the gate capacitance of the first transistor 6501.

0436As the operation method, select the third wiring 6513 and turn on the second transistor 6502. In the state, the video signal is sent from the first wiring 6511 to the capacitive element 6500 and the first transition. Input to the gate terminal of the data 6501. Then, the first transistor 6501 is the gate and the so The display element 6521 emits light by passing a current corresponding to the voltage between the devices through the display element 6521. To.

0437By the way, the drive method for expressing the gradation of the display device includes the display analog gradation method and the digital scale. There is a keying method. For the display analog gradation method, those who control the emission intensity of the display element in analog There are a formula and a method of analog-controlling the light emission time of the display element. Table in analog gradation method An analog control method is often used to control the emission intensity of the indicator element. On the other hand, the digital gradation method is digital. The display element is turned on or off by the tall control to express the gradation. Place of digital gradation method In addition, since it can be processed with a digital signal, it has the advantage of being resistant to noise, but it emits light and does not emit light. Since there are only two states, only two gradations can be expressed as it is. Therefore, we set up another method At the same time, multi-gradation is being attempted. As a method for multi-gradation, the pixel Area gradation method that weights the light emitting area and displays gradation by selection, and weights on light emission time There is a time gradation method in which gradation is displayed by adding and selecting.

0438When this digital gradation method and the time gradation method are combined, as shown in FIG. Divide the ram period into multiple subframe periods (SFn). Each subframe period is the first Address period (T) with periodation period, threshold voltage write period and data write period It has a) and a light emission period (Ts). The subframe period depends on the number of display bits n. The number is set in one frame period. In addition, each subframe period in one frame period The ratio of the lengths of the emission periods in is 2 (n-1): 2 (n-2): ...: 2: 1 and each emission period One frame period during which the display element emits light by selecting light emission or non-emission of the display element between Gradation is expressed using the difference in the total time inside. When it is emitting light in one frame period The longer the total time, the higher the brightness, and the shorter the total time, the lower the brightness. In Fig. 68, 4 bits An example of gradation is shown. One frame period is divided into four subframe periods, and the light emission period. 24 = 16 gradations can be expressed by the combination between them. The ratio of the length of the light emission period is Gradation can be expressed without using a power ratio of 2. Also, a certain subframe period May be further divided.

0439When multi-gradation is achieved by using the time gradation method as described above, the light emission period of the lower bits Since the length is short, the data write operation for the next subframe period is started immediately after the end of the light emission period. When I try to start it, it overlaps with the data write operation of the previous subframe period, so it is correct It becomes impossible to operate normally. Therefore, as shown in Fig. 65 (B), the third transistor 650 3 is provided between the gate terminal of the first transistor 6501 and the third wiring 6513 to emit light. Part of the period turns on the third transistor 6503, forcing the first transistor 6501 is turned off, a non-light emitting state is forcibly created, and a non-light emitting state period (erasure period) is set. By doing so, it is possible to express light emission that is shorter than the data writing period required for all lines. Na Oh, the on and off of the third transistor 6503 is controlled by the fourth wire 6514 ing. Therefore, of course, it is particularly effective in display analog gradation, but It is also effective in a method that combines a digital gradation method and a time gradation method. In addition, non-fire Since it is only necessary that no current flows through the display element to create an optical state, the first transistor is used as described above. In addition to turning off the Jista 6501, it does not emit light by lowering the potential of the second wiring 6512. You can get the state. Also, between the first transistor 6501 and the second wiring 6512 A new switch is provided between them, and the switch is used for the first transistor 6501 and the second transistor. A non-light emitting state can also be obtained by making the wiring 6512 non-conducting. Also, the first tiger A new switch is provided between the engineer 6501 and the pixel electrode of the display element 6521. It is also possible to obtain a non-light emitting state by stopping the supply of current to the display element 6521 using the switch. it can.

0440Next, a pixel configuration different from that of FIG. 65 will be described with reference to FIG. 66.

0441The pixel configuration of FIG. 66 will be described. The pixel circuit shown in FIG. 66 is a capacitive element 6600, the first Transistor 6601, 2nd transistor 6602, 3rd transistor 6603 and And has a display element 6621. The pixels are the first wiring 6611 and the second wiring 6612. , Is connected to the third wire 6613 and the fourth wire 6614. In addition, the display element 662 1 is sandwiched between the pixel electrode and the counter electrode 6622, and electricity is transmitted from the pixel electrode to the counter electrode 6622. An EL element through which a flow flows can be applied. The first wiring 6611 is called a signal line. It may be. Further, the second wiring 6612 may be called a power supply line. Also, the third wiring 661 The 3rd and 4th wirings 6614 may be referred to as a first scanning line and a second scanning line. In addition, the first Transistor 6601 may be called a drive transistor. Also, the second transistor The 6602 and the third transistor 6603 are the first switching transistor and the second transistor. It may be called a switching transistor of.

0442A case where a light emitting element such as an EL element is applied as the display element 6621 will be described. To.

0443The first transistor 6601, the second transistor 6602, and the third transistor The data 6603 shows an N-channel type transistor, but a P-channel type transistor. It may be In the first to fourth embodiments, the first transistor 6601, N-channel type transistor as the second transistor 6602 and the third transistor 6603 It is preferable to use an engineer. Because, as a semiconductor layer of a transistor, Amorph Since as silicon can be used, the manufacturing process can be simplified and the manufacturing cost can be simplified. This is because it is possible to reduce the yield and improve the yield. In addition, it is a large display panel This is because any semiconductor device can be manufactured. Also, the semiconductor layer of the transistor As a result, the manufacturing process can be simplified by using polysilicon or single crystal silicon. .. Further, in the fifth to eighth embodiments, the first transistor 6601 and the second transistor P-channel type transistor as engineer 6602 and third transistor 6603 It is desirable to use it. This is because the manufacturing process can be simplified and the manufacturing cost can be reduced. This is because it is possible to reduce the yield and improve the yield.

0444The first wiring 6611 is the signal shown on the display devices of FIGS. 9, 11, 12, and 44. Corresponds to any one of lines S1 to Sm. The third wiring 6613 is shown in FIGS. 9, 11, 12 and It corresponds to any one of the scanning lines G1 to Gn shown in the display device of FIG.

0445The second wiring 6612 and the fourth wiring 6614 are shown in FIGS. 9, 11, 12, and 44. Is not shown, but as already mentioned, as needed, FIG. 9, FIG. 11, FIG. 12 and FIG. 44. It is good to add it to.

0446The first terminal of the first transistor 6601 is connected to the second wiring 6612, and the second terminal is shown in the table. It is connected to the pixel electrode of the indicator element 6621. The first terminal of the second transistor 6602 is It is connected to the first wiring 6611, and the second terminal is connected to the pixel electrode of the display element 6621. The terminal is connected to the third wire 6613. First end of third transistor 6603 The child is connected to the second wire 6612, and the second terminal is the gate end of the first transistor 6601. Connected to the child, the gate terminal is connected to the fourth wire 6614. Capacitive element 6600 The first electrode is connected to the gate terminal of the first transistor 6601, and the second electrode is a display element. It is connected to the pixel electrode of the child 6621.

0447As the drive method, select the third wiring 6613 and the fourth wiring 6614, and select the second tran. Turn on the Gista 6602 and the third transistor 6603, and turn on the second wire 6612. Lower the potential to the same potential as the counter electrode 6622. Then the second wiring 6612? Then, a current corresponding to the video signal is passed through the first wiring 6611 (the video signal is input). To do And, the voltage of the gate terminal of the first transistor 6601 becomes a value according to the video signal, At that time, the voltage between the gate and source of the first transistor 6601 (gate terminal and second terminal) The potential difference with and from) is held by the capacitive element 6600. Then the second transistor 6602 and And turn off the third transistor 6603 and raise the potential of the second wiring 6612. Then, the current starts to flow in the display element 6621. At this time, the first transistor 6601 The voltage between the gate and the source is maintained by the capacitive element 6600 according to the video signal. , The current of the video signal and the current flowing through the display element 6621 have the same value. Then, the display element The child 6621 emits light with a brightness corresponding to the video signal.

0448Next, a pixel configuration different from that of FIG. 66 will be described with reference to FIG. 67.

0449The pixel configuration of FIG. 67 will be described. The pixel circuit shown in FIG. 67 is a capacitive element 6700, first. Transistor 6701, 2nd transistor 6702, 3rd transistor 6703, It has a fourth transistor 6704 and a display element 6721. The pixel is the first wiring. 6711, 2nd wiring 6712, 3rd wiring 6713, 4th wiring 6714 and 5th wiring It is connected to line 6715. Further, in the display element 6721, the light emitting layer is a pixel electrode and a counter electrode 6 An EL element that is sandwiched between the 722 and a current flows from the pixel electrode to the counter electrode 6722 is applied. can do. The first wiring 6711 may be called a signal line. Also, the second distribution Line 6712 may be called a power line. In addition, the third wiring 6713 and the fourth wiring 6714 May be referred to as a first scanning line and a second scanning line. In addition, the fifth wiring 6715 has a holding capacity. You may call it a line. The first transistor 6701 and the second transistor 6702 May be called the first drive transistor and the second drive transistor. Also, the third tiger The engineer 6703 and the fourth transistor 6704 are the first switching transistors. It may be called a second switching transistor. The first transistor 67 01 and the second transistor 6702 are paired, so-called current mirror configuration It has become.

0450A case where a light emitting element such as an EL element is applied as the display element 6721 will be described. To.

0451The first transistor 6701, the second transistor 6702, and the third transistor 6703 and 4th transistor 6704 indicate N-channel type transistors. However, it may be a P-channel type transistor. In the first to fourth embodiments, 1st transistor 6701, 2nd transistor 6702, 3rd transistor 670 It is better to use N-channel type transistors as the 3rd and 4th transistors 6704. Good. This is because amorphous silicon is used as the semiconductor layer of the transistor. Therefore, the manufacturing process can be simplified, and the manufacturing cost can be reduced and the yield can be improved. This is because it is possible to plan. Furthermore, we manufacture semiconductor devices such as large display panels. This is also possible. In addition, polysilicon or simple silicon is used as the semiconductor layer of the transistor. The manufacturing process can be simplified by using crystalline silicon. In addition, Embodiment 5 to In the eighth embodiment, the first transistor 6701, the second transistor 6702, and the third transistor P-channel type transistors as transistor 6703 and fourth transistor 6704 It is desirable to use data. This is because the manufacturing process can be simplified and the manufacturing cost can be reduced. This is because it is possible to reduce the amount of waste and improve the yield.

0452The first wiring 6711 is a signal shown in the display devices of FIGS. 9, 11, 12, and 44. Corresponds to any one of lines S1 to Sm. The third wiring 6713 is shown in FIGS. 9, 11, 12 and It corresponds to any one of the scanning lines G1 to Gn shown in the display device of FIG.

0453The second wiring 6712, the fourth wiring 6714, and the fifth wiring 6715 are shown in FIGS. 9 and 11. , Not shown in FIGS. 12 and 44, but as needed in FIGS. 9 and 1 as already mentioned. 1. Add to Figure 12 and Figure 44.

0454The first terminal of the first transistor 6701 is connected to the second wire 6712, and the second terminal is shown in the table. It is connected to the pixel electrode of the indicator element 6721. The first terminal of the second transistor 6702 is It is connected to the second terminal of the third transistor 6703, and the second terminal is the pixel of the display element 6721. It is connected to the electrode. The first terminal of the third transistor 6703 is the first transistor 6 Connected to the gate terminal of 701 and the gate terminal of the second transistor 6702, the gate end The child is connected to the fourth wire 6714. The first terminal of the fourth transistor 6704 is the first It is connected to the wiring 6711 of 1, and the second terminal is the gate terminal of the first transistor 6701 and It is connected to the gate terminal of the second transistor 6702, and the gate terminal is the third wiring 6713. It is connected to the. The first electrode of the capacitive element 6700 is connected to the fifth wiring 6715, and the first The second electrode is the gate terminal of the first transistor 6701 and the second transistor 6702. It is connected to the gate terminal.

0455The capacitive element 6700 has a gate terminal of the first transistor 6701 and a second transistor. It serves to hold the voltage at the gate terminal of the Gista 6702. Therefore, the capacitive element 670 0 is the gate terminal of the first transistor 6701 and the game of the second transistor 6702. It is connected between the terminal and the fifth wire 6715, but is not limited to this. Capacitive element 6 700 is the gate terminal of the first transistor 6701 and the second transistor 6702. It suffices if it is arranged so that the voltage of the gate terminal can be held, and another (for example, the previous line) image It may be connected to a plain third wire 6713. Further, the capacitive element 6700 is the first transistor. Use the gate capacitance of the Gista 6701 and the gate capacitance of the second transistor 6702. And may be omitted.

0456As the drive method, select the third wiring 6713 and the fourth wiring 6714, and select the third wiring. Turn on the Gista 6703 and the fourth transistor 6704. Then the first wiring A current corresponding to the video signal is passed from 6711 to the display element 6721 (input the video signal). ). Then, the gate terminal of the first transistor 6701 and the second transistor 6702 The voltage at the gate terminal of is a value corresponding to the video signal. And the first transistor 67 The voltage of the gate terminal of 01 and the gate terminal of the second transistor 6702 is the capacitance element 670. It is held at 0. Then the third transistor 6703 and the fourth transistor 6704 Is turned off. Then, the first transistor 6701 displays the current corresponding to the video signal. It is supplied to the element 6721, and the display element 6721 emits light with a brightness corresponding to the video signal.

0457Next, the cross-sectional views of the pixels shown in FIGS. 65 (A) and 65 (B) will be described.

0458FIG. 69 (A) shows a layout example of a pixel element having two TFTs in one pixel. Further, in FIG. 69 (A), a cross-sectional view of a portion indicated by X-X'is shown in FIG. 69 (B). The layout example of FIG. 69 (A) can be applied to the pixels shown in FIG. 65 (A). To.

0459As shown in FIG. 69 (A), the pixels in the present invention are the first TFT6905 and the first arrangement. Line 6906, 2nd wiring 6907, 2nd TFT6908, 3rd wiring 6911, Opposite power Pole 6912, capacitor 6913, pixel electrode 6915, partition wall 6916, organic conductor film 69 17. It may have an organic thin film 6918 and a substrate 6919. The first TFT690 5 is a switching TFT, the first wiring 6906 is a gate signal line, and the second wiring Line 6907 is the source signal line, the second TFT 6908 is the driving TFT, and the third The wiring 6911 is preferably used as a current supply line.

0460As shown in FIG. 69 (A), the gate electrode of the first TFT 6905 is the first wiring 690. Electrically connected to 6, one of the source or drain terminals of the first TFT6905 Electrically connected to the second wire 6907, the source terminal of the first TFT6905 The rain terminal is one of the gate terminal of the second TFT 6908 and the capacitor 6913. It is preferably electrically connected to the pole. The gate electrode of the first TFT6905 May be composed of a plurality of gate electrodes as shown in FIG. 69 (A). like this By doing so, the leakage current in the off state of the first TFT6905 can be reduced. To.

0461Also, one of the source terminal or drain terminal of the second TFT6908 is the third wiring 69. Electrically connected to 11 and the other of the source or drain terminals of the second TFT 6908 Is preferably electrically connected to the pixel electrode 6915. By doing this, the pixels The current flowing through electrode 6915 can be controlled by a second TFT 6908.

0462An organic conductor film 6917 is provided on the pixel electrode 6915, and an organic thin film (organic compound) is further provided. Material layer) 6918 may be provided. On the organic thin film (organic compound layer) 6918, a pair A direction electrode 6912 may be provided. The counter electrode 6912 is common to all pixels. It may be formed on one side so that it can be connected to the putter using a shadow mask or the like. May be formed.

0463The light emitted from the organic thin film (organic compound layer) 6918 is the pixel electrode 6915 or a pair. It is emitted through one of the direction electrodes 6912. At this time, in FIG. 69 (B) When light is emitted to the pixel electrode side, that is, the side where the TFT or the like is formed, the bottom surface is ejected. The case where light is emitted to the counter electrode side is called top surface injection.

0464In the case of bottom surface injection, the pixel electrode 6915 is preferably formed of a transparent conductive film. Further, in the case of top surface injection, it is preferable that the counter electrode 6912 is formed of a transparent conductive film. To.

0465In addition, in a color display light emitting device, an EL element having each of R, G, and B emission colors. You can paint separately, or you can paint a single color EL element on one side and use a color filter to apply R / G. -You may get the light emission of B.

0466The configuration shown in FIG. 69 is just an example, and the pixel layout, cross-sectional configuration, and EL element are used. Regarding the stacking order of the child electrodes, various configurations other than those shown in FIG. 69 can be adopted. Wear. In addition to the element composed of the organic thin film shown in the figure, the light emitting layer is a crystal such as an LED. Various devices such as sex devices and devices composed of inorganic thin films can be used.

0467Next, referring to FIG. 70 (A), the layer of the pixel element having three TFTs in one pixel. An example of Uto will be described. Further, in FIG. 70 (A), a cross section of a portion indicated by X-X'. The figure is shown in FIG. 70 (B). A layout example of FIG. 70 (A) is shown in FIG. 65 (B). It can be applied to pixels.

0468As shown in FIG. 70 (A), the pixels in the present invention are the substrate 7000 and the first wiring 700. 1, 2nd wiring 7002, 3rd wiring 7003, 4th wiring 7004, 1st TFT70 05, 2nd TFT7006, 3rd TFT7007, pixel electrode 7008, partition wall 7011 , Organic conductor film 7012, organic thin film 7013, counter electrode 7014, may be provided. The first wiring 7001 is used as the source signal line, and the second wiring 7002 is used as the writing gate signal. As the line, the third wiring 7003 is the erasing gate signal line, and the fourth wiring 7004 is the electric power. As a flow supply line, the first TFT7005 is a switching TFT, and the second TFT7 006 is for erasing TFT, and the third TFT 7007 is for driving TFT. It is preferable to be able to.

0469As shown in FIG. 70 (A), the gate electrode of the first TFT 7005 is the second wiring 700. Electrically connected to 2, one of the source or drain terminals of the first TFT7005 , Electrically connected to the first wiring 7001 and the source terminal of the first TFT 7005 The terminal of the rain electrode is electrically connected to the gate terminal of the third TFT7007. Suitable. The gate electrode of the first TFT 7005 is as shown in FIG. 70 (A). It may be composed of a plurality of gate electrodes. By doing this, the first TFT700 The leakage current in the off state of 5 can be reduced.

0470In addition, the gate electrode of the second TFT 7006 is electrically connected to the third wiring 7003. , One of the source electrode or drain electrode of the second TFT7006 is the fourth wiring 7004 Electrically connected to, the other of the source or drain electrodes of the second TFT7006 It is preferably electrically connected to the gate electrode of the third TFT7007. In addition, the first As shown in FIG. 70 (A), the gate electrode of TFT 7006 of 2 is made of a plurality of gate electrodes. It may be configured. By doing this, in the off state of the second TFT 7006 Leakage current can be reduced.

0471Also, one of the source terminal or drain terminal of the third TFT7007 is the fourth wiring 70. Electrically connected to 04, the other of the source or drain terminals of the third TFT7007 Is preferably electrically connected to the pixel electrode 7008. By doing this, the pixels The current flowing through the electrode 7008 can be controlled by the third TFT 7007.

0472An organic conductor film 7012 is provided on the pixel electrode 7008, and an organic thin film (organic compound) is further provided. Material layer) 7013 may be provided. On the organic thin film (organic compound layer) 7013, a pair A direction electrode 7014 may be provided. The counter electrode 7014 is common to all pixels. It may be formed on one side so that it can be connected to the putter using a shadow mask or the like. May be formed.

0473The light emitted from the organic thin film (organic compound layer) 7013 is the pixel electrode 7008 or a pair. It is emitted through one of the direction electrodes 7014. At this time, in FIG. 70 (B) When light is emitted to the pixel electrode side, that is, the side where the TFT or the like is formed, the bottom surface is ejected. The case where light is emitted to the counter electrode side is called top surface injection.

0474In the case of bottom surface injection, the pixel electrode 7008 is preferably formed of a transparent conductive film. On the contrary, in the case of top surface injection, it is preferable that the counter electrode 7014 is formed of a transparent conductive film. To.

0475In addition, in a color display light emitting device, an EL element having each of R, G, and B emission colors. Can be painted separately, or a single color EL element is formed on one side, and R. G / B light emission may be obtained.

0476The configuration shown in FIG. 70 is just an example, and the pixel layout, cross-sectional configuration, and EL element are used. Regarding the stacking order of the child electrodes, various configurations other than those shown in Fig. 70 can be adopted. Wear. In addition to the element composed of the organic thin film shown in the figure, the light emitting layer is a crystal such as an LED. Various devices such as sex devices and devices composed of inorganic thin films can be used.

0477Next, referring to FIG. 71 (A), the layer of the pixel element having four TFTs in one pixel. An example of Uto will be described. Further, in FIG. 71 (A), a cross section of a portion indicated by X-X' The figure is shown in FIG. 71 (B).

0478As shown in FIG. 71 (A), the pixels in the present invention are the substrate 7100 and the first wiring 710. 1, 2nd wiring 7102, 3rd wiring 7103, 4th wiring 7104, 1st TFT71 05, 2nd TFT7106, 3rd TFT7107, 4th TFT7108, pixel electrode 7109, 5th wiring 7111, 6th wiring 7112, partition wall 7121, organic conductor membrane 71 22. It may have an organic thin film 7123 and a counter electrode 7124. The first wiring 7 101 is the source signal line, the second wiring 7102 is the writing gate signal line, and the third Wiring 7103 is the erasing gate signal line, and wiring 7104 is the reverse bias signal. As a line, the first TFT7105 is a switching TFT, the second TFT7106 Is the erasing TFT, the third TFT7107 is the driving TFT, and the fourth TFT71 08 is a TFT for reverse bias, 5th wiring 7111 is a current supply line, and 6th Wiring 7112 is preferably used as a power supply line for reverse bias.

0479As shown in FIG. 71 (A), the gate electrode of the first TFT 7105 is the second wiring 710. Electrically connected to 2, one of the source or drain terminals of the first TFT 7105 , Electrically connected to the first wiring 7101, the source terminal of the first TFT 7105 The other side of the rain terminal is electrically connected to the gate electrode of the third TFT7107. Suitable. The gate electrode of the first TFT 7105 is as shown in FIG. 71 (A). It may be composed of a plurality of gate electrodes. By doing this, the first TFT710 The leakage current in the off state of 5 can be reduced.

0480In addition, the gate electrode of the second TFT 7106 is electrically connected to the third wiring 7103. , One of the source terminal or drain terminal of the second TFT7106 is the fifth wiring 7111 Electrically connected to the other of the source or drain terminals of the second TFT 7106, It is preferably electrically connected to the gate electrode of the third TFT 7107. In addition, the first As shown in FIG. 71 (A), the gate electrode of TFT7106 of 2 is made of a plurality of gate electrodes. It may be configured. By doing this, in the off state of the second TFT 7106 Leakage current can be reduced.

0481Also, one of the source terminal or drain terminal of the third TFT7107 is the fifth wiring 71. Electrically connected to 11 and the other of the source or drain terminals of the third TFT 7107 Is preferably electrically connected to the pixel electrode 7109. By doing this, the pixels The current flowing through electrode 7109 can be controlled by a third TFT 7107.

0482In addition, the gate electrode of the 4th TFT 7108 is electrically connected to the 4th wiring 7104. One of the source terminal or drain terminal of the 4th TFT 7108 is connected to the 6th wiring 7112. Electrically connected, the other of the source or drain electrodes of the fourth TFT 7108 is a picture. It is preferably electrically connected to the elementary electrode 7109. By doing this, the pixel electrode 7 The potential of 109 can be controlled by the 4th TFT7108, so the organic conductor A bias in the opposite direction is marked on the light emitting element composed of the film 7122 and the organic thin film 7123. Can be added. Generation composed of organic conductor film 7122 and organic thin film 7123 By applying a bias in the opposite direction to the optical element, the reliability of the light emitting element is greatly improved. Can be

0483For example, the brightness half-time when driven by DC voltage (3.65V) is about 400 hours. Light emitting element, AC voltage (forward bias: 3.7V, reverse bias: 1.7V, dual When driven at an AC frequency of 50% and an AC frequency of 60Hz, the brightness half-time is 700 hours or more. I know it will be.

0484Next, an organic conductor film 7122 is provided on the pixel electrode 7109, and an organic thin film (with) is further provided. Machine compound layer) 7123 may be provided. On the organic thin film (organic compound layer) 7123 May be provided with a counter electrode 7124. The counter electrode 7124 has all the pixels. It may be formed on one side so that it can be connected in common with a shadow mask or the like. A pattern may be formed.

0485The light emitted from the organic thin film (organic compound layer) 7123 is the pixel electrode 7109 or a pair. It is emitted through one of the direction electrodes 7124. At this time, in FIG. 71 (B) When light is emitted to the pixel electrode side, that is, the side where the TFT or the like is formed, the bottom surface is ejected. The case where light is emitted to the counter electrode side is called top surface injection.

0486In the case of bottom surface injection, the pixel electrode 7109 is preferably formed of a transparent conductive film. On the contrary, in the case of top surface injection, it is preferable that the counter electrode 7124 is formed of a transparent conductive film. To.

0487In addition, in a color display light emitting device, an EL element having each of R, G, and B emission colors. Can be painted separately, or a single color EL element is formed on one side, and R. G / B light emission may be obtained.

0488The configuration shown in FIG. 71 is just an example, and the pixel layout, cross-sectional configuration, and EL element are used. Regarding the stacking order of the child electrodes, various configurations other than those shown in Fig. 71 can be adopted. Wear. Also, the light emitting layer element composed of the organic thin film shown in the figure a crystal such as an LED. Various devices such as sex devices and devices composed of inorganic thin films can be used.

0489Next, the structure of the EL element applicable to the present invention will be described.

0490The EL device applicable to the present invention includes a hole injection layer made of a hole injection material and a hole transport material. Hole transport layer, light emitting layer made of light emitting material, electron transport layer made of electron transport material, electron injection The hole injection material is not a laminated structure in which the electron injection layer made of the material is clearly distinguished. , Hole transport material, light emitting material, electron transport material, electron injection material, etc. It may have a configuration having a mixed layer (mixed layer) (hereinafter referred to as a mixed junction type EL element). I.

0491A schematic diagram showing the structure of the mixed-junction type EL element is shown in FIG. 72. In Figure 72, 720 1 is the anode of the EL element. 7202 is the cathode of the EL element. Anode 7201 and cathode 72 The layer sandwiched between 02 corresponds to the EL layer.

0492In FIG. 72 (A), the EL layer has a hole transport region 7203 made of a hole transport material and electricity. The hole transport region 7203 includes an electron transport region 7204 made of child transport material, and the hole transport region 7203 is an electron transport region. It is located on the anode side of the region 7204, and has a hole transport region 7203 and an electron transport region 720. A structure in which a mixed region 7205 containing both hole-transporting material and electron-transporting material is provided between 4. Can be successful.

0493At this time, the holes in the mixing region 7205 are formed in the direction from the anode 7201 to the cathode 7202. It is characterized by a decrease in the concentration of transport material and an increase in the concentration of electron transport material in the mixed region 7205. It may be a sign.

0494In the above configuration, the hole transport region 7203 consisting only of the hole transport material does not exist. Concentration of each functional material inside the mixed region 7205, which contains both hole-transporting material and electron-transporting material. It may be configured such that the ratio of the above changes (has a concentration gradient). Also, is it only a hole transport material? There is a hole transport region 7203 consisting of all the holes and an electron transport region 7204 consisting only of the electron transport material. Without each functional material inside a mixed region 7205 containing both hole-transporting material and electron-transporting material It may be configured such that the ratio of the concentration changes (has a concentration gradient). In addition, the ratio of concentration is The configuration may change depending on the distance from the anode or the cathode. In addition, changes in the percentage of concentration May be continuous. The method of setting the concentration gradient can be freely set.

0495Within the mixed region 7205, there is a region 7206 to which the luminescent material is added. Depending on the luminescent material Therefore, the emission color of the EL element can be controlled. In addition, the carrier is changed by the light emitting material. Can be wrapped. Luminescent materials include benzooki, a metal complex containing a quinoline skeleton. Metal complexes containing a saddle skeleton, metal complexes containing a benzothiazol skeleton, etc., as well as various fluorescent colors Element can be used. By adding these luminescent materials, the luminescent color of the EL element Can be controlled.

0496As the anode 7201, an electrode material with a large work function is used to inject holes efficiently. It is preferable to have. For example, tin-doped indium oxide (ITO) and zinc-doped indium oxide (i). Zinc oxide (IZO), ZnO, SnO₂, In₂O₃Etc. can be used .. Also, the anode 7201 may be an opaque metal material if it does not need to be translucent. ..

0497Further, as the hole transport material, an aromatic amine-based compound or the like can be used.

0498In addition, as the electron transport material, a quinoline derivative, 8-quinolinol or a derivative thereof is used. Metal complex as a ligand (particularly tris (8-quinolinolato) aluminum (Alq3)) Etc. can be used.

0499For the cathode 7202, an electrode material with a small work function is used to inject electrons efficiently. It is preferable to have. Aluminum, indium, magnesium, silver, calcium, burrs A metal such as um or lithium can be used alone. It is also an alloy of these metals It may be an alloy of these metals and other metals.

0500A schematic diagram of an EL element having a configuration different from that shown in FIG. 72 (A) is shown in FIG. 72 (B). Note that Fig. 72 The same parts as in (A) are shown using the same reference numerals, and the description thereof will be omitted.

0501In FIG. 72 (B), there is no region to which the light emitting material is added. However, the electron transport area 72 As a material to be added to 04, a material having both electron transporting property and light emitting property (electron transporting light emitting material) For example, with a configuration using tris (8-quinolinolite) aluminum (Alq3) And can emit light.

0502Alternatively, as a material to be added to the hole transport region 7203, both hole transport and luminescence are used. A material (hole transporting luminescent material) may be used.

0503FIG. 72 (C) shows a schematic diagram of an EL element having a configuration different from that of FIGS. 72 (A) and 72 (B). I will. The same parts as those in FIGS. 72 (A) and 72 (B) are shown using the same reference numerals, and explanations are omitted. Abbreviate.

0504In FIG. 72 (C), the highest occupied molecular orbital and the lowest empty molecular orbital are compared with the hole transport material. Region where hole blocking material with large energy difference is added in mixed region 7205 Has 7207. Region 7207 with hole blocking material added, mixed region 72 By arranging the light emitting material in 05 on the cathode 7202 side from the region 7206 to which the light emitting material was added. , The carrier recombination rate can be increased and the luminous efficiency can be increased. Above, hole blocking The configuration in which the region 7207 to which the sex material is added is provided, in particular, is emitted by triplet excitons (phosphorescence). ) Is effective in EL elements.

0505A schematic diagram of an EL element having a configuration different from that of FIGS. 72 (A), 72 (B) and 72 (C) is shown. Shown in 72 (D). The same parts as those in FIGS. 72 (A), 72 (B) and 72 (C) are the same. The same reference numerals are used, and the description thereof will be omitted.

0506In FIG. 72 (D), the highest occupied molecular orbital and the lowest empty molecular orbital are compared with the electron transport material. The region where the electron blocking material with a large energy difference is added in the mixed region 7205 Has 7208. Region 7208 to which the electron blocking material was added, mixed region 72 By arranging the light emitting material in 05 on the anode 7201 side from the region 7206 to which the light emitting material was added. , The carrier recombination rate can be increased and the luminous efficiency can be increased. Above, electronic blocking The configuration in which the region 7208 to which the sex material is added is provided, in particular, is emitted by triplet excitons (phosphorescence). ) Is effective in EL elements.

050772 (E) is what is FIG. 72 (A), FIG. 72 (B), FIG. 72 (C) and FIG. 72 (D). It is a schematic diagram which shows the structure of the EL element of a different mixed junction type. In Fig. 72 (E), the EL element An example of the configuration having the region 7209 to which the metal material is added is shown in the part of the EL layer in contact with the electrode. .. In FIG. 72 (E), the same parts as those in FIGS. 72 (A) to 72 (D) are shown using the same reference numerals. However, the explanation is omitted. The configuration shown in FIG. 72 (E) is, for example, MgAg as cathode 7202. (Mg-Ag alloy) was used on the cathode 7202 in the region 7204 where the electron transport material was added. Even if the configuration has a region 7209 to which an Al (aluminum) alloy is added to the contact region. Good. The above configuration prevents oxidation of the cathode and enhances the efficiency of electron injection from the cathode. Can be In this way, the life of the mixed junction type EL element can be extended. To. Moreover, the drive voltage can also be lowered.

0508A co-deposited method or the like can be used as a method for producing the mixed bonding type EL element. ..

0509In the mixed junction type EL element as shown in FIGS. 72 (A) to 72 (E), a clear layer boundary is formed. There are no surfaces and charge accumulation can be reduced. In this way, to extend its life Can be done. Moreover, the drive voltage can also be lowered.

0510The configurations shown in FIGS. 72 (A) to 72 (E) can be freely combined and implemented. Is possible.

0511The configuration of the mixed-junction type EL element is not limited to this. Freely use known configurations Can be

0512The organic material constituting the EL layer of the EL element may be a low molecular weight material or a high molecular weight material. I. Moreover, you may use both of these materials. Use low molecular weight material as organic compound material In that case, a film can be formed by a thin film deposition method. On the other hand, a polymer material is used as the EL layer. In some cases, the polymer material is dissolved in a solvent and a film is formed by a spin coating method or an inkjet method. Can be done.

0513Further, the EL layer may be made of a medium molecular weight material. In the present specification, medium A molecular organic light emitting material is an organic light emitting material that does not have sublimation properties and has a degree of polymerization of about 20 or less. Shall indicate. When using a medium molecular weight material as the EL layer, use an inkjet method, etc. A film can be formed.

0514A low molecular weight material, a high molecular weight material, and a medium molecular weight material may be used in combination.

0515Further, even if the EL element uses light emission (fluorescence) from a singlet exciton, it is triplet excited. Either one that uses light emission (phosphorescence) from the child may be used.

0516Next, refer to the drawings for a vapor deposition apparatus for manufacturing a display device to which the present invention can be applied. I will explain.

0517The display device to which the present invention can be applied may be manufactured by forming an EL layer. The EL layer is It is formed by containing at least a part of a material that expresses coutrol luminescence. EL layer is functional It may be composed of a plurality of different layers. In that case, the EL layer is a hole injection transport layer, a light emitting layer, It may be composed of a combination of layers having different functions, which are also called electron injection transport layers. ..

0518Fig. 7 shows the configuration of a thin-film deposition device for forming an EL layer on an element substrate on which a transistor is formed. Shown in 3. In this thin-film deposition apparatus, a plurality of processing chambers are connected to the transport chambers 7360 and 7361. In the processing chamber, a load chamber 7362 for supplying the substrate, an unload chamber 7363 for collecting the substrate, In addition, heat treatment room 7368, plasma treatment room 7372, film formation processing room for depositing EL materials. 7369, 7370, 7371, 7373, 7374, 7375, one electrode of EL element As a film forming treatment chamber for forming aluminum or a conductive film containing aluminum as a main component. Contains 7376. In addition, gate valves 7377a to 73 are located between the transport chamber and each processing chamber. 77 liters are provided, and the pressure in each processing chamber can be controlled independently, and the pressure between the processing chambers can be controlled independently. Prevents mutual pollution.

0519The board introduced from the load chamber 7362 to the transport chamber 7360 is rotatably provided. It is carried into a predetermined processing room by the transportation means 7366 of the method. In addition, the substrate is a transport means 7 According to 366, it is transported from one processing room to another. Transport room 7360 and transport room 736 1 is connected by the film forming processing chamber 7370, where the transport means 7366 and the transport means 7376 are used. The board is delivered.

0520Each processing chamber connected to the transport chamber 7360 and the transport chamber 7361 is maintained in a reduced pressure state. Therefore, in this thin-film deposition apparatus, the EL layer is continuously deposited without exposing the substrate to the atmosphere. Will be The display panel after the film formation process of the EL layer may be deteriorated by water vapor or the like. Therefore, in this thin-film deposition equipment, a sealing process is performed before exposure to the atmosphere in order to maintain quality. The sealing processing chamber 7365 for the purpose is connected to the transport chamber 7361. Sealing chamber 7365 is large Since it is placed under atmospheric pressure or a reduced pressure close to that, the transport chamber 7361 and the sealing processing chamber 736 An intermediate processing chamber 7364 is also provided between 5. Intermediate processing chamber 7364 delivers the board And, it is provided to buffer the pressure between the chambers.

0521Exhaust to keep the room under reduced pressure in the load room, unload room, transfer room and film formation processing room Means are provided. Exhaust means include dry pumps, turbo molecular pumps, and diffusion pumps. Various vacuum pumps such as pumps can be used.

0522In the vapor deposition apparatus shown in FIG. 73, the processing chamber connected to the transport chamber 7360 and the transport chamber 7361 The number and its configuration can be appropriately combined according to the laminated structure of the EL elements. less than, An example of the combination is shown.

0523The heat treatment chamber 7368 first heats the substrate on which the lower electrode, the insulating partition wall, etc. are formed to remove the gas. Perform processing. In the plasma processing room 7372, the surface of the base electrode is treated with noble gas or oxygen plasma. Do. This plasma treatment cleans the surface, stabilizes the surface condition, and makes the surface physical or physical. This is done to stabilize the scientific state (for example, work function).

0524The film forming processing chamber 7369 forms an electrode buffer layer in contact with one electrode of the EL element. It is a science room. The electrode buffer layer is carrier-injectable (hole injection or electron injection), and E This layer suppresses the occurrence of short circuits and dark spot defects in the L element. Typically, the electrode buffer layer is present. Machine-inorganic mixed material with resistivity of 5 x 10⁴~1×10⁶Ωcm, 30 ~ 300 Formed to a thickness of nm. The film forming processing chamber 7371 is a processing chamber for forming a hole transport layer. To.

0525The light emitting layer in the EL element is composed of a case where it emits monochromatic light and a case where it emits white light. Is different. It is preferable that the film forming processing chamber is arranged accordingly in the vapor deposition apparatus. For example , When forming three types of EL elements with different emission colors on the display panel, correspond to each emission color. It is necessary to form a light emitting layer. In this case, the film forming processing chamber 7370 is used for forming the first light emitting layer. As a result, the film forming processing chamber 7373 is used for forming a film of the second light emitting layer, and the film forming processing chamber 7374 is used as a third. It can be used for film formation of the light emitting layer of. By separating the film formation processing chamber for each light emitting layer, Mutual contamination by different luminescent materials can be prevented, improving the throughput of film formation processing. Can be made.

0526In addition, it is that of the film formation processing room 7370, the film formation processing room 7373, and the film formation processing room 7374. Three types of EL materials having different emission colors may be vapor-deposited in sequence. In this case, use a shadow mask The mask is shifted according to the area to be vapor-deposited, and the vapor deposition is performed.

0527When forming an EL element that emits white light, light emitting layers of different emission colors are vertically stacked. To do. Even in that case, the element substrate moves sequentially through the film forming processing chamber to form a film for each light emitting layer. Can be done. Further, different light emitting layers can be continuously formed in the same film forming processing chamber.

0528In the film forming processing chamber 7376, an electrode is formed on the EL layer. Electrode formation is electron beam steaming Although the dressing method and the sputtering method can be applied, the resistance heating vapor deposition method is preferably used. Is preferable.

0529The element substrate, which has been formed up to the electrode, is transferred to the sealing processing chamber 7365 via the intermediate processing chamber 7364. It will be carried in. The sealing chamber 7365 contains helium, argon, neon, nitrogen, etc. It is filled with an inert gas and sealed on the side where the EL layer of the device substrate is formed in that atmosphere. A plate is attached and sealed. In the sealed state, there is no activity between the element substrate and the sealing plate. It may be filled with a sex gas or may be filled with a resin material. Sealing chamber 736 5 is a dispenser that draws a sealing material and a solid that fixes the sealing plate facing the element substrate. Mechanical elements such as fixed stages and arms, dispensers or spices filled with resin material It is equipped with an incoater.

0530FIG. 74 shows the internal configuration of the film formation processing chamber. The film formation processing chamber is kept under reduced pressure, as shown in Fig. 74 Then, the inside between the top plate 7491 and the bottom plate 7492 is the room, and the room is kept under reduced pressure. Is shown.

0531The treatment chamber is provided with one or more evaporation sources. Multiple layers with different compositions When forming a film or co-depositing different materials, it is preferable to provide a plurality of evaporation sources. Because. In FIG. 74, the evaporation sources 7481a, 7481b, 7481c are the evaporation source holders 7. It is attached to 480. Evaporation source holder 7480 is held by articulated arm 7843 It has been. The articulated arm 7843 moves the position of the evaporation source holder 7480 by expanding and contracting the joints. It is possible to move freely within the movable range. In addition, the distance sensor on the evaporation source holder 7480 -7482 is provided to monitor the distance between the evaporation sources 7481a to 7481c and the substrate 7489. Therefore, the optimum interval during vapor deposition may be controlled. In that case, the articulated arm is up and down It may be an articulated arm that also displaces in the direction (Z direction).

0532The board stage 7486 and the board chuck 7487 form a pair to fix the board 7489. .. The board stage 7486 has a built-in heater so that the board 7489 can be heated. Is also good. The board 7489 is fixed to the board stage 7486 by the board chuck 7487. It will be carried in and out again. When depositing, openings corresponding to the pattern to be vapor-deposited as needed It is also possible to use a shadow mask 7490 equipped with. In that case, shadow mask 74 90 is arranged between the substrate 7489 and the evaporation sources 7481a-7481c. Shi The shadow mask 7490 is in close contact with or one with the substrate 7489 by the mask chuck 7488. It is fixed at regular intervals. If shadow mask 7490 alignment is required , Place the camera in the processing room and move the mask chuck 7488 in the XY-θ direction. By providing a deciding means, the alignment is performed.

0533The evaporation source 7481 is provided with a vapor deposition material supply means for continuously supplying the vapor deposition material to the evaporation source. It has been. The thin-film deposition material supply means is located at a location distant from the evaporation source 7481. It has 485a, 7485b, 7485c and a material supply pipe 7484 that connects them. There is. Typically, the material sources 7485a, 7485b, 7485c are at the evaporation source 7481. Correspondingly provided. In the case of Figure 74, the material source 7485a and the evaporation source 7481a It corresponds. Material source 7485b and evaporation source 7481b, material source 7485c and evaporation The same is true for source 7481c.

0534An air flow transfer method, an aerosol method, or the like can be applied to the supply method of the thin-film deposition material. Airflow transport The method is to transport the fine powder of the vapor deposition material on an air flow, and evaporate using an inert gas or the like. Transport to source 748. The aerosol method is a source in which the vapor deposition material is dissolved or dispersed in a solvent. The liquid is transported, aerosolized by a sprayer, and the solvent in the aerosol is vaporized. It is thin-film deposition. In either case, the evaporation source 7481 is provided with a heating means and is transported by steam. The landing material is evaporated to form a film on the substrate 7489. In the case of Figure 74, the material supply pipe 7484 is flexible. It is composed of a thin tube that can be bent into a thin tube with rigidity that does not deform even under reduced pressure. It has been.

0535When applying the air flow transfer method or aerosol method, the pressure in the film formation processing chamber is set to atmospheric pressure or so. The film may be formed under a reduced pressure of 133 Pa to 13300 Pa, which is less than or equal to this. Helium, argon, neon, krypton, xenon, or nitrogen in the film forming chamber Pressure while filling with any inert gas or supplying the gas (while exhausting at the same time) Can be adjusted. In the film formation processing room where the oxide film is formed, oxygen and nitrous oxide A gas such as the above may be introduced to create an oxidizing atmosphere. In addition, a film forming process for depositing organic materials A gas such as hydrogen may be introduced into the laboratory to create a reducing atmosphere.

0536As another method of supplying thin-film deposition material, a screw is provided in the material supply pipe 7484 for thin-film deposition. The material may be continuously extruded toward the evaporation source.

0537According to this thin-film deposition apparatus, even a large-screen display panel can be continuously deposited with good uniformity. Can be In addition, every time the evaporation source runs out of the vapor deposition material, the vapor deposition material is replenished each time. Throughput can be improved because there is no need.

0538(Embodiment 11) In the present embodiment, the signal line drive included in the display device shown in the first to eighth embodiments. The circuit will be described.

0539The signal line drive circuit of FIG. 56 will be described. The signal line drive circuit shown in FIG. 56 is the driver I. C5601, switch group 5602_1 ~ 5602_M, first wiring 5611, second wiring It has 5612, a third wire 5613 and wires 5621_1 to 5621_M. Also, Itch group 5602_1 ~ 5602_M, respectively, the first switch 5603a and the second switch It has a switch 5603b and a third switch 5603c.

0540The driver IC5601 has the first wiring 5611, the second wiring 5612, and the third wiring 5613. And it is connected to wiring 5621_1 to 5621_M. And switch group 5602_ 1 to 5602_M, respectively, 1st wiring 5611, 2nd wiring 5612, 3rd wiring 5 Wiring 5621_1 corresponding to 613 and switch group 5602_1 to 5602_M respectively Connected to one of ~ 5621_M. And wiring 5621_1 ~ 5621 _M The first switch 5603a, the second switch 5603b and the third switch, respectively. It is connected to three signal lines via a switch 5603c. For example, wiring 562 in row J 1_J (any one of wiring 5621_1 to wiring 5621_M) is the switch group 560. 2_J has 1st switch 5603a, 2nd switch 5603b and 3rd switch It is connected to the signal line Sj-1, the signal line Sj, and the signal line Sj + 1 via the 5603c. ..

0541The driver IC5601 is mounted on a glass substrate using a single crystal substrate or a polycrystalline semiconductor. It is desirable that it is formed in. In addition, the switch group 5602_1 to 5602_M is actually It is desirable that the pixels are formed on the same substrate as the pixel portions shown in the first to eighth embodiments of the application. I. Therefore, the driver IC5601 and the switch group 5602_1 to 5602_M are F. It is good to connect via a PC or the like.

0542Next, regarding the operation of the signal line drive circuit shown in FIG. 56, refer to the timing chart of FIG. 57. I will explain it in the light. In the timing chart of FIG. 57, the scanning line Gi on the i-th line is selected. The timing chart when is shown. Also, the selection period of the scan line Gi on the i-th line is , 1st sub-selection period T1, 2nd sub-selection period T2 and 3rd sub-selection period T3 Has been done. Note that the signal line drive circuit of FIG. 56 is when the scanning lines of other lines are selected. Also operates in the same way as in FIG. 57.

0543Signals are input to the first wiring 5611, the second wiring 5612, and the third wiring 5613. Has been done. The signal input to the first wire 5611 of the first switch 5603a On and off are controlled. Second switch by the signal input to the second wire 5612 The on and off of the 5603b is controlled. Depending on the signal input to the third wire 5613 The on and off of the third switch 5603c is controlled.

0544In the timing chart of FIG. 57, the wiring 5621_J in the Jth column is the first switch 56. 03a, signal line Sj via second switch 5603b and third switch 5603c -1, The case where it is connected to the signal line Sj and the signal line Sj + 1 is shown.

0545In the timing chart of FIG. 57, the timing at which the scanning line Gi on the i-th row is selected, 1 switch 5603a on and off timing 5703a, 2nd switch 560 3b on and off timing 5703b, 3rd switch 5603c on and off The signal 5721_J input to the timing 5703c and the wiring 5621_J in the Jth column Shown.

0546For wiring 5621_1 to wiring 5621_M, the first sub-selection period T1 and the second sub-selection In the selection period T2 and the third sub-selection period T3, different video signals are input. There is. For example, the video message input to the wiring 5621_J during the first subselection period T1. The number is input to the signal line Sj-1 and enters the wiring 5621_J in the second subselection period T2. The video signal to be powered is input to the signal line Sj and wired 56 in the third subselection period T3. The video signal input to 21_J is input to the signal line Sj + 1. Also, the first sub-selection Wiring 5621 in period T1, second subselection period T2 and third subselection period T3 The video signals input to _J are Dataj-1, Dataj, Dataj + 1, respectively. To do.

0547As shown in FIG. 57, the first switch 5603a is turned on during the first subselection period T1. Then, the second switch 5603b and the third switch 5603c are turned off. At this time, Dataj-1 input to wiring 5621_J is transmitted via the first switch 5603a. Input to line Sj-1. In the second subselection period T2, the second switch 5603b Turns on and turns off the first switch 5603a and the third switch 5603c. With this Then, the Dataj input to the wiring 5621_J is transmitted via the second switch 5603b. Input to line Sj. In the third subselection period T3, the third switch 5603c is on. Then, the first switch 5603a and the second switch 5603b are turned off. At this time, Dataj + 1 input to wiring 5621_J is transmitted via the third switch 5603c. Input to line Sj + 1.

0548From the above, in the signal line drive circuit of FIG. 56, one gate selection period is divided into three. , Input video signal to 3 signal lines from 1 wire 5621 during 1 gate selection period Can be done. Therefore, in the signal line drive circuit of FIG. 56, the driver IC5601 is formed. The number of connections between the board and the board on which the pixel part is formed is reduced to about 1/3 of the number of signal lines. be able to. By reducing the number of connections to about 1/3, the signal line drive circuit in Fig. 56 is reliable. Gender, yield, etc. can be increased.

0549The signal line drive circuit of the present embodiment is applied to the display devices shown in the first to eighth embodiments. By doing so, the number of connections between the substrate on which the pixel portion is formed and the external substrate can be further reduced. Can be done. Therefore, the display device of the present invention can improve reliability and yield. Wear.

0550Then the first switch 5603a, the second switch 5603b and the third switch 560 A case where an N-channel transistor is applied to 3c will be described with reference to FIG. 59. Items similar to those in FIG. 56 are shown using a common code, and have the same parts or similar functions. A detailed description of the portion having the above will be omitted.

0551The first transistor 5903a corresponds to the first switch 5603a and the second transistor The data 5903b corresponds to the second switch 5603b, and the third transistor 5903c is the second. Corresponds to switch 5603c in 3.

0552For example, in the case of the switch group 5602_J, the first terminal of the first transistor 5903a is It is connected to the wiring 5621_J, the second terminal is connected to the signal line Sj-1, and the gate electrode is the first. It is connected to the wiring 5611 of. In the second transistor 5903b, the first terminal is wired 5 It is connected to 621_J, the second terminal is connected to the signal line Sj, and the gate electrode is the second wiring 56. Connected to 12. In the third transistor 5903c, the first terminal is wired 5621_J. The second terminal is connected to the signal line Sj + 1, and the gate electrode is connected to the third wire 5613. It is connected.

0553The first transistor 5903a, the second transistor 5903b, and the third transistor Each star 5903c functions as a switching transistor. Also, the first Langista 5903a, 2nd transistor 5903b, 3rd transistor 5903c Is turned on when the signal input to the gate electrode is H level, and is turned on to the gate electrode. It turns off when the input signal is at L level.

0554The first switch 5603a, the second switch 5603b, and the third switch 560 By using an N-channel transistor as 3c, the semiconductor layer of the transistor Since amorphous silicon can be used as a product, the manufacturing process should be simplified. This makes it possible to reduce manufacturing costs and improve yields. In addition, a large display panel It is also possible to manufacture semiconductor devices such as flannel. Also, as a semiconductor layer of a transistor Therefore, the manufacturing process can be simplified by using polysilicon or single crystal silicon. Shi Therefore, the signal line drive circuit of FIG. 59 is applied to the display devices of the first to fourth embodiments. Is desirable.

0555In the signal line drive circuit of FIG. 59, the first transistor 5903a and the second transistor 59 03b, when an N-channel transistor is used as the third transistor 5903c The first transistor 5903a, the second transistor 5903b, A P-channel type transistor may be used as the third transistor 5903c. this At that time, the transistor is turned on when the signal input to the gate electrode is at L level, and the game It turns off when the signal input to the electrode is H level. The first transistor 59 03a, 2nd transistor 5903b, 3rd transistor 5903c as P channel When a Le-shaped transistor is used, it is applied to the display device of the 5th to 8th embodiments. Is desirable.

0556As shown in FIG. 56, one gate selection period is divided into a plurality of sub-selection periods, and a plurality of sub-selections are performed. Input video signals to each of multiple signal lines from one wire in each selection period If possible, the arrangement and number of switches, the driving method, etc. are not limited. For example, 3 or more Video transmission from one wire to each of three or more signal lines in each of the above subselection periods When inputting the number, the switch and the wiring for controlling the switch may be added. Ta However, if one gate selection period is divided into four or more sub-selection periods, one sub-selection period will be It gets shorter. Therefore, one gate selection period should be divided into two or three sub-selection periods. Is desirable.

0557For example, as shown in the timing chart of FIG. 58, one selection period is a precharge period. Minutes to Tp, 1st subselection period T1, 2nd subselection period T2, 3rd subselection period T3 You may split it. In the timing chart of FIG. 58, the scanning line Gi on the i-th line is selected. Timing, 1st switch 5603a on and off timing 5803a, 2nd Switch 5603b on and off timing 5803b, 3rd switch 5603c On and off timing 5803c and the signal input to the J-th row wiring 5621_J It shows 5821_J. As shown in FIG. 58, the first in the precharge period Tp Switch 5603a, 2nd switch 5603b and 3rd switch 5603c are on Become. At this time, the precharge voltage Vp input to the wiring 5621_J is the first switch. 5603a, via second switch 5603b and third switch 5603c, respectively Input to signal line Sj-1, signal line Sj, and signal line Sj + 1. In the first sub-selection period T1 Then the first switch 5603a is turned on, the second switch 5603b and the third switch Chi 5603c is turned off. At this time, Dataj-1 input to wiring 5621_J is , Is input to the signal line Sj-1 via the first switch 5603a. Second sub-selection period At T2, the second switch 5603b is turned on, the first switch 5603a and the third switch Itch 5603c is turned off. At this time, the Dataj input to the wiring 5621_J is , Is input to the signal line Sj via the second switch 5603b. Third sub-selection period T3 Now, the third switch 5603c is turned on, the first switch 5603a and the second switch Chi 5603b is turned off. At this time, Dataj + 1 input to wiring 5621_J is , Is input to the signal line Sj + 1 via the third switch 5603c.

0558From the above, the signal line drive times of FIG. 56 operated as shown in the timing chart of FIG. 58. The road pre-populates the signal line by providing a precharge selection period before the sub-selection period. Since it can be jerked, the video signal can be written to the pixels at high speed. Also, Shin Since the line is precharged, the pixels can hold an accurate video signal. Of course, the signal line drive circuit of FIG. 56 operated as shown in the timing chart of FIG. 58 Similar to the signal line drive circuit of FIG. 56 operated as shown in the timing chart of FIG. 57, the driver A signal line indicating the number of connections between the substrate on which the Iba IC5601 is formed and the substrate on which the pixel portion is formed. It can be reduced to about 1/3 compared to the number of, and the number of connections is reduced to about 1/3, so reliability , Yield can be increased. In addition, the same reference numerals as those in FIG. 57 The detailed description of the same part or the part having the same function will be omitted.

0559Also in FIG. 60, as shown in FIG. 56, one gate selection period is divided into a plurality of sub-selection periods. Video from one wire to each of multiple signal lines in each of multiple subselect periods A signal can be input. Note that FIG. 60 shows the switch in the Jth row of the signal line drive circuit. Only group 6022_J is shown. The switch group 6022_J is the first transistor 60. 01, 2nd transistor 6002, 3rd transistor 6003, 4th transistor It has 6004, a fifth transistor 6005, and a sixth transistor 6006. No. 1 transistor 6001, 2nd transistor 6002, 3rd transistor 6003 , 4th transistor 6004, 5th transistor 6005, 6th transistor 60 06 is an N-channel type transistor. Switch group 6022_J is the first wiring 60 11, 2nd wiring 6012, 3rd wiring 6013, 4th wiring 6014, 5th wiring 60 15, 6th wiring 6016, wiring 5621_J, signal line Sj-1, signal line Sj, signal line S Connected to j + 1.

0560The first terminal of the first transistor 6001 is connected to the wiring 5621_J, and the second terminal is a signal. It is connected to wire Sj-1 and the gate terminal is connected to the first wire 6011. Second tiger The first terminal of the engineer 6002 is connected to the wiring 5621_J, and the second terminal is the signal line Sj-1. The gate terminal is connected to the second wire 6012. Third transistor 6 The first terminal of 003 is connected to the wiring 5621_J, and the second terminal is connected to the signal line Sj. The terminal is connected to the third wire 6013. First end of fourth transistor 6004 The child is connected to the wiring 5621_J, the second terminal is connected to the signal line Sj, and the gate terminal is the fourth. It is connected to the wiring 6014. The first terminal of the fifth transistor 6005 is wiring 562 It is connected to 1_J, the second terminal is connected to the signal line Sj + 1, and the gate terminal is the fifth wiring 60. Connected to 15. The first terminal of the sixth transistor 6006 is connected to the wiring 5621_J. The second terminal is connected to the signal line Sj + 1, and the gate terminal is connected to the sixth wiring 6016. Has been done.

0561The first transistor 6001, the second transistor 6002, and the third transistor 6003, 4th transistor 6004, 5th transistor 6005, 6th transition Each of the Star 6006 functions as a switching transistor. Also, the first tiger Engineer 6001, 2nd transistor 6002, 3rd transistor 6003, 4th Transistor 6004, fifth transistor 6005, sixth transistor 6006, When the signal input to the gate terminal is H level, it is turned on and input to the gate terminal. It turns off when the signal to be output is L level.

0562The first wiring 6011 and the second wiring 6012 are in phase with the first wiring 5911 in FIG. Hit. The third wire 6013 and the fourth wire 6014 are connected to the second wire 5912 in FIG. Equivalent to. The fifth wiring 6015 and the sixth wiring 6016 are the third wiring 5913 of FIG. 59. Corresponds to. The first transistor 6001 and the second transistor 6002 are shown in the figure. Corresponds to the first transistor 5903a of 59. 3rd transistor 6003 and 4th Transistor 6004 corresponds to the second transistor 5903b in FIG. 59. Fifth Transistor 6005 and sixth transistor 6006 are the third transistor in FIG. 59. Corresponds to 5903c.

0563In FIG. 60, the first transistor 600 in the first subselection period T1 shown in FIG. 57. Either the first or second transistor 6002 is turned on. In the second sub-selection period T2 Then either the third transistor 6003 or the fourth transistor 6004 is on. Become. In the third subselection period T3, the fifth transistor 6005 or the sixth transition Either Star 6006 is turned on. Also, during the precharge period Tp shown in Fig. 58. First transistor 6001, third transistor 6003 and fifth transistor 6005 or 2nd transistor 6002, 4th transistor 6004 and 6th tiger Either the engineer 6006 is turned on.

0564Therefore, in FIG. 60, the on-time of each transistor can be shortened, so that each transistor can be shortened. It is possible to suppress the deterioration of the characteristics of the Langista. Because, for example, the first shown in FIG. 57 During the subselection period T1, the first transistor 6001 or the second transistor 60 If either of 02 is turned on, the video signal can be input to the signal line Sj-1. Is. For example, in the first subselection period T1 shown in FIG. 57, the first transition By turning on the star 6001 and the second transistor 6002 at the same time, the speed is increased. A video signal can also be input to the signal line Sj-1.

0565The first transistor 6001, the third transistor 6003, and the fifth transistor Data 6005, 2nd transistor 6002, 4th transistor 6004 and 6th transistor Transistors by using N-channel transistors as the engineer 6006 Amorphous silicon can be used as the semiconductor layer of the data, which simplifies the manufacturing process. This is because it is possible to reduce the manufacturing cost and improve the yield. .. Further, it is possible to manufacture a semiconductor device such as a large display panel. It is also possible to use polysilicon or single crystal silicon as the semiconductor layer of the transistor. It can be simplified as much as possible. Therefore, the signal line drive circuit of FIG. 60 is the first embodiment. It is desirable to apply it to the display device of the fourth embodiment.

0566In FIG. 60, two transistors are connected in parallel between the wiring 5621 and the signal line. The case was explained. However, it is not limited to this, and wiring three or more transistors 56 It may be connected in parallel between 21 and the signal line. By doing this, each transistor Deterioration of characteristics can be suppressed.

0567The signal line drive circuit shown in this embodiment is a table shown in other embodiments in the present specification. It can be implemented in any combination with the configuration of the display device. Moreover, it was shown in this embodiment. The configuration of the signal line drive circuit can also be freely combined and implemented.

0568(Embodiment 12) In the present embodiment, the display device shown in the first to eighth embodiments is not caused by electrostatic breakdown. The configuration for preventing goodness will be described.

0569Electrostatic destruction means that positive or negative charges accumulated in the human body or an object touch a semiconductor device. At that time, a large current is generated inside the device by being instantly discharged via the input / output terminals of the device. It is the destruction that occurs when it flows.

0570Fig. 61 (A) shows the structure for preventing electrostatic breakdown generated in the scanning line by the protection diode. Shows success. In FIG. 61 (A), the protection diode is arranged between the wiring 6111 and the scanning line. It is made. Although not shown, a plurality of pixels are connected to the scanning line Gi on the i-th line. .. A transistor 6101 is used as the protection diode. In addition, the transistor The 6101 is an N-channel type transistor. However, P-channel type transistors The polarity of the transistor 6101 may be used, and the polarity of the scanning line drive circuit or pixel has. The same polarity as that of the data may be used.

0571Although only one protection diode is arranged, multiple protection diodes are arranged in series. It may be arranged, it may be arranged in parallel, or it may be arranged in series-parallel. ..

0572Transistor 6101 has the first terminal connected to the scanning line Gi on the i-th line, and the second terminal is the wiring 61. It is connected to 11 and the gate terminal is connected to the scanning line Gi on the i-th line.

0573The operation of FIG. 61 (A) will be described. A certain potential is input to the wiring 6111, and that The potential of is lower than the L level of the signal input to the scanning line Gi on the i-th line. Masamata If the negative charge is not discharged to the scan line Gi on the i-th line, the potential of the scan line Gi on the i-th line is Since it is H level or L level, transistor 6101 is turned off. On the other hand, negative When the electric charge is discharged to the scan line Gi on the i-th line, the potential of the scan line Gi on the i-th line drops momentarily. To. At this time, the potential of the scanning line Gi on the i-th line is from the potential of the wiring 6111 to the transistor 610. When it becomes lower than the value obtained by subtracting the threshold voltage of 1, the transistor 6101 is turned on and the electric power is turned on. The flow flows through the transistor 6101 to the wiring 6111. Therefore, in Figure 61 (A) With the configuration shown, it is possible to prevent a large current from flowing into the pixel, so that the pixel is electrostatically charged. Destruction can be prevented.

0574Note that FIG. 61 (B) shows that electrostatic breakdown is prevented when a positive charge is discharged to the scanning line Gi on the i-th line. It is a configuration to stop. Transistor 6102 that functions as a protection diode is a scanning line It is located between and the wiring 6112. In addition, only one protection diode is arranged However, a plurality of protection diodes may be arranged in series or in parallel. It may be arranged in series or parallel. The transistor 6102 is an N-channel type. Transistor. However, a P-channel type transistor may be used, and the transition The polarity of the star 6102 is similar to the polarity of the transistor in the scanning line drive circuit and pixels. You can use it. Transistor 6102 has the first terminal connected to the scanning line Gi on the i-th line, and the second terminal. The terminal is connected to wire 6112 and the gate terminal is connected to wire 6112. In addition, distribution Line 6112 has a potential higher than the H level of the signal input to the scan line Gi on line i. Has been done. Therefore, in transistor 6102, the charge is discharged to the scan line Gi on the i-th line. If not, it will be turned off. On the other hand, the field where the positive charge is discharged to the scanning line Gi on the i-th line. In that case, the potential of the scanning line Gi on the i-th line rises momentarily. At this time, the electric power of the scanning line Gi on the i-th line When the position becomes higher than the sum of the potential of the wiring 6112 and the threshold voltage of the transistor 6102 , Transistor 6102 is turned on and current is wired through transistor 6102 611 Flow to 2. Therefore, due to the configuration shown in FIG. 61 (B), a large current flows into the pixel. Therefore, it is possible to prevent electrostatic destruction of pixels.

0575As shown in FIG. 61 (C), the configuration is a combination of FIG. 61 (A) and FIG. 61 (B). By doing so, even if the positive charge is discharged to the scanning line Gi on the i-th line, the negative charge is on the i-th line. Even when the scanning line Gi is discharged, electrostatic destruction of the pixels can be prevented. Note that Fig. 6 1 (A) and (B) are shown using a common code, and the same part or the same A detailed description of the functional portion will be omitted.

0576FIG. 62 (A) shows the scanning line and the holding capacity of the transistor 6201 that functions as a protection diode. The configuration when connected to the meter line is shown. In addition, only one protection diode is arranged However, a plurality of protection diodes may be arranged in series or in parallel. It may be arranged in series or parallel. The transistor 6201 is an N-channel type. Transistor. However, a P-channel type transistor may be used, and the transition The polarity of the star 6201 is similar to the polarity of the transistor in the scanning line drive circuit and pixels. You can use it. The wiring 6211 functions as a holding capacitance line. Transistor 620 The first terminal of 1 is connected to the scanning line Gi on the i-th line, and the second terminal is connected to the wiring 6211. The electrode is connected to the scanning line Gi on the i-th line. In addition, in wiring 6211, the run of the i-line A potential lower than the L level of the signal input to the inspection line Gi is input. Therefore, The Langista 6201 is turned off if the charge is not discharged to the scan line Gi on line i. Become. On the other hand, when a negative charge is discharged to the scanning line Gi on the i-th row, the electric charge on the scanning line Gi on the i-th row The rank drops momentarily. At this time, the potential of the scanning line Gi on the i-th line is changed from the potential of the wiring 6211. When it becomes lower than the value obtained by subtracting the threshold voltage of the Langista 6201, the transistor 6201 Is turned on, and current flows through the transistor 6201 to the wiring 6211. Therefore , The configuration shown in FIG. 62 (A) can prevent a large current from flowing into the pixel. Therefore, electrostatic destruction of pixels can be prevented. Further, in the configuration shown in FIG. 62 (A), Since the holding capacitance wire is used as wiring to release the electric charge, it is not necessary to add a new wiring. I.

0577Note that FIG. 62 (B) shows that electrostatic breakdown is prevented when a positive charge is discharged to the scanning line Gi on the i-th line. It is a configuration to stop. Here, the wiring 6211 is input to the scanning line Gi on the i-th line. A potential higher than the H level of the signal is input. Therefore, transistor 6202 Is off if the charge has not been discharged to the scan line Gi on line i. On the other hand, positive electricity When the load is discharged to the scan line Gi on the i-th line, the potential of the scan line Gi on the i-th line rises momentarily. To. At this time, the potential of the scanning line Gi on the i-th line is the potential of the wiring 6211 and the transistor 6202. When it becomes higher than the sum of the threshold voltage of, the transistor 6202 is turned on and the current is turned on. It flows to the wiring 6211 via the Langista 6202. Therefore, it is shown in FIG. 62 (B). Depending on the configuration, it is possible to prevent a large current from flowing into the pixel, thus preventing electrostatic breakdown of the pixel. Can be prevented. Further, in the configuration shown in FIG. 62 (A), the charge is released from the retained capacitance line. Since it is used as wiring, there is no need to add new wiring. In addition, FIG. 62 (B) Items similar to the above are indicated using a common code, and the same part or a part having the same function is used. The detailed description of is omitted.

0578Next, the configuration for preventing electrostatic breakdown generated in the signal line by the protection diode is shown in Fig. 64. Shown in (A). In Figure 64 (A), the protection diode is placed between the wiring 6411 and the signal line. This is the configuration when Although not shown, multiple pixels are connected to the signal line Sj in the jth column. It has been. A transistor 6401 is used as the protection diode. In addition, tiger The engineer 6401 is an N-channel transistor. However, P-channel type tran A gista may be used, and the polarity of the transistor 6401 is the same as that of the signal line drive circuit or the pixel. The same polarity as that of the Langista may be used.

0579Although only one protection diode is arranged, multiple protection diodes are arranged in series. It may be arranged, it may be arranged in parallel, or it may be arranged in series-parallel. ..

0580Transistor 6401 has the first terminal connected to the signal line Sj in the jth row, and the second terminal is wired 64. It is connected to 11 and the gate terminal is connected to the signal line Sj in the jth row.

0581The operation of FIG. 64 (A) will be described. A certain potential is input to the wiring 6411, and that The potential of is lower than the minimum value of the video signal input to the signal line Sj in the jth column. If the positive or negative charge is not discharged to the signal line Sj in the jth column, the electric charge in the signal line Sj in the jth column Since the position is the same potential as the video signal, the transistor 6401 is turned off. On the other hand, negative electricity When the load is discharged to the signal line Sj in the j-th row, the potential of the signal line Sj in the j-th row drops momentarily. .. At this time, the potential of the signal line Sj in the jth column is from the potential of the wiring 6411 to the transistor 6401. When the value becomes lower than the value obtained by subtracting the threshold voltage of, the transistor 6401 is turned on and the current is turned on. Flows to wire 6411 via transistor 6401. Therefore, it is shown in Fig. 64 (A). Because of this configuration, it is possible to prevent a large current from flowing into the pixel, so that the pixel is electrostatically damaged. It can prevent breakage.

0582Note that Fig. 64 (B) shows that electrostatic breakdown is prevented when a positive charge is discharged to the signal line Sj in the jth column. It is a configuration to stop. Transistor 6402 that functions as a protection diode is the signal line It is located between and the wiring 6412. In addition, only one protection diode is arranged However, a plurality of protection diodes may be arranged in series or in parallel. It may be arranged in series or parallel. The transistor 6402 is an N-channel type. Transistor. However, a P-channel type transistor may be used, and the transition The polarity of the star 6402 is similar to the polarity of the transistor of the signal line drive circuit and pixels. You can use it. The first terminal of the transistor 6402 is connected to the signal line Sj in the jth row, and the second terminal is connected to the signal line Sj. The terminal is connected to wire 6412 and the gate terminal is connected to wire 6412. In addition, distribution Line 6412 has a potential higher than the maximum value of the video signal input to the signal line Sj in the jth column. It has been entered. Therefore, the transistor 6402 releases the charge to the signal line Sj in the jth column. It is turned off when there is no electricity. On the other hand, the positive charge is discharged to the signal line Sj in the jth column. If so, the potential of the signal line Sj in the jth column rises momentarily. At this time, the signal line in the jth column The potential of Sj is higher than the sum of the potential of wiring 6412 and the threshold voltage of transistor 6402. When it becomes, the transistor 6402 is turned on and the current is distributed via the transistor 6402. It flows on line 6412. Therefore, with the configuration shown in Fig. 64 (B), a large current is applied to the pixels. Since it is possible to prevent the flow from flowing in, it is possible to prevent electrostatic destruction of the pixels.

0583As shown in FIG. 64 (C), the configuration is a combination of FIG. 64 (A) and FIG. 64 (B). By doing so, even if the positive charge is discharged to the signal line Sj in the jth column, the negative charge is in the jth column. Even when the signal line Sj is discharged, electrostatic destruction of the pixels can be prevented. Note that Fig. 6 4 Similar to (A) and (B) are shown using a common code, and the same part or the same. A detailed description of the functional portion will be omitted.

0584In the present embodiment, a configuration for preventing electrostatic destruction of pixels connected to the scanning line and the signal line. Explained. However, the configuration of this embodiment is the electrostatic of the pixels connected to the scanning line and the signal line. It does not just apply to the prevention of destruction. For example, as shown in Embodiment 1 to Embodiment 8. Wiring to which the signal or potential connected to the scanning line drive circuit and signal line drive circuit is input When this embodiment is applied to, electrostatic destruction of the scanning line drive circuit and the signal line drive circuit is prevented. can do.

0585The display device shown in this embodiment is the display device shown in other embodiments in the present specification. It can be implemented in any combination with the configuration of. In addition, the display device shown in this embodiment The configuration of the device can be freely combined and implemented.

0586(Embodiment 13) In the present embodiment, a display device applicable to the display devices shown in the first to eighth embodiments. The new configuration of the device will be described.

0587FIG. 63 (A) shows a diode-connected transistor between one scan line and another. This is the configuration when arranged. In FIG. 63 (A), the scanning lines Gi-1 on the i-1th line and the i-th line A diode-connected transistor 6301a is placed between the scanning line Gi and the run on the i-th line. Transistor 63 diode-connected between the inspection line Gi and the scanning line Gi + 1 on the i + 1 line The configuration when 01b is placed is shown. In addition, transistor 6301a and transition The star 6301b is an N-channel type transistor. However, P-channel type transitions A star may be used, and the polarities of the transistor 6301a and the transistor 6301b are scanned. A line drive circuit or a transistor having the same polarity as that of a pixel may be used.

0588In FIG. 63 (A), the scanning line Gi-1 on the i-1st line and the scanning line Gi on the i-th line are represented. The scan line Gi + 1 on the i + 1 line is shown, but the other scan lines are also diode-connected. Transistors are arranged.

0589The first terminal of transistor 6301a is connected to the scanning line Gi on the i-th line, and the second terminal is i-1. It is connected to the scanning line Gi-1 on the first line, and the gate terminal is connected to the scanning line Gi-1 on the Gi-1 line. It has been. The first terminal of transistor 6301b is connected to the scanning line Gi + 1 on the i + 1 line. , The second terminal is connected to the scanning line Gi on the i-th line, and the gate terminal is connected to the scanning line Gi on the i-th line. It has been.

0590The operation of FIG. 63 (A) will be described. The scanning line drive shown in the first to fourth embodiments. In the dynamic circuit, during the non-selection period, the scan line Gi-1 on the i-1 line, the scan line Gi on the i line, and so on. And the scan line Gi + 1 on the i + 1 line maintains the L level. Therefore, transistor 6 301a and transistor 6301b are turned off. However, for example, for noise Therefore, when the potential of the scanning line Gi on the i-th line rises, the scanning line Gi on the i-th line selects a pixel. Therefore, an invalid video signal is written to the pixel. Therefore, as shown in Fig. 63 (A) By arranging a diode-connected transistor between the scanning lines, the video is invalid for the pixel It is possible to prevent the signal from being written. Because, the potential of the scanning line Gi on the i-th line Is the sum of the potential of the scanning line Gi-1 on the i-1 line and the threshold voltage of the transistor 6301a. When it rises upward, the transistor 6301a turns on and the potential of the scan line Gi on the i-th line decreases. To go. Therefore, the pixel is not selected by the scan line Gi on the i-th line. ..

0591In addition, in the configuration of FIG. 63 (A), in particular, the scanning line drive circuit and the pixel portion are integrally formed on the same substrate. It is advantageous when Because, N-channel type transistor or P-channel type transistor In a scanning line drive circuit consisting only of an engineer, the scanning line may be in a floating state. This is because noise is likely to occur in the scanning line.

0592Note that FIG. 63 (B) shows the orientation of the diode-connected transistors arranged between the scanning lines. This is the configuration when it is reversed. In addition, transistor 6302a and transistor 6302b Is an N-channel transistor. However, even if a P-channel type transistor is used Often, the polarities of transistor 6302a and transistor 6302b are scan line drive circuits and images. The same polarity as the transistor possessed by the element may be used. In Figure 63 (B), Tran The first terminal of the Gista 6302a is connected to the scanning line Gi on the i-th line, and the second terminal is on the i-1th line. It is connected to the scanning line Gi-1 and the gate terminal is connected to the scanning line Gi on the i-th line. Tran The first terminal of Gista 6302b is connected to the scanning line Gi + 1 on the i + 1 line, and the second terminal is the i line. It is connected to the scan line Gi of the eye, and the gate terminal is connected to the scan line Gi + 1 of the i + 1 line. .. In FIG. 63 (B), as in FIG. 64 (A), the potential of the scanning line Gi on the i-th line is the run on the i + 1 line. When it rises above the sum of the potential of the inspection line Gi + 1 and the threshold voltage of the transistor 6302b, The transistor 6302b is turned on, and the potential of the scanning line Gi on the i-th line drops. Therefore , The pixel is not selected by the scan line Gi on the i-th line, and an invalid video signal is sent to the pixel. It can be prevented from being written.

0593As shown in FIG. 63 (C), the configuration is a combination of FIG. 63 (A) and FIG. 63 (B). By doing so, even if the potential of the scanning line Gi on the i-th line rises, the transistor 6301a and the transistor Since the engineer 6302b is turned on, the potential of the scanning line Gi on the i-th line is lowered. Note that Fig. 6 At 3 (C), the current flows through the two transistors, eliminating greater noise. It is possible to do. It should be noted that the same reference numerals as those shown in FIGS. 63 (A) and 63 (B) are used. The detailed description of the same part or the part having the same function will be omitted.

0594As shown in FIGS. 62 (A) and 62 (B), a diode is connected between the scanning line and the holding capacitance line. The same effect as in FIGS. 63 (A), (B), and (C) can be obtained by arranging the successive transistors. Can be done.

0595The display device shown in this embodiment is the display device shown in other embodiments in the present specification. It can be implemented in any combination with the configuration of. In addition, the display device shown in this embodiment The configuration of the device can be freely combined and implemented.

0596(Embodiment 14) In the present embodiment, regarding the configuration of the display panel having the pixel configuration shown in the above embodiment. This will be described with reference to FIGS. 100 (a) and 100 (b).

0597Note that FIG. 100 (a) is a top view showing the display panel, and FIG. 100 (b) is FIG. 100 (a). It is a cross-sectional view cut by A-A'. Signal control circuit 10001 shown by dotted line, pixel section 10 It has 002, a first gate driver 10003, and a second gate driver 10006. It also has a sealing substrate 10004 and a sealing material 10005, and is surrounded by the sealing material 10005. The inside is space 10007.

0598The wiring 10008 is the first gate driver 10003 and the second gate driver 100. This is the wiring for transmitting the signal input to 06 and the signal control circuit 10001, and is externally input. Video signal from FPC (Flexible Print Circuit) 10009, which is a power terminal Receives lock signal, start signal, etc. On the connection between FPC10009 and the display panel Is an IC chip (semiconductor chip with memory circuits, buffer circuits, etc.) 10019 Is implemented by COG (Chip On Glass) etc. In addition, here is FPC Although not shown, this FPC has a printed circuit board (PWB) attached. You may. The display device in the present specification includes not only the display panel body but also the FPC. It also includes the state where the PWB is attached. In addition, IC chips etc. are mounted It shall include the ones that have been used.

0599Next, the cross-sectional structure will be described with reference to FIG. 100 (b). Pixel part on the board 10010 10002 and its peripheral drive circuits (1st gate driver 10003, 2nd gate dry The signal control circuit 10001) and the signal control circuit 10001) are formed, but here, the signal control times. Road 10001 and pixel section 10002 are shown.

0600The signal control circuit 10001 is an N-channel type transistor 10020 or N-channel. It is composed of unipolar transistors such as the transistor 10021, which is a type of transistor. Na By applying the pixel configurations of FIGS. 46, 65, 66 and 67 to the pixel configurations, Pixels can be composed of polar transistors. Therefore, the peripheral drive circuit is N-channel. A unipolar display panel can be manufactured if it is composed of a type transistor. Of course, unipolar Form a CMOS circuit using not only sex transistors but also P-channel transistors May be good.

0601When the transistor 10020 and the transistor 10021 are P-channel type However, if the peripheral drive circuit is composed of P-channel transistors, a unipolar display panel can be created. can do. Of course, not only unipolar transistors but also N-channel transistors A CMOS circuit may also be formed using data.

0602Further, in the present embodiment, a display panel in which peripheral drive circuits are integrally formed on a substrate is shown, but it is essential. There is no need to do so, and all or part of the peripheral drive circuit is formed on an IC chip, etc., and C It may be implemented by OG or the like. In that case, the drive circuit does not need to be unipolar and has N channels. A type transistor and a P-channel type transistor can be used in combination.

0603Further, the pixel unit 10002 has a transistor 10011 and a transistor 10012. ing. The source terminal of the transistor 10012 is the first electrode (pixel electrode) 1001. It is connected with 3. Insulation 10014 forms over the end of the first electrode 10013. It is made. Here, it is formed by using a positive photosensitive acrylic resin film.

0604Also, for good coverage, bend over the top or bottom of insulation 10014. A curved surface having a rate is formed. For example, positive type as a material for insulation 10014 When the photosensitive acrylic of No. 1 is used, the radius of curvature (0.2 μm) is applied only to the upper end of the insulator 10014. It is preferable to have a curved surface having ~ 3 μm). Also, as an insulator 10014, it feels like Negative type that becomes insoluble in the etchant by light, or the etchant by light Any positive type that is soluble in water can be used.

0605On the first electrode 10013, a layer 10016 containing an organic compound, and a second electrode (opposed). Electrodes) 10017 are formed respectively. Here, the first electrode 1 that functions as an anode As the material used for 0013, it is desirable to use a material having a large work function. For example , ITO (Indium Tin Oxide) Membrane, Indium Zinc Oxide (IZO) Membrane, Titanium Nitride In addition to single-layer membranes such as membranes, chromium membranes, tungsten membranes, Zn membranes, and Pt membranes, titanium nitride and aluminum Lamination with a film containing nium as the main component, a titanium nitride film and a film containing aluminum as the main component, and nitriding A three-layer structure with a titanium film or the like can be used. In addition, if it is a laminated structure, it can be used as wiring. It has low resistance, good ohmic contact can be made, and it can function as an anode. Wear.

0606In addition, the layer 10016 containing an organic compound is formed by a thin-film deposition method using a thin-film deposition mask or an ink jet. It is formed by the T method. Layer 10016 containing an organic compound contains a Group 4 metal of the Periodic Table of the Elements. As a material that can be used in combination with a complex as a part of it. May be a low molecular weight material or a high molecular weight material. Also, in the layer containing organic compounds As a material to be used, an organic compound is usually used in a single layer or in a laminated state, but this is the actual material. In the form of application, a configuration in which an inorganic compound is used as a part of a film made of an organic compound is also included. And. Furthermore, it is also possible to use a known triplet material.

0607Further, the material used for the second electrode 10017 formed on the layer 10016 containing the organic compound. Materials with a small work function (Al, Ag, Li, Ca, or alloys of these Mg Ag, MgIn, AlLi, CaF₂, Or calcium nitride). In addition, it should be noted. When the light generated in the layer 10016 containing the organic compound passes through the second electrode 10017 As the second electrode (cathode) 10017, a thin metal thin film and a transparent conductive film (IT) O (Indium Tin Oxide Alloy), Indium Zinc Oxide Oxide (In₂O₃ZnO ), Zinc oxide (ZnO), etc.).

0608Furthermore, we decided to attach the sealing substrate 10004 to the substrate 10010 with the sealing material 10005. The space surrounded by the substrate 10010, the sealing substrate 10004, and the sealing material 10005. The structure is such that 10007 is provided with a light emitting element 10018. Space 10007 Is filled with an inert gas (nitrogen, argon, etc.) or with a sealing material 10005. It shall also include the configuration to be filled.

0609It is preferable to use an epoxy resin for the sealing material 10005. Also, these materials It is desirable that the material is a material that does not allow moisture or oxygen to permeate as much as possible. Also, the sealing substrate 10 In addition to glass and quartz substrates, FRP (Fiberglass-) can be used as the material for 004. Reinforced Plastics), PVF (Polyvinyl Fluoride), Polyes A plastic substrate made of tell or acrylic can be used.

0610As described above, a display panel having the pixel configuration of the display device of the present invention can be obtained. .. The above-mentioned configuration is an example, and the configuration of the display panel of the display device of the present invention is limited to this. Not done.

0611As shown in FIG. 100, the signal control circuit 10001, the pixel unit 10002, and the first gate driver. By integrally forming the Iba 10003 and the second gate driver 10006, the display device Cost can be reduced. Further, in this case, the signal control circuit 10001 and the pixel unit 100 02, used for the first gate driver 10003 and the second gate driver 10006 By making the transistor unipolar, the manufacturing process can be simplified and the cost can be further reduced. Can be planned.

0612As for the configuration of the display panel, as shown in FIG. 100 (a), the signal control circuit 1000 1, pixel part 10002, first gate driver 10003 and second gate driver 10 It is not limited to the configuration in which 006 is integrally formed, and is shown in FIG. 101 corresponding to the signal control circuit 10001. The signal control circuit 10101 was formed on an IC chip and mounted on a display panel using COG or the like. It may be configured. The substrate 10100, the pixel portion 10102, and the first in FIG. 101 (a). Gate driver 10103, second gate driver 10104, FPC10105, IC Chip 10106, IC chip 10107, sealing substrate 10108, sealing material 10109 Board 10010, pixel section 10002, first gate driver 10003 in Fig. 100 (a) , 2nd gate driver 10006, FPC10009, IC chip 10019, sealing group Corresponds to plate 10004 and sealing material 10005.

0613In other words, only signal control circuits that require high-speed operation of the drive circuit are ICs using CMOS or the like. It is formed on a chip to reduce power consumption. In addition, IC chips are semiconductor wafers such as silicon wafers. By increasing the speed, higher speed operation and lower power consumption can be achieved.

0614Then, the second gate driver 10103 and the first gate driver 10104 are added to the pixel unit 1. Cost reduction can be achieved by integrally forming with 0102. And this second gate dry The battery 10103, the first gate driver 10104, and the pixel section 10102 are unipolar transformers. Further cost reduction can be achieved by configuring with a gista. Of the pixels of the pixel unit 10102 As the configuration, the pixels shown in the tenth embodiment can be applied.

0615In this way, the cost of the high-definition display device can be reduced. Also, FPC10105 and board 10 An IC chip with a functional circuit (memory or buffer) formed at the connection with 100 is mounted. By doing so, the substrate area can be effectively used.

0616Further, the signal control circuit 10001 and the first gate driver 10003 in FIG. 100 (a) and The signal control circuit 10111 in FIG. 101 (b), which corresponds to the second gate driver 10006, Place the first gate driver 10114 and the second gate driver 10113 on the IC chip. It may be formed and mounted on a display panel by COG or the like. In this case a high-definition table It is possible to reduce the power consumption of the indicator device. Therefore, the display device consumes less power. Amorphous silicon is used for the semiconductor layer of the transistor used for the pixel section. It is desirable to use The substrate 10110 and the pixel portion 10112 in FIG. 101 (b) , FPC10115, IC chip 10116, IC chip 10117, encapsulation board 1011 8. The sealing material 10119 is the substrate 10010 in Fig. 100 (a), the pixel part 10002, and the FPC. 10009, IC chip 10019, IC chip 10022, encapsulation board 10004, sea Corresponds to lumber 10005.

0617Also, use amorphous silicon for the semiconductor layer of the transistor of pixel section 10112. Therefore, the cost can be reduced. Furthermore, it is also possible to manufacture a large display panel. Will be.

0618In addition, the second gate driver, the first gate driver, and the signal in the row direction and the column direction of the pixel. It is not necessary to provide a control circuit. For example, it is formed on an IC chip as shown in Fig. 75 (a). The peripheral drive circuit 7501 shows the first gate driver 10114, as shown in FIG. 101 (b). To have the functions of the second gate driver 10113 and the signal control circuit 10111 May be good. The substrate 7500, pixel part 7502, FPC7504, and IC chip in Fig. 75 (a). Fig. 1005, IC chip 7506, sealing board 7507, and sealing material 7508 are shown in Fig. 100 ( a) Substrate 10010, Pixel part 10002, FPC10009, IC chip 10019, Corresponds to IC chip 10022, sealing substrate 10004, and sealing material 10005.

0619A schematic diagram illustrating the connection of the wiring of the display device of FIG. 75 (a) is shown in FIG. 75 (b). Basic Board 7510, peripheral drive circuit 7511, pixel part 7512, FPC7513, FPC7514 Have. External signals and power supply potential are input to the peripheral drive circuit 7511 from FPC7513. Be empowered. Then, the output from the peripheral drive circuit 7511 is sent to the pixels of the pixel unit 7512. Input to the connected row and column wiring.

0620Further, examples of the light emitting element applicable to the light emitting element 10018 are shown in FIGS. 76 (a) and 76 (b). That is, FIG. 76 (a) shows the configuration of the light emitting element applicable to the pixels shown in the above embodiment. , (B) will be described.

0621The light emitting element shown in FIG. 76 (a) consists of an anode 7602 and a hole injection material on a substrate 7601. Pore injection layer 7603, hole transport layer 7604 made of hole transport material on it, light emitting layer 7605 , Electron transport layer 7606 made of electron transport material, Electron injection layer 7607 made of electron injection material , And the element structure in which the cathode 7608 is laminated. Here, there is only one type of light emitting layer 7605. It may be formed only from the luminescent material of the above, but it may be formed from two or more kinds of materials. Further, the structure of the element is not limited to this structure.

0622In addition to the laminated structure in which each functional layer shown in FIG. 76 (a) is laminated, a molecule using a polymer compound is also used. High-efficiency devices that use triplet-emitting materials that emit light from the triplet excited state in the child and light-emitting layers, etc. The relations are diverse. The whole block layer controls the recombination region of carriers It can also be applied to white light emitting elements obtained by dividing the light emitting region into two regions. is there.

0623The device manufacturing method shown in this embodiment shown in FIG. 76 (a) is first described in that the anode 7602 (ITO) is used. The hole injection material, the hole transport material, and the light emitting material are deposited in this order on the substrate 7601. Next, electricity The child transport material and the electron injection material are vapor-deposited, and finally the cathode 7608 is formed by thin-film deposition.

0624Next, it is suitable for hole injection material, hole transport material, electron transport material, electron injection material, and light emitting material. Suitable materials are listed below.

0625As the hole injection material, if it is an organic compound, a porphyrin-based compound or phthalocyanine (Hereafter "H"₂Pc ), copper phthalocyanine (hereinafter referred to as CuPc ), etc. are effective. Is. In addition, the value of the ionization potential is smaller than that of the hole transport material used, and Any material having a hole transport function can also be used as a hole injection material. Conductive polymer Some materials are chemically doped with polystyrene sulfonic acid (hereinafter referred to as "PSS"). Polyethylene dioxythiophene (hereinafter referred to as "PEDOT") doped with) , Polyaniline and the like. In addition, the polymer compound of the insulator is also present in terms of flattening the anode. It is effective, and polyimide (hereinafter referred to as "PI") is often used. In addition, inorganic compounds Used, in addition to metal thin films such as gold and platinum, aluminum oxide (hereinafter referred to as "alumina") There are ultra-thin films.

0626The most widely used hole transport materials are aromatic amines (ie, benzene). It is a compound of ring-nitrogen bond). Widely used materials, 4,4 '-Bis (diphenylamino) -biphenyl (hereinafter referred to as "TAD") and its derivatives 4,4'-Bis [N- (3-Methylphenyl) -N-Phenyl-Amino] -Bife Nil (hereinafter referred to as "TPD"), 4,4'-bis [N- (1-naphthyl) -N-pheni There is ru-amino] -biphenyl (hereinafter referred to as "α-NPD"). 4,4', 4 -to Squirrel (N, N-diphenyl-amino) -triphenylamine (hereinafter referred to as "TDATA" , 4,4', 4 -Tris [N- (3-Methylphenyl) -N-Phenyl-Amino] -Starburst aromatics such as triphenylamine (hereinafter referred to as "MTDATA") Amine compounds can be mentioned.

0627Metal complexes are often used as electron transport materials, such as Alq, BAlq, and Tris (4-methi). Le-8-Kinolinolato) Aluminum (hereinafter referred to as "Almq"), Bis (10-Hide) Roxybenzo [h]-Kinorinato) Beryllium (hereinafter referred to as "Bebq") and other keno There are metal complexes having a phosphorus skeleton or a benzoquinoline skeleton. Also, screw [2- (2) -Hydroxyphenyl) -benzoxazolate] Zinc (hereinafter, "Zn (BOX))₂" , Bis [2- (2-Hydroxyphenyl) -benzothiazolato] zinc (hereinafter, "Zn" (BTZ)₂) And other metal complexes with oxazole-based and thiazole-based ligands is there. In addition to metal complexes, 2- (4-biphenylyl) -5- (4-tert-butyl) Tylphenyl) -1,3,4-oxadiazole (hereinafter referred to as "PBD"), OXD- Oxadiazole derivatives such as 7, TAZ, 3- (4-tert-butylphenyl) -4 -(4-Ethylphenyl) -5- (4-biphenylyl) -1,2,4-triazole (hereafter Below, triazole derivatives such as "p-EtTAZ"), vasophenanthroline (hereafter Phenanthroline derivatives such as BCP (hereinafter referred to as "BPhen") have electron transport properties. To.

0628As the electron injection material, the electron transport material described above can be used. Besides, huh Metal halides such as calcium fluoride, lithium fluoride, cesium fluoride, and lithiu oxide Ultra-thin films of insulators such as alkali metal oxides such as aluminum are often used. Also, Lithium Muacetylacetoneate (hereinafter referred to as "Li (acac)") and 8-quinolinolatri Alkali metal complexes such as thium (hereinafter referred to as "Liq") are also effective.

0629As the luminescent material, Alq, Almq, BeBq, BAlq, Zn (BOX) mentioned above.₂, Zn (BTZ)₂In addition to metal complexes such as, various fluorescent dyes are effective. What is a fluorescent dye? , Blue 4,4'-bis (2,2-diphenyl-vinyl) -biphenyl and red-orange 4- (Dicyanomethylene) -2-methyl-6- (p-dimethylaminostyryl) -4H-pyra And so on. In addition, triplet luminescent materials are also possible, with platinum or iridium as the central metal. Is the main component. Tris (2-phenylpyridine) iris as triplet luminescent material Zium, Bis (2- (4'-Trill) Pyridinato-N, C2') Acetylacetone Natoiri Zium (hereinafter "acacIr (tpy))₂), 2,3,7,8,23,13,1 7,18-Octaethyl-21H, 23H Porphyrin-Platinum and the like are known.

0630A highly reliable light emitting device is manufactured by combining the materials having each function as described above. can do.

0631Further, the display element 6521 shown in the tenth embodiment has a display element 6521 as shown in FIG. 76 (b). A light emitting device in which layers are formed in the reverse order of a) can be used. That is, the board 7611 On top of the cathode 7618, an electron injection layer 7617 consisting of an electron injection material, on which an electron transport material Electron transport layer 7616 composed of electron transport layer 7616, light emitting layer 7615, hole transport layer 761 composed of hole transport material 4. Element structure in which a hole injection layer 7613 made of a hole injection material and an anode 7612 are laminated. It is a structure.

0632Further, the light emitting element should have at least one of the anode and the cathode transparent in order to extract light emission. I. Then, a transistor and a light emitting element are formed on the substrate, and light is emitted from the surface opposite to the substrate. Top surface injection to take out, bottom surface injection to take out light emission from the surface on the substrate side, and opposite to the substrate side and the substrate There is a light emitting element with a double-sided injection structure that extracts light from the opposite surface, and the pixel structure of the display device of the present invention The formation can be applied to a light emitting device having any injection structure.

0633A light emitting element having a top injection structure will be described with reference to FIG. 77 (a).

0634The drive transistor 7701 is formed on the substrate 7700, and the drive transistor 7701 is formed. A first electrode 7702 is formed in contact with the source terminal of the above, and a layer 77 containing an organic compound is formed on the first electrode 7702. 03 and the second electrode 7704 are formed.

0635The first electrode 7702 is the anode of the light emitting element. And the second electrode 7704 is a luminescent element It is the cathode of the child. That is, the first electrode 7702 and the second electrode 7704 contain an organic compound. The part where the layer 7703 is sandwiched is the light emitting element.

0636Further, here, as a material used for the first electrode 7702 that functions as an anode, a work function is used. It is desirable to use a material with a large size. For example, titanium nitride film, chromium film, tungsten In addition to single-layer films such as films, Zn films, and Pt films, titanium nitride and aluminum-based films For lamination, a three-layer structure of a titanium nitride film, a film containing aluminum as a main component, and a titanium nitride film, etc. Can be In addition, if it is a laminated structure, the resistance as wiring is low and it is a good ohmi. It can be contacted and can function as an anode. A metal film that reflects light By using it, it is possible to form an anode that does not transmit light.

0637Moreover, as a material used for the second electrode 7704 that functions as a cathode, the work function is small. Material (Al, Ag, Li, Ca, or alloys of these MgAg, MgIn, AlLi, C aF₂, Or a metal thin film made of calcium nitride) and a transparent conductive film (ITO (indium) For lamination with tin oxide), indium zinc oxide (IZO), zinc oxide (ZnO), etc.) It is good to be there. By using a thin metal thin film and a transparent conductive film with transparency in this way, light is emitted. It is possible to form a cathode that can be permeated.

0638In this way, the light from the light emitting element can be extracted to the upper surface as shown by the arrow in FIG. 77 (a). Become Noh. That is, when applied to the display panel of FIG. 100, it is on the sealing substrate 10004 side. Light will be emitted. Therefore, when a light emitting element with a top injection structure is used for the display device, it is sealed. As the stop substrate 10004, a substrate having light transmission is used.

0639When an optical film is provided, the optical film may be provided on the sealing substrate 10004. I.

0640The work of MgAg, MgIn, AlLi, etc. that functions with the first electrode 7702 as the cathode. A metal film made of a material having a small function can be used. And on the second electrode 7704 Is a transparent conductor such as ITO (Indium Tin Oxide) Membrane, Indium Zinc Oxide (IZO) Membranes can be used. Therefore, according to this configuration, the transmittance of the top injection is increased. Can be done.

0641Further, a light emitting element having a bottom injection structure will be described with reference to FIG. 77 (b). Except for the injection structure Since the light emitting element has the same structure as that of FIG. 77 (a), the same reference numerals will be used for description.

0642Here, the material used for the first electrode 7702 that functions as an anode has a large work function. It is desirable to use a good material. For example, ITO (indium tin oxide) film, Injiu A transparent conductive film such as a zinc oxide (IZO) film can be used. Transparent with transparency By using a conductive film, it is possible to form an anode capable of transmitting light.

0643Moreover, as a material used for the second electrode 7704 that functions as a cathode, the work function is small. Material (Al, Ag, Li, Ca, or alloys of these MgAg, MgIn, AlLi, C aF₂, Or Ca₃N₂A metal film made of the above can be used. In this way, it reflects light It is possible to form a cathode that does not allow light to pass through by using a metal film.

0644In this way, the light from the light emitting element can be taken out to the lower surface as shown by the arrow in FIG. 77 (b). Become Noh. That is, when applied to the display panel of FIG. 100, light is emitted to the substrate 10010 side. It will be ejected. Therefore, when a light emitting element having a bottom injection structure is used as a display device, the substrate 1 0010 uses a substrate having light transmission.

0645When an optical film is provided, the optical film may be provided on the substrate 10010.

0646A light emitting device having a double-sided injection structure will be described with reference to FIG. 77 (c). Figure 77 except for the injection structure Since it is a light emitting device having the same structure as (a), it will be described using the same reference numerals.

0647Here, the material used for the first electrode 7702 that functions as an anode has a large work function. It is desirable to use a good material. For example, ITO (indium tin oxide) film, Injiu A transparent conductive film such as a zinc oxide (IZO) film can be used. Transparent with transparency By using a conductive film, it is possible to form an anode capable of transmitting light.

0648Moreover, as a material used for the second electrode 7704 that functions as a cathode, the work function is small. Material (Al, Ag, Li, Ca, or alloys of these MgAg, MgIn, AlLi, C aF₂, Or a metal thin film made of calcium nitride) and a transparent conductive film (ITO (indium) Tin oxide), indium zinc oxide alloy (In₂O₃ZnO), zinc oxide (ZnO) ) Etc.) should be used. In this way, a thin metal thin film and a transparent conductive film with transparency Can be used to form a cathode capable of transmitting light.

0649In this way, the light from the light emitting element can be taken out on both sides as shown by the arrow in FIG. 77 (c). Become Noh. That is, when applied to the display panel of FIG. 100, it is sealed with the substrate 10010 side. Light will be emitted to the substrate 10004 side. Therefore, a display device displays a light emitting element with a double-sided injection structure. Both the substrate 10010 and the sealing substrate 10004 have light transmittance when used in Use a substrate.

0650When an optical film is provided, both the substrate 10010 and the sealing substrate 10004 are provided. An optical film may be provided on the surface.

0651In addition, for display devices that realize full-color display using white light emitting elements and color filters. The present invention can also be applied.

0652As shown in FIG. 78, a base film 7802 is formed on the substrate 7800, and a driving truck is formed on the substrate film 7802. The engineer 7801 is formed and is in contact with the source terminal of the driving transistor 7801. An electrode 7803 is formed, on which a layer 7804 containing an organic compound and a second electrode 7805 are formed. It is formed.

0653The first electrode 7803 is the anode of the light emitting element. And the second electrode 7805 is a luminescent element It is the cathode of the child. That is, the first electrode 7803 and the second electrode 7805 contain an organic compound. The part where the layer 7804 is sandwiched is the light emitting element. The configuration shown in FIG. 78 emits white light. To. And the red color filter 7806R and the green color fill on the top of the light emitting element. Full color display with 7806G and blue color filter 7806B It can be performed. Also, a black matrix that isolates these color filters ( 7807 (also called BM) is provided.

0654The above-mentioned configurations of light emitting elements can be used in combination, and are appropriately used in the display device of the present invention. Can be Further, the above-mentioned display panel configuration and light emitting element are examples, and of course. The pixel configuration can also be applied to display devices having other configurations.

0655Next, a partial cross-sectional view of the pixel portion of the display panel is shown.

0656First, a crystalline semiconductor film (polysilicon (p-Si: H) film) is applied to the semiconductor layer of the transistor. The case where it is used will be described with reference to FIGS. 79 and 80.

0657Here, as the semiconductor layer, for example, a known film of an amorphous silicon (a-Si) film is formed on a substrate. Form by law. It is not necessary to limit the film to an amorphous silicon film, and the amorphous structure is included. Any semiconductor film (including a microcrystalline semiconductor film) may be used. Further amorphous silicon germanium film A compound semiconductor film containing an amorphous structure such as the above may be used.

0658Then, laser crystallization method, RTA and furnace annealing furnace are used for amorphous silicon film. Crystallized by the thermal crystallization method used or the thermal crystallization method using a metal element that promotes crystallization. Let me. Of course, these may be combined.

0659By the above-mentioned crystallization treatment, a partially crystallized region is formed on the amorphous semiconductor film. ..

0660Further, a crystalline semiconductor film having partially enhanced crystallinity is patterned into a desired shape by patterning. An island-shaped semiconductor film is formed from the crystallized region. This semiconductor film is used as a transistor semiconductor. Used for layers.

0661As shown in FIG. 79, a base film 7902 is formed on the substrate 7901, and a semiconductor layer is formed on the base film 7902. It is formed. The semiconductor layer is the channel formation region 7903 of the drive transistor 7918 and Impurity region 7905, which is the source region or drain region, and the lower part of the capacitive element 7919. It has a channel formation region 7906, an LDD region 7907, and an impurity region 7908 that serve as electrodes. To do. It should be noted that the channel formation region 7903 and the channel formation region 7906 have channel doors. It may be done.

0662Glass substrate, quartz substrate, ceramic substrate, plastic substrate, etc. can be used as the substrate. Wear. The base film 7902 includes aluminum nitride, silicon oxide, silicon oxide and the like. Single layers or laminates thereof can be used.

0663On the semiconductor layer, the gate electrode 7910 and the upper voltage of the capacitive element are passed through the gate insulating film 7909. Pole 7911 is formed.

0664Interlayer insulation 7912 is formed over the drive transistor 7918 and the capacitive element 7919. Wiring 7913 over contact holes on interlayer insulation 7912 is impurity region 7905 Is in contact with. The pixel electrode 7914 is formed in contact with the wiring 7913, and the pixel electrode 7914 is formed. A second interlayer insulator 7915 is formed over the ends and wiring 7913. here, It is formed by using a positive photosensitive acrylic resin film. And the pixel electrode 7914 A layer 7916 containing an organic compound and a counter electrode 7917 are formed on the layer 7916 and a pixel electrode 7914. In the region where the layer 7916 containing an organic compound is sandwiched between the counter electrode 7917 and the light emitting element 7920. Is formed.

0665Further, as shown in FIG. 79 (b), the LDD constituting a part of the lower electrode of the capacitive element 7919. A region 7921 may be provided such that the region overlaps the upper electrode 7911. In addition, Fig. 79 ( A common code is used for the part common to a), and the description is omitted.

0666Further, as shown in FIG. 80 (a), it is in contact with the impurity region 7905 of the drive transistor 7918. It may have a second upper electrode 8091 formed in the same layer as the wiring 7913. Na A common reference numeral is used for the part common to FIG. 79 (a), and the description thereof will be omitted. Second upper electric Interlayer insulation 7912 is sandwiched between the pole 8091 and the upper electrode 7911 to form a second capacitive element. It is made up. Also, since the second upper electrode 8091 is in contact with the impurity region 7908, it is on the top. The base film 7902 is sandwiched between the part electrode 7911 and the channel formation region 7906. Interlayer insulation 7912 with the first capacitive element and the upper electrode 7911 and the second upper electrode 8091 The second capacitive element, which is configured by sandwiching the above, is connected in parallel, and the first capacitive element and the second capacitive element are connected in parallel. It constitutes a capacitive element 8092 composed of a capacitive element. The capacitance of this capacitive element 8092 is the first Since it is a combined capacitance that is the sum of the capacitance of the capacitance element and the capacitance of the second capacitance element, it is large in a small area. Capacitive capacitive elements can be formed. That is, the display device of the present invention has a pixel configuration. When used as a capacitive element, the aperture ratio can be further improved.

0667Further, the configuration of the capacitive element as shown in FIG. 80 (b) may be used. Base film on substrate 8001 8002 is formed, and a semiconductor layer is formed on the 8002. The semiconductor layer is a drive transistor 8018 channel formation region 8003 and impurity region serving as source or drain region Has 8005. Even if the channel forming region 8003 is channel-doped, Good.

0668Glass substrate, quartz substrate, ceramic substrate, plastic substrate, etc. can be used as the substrate. Wear. The base film 7902 includes aluminum nitride, silicon oxide, silicon oxide and the like. Single layers or laminates thereof can be used.

0669The gate electrode 8007 and the first electrode 800 are placed on the semiconductor layer via the gate insulating film 8006. 8 is formed.

0670The first interlayer insulator 8009 covers the drive transistor 8018 and the first electrode 8008. The wiring 8010 is impure formed through the contact holes on the first interlayer insulator 8009. It is in contact with the object area 8005. Also, a second electrode of the same layer made of the same material as the wiring 8010. 8011 is formed.

0671In addition, a second interlayer insulator 8012 covers the wiring 8010 and the second electrode 8011. Formed and in contact with wiring 8010 via contact holes on the second interlayer insulator 8012 The pixel electrode 8013 is formed. Also, it is made of the same material as the pixel electrode 8013. A third electrode 8014 of the layer is formed. Here, the first electrode 8008 and the second electrode 8 A capacitive element 8019 composed of 011 and a third electrode 8014 is formed.

0672A third interlayer insulator 8015 is formed over the ends of the pixel electrode 8013 and the third electrode 8014. Layer 801 containing the organic compound on the third interlayer insulator 8015 and the third electrode 8014 6 and the counter electrode 8017 are formed, and the pixel electrode 8013 and the counter electrode 8017 are organically compounded. The light emitting element 8020 is formed in the region where the layer 8016 containing the object is sandwiched.

0673As described above, the configuration of the transistor using the crystalline semiconductor film as the semiconductor layer is shown in FIGS. 79 and 79. The configuration shown in 80 can be mentioned. Note that the transistors shown in FIGS. 79 and 80 The structure is an example of a transistor having a top gate structure. In other words, the transistor is P type May be N type. In the case of N type, the LDD region may be configured to overlap the gate electrode. However, it may be configured so that it does not overlap with the gate electrode, or a part of the LDD region overlaps. It may be configured as such. Further, the gate electrode may have a tapered shape, and the gate electrode table may be formed. The LDD region may be provided in a self-aligned manner at the bottom of the par portion. Also, the gate electric The number of poles is not limited to two, and may be a multi-gate structure of three or more, or one gate electrode.

0674Semiconductor layer (channel formation region and source) of transistors constituting the pixels of the display device of the present invention By using a crystalline semiconductor film for the region, drain region, etc.), for example, in Fig. 100A. First gate driver 10003, second gate driver 10006 and signal control circuit It becomes easy to integrally form 10001 with the pixel portion 10002.

0675In addition, as a transistor configuration using polysilicon for the semiconductor layer, between the substrate and the semiconductor layer. The structure in which the gate electrode is sandwiched between the two, that is, the bottom game in which the gate electrode is located under the semiconductor layer. A partial cross section of the display panel to which the transistor is applied is shown in FIG. 81.

0676An undercoat film 8102 is formed on the substrate 8101. Furthermore, the gate electric on the base film 8102 Pole 8103 is formed. In addition, the first one made of the same material as the gate electrode 8103 in the same layer. Electrode 8104 is formed. Phosphorus added to the material of the gate electrode 8103 Crystalline silicon can be used. In addition to polycrystalline silicon, it is a compound of metal and silicon. Silicide may be used.

0677In addition, the gate insulating film 8105 covers the gate electrode 8103 and the first electrode 8104. It is formed. A silicon oxide film or a silicon nitride film is used as the gate insulating film 8105. To.

0678Further, a semiconductor layer is formed on the gate insulating film 8105. The semiconductor layer is the drive transition Channel formation region 8106, LDD region 8107 and source region or drain of the star 8122 Impurity region 8108, which is the in region, and channel, which is the second electrode of the capacitive element 8123. It has an object forming region 8109, an LDD region 8110, and an impurity region 8111. In addition, Cha The flannel forming region 8106 and the channel forming region 8109 are channel-doped even if they are channel-doped. Good.

0679Glass substrate, quartz substrate, ceramic substrate, plastic substrate, etc. can be used as the substrate. Wear. The base film 8102 includes aluminum nitride, silicon oxide, silicon oxide, and the like. Single layers or laminates thereof can be used.

0680A first interlayer insulator 8112 is formed over the semiconductor layer, and is formed on the first interlayer insulator 8112. The wiring 8113 is in contact with the impurity region 8108 through the contact hole. Also, wiring A third electrode 8114 is formed in the same layer as 8113 with the same material. First electrode 8104 , The second electrode and the third electrode 8114 constitute the capacitive element 8123.

0681Further, an opening 8115 is formed in the first interlayer insulator 8112. Drive Transis Second interlayer insulation 811 so as to cover the data 8122, the capacitive element 8123 and the opening 8115. 6 is formed and the pixel electrode 81 is formed on the second interlayer insulator 8116 through the contact hole. 17 are formed. In addition, an insulator 8118 is formed so as to cover the end of the pixel electrode 8117. It has been. For example, a positive photosensitive acrylic resin film can be used. And pixels A layer 8119 containing an organic compound and a counter electrode 8120 are formed on the electrode 8117, and a pixel electrode is formed. Light emission in the region where the layer 8119 containing an organic compound is sandwiched between the pole 8117 and the counter electrode 8120. Element 8121 is formed. And the opening 8115 is located at the bottom of the light emitting element 8121. It is location. That is, when the light emitted from the light emitting element 8121 is taken out from the substrate side, the opening Since it has 8115, the transmittance can be increased.

0682Further, in FIG. 81 (a), the same material is used in the same layer as the pixel electrode 8117, and the fourth electrode 81 is used. 24 may be formed to form the configuration as shown in FIG. 81 (b). Then, the first electrode 8104 , A capacitive element composed of a second electrode, a third electrode 8114 and a fourth electrode 8124. 8123 can be formed.

0683Next, when an amorphous silicon (a-Si: H) film is used for the semiconductor layer of the transistor Will be described. Top gate transistor in Fig. 82, bottom in Fig. 83 and Fig. 84 The case of a mugate transistor is shown.

0684Figure 8 shows the cross section of a transistor with a top gate structure using amorphous silicon as the semiconductor layer. 2 (a) shows. The base film 8202 is formed on the substrate 8201. Furthermore, the base film 82 A pixel electrode 8203 is formed on 02. Also, the same material as the pixel electrode 8203 in the same layer A first electrode 8204 consisting of is formed.

0685As the substrate, a glass substrate, a quartz substrate, a ceramic substrate, or the like can be used. Also, the base film The 8202 is a single layer such as aluminum nitride, silicon oxide, or silicon oxide, or a product thereof. Layers can be used.

0686In addition, wiring 8205 and wiring 8206 are formed on the base film 8202, and the pixel electrode 8203 The end of is covered with wiring 8205. N-shaped lead on top of wiring 8205 and wiring 8206 The N-type semiconductor layer 8207 and the N-type semiconductor layer 8208 having an electric mold are formed. Also, A semiconductor layer 8209 is formed on the base film 8202 between the wiring 8205 and the wiring 8206. Has been done. A part of the semiconductor layer 8209 is an N-type semiconductor layer 8207 and an N-type semiconductor layer. It has been extended to 8208. This semiconductor layer is amorphous silicon (aS). It is formed of non-crystalline semiconductor films such as i: H) and microcrystalline semiconductors (μ-Si: H). To. Further, a gate insulating film 8210 is formed on the semiconductor layer 8209. Also, the gate An insulating film 8211 made of the same material as the insulating film 8210 is also formed on the first electrode 8204. It is made. A silicon oxide film or a silicon nitride film is used as the gate insulating film 8210. Be done.

0687Further, a gate electrode 8212 is formed on the gate insulating film 8210. Also, game A second electrode 8213 made of the same material as the electrode is placed on the first electrode 8204 with an insulating film 82. It is formed through 11. Insulating film 82 with first electrode 8204 and second electrode 8213 A capacitive element 8219 sandwiched between 11 is formed. Also, the end of the pixel electrode 8203, An interlayer insulating film 8214 is formed to cover the dynamic transistor 8218 and the capacitive element 8219. There is.

0688A layer containing an organic compound on the interlayer insulating film 8214 and the pixel electrode 8203 located at the opening thereof. 8215 and counter electrode 8216 are formed, and the pixel electrode 8203 and counter electrode 8216 are present. The light emitting element 8217 is formed in the region where the layer 8215 containing the machine compound is sandwiched.

0689Further, the first electrode 8204 shown in FIG. 82 (a) is shown in the first electrode 8 as shown in FIG. 82 (b). It may be formed at 220. The first electrode 8220 is the same layer as the wiring 8205 and 8206. It is made of material.

0690In addition, a transistor with a bottom gate structure using amorphous silicon as the semiconductor layer is used. A partial cross section of the panel of the display device is shown in FIG.

0691A base film 8302 is formed on the substrate 8301. Further gate on the base film 8302 Electrode 8303 is formed. Also, a first electrode made of the same material in the same layer as the gate electrode. 8304 is formed. Polycrystalline silicon with phosphorus added to the material of the gate electrode 8303 A computer can be used. In addition to polycrystalline silicon, Siri, a compound of metal and silicon It may be on the side.

0692In addition, the gate insulating film 8305 covers the gate electrode 8303 and the first electrode 8304. It is formed. A silicon oxide film or a silicon nitride film is used as the gate insulating film 8305. To.

0693Further, the semiconductor layer 8306 is formed on the gate insulating film 8305. Also, semiconductors A semiconductor layer 8307 made of the same material is formed on the same layer as the layer 8306.

0694As the substrate, a glass substrate, a quartz substrate, a ceramic substrate, or the like can be used. Also, the base film The 8202 is a single layer such as aluminum nitride, silicon oxide, or silicon oxide, or a product thereof. Layers can be used.

0695N-type semiconductor layers 8308 and 8309 having N-type conductivity are formed on the semiconductor layer 8306. Therefore, an N-type semiconductor layer 8310 is formed on the semiconductor layer 8307.

0696Wiring 8311 and 8312 are formed on the N-type semiconductor layers 8308 and 8309, respectively, and N On the type semiconductor layer 8310, a conductive layer 8 made of the same material as the wirings 8311 and 8312. 313 is formed.

0697A second electrode composed of a semiconductor layer 8307, an N-type semiconductor layer 8310, and a conductive layer 8313 is configured. Will be done. The structure in which the base film 8302 is sandwiched between the second electrode and the first electrode 8304. Capacitive element 8320 is formed.

0698Further, one end of the wiring 8311 is extended, and the pixel is in contact with the upper portion of the extending wiring 8311. Electrode 8314 is formed.

0699It also covers the end of the pixel electrode 8314, the drive transistor 8319 and the capacitive element 8320. Insulation 8315 is formed as described above.

0700Layer 8316 containing an organic compound and counter electrode 8 on the pixel electrode 8314 and the insulator 8315 317 is formed, and the pixel electrode 8314 and the counter electrode 8317 form a layer 831 containing an organic compound. A light emitting element 8318 is formed in the region where 6 is sandwiched.

0701The semiconductor layer 8307 and the N-type semiconductor layer 8310, which are a part of the second electrode of the capacitive element, are not provided. It doesn't matter. That is, the second electrode is the conductive layer 8313, and the first electrode 8304 and the conductive layer 83. It may be a capacitive element having a structure in which a gate insulating film is sandwiched between 13.

0702In FIG. 83 (a), the pixel electrode 8314 is formed before the wiring 8311 is formed. Therefore, as shown in FIG. 83 (b), the second electrode 8321 and the second electrode 8321 composed of the pixel electrodes 8314 A capacitive element 8322 having a structure in which a gate insulating film 8305 is sandwiched between electrodes 8304 of 1 is formed. be able to.

0703Although FIG. 83 shows a transistor having an inverted staggered channel etch structure, Of course, a transistor having a channel protection structure may be used. Transistor with channel protection structure The case will be described with reference to FIGS. 84 (a) and 84 (b).

0704The transistor of the channel protection type structure shown in FIG. 84 (a) is the channel shown in FIG. 83 (a). Region where the channel of the semiconductor layer 8306 of the etch structure drive transistor 8319 is formed The difference is that an insulator 8401 that serves as an etching mask is provided on the top, which is common to other things. A common code is used wherever it is.

0705Similarly, the transistor with the channel protection type structure shown in Fig. 84 (b) is shown in Fig. 83 (b). The channel of the semiconductor layer 8306 of the drive transistor 8319 of the channel etch structure shown is The difference is that an insulator 8401 that serves as an etching mask is provided on the formed region. Therefore, the common code is used for other common points.

0706Semiconductor layer (channel formation region and source) of transistors constituting the pixels of the display device of the present invention To reduce manufacturing costs by using amorphous semiconductor films for regions (regions, drain regions, etc.) Can be done. For example, an amorphous semiconductor film is applied by using the pixel configurations shown in FIGS. 66 and 67. It is possible to do.

0707The structure and capacitance of the transistor that can be applied to the pixel configuration of the display device of the present invention. The structure of the element is not limited to the above-mentioned configuration, but the structure of transistors having various configurations and the capacitive element. The structure of can be used.

0708Further, by applying the configuration of the display device shown in the above embodiment to the drive of the display panel. , Deterioration of transistor characteristics can be suppressed. Therefore, the characteristics of the transistor deteriorate. It is possible to prevent the shift register from malfunctioning due to the above. Also, shift register malfunction It is possible to suppress display defects on the display panel caused by the work.

0709The configuration of the display panel shown in this embodiment is shown in other embodiments in the present specification. It can be implemented in any combination with the configuration of the display device. Further, it is shown in the present embodiment. The configuration of the display panels can be freely combined and implemented.

0710(Embodiment 15) In the present embodiment, the semiconductor device to which the present invention can be applied is a thin film transistor (TFT). A method of manufacturing a semiconductor device when it is provided as an element will be described with reference to the drawings.

0711FIG. 85 shows the structure and manufacture of a TFT that can be possessed by a semiconductor device to which the present invention can be applied. It is a figure which shows the example of a process. FIG. 85 (A) shows a semiconductor device to which the present invention can be applied. It is a figure which shows the example of the structure of the TFT which can be done. In addition, FIGS. 85 (B) to (G) show the main departure. It is a figure which shows the example of the manufacturing process of the TFT which the semiconductor device which can apply Ming dynasty can have. To. It should be noted that the structure and manufacturing pro of the TFT that can be possessed by the semiconductor device to which the present invention can be applied. Seth is not limited to that shown in Figure 85 and may use a variety of structures and manufacturing processes. it can.

0712First, referring to FIG. 85 (A), a TF that a semiconductor device to which the present invention can be applied can have. An example of the structure of T will be described. FIG. 85 (A) shows a cross section of a TFT having a plurality of different structures. It is a figure. Here, in FIG. 85 (A), TFTs having a plurality of different structures are juxtaposed. This is a TFT structure that a semiconductor device to which the invention can be applied can have. A TF that is an expression for explaining the structure and can be possessed by a semiconductor device to which the invention can be applied. It is not necessary for T to actually be juxtaposed as shown in Fig. 85 (A), but it is created as needed. Can be

0713Next, the characteristics of each layer constituting the TFT that the semiconductor device to which the present invention can be applied can have. Will be described.

0714The substrate 8511 is a glass such as barium borosilicate glass or aluminoborosilicate glass. Substrates, quartz substrates, ceramic substrates, metal substrates containing stainless steel, etc. can be used. To. In addition, polyethylene terephthalate (PET) and polyethylene naphthalate (PE) N), plastic represented by polyether sulfone (PES), acrylic, etc. are acceptable It is also possible to use a substrate made of a flexible synthetic resin. For flexible substrates This makes it possible to manufacture a semiconductor device that can be bent. Also , If it is such a substrate, there is no big limitation on its area and shape, so it is decided to use the substrate 8511. For example, if one side is 1 meter or more and a rectangular shape is used, the productivity will be significantly improved. Can be improved. Such an advantage is compared with the case of using a circular silicon substrate. Then, it is a big advantage.

0715The insulating film 8512 functions as a base film. Alkali metals such as Na from substrate 8511 It is provided to prevent alkaline earth metals from adversely affecting the characteristics of semiconductor devices. Insulating film As 8512, oxygen or nitrogen such as silicon oxide, silicon nitride, silicon oxide nitride, silicon nitride oxide, etc. It can be provided by a single-layer structure of an insulating film having an element or a laminated structure thereof. For example When the insulating film 8512 is provided in a two-layer structure, a silicon nitride film is provided as the first insulating film. A silicon oxide film may be provided as the second insulating film. In addition, the insulating film 8512 has a three-layer structure. When provided, a silicon oxide nitride film is provided as the first insulating film, and an acid nitride is provided as the second insulating film. It is advisable to provide a siliconized silicon film and to provide a silicon oxide film as a third insulating film.

0716Semiconductor films 8513, 8514, 8515 are amorphous semiconductors or semi-amorphous semiconductors. It can be formed of morphous semiconductor (SAS). Also, even if a polycrystalline semiconductor film is used good. SAS has an intermediate structure between amorphous and crystalline structures (including single crystal and polycrystal), and is self-contained. It is a semiconductor with a third state that is energetically stable, has short-range order, and has lattice distortion. Includes a crystalline region with. At least some areas in the membrane are 0.5-20n The crystal region of m can be observed, and the Raman spectrum is 5 when silicon is the main component. It shifts to the lower wavenumber side than 20 cm-1. In X-ray diffraction, it is derived from the silicon crystal lattice Diffraction peaks (111) and (220) are observed. Unbonded hand (dungling bon) Do) contains at least 1 atomic% or more of hydrogen or halogen as the termination .. SAS is formed by glow discharge decomposition (plasma CVD) of a gas containing silicon. Silica As a gas containing elements, SiH₄, And other Si₂H₆, SiH₂Cl₂, SiH Cl₃, SiCl₄, SiF₄Etc. can be used. Also GeF₄Mix You may. This silicon-containing gas is derived from H2 or H2 and He, Ar, Kr, Ne. It may be diluted with one or more selected noble gas elements. Dilution rate is in the range of 2 to 1000 times Enclosure. The pressure is roughly in the range of 0.1Pa to 133Pa, the power frequency is 1MHz to 120MHz, Preferably 13 MHz to 60 MHz. The substrate heating temperature may be 300 ° C or lower. Impurities in the membrane As an element, impurities of atmospheric components such as oxygen, nitrogen, and carbon are 1 x 10²⁰cm^-1The following In particular, the oxygen concentration is 5 × 10.¹⁹/cm³Below, preferably 1 × 10¹⁹/cm³It is as follows. Here, known means (sputtering method, LPCVD method, plasma C) A material containing silicon (Si) as the main component using the VD method, etc. (for example, Si)_xGe_1-xetc) Amorphous semiconductor film is formed with, and the amorphous semiconductor film is subjected to laser crystallization, RTA or furne. Thermal crystallization method using a sanneal furnace, thermal crystallization method using a metal element that promotes crystallization, etc. Crystallize by a known crystallization method.

0717The insulating film 8516 is formed of oxygen or nitrogen such as silicon oxide, silicon nitride, silicon oxide and silicon nitride. It can be provided by a single-layer structure of an insulating film having an element or a laminated structure thereof.

0718The gate electrode 8517 shall have a single-layer conductive film or a laminated structure of two-layer or three-layer conductive film. Can be done. A known conductive film can be used as the material of the gate electrode 8517. Ta Speaking of tantalum (Ta), titanium (Ti), molybdenum (Mo), tungsten (W) , A simple substance film of an element such as chromium (Cr) or silicon (Si), or a nitride film of an element (representative) Tantalum nitride film, tungsten nitride film, titanium nitride film), or a combination of elements Silicide film (typically Mo-W alloy, Mo-Ta alloy) or elemental silicide film (Tungsten silicide film, titanium silicide film, etc.) can be used. To. The above-mentioned single film, nitride film, alloy film, silicide film and the like may be used as a single layer. However, they may be laminated and used.

0719The insulating film 8518 is made of silicon oxide by a known means (sputtering method, plasma CVD method, etc.). Insulating film with oxygen or nitrogen such as silicon nitride, silicon oxide nitride, silicon nitride, and DLC (DLC) It is installed with a single-layer structure of a film containing carbon such as earmon dry carbon) or a laminated structure of these. Can be kicked.

0720The insulating film 8519 is formed of silicon oxide, silicon nitride (, silicon oxide, silicon nitride, or other oxygen or oxygen. Insulating film with nitrogen and carbon-containing film such as DLC (diamond-like carbon) Hmm, other epoxy, polyimide, polyamide, polyvinylphenol, benzosik Provided in a single layer or laminated structure made of organic materials such as robten and acrylic and siloxane resin be able to. The siloxane resin corresponds to a resin containing a Si-O-Si bond. The skeleton structure of siloxane is composed of the bonds of silicon (Si) and oxygen (O). Substituent As an organic group containing at least hydrogen (for example, an alkyl group, an aromatic hydrocarbon) is used. To. A fluoro group can also be used as the substituent. Or at least as a substituent An organic group containing hydrogen and a fluoro group may be used. The semiconductor device in the present invention Then, the insulating film 8519 is directly covered so as to cover the gate electrode 8517 without providing the insulating film 8518. It is also possible to provide.

0721The conductive film 8523 is Al, Ni, C, W, Mo, Ti, Pt, Cu, Ta, Au, Mn. A simple substance film of any element, a nitride film of an element, or an alloy film in which elements are combined, or , Element silicide film and the like can be used. For example, as an alloy containing a plurality of elements Al alloy containing C and Ti, Al alloy containing Ni, Al alloy containing C and Ni, An Al alloy containing C and Mn or the like can be used. In addition, when it is provided in a laminated structure, A The structure can be such that l is sandwiched between Mo or Ti. By doing this, Al's It can improve resistance to heat and chemical reactions.

0722Next, with reference to the cross-sectional views of the TFTs having a plurality of different structures shown in FIG. 85 (A), each The features of each structure will be described.

0723The 8501 is a single-drain TFT that can be manufactured by a simple method, so the manufacturing cost is high. There is an advantage that the yield is low and the yield can be high. Here, the semiconductor films 8513 and 8515 are , Each has a different concentration of impurities, the semiconductor film 8513 is the channel region, and the semiconductor film 8515 Is used as a source region and a drain region. By controlling the amount of impurities in this way , The resistivity of the semiconductor film can be controlled. In addition, the electrical connection between the semiconductor film and the conductive film 8523 The state can be brought closer to an ohmic connection. In addition, make semiconductor films with different amounts of impurities. As a method of sorting, impurities are added to the semiconductor film using the gate electrode 8517 as a mask. You can use the method of

07248502 is a TFT having a taper angle of a certain level or more on the gate electrode 8517, which is convenient. Since it can be manufactured by a method, it has the advantages of low manufacturing cost and high yield. here The semiconductor films 8513, 8514, and 8515 have different impurity concentrations, and are semiconductor films. 8513 is the channel region, semiconductor film 8514 is the low concentration drain (Lightly Dop) The ed Drain: LDD) region and the semiconductor film 8515 are the source region and drain region. To be used. By controlling the amount of impurities in this way, the resistivity of the semiconductor film can be controlled. In addition, the electrical connection between the semiconductor film and the conductive film 8523 should be closer to that of ohmic connection. Can be done. In addition, because it has an LDD region, it is difficult for a high electric field to be applied inside the TFT, making it a relief. Deterioration of the device due to the carrier can be suppressed. Semiconductors with different amounts of impurities As a method of making different films, impurities are added to the semiconductor film using the gate electrode 8517 as a mask. A looping method can be used. In TFT8502, gate electrode 851 Since 7 has a taper angle of a certain level or more, it passes through the gate electrode 8517 and becomes a semiconductor film. The concentration of impurities to be doped can be gradiented, and the LDD region can be easily formed. Can be

0725In the 8503, the gate electrode 8517 is composed of at least two layers, and the lower gate electrode is the upper layer. It is a TFT having a shape longer than that of the gate electrode of. The gate electrode 8517 has such a shape By being shaped, it is possible to form an LDD region without adding a photomask. it can. In addition, like TFT8503, the LDD region overlaps with the gate electrode 8517. The structure is called a GOLD structure (Gate Overlapped LDD). It should be noted that , The following method is used as a method to make the shape of the gate electrode 8517 such a shape. You may. First, when patterning the gate electrode 8517, dry etching is used. The lower gate electrode and the upper gate electrode are etched and inclined (tapered) to the side surface. Make it a certain shape. Subsequently, the inclination of the upper gate electrode is made close to vertical by anisotropic etching. Process so that As a result, the lower gate electrode has a longer shape than the upper gate electrode. Gate electrode is formed. Then, by doping the impurity element twice, Semiconductor film 8513 used as a channel region, semiconductor film 8514 used as an LDD region , A semiconductor film 8515 used as a source terminal and a drain terminal is formed.

0726The LDD region that overlaps with the gate electrode 8517 is the Lov region, and the gate electrode 8517 The LDD area that does not overlap with is called the Loff area. Where the Loff area is The effect of suppressing the off-current value is high, but it is due to hot carriers by relaxing the electric field near the drain. The effect of preventing deterioration of the on-current value is low. On the other hand, the Lov region relaxes the electric field near the drain and It is effective in preventing deterioration of the on-current value, but the effect of suppressing the off-current value is low. Therefore, the seed It is preferable to manufacture a TFT having a structure according to the required characteristics for each circuit. for example For example, when the semiconductor device of the present invention is used as a display device, the pixel TFT has an off-current value. It is preferable to use a TFT having a Loff region in order to suppress the above. On the other hand, peripheral times The TFT in the road relaxes the electric field near the drain and prevents the on-current value from deteriorating. , It is preferable to use a TFT having a Lov region.

07278504 is a TF with sidewall 8521 in contact with the side surface of gate electrode 8517. T. Heavy with sidewall 8521 by having sidewall 8521 Area can be an LDD area.

07288505 is LDD (Loff) by doping the semiconductor film with a mask. The TFT that formed the region. By doing this, it is possible to surely form the LDD region. It is possible to reduce the off-current value of the TFT.

07298506 is an LDD (Lov) region by doping the semiconductor film with a mask. It is a TFT that forms a region. By doing this, it is possible to surely form the LDD region. Therefore, the electric field near the drain of the TFT can be relaxed and the deterioration of the on-current value can be reduced.

0730Next, with reference to FIGS. 85 (B) to (G), the semiconductor device to which the present invention can be applied has. An example of a TFT manufacturing process that can be performed will be described. A semiconductor device to which the present invention can be applied The structure and manufacturing process of the TFT that can be possessed is not limited to that shown in FIG. 85. , Various structures and manufacturing processes can be used.

0731In the present invention, the substrate 8511, the insulating film 8512, the semiconductor film 8513, 8514, 85 15, Plasma treatment on the surface of the insulating film 8516, the insulating film 8518, or the insulating film 8519 Oxidize or nitrid the semiconductor film or insulating film by oxidizing or nitriding with be able to. In this way, plasma treatment is used to oxidize or nitrogen the semiconductor film or insulating film. The surface of the semiconductor film or insulating film is modified by the conversion method, and the CVD method or sputtering method is used. Since it is possible to form a denser insulating film as compared with the insulating film formed by It is possible to suppress defects such as waste and improve the characteristics of the semiconductor device.

0732First, the surface of the substrate 8511 is washed with hydrofluoric acid (HF), alkali or pure water. Basic The plate 8511 is a glass base such as barium borosilicate glass or aluminoborosilicate glass. A plate, a quartz substrate, a ceramic substrate, a metal substrate containing stainless steel, or the like can be used. .. In addition, polyethylene terephthalate (PET) and polyethylene naphthalate (PEN) ), Flexible plastics such as polyether sulfone (PES), and flexible acrylics. It is also possible to use a substrate made of a synthetic resin having properties. Here, the board 851 The case where a glass substrate is used as 1 is shown.

0733Here, by performing plasma treatment on the surface of the substrate 8511, the surface of the substrate 8511 is oxidized. Alternatively, an oxide film or a nitride film may be formed on the surface of the substrate 8511 by nitriding. (Fig. 85 (B)). Oxide film or nitride film formed by plasma treatment on the surface, etc. In the following, the insulating film of the above will also be referred to as a plasma-treated insulating film. In FIG. 85 (B), the insulating film 8531 is a plasma-treated insulating film. Generally thin on a substrate such as glass or plastic When a semiconductor element such as a membrane transistor is provided, Na contained in glass, plastic, etc. Impurity elements such as alkali metals and alkaline earth metals are mixed into semiconductor devices and contaminated. This may affect the characteristics of the semiconductor element. But glass and plastic Alkali metals such as Na contained in the substrate by nitriding the surface of the substrate made of It is possible to prevent impurity elements such as alkaline earth metals from being mixed into the semiconductor element.

0734When the surface is oxidized by plasma treatment, it is in an oxygen atmosphere (for example, oxygen (O).₂) And noble gas (including at least one of He, Ne, Ar, Kr, Xe) or acid Element and hydrogen (H₂) And noble gas atmosphere or nitrous oxide and noble gas atmosphere) Do the reason. On the other hand, when the surface is nitrided by plasma treatment, it is in a nitrogen atmosphere (for example, Nitrogen (N₂) And noble gas (including at least one of He, Ne, Ar, Kr, Xe) atmosphere Under or under nitrogen and hydrogen and noble gas atmosphere or NH₃And plasma treatment in a noble gas atmosphere) Do. As the noble gas, for example, Ar can be used. Also, Ar and Kr were mixed. Gas may be used. Therefore, the plasma-treated insulating film is a noble gas used for plasma treatment ( Includes at least one of He, Ne, Ar, Kr, Xe). For example, Ar When is used, Ar is contained in the plasma-treated insulating film.

0735Further, in the plasma treatment, the electron density is 1 × 10 in the atmosphere of the above gas.¹¹cm^-3Above 1 × 10¹³cm^-3The electron temperature of the plasma is 0.5ev or more and 1.5eV. It is preferable to carry out the following. The electron density of plasma is high, and the electricity near the object to be processed Since the child temperature is low, damage to the object to be processed by plasma can be prevented. Also , Plasma electron density is 1x10¹¹cm^-3Because of the high density above, plasma processing The oxide film or nitride film formed by oxidizing or nitriding the irradiated object in use is C. Compared to the film formed by the VD method or sputtering method, the film thickness is more uniform and denser. A film can be formed. In addition, since the electron temperature of plasma is as low as 1 eV or less, it is conventional. Oxidation or nitriding can be performed at a lower temperature than plasma treatment or thermal oxidation. Ta Speaking of which, even if plasma treatment is performed at a temperature 100 degrees or more lower than the strain point temperature of the glass substrate, it is ten. Oxidation or nitriding treatment can be performed in minutes. In addition, the frequency for forming plasma Therefore, high frequencies such as microwaves (2.45 GHz) can be used. In addition, below Unless otherwise specified, plasma treatment shall be performed using the above conditions.

0736In FIG. 85 (B), the surface of the substrate 8511 is plasma-treated. Although the case of forming a razor-treated insulating film is shown, the present invention shows a plastic on the surface of the substrate 8511. Including the case where the Zuma-treated insulating film is not formed.

0737In FIGS. 85 (C) to 85 (G), the surface of the object to be treated is plasma-treated. Although the plasma-treated insulating film formed in the above is not shown, in the present invention, the substrate 8511, Insulating film 8512, semiconductor film 8513, 8514, 8515, insulating film 8516, insulating film 85 18 or a plasma formed on the surface of the insulating film 8519 by plasma treatment. Including the case where a razor-treated insulating film is present.

0738Next, known means (sputtering method, LPCVD method, plasma CVD method, etc.) on the substrate 8511. The insulating film 8512 is formed using the above (Fig. 85 (C)). As the insulating film 8512, silica oxide Element or silicon oxide can be used.

0739Here, the surface of the insulating film 8512 is subjected to plasma treatment to oxidize or nitrid the insulating film 8512. By doing so, a plasma-treated insulating film may be formed on the surface of the insulating film 8512. Insulation By oxidizing the surface of the film 8512, the surface of the insulating film 8512 is modified, such as pinholes. It is possible to obtain a dense film with few defects. It also oxidizes the surface of the insulating film 8512. Therefore, a plasma-treated insulating film having a low content of N atoms can be formed. When a semiconductor film is provided on the Razuma-treated insulating film, the interface characteristics between the plasma-treated insulating film and the semiconductor film are suitable. Go up. The plasma-treated insulating film is a rare gas (He, Ne, Ar) used for plasma treatment. , Kr, including at least one of Xe). The plasma treatment is described above. The same can be done under the case.

0740Next, island-shaped semiconductor films 8513 and 8514 are formed on the insulating film 8512 (Fig. 85 (D)). ). The island-shaped semiconductor films 8513 and 8514 are formed on the insulating film 8512 by known means (sputtering method). , LPCVD method, plasma CVD method, etc.) and materials containing silicon (Si) as the main component ( For example Si_xGe_1-xEtc.) to form an amorphous semiconductor film, and then use the amorphous semiconductor film to form the amorphous semiconductor film. It can be provided by crystallizing and selectively etching the semiconductor film. In addition, it should be noted. A laser crystallization method, RTA or Furnace anneal furnace is used to crystallize the amorphous semiconductor film. Thermal crystallization method, thermal crystallization method using metal elements that promote crystallization, or a combination of these methods It can be carried out by a known crystallization method such as a set method. Here, an island-shaped semiconductor film The end of the is provided with a shape close to a right angle (θ = 85 to 100 °). Also, with the low concentration drain area The semiconductor film 8514 is formed by doping impurities with a mask. You may.

0741Here, plasma treatment is performed on the surfaces of the semiconductor films 8513 and 8514, and the semiconductor films 8513 and 8514 are subjected to plasma treatment. Surfaces of semiconductor films 8513, 8514 by oxidizing or nitriding the surface of 8514 A plasma-treated insulating film may be formed on the surface. For example, S as semiconductor films 8513, 8514 When i is used, silicon oxide or silicon nitride is formed as the plasma-treated insulating film. Well After oxidizing the semiconductor films 8513 and 8514 by plasma treatment, plasma processing is performed again. It may be nitrided by doing the reason. In this case, it is in contact with the semiconductor films 8513 and 8514. Silicon oxide is formed, and silicon nitride is formed on the surface of the silicon oxide. In addition, Plas When oxidizing a semiconductor film by processing, oxygen (for example, oxygen (O)) is used in an oxygen atmosphere.₂) And rare moth Under atmosphere (including at least one of He, Ne, Ar, Kr, Xe) or oxygen and hydrogen (H₂) And noble gas atmosphere or nitrous oxide and noble gas atmosphere) .. On the other hand, when the semiconductor film is nitrided by plasma treatment, it is in a nitrogen atmosphere (for example, nitrogen). (N₂) And noble gas (including at least one of He, Ne, Ar, Kr, Xe) Or in a nitrogen, hydrogen and noble gas atmosphere or NH₃And plasma treatment in a noble gas atmosphere) .. As the noble gas, for example, Ar can be used. Also, a gas that is a mixture of Ar and Kr. May be used. Therefore, the plasma-treated insulating film is a noble gas (He) used for plasma treatment. , Ne, Ar, Kr, including at least one of Xe). For example, for Ar If so, the plasma-treated insulating film contains Ar.

0742Next, the insulating film 8516 is formed (Fig. 85 (E)). The insulating film 8516 is a known means (s). Using the putter method, LPCVD method, plasma CVD method, etc.), silicon oxide, silicon nitride, nitrogen oxide A single-layer structure of an insulating film having oxygen or nitrogen such as silicon dioxide, silicon nitride oxide (x&gt; y), or These laminated structures can be provided. The surfaces of the semiconductor films 8513 and 8514 are covered. Plasma-treated insulating film is applied to the surfaces of semiconductor films 8513 and 8514 by lazuma treatment. When formed, the plasma-treated insulating film can also be used as the insulating film 8516. ..

0743Here, plasma treatment is performed on the surface of the insulating film 8516 to oxidize the surface of the insulating film 8516. May form a plasma-treated insulating film on the surface of the insulating film 8516 by nitriding. .. The plasma-treated insulating film is a rare gas (He, Ne, Ar, Kr) used for plasma treatment. , Including at least one of Xe). In addition, plasma treatment is performed under the conditions described above. It can be done in the same way.

0744In addition, after the insulating film 8516 is oxidized by once performing plasma treatment in an oxygen atmosphere. In addition, nitriding may be performed by performing plasma treatment again in a nitrogen atmosphere. in this way, Plasma treatment is applied to the insulating film 8516 to oxidize or nitride the surface of the insulating film 8516. The surface of the insulating film 8516 can be modified to form a dense film. Plasma processing The insulating film obtained by performing the process is compared with the insulating film formed by the CVD method or the sputtering method. Compared to this, it is denser and has fewer defects such as pinholes, so it improves the characteristics of the thin film transistor. Can be done.

0745Next, the gate electrode 8517 is formed (Fig. 85 (F)). The gate electrode 8517 is known. It can be formed by means (sputtering method, LPCVD method, plasma CVD method, etc.). ..

0746In TFT8501, impurity doping is performed after forming the gate electrode 8517. By doing so, it is possible to form the semiconductor film 8515 used as the source region and drain region. it can.

0747In TFT8502, impurity doping is performed after forming the gate electrode 8517. Therefore, 8514 used as the LDD area and used as the source area and drain area. The semiconductor film 8515 can be formed.

0748In TFT8503, impurity doping is performed after forming the gate electrode 8517. Therefore, 8514 used as the LDD area and used as the source area and drain area. The semiconductor film 8515 can be formed.

0749In TFT8504, sidewall 8521 is formed on the side surface of gate electrode 8517. After that, by performing impurity doping, 8514 used as the LDD region and the source The semiconductor film 8515 used as a region and a drain region can be formed. In addition, silicon oxide or silicon nitride can be used for the sidewall 8521. Rhino As a method of forming the dowall 8521 on the side surface of the gate electrode 8517, for example, After forming the electrode electrode 8517 and then forming silicon oxide or silicon nitride by a known method. , Use a method of etching a silicon oxide film or a silicon nitride film by anisotropic etching. be able to. By doing so, only the side surface of the gate electrode 8517 is silicon oxide or silicon nitride. A sidewall 8521 is formed on the side surface of the gate electrode 8517 so that the base film can be left. Can be done.

0750In the TFT8505, a mask 8522 was formed so as to cover the gate electrode 8517. After that, by performing impurity doping, 8514 used as the LDD (Loff) region , A semiconductor film 8515 used as a source region and a drain region can be formed.

0751In TFT8506, impurity doping is performed after forming the gate electrode 8517. By doing so, 8514 used as the LDD (Lov) region, and the source region and drain region. The semiconductor film 8515 used as a can be formed.

0752Next, the insulating film 8518 is formed (Fig. 85 (G)). The insulating film 8518 is a known means (s). Silicon oxide, silicon nitride, silicon oxide nitride, oxidation nitride, etc. by the putter method, plasma CVD method, etc.) Insulating film with oxygen or nitrogen such as silicon and charcoal such as DLC (diamond-like carbon) It can be provided by a single-layer structure of a film containing an element or a laminated structure thereof.

0753Here, plasma treatment is performed on the surface of the insulating film 8518 to oxidize the surface of the insulating film 8518. May form a plasma-treated insulating film on the surface of the insulating film 8518 by nitriding. .. The plasma-treated insulating film is a rare gas (He, Ne, Ar, Kr) used for plasma treatment. , Including at least one of Xe). In addition, plasma treatment is performed under the conditions described above. It can be done in the same way.

0754Next, the insulating film 8519 is formed. The insulating film 8519 is a known means (sputtering method or plaza). Oxygen such as silicon oxide, silicon nitride, silicon oxide nitride, silicon nitride oxide, etc. Uses a nitrogen-containing insulating film or a carbon-containing film such as DLC (diamond-like carbon). Besides being able to, epoxy, polyimide, polyamide, polyvinylphenol, ben Single-layer structure of organic materials such as zocyclobutene and acrylic and siloxane resin, or the product of these It can be provided in a layered structure. The siloxane resin is a tree containing a Si-O-Si bond. Corresponds to fat. Siloxane has a skeletal structure composed of bonds between silicon (Si) and oxygen (O). Will be done. Organic groups containing at least hydrogen as substituents (eg alkyl groups, aromatic hydrocarbons) Element) is used. A fluoro group can also be used as the substituent. Or as a substituent Alternatively, an organic group containing at least hydrogen and a fluoro group may be used. Also, plasma processing The insulating film has at least the rare gas (He, Ne, Ar, Kr, Xe) used for plasma treatment. (Including one) is included, for example, when Ar is used, Ar is included in the plasma-treated insulating film. It is included.

0755Polyimide, polyamide, polyvinylphenol, benzocyclobu as insulating film 8519 When an organic material such as ten or acrylic or a siloxane resin is used, the surface of the insulating film 8519 is covered. The surface of the insulating film can be modified by oxidation or nitriding by plasma treatment. it can. By modifying the surface, the strength of the insulating film 8519 is improved and when an opening is formed, etc. It is possible to reduce physical damage such as cracks in the surface and film loss during etching. Will be. In addition, by modifying the surface of the insulating film 8519, it is guided onto the insulating film 8519. When the electric film 8523 is formed, the adhesion with the conductive film is improved. For example, with the insulating film 8519 When nitriding is performed using plasma treatment using a siloxane resin, the siloxane resin The surface is nitrided to form a plasma-treated insulating film containing nitrogen or a rare gas. Physical strength is improved.

0756Next, in order to form the conductive film 8523 electrically connected to the semiconductor film 8515, the insulating film 8 Contact holes are formed in 519, the insulating film 8518, and the insulating film 8516. In addition, contour The shape of the hole may be tapered. By doing this, the cover of the conductive film 8523 The ledge can be improved.

0757The method for manufacturing the semiconductor device shown in this embodiment is shown in other embodiments in the present specification. It can also be applied to the method of manufacturing the display device. In addition, the semi-guide shown in the present embodiment The method of manufacturing the body device can also be freely combined and carried out.

0758(Embodiment 16) In this embodiment, as a process for manufacturing a semiconductor device such as a transistor, c. -The futone method will be explained.

0759FIG. 104 is a diagram showing a cross-sectional structure of a semiconductor device including a transistor, a capacitance element, and a resistance element. To. FIG. 104 shows an N-channel transistor 10401 and an N-channel transistor 10. 402, capacitive element 10404, resistance element 10405, P-channel transistor 1040 3 is shown. Each transistor has a semiconductor layer 10505, an insulating layer 10508, and a gate electric power. It has a pole of 10509. The gate electrode 10509 has a first conductive layer 10503 and a second conductive layer. It is formed by a laminated structure of layers 10502. In addition, FIGS. 105 (A) to 105 (E) are shown in FIG. 104. It is a top view corresponding to the transistor, the capacitive element, and the resistance element shown by, and is also referred to. Can be done.

0760In FIG. 104, the N-channel transistor 10401 is in the channel length direction (carrier). Also called low-concentration drain (LDD) on both sides of the gate electrode in the direction of flow) Impurity region forming source region and drain region forming contact with wire 10504 The impurity region 10507 doped at a concentration lower than the impurity concentration of 10506 is the semiconductor layer 1. It is formed at 0505. Impurity region 10506 and impurity region 10507 have N cha When constructing a flannel transistor 10401, phosphorus or the like is used as an impurity that imparts N-type. Has been added. LDD is a means of suppressing hot electron degradation and short-channel effect Is formed.

0761As shown in FIG. 105 (A), the gate electrode 105 of the N-channel transistor 10401 In 09, the first conductive layer 10503 is formed so as to spread on both sides of the second conductive layer 10502. It has been. In this case, the film thickness of the first conductive layer 10503 is the film thickness of the second conductive layer 10502. It is formed thinner than the film thickness. The thickness of the first conductive layer 10503 is 10 to 100 kV. It is formed to a thickness that allows the ionic species accelerated in the world to pass through. Impurity region 1 0507 is formed so as to overlap the first conductive layer 10503 of the gate electrode 10509. .. That is, an LDD region that overlaps with the gate electrode 10509 is formed. This The structure of the first is that in the gate electrode 10509, the second conductive layer 10502 is used as a mask. By adding monoconductive impurities through the conductive layer 10503, impurities are self-aligned. It forms region 10507. That is, it has an LDD that overlaps with the gate electrode. It is formed in a self-consistent manner.

0762In FIG. 104, the N-channel transistor 10402 has impurities on one side of the gate electrode. The impurity region 10507 doped at a concentration lower than the impurity concentration of region 10506 is a semiconductor. It is formed in layer 10505. As shown in FIG. 105 (B), N-channel transients In the gate electrode 10509 of the data 10402, the first conductive layer 10503 is the second conductive layer 1 It is formed to spread on one side of 0502. In this case as well, the second conductive layer 10502 is similarly applied. As a mask, by adding a monoconductive type impurity through the first conductive layer 10503, LDD can be formed in a self-aligned manner.

0763Transistors with LDD on one side have only a positive voltage between the source and drain terminals. Alternatively, it may be applied to a transistor to which only a negative voltage is applied. Specifically, the inverter Transitions that make up logic gates such as circuits, NAND circuits, NOR circuits, and latch circuits Transitions that make up analog circuits such as data, sense amplifiers, constant voltage generators, and VCOs. It may be applied to the star.

0764In FIG. 104, the capacitive element 10404 includes a first conductive layer 10503 and a semiconductor layer 10505. It is formed with the insulating layer 10508 sandwiched between them. Semiconductor layer forming the capacitive element 10404 The 10505 includes an impurity region 10510 and an impurity region 10511. Impurity area Region 10511 is formed in the semiconductor layer 10505 at a position overlapping the first conductive layer 10503. Will be done. Further, the impurity region 10510 forms a contact with the wiring 10504. impurities Region 10511 can be supplemented with monoconductive impurities through the first conductive layer 10503. Therefore, the impurity concentrations contained in the impurity region 10510 and the impurity region 10511 are the same. It can be done or it can be different. In any case, the capacitive element 1040 In 4, since the semiconductor layer 10505 functions as an electrode, a one-conductive impurity is added. It is preferable to reduce the resistance. The first conductive layer 10503 is shown in FIG. 105 (C). As shown in, by using the second conductive layer 10502 as an auxiliary electrode, the electrode and Can be fully functional. In this way, the first conductive layer 10503 and the second conductive layer 1 By forming a composite electrode structure that combines 0502, the capacitive element 10404 is self-contained. It can be formed consistently.

0765In FIG. 104, the resistance element 10405 is formed by the first conductive layer 10503. To. Since the first conductive layer 10503 is formed to a thickness of about 30 to 150 nm, its width and length The resistance element can be configured by appropriately setting the value.

0766The resistance element is composed of a semiconductor layer containing a high concentration of impurity elements and a thin metal layer. Just do it. For semiconductor layers whose resistance value depends on film thickness, film quality, impurity concentration, activation rate, etc. Since the resistance value of the metal layer is determined by the film thickness and the film quality, the metal layer is preferable because the variation is small. Resistor element 1 The top view of 0405 is shown in FIG. 105 (D).

0767In FIG. 104, the P-channel transistor 10403 is impure on the semiconductor layer 10505. It has a physical area 10512. This impurity region 10512 is contoured with wiring 10504. The source region and drain region that form the duct are formed. The configuration of the gate electrode 10509 is The first conductive layer 10503 and the second conductive layer 10502 are overlapped with each other. P channel Type transistor 10403 is a transistor with a single drain structure that does not have an LDD. To. When forming the P-channel transistor 10403, P is in the impurity region 10512. Boron and the like are added as impurities that impart the mold. On the other hand, phosphorus is added to the impurity region 10512. If added, it can be made into an N-channel transistor having a single drain structure. P Chi A top view of the channel transistor 10403 is shown in FIG. 105 (E).

0768Excited by microwave to one or both of semiconductor layer 10505 and insulating layer 10508 The electron temperature is 2eV or less, the ion energy is 5eV or less, and the electron density is 10.¹¹~1 0¹³/cm³Oxidation or nitriding may be performed by a high-density plasma treatment of a degree. This At this time, the substrate temperature is set to 300 to 450 ° C, and the oxidizing atmosphere (O)₂, N₂O etc.) or nitriding atmosphere Surrounding air (N₂, NH₃By treating with (etc.), the semiconductor layer 10505 and the insulating layer 1050 The defect level at the interface of 8 can be reduced. Do this for the insulation layer 10508 As a result, the insulating layer can be made denser. That is, the generation of charge defects is suppressed. Fluctuations in the threshold voltage of the transistor can be suppressed. Also, the transistor is 3V or more. When driven by the lower voltage, the layer oxidized or nitrided by this plasma treatment is cut off. It can be applied as a marginal layer 10508. Also, the drive voltage of the transistor is 3V or more. In the case of, the insulating layer formed on the surface of the semiconductor layer 10505 by this plasma treatment and the CVD method Insulation layer 10 in combination with the insulation layer deposited by (plasma CVD method or thermal CVD method) 508 can be formed. Similarly, this insulating layer is the dielectric of the capacitive element 10404. It can also be used as a body layer. In this case, the insulating layer formed by this plasma treatment , A capacitive element with a large charge capacity because it is a dense film formed with a thickness of 1 to 10 nm. Can be formed.

0769As described with reference to FIGS. 104 and 105, the combination of conductive layers having different film thicknesses. Therefore, elements having various configurations can be formed. Only the first conductive layer is formed The region and the region where the first conductive layer and the second conductive layer are laminated are a diffraction grating pattern or a semipermeable membrane. A photomask or reticle with an auxiliary pattern consisting of a film that has a light intensity reduction function. Can be formed using. That is, in the photolithography process, the photo When exposing the resist, the amount of transmitted light of the photomask is adjusted to develop the resist mass. Different thickness. In this case, pickpockets below the resolution limit on the photomask or reticle. A resist having the above-mentioned complicated shape may be formed by providing a resist. Also, about 20 after development Bake at 0 ° C to deform the mask pattern formed by the photoresist material. I.

0770In addition, an auxiliary pattern having a light intensity reduction function consisting of a diffraction grating pattern or a semipermeable membrane is provided. A region where only the first conductive layer is formed by using the placed photomask or reticle. A region and a region in which the first conductive layer and the second conductive layer are laminated can be continuously formed. As shown in FIG. 105 (A), the region where only the first conductive layer is formed is selectively formed on the semiconductor layer. Can be formed. Such a region is effective on the semiconductor layer, but other than that. It is not necessary in the area (wiring area continuous with the gate electrode). This photomask or By using the chicle, it is not necessary to create a region of only the first conductive layer in the wiring part. The wiring density can be substantially increased.

0771In the case of FIGS. 104 and 105, the first conductive layer is tungsten (W), chromium (Cr), Melting point metals such as tantalum (Ta), tantalum nitride or molybdenum (Mo), or high melting An alloy or compound containing a point metal as a main component is formed with a thickness of 30 to 50 nm. Also, the first 2 Conductive layers are tungsten (W), chromium (Cr), tantalum (Ta), tantalum nitride, etc. Is a refractory metal such as molybdenum (Mo), or an alloy or compound containing a refractory metal as the main component. The mixture is formed to a thickness of 300 to 600 nm. For example, the first conductive layer and the second conductive layer, respectively. Use different conductive materials so that there will be a difference in etching rate in the subsequent etching process. To. As an example, a tantalum nitride film is used as the first conductive layer, and a tongue is used as the second conductive layer. A stainless steel film can be used.

0772In the present embodiment, an auxiliary having a light intensity reducing function composed of a diffraction grating pattern or a semipermeable membrane Transis with different electrode structures using a photomask or reticle with a pattern The data, capacitance element, and resistance element can be made separately by the same patterning process. Is shown. As a result, the number of processes for elements with different forms can be increased according to the characteristics of the circuit. It can be built and integrated.

0773The method for manufacturing the semiconductor device shown in this embodiment is shown in other embodiments in the present specification. It can also be applied to the method of manufacturing the display device. In addition, the semi-guide shown in the present embodiment The method of manufacturing the body device can also be freely combined and carried out.

0774(Embodiment 17) In the present embodiment, it can be applied when a light emitting element is provided in the display device of the present invention. The configuration of the above will be described with reference to FIGS. 86 and 102.

0775For light emitting devices that utilize electroluminescence, the light emitting material is an organic compound or mineralized. It is distinguished by whether it is a compound or not, and in general, the former is an organic EL element and the latter is an inorganic EL element. being called.

0776The inorganic EL element is divided into a dispersed inorganic EL element and a thin film type inorganic EL element depending on the element configuration. It is similar. The former has an electroluminescent layer in which particles of luminescent material are dispersed in a binder, and the latter has an electroluminescent layer. The difference is that it has an electroluminescent layer made of a thin film of luminescent material, but it is accelerated by a high electric field. It is common in that it requires electrons. The mechanism of light emission obtained is Donna. -Donors that utilize levels and acceptor levels-Acceptor-recombined luminescence and metal ions There is localized emission that utilizes the inner-shell electron transition of. Generally, in distributed inorganic EL, donor- In many cases, acceptor recombination type light emission and thin film type inorganic EL element are localized type light emission.

0777The light emitting material that can be used in the present invention is composed of a base material and an impurity element that serves as a light emitting center. Will be done. By changing the impurity elements contained, it is possible to obtain light emission of various colors. .. As a method for producing a luminescent material, various methods such as a solid phase method and a liquid phase method (coprecipitation method) are used. Can be done. In addition, the spray thermal decomposition method, the compound decomposition method, the method by the thermal decomposition reaction of the precursor, and the reverse Micelle methods, methods that combine these methods with high-temperature firing, liquid phase methods such as freeze-drying methods, etc. Can be used.

0778In the solid-phase method, the base material and the impurity element or the compound containing the impurity element are weighed and mixed in a mortar. This is a method in which the base material contains an impurity element by heating and firing in an electric furnace to cause a reaction. Grilled The growth temperature is preferably 700 to 1500 ° C. If the temperature is too low, the solid-phase reaction will not proceed and the temperature will rise. This is because if the degree is too high, the base material will be decomposed. In addition, firing is performed in the powder state. Although it may be used, it is preferable to perform firing in a pellet state. In the solid phase method, other methods such as the liquid phase method It requires firing at a relatively high temperature compared to the method, but because it is a simple method, it is highly productive. Suitable for mass production.

0779The liquid phase method (coprecipitation method) is a compound containing a base material or a base material, and an impurity element or an impurity element. This is a method in which a compound containing the above is reacted in a solution, dried, and then calcined. Luminescent material grains The child is uniformly distributed, the particle size is small, and the reaction proceeds even at a firing temperature lower than the firing temperature of the solid-phase method. be able to.

0780Sulfide, oxide, and nitride can be used as the base material used for the light emitting material. Examples of sulfides include zinc sulfide, cadmium sulfide, calcium sulfide, and ittriu sulfide. , Gallium sulfide, strontium sulfide, barium sulfide and the like can be used. Also, As the oxide, for example, zinc oxide, yttrium oxide and the like can be used. Also, As the nitride, for example, aluminum nitride, gallium nitride, indium nitride or the like is used. be able to. Furthermore, zinc selenide, zinc telluride, etc. can also be used, and calcium sulfide can be used. Three-dimensional system such as um-gallium, strontium sulfide-gallium, barium sulfide-gallium, etc. It may be a mixed crystal of.

0781Manganese (Mn), copper (Cu), samarium (Sm), and te Rubidium (Tb), Erbium (Er), Thulium (Tm), Europium (Eu), Ce Rium (Ce), praseodymium (Pr), etc. can be used. In addition, charge compensation Then, halogen elements such as fluorine (F) and chlorine (Cl) may be added.

0782On the other hand, the first that forms the donor level as the emission center of donor-acceptor recombined luminescence. Use a luminescent material containing the impurity element of the above and the second impurity element forming the acceptor level. be able to. The first impurity element is, for example, fluorine (F), chlorine (Cl), aluminium. Aluminum (Al) or the like can be used. As the second impurity element, for example, copper (Cu), Silver (Ag) or the like can be used.

0783When synthesizing a luminescent material for donor-acceptor recombined luminescence using the solid-phase method, the parent material And a compound containing the first impurity element or the first impurity element, and the second impurity element or the second Weigh the compounds containing the impurity elements of the above, mix them in a mortar, and then heat and bake them in an electric furnace. Do. As the base material, the above-mentioned base material can be used, and the first impurity element or Examples of the compound containing the first impurity element include fluorine (F), chlorine (Cl), and sulfur sulfide. Luminium or the like can be used, and a compound containing a second impurity element or a second impurity element. As, for example, copper (Cu), silver (Ag), copper sulfide, silver sulfide and the like can be used. The firing temperature is preferably 700 to 1500 ° C. If the temperature is too low, the solid-phase reaction will not proceed and This is because if the temperature is too high, the base material will decompose. In addition, firing is performed in the powder state. Although it may be used, it is preferable to perform firing in a pellet state.

0784In addition, as impurity elements when using solid-phase reaction, the first impurity element and the second impurity source Compounds composed of elements may be used in combination. In this case, impurity elements are diffused Since the solid-phase reaction is easy to proceed, a uniform luminescent material can be obtained. In addition, Since no impurity element is contained, a highly pure luminescent material can be obtained. First impurity As the compound composed of the element and the second impurity element, for example, copper chloride, silver chloride, etc. are used. Can be

0785The concentration of these impurity elements should be 0.01 to 10 atom% with respect to the base material. It is good, preferably in the range of 0.05 to 5 atom%.

0786In the case of the thin film type inorganic EL, the electroluminescent layer is a layer containing the above-mentioned light emitting material, and is subjected to a resistance heating vapor deposition method. Vacuum vapor deposition method such as electron beam vapor deposition (EB vapor deposition), physical vapor deposition method such as sputtering method ( Chemical vapor deposition (CV) such as PVD), organometallic CVD method, hydride transport vacuum CVD method, etc. It can be formed by using D), atomic layer epitaxy method (ALE), or the like.

0787Figures 86 (A) to (C) show an example of a thin-film inorganic EL device that can be used as a light emitting device. Is shown. In FIGS. 86 (A) to 86 (C), the light emitting element is the first electrode layer 8600 and the electric field generation. Includes a light layer 8602 and a second electrode layer 8603.

0788The light emitting elements shown in FIGS. 86 (B) and 86 (C) are the light emitting elements shown in FIG. 86 (A). It is a structure in which an insulating layer is provided between the polar layer and the electroluminescent layer. The light emitting element shown in FIG. 86 (B) is the first An insulating layer 8604 is provided between the electrode layer 8600 and the electroluminescent layer 8602, and is shown in FIG. 86 (C). The light emitting element shown is an insulating layer 8604a between the first electrode layer 8600 and the electroluminescent layer 8602. , It has an insulating layer 8604b between the second electrode layer 8603 and the electroluminescent layer 8602. .. In this way, even if the insulating layer is provided only between one of the pair of electrode layers sandwiching the electroluminescent layer. It may be provided between both. Further, the insulating layer may be a single layer or a laminated layer composed of a plurality of layers. Good.

0789Further, in FIG. 86 (B), an insulating layer 8604 is provided so as to be in contact with the first electrode layer 8600. However, the order of the insulating layer and the electroluminescent layer is reversed so that they are in contact with the second electrode layer 8603. An insulating layer 8604 may be provided.

0790In the case of dispersed inorganic EL, a particulate electroluminescent material is dispersed in a binder to form a film-like electroluminescent layer. To be done. If the method for producing the luminescent material does not provide enough particles of the desired size, It may be processed into particles by crushing in a mortar or the like. Binder is a granular luminescent material. It is a substance for fixing in a dispersed state and maintaining the shape as an electroluminescent layer. Luminescent material , It is uniformly dispersed and fixed in the electroluminescent layer by a binder.

0791In the case of dispersed inorganic EL, the method of forming the electroluminescent layer is a droplet capable of selectively forming an electroluminescent layer. Application such as ejection method, printing method (screen printing, offset printing, etc.), spin coating method, etc. A method, a dipping method, a dispenser method, or the like can also be used. The film thickness is particularly limited This is not the case, but is preferably in the range of 10 to 1000 nm. In addition, luminescent material and buy The proportion of luminescent material in the electroluminescent layer containing the solder shall be 50 wt% or more and 80 wt% or less. Good.

0792One of the dispersed inorganic EL elements that can be used as a light emitting element in FIGS. 102 (A) to 102 (C). An example is shown. The light emitting elements in FIG. 102 (A) are the first electrode layer 10200 and the electroluminescent layer 1. 0202, having a laminated structure of the second electrode layer 10203, vine in the electroluminescent layer 10202 Includes luminescent material 10201 held by da.

0793As the binder that can be used in this embodiment, an organic material or an inorganic material is used. A mixed material of an organic material and an inorganic material may be used. As an organic material, cyanoe Polymers with a relatively high dielectric constant, such as chill cellulosic resins, polyethylene, polyps, etc. Lopyrene, polystyrene resin, silicone resin, epoxy resin, vinylidene fluoride, etc. Resin can be used. Also, aromatic polyamide, polybenzimidazole (po) Even if a heat-resistant polymer such as lybenzimidazole) or a siloxane resin is used Good. The siloxane resin corresponds to a resin containing a Si-O-Si bond. Shiroxa The skeleton structure is composed of the bond between silicon (Si) and oxygen (O). As a substituent Organic groups containing at least hydrogen (eg alkyl groups, aromatic hydrocarbons) are used. Replacement A fluoro group may be used as the group. Or an organic containing at least hydrogen as a substituent A group and a fluoro group may be used. Also, polyvinyl alcohol, polyvinyl butyler Vinyl resin such as le, phenol resin, novolak resin, acrylic resin, melamine resin, Resin materials such as urethane resin and oxazole resin (polybenzoxazole) may be used. I. High dielectric constant fine particles such as barium titanate and strontium titanate are added to these resins. It is also possible to adjust the dielectric constant by mixing the children appropriately.

0794Examples of the inorganic material contained in the binder include silicon oxide, silicon nitride, silicon containing oxygen and nitrogen, and the like. Aluminum nitride, aluminum containing oxygen and nitrogen or aluminum oxide, titanium oxide , Barium titanate, strontium titanate, lead titanate, potassium niobate, nio Lead broth, tantalum oxide, barium tantalate, lithium tantalate, yttrium oxide, Formed from materials selected from substances including zirconium oxide, zinc sulfide and other inorganic insulating materials can do. Inorganic material with high dielectric constant is included (by addition, etc.) By, the dielectric constant of the electroluminescent layer made of a light emitting material and a binder can be further controlled. Therefore, the dielectric constant can be increased.

0795In the manufacturing process, the luminescent material is dispersed in a solution containing a binder, but is used in the present embodiment. As the solvent of the solution containing the binder, the binder material is dissolved and the electroluminescent layer is used. (Various wet processes) and a solution with a viscosity suitable for the desired film thickness can be prepared. Such a solvent may be appropriately selected. An organic solvent or the like can be used, for example, with a binder. When using siloxane resin, propylene glycol monomethyl ether, propi Lenglycol Monomethyl Ether Acetate (also known as PGMEA), 3-Metoshiki- 3 Methyl-1-butanol (also called MMB) or the like can be used.

0796The light emitting element shown in FIGS. 102 (B) and 102 (C) has the odor of the light emitting element shown in FIG. 102 (A). The structure is such that an insulating layer is provided between the electrode layer and the electroluminescent layer. Light emitting element shown in FIG. 102 (B) Has an insulating layer 10204 between the first electrode layer 10200 and the electroluminescent layer 10202. The light emitting element shown in FIG. 102 (C) is a combination of the first electrode layer 10200 and the electroluminescent layer 10202. Insulated between the insulating layer 10204a, the second electrode layer 10203 and the electroluminescent layer 10202 It has layer 10204b. In this way, the insulating layer is a pair of electrode layers that sandwich the electroluminescent layer. It may be provided only between one of them, or it may be provided between both of them. Even if the insulating layer is a single layer It may be a laminate composed of a plurality of layers.

0797Further, in FIG. 102 (B), the insulating layer 10204 is provided so as to be in contact with the first electrode layer 10200. However, the order of the insulating layer and the electroluminescent layer is reversed so that they come into contact with the second electrode layer 10203. Insulation layer 10204 may be provided as such.

0798Insulating layers such as the insulating layer 8604 in FIG. 86 and the insulating layer 10204 in FIG. 102 are Although not particularly limited, it is preferable that the film has a high dielectric strength and a fine film quality, and further. It is preferable that the dielectric constant is high. For example, silicon oxide, yttrium oxide, silicon oxide Tan, aluminum oxide, hafnium oxide, tantalum oxide, barium titanate, titanate Strontium, lead titanate, silicon nitride, zirconium oxide, etc. or a mixed film of these Two or more types of laminated films can be used. These insulating films are sputtered, vapor-deposited, and C. A film can be formed by VD or the like. In addition, the insulating layer contains particles of these insulating materials in the binder. It may be dispersed in a film. The binder material is the same material as the binder contained in the electroluminescent layer. It may be formed by using a material and a method. The film thickness is not particularly limited, but is preferably 10. It is in the range of ~ 1000 nm.

0799In the light emitting element shown in the present embodiment, a voltage is applied between a pair of electrode layers sandwiching an electroluminescent layer. Although light emission can be obtained by this, it can operate in either DC drive or AC drive. To.

0800The display device shown in this embodiment is the display device shown in other embodiments in the present specification. It can be implemented in any combination with the configuration of. In addition, the display device shown in this embodiment The configuration of the device can be freely combined and implemented.

0801(Embodiment 18) Figure 87 shows a display module that combines a display panel 8701 and a circuit board 8702. ing. The circuit board 8702 includes, for example, a control circuit 8703 and a signal division circuit 87. 04 etc. are formed. In addition, the display panel 8701 and the circuit board 8702 are connected to each other. It is connected via line 8708.

0802This display panel 8701 includes a pixel portion 8705 in which a display element is provided for each pixel and a scanning line drive. It has a dynamic circuit 8706 and a signal line drive circuit 8707 that supplies video signals to selected pixels. ing. The pixels are the same as in the ninth and tenth embodiments. Scan line drive circuit 870 6 is the same as that of the first to eighth embodiments. Signal line drive circuit 8707 is implemented It is the same as the form 11.

0803However, as already mentioned, the signal line drive circuit 8707 is not always necessary, and the circuit base The video signal may be supplied from the board 8702 to the selected pixels via the connection wiring 8708. .. Further, the scanning line drive circuit 8706 may be arranged on both sides of the pixel unit 8705.

0804With this display module, you can complete an LCD TV receiver or an EL TV receiver. Wear. FIG. 88 is a block diagram showing a main configuration of a television receiver. Tuner 8801 Receives video and audio signals. The video signal is from the video signal amplifier circuit 8802 and from there. Video signal processing circuit 880 that converts the output signal into a color signal corresponding to each color of red, green, and blue. 3 and the control circuit 880 for converting the video signal to the input specifications of the driver IC Processed by 4. The control circuit 8804 signals on the scanning line side and the signal line side, respectively. Outputs. For digital drive, a signal division circuit 8805 is provided on the signal line side for input. The digital signal may be divided into m pieces and supplied.

0805Of the signals received by the tuner 8801, the audio signal is sent to the audio signal amplifier circuit 8806. , The output is supplied to the speaker 8808 via the audio signal processing circuit 8807. Control times Road 8809 receives control information of the receiving station (reception frequency) and volume from the input unit 8810, and chews. Sends a signal to the 8801 and the audio signal processing circuit 8807.

0806As shown in Fig. 89, the display module is assembled in the housing 8901 to complete the TV receiver. Can be made to. The display module forms a display panel 8902. Also, Speaker 8903, operation switch 8904, etc. are provided as appropriate.

0807This TV receiver is configured to include a display panel 8902 to reduce the number of parts. can do. Therefore, this television receiver can be manufactured at low cost.

0808Of course, the present invention is not limited to television receivers, but includes computer monitors and railways. Information display boards at stations and airports, advertisement display boards on the streets, and other large-area display media It can be applied to various uses.

0809It should be noted that the configurations of the display panel and the display module shown in the present embodiment are other actual components in the present specification. It can be implemented in any combination with the configuration of the display device shown in the form of application. Also a book The configuration of the display panel and display module shown in the embodiment can be freely combined and implemented. Can be done.

0810(Embodiment 19) Figure 90 (A) shows a module that combines the display panel 9001 and the printed circuit board 9002. Shown. The display panel 9001 has a pixel portion 9003 provided with a plurality of pixels and a first run. It has an inspection line drive circuit 9004, a second scanning line drive circuit 9005, and a signal line drive circuit 9006. doing. Of course, the configuration of the display panel 9001 is shown in FIGS. 9, 11, 12, and 44. A similar configuration may be used.

0811Printed circuit board 9002 includes controller 9007, central processing unit (CPU) 9008, Memory 9009, power supply circuit 90010, audio processing circuit 90011 and transmission / reception circuit 9001 2 etc. are provided. The printed circuit board 9002 and the display panel 9001 are FPCs. Kisible Print Circuit) Connected by 90013. For FPC90013 , Capacitive element, buffer circuit, etc. are provided, and noise is added to the power supply voltage and signal, and the signal rises. It may be configured to prevent the rise from becoming dull. Also controller 9007, audio Processing circuit 90011, memory 9009, CPU9008, power supply circuit 90010, etc. are C It can also be mounted on the display panel 9001 using the OG (Chip on Glass) method. it can. The scale of the printed circuit board 9002 can be reduced by the COG method.

0812Through the interface (I / F) section 90014 provided on the printed circuit board 9002, Input and output of various control signals are performed. Also, for sending and receiving signals to and from the antenna. The antenna port 90015 is provided on the printed circuit board 9002.

0813FIG. 90 (B) shows a block diagram of the module shown in FIG. 90 (A). This module As memory 9009 VRAM90016, DRAM90017, flash memory 90018 etc. are included. Image data to be displayed on the panel in VRAM90016 However, the DRAM 90017 has image data or audio data, and the flash memory 9001 Various programs are stored in 8.

0814Power circuit 90010 includes display panel 9001, controller 9007, CPU9008, Provides power to operate the audio processing circuit 90011, memory 9009, and transmission / reception circuit 90012. To supply. Also, depending on the panel specifications, if the power supply circuit 90010 is equipped with a current source. There is also a case.

0815CPU9008 has a control signal generation circuit 90020, a decoder 90021, and a register 900. 22, Interface for arithmetic circuit 90023, RAM90024, CPU9008 9 It has 0019 and so on. Input to CPU 9008 via interface 90019 The various signals are once held in the register 90022, and then the arithmetic circuit 90023 and deco. -Entered in data such as 90021. In the arithmetic circuit 90023, it plays based on the input signal. Perform calculations and specify where to send various instructions. On the other hand, the signal input to the decoder 90021 is It is decoded and input to the control signal generation circuit 90020. Control signal generation circuit 90020 Generates signals including various instructions based on the input signal, and in the arithmetic circuit 90023 Specified location, specifically memory 9009, transmit / receive circuit 90012, audio processing circuit 90 Send to 011, controller 9007, etc.

0816Memory 9009, transmission / reception circuit 90012, audio processing circuit 90011, controller 900 7 operates according to the instructions received respectively. The operation will be briefly described below.

0817The signal input from the input means 90025 is pre-processed via the interface unit 90014. It is sent to the CPU 9008 mounted on the board 9002. Control signal generation circuit 90020 Is a message sent from input means 90025 such as a pointing device or keyboard. According to the issue, the image data stored in VRAM90016 is converted to the specified format. , Send to controller 9007.

0818The controller 9007 is an image sent from the CPU 9008 according to the panel specifications. Data processing is applied to the signal containing the data, and the signal is supplied to the display panel 9001. Also control La 9007 is input from the power supply voltage input from the power supply circuit 90010 or from the CPU 9008. Hsync signal, Vsync signal, clock signal CLK, AC signal based on various signals Pressure (AC Cont), switching signal L / R is generated and supplied to the display panel 9001.

0819In the transmission / reception circuit 90012, the signal transmitted / received as radio waves at the antenna 90028 Processed, specifically isolators, bandpass filters, VCOs (Voltags) e Controlled Oscillator), LPF (Low Pass Fi) Includes high frequency circuits such as lter), couplers and baluns. In the transmission / reception circuit 90012 Among the signals transmitted and received, the signal including voice information follows the instruction from CPU9008. , Sent to the audio processing circuit 90011.

0820The signal including the voice information sent according to the instruction of CPU9008 is the voice processing circuit 900. At 11, it is demodulated into an audio signal and sent to speaker 90027. Also Mike 900 The audio signal sent from 26 is modulated by the audio processing circuit 90011 and CPU9. It is sent to the transmission / reception circuit 90012 according to the instruction from 008.

0821Controller 9007, CPU9008, power supply circuit 90010, audio processing circuit 90011 , Memory 9009 can be implemented as a package of this embodiment. This implementation The form is an isolator, a bandpass filter, and a VCO (Voltage Control). led Oscillator), LPF (Low Pass Filter), coupler , Balun and other high-frequency circuits can be applied to any circuit.

0822It should be noted that the configurations of the display panel and the display module shown in the present embodiment are other actual components in the present specification. It can be implemented in any combination with the configuration of the display device shown in the form of application. Also a book The configuration of the display panel and display module shown in the embodiment can be freely combined and implemented. Can be done.

0823(Embodiment 20) FIG. 91 shows one aspect of a mobile phone that includes the module of embodiment 19. Display The flannel 9101 is detachably integrated into the housing 91030. Housing 91030 Can be appropriately changed in shape and dimensions according to the size of the display panel 9101. table The housing 91030 to which the display panel 9101 is fixed is fitted to the printed circuit board 91031. Assembled as a module.

0824The display panel 9101 is connected to the printed circuit board 91031 via the FPC91013. The printed circuit board 91031 has a speaker 91032, a microphone 91533, and transmission / reception. A signal processing circuit 91835 including circuit 91534, CPU, controller, etc. is formed. ing. Combining such a module with input means 91736 and battery 91037 Then store it in the housing 91039. The pixel part of the display panel 9101 is formed on the housing 91039. Arrange so that it can be seen from the open window.

0825The display panel 9101 has a pixel unit having a plurality of pixels and a scanning line drive circuit. Run The mobile phone of FIG. 91 can be manufactured at low cost by integrally forming the inspection line drive circuit with the pixel portion. can do. In addition, since the number of display module parts is reduced, the yield is increased. Benefits such as weight reduction and miniaturization can be obtained.

0826The mobile phone according to the present embodiment can be transformed into various modes depending on its function and application. .. For example, it may be equipped with multiple display panels, or the housing may be divided into multiple parts and opened / closed with hinges. Even with this configuration, the above-mentioned effects can be achieved.

0827It should be noted that the configurations of the display panel and the display module shown in the present embodiment are other actual components in the present specification. It can be implemented in any combination with the configuration of the display device shown in the form of application. Also a book The configuration of the display panel and display module shown in the embodiment can be freely combined and implemented. Can be done.

0828(Embodiment 21) The present embodiment is a mobile phone 10300 including the display module described in the 19th embodiment. An example of completing the above will be illustrated.

0829The mobile phones shown in FIG. 103 are operation switches 10304 and microphone 10305. Main unit (A) 10301 equipped with throat, display panel (A) 10308, display panel (B) ) 10309, main body (B) 10302 equipped with speaker 10306, etc., and hinge 1 It is connected so that it can be opened and closed at 0310. Display panel (A) 10308 and display panel (B) The 10309 is housed in the housing 10303 of the main body (B) 10302 together with the circuit board 10307. It is stored. The pixel part of the display panel (A) 10308 and the display panel (B) 10309 is a housing. It is arranged so that it can be visually recognized from the opening window formed in the body 10303.

0830The display panel (A) 10308 and the display panel (B) 10309 are the mobile phone 1030. Specifications such as the number of pixels can be set as appropriate according to the function of 0. For example, display panel A By combining 10308 as the main screen and display panel B10309 as the sub screen Wear.

0831The display panel (A) 10308 and the display panel (B) 10309 are images having a plurality of pixels. It has a base part and a scanning line drive circuit. By integrally forming the scanning line drive circuit with the pixel part Therefore, the mobile phone of FIG. 103 can be manufactured at low cost. Also, of the display module Since the number of parts is reduced, it is possible to obtain benefits such as increased yield, weight reduction, and miniaturization. it can.

0832By using such a display panel, characters and images can be displayed on the display panel (A) 10308. A high-definition color display screen to be displayed, and display panel (B) 10309 to display character information. It can be a single color information display screen. Especially the display panel (B) 10309 is activated As a Bumatrix type, by increasing the definition, various character information can be displayed. The information display density per screen can be improved. For example, display panel (A) 103 08, 2 to 2.5 inches, 64 gradations, 260,000 colors QVGA (320 dots x 240 dots) G), and the display panel (B) 10309 is a single color with 2 to 8 gradations and 180 to 220 ppi. As a high-definition panel, romaji, hiragana, katakana, kanji, Arabic, etc. Can be displayed.

0833The mobile phone according to the present embodiment can be transformed into various modes depending on its function and application. .. For example, an image sensor is incorporated in the hinge 10310 to make a mobile phone with a camera. You may. In addition, operation switches 10304, display panel (A) 10308, display panel (B) Even if the 10309 is housed in one housing, the above-mentioned effects can be achieved. Can be done. Further, the configuration of the present embodiment is applied to an information display terminal having a plurality of display units. Can also obtain the same effect.

0834It should be noted that the configurations of the display panel and the display module shown in the present embodiment are other actual components in the present specification. It can be implemented in any combination with the configuration of the display device shown in the form of application. Also a book The configuration of the display panel and display module shown in the embodiment can be freely combined and implemented. Can be done.

0835(Embodiment 22) The present invention can be applied to various electronic devices. Specifically, it applies to the display of electronic devices. Can be As such electronic devices, cameras such as video cameras and digital cameras , Goggles type display, navigation system, sound reproduction device (car audio, Audio components, etc.), computers, game machines, personal digital assistants (mobile computers, etc.) An image playback device equipped with a telephone, a mobile phone, a portable game machine, an electronic book, etc., and a recording medium (specifically) It plays a recording medium such as Digital Versatile Disc (DVD). , A device equipped with a light emitting device capable of displaying the image) and the like.

0836FIG. 93 (A) shows a light emitting device, which is a housing 93001, a support base 93002, and a display unit 93003. , Speaker section 93004, video input terminal 93005, etc. are included. The display device of the present invention is shown in the table. It can be used for the indicator 93003. The light emitting device is for personal computers, Includes all information display light emitting devices for receiving television broadcasts, displaying advertisements, etc. Main departure A light emitting device that uses a bright display device for the display unit 93003 emits faint light emitted by off-current. It can be reduced and a clear display can be performed.

0837FIG. 93 (B) is a camera, which includes a main body 93101, a display unit 93102, and an image receiving unit 93103. Includes operation key 93104, external connection port 93105, shutter button 93106, etc. ..

0838A digital camera using the present invention for the display unit 93102 emits faint light emitted by an off-current. It can be reduced and a clear display can be performed.

0839Figure 93 (C) shows a computer, which is the main body 93201, housing 93202, and display 932. 03, keyboard 93204, external connection port 93205, pointing device 93 Including 206 etc. A computer using the present invention for the display unit 93203 uses off-current. It is possible to reduce the generated faint light emission and perform a beautiful display.

0840Figure 93 (D) shows a mobile computer, which is the main body 93301, display unit 93302, and screen. Includes switch 93303, operation keys 93304, infrared port 93305, etc. Table of the present invention The mobile computer used for indicator 93302 reduces the faint light emission caused by off-current. However, it is possible to display beautifully.

0841Figure 93 (E) shows a portable image playback device (specifically, a DVD playback device) equipped with a recording medium. Yes, main body 93401, housing 93402, display unit A93403, display unit B93404, note Recording medium (DVD, etc.) Reading unit 93405, operation key 93406, speaker unit 9340 Including 7 mag. The display unit A93403 mainly displays image information, and the display unit B93404 mainly displays image information. Character information can be displayed as. The present invention is applied to the display unit A93403 and the display unit B934. The image playback device used in 04 reduces the faint light emission caused by the off-current and provides a clean display. It becomes possible to do.

0842Fig. 93 (F) shows a goggle type display, which is the main body 93501, the display unit 93502, Includes arm 93503. Goggles type display using the present invention for the display unit 93502 Reduces the faint light emission caused by the off-current, and enables a clear display.

0843Figure 93 (G) shows a video camera, which is the main body 93601, the display unit 93602, and the housing 936. 03, external connection port 93604, remote control receiver 93605, image receiver 93606, back Includes terry 93607, voice input 93608, operation keys 93609, etc. Display the present invention The video camera used in part 93602 reduces the faint light emission caused by the off-current and is clean. Display is possible.

0844Figure 93 (H) shows a mobile phone, which is the main body 93701, the housing 93702, and the display unit 9370. 3, voice input unit 93704, voice output unit 93705, operation key 93706, external connection port Includes 93707, antenna 93708, etc. A mobile phone using the present invention for the display unit 93703 The speaker can reduce the faint light emission caused by the off-current and make a clear display. ..

0845As described above, the present invention can be applied to any electronic device.

0846The configuration of the electronic device shown in this embodiment is shown in the table shown in other embodiments in the present specification. It can be implemented in any combination with the configuration of the display device.

0847(Embodiment 23) In this embodiment, a display panel using the pixel configuration of the display device of the present invention as a display unit is used. The application form will be illustrated and explained with respect to the applied example. Display unit of the pixel configuration of the display device of the present invention The display panel used in the above can also be configured to be integrally provided with a moving body, a building, or the like.

0848Regarding an example of a display panel having a pixel configuration of the display device of the present invention in the display unit, the display device integrated type As an example, FIG. 94 shows a moving body of the above. FIG. 94 (a) shows a moving body with an integrated display device. As an example, display panel 9402 on the glass of the door glass door in the train car body 9401 An example used is shown. The display unit has a pixel configuration of the display device of the present invention shown in FIG. 94 (a). The display panel 9402 allows switching of images displayed on the display unit by an external signal. It's easy. Therefore, the image of the display panel is displayed for each time zone when the passenger base of train passengers changes. Switching can realize more effective advertising effect.

0849A display panel having a pixel configuration of the display device of the present invention in the display unit is shown in FIG. 94 (a). Not limited to being applicable only to the glass of the door in the main body of the train car By making its shape different, it can be applied to all kinds of places. Figure 94 (b) An example will be described in.

0850FIG. 94 (b) illustrates the inside of the train car body. Figure 94 In (b), in addition to the display panel 9402 of the glass door of the door shown in Fig. 94 (a), Display panel 9403 provided on the lath window and display panel 940 suspended from the ceiling Shows 4. The display panel 9403 provided with the pixel configuration of the display device of the present invention is a self-luminous table. Since it is equipped with a display element, an image for advertising is displayed when it is crowded, and it is not displayed when it is not crowded. By doing so, you can also see the appearance from the train. In addition, the pixel configuration of the display device of the present invention The display panel 9404 provided is a film-like substrate for switching organic transistors, etc. By providing an element and driving a self-luminous display element, the display panel itself is curved to display. It is also possible to do it.

0851Further, a display device integrated type using a display panel having a pixel configuration of the display device of the present invention in the display unit. An application example of the moving body of the above will be described with reference to FIG. 95.

0852Regarding an example of a display panel having a pixel configuration of the display device of the present invention in the display unit, the display device integrated type As an example, FIG. 95 shows a moving body of the above. FIG. 95 shows an example of a moving body with an integrated display device. An example of a display panel 9502 integrally attached to an automobile body 9501 is shown. The display panel 9502 having the pixel configuration of the display device of the present invention shown in FIG. 95 in the display unit is automatic. It is installed integrally with the car body and turns on the movement of the car body and the information input from inside and outside the car body. It displays on demand and also has a navigation function to the destination of the car.

0853The display panel having the pixel configuration of the display device of the present invention in the display unit is the vehicle body shown in FIG. 95. Not limited to being applicable only to the front part of the Therefore, it can be applied to all kinds of places such as glass windows and doors.

0854Further, a display device integrated type using a display panel having a pixel configuration of the display device of the present invention in the display unit. An application example of the moving body of the above will be described with reference to FIG. 96.

0855Regarding an example of a display panel having a pixel configuration of the display device of the present invention in the display unit, the display device integrated type As an example, FIG. 96 shows a moving body of the above. Figure 96 (a) shows a moving body with an integrated display device. As an example, a display panel 9602 integrally attached to the ceiling of the audience seats inside the airplane body 9601. An example of is shown. A table in which the display unit has a pixel configuration of the display device of the present invention shown in FIG. 96 (a). The display panel 9602 is mounted integrally via the airplane body 9601 and the hinge part 9603. The expansion and contraction of the hinge part 9603 allows passengers to view the display panel 9602. .. The display panel 9602 displays information by being operated by passengers, and also as an advertisement or entertainment means. Has functions that can be used. Also, as shown in Fig. 96 (b), the hinge part is bent to fly. By storing it in the body of the aircraft 9601, it is possible to consider safety during takeoff and landing. In addition, it should be noted. By turning on the display element of the display panel in an emergency, it can be used as a guide light for the airplane body 9601. Is also available.

0856The display panel having the pixel configuration of the display device of the present invention in the display unit is the flight shown in FIG. 96. Not limited to being applicable only to the ceiling of the body 9601, its shape is different By slackening, it can be applied to all kinds of places such as seats and doors. For example, a seat A display panel may be provided behind the front seat for operation and viewing.

0857In the present embodiment, the moving body is a train vehicle body, an automobile body, or an airplane body. This is illustrated, but not limited to this, motorcycles, motorcycles (including automobiles, buses, etc.) , Trains (including monorails, railroads, etc.), ships, etc. Pixel structure of the display device of the present invention By applying this, the display panel can be made smaller, the power consumption can be reduced, and the operation is good. It is possible to provide a mobile body including a display medium. Also, especially for external signals Therefore, it is easy to switch the display of the display panel in the moving body all at once, so it is not possible. It is extremely useful as an advertisement display board for a large number of specific customers and as an information display board in the event of an emergency disaster. It can be said that it is for use.

0858Further, regarding an application example using a display panel having a pixel configuration of the display device of the present invention in the display unit. , The application form used for the building will be described with reference to FIG. 97.

0859FIG. 97 shows a film-like display panel having a pixel configuration of the display device of the present invention in the display unit. A switching element such as an organic transistor is provided on the substrate to drive a self-luminous display element. By doing so, the display panel itself can be curved to make it a display panel that can be displayed, and its application examples explain. In FIG. 97, the song of a columnar body provided outdoors such as a utility pole as a building. A display panel is provided on the surface, and here, a display panel 9702 is attached to the utility pole 9701 as a columnar body. The configuration to be provided is shown.

0860The display panel 9702 shown in FIG. 97 is located in the middle of the height of the utility pole and is viewed from a human perspective. Install at a higher position. Then, by visually observing the display panel from the moving body 9703, the table The image on the display panel 9702 can be recognized. Repeated forest outdoors like a utility pole By displaying the same image on the display panel 9702 provided on a standing and forested utility pole. Therefore, the viewer can visually recognize the information display and the advertisement display. Utility pole 9701 in Figure 97 The display panel 9702 provided in the above makes it easy to display the same image from the outside. Therefore, extremely efficient information display and advertising effect can be realized. In addition, the table of the display device of the present invention By providing a self-luminous display element as a display element on the display panel, it can be viewed even at night. It can be said that it is useful as a highly recognizable display medium.

0861Further, a display panel having a display device using the pixel configuration of the display device of the present invention in the display unit is used. An application form of a building different from that of FIG. 97 will be described with reference to FIG. 98.

0862FIG. 98 shows an application example of a display panel having a pixel configuration of the display device of the present invention in the display unit. .. Figure 98 shows an example of an integrated display device, which is integrally mounted on the side wall inside the unit bath 9801. An example of the displayed display panel 9802 is shown. Pixel configuration of the display device of the present invention shown in FIG. 98 The display panel 9802, which has a display unit using, is installed integrally with the unit bath 9801. The bather will be able to view the display panel 9802. Display panel 9802 is on It has a function to display information by being operated by a bather and to be used as an advertisement or an entertainment means.

0863The display panel having the pixel configuration of the display device of the present invention in the display unit is the uni shown in FIG. 98. Not limited to being applicable only to the side walls of the Tubas 9801, but with different shapes By squeezing it, it can be applied to any place such as a part of the mirror surface or integrated with the bathtub itself. It is possible.

0864Further, FIG. 99 shows an example in which a television device having a large display unit is provided in the building. .. FIG. 99 shows the housing 9910, the display unit 9911, the remote control device 9912 which is the operation unit, and the speed. -Includes car section 9913, etc. The display panel having the pixel configuration of the display device of the present invention in the display unit , Applicable to the fabrication of display unit 9911. The television device shown in Fig. 99 is built as a wall-mounted type. It is integrated with an object and can be installed without requiring a large space for installation.

0865In the present embodiment, as a building, a utility pole, a unit bath, or the like as a columnar body is taken as an example. However, the present embodiment is not limited to this, and is a building that can be provided with a display panel. Can be applied if. By applying the pixel configuration of the display device of the present invention, the display device A mobile body equipped with a display medium that achieves miniaturization, low power consumption, and good operation. Can be provided.

0866The configuration of the display panel shown in this embodiment is shown in other embodiments in the present specification. It can be implemented in any combination with the configuration of the display device.

0867101 transistor 102 transistor 103 transistor 104 transistor 111 Wiring 112 Wiring 113 Wiring 114 Wiring 115 Wiring 116 Wiring 121 nodes 131 Insulation film 213 signal 214 signal 215 signal 216 signal 221 potential 272 wiring 276 Wiring 401 Capacitive element 402 Capacitive element 601 flip flop 602 flip flop 611 Wiring 612 wiring 613 Wiring 614 Wiring 615 Wiring 616 wiring 621 Wiring 622 wiring 716 signal 722 signal 801 buffer 81a Evaporation source 901 Signal line drive circuit 902 Scanning line drive circuit 903 pixel part 904 pixels 1101 scan line drive circuit 1102 scan line drive circuit 1201 scan line drive circuit 1202 Scan line drive circuit 1305 transistor 1317 Wiring 1417 signal 1501 Capacitive element 1701 flip flop 1801 buffer 1906 transistor 1907 transistor 1908 transistor 1909 transistor 1922 node 1923 node 2022 potential 2023 potential 2101 Capacitive element 2310 transistor 2311 transistor 2312 transistor 2324 node 2424 potential 2501 Capacitive element 2701 transistor 2702 transistor 2703 transistor 2704 transistor 2711 Wiring 2712 Wiring 2713 Wiring 2714 Wiring 2715 Wiring 2716 Wiring 2721 node 2813 signal 2814 signal 2815 signal 2816 signal 2821 potential 3001 Capacitive element 3205 Transistor 3207 Wiring 3208 transistor 3217 Wiring 3317 signal 3401 Capacitive element 3606 transistor 3607 transistor 3608 transistor 3609 transistor 3622 node 3623 node 3722 electric potential 3723 Potential 3801 Capacitive element 4010 transistor 4011 transistor 4012 transistor 4024 node 4124 Potential 4201 Capacitive element 4402 Scan line drive circuit 4403 Scan line drive circuit 4501 transistor 4502 Capacitive element 4511 Wiring 4512 Wiring 4513 Wiring 4521 Display element 4522 Opposite electrode 4523 Pixel electrode 4531 Liquid crystal element 4701 coding circuit 4702 frame memory 4703 Correction circuit 4704 DA conversion circuit 4712 frame memory 4713 Correction circuit 4801 transistor 4802 Auxiliary capacity 4803 Display element 4804 Video signal line 4805 scan line 4806 common line 4811 transistor 4812 Auxiliary capacity 4813 Display element 4814 Video signal line 4815 scan line 4816 common line 4817 common line 4901 Diffusion plate 4902 Cold cathode tube 4903 Pixel part 4911 diffuser 4912 Light source 4931 Signal control circuit 5101 board 5102 Insulating film 5103 Conductive layer 5104 Insulating film 5105 Semiconductor layer 5106 Semiconductor layer 5107 Conductive layer 5108 Insulating film 5109 Conductive layer 5110 Alignment film 5112 Alignment film 5113 Conductive layer 5114 Light-shielding film 5115 color filter 5116 board 5117 spacer 5118 Liquid crystal molecules 5121 scan line 5122 Video signal line 5123 Capacity line 5124 TFT 5125 pixel electrode 5126 Pixel capacity 5201 board 5202 Insulation film 5203 Conductive layer 5204 Insulating film 5205 Semiconductor layer 5206 Semiconductor layer 5207 Conductive layer 5208 Insulation film 5209 Conductive layer 5210 Alignment film 5212 Alignment film 5213 Conductive layer 5214 Light-shielding film 5215 color filter 5216 board 5217 spacer 5218 Liquid crystal molecules 5219 Orientation control protrusion 5221 scan line 5222 video signal line 5223 Capacity line 5224 TFT 5225 pixel electrode 5226 pixel capacity 5301 board 5302 Insulation film 5303 Conductive layer 5304 Insulating film 5305 Semiconductor layer 5306 Semiconductor layer 5307 Conductive layer 5308 Insulation film 5309 Conductive layer 5310 Alignment film 5312 Alignment film 5313 Conductive layer 5314 Light-shielding film 5315 color filter 5316 board 5317 Spacer 5318 Liquid crystal molecules 5319 copies 5321 scan line 5322 Video signal line 5323 capacity line 5324 TFT 5325 pixel electrode 5326 pixel capacity 5401 board 5402 insulating film 5403 Conductive layer 5404 Insulation film 5405 Semiconductor layer 5406 Semiconductor layer 5407 Conductive layer 5408 Insulation film 5409 Conductive layer 5410 Alignment film 5412 Alignment film 5414 Light-shielding film 5415 color filter 5416 board 5417 spacer 5418 Liquid crystal molecules 5421 scan line 5422 Video signal line 5423 Common electrode 5424 TFT 5425 pixel electrode 5501 board 5502 Insulating film 5503 Conductive layer 5504 Insulation film 5505 Semiconductor layer 5506 Semiconductor layer 5507 Conductive layer 5508 Insulating film 5509 Conductive layer 5510 Alignment film 5512 Alignment film 5513 Conductive layer 5514 Light-shielding film 5515 color filter 5516 board 5517 spacer 5518 Liquid crystal molecule 5519 Insulating film 5521 scan line 5522 Video signal line 5523 Common electrode 5524 TFT 5525 pixel electrode 5601 Driver IC 5602 Switch group 5611 Wiring 5612 Wiring 5613 Wiring 5621 Wiring 5721 signal 5821 signal 5903a transistor 5903b transistor 5903c transistor 5911 wiring 5912 Wiring 5913 Wiring 6001 transistor 6002 transistor 6003 transistor 6004 transistor 6005 transistor 6006 transistor 6011 Wiring 6012 Wiring 6013 Wiring 6014 wiring 6015 Wiring 6016 Wiring 6022 Switch group 6101 transistor 6102 transistor 6111 Wiring 6112 Wiring 6201 transistor 6211 Wiring 6401 transistor 6402 transistor 6411 Wiring 6412 Wiring 6500 Capacitive element 6501 transistor 6502 transistor 6503 transistor 6511 Wiring 6512 Wiring 6513 Wiring 6514 Wiring 6521 Display element 6522 Counter electrode 6523 Pixel electrode 6600 Capacitive element 6601 transistor 6602 transistor 6603 transistor 6611 Wiring 6612 Wiring 6613 Wiring 6614 Wiring 6621 Display element 6622 Counter electrode 6623 pixel electrode 6700 Capacitive element 6701 transistor 6702 transistor 6703 Transistor 6704 transistor 6711 Wiring 6712 Wiring 6713 Wiring 6714 Wiring 6715 Wiring 6721 Display element 6722 Counter electrode 6723 pixel electrode 6905 TFT 6906 Wiring 6907 Wiring 6908 TFT 6911 Wiring 6912 Counter electrode 6913 Capacitor 6915 pixel electrode 6916 bulkhead 6917 Organic conductor membrane 6918 Organic thin film 6919 board 7000 board 7001 wiring 7002 wiring 7003 wiring 7004 wiring 7005 TFT 7006 TFT 7007 TFT 7008 pixel electrode 7011 bulkhead 7012 Organic conductor membrane 7013 Organic thin film 7014 Opposite electrode 7100 board 7101 Wiring 7102 Wiring 7103 Wiring 7104 Wiring 7105 TFT 7106 TFT 7107 TFT 7108 TFT 7109 pixel electrode 7111 Wiring 7112 Wiring 7121 bulkhead 7122 Organic conductor membrane 7123 Organic thin film 7124 Counter electrode 7201 anode 7202 Cathode 7203 Hole transport area 7204 Electron transport area 7205 mixed area 7206 area 7207 area 7208 area 7209 area 7360 Transport room 7361 Transport room 7362 Road room 7363 Unload room 7364 Intermediate processing room 7365 Sealing processing room 7366 Transport means 7367 Transport means 7368 Heat treatment room 7369 Film formation processing room 7370 Film formation processing room 7371 Deposition processing room 7372 Plasma processing room 7373 Film formation processing room 7374 Film formation processing room 7376 Film formation processing room 7480 Evaporation source holder 7481 Evaporation source 7482 Distance sensor 7483 Articulated arm 7484 Material supply pipe 7486 board stage 7487 Board chuck 7488 Mask chuck 7489 board 7490 shadow mask 7491 Top plate 7492 Bottom plate 7500 board 7501 Peripheral drive circuit 7502 Pixel part 7504 FPC 7505 IC chip 7506 IC chip 7507 Encapsulated substrate 7508 Sealing material 7510 board 7511 Peripheral drive circuit 7512 Pixel part 7513 FPC 7514 FPC 7601 board 7602 Anode 7603 Hole injection layer 7604 Hole transport layer 7605 Luminescent layer 7606 Electron transport layer 7607 Electron injection layer 7608 Cathode 7611 board 7612 Anode 7613 Hole injection layer 7614 Hole transport layer 7615 Light emitting layer 7616 Electron transport layer 7617 Electron injection layer 7618 Cathode 7700 board 7701 Drive transistor 7702 electrode 7703 layers 7704 Electrode 7800 board 7801 Drive transistor 7802 Undercoat 7803 electrode 7804 layers 7805 electrode 7807 Black Matrix 7901 board 7902 Base film 7903 Channel formation region 7905 Impurity region 7906 Channel formation region 7907 LDD area 7908 Impurity region 7909 Gate insulating film 7910 Gate electrode 7911 Top electrode 7912 interlayer insulation 7913 Wiring 7914 pixel electrode 7915 Interlayer insulation 7916 layers 7917 Counter electrode 7918 Drive transistor 7919 Capacitive element 7920 Luminescent element 7921 area 8001 board 8002 Undercoat 8003 channel formation region 8005 Impurity region 8006 Gate insulating film 8007 Gate electrode 8008 electrode 8009 Interlayer insulation 8010 wiring 8011 electrode 8012 interlayer insulation 8013 pixel electrode 8014 electrode 8015 insulation 8015 interlayer insulation 8016 layers 8017 Counter electrode 8018 drive transistor 8019 Capacitive element 8020 Luminescent element 8091 Top electrode 8092 Capacitive element 8101 board 8102 Base film 8103 Gate electrode 8104 Electrode 8105 Gate insulating film 8106 Channel formation region 8107 LDD area 8108 Impurity region 8109 Channel formation region 8110 LDD area 8111 Impurity region 8112 interlayer insulation 8113 Wiring 8114 electrode 8115 opening 8116 interlayer insulation 8117 pixel electrode 8118 insulation 8119 layers 8120 Opposite electrode 8121 Light emitting element 8122 drive transistor 8123 Capacitive element 8124 Electrode 8125 Capacitive element 8201 board 8202 Undercoat 8203 pixel electrode 8204 Electrode 8205 Wiring 8206 Wiring 8207 N-type semiconductor layer 8208 N-type semiconductor layer 8209 Semiconductor layer 8210 Gate insulating film 8211 Insulating film 8212 Gate electrode 8213 Electrode 8214 interlayer insulating film 8215 layers 8216 Counter electrode 8217 Light emitting element 8218 Drive transistor 8219 Capacitive element 8220 electrode 8301 board 8302 Base film 8303 Gate electrode 8304 electrode 8305 Gate insulating film 8306 Semiconductor layer 8307 Semiconductor layer 8308 N-type semiconductor layer 8310 N-type semiconductor layer 8311 Wiring 8313 Conductive layer 8314 pixel electrode 8315 insulation 8316 layers 8317 Opposite electrode 8318 Luminescent element 8319 Drive transistor 8320 Capacitive element 8321 electrode 8322 Capacitive element 8401 insulation 8511 board 8512 Insulation film 8513 Semiconductor film 8514 Semiconductor film 8515 Semiconductor film 8516 Insulation film 8517 Gate electrode 8518 Insulation film 8519 Insulation film 8521 sidewall 8522 mask 8523 Conductive 8600 electrode layer 8601 Electroluminescent layer 8602 Electroluminescent layer 8603 Electrode layer 8604 Insulation layer 8701 Display panel 8702 circuit board 8703 control circuit 8704 Signal split circuit 8705 Pixel part 8706 Scanning line drive circuit 8707 Signal line drive circuit 8708 Connection wiring 8801 Tuner 8802 Video signal amplifier circuit 8803 Video signal processing circuit 8804 Control circuit 8805 Signal split circuit 8806 Audio signal amplifier circuit 8807 Audio signal processing circuit 8808 speaker 8809 Control circuit 8810 Input section 8901 housing 8902 Display panel 8903 speaker 8904 Operation switch 9001 display panel 9002 printed circuit board 9003 pixel part 9004 Scan line drive circuit 9005 Scan line drive circuit 9006 Signal line drive circuit 9007 controller 9008 CPU 9009 memory 9100 Display element 9101 Display panel 9201 Conductive 9202 Semiconductor layer 9203 contacts 9204 Conductive 9401 Train car body 9402 Display panel 9403 Display panel 9404 Display panel 9501 Body 9502 display panel 9601 Airplane body 9602 Display panel 9603 Hinge 9701 Utility pole 9702 display panel 9703 Mobile 9801 Unit bath 9802 display panel 9910 Housing 9911 Display 9912 remote control device 9913 Speaker section 10001 Signal control circuit 10002 pixel part 10003 gate driver 10004 Encapsulation board 10005 Sealing material 10006 Gate driver 10007 Space 10008 Wiring 10009 FPC 10010 board 10011 transistor 10012 transistor 10013 Electrode 10014 insulation 10016 layers 10017 electrode 10018 Light emitting element 10019 IC chip 10020 transistor 10021 transistor 10022 IC chip 10040 board 10100 board 10101 Signal control circuit 10102 Pixel part 10103 Gate driver 10104 Gate driver 10105 FPC 10106 IC chip 10107 IC chip 10108 Encapsulated substrate 10109 Sealing material 10110 board 10111 Signal control circuit 10112 Pixel part 10113 Gate driver 10114 Gate driver 10115 FPC 10116 IC chip 10117 IC chip 10118 Encapsulated substrate 10119 Sealing material 10200 Electrode layer 10201 Luminescent material 10202 electroluminescent layer 10203 Electrode layer 10204 Insulation layer 10300 mobile phone 10301 main body (A) 10302 main body (B) 10303 chassis 10304 Operation switches 10305 microphone 10306 speaker 10307 Circuit board 10308 Display panel (A) 10309 Display panel (B) 10310 hinge 10401 N-channel transistor 10402 N-channel transistor 10403 P-channel transistor 10404 Capacitive element 10405 Resistor 10502 Conductive layer 10503 Conductive layer 10504 Wiring 10505 Semiconductor layer 10506 Impurity region 10507 Impurity region 10508 Insulation layer 10509 Gate electrode 10510 Impurity region 10511 Impurity region 10512 Impurity region 4902A Gate driver 4902B Gate driver 5603a switch 5603b switch 5603c switch 5703a Timing 5703b Timing 5703c Timing 5803a Timing 5803b Timing 5803c Timing 5903a transistor 5903b transistor 5903c transistor 6301a transistor 6301b transistor 6302a transistor 6302b transistor 7377a Gate valve 7481a Evaporation source 7481b Evaporation source 7481c Evaporation source 7485a Material source 7485b Material source 7485c Material source 7806B color filter 7806G color filter 7806R color filter 8604a Insulation layer 8604b Insulation layer 90010 power circuit 90011 Speech processing circuit 90012 Transmission / reception circuit 90013 FPC 90014 Interface section 90015 Antenna port 90016 VRAM 90017 DRAM 90018 Flash memory 90019 interface 90020 Control signal generation circuit 90021 Decoder 90022 register 90023 Arithmetic circuit 90024 RAM 90025 Input means 90026 Mike 90027 speaker 90028 antenna 91013 FPC 91030 Housing 91031 printed circuit board 91032 speaker 91033 microphone 91034 Transmission / reception circuit 91035 Signal processing circuit 91036 Input means 91037 battery 91039 chassis 93001 housing 93002 Support stand 93003 Display 93004 Speaker section 93005 Video input terminal 93101 body 93102 Display 93103 Image receiver 93104 Operation keys 93105 External connection port 93106 Shutter button 93201 body 93202 chassis 93203 Display 93204 keyboard 93205 External connection port 93206 Pointing device 93301 body 93302 Display 93303 switch 93304 Operation key 93305 infrared port 93401 main body 93402 chassis 93403 Display A 93404 Display B 93405 copies 93406 Operation keys 93407 Speaker section 93501 body 93502 Display 93503 Arm part 93601 Body 93602 Display 93603 housing 93604 External connection port 93605 Remote control receiver 93606 Image receiver 93607 battery 93608 Voice input section 93609 Operation keys 93701 body 93702 housing 93703 Display 93704 Voice input section 93705 Audio output section 93706 Operation keys 93707 External connection port 93708 antenna 10204a Insulation layer 10204b Insulation layer