Semiconductor device, and method of manufacturing the same

0001The present invention relates to a product, a method, or a manufacturing method. Alternatively, the present invention relates to a process, machine, manufacture, or composition (composition of matter). Further, one aspect of the present invention relates to a semiconductor device, a display device, a light emitting device, a power storage device, a storage device, a driving method thereof, or a manufacturing method thereof. In particular, one aspect of the present invention relates to a semiconductor device including an oxide semiconductor, a display device, or a light emitting device.

0002In the present specification and the like, the semiconductor device refers to all devices that can function by utilizing the semiconductor characteristics. Display devices, electro-optical devices, semiconductor circuits and electronic devices may include semiconductor devices.

0003In recent years, high integration of semiconductor devices has been achieved by miniaturization of transistors. However, in the conventionally used planar transistor type transistor, the short channel effect becomes serious and the limit of miniaturization is approaching. In order to overcome the above-mentioned problems, a vertical transistor has been proposed in which a semiconductor substrate is three-dimensionally processed to form a source region, a drain region, and a gate electrode so that a current flows vertically with respect to the substrate. (Non-Patent Document 2). In particular, a vertical transistor having a structure in which a gate electrode surrounds a semiconductor is called an SGT (Surrounding Gate Transistor), and is attracting attention because it can reduce the occupied area of the transistor and can realize a high on-current (non-). Patent Document 1, Non-Patent Document 3).

0004By the way, oxide semiconductors are attracting attention as semiconductors applicable to transistors other than silicon. Transistors using oxide semiconductors are easy to manufacture, operate faster than transistors using amorphous silicon, and have extremely low leakage current in the off state. Therefore, they are also referred to as integrated circuits and image display devices (also referred to simply as display devices). It is expected to be applied to.

0005Oxygen deficiency existing in the film and the interface of the oxide semiconductor is known to fluctuate the electrical characteristics of the transistor, but by effectively supplying oxygen to the interface and the film of the oxide semiconductor, oxygen is effectively supplied. It is known that the above problems can be overcome. As a method of supplying oxygen to an oxide semiconductor, a method of supplying oxygen from an insulator in contact with the oxide semiconductor (Patent Document 1) and a method of supplying oxygen from an electrode (Patent Document 2 and Patent Document 3) are disclosed. ing.

<p num="0006"><patcit num="1"><text>Japanese Unexamined Patent Publication No. 2012-009836</text></patcit><patcit num="2"><text>Japanese Unexamined Patent Publication No. 2013-131740</text></patcit><patcit num="3"><text>Japanese Unexamined Patent Publication No. 2013-138195</text></patcit></p>

<p num="0007"><nplcit num="1"><text>IEEE International Electron Devices Meeting (IEDM) Technical Digest pp.23-26, 1989</text></nplcit><nplcit num="2"><text>IEEE International Electron Devices Meeting (IEDM) Technical Digest pp.949-951, 2002</text></nplcit><nplcit num="3"><text>IEEE Symposium VLSI Technology Technical Digest pp.21-22, 1993</text></nplcit></p>

<p num="0008">One aspect of the present invention is to provide a novel semiconductor device or the like, to provide a semiconductor device having a high on-current, to provide a semiconductor device having a low off-current, or to exhibit a short channel effect. One of the problems is to provide a semiconductor device that is difficult to handle, to provide a semiconductor device having a small occupied area, or to provide a semiconductor device having stable electrical characteristics.</p><p num="0009">The description of a plurality of issues does not prevent the existence of each other's issues. It should be noted that one aspect of the present invention does not need to solve all of these problems. In addition, problems other than those listed are naturally clarified from the description of the description, drawings, claims, etc., and these problems can also be problems of one form of the present invention.</p>

<p num="0010">One aspect of the present invention includes an oxide semiconductor, a first electrode in contact with the lower surface of the oxide semiconductor, a second electrode in contact with the upper surface of the oxide semiconductor, and a gate electrode facing the side surface of the oxide semiconductor. It is a semiconductor device having a gate insulating film provided between an oxide semiconductor and a gate electrode. The first electrode has a region that overlaps with the second electrode. One or both of the first electrode and the second electrode includes at least a first layer and a second layer. It is preferable that the first layer is in contact with the oxide semiconductor and has a lower oxygen concentration than the second layer.</p><p num="0011">In the above embodiment, the first layer preferably contains a substance having a higher Gibbs free energy of the oxidation reaction than the oxide semiconductor.</p><p num="0012">In the above embodiment, it is preferable that the first layer and the second layer contain one or more selected from silver, copper, ruthenium, iridium, platinum and gold.</p><p num="0013">The semiconductor device according to the above aspect has a conductive film having a lower oxygen permeability than the first layer and the second layer. The first layer and the second layer are preferably provided between the oxide semiconductor and the conductive film.</p><p num="0014">One aspect of the present invention includes an oxide semiconductor, a first electrode in contact with the lower surface of the oxide semiconductor, a second electrode in contact with the upper surface of the oxide semiconductor, and a gate electrode facing the side surface of the oxide semiconductor. It has a gate insulating film provided between the oxide semiconductor and the gate electrode, and the first electrode has a region overlapping with the second electrode, and one of the first electrode and the second electrode or Both are methods for manufacturing semiconductor devices, comprising at least a first layer and a second layer, the first layer being in contact with an oxide semiconductor and having a lower oxygen concentration than the second layer. .. By performing the heat treatment, oxygen can be supplied to the oxide semiconductor from the first electrode or the second electrode.</p><p num="0015">Although a configuration example of a transistor using an oxide semiconductor as a channel is shown in the present specification, one aspect of the present invention is not limited to this. For example, in the channel and its vicinity, source region, drain region, etc., or depending on the situation, Si (silicon), Ge (germanium), SiGe (silicon germanium), GaAs (gallium arsenide), etc. It may be formed of a material having.</p>

<p num="0016">According to one aspect of the present invention, it is difficult to provide a new semiconductor device or the like, to provide a semiconductor device having a high on-current, to provide a semiconductor device having a low off-current, or to exhibit a short channel effect. It becomes possible to provide a semiconductor device, to provide a semiconductor device having a small occupied area, or to provide a semiconductor device having stable electrical characteristics.</p><p num="0017">The description of these effects does not preclude the existence of other effects. It should be noted that one aspect of the present invention does not have to have all of these effects. It should be noted that the effects other than these are naturally clarified from the description of the description, drawings, claims, etc., and it is possible to extract the effects other than these from the description of the description, drawings, claims, etc. Is.</p>

0018<figref num="1">The perspective view which shows the structural example of a transistor.</figref><figref num="2">A perspective view and a cross-sectional view showing a configuration example of a transistor.</figref><figref num="3">The cross-sectional view which shows an example of the manufacturing method of a transistor.</figref><figref num="4">The cross-sectional view which shows an example of the manufacturing method of a transistor.</figref><figref num="5">The cross-sectional view which shows an example of the manufacturing method of a transistor.</figref><figref num="6">The figure which shows the shape example of the semiconductor region.</figref><figref num="7">The cross-sectional view which shows the structural example of a transistor.</figref><figref num="8">The cross-sectional view which shows the structural example of a transistor.</figref><figref num="9">Top view showing a configuration example of a storage device.</figref><figref num="10">FIG. 5 is a cross-sectional view showing a configuration example of a storage device.</figref><figref num="11">FIG. 5 is a cross-sectional view showing a configuration example of a storage device.</figref><figref num="12">FIG. 5 is a cross-sectional view showing a configuration example of a storage device.</figref><figref num="13">FIG. 5 is a cross-sectional view showing a configuration example of a storage device.</figref><figref num="14">A circuit diagram showing an example of a storage device.</figref><figref num="15">Top view and circuit diagram showing an example of a display device.</figref><figref num="16">The external view which shows an example of an electronic device.</figref><figref num="17">The figure explaining the use example of the RF tag.</figref><figref num="18">The figure which shows the result of TDS analysis.</figref><figref num="19">The figure which shows the Gibbs free energy of an oxidation reaction.</figref>

0019Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and those skilled in the art can easily understand that the form and details thereof can be variously changed without departing from the spirit and scope of the present invention. Therefore, the present invention is not construed as being limited to the description of the embodiments and examples shown below. Further, in the embodiments and examples described below, the same reference numerals are commonly used between different drawings for the same parts or parts having the same functions, and the repeated description thereof will be omitted. Also, in each of the figures described herein, the size, film thickness, or region of each configuration may be exaggerated for clarity. Therefore, it is not necessarily limited to that scale.

0020The first and second ordinal numbers used in the present specification are added to avoid confusion of the components, and are not limited numerically. Therefore, for example, "first" can be replaced with "second" or "third" as appropriate for explanation. Further, the "source" and "drain" functions of the transistors may be interchanged when transistors having different polarities are adopted or when the direction of the current changes in the circuit operation. Therefore, in the present specification, the terms "source" and "drain" can be used interchangeably.

0021(Embodiment 1) In the present embodiment, the transistor according to one aspect of the present invention will be described with reference to the drawings.

0022FIG. 1 is a perspective view of a transistor according to an aspect of the present invention. Note that FIG. 1 is shown with some elements omitted for the sake of clarity. The transistor 100 (or 110) shown in FIG. 1 has a substrate 109, a wiring 101, a conductive film 111, a gate electrode 102, and a drain electrode 105 (or 115).

0023FIG. 2 (B) shows a cross-sectional view of the transistor shown in FIG. 1 in a plane X (see FIG. 2 (A)). The transistor 100 shown in FIG. 2B includes a substrate 109, a wiring 101 formed on the substrate 109, a conductive film 111 formed on the wiring 101, and a source electrode 103 formed on the conductive film 111. , The oxide semiconductor 104 formed on the source electrode 103, the drain electrode 105 formed on the oxide semiconductor 104 so as to overlap the source electrode 103, and the side surfaces of the source electrode 103, the oxide semiconductor 104, and the drain electrode 105. A gate insulating film 106 provided so as to be in contact with the source electrode 103, a gate electrode 102 provided so as to face the side surfaces of the source electrode 103, the oxide semiconductor 104, and the drain electrode 105 via the gate insulating film 106, and a drain electrode. It has a protective insulating film 107 in contact with 105, a gate electrode 102, a gate insulating film 106 and a conductive film 111, and an interlayer insulating film 108 provided on the protective insulating film 107.

0024The substrate 109 is not limited to a simple support, and may be a substrate on which elements such as other transistors and capacitors are formed. In this case, at least one of the gate electrode 102 and the wiring 101 of the transistor may be electrically connected to the other elements described above. Further, an insulating film may be provided between the substrate 109 and the wiring 101 in order to prevent the diffusion of impurities from the substrate 109.

0025In addition, for example, in this specification and the like, a transistor can be formed by using various substrates 109. The type of the substrate 109 is not limited to a specific one. Examples of the substrate include a semiconductor substrate (for example, a single crystal substrate or a silicon substrate), an SOI substrate, a glass substrate, a quartz substrate, a plastic substrate, a metal substrate, a stainless steel substrate, a substrate having a stainless steel still foil, and a tungsten substrate. , Substrates with tungsten foil, flexible substrates, bonded films, papers containing fibrous materials, or substrate films. Examples of glass substrates include barium borosilicate glass, aluminoborosilicate glass, and soda lime glass. Examples of the flexible substrate include plastics typified by polyethylene terephthalate (PET), polyethylene naphthalate (PEN), and polyether sulfone (PES), and synthetic resins having flexibility such as acrylic. Examples of the laminated film include polypropylene, polyester, polyvinyl fluoride, polyvinyl chloride and the like. Examples of the base film include polyester, polyamide, polyimide, inorganic vapor-deposited film, and papers. In particular, by manufacturing a transistor using a semiconductor substrate, a single crystal substrate, an SOI substrate, or the like, it is possible to manufacture a transistor having a high current capacity and a small size with little variation in characteristics, size, or shape. .. When the circuit is composed of such transistors, the power consumption of the circuit can be reduced or the circuit can be highly integrated.

0026A transistor may be formed using a certain substrate, then the transistor may be transposed to another substrate, and the transistor may be arranged on another substrate. As an example of the substrate on which the transistor is translocated, in addition to the substrate capable of forming the above-mentioned transistor, a paper substrate, a cellophane substrate, a stone substrate, a wood substrate, a cloth substrate (natural fiber (silk, cotton, linen), etc. There are synthetic fibers (including nylon, polyurethane, polyester) or recycled fibers (including acetate, cupra, rayon, recycled polyester), leather substrates, rubber substrates, and the like. By using these substrates, it is possible to form a transistor having good characteristics, to form a transistor having low power consumption, to manufacture a device that is hard to break, to impart heat resistance, to reduce the weight, or to reduce the thickness.

0027It is possible to form all of the circuits necessary for realizing a predetermined function on the same substrate (for example, a glass substrate, a plastic substrate, a single crystal substrate, an SOI substrate, etc.). In this way, it is possible to reduce the cost by reducing the number of parts or improve the reliability by reducing the number of connection points with the circuit parts.

0028The transistor 100 is an SGT (Surrounding Gate Transistor), and the distance between the source electrode 103 and the drain electrode 105, that is, the height of the oxide semiconductor 104 corresponds to the channel length of the transistor 100. Since the entire side surface of the oxide semiconductor 104 is surrounded by the gate electrode 102, the transistor 100 operates in complete depletion, has a high on-current, and prevents an increase in leakage current (off-current) due to DIBL (Drain Induced Barrier Lowering). be able to. The channel length of the transistor 100 can be, for example, 30 nm or more and 500 nm or less, preferably 50 nm or more and 300 nm or less, and more preferably 100 nm or more and 200 nm or less.

0029In SGT made of single crystal silicon, channels are formed on a three-dimensionally processed single crystal silicon substrate, so that channels are also formed in a plane orientation having a high interface state density. Therefore, the electrical characteristics may be easily deteriorated as compared with the planar type transistor. On the other hand, the SGT made of an oxide semiconductor has very little dependence of the interface state on the plane orientation, and the above-mentioned problem does not occur. Therefore, it is preferable to fabricate the SGT with an oxide semiconductor.

0030Further, when SGT is manufactured from single crystal silicon, advanced impurity injection technology is required to form a source region and a drain region, but when SGT is manufactured from an oxide semiconductor, a transistor is required without impurity injection. Is possible, so that the manufacturing process is easier than that of single crystal silicon.

0031In general, it is known that a transistor using an oxide semiconductor fluctuates in electrical characteristics due to oxygen deficiency. Therefore, it is preferable that the transistor 100 also supplies oxygen to the oxide semiconductor 104. When the protective insulating film 107 and the interlayer insulating film 108 are impregnated with oxygen to supply oxygen, the oxide semiconductor 104 is surrounded by electrodes on the upper and lower sides and side surfaces, so that the oxygen supplied from the insulating film presses the electrodes. It cannot penetrate and does not reach the oxide semiconductor 104. There is also a method of supplying oxygen from the gate insulating film 106, but in a miniaturized transistor, the gate insulating film 106 is generally formed thinly in order to secure the gate capacitance. Therefore, the gate insulating film 106 cannot contain a sufficient amount of oxygen, and there is a possibility that the oxygen deficiency of the oxide semiconductor 104 cannot be sufficiently repaired. For the above reasons, it is difficult to supply oxygen to the oxide semiconductor 104 from the surrounding insulating film in the transistor 100.

0032In the present embodiment, a method of solving the above-mentioned problem is shown by giving oxygen supply capacity to the source electrode and the drain electrode. Since the source electrode and the drain electrode have an oxygen supply capacity, the operation can be stabilized even in a vertical transistor. The details will be described below.

0033The source electrode 103 and the drain electrode 105 are conductive films containing oxygen, and have a substance having a higher Gibbs free energy of the oxidation reaction than the oxide semiconductor 104. That is, the source electrode 103 and the drain electrode 105 have a property of being more easily reduced than the oxide semiconductor 104. In other words, the source electrode 103 and the drain electrode 105 have a property of being less likely to be oxidized than the oxide semiconductor 104.

0034The thickness of the source electrode 103 and the drain electrode 105 is, for example, 3 nm or more and 300 nm or less, preferably 5 nm or more and 100 nm or less, and more preferably 10 nm or more and 50 nm or less.

0035Since the source electrode 103 and the drain electrode 105 containing oxygen are composed of a substance that is more easily reduced than the oxide semiconductor 104, the source electrode 103 and the drain electrode 105 are reduced and release oxygen when heat treatment is performed. The oxygen released from the source electrode 103 and the drain electrode 105 is supplied to the oxide semiconductor 104, and the oxygen deficiency of the oxide semiconductor 104 can be reduced.

0036The heat treatment may be carried out at a temperature of 250 ° C or higher and 650 ° C or lower, preferably 300 ° C or higher and 500 ° C or lower, in an atmosphere of an inert gas, an atmosphere containing 10 ppm or more of an oxidizing gas, or a reduced pressure state. ..

0037For reference, Fig. 19 shows the Gibbs free energy of the oxidation reaction of each element. The horizontal axis of FIG. 19 is the temperature [° C], and the vertical axis is the Gibbs free energy (ΔG [kJ / mol]). The Gibbs free energy of the oxidation reaction shown in FIG. 19 was obtained by the following calculation. First, by substituting the values of the standard enthalpy of formation ΔH and the standard entropy S of each substance shown in Table 1 into the formulas of each oxidation reaction shown in Table 2, the standard enthalpy of formation ΔH and the standard entropy of each oxidation reaction are substituted. Calculate the value of ΔS. Table 2 shows the values of the standard enthalpy of formation ΔH and the standard enthalpy of formation ΔS in each of the calculated oxidation reactions. The values of standard enthalpy of formation ΔH and standard entropy S for each substance shown in Table 1 are mainly quoted from "Chemical Handbook Basics II Revised 4th Edition, p. 285, Maruzen Co., Ltd." edited by The Chemical Society of Japan.

0038<tables num="1"><img id="000003" he="172" wi="94" file="JP2015111663A_D0001.tif" img-format="tif" img-content="drawing" /></tables>

0039<tables num="2"><img id="000004" he="126" wi="165" file="JP2015111663A_D0001.tif" img-format="tif" img-content="drawing" /></tables>

0040Next, by substituting the values of the standard enthalpy of formation ΔH and the standard enthalpy of formation ΔS shown in Table 2 into the following formula (1), the Gibbs free energy of each oxidation reaction in the temperature range of 0 ° C to 900 ° C The value of was calculated. Note that T in the mathematical formula (1) is the temperature [K].

0041ΔG = ΔH-TΔS × 10^-3 (1)

0042From FIG. 19, for example, the source electrode 103 and the drain electrode 105 may use a layer made of an oxide containing one or more elements selected from silver, copper, ruthenium, iridium, platinum and gold. Platinum and gold are not shown in FIG. 19, but are known as hard-to-oxidize metals. Since the oxide containing the element has a high Gibbs free energy of the oxidation reaction, it is easy to reduce itself and easily oxidize the film in contact with the oxide. Since the conductivity is high, it is preferable to use an oxide containing ruthenium or iridium. As an example of oxides containing ruthenium or iridium, RuO_X(X is 0.5 or more and 4 or less), IrO_X(X is 0.5 or more and 4 or less), SrRuO_X(X is 1 or more and 5 or less) and so on.

0043The protective insulating film 107 has a function of blocking oxygen. When the protective insulating film 107 that blocks oxygen comes into contact with the drain electrode 105, it is possible to prevent oxygen from leaking from the upper surface and side surfaces of the drain electrode 105 when the drain electrode 105 is reduced, which is effective for the oxide semiconductor 104. Oxygen can be supplied.

0044The protective insulating film 107 includes aluminum oxide, magnesium oxide, silicon oxide, silicon oxide nitride, silicon nitride oxide, silicon nitride, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, and tantalum oxide. An insulator containing at least one selected from the above can be used. In particular, the aluminum oxide film has a high blocking effect that does not allow the film to permeate both impurities such as hydrogen and water and oxygen, and is preferable for application to the protective insulating film 107.

0045The conductive film 111 is a conductive film having a function of blocking oxygen. The conductive film 111 preferably has lower oxygen permeability than the source electrode 103. By contacting the conductive film 111 with the lower surface of the source electrode 103, it is possible to prevent oxygen from leaking from the lower surface of the source electrode 103 when the source electrode 103 is reduced, effectively supplying oxygen to the oxide semiconductor 104. can do. Further, the conductive film 111 prevents oxygen released from the source electrode 103 from oxidizing the wiring 101 and forming a highly resistant oxide layer between the source electrode 103 and the wiring 101.

0046The conductive film 111 is a layer containing one or more elements selected from silver, copper, ruthenium, iridium, molybdenum, tungsten, platinum and gold, or metal nitride. In particular, tantalum nitride has a high blocking effect on oxygen and is preferable for the conductive film 111.

0047The transistor 110 shown in FIG. 2C shows a state after the transistor 100 is heat-treated to reduce the source electrode 103 and the drain electrode 105.

0048The transistor 110 includes a source electrode 113 including the conductive film 113a and the conductive film 113b, and a drain electrode 115 including the conductive film 115a and the conductive film 115b, and the conductive film 113a and the conductive film 115a are the oxide semiconductor 104. I'm in contact. The conductive film 113a is a film having a lower oxygen concentration than the conductive film 113b. Further, the conductive film 115a is a film having a lower oxygen concentration than the conductive film 115b. The configuration of the transistor 110 other than the source electrode 113 and the drain electrode 115 is the same as that of the transistor 100 of FIG. 2 (B).

0049The source electrode 103 of FIG. 2 (B) is the same as the source electrode 103 and the conductive film 113a in which the region near the oxide semiconductor 104 is reduced by heat treatment and the oxygen concentration is reduced as compared with the source electrode 103. It changes to a conductive film 113b having a degree of oxygen concentration. Similarly, the drain electrode 105 of FIG. 2B has a conductive film 115a in which the region near the oxide semiconductor 104 is reduced by heat treatment and the oxygen concentration is lower than that of the drain electrode 105, and the drain electrode. It changes to a conductive film 115b having an oxygen concentration similar to that of 105. At this time, the oxygen released from the source electrode 103 and the drain electrode 105 has a role of reducing the oxygen deficiency of the oxide semiconductor 104.

0050The thickness of the conductive film 113a and the conductive film 115a may be, for example, 1 nm or more and 100 nm or less, preferably 1 nm or more and 50 nm or less, and more preferably 1 nm or more and 10 nm or less.

0051Depending on the conditions of the heat treatment, all the regions of the source electrode 103 may change to the conductive film 113a, and all the regions of the drain electrode 105 may change to the conductive film 115a. That is, the conductive film 113b and the conductive film 115b may not be formed.

0052The conductive film 111 preferably has lower oxygen permeability than the conductive films 113a and 113b. Since the conductive film 111 has a function of blocking oxygen, it prevents oxygen from being absorbed from the oxide semiconductor 104 into the wiring 101. It also prevents the formation of a high resistance oxide layer between the source electrode 103 and the wiring 101.

0053The gate insulating film 106 is used as a single layer or laminated by selecting one or more insulators containing silicon oxide, silicon oxide nitride, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide and tantalum oxide. Just do it.

0054An example of the laminated structure of the gate insulating film 106 will be described. The gate insulating film 106 has, for example, oxygen, nitrogen, silicon, hafnium and the like. Specifically, it is preferable to contain hafnium oxide and silicon oxide or silicon nitride nitride. Hafnium oxide has a higher relative permittivity than silicon oxide and silicon nitride. Therefore, since the physical film thickness can be made larger than the equivalent oxide film thickness, the leakage current due to the tunnel current can be reduced even when the equivalent oxide film thickness is 10 nm or less or 5 nm or less. That is, a transistor having a small off-current can be realized. Further, hafnium oxide having a crystal structure has a higher relative permittivity than hafnium oxide having an amorphous structure. Therefore, it is preferable to use hafnium oxide having a crystal structure in order to obtain a transistor having a small off-current. Examples of the crystal structure include a monoclinic system, a tetragonal system, and a cubic system. However, one aspect of the present invention is not limited to these.

0055By the way, the surface to be formed of hafnium oxide having a crystal structure may have an interface state due to a defect. The interface state may function as a trap center. Therefore, when hafnium oxide is arranged close to the channel region of the transistor, the interface state may deteriorate the electrical characteristics of the transistor. Therefore, in order to reduce the influence of the interface state, it may be preferable to arrange another layer between the channel region of the transistor and hafnium oxide so as to separate them from each other. This layer has a buffering function. As the layer having a buffering function, silicon oxide, silicon oxide nitride, an oxide semiconductor, or the like can be used. For the layer having a buffering function, for example, a semiconductor or an insulator having a larger energy gap than the semiconductor in the channel region is used. Alternatively, for the layer having a buffering function, for example, a semiconductor or an insulator having an electron affinity smaller than that of the semiconductor serving as the channel region is used. Alternatively, for the layer having a buffering function, for example, a semiconductor or an insulator having a larger ionization energy than the semiconductor serving as the channel region is used.

0056As the gate electrode 102, conductors such as Al, Ti, Cr, Co, Ni, Cu, Y, Zr, Mo, Ru, Ag, Ta and W can be used. Further, the gate electrode may be a laminate of the above materials. Further, a conductor containing nitrogen may be used for the gate electrode 102. For example, the gate electrode 102 may use a laminate of tungsten on titanium nitride, a laminate of tungsten on tungsten nitride, a laminate of tungsten on tantalum nitride, or the like.

0057As described above, the configurations and methods shown in the present embodiment can be used in appropriate combination with the configurations and methods shown in other embodiments.

0058(Embodiment 2) In the present embodiment, the oxide semiconductor 104 shown in the first embodiment will be described in detail.

0059The oxide semiconductor 104 is an oxide containing indium. When the oxide contains, for example, indium, the carrier mobility (electron mobility) becomes high. Further, the oxide semiconductor 104 preferably contains the element M. The element M includes, for example, aluminum, gallium, yttrium or tin. The element M is, for example, an element having a high binding energy with oxygen. The element M is, for example, an element having a function of increasing the energy gap of the oxide. Further, the oxide semiconductor 104 preferably contains zinc. When the oxide contains zinc, for example, the oxide is easily crystallized. The energy at the upper end of the valence band of the oxide can be controlled, for example, by the atomic number ratio of zinc.

0060However, the oxide semiconductor 104 is not limited to oxides containing indium. The oxide semiconductor 104 may be, for example, a Zn-Sn oxide or a Ga-Sn oxide.

0061Further, the oxide semiconductor 104 uses an oxide having a large energy gap. The energy gap of the oxide semiconductor 104 is, for example, 2.5 eV or more and 4.2 eV or less, preferably 2.8 eV or more and 3.8 eV or less, and more preferably 3 eV or more and 3.5 eV or less.

0062The oxide semiconductor 104 includes a sputtering method, a CVD (Chemical Vapor Deposition) method (MOCVD (Metal Organic Chemical Vapor Deposition) method, an ALD (Atomic Layer Deposition) method, a thermal CVD method, or a PECVD (Plasma Enhanced Chemical Vapor Deposition) method. However, the film may be deposited using the MBE (Molecular Beam Epitaxy) method or the PLD (Pulsed Laser Deposition) method. In particular, it is preferable to use the MOCVD method, the ALD method, or the thermal CVD method because plasma is not used, so that the oxide semiconductor 104 is less likely to be damaged and the leakage current in the off state of the transistor can be suppressed to a low level.

0063When an In-Ga-Zn-O film is formed by a thermal CVD method such as the MOVCD method or the ALD method, trimethylindium, trimethylgallium, and dimethylzinc are used. The chemical formula of trimethylindium is In (CH).₃)₃Is. The chemical formula of trimethylgallium is Ga (CH).₃)₃Is. The chemical formula of dimethylzinc is Zn (CH).₃)₂Is. Further, the combination is not limited to these, and triethylgallium (chemical formula Ga (C) is used instead of trimethylgallium.₂H₅)₃) Can also be used, and instead of dimethylzinc, diethylzinc (chemical formula Zn (C)) can be used.₂H₅)₂) Can also be used.

0064When the oxide semiconductor 104 is formed by a sputtering method, it is preferable to use a target containing indium in order to reduce the number of particles. Further, when an oxide target having a high atomic number ratio of element M is used, the conductivity of the target may be low. When a target containing indium is used, the conductivity of the target can be increased, and DC discharge and AC discharge become easy, so that it becomes easy to handle a large-area substrate. Therefore, the productivity of the semiconductor device can be increased.

0065When the oxide semiconductor 104 is formed by the sputtering method, the target atomic number ratios are In: M: Zn 3: 1: 1, 3: 1: 2, 3: 1: 4, 1: 1: 0.5, It can be 1: 1: 1, 1: 1: 2, 1: 4: 4, and so on.

0066When the oxide semiconductor 104 is formed by a sputtering method, a film having an atomic number ratio deviating from the target atomic number ratio may be formed. In particular, zinc may have a smaller atomic number ratio in the film than the target atomic number ratio. Specifically, it may be 40 atomic% or more and 90atomic% or less of the atomic number ratio of zinc contained in the target.

0067The effects of impurities in the oxide semiconductor 104 will be described below. In order to stabilize the electrical characteristics of the transistor, it is effective to reduce the impurity concentration in the oxide semiconductor 104 to reduce the carrier density and increase the purity. The carrier density of the oxide semiconductor 104 is 8 × 10.¹¹Pieces / cm³Less than, preferably 1x10¹¹Pieces / cm³Less than, more preferably 1x10¹⁰Pieces / cm³Less than 1x10^-9That is all. In order to reduce the impurity concentration in the oxide semiconductor 104, it is preferable to reduce the impurity concentration in the adjacent film.

0068For example, silicon in the oxide semiconductor 104 may serve as a carrier trap or a carrier generation source. Therefore, the silicon concentration of the oxide semiconductor 104 is determined by 1 × 10 in secondary ion mass spectrometry (SIMS).¹⁹atoms / cm³Less than, preferably 5x10¹⁸atoms / cm³Less than, more preferably 2x10¹⁸atoms / cm³Less than.

0069Further, if hydrogen is contained in the oxide semiconductor 104, the carrier density may be increased. The hydrogen concentration of the oxide semiconductor 104 is 2 × 10 in SIMS.²⁰atoms / cm³Below, preferably 5 × 10¹⁹atoms / cm³Below, more preferably 1 × 10¹⁹atoms / cm³Below, more preferably 5 × 10¹⁸atoms / cm³It is as follows. Further, if nitrogen is contained in the oxide semiconductor 104, the carrier density may be increased. The nitrogen concentration of the oxide semiconductor 104 is 5 × 10 in SIMS.¹⁹atoms / cm³Less than, preferably 5x10¹⁸atoms / cm³Below, more preferably 1 × 10¹⁸atoms / cm³Below, more preferably 5 × 10¹⁷atoms / cm³It is as follows.

0070Further, in order to reduce the hydrogen concentration of the oxide semiconductor 104, it is preferable to reduce the hydrogen concentration of the gate insulating film 106. The hydrogen concentration of the gate insulating film 106 is 2 × 10 in SIMS.²⁰atoms / cm³Below, preferably 5 × 10¹⁹atoms / cm³Below, more preferably 1 × 10¹⁹atoms / cm³Below, more preferably 5 × 10¹⁸atoms / cm³It is as follows. Further, in order to reduce the nitrogen concentration of the oxide semiconductor 104, it is preferable to reduce the nitrogen concentration of the gate insulating film 106. The nitrogen concentration of the gate insulating film 106 is 5 × 10 in SIMS.¹⁹atoms / cm³Less than, preferably 5x10¹⁸atoms / cm³Below, more preferably 1 × 10¹⁸atoms / cm³Below, more preferably 5 × 10¹⁷atoms / cm³It is as follows.

0071The crystal structure of the oxide semiconductor film applicable to the oxide semiconductor 104 will be described below.

0072In addition, in this specification, "parallel" means a state in which two straight lines are arranged at an angle of -10 ° or more and 10 ° or less. Therefore, the case of -5 ° or more and 5 ° or less is also included. Further, "substantially parallel" means a state in which two straight lines are arranged at an angle of -30 ° or more and 30 ° or less. Further, "vertical" means a state in which two straight lines are arranged at an angle of 80 ° or more and 100 ° or less. Therefore, the case of 85 ° or more and 95 ° or less is also included. Further, "substantially vertical" means a state in which two straight lines are arranged at an angle of 60 ° or more and 120 ° or less.

0073Further, in the present specification, when the crystal is a trigonal crystal or a rhombohedral crystal, it is represented as a hexagonal system.

0074The oxide semiconductor film is divided into a non-single crystal oxide semiconductor film and a single crystal oxide semiconductor film. Alternatively, the oxide semiconductor is divided into, for example, a crystalline oxide semiconductor and an amorphous oxide semiconductor.

0075Examples of non-single crystal oxide semiconductors include CAAC-OS (C Axis Aligned Crystalline Oxide Semiconductor), polycrystalline oxide semiconductors, microcrystal oxide semiconductors, and amorphous oxide semiconductors. Further, examples of the crystalline oxide semiconductor include a single crystal oxide semiconductor, CAAC-OS, a polycrystalline oxide semiconductor, and a microcrystal oxide semiconductor.

0076First, the CAAC-OS film will be described.

0077The CAAC-OS film is one of oxide semiconductor films having a plurality of c-axis oriented crystal portions.

0078Confirming multiple crystal parts by observing a bright-field image of a CAAC-OS film and a composite analysis image (also called a high-resolution TEM image) of a diffraction pattern with a transmission electron microscope (TEM). Can be done. On the other hand, even with a high-resolution TEM image, a clear boundary between crystal portions, that is, a grain boundary (also referred to as a grain boundary) cannot be confirmed. Therefore, it can be said that the CAAC-OS film is unlikely to have a decrease in electron mobility due to grain boundaries.

0079By observing the high-resolution TEM image of the cross section of the CAAC-OS film from a direction substantially parallel to the sample surface, it can be confirmed that the metal atoms are arranged in layers in the crystal part. Each layer of the metal atom has a shape that reflects the unevenness of the surface (also referred to as the surface to be formed) or the upper surface of the CAAC-OS film, and is arranged parallel to the surface to be formed or the upper surface of the CAAC-OS film. ..

0080On the other hand, when observing the high-resolution TEM image of the plane of the CAAC-OS film from a direction substantially perpendicular to the sample plane, it can be confirmed that the metal atoms are arranged in a triangular or hexagonal shape in the crystal portion. However, there is no regularity in the arrangement of metal atoms between different crystal parts.

0081When structural analysis is performed on the CAAC-OS film using an X-ray diffraction (XRD: X-Ray Diffraction) device, for example, InGaZnO₄In the analysis by the out-of-plane method of the CAAC-OS film having the crystals of, a peak may appear in the vicinity of the diffraction angle (2θ) of 31 °. This peak is InGaZnO₄Since it is attributed to the (009) plane of the crystal, it can be confirmed that the crystal of the CAAC-OS film has c-axis orientation and the c-axis is oriented substantially perpendicular to the surface to be formed or the upper surface. ..

0082InGaZnO₄In the analysis by the out-of-plane method of the CAAC-OS film having the crystals of, 2θ may appear in the vicinity of 31 ° in addition to the peak in the vicinity of 2θ of 36 °. The peak with 2θ near 36 ° indicates that some crystals in the CAAC-OS film do not have c-axis orientation. In the CAAC-OS film, it is preferable that 2θ shows a peak near 31 ° and 2θ does not show a peak near 36 °.

0083The CAAC-OS film is an oxide semiconductor film having a low impurity concentration. Impurities are elements other than the main components of the oxide semiconductor film, such as hydrogen, carbon, silicon, and transition metal elements. In particular, elements such as silicon, which have a stronger bond with oxygen than the metal elements constituting the oxide semiconductor film, disturb the atomic arrangement of the oxide semiconductor film by depriving the oxide semiconductor film of oxygen and are crystalline. It becomes a factor to reduce. In addition, heavy metals such as iron and nickel, argon, carbon dioxide, etc. have a large atomic radius (or molecular radius), so if they are contained inside the oxide semiconductor film, they disturb the atomic arrangement of the oxide semiconductor film and are crystalline. It becomes a factor to reduce. Impurities contained in the oxide semiconductor film may serve as a carrier trap or a carrier generation source.

0084The CAAC-OS film is an oxide semiconductor film having a low defect level density. For example, oxygen deficiency in an oxide semiconductor film may become a carrier trap or a carrier generation source by capturing hydrogen.

0085A low impurity concentration and a low defect level density (less oxygen deficiency) is called high-purity intrinsic or substantially high-purity intrinsic. Oxide semiconductor films having high-purity intrinsic or substantially high-purity intrinsic have a small number of carrier sources, so that the carrier density can be lowered. Therefore, the transistor using the oxide semiconductor film rarely has an electrical characteristic (also referred to as normal on) in which the threshold voltage becomes negative. Further, the oxide semiconductor film having high purity intrinsicity or substantially high purity intrinsicity has few carrier traps. Therefore, the transistor using the oxide semiconductor film has a small fluctuation in electrical characteristics and is a highly reliable transistor. The electric charge captured by the carrier trap of the oxide semiconductor film takes a long time to be released, and may behave as if it were a fixed electric charge. Therefore, a transistor using an oxide semiconductor film having a high impurity concentration and a high defect level density may have unstable electrical characteristics.

0086In the present specification and the like, when it is substantially true, the carrier density of the oxide semiconductor film is 8 × 10.¹¹/cm³Less than, preferably 1x10¹¹/cm³Less than, more preferably 1x10¹⁰/cm³Less than 1x10^-9/cm³That is all. By making the oxide semiconductor film highly pure and intrinsic, it is possible to impart stable electrical characteristics to the transistor.

0087In addition, the transistor using the CAAC-OS film has a small fluctuation in electrical characteristics due to irradiation with visible light or ultraviolet light.

0088Next, the microcrystalline oxide semiconductor film will be described.

0089The microcrystalline oxide semiconductor film has a region in which a crystal portion can be confirmed and a region in which a clear crystal portion cannot be confirmed in a high-resolution TEM image. The crystal part contained in the microcrystalline oxide semiconductor film often has a size of 1 nm or more and 100 nm or less, or 1 nm or more and 10 nm or less. In particular, an oxide semiconductor film having nanocrystals (nc: nanocrystals) which are microcrystals of 1 nm or more and 10 nm or less, or 1 nm or more and 3 nm or less is called an nc-OS (nanocrystalline Oxide Semiconductor) film. Further, in the nc-OS film, for example, the crystal grain boundary may not be clearly confirmed in a high-resolution TEM image.

0090The nc-OS film has periodicity in the atomic arrangement in a minute region (for example, a region of 1 nm or more and 10 nm or less, particularly a region of 1 nm or more and 3 nm or less). In addition, the nc-OS film does not show regularity in crystal orientation between different crystal parts. Therefore, no orientation is observed in the entire film. Therefore, the nc-OS film may be indistinguishable from the amorphous oxide semiconductor film depending on the analysis method. For example, when structural analysis is performed on an nc-OS film using an XRD device that uses X-rays with a diameter larger than that of the crystal part, the peak indicating the crystal plane is not detected in the analysis by the out-of-plane method. Further, when electron diffraction (also referred to as selected area electron diffraction) using an electron beam having a probe diameter larger than that of the crystal portion (for example, 50 nm or more) is performed on the nc-OS film, a diffraction pattern such as a halo pattern is observed. Will be done. On the other hand, spots are observed when nanobeam electron diffraction is performed on the nc-OS film using an electron beam having a probe diameter close to the size of the crystal portion or smaller than the crystal portion. In addition, when nanobeam electron diffraction is performed on the nc-OS film, a region with high brightness (ring-shaped) may be observed in a circular motion. Further, when nanobeam electron diffraction is performed on the nc-OS film, a plurality of spots may be observed in the ring-shaped region.

0091The nc-OS film is an oxide semiconductor film having higher regularity than the amorphous oxide semiconductor film. Therefore, the nc-OS film has a lower defect level density than the amorphous oxide semiconductor film. However, in the nc-OS film, there is no regularity in crystal orientation between different crystal parts. Therefore, the nc-OS film has a higher defect level density than the CAAC-OS film.

0092Next, the amorphous oxide semiconductor film will be described.

0093The amorphous oxide semiconductor film is an oxide semiconductor film having an irregular atomic arrangement in the film and having no crystal portion. An example is an oxide semiconductor film having an amorphous state such as quartz.

0094The crystal part of the amorphous oxide semiconductor film cannot be confirmed in the high-resolution TEM image.

0095When the structural analysis of the amorphous oxide semiconductor film using the XRD apparatus is performed, the peak indicating the crystal plane is not detected in the analysis by the out-of-plane method. Further, when electron diffraction is performed on the amorphous oxide semiconductor film, a halo pattern is observed. Further, when nanobeam electron diffraction is performed on the amorphous oxide semiconductor film, no spot is observed and a halo pattern is observed.

0096The oxide semiconductor film may have a structure showing physical properties between the nc-OS film and the amorphous oxide semiconductor film. An oxide semiconductor film having such a structure is particularly called an amorphous-like oxide semiconductor (a-like OS: amorphous-like Oxide Semiconductor) film.

0097In the a-like OS film, voids (also called voids) may be observed in the high-resolution TEM image. In addition, the high-resolution TEM image has a region in which the crystal portion can be clearly confirmed and a region in which the crystal portion cannot be confirmed. The a-like OS film may be crystallized by a small amount of electron irradiation as observed by TEM, and the growth of the crystal part may be observed. On the other hand, if it is a good quality nc-OS film, crystallization by a small amount of electron irradiation as observed by TEM is hardly observed.

0098The size of the crystal part of the a-like OS film and the nc-OS film can be measured by using a high-resolution TEM image. For example, InGaZnO₄The crystal has a layered structure and has two Ga-Zn-O layers between the In-O layers. InGaZnO₄The unit cell of the crystal of is having three layers of In-O and six layers of Ga-Zn-O, and has a structure in which a total of nine layers are layered in the c-axis direction. Therefore, the spacing between these adjacent layers is about the same as the lattice spacing (also referred to as the d value) of the (009) plane, and the value is determined to be 0.29 nm from the crystal structure analysis. Therefore, paying attention to the plaid in the high-resolution TEM image, each plaid is InGaZnO in the place where the interval between the plaids is 0.28 nm or more and 0.30 nm or less.₄Corresponds to the ab plane of the crystal.

0099Further, the density of the oxide semiconductor film may differ depending on the structure. For example, if the composition of a certain oxide semiconductor film is known, the structure of the oxide semiconductor film can be estimated by comparing it with the density of a single crystal having the same composition as the composition. For example, the density of the a-like OS film is 78.6% or more and less than 92.3% of the density of the single crystal. Further, for example, the density of the nc-OS film and the density of the CAAC-OS film are 92.3% or more and less than 100% with respect to the density of the single crystal. It is difficult to form an oxide semiconductor film having a density of less than 78% of the density of a single crystal.

0100The above will be described with reference to specific examples. For example, in an oxide semiconductor film satisfying In: Ga: Zn = 1: 1: 1 [atomic number ratio], a single crystal InGaZnO having a rhombohedral structure.₄Density is 6.357g / cm³Will be. Therefore, for example, in an oxide semiconductor film satisfying In: Ga: Zn = 1: 1: 1 [atomic number ratio], the density of the a-like OS film is 5.0 g / cm.³More than 5.9g / cm³Will be less than. Further, for example, in an oxide semiconductor film satisfying In: Ga: Zn = 1: 1: 1 [atomic number ratio], the density of the nc-OS film and the density of the CAAC-OS film are 5.9 g / cm.³More than 6.3g / cm³Will be less than.

0101In some cases, single crystals having the same composition do not exist. In that case, the density corresponding to the single crystal having a desired composition can be calculated by combining the single crystals having different compositions at an arbitrary ratio. The density of a single crystal having a desired composition may be calculated by using a weighted average with respect to the ratio of combining single crystals having different compositions. However, the density is preferably calculated by combining as few types of single crystals as possible.

0102The oxide semiconductor film may be, for example, a laminated film having two or more of an amorphous oxide semiconductor film, an a-like OS film, a microcrystalline oxide semiconductor film, and a CAAC-OS film. ..

0103As described above, the configurations and methods shown in the present embodiment can be used in appropriate combination with the configurations and methods shown in other embodiments.

0104(Embodiment 3) In the present embodiment, the method of manufacturing the transistor 110 shown in the first embodiment will be described with reference to the drawings.

0105First, the wiring 101 and the conductive film 111 are formed on the substrate 109 (see FIG. 3 (A)).

0106Next, the conductive film 203, the oxide semiconductor 204, and the conductive film 205 are formed (see FIG. 3 (B)).

0107The conductive film 203 and the conductive film 205 may be formed by a sputtering method, a CVD method (including, but not limited to, an ALD method, a MOCVD method, a thermal CVD method, or a PECVD method), an MBE method, or a PLD method. In particular, the ALD method, MOCVD method, or thermal CVD method is preferable because it does not use plasma and therefore causes less damage.

0108The oxide semiconductor 204 is formed into a film using the method described in the second embodiment.

0109The conductive film 203, the oxide semiconductor 204 and the conductive film 205 are then etched using common photolithography to form the source electrode 103, the oxide semiconductor 104 and the drain electrode 105 (see FIG. 3 (C)). .. A hard mask may be used when etching the conductive film 203, the oxide semiconductor 204, and the conductive film 205. Further, the conductive film 111 may be etched at the same time.

0110Next, the gate insulating film 106 and the conductive film 202 are formed (see FIG. 4 (A)). The gate insulating film 106 and the conductive film 202 may be deposited using a sputtering method, a CVD method (including, but not limited to, an ALD method, a MOCVD method, a thermal CVD method, or a PECVD method), an MBE method, or a PLD method. .. In particular, the ALD method, MOCVD method, or thermal CVD method is preferable because it does not use plasma and therefore causes less damage.

0111Next, the conductive film 202 and the gate insulating film 106 are processed by anisotropic etching to form the gate electrode 102 (see FIG. 4 (B)). By anisotropic etching, the gate electrode 102 is formed at a position facing the side surface of the oxide semiconductor 104 via the gate insulating film 106. Depending on the etching method, a part of the gate insulating film 106 may remain on the drain electrode 105 without being etched, but this is not a problem because it is removed in a later polishing step. Further, an etching method in which a selectivity can be obtained between the gate electrode 102 and the drain electrode 105 so that the drain electrode 105 does not disappear is preferable, but if the above-mentioned selectivity cannot be obtained, etching is performed on the drain electrode 105. A stopper may be provided.

0112Next, the protective insulating film 107 and the interlayer insulating film 108 are formed (see FIG. 4C). The protective insulating film 107 and the interlayer insulating film 108 can be deposited by using a sputtering method, a CVD method (including, but not limited to, ALD method, MOCVD method, thermal CVD method or PECVD method), MBE method or PLD method. Good. In particular, the ALD method, MOCVD method, or thermal CVD method is preferable because it does not use plasma and therefore causes less damage.

0113Next, heat treatment is performed. The heat treatment may be carried out at a temperature of 250 ° C. or higher and 650 ° C. or lower, preferably 300 ° C. or higher and 500 ° C. or lower, in an atmosphere of an inert gas, an atmosphere containing 10 ppm or more of an oxidizing gas, or a reduced pressure state. By heat treatment, the source electrode 103 and the drain electrode 105 are reduced to prepare the conductive film 113a, the conductive film 113b, the conductive film 115a and the conductive film 115b (see FIG. 5 (A)). At that time, the oxygen released from the source electrode 103 and the drain electrode 105 is supplied to the oxide semiconductor 104 to reduce the oxygen deficiency of the oxide semiconductor 104.

0114Next, the protective insulating film 107 and the interlayer insulating film 108 are polished by a CMP (Chemical Mechanical Polishing) method and flattened (see FIG. 5 (B)). At this time, the drain electrode 115 can be used as a stopper for the CMP method. If the drain electrode 115 cannot be used as a stopper, a stopper may be provided on the drain electrode 115.

0115Finally, the interlayer insulating film 209, the plug 212, and the conductive film 211 are formed. As the plug 212, a conductor containing one or more types of Al, Ti, Co, Ni, Cu, W, and Mo can be used. Further, it is preferable that the conductive film 211 has lower oxygen permeability than the conductive film 115a and the conductive film 115b. The conductive film 211 has a blocking effect on oxygen like the conductive film 111, and prevents an oxide layer having high resistance from being formed between the drain electrode 115 and the plug 212. In particular, tantalum nitride has a high blocking effect on oxygen and is preferable for the conductive film 211.

0116As described above, the configurations and methods shown in the present embodiment can be used in appropriate combination with the configurations and methods shown in other embodiments.

0117(Embodiment 4) In the present embodiment, modifications of the oxide semiconductor 104 and the transistor 110 shown in the first embodiment will be described with reference to the drawings.

0118&lt;Modification example of oxide semiconductor&gt; In the first embodiment, the case where the semiconductor region has a truncated cone shape is shown, but the shape of the semiconductor region is not limited to this. Figure 6 shows an example of the shape when the semiconductor region is three-dimensionally processed.

0119FIG. 6A shows an example in which a semiconductor region is formed in a prismatic shape. The prismatic shape is easy to lay out and the occupied area of the transistor can be reduced.

0120FIG. 6B shows an example in which a semiconductor region is formed in a wall shape. Since the wall shape can increase the area of the side surface of the semiconductor region, the on-current of the transistor can be increased.

0121FIG. 6C shows an example in which a semiconductor region is formed in a pyramidal trapezoidal shape. Compared to the wall shape, the pyramid trapezoidal shape can enhance the coverage of the gate insulating film or gate electrode formed on the side surface of the semiconductor region. Note that FIGS. 6 (A), 6 (B) and 6 (C) may have rounded corners to avoid unintended concentration of the gate electric field.

0122FIG. 6 (D) shows an example in which a semiconductor region is formed in a cylindrical shape. Since the cylindrical shape has no corners on the side surface, the gate electric field can be uniformly applied to the semiconductor region.

0123FIG. 6 (E) shows an example in which the semiconductor region is formed in a truncated cone shape. The truncated cone shape can enhance the coverage of the gate insulating film or the gate electrode formed on the side surface of the semiconductor region as compared with the cylindrical shape.

0124&lt;Transistor modification 1&gt; The transistor 410 shown in FIG. 7 (A) is an example of the transistor 110 of FIG. 2 (C) in which only the source electrode 113 has an oxygen supply capacity and the drain electrode 415 does not have an oxygen supply capacity. In this case, since the material choices for the drain electrode 415 are expanded, it is possible to select a material having a selective ratio with that of the gate electrode 102 when the gate electrode 102 is formed by anisotropic etching.

0125&lt;Transistor modification 2&gt; The transistor 420 shown in FIG. 7 (B) is an example of the transistor 110 in FIG. 2 (C) in which only the drain electrode 115 has an oxygen supply capacity and the source electrode 423 does not have an oxygen supply capacity. In this case, it is not necessary to provide the conductive film 111 for blocking oxygen between the source electrode 423 and the wiring 101, and the process can be simplified.

0126&lt;Transistor modification 3&gt; The transistor 430 shown in FIG. 8A is a transistor in which the source electrode 113 and the conductive film 111 are omitted in the transistor 110 of FIG. 2C. In this case, the wiring 101 also serves as a source electrode. By omitting the source electrode 113 in the transistor 430, it is possible to shorten the process and eliminate damage to the oxide semiconductor 104 when the source electrode 113 is formed by etching.

0127&lt;Transistor modification 4&gt; The transistor 440 shown in FIG. 8B is an example in which the drain electrode 115 is omitted in the transistor 110 of FIG. 2C and the oxide semiconductor 104 and the plug 446 are directly bonded. In this case, the plug 446 also serves as the source electrode. In FIG. 8B, the area where the hatch pattern is not applied is composed of an insulator. Further, the plug 446 may be a laminate of a conductive layer having a low resistance and a conductive barrier film that prevents metal from diffusing into the semiconductor. By omitting the drain electrode 115 in the transistor 440, it is possible to shorten the process and eliminate damage to the oxide semiconductor 104 when the drain electrode 115 is formed by etching.

0128As described above, the configurations and methods shown in the present embodiment can be used in appropriate combination with the configurations and methods shown in other embodiments.

0129(Embodiment 5) In the present embodiment, an example of a storage device using a transistor, which is one aspect of the present invention, will be described with reference to the drawings.

0130FIG. 9 is a top view of the storage device 500 using the transistor of one aspect of the present invention. Note that FIG. 9 is shown with some elements omitted for the sake of clarity. The storage device 500 includes a plurality of bit lines BL extending in the column direction, a plurality of word lines WL extending in the row direction, a transistor 530 sandwiched between the word line WLs and arranged on the bit line BL, and a transistor 530. It has an upper storage element 520 and a contact 510 in contact with the bottom surface of the word line WL and the side surface of the transistor 530. The transistor 530 is a vertical transistor according to an aspect of the present invention. Transistors 530 and storage element 520 are arranged in a matrix at 2F intervals, and storage device 500 is 4F.²Consists of memory cells.

0131When the storage device 500 is a DRAM (Dynamic Random Access Memory), a capacitor is used for the storage element 520, and when the storage device 500 is a PRAM (Phase change Random Access Memory), a phase change film is used for the storage element 520 for storage. When the device 500 is a ReRAM (Resistance Random Access Memory), a resistance changing element is used for the storage element 520. The case where the storage device 500 is DRAM will be described below.

0132FIG. 10 shows a sectional view taken along line A1-A2 of FIG. The storage device 500 shown in FIG. 10 includes a transistor 530, a bit wire BL, a conductive film 511, a word wire WL, a contact 510, a plug 515, a conductive film 516, a first capacitor electrode 512, and a second capacitor. It has a storage element 520 having an electrode 513 and a capacitor insulator 514. The contact 510 is connected to a gate electrode 532 and a word line WL arranged on the side surface of the transistor 530, and has a function of transmitting the potential of the word line WL to the gate electrode 532 of the transistor 530. The source electrode 533 of the transistor 530 (including the conductive film 533a and the conductive film 533b) is connected to the bit wire BL, and the drain electrode 535 of the transistor 530 (including the conductive film 535a and the conductive film 535b) is connected to the storage element 520. There is. The conductive film 511 has a function of blocking oxygen and prevents the formation of a highly resistant oxide between the bit wire BL and the source electrode 533. The conductive film 516 has a function of blocking oxygen and prevents the formation of a highly resistant oxide between the plug 515 and the drain electrode 535.

0133The transistor 530 is different from the transistor 110 shown in FIG. 2C in the positional relationship between the apex of the gate electrode and the drain electrode. In the transistor 530, the apex of the gate electrode 532 is located higher than the drain electrode 535, and the gate electrode 532 and the gate insulating film 536 are located between the contact 510 and the drain electrode 535 (see FIG. 10). With the above configuration, the transistor 530 prevents the contact 510 and the drain electrode 535 from being short-circuited. Except for the above features, the transistor 530 is the same as the transistor 110.

0134FIG. 11 shows a sectional view taken along line B1-B2 of FIG. The storage device 500 shown in FIG. 11 includes a transistor 530, a bit wire BL, a conductive film 511, a plug 515, a conductive film 516, a first capacitor electrode 512, a second capacitor electrode 513, and a capacitor insulator 514. It has a storage element 520.

0135In addition, in FIG. 10 and FIG. 11, the region where the hatch pattern is not applied represents a region composed of an insulator. Areas of interest include aluminum oxide, magnesium oxide, silicon oxide, silicon nitride, silicon nitride oxide, silicon nitride, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, and tantalum oxide. An insulator containing one or more selected ones can be used.

0136Since the transistor 530 is a transistor having a low off-current, it can be used as a DRAM memory cell to prolong the holding time of the electric charge stored in the storage element 520. As a result, the frequency of DRAM refreshing can be reduced, and power consumption can be reduced.

0137Also, 4F with SGT using single crystal silicon²When the memory cell of the above is manufactured, the impurity injection process when forming the source region and the drain region is complicated, but the transistor 530 is used for 4F.²In the case of producing the memory cell of the above, the manufacturing process can be shortened because the impurity injection step at the time of forming the source region and the drain region is unnecessary.

0138As described above, the configurations and methods shown in the present embodiment can be used in appropriate combination with the configurations and methods shown in other embodiments.

0139(Embodiment 6) In the present embodiment, an example in which the storage device shown in the fifth embodiment and the transistor manufactured on the semiconductor substrate are combined will be described with reference to the drawings.

0140FIG. 12 includes the storage device 500 shown in the fifth embodiment, the transistor 2200, the element separation layer 2201, the plugs 2202 to 2205, the wiring 2208 to 2210, the insulating layer 2207, and the semiconductor substrate 2211. .. The area where the hatch pattern is not applied in FIG. 12 is composed of an insulator. The left half area of FIG. 12 shows the A1-A2 line sectional view of FIG. 9, and the right half area of FIG. 12 shows the B1-B2 line sectional view of FIG.

0141The first semiconductor material used for the semiconductor substrate 2211 is preferably a material having a forbidden bandgap different from that of the second semiconductor material used for the transistor 530. For example, the first semiconductor material is a semiconductor material other than an oxide semiconductor (silicon, germanium, silicon germanium, silicon carbide, gallium arsenide, etc., such as a polycrystal structure or a single crystal structure), and the second semiconductor material is an oxide. It can be a semiconductor. Transistors using single crystal silicon or the like as a material other than oxide semiconductors are easy to operate at high speed. On the other hand, a transistor using an oxide semiconductor has a low off-current.

0142For example, a semiconductor having strain such as strained silicon may be used as the first semiconductor. Alternatively, gallium arsenide, aluminum gallium arsenide, indium arsenide, gallium arsenide, indium phosphide, silicon germanium, etc., which are applicable to high electron mobility transistors (HEMTs) are used as the first semiconductor. You may. By using these semiconductors as the first semiconductor, a transistor 2200 suitable for high-speed operation can be obtained.

0143The transistor 2200 may be either an n-channel type transistor or a p-channel type transistor, and an appropriate transistor may be used depending on the circuit. In addition to using the transistor of one aspect of the present invention using an oxide semiconductor, it is not necessary to limit the specific configuration of the semiconductor device to those shown here, such as the material and structure used.

0144By stacking the two types of transistors in this way, the occupied area of the circuit can be reduced, and a plurality of circuits can be arranged at a higher density. For example, the transistor 2200 may be used to form a drive circuit for the storage device 500.

0145Here, when a silicon-based semiconductor material is used for the transistor 2200 provided in the lower layer, hydrogen in the insulating layer provided in the vicinity of the semiconductor layer of the transistor 2200 terminates the dangling bond of silicon, and the reliability of the transistor 2200 is improved. It has the effect of improving. On the other hand, when an oxide semiconductor is used for the transistor 530 provided in the upper layer, hydrogen in the insulating layer provided in the vicinity of the oxide semiconductor layer becomes one of the factors for generating carriers in the oxide semiconductor. It may cause a decrease in the reliability of the 530. Therefore, when a transistor 530 using an oxide semiconductor is laminated on an upper layer of a transistor 2200 using a silicon-based semiconductor material, it is particularly important to provide an insulating layer 2207 having a function of preventing the movement of hydrogen between them. It is effective. The insulating layer 2207 not only improves the reliability of the transistor 2200 by confining hydrogen in the lower layer, but also improves the reliability of the transistor 530 by suppressing the diffusion of hydrogen from the lower layer to the upper layer.

0146As the insulating layer 2207, for example, aluminum oxide, aluminum nitride, gallium oxide, gallium nitride, yttrium oxide, yttrium oxide, hafnium oxide, hafnium oxide, yttria-stabilized zirconia (YSZ) and the like can be used.

0147The transistor 2200 can be not only a planar type transistor but also various types of transistors. For example, it can be a FIN type transistor, a TRI-GATE type transistor, or the like. An example of a cross-sectional view in that case is shown in FIG. An insulating layer 2212 is provided on the semiconductor substrate 2211. The semiconductor substrate 2211 has a convex portion (also referred to as a fin) having a thin tip. An insulating film may be provided on the convex portion. The insulating film functions as a mask for preventing the semiconductor substrate 2211 from being etched when the convex portion is formed. The convex portion does not have to have a thin tip. For example, the convex portion may be a substantially rectangular parallelepiped convex portion or a convex portion having a thick tip. A gate insulating film 2214 is provided on the convex portion of the semiconductor substrate 2211, and a gate electrode 2213 is provided on the gate insulating film 2214. A source region and a drain region 2215 are formed on the semiconductor substrate 2211. Although the example in which the semiconductor substrate 2211 has a convex portion is shown here, the semiconductor device according to one aspect of the present invention is not limited to this. For example, the SOI substrate may be processed to form a semiconductor region having a convex portion.

0148As described above, the configurations and methods shown in the present embodiment can be used in appropriate combination with the configurations and methods shown in other embodiments.

0149(Embodiment 7) In the present embodiment, refer to the drawing for an example of a storage device that uses a transistor according to one aspect of the present invention, can retain the stored contents even in a situation where power is not supplied, and has no limit on the number of times of writing. I will explain.

0150The memory cell shown in FIG. 14A has a transistor 3200 using the first semiconductor material, a transistor 3300 using the second semiconductor material, and a capacitive element 3400. As the transistor 3300, the transistor described in the above embodiment can be used.

0151The transistor 3300 is a transistor in which a channel is formed in a semiconductor layer having an oxide semiconductor. Since the transistor 3300 has a small off-current, it is possible to retain the stored contents for a long period of time by using the transistor 3300. That is, it is possible to use a storage device that does not require a refresh operation or has an extremely low frequency of refresh operations, so that power consumption can be sufficiently reduced.

0152In FIG. 14 (A), the first wire 3001 is electrically connected to the source electrode of the transistor 3200, and the second wire 3002 is electrically connected to the drain electrode of the transistor 3200. Further, the third wiring 3003 is electrically connected to one of the source electrode and the drain electrode of the transistor 3300, and the fourth wiring 3004 is electrically connected to the gate electrode of the transistor 3300. Then, the gate electrode of the transistor 3200 and the other of the source electrode or drain electrode of the transistor 3300 are electrically connected to the first terminal of the capacitive element 3400, and the fifth wiring 3005 is the second terminal of the capacitive element 3400. Is electrically connected to.

0153In the memory cell shown in FIG. 14A, information can be written, held, and read as follows by taking advantage of the feature that the potential of the gate electrode of the transistor 3200 can be held.

0154Writing and retaining information will be described. First, the potential of the fourth wiring 3004 is set to the potential at which the transistor 3300 is turned on, and the transistor 3300 is turned on. As a result, the potential of the third wiring 3003 is given to the gate electrode of the transistor 3200 and the capacitance element 3400. That is, a predetermined charge is given (write) to the gate of the transistor 3200. Here, it is assumed that one of charges that give two different potential levels (hereinafter referred to as low level charge and high level charge) is given. After that, the potential of the fourth wiring 3004 is set to the potential at which the transistor 3300 is turned off, and the transistor 3300 is turned off, so that the electric charge given to the gate of the transistor 3200 is retained (retained).

0155Since the off-current of transistor 3300 is extremely small, the charge at the gate of transistor 3200 is retained for a long time.

0156Next, reading information will be described. When a predetermined potential (constant potential) is applied to the first wiring 3001 and an appropriate potential (reading potential) is applied to the fifth wiring 3005, depending on the amount of electric charge held in the gate of the transistor 3200, The second wire 3002 takes different potentials. In general, assuming that the transistor 3200 is an n-channel type, the apparent threshold value V when the gate electrode of the transistor 3200 is given a high level charge._{th_H}Is the apparent threshold V when the gate electrode of transistor 3200 is given a low level charge._{th_L}Because it will be lower. Here, the apparent threshold voltage refers to the potential of the fifth wiring 3005 required to put the transistor 3200 in the ON state. Therefore, the potential of the fifth wiring 3005 is V._{th_H}And V_{th_L}Potential V between₀Therefore, the electric charge given to the gate of the transistor 3200 can be discriminated. For example, in writing, when a high level charge is given, the potential of the fifth wiring 3005 is V.₀(&gt; V_{th_H}), The transistor 3200 is in the "on state". When low level charge is given, the potential of the fifth wire 3005 is V₀(&lt;V_{th_L}), The transistor 3200 remains in the "off state". Therefore, the retained information can be read out by discriminating the potential of the second wiring 3002.

0157When the memory cells are arranged in an array and used, it is necessary to be able to read only the information of the desired memory cells. When the information is not read in this way, the potential at which the transistor 3200 is "off" regardless of the gate state, that is, V_{th_H}A smaller potential may be applied to the fifth wire 3005. Alternatively, the potential at which the transistor 3200 is "on" regardless of the gate state, that is, V_{th_L}A higher potential may be applied to the fifth wire 3005.

0158The memory cell shown in FIG. 14 (B) is different from FIG. 14 (A) in that the transistor 3200 is not provided. In this case as well, information can be written and held by the same operation as described above.

0159Next, reading information will be described. When the transistor 3300 is turned on, the floating third wiring 3003 and the capacitance element 3400 are electrically connected, and the electric charge is redistributed between the third wiring 3003 and the capacitance element 3400. As a result, the potential of the third wiring 3003 changes. The amount of change in the potential of the third wiring 3003 takes a different value depending on the potential of the first terminal of the capacitance element 3400 (or the electric charge accumulated in the capacitance element 3400).

0160For example, the potential of the first terminal of the capacitance element 3400 is V, the capacitance of the capacitance element 3400 is C, the capacitance component of the third wiring 3003 is CB, and the potential of the third wiring 3003 before the charge is redistributed. If is VB0, the potential of the third wiring 3003 after the charge is redistributed is (CB × VB0 + C × V) / (CB + C). Therefore, assuming that the potential of the first terminal of the capacitive element 3400 takes two states of V1 and V0 (V1&gt; V0) as the state of the memory cell, the third wiring 3003 when the potential V1 is held. The potential (= (CB × VB0 + C × V1) / (CB + C)) is the potential (= CB × VB0 + C × V0) / (CB) of the third wiring 3003 when the potential V0 is held. It can be seen that it is higher than + C)).

0161Then, the information can be read out by comparing the potential of the third wiring 3003 with a predetermined potential.

0162In this case, a transistor to which the first semiconductor material is applied is used for the drive circuit for driving the memory cell, and a transistor to which the second semiconductor material is applied is laminated on the drive circuit as the transistor 3300. And it is sufficient.

0163In the memory cell shown in the present embodiment, the stored contents can be retained for an extremely long period of time by applying a transistor using an oxide semiconductor and having an extremely small off-current to the channel forming region. That is, the refresh operation becomes unnecessary, or the frequency of the refresh operation can be made extremely low, so that the power consumption can be sufficiently reduced. Further, even when there is no power supply (however, it is desirable that the potential is fixed), it is possible to retain the stored contents for a long period of time.

0164Further, in the semiconductor device shown in the present embodiment, a high voltage is not required for writing information, and there is no problem of element deterioration. For example, unlike the conventional non-volatile memory, it is not necessary to inject electrons into the floating gate or extract electrons from the floating gate, so that the problem of deterioration of the gate insulating film does not occur at all. That is, in the semiconductor device according to the disclosed invention, there is no limit to the number of rewritable times that is a problem in the conventional non-volatile memory, and the reliability is dramatically improved. Further, since information is written depending on whether the transistor is on or off, high-speed operation can be easily realized.

0165As described above, the configurations and methods shown in the present embodiment can be used in appropriate combination with the configurations and methods shown in other embodiments.

0166(Embodiment 8) In the present embodiment, a configuration example of a display device using a transistor, which is one aspect of the present invention, will be described.

0167[Configuration example] FIG. 15A is a top view of the display device of one aspect of the present invention, and FIG. 15B can be used when applying a liquid crystal element to the pixels of the display device of one aspect of the present invention. It is a circuit diagram for demonstrating a pixel circuit. Further, FIG. 15C is a circuit diagram for explaining a pixel circuit that can be used when an organic EL (electroluminescence) element is applied to the pixels of the display device of one aspect of the present invention.

0168The transistor arranged in the pixel portion can be formed according to the above embodiment. Further, since the transistor can be easily made into an n-channel type, a part of the drive circuit that can be composed of the n-channel type transistor is formed on the same substrate as the transistor of the pixel portion. As described above, by using the transistor shown in the above embodiment for the pixel unit and the drive circuit, it is possible to provide a highly reliable display device.

0169An example of a top view of the active matrix type display device is shown in FIG. 15 (A). A pixel unit 701, a first scanning line driving circuit 702, a second scanning line driving circuit 703, and a signal line driving circuit 704 are provided on the substrate 700 of the display device. A plurality of signal lines extend from the signal line drive circuit 704 and are arranged in the pixel unit 701, and a plurality of scan lines extend from the first scan line drive circuit 702 and the second scan line drive circuit 703. Have been placed. In the intersection region between the scanning line and the signal line, pixels having a display element are provided in a matrix. Further, the substrate 700 of the display device is connected to a timing control circuit (also referred to as a controller or a control IC) via a connection portion such as an FPC (Flexible Printed Circuit).

0170In FIG. 15A, the first scanning line driving circuit 702, the second scanning line driving circuit 703, and the signal line driving circuit 704 are formed on the same substrate 700 as the pixel unit 701. Therefore, the number of parts such as a drive circuit provided externally is reduced, so that the cost can be reduced. Further, when the drive circuit is provided outside the board 700, it becomes necessary to extend the wiring, and the number of connections between the wirings increases. When the drive circuit is provided on the same substrate 700, the number of connections between the wirings can be reduced, and the reliability or the yield can be improved.

0171[Liquid crystal display device] Further, an example of the pixel circuit configuration is shown in FIG. 15 (B). Here, a pixel circuit that can be applied to the pixels of a VA type liquid crystal display device is shown.

0172This pixel circuit can be applied to a configuration having a plurality of pixel electrode layers in one pixel. Each pixel electrode layer is connected to a different transistor, and each transistor is configured to be driven by a different gate signal. As a result, the signal applied to each pixel electrode layer of the multi-domain designed pixel can be independently controlled.

0173The gate wiring 712 of the transistor 716 and the gate wiring 713 of the transistor 717 are separated so that different gate signals can be given. On the other hand, the source electrode or drain electrode 714 that functions as a data line is commonly used in the transistor 716 and the transistor 717. As the transistor 716 and the transistor 717, the transistor described in the above embodiment can be appropriately used. This makes it possible to provide a highly reliable liquid crystal display device.

0174The shapes of the first pixel electrode layer electrically connected to the transistor 716 and the second pixel electrode layer electrically connected to the transistor 717 will be described. The shapes of the first pixel electrode layer and the second pixel electrode layer are separated by a slit. The first pixel electrode layer has a V-shaped spreading shape, and the second pixel electrode layer is formed so as to surround the outside of the first pixel electrode layer.

0175The gate electrode of the transistor 716 is connected to the gate wiring 712, and the gate electrode of the transistor 717 is connected to the gate wiring 713. By giving different gate signals to the gate wiring 712 and the gate wiring 713 to make the operation timings of the transistor 716 and the transistor 717 different, the orientation of the liquid crystal can be controlled.

0176Further, the holding capacitance may be formed by the capacitive wiring 710, the gate insulating film that functions as a dielectric, and the capacitive electrode that is electrically connected to the first pixel electrode layer or the second pixel electrode layer.

0177The multi-domain structure includes a first liquid crystal element 718 and a second liquid crystal element 719 in one pixel. The first liquid crystal element 718 is composed of a first pixel electrode layer, a counter electrode layer, and a liquid crystal layer in between, and the second liquid crystal element 719 includes a second pixel electrode layer, a counter electrode layer, and a liquid crystal layer in between. Consists of.

0178The pixel circuit shown in FIG. 15B is not limited to this. For example, a switch, a resistance element, a capacitance element, a transistor, a sensor, a logic circuit, or the like may be newly added to the pixel shown in FIG. 15 (B).

0179[Organic EL display device] Another example of the pixel circuit configuration is shown in FIG. 15 (C). Here, the pixel structure of a display device using an organic EL element is shown.

0180In the organic EL element, by applying a voltage to the light emitting element, electrons are injected from one of the pair of electrodes and holes are injected from the other into the layer containing the luminescent organic compound, and a current flows. Then, when the electrons and holes are recombined, the luminescent organic compound forms an excited state, and when the excited state returns to the ground state, it emits light. From such a mechanism, such a light emitting element is called a current excitation type light emitting element.

0181FIG. 15C is a diagram showing an example of an applicable pixel circuit. Here, an example in which two n-channel transistors are used for one pixel is shown. The metal oxide film of one aspect of the present invention can be used in the channel forming region of an n-channel transistor. Further, the pixel circuit can be driven by digital time gradation.

0182An applicable pixel circuit configuration and pixel operation when digital time gradation drive is applied will be described.

0183The pixel 720 includes a switching transistor 721, a driving transistor 722, a light emitting element 724, and a capacitance element 723. In the switching transistor 721, the gate electrode is connected to the scanning line 726, the first electrode (one of the source electrode and the drain electrode) is connected to the signal line 725, and the second electrode (the other of the source electrode and the drain electrode) is driven. It is connected to the gate electrode of the transistor 722. In the drive transistor 722, the gate electrode is connected to the power supply line 727 via the capacitive element 723, the first electrode is connected to the power supply line 727, and the second electrode is connected to the first electrode (pixel electrode) of the light emitting element 724. Has been done. The second electrode of the light emitting element 724 corresponds to the common electrode 728. The common electrode 728 is electrically connected to a common potential line formed on the same substrate.

0184As the switching transistor 721 and the driving transistor 722, the transistor described in the above embodiment can be appropriately used. This makes it possible to provide a highly reliable organic EL display device.

0185The potential of the second electrode (common electrode 728) of the light emitting element 724 is set to a low power supply potential. The low power supply potential is a potential that satisfies the low power supply potential &lt;high power supply potential with reference to the high power supply potential supplied to the power supply line 727, and for example, GND, 0V, etc. are set as the low power supply potential. Is also good. A high power supply potential and a low power supply potential are set so as to be equal to or higher than the forward threshold voltage of the light emitting element 724, and the potential difference is applied to the light emitting element 724 to cause a current to flow through the light emitting element 724 to emit light. The forward voltage of the light emitting element 724 refers to a voltage at which a desired brightness is obtained, and includes at least a forward threshold voltage.

0186The capacitive element 723 can be omitted by substituting the gate capacitance of the driving transistor 722. Regarding the gate capacitance of the drive transistor 722, a capacitance may be formed between the channel forming region and the gate electrode.

0187Next, the signal input to the drive transistor 722 will be described. Voltage input In the case of the voltage drive system, a video signal is input to the drive transistor 722 so that the drive transistor 722 is in two states of being sufficiently turned on and off. In order to operate the drive transistor 722 in the linear region, a voltage higher than the voltage of the power supply line 727 is applied to the gate electrode of the drive transistor 722. Further, a voltage equal to or higher than the value obtained by adding the threshold voltage Vth of the driving transistor 722 to the power supply line voltage is applied to the signal line 725.

0188When analog gradation driving is performed, a voltage equal to or greater than the value obtained by adding the threshold voltage Vth of the driving transistor 722 to the forward voltage of the light emitting element 724 is applied to the gate electrode of the driving transistor 722. A video signal is input so that the driving transistor 722 operates in the saturation region, and a current is passed through the light emitting element 724. Further, in order to operate the drive transistor 722 in the saturation region, the potential of the power supply line 727 is set higher than the gate potential of the drive transistor 722. By making the video signal analog, a current corresponding to the video signal is passed through the light emitting element 724, and analog gradation drive can be performed.

0189The configuration of the pixel circuit is not limited to the pixel configuration shown in FIG. 15C. For example, a switch, a resistance element, a capacitance element, a sensor, a transistor, a logic circuit, or the like may be added to the pixel circuit shown in FIG. 15 (C).

0190When the transistor illustrated in the above embodiment is applied to the circuit illustrated in FIG. 15, the source electrode (first electrode) is electrically on the low potential side and the drain electrode (second electrode) is electrically on the high potential side. The configuration is to be connected. Further, the potential of the first gate electrode is controlled by a control circuit or the like, and the potential which is lower than the potential given to the source electrode by wiring (not shown) can be input to the second gate electrode. do it.

0191For example, in the present specification and the like, the display element, the display device which is a device having a display element, the light emitting element, and the light emitting device which is a device having a light emitting element use various forms or have various elements. Can be done. As an example of a display element, display device, light emitting element or light emitting device, an EL (electroluminescence) element (EL element containing organic and inorganic substances, an organic EL element, an inorganic EL element), an LED (white LED, red LED, green LED) , Blue LED, etc.), Transistor (transistor that emits light according to current), electron emitting element, liquid crystal element, electronic ink, electrophoresis element, grating light valve (GLV), plasma display (PDP), MEMS (micro electro Mechanical Systems), Digital Micromirror Device (DMD), DMS (Digital Micro Shutter), MIRASOL®, IMOD (Interference Modulation) Elements, Electrowetting Elements, piezoelectric Ceramic Display, Carbon Nanotubes, Some have a display medium whose contrast, brightness, reflectance, transmittance, etc. change due to an electromagnetic action. An example of a display device using an EL element is an EL display. An example of a display device using an electron emitting element is a field emission display (FED) or a surface-conduction electron-emitter display (SED). An example of a display device using a liquid crystal element is a liquid crystal display (transmissive liquid crystal display, semi-transmissive liquid crystal display, reflective liquid crystal display, direct-view liquid crystal display, projection liquid crystal display). An example of a display device using electronic ink or an electrophoresis element is electronic paper.

0192This embodiment can be implemented in combination with at least a part thereof as appropriate with other embodiments described in the present specification.

0193(Embodiment 9) The semiconductor device according to one aspect of the present invention is a display capable of reproducing a recording medium such as a display device, a personal computer, and an image reproduction device (typically a DVD: Digital Versatile Disc) including a recording medium and displaying the image. Can be used for devices having In addition, mobile phones, game consoles including portable types, personal digital assistants, electronic book terminals, video cameras, cameras such as digital still cameras, goggle type displays (head mount displays), navigation systems, sound reproduction devices (car audio, Digital audio players, etc.), copiers, facsimiles, printers, multifunction printers, etc. Specific examples of these electronic devices are shown in FIG.

0194FIG. 16A shows a portable game machine, which includes a housing 901, a housing 902, a display unit 903, a display unit 904, a microphone 905, a speaker 906, an operation key 907, a stylus 908, and the like. The portable game machine shown in FIG. 16A has two display units 903 and a display unit 904, but the number of display units of the portable game machine is not limited to this.

0195FIG. 16B is a portable data terminal, which includes a first housing 911, a second housing 912, a first display unit 913, a second display unit 914, a connection unit 915, an operation key 916, and the like. The first display unit 913 is provided in the first housing 911, and the second display unit 914 is provided in the second housing 912. The first housing 911 and the second housing 912 are connected by the connecting portion 915, and the angle between the first housing 911 and the second housing 912 can be changed by the connecting portion 915. is there. The image in the first display unit 913 may be switched according to the angle between the first housing 911 and the second housing 912 in the connection unit 915. Further, a display device having a function as a position input device may be used for at least one of the first display unit 913 and the second display unit 914. The function as a position input device can be added by providing a touch panel on the display device. Alternatively, the function as a position input device can be added by providing a photoelectric conversion element, which is also called a photo sensor, in the pixel portion of the display device.

0196FIG. 16C shows a notebook personal computer, which includes a housing 921, a display unit 922, a keyboard 923, a pointing device 924, and the like.

0197FIG. 16D shows an electric refrigerator / freezer, which has a housing 931, a refrigerator door 932, a freezer door 933, and the like.

0198FIG. 16E shows a video camera, which has a first housing 941, a second housing 942, a display unit 943, an operation key 944, a lens 945, a connection unit 946, and the like. The operation key 944 and the lens 945 are provided in the first housing 941, and the display unit 943 is provided in the second housing 942. The first housing 941 and the second housing 942 are connected by the connecting portion 946, and the angle between the first housing 941 and the second housing 942 can be changed by the connecting portion 946. is there. The image on the display unit 943 may be switched according to the angle between the first housing 941 and the second housing 942 on the connection unit 946.

0199FIG. 16 (F) is an ordinary automobile, which has a vehicle body 951, wheels 952, dashboard 953, lights 954, and the like.

0200(Embodiment 10) The storage device described in the above embodiment can be used for cache memory, main memory, and storage of various processors (for example, CPU, microcontroller, programmable device such as FPGA, RF tag). In the present embodiment, an example of using the RF tag using the storage device will be described with reference to FIG. RF tags have a wide range of uses, such as banknotes, coins, securities, bearer bonds, certificates (driver's license, resident's card, etc., see Fig. 17 (A)), packaging containers (wrapping paper, etc.) Bottles, etc., see Fig. 17 (C)), recording media (DVD, video tape, etc., see Fig. 17 (B)), vehicles (bicycles, etc., see Fig. 17 (D)), personal belongings (bags, glasses, etc.) , Foods, plants, animals, human body, clothing, daily necessities, medical products containing chemicals and drugs, or articles such as electronic devices (liquid crystal display device, EL display device, television device, or mobile phone), Alternatively, it can be used by being provided on a tag (see FIGS. 17 (E) and 17 (F)) attached to each article.

0201The RF tag 4000 according to one aspect of the present invention is fixed to an article by being attached to or embedded in a surface. For example, if it is a book, it is embedded in paper, and if it is a package made of organic resin, it is embedded inside the organic resin and fixed to each article. Since the RF tag 4000 according to one aspect of the present invention realizes small size, thinness, and light weight, the design of the article itself is not impaired even after being fixed to the article. Further, an authentication function can be provided by providing the RF tag 4000 according to one aspect of the present invention on banknotes, coins, securities, bearer bonds, certificates, etc., and if this authentication function is utilized, Counterfeiting can be prevented. Further, by attaching the RF tag according to one aspect of the present invention to packaging containers, recording media, personal belongings, foods, clothing, daily necessities, electronic devices, etc., the efficiency of systems such as inspection systems can be improved. Can be planned. Further, even in the case of vehicles, the security against theft can be enhanced by attaching the RF tag according to one aspect of the present invention.

0202As described above, by using the RF tag according to one aspect of the present invention for each of the applications listed in the present embodiment, the operating power including writing and reading of information can be reduced, so that the maximum communication distance can be lengthened. Is possible. Further, since the information can be retained for an extremely long period even when the power is cut off, it can be suitably used for applications in which the frequency of writing and reading is low.

0203This embodiment can be implemented in combination with at least a part thereof as appropriate with other embodiments described in the present specification.

<p num="0204">In this example, the result of investigating the desorption of oxygen contained in ruthenium oxide by the thermal desorption analysis (TDS analysis) will be described.</p><p num="0205">The thermal desorption analysis is to obtain the mass spectrum of the desorbed component from the sample for each temperature by mass spectrometry of the gas molecules released while heating the sample with infrared rays in a high vacuum. The background vacuum of the measuring device is 1.33 x 10^-7Pa (10^-9Since it is Torr), it is possible to analyze trace components. In this example, ESCO's EMD-WA1000S was used.</p><p num="0206">In addition, the peak in the curve showing the result of TDS analysis is the peak that appears when the atom or molecule contained in the analyzed sample is released to the outside. The total amount of atoms or molecules released to the outside corresponds to the integrated value of the peak. Therefore, the total amount of atoms or molecules contained in the ruthenium oxide film can be evaluated by the level of the peak intensity.</p><p num="0207">In this example, a ruthenium oxide film was formed on a silicon wafer by a sputtering method. The film formation conditions for ruthenium oxide were an oxygen flow rate of 20 sccm, a pressure in the treatment chamber of 0.4 Pa, 100 W (DC), a target-board distance of 60 mm, and a substrate temperature of 150 ° C. The film thickness of ruthenium oxide was set to 5 conditions of 10 nm, 30 nm, 50 nm, 100 nm, and 200 nm. Here, ruthenium oxide having a thickness of 10 nm is sample A, ruthenium oxide having a thickness of 30 nm is sample B, ruthenium oxide having a thickness of 50 nm is sample C, ruthenium oxide having a thickness of 100 nm is sample D, and ruthenium oxide having a thickness of 200 nm is sample E. To do.</p><p num="0208">Next, the results of TDS analysis on Samples A to E are shown in FIG. FIG. 18 is a graph showing the amount of oxygen molecules released with respect to the substrate temperature.</p><p num="0209">From the TDS analysis results shown in FIG. 18, it was confirmed that oxygen molecules were released even when ruthenium oxide was 10 nm. It was also confirmed that the amount of oxygen molecules released increased as the film thickness of ruthenium oxide increased.</p><p num="0210">From the above results, it was confirmed that ruthenium oxide is a film capable of desorbing oxygen by heating.</p>

0211100 transistors 101 wiring 102 Gate electrode 103 Source electrode 104 Oxide semiconductor 105 drain electrode 106 Gate insulating film 107 Protective insulating film 108 Interlayer insulating film 109 board 110 transistor 111 Conductive 113 Source electrode 113a Conductive 113b Conductive film 115 Drain electrode 115a conductive film 115b conductive film 202 Conductive film 203 Conductive 204 Oxide semiconductor 205 Conductive 209 Interlayer insulating film 211 Conductive film 212 plug 410 transistor 415 Drain electrode 420 transistor 423 Source electrode 430 transistor 440 transistor 446 plug 500 storage device 510 contacts 511 Conductive 512 Capacitor electrode 513 Capacitor electrode 514 Capacitor insulator 515 plug 516 Conductive 520 Memory element 530 transistor 532 Gate electrode 533 Source electrode 533a Conductive 533b conductive film 535 Drain electrode 535a conductive film 535b conductive film 536 Gate insulating film 700 board 701 pixel part 702 scan line drive circuit 703 scan line drive circuit 704 Signal line drive circuit 710 Capacitive wiring 712 Gate wiring 713 Gate wiring 714 drain electrode 716 transistor 717 transistor 718 liquid crystal element 719 Liquid crystal element 720 pixels 721 switching transistor 722 Drive transistor 723 Capacitive element 724 Luminescent element 725 signal line 726 scan line 727 power line 728 Common electrode 901 housing 902 housing 903 Display 904 Display 905 microphone 906 speaker 907 control key 908 stylus 911 chassis 912 housing 913 Display 914 Display 915 Connection 916 Operation key 921 chassis 922 Display 923 keyboard 924 Pointing device 931 housing 932 Refrigerator door 933 Freezer door 941 chassis 942 housing 943 Display 944 Operation key 945 lens 946 Connection 951 car body 952 wheels 953 dashboard 954 Light 2200 transistor 2201 Element separation layer 2202 plug 2205 plug 2207 Insulation layer 2208 Wiring 2210 Wiring 2211 Semiconductor substrate 2212 Insulation layer 2213 Gate electrode 2214 Gate insulating film 2215 Drain area 3001 wiring 3002 wiring 3003 wiring 3004 wiring 3005 wiring 3200 Transistor 3300 transistor 3400 Capacitive element 4000 RF tag