Schottky diode employing recesses for elements of junction barrier array
Abstract
The present disclosure generally relates to a Schottky diode having a substrate, a drift layer provided on the substrate, and a Schottky layer provided above the active region of the substrate. A junction barrier array is provided in the drift layer just below the Schottky layer. The elements of the junction barrier array are generally the doped regions in the drift layer. To increase the depth of these doped regions, individual recesses can be formed on the surface of the drift layer, on which the elements of the junction barrier array are formed. When the recesses are formed in the drift layer, the areas around and at the bottom of the recesses are doped to form the individual elements of the junction barrier array.

Term
6 yearsto projected expiry
Projected expiry 7 September 2032, counted from filing; an application has no term until it is granted.
- Priority
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- Today
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30 claims: 1 independent, 29 dependent
- 1半導体デバイスであって、 アクティブ領域をもつ第1面と、複数の接合障壁エレメント凹部とを有するドリフト層であって、前記ドリフト層は、第1導電型のドーピング材料によりドープされる、ドリフト層と、 ショットキー接合を形成するために前記第1面の前記アクティブ領域の上にあるショットキー層と、 複数の第1のドープされた領域であって、前記複数の接合障壁エレメント凹部のうちの対応するもののあたりで前記ドリフト層の中へと延び、前記複数の第1のドープされた領域は、前記第1導電型とは逆の第2導電型のドーピング材料によりドープされ、前記ドリフト層において前記ショットキー接合の下に接合障壁エレメントのアレイを形成する、複数の第1のドープされた領域と を含む半導体デバイス。
- 2請求項1に記載の半導体デバイスであって、前記複数の接合障壁エレメント凹部のそれぞれは、少なくとも1つの側部と1つの底部とを有し、前記複数の第1のドープされた領域のそれぞれは、前記複数の接合障壁エレメント凹部のうちの対応するものにおける前記少なくとも1つの側部および前記1つの底部のあたりで、前記ドリフト層内へと延びる、半導体デバイス。
- 3請求項1に記載の半導体デバイスであって、前記接合障壁エレメントのアレイにおける接合障壁エレメントは、前記ドリフト層内で互いに分離されている、半導体デバイス。
- 4請求項1に記載の半導体デバイスであって、前記複数の接合障壁エレメント凹部のうちの少なくとも1つのものの深さは少なくとも0.1ミクロンである、半導体デバイス。
- 5請求項4に記載の半導体デバイスであって、前記複数の接合障壁エレメント凹部のうちの少なくとも1つのものの幅は少なくとも0.5ミクロンである、半導体デバイス。
- 6請求項1に記載の半導体デバイスであって、前記複数の接合障壁エレメント凹部のうちの少なくとも1つのものの幅は少なくとも0.5ミクロンである、半導体デバイス。
- 7請求項1に記載の半導体デバイスであって、前記ドリフト層は、エッジ終端領域と更に関連し、前記エッジ終端領域は、前記アクティブ領域と実質的に横方向で隣接し、エッジ終端構造を含む、半導体デバイス。
- 8請求項7に記載の半導体デバイスであって、前記エッジ終端構造は複数のガード・リングを含み、前記ドリフト層の前記第1面は複数のガード・リング凹部を含み、前記複数のガード・リングのうちの少なくとも幾つかは、前記複数のガード・リング凹部のうちの対応するもののあたりで前記ドリフト層の中へと延びる第2のドープされた領域であり、前記第2のドープされた領域は、前記第2導電型のドーピング材料でドープされている、半導体デバイス。
- 9請求項8に記載の半導体デバイスであって、前記複数のガード・リングにおけるガード・リングは前記ドリフト層内で互いに分離されている、半導体デバイス。
- 10請求項7に記載の半導体デバイスであって、前記エッジ終端領域は、前記第1面から前記ドリフト層の中へ延びるエッジ終端凹部を有し、前記エッジ終端構造は、前記エッジ終端凹部の底面に形成される複数のガード・リングを含む、半導体デバイス。
- 11請求項10に記載の半導体デバイスであって、前記エッジ終端凹部の前記底面は複数のガード・リング凹部を含み、前記複数のガード・リングのうちの少なくとも幾つかのものは、前記複数のガード・リング凹部のうちの対応するもののあたりで前記ドリフト層の中へと延びる第2のドープされた領域であり、前記第2のドープされた領域は、前記第2導電型のドーピング材料でドープされている、半導体デバイス。
- 12請求項11に記載の半導体デバイスであって、前記エッジ終端凹部と前記複数のガード・リングとは、実質的に前記アクティブ領域の周りに延びている、半導体デバイス。
- 13請求項10に記載の半導体デバイスであって、凹部ウェルが、前記ドリフト層における前記エッジ終端凹部の前記底面の下に形成され、前記凹部ウェルは、前記第2導電型のドーピング材料によりドープされる、半導体デバイス。
- 14請求項10に記載の半導体デバイスであって、前記アクティブ領域は前記ドリフト層のメサに設けられ、実質的に前記ショットキー層の周りに延びるメサ・ガード・リングを更に含み、前記メサ・ガード・リングは、前記ショットキー層と前記複数のガード・リングとの間にある、半導体デバイス。
- 15請求項14に記載の半導体デバイスであって、前記アクティブ領域の周りの前記ドリフト層の前記第1面はメサ・ガード・リング凹部を含み、前記メサ・ガード・リングは、前記メサ・ガード・リング凹部あたりの前記ドリフト層内へと延びる第2のドープされた領域であり、前記第2のドープされた領域は、前記第2導電型のドーピング材料によりドープされている、半導体デバイス。
- 16請求項1に記載の半導体デバイスであって、前記ショットキー層は、障壁高さを低くできる金属から形成される、半導体デバイス。
- 17請求項16に記載の半導体デバイスであって、前記ショットキー層における障壁高さを低くできる前記金属はタンタルを含む、半導体デバイス。
- 18請求項16に記載の半導体デバイスであって、前記ショットキー層における障壁高さを低くできる前記金属は、チタニウムとクロミウムとアルミニウムとからなるグループのうちの少なくとも1つを含む、半導体デバイス。
- 19請求項16に記載の半導体デバイスであって、前記ショットキー層における障壁高さを低くできる前記金属は本質的にタンタルからなる、半導体デバイス。
- 20請求項1に記載の半導体デバイスであって、前記ショットキー接合は0.9電子ボルト未満の障壁高さを有する、半導体デバイス。
- 21請求項1に記載の半導体デバイスであって、前記ドリフト層は、薄くされた基板の上に形成され、前記基板は、前記ドリフト層が形成された後に薄くされたものであり、カソード接点が、前記薄くされた基板の底面の上に形成される、半導体デバイス。
- 22請求項1に記載の半導体デバイスであって、前記ドリフト層は、主に前記第1導電型のドーピング材料を用いて段階的様式でドープされ、前記ドリフト層は、前記第1面の近くでは低いドーピング濃度を有し、前記第1面とは実質的に反対の側にある第2面の近くでは意図的に高くしたドーピング濃度を有する、半導体デバイス。
- 23請求項1に記載の半導体デバイスであって、前記ドリフト層は炭化けい素を含む、半導体デバイス。
- 24請求項1に記載の半導体デバイスであって、前記ドリフト層と前記ショットキー層とはショットキー・ダイオードの一部である、半導体デバイス。
- 25請求項24に記載の半導体デバイスであって、順方向バイアスされたときに、少なくとも440アンペア/センチメートル 2 のDC電流密度をサポートする、半導体デバイス。
- 26請求項24に記載の半導体デバイスであって、順方向バイアスされたときに、少なくとも500アンペア/センチメートル 2 のDC電流密度をサポートする、半導体デバイス。
- 27請求項24に記載の半導体デバイスであって、逆方向バイアス・アノード-カソード・キャパシタンスに対するDC順方向バイアス電流密度の比率は、少なくとも0.275アンペア/ピコファラッド(A/pF)であり、逆方向バイアス・アノード-カソード電圧は、前記アクティブ領域が本質的に完全に枯渇させられる点へと前記ショットキー・ダイオードが逆方向バイアスされたときに決定される、半導体デバイス。
- 28請求項24に記載の半導体デバイスであって、逆方向バイアス・アノード-カソード・キャパシタンスに対するDC順方向バイアス電流密度の比率は、少なくとも0.3アンペア/ピコファラッド(A/pF)であり、逆方向バイアス・アノード-カソード電圧は、前記アクティブ領域が本質的に完全に枯渇させられる点へと前記ショットキー・ダイオードが逆方向バイアスされたときに決定される、半導体デバイス。
- 29請求項24に記載の半導体デバイスであって、逆方向バイアス・アノード-カソード・キャパシタンスに対するDC順方向バイアス電流密度の比率は、少なくとも0.35アンペア/ピコファラッド(A/pF)であり、逆方向バイアス・アノード-カソード電圧は、前記アクティブ領域が本質的に完全に枯渇させられる点へと前記ショットキー・ダイオードが逆方向バイアスされたときに決定される、半導体デバイス。
- 30請求項1に記載の半導体デバイスであって、前記ドリフト層と前記ショットキー層とは炭化けい素ショットキー・ダイオードの一部である、半導体デバイス。
Independent claims30
59 paragraphs, as filed
Cross-reference of related applications [0001] The present application is submitted at the same time as the present application and the US Utility Patent Application No. entitled "SCHOTTKY DIODE" and the present application is submitted at the same time as "EDGE TERMINATION STRUCTURE EMPLOYING RECESSES FOR EDGE TERMINATION EL". In connection with US Utility Patent Application No. entitled "Edge Termination Structures with Recesses for Edge Termination Elements", this reference incorporates all of these disclosures herein.
Field of disclosure [0002] The present disclosure relates to semiconductor devices.
background [0003] Schottky diodes utilize semiconductor metal junctions, which provide a Schottky barrier and are formed between the metal layer and the doped semiconductor layer. For Schottky diodes having an N-type semiconductor layer, the metal layer acts as an anode and the N-type semiconductor layer acts as a cathode. In general, Schottky diodes act like traditional pn diodes, allowing current to easily pass in the direction of forward bias and blocking current in the direction of reverse bias. The Schottky barriers provided in semiconductor metal junctions offer two unique advantages over pn diodes. First, Schottky barriers are associated with low barrier heights, which correlate with low forward voltage drops. Therefore, a small forward voltage is required to turn on the device, allowing current to flow in the direction of the forward bias. Second, Schottky barriers generally have lower capacitance than comparable pn diodes. Due to the low capacitance, the switching speed is faster than the pn diode. Schottky diodes are multi-carrier devices and do not exhibit minority carrier behavior that causes loss in switching.
Unfortunately, Schottky diodes have traditionally suffered from relatively low reverse bias voltage ratings and high reverse bias leakage currents. In recent years, Cree, Inc. of Durham, NC has introduced a series of Schottky diodes formed from a silicon carbide substrate and an epitaxial layer. These devices have the highest technical standards and continue to advance the highest technical standards by increasing the reverse bias voltage rating, lowering the reverse bias leakage current, and increasing the forward bias current handling. There is. However, there remains a need to further improve the performance of Schottky devices and reduce the cost of those devices.
0005Overview [0001] The present disclosure generally relates to a Schottky diode having a substrate, a drift layer provided on the substrate, and a Schottky layer provided above the active region of the substrate. A junction barrier array is provided in the drift layer just below the Schottky layer. The elements of the junction barrier array are generally the doped regions in the drift layer. To increase the depth of these doped regions, individual recesses can be formed on the surface of the drift layer, on which the elements of the junction barrier array are formed. When the recesses are formed in the drift layer, the areas around and at the bottom of the recesses are doped to form the individual elements of the junction barrier array.
0006The metal for the Schottky layer and the semiconductor material for the drift layer are selected to provide a Schottky junction with a low barrier height between the drift layer and the Schottky layer. In one embodiment, the Schottky layer is formed of tantalum (Ta) and the drift layer is formed of silicon carbide. Therefore, the barrier height of the Schottky joint can be smaller than 0.9 electron volt. Other materials are also suitable for forming Schottky and drift layers.
0007[0003] In another embodiment, the drift layer has a first surface associated with the active region and provides an edge termination region. The edge termination region is substantially flanked by the active region and, in certain embodiments, completely or substantially surrounds the active region. The drift layer is doped with a first conductive type doping material, and the edge termination region can include an edge termination recess extending from the first surface to the drift layer. Edge termination structures, such as some concentric guard rings, can be formed on the bottom surface of the edge termination recess. Doped wells can be formed at the bottom of the edge termination recesses in the drift layer.
0008[0004] In another embodiment, the substrate is relatively thick because an upper epitaxial structure including a drift layer and a Schottky layer is formed on the top surface of the substrate. After all or at least a portion of the upper epitaxial structure has been formed, the bottom of the substrate is removed, effectively "thinning" the substrate. Thus, the resulting Schottky diode has a thinned substrate and the cathode contacts are formed at the bottom of the thinned substrate. Anode contacts are formed on the Schottky layer.
0009[0005] Similar to the elements of the junction barrier array, recesses can be provided in the drift layer just below the guard ring. Mesa guard rings can be provided around all or part of the active region in the drift layer. The elements of the guard ring and the mesa guard ring are generally doped areas in the drift layer. To increase the depth of these doped areas, individual recesses can be formed on the surface of the drift layer, on the surface of the drift layer the elements of the junction barrier array, guard rings, and mesas. A guard ring is formed. When the recess is formed in the drift layer, the area around the recess and at the bottom is doped to form the individual elements, guard ring, and mesa guard ring of the junction barrier array.
0010[0005] The accompanying drawings incorporated and in part in this specification are used to illustrate some of the configurations of the present disclosure and to explain the principles of the present disclosure along with the description.
<figref num="1">FIG. 1 is a cross-sectional view of a Schottky diode according to one embodiment of the present disclosure.</figref><figref num="2">FIG. 2 is a top view of a Schottky diode without a Schottky layer and anode contacts according to one embodiment of the present disclosure.</figref><figref num="3">FIG. 3 is a top view of a Schottky diode without a Schottky layer and anode contacts according to a second embodiment of the present disclosure.</figref><figref num="4">FIG. 4 is a top view of a Schottky diode without a Schottky layer and anode contacts according to a third embodiment of the present disclosure.</figref><figref num="5">FIG. 5 is a top view of a Schottky diode without a Schottky layer and anode contacts according to a fourth embodiment of the present disclosure.</figref><figref num="6">FIG. 6 is a partial cross-sectional view of a Schottky diode with a uniform JB array according to one embodiment of the present disclosure.</figref><figref num="7">FIG. 7 is a partial cross-sectional view of a Schottky diode with a non-uniform JB array according to another embodiment of the present disclosure.</figref><figref num="8">FIG. 8 is a partial cross-sectional view of a Schottky diode with recesses in the drift layer for each of the JB element, guard ring, and mesa guard ring according to one embodiment of the present disclosure.</figref><figref num="9">FIG. 9 is a partial cross-sectional view of a Schottky diode with recesses in the drift layer for each of the JB element, guard ring, and mesa guard ring according to another embodiment of the present disclosure.</figref><figref num="10">10 to 25 show selected process steps for manufacturing a Schottky diode according to the embodiment shown in FIG.</figref><figref num="11">10 to 25 show selected process steps for manufacturing a Schottky diode according to the embodiment shown in FIG.</figref><figref num="12">10 to 25 show selected process steps for manufacturing a Schottky diode according to the embodiment shown in FIG.</figref><figref num="13">10 to 25 show selected process steps for manufacturing a Schottky diode according to the embodiment shown in FIG.</figref><figref num="14">10 to 25 show selected process steps for manufacturing a Schottky diode according to the embodiment shown in FIG.</figref><figref num="15">10 to 25 show selected process steps for manufacturing a Schottky diode according to the embodiment shown in FIG.</figref><figref num="16">10 to 25 show selected process steps for manufacturing a Schottky diode according to the embodiment shown in FIG.</figref><figref num="17">10 to 25 show selected process steps for manufacturing a Schottky diode according to the embodiment shown in FIG.</figref><figref num="18">10 to 25 show selected process steps for manufacturing a Schottky diode according to the embodiment shown in FIG.</figref><figref num="19">10 to 25 show selected process steps for manufacturing a Schottky diode according to the embodiment shown in FIG.</figref><figref num="20">10 to 25 show selected process steps for manufacturing a Schottky diode according to the embodiment shown in FIG.</figref><figref num="21">10 to 25 show selected process steps for manufacturing a Schottky diode according to the embodiment shown in FIG.</figref><figref num="22">10 to 25 show selected process steps for manufacturing a Schottky diode according to the embodiment shown in FIG.</figref><figref num="23">10 to 25 show selected process steps for manufacturing a Schottky diode according to the embodiment shown in FIG.</figref><figref num="24">10 to 25 show selected process steps for manufacturing a Schottky diode according to the embodiment shown in FIG.</figref><figref num="25">10 to 25 show selected process steps for manufacturing a Schottky diode according to the embodiment shown in FIG.</figref>
Detailed explanation [0016] The embodiments described below are information necessary for those skilled in the art to be able to carry out what is disclosed herein, and exemplify the optimum embodiment when carrying out the disclosed ones. .. One of ordinary skill in the art will understand the concepts of what is disclosed herein by reading the following description with reference to the accompanying drawings and will be aware of the applications of those concepts not specifically described here. Let's do it. It should be understood that their concepts and applications are within the scope of the disclosure and claims herein.
[0017] When an element such as a layer, region, or substrate is described as "above" or "extends" directly above "another element", it is "directly above" or "extended" directly above "another element". In some cases, there are elements that intervene between the elements rather than directly. On the other hand, when it is described as "directly above" or "extending to" directly above "another element" with respect to an element, there is no intervening element. Also, regarding an element, when it is described as "connected" or "combined" to another element, it may be directly connected or connected, or there may be an element intervening between the elements. is there. On the other hand, when it is described that an element is "directly connected" or "directly connected" to another element, there is no intervening element.
[0018] Here, relative words such as "bottom", "top", "top", "bottom", "horizontal", "vertical" refer to one element, layer, or region shown in the figure. Used to explain the relationship with another element, layer or region. It will be appreciated that these terms and what has been described above are intended to apply to other orientations of the device in addition to the orientation of the device shown in the figure.
[0019] First, in connection with FIG. 1, an overview of the overall structure of the illustrated Schottky diode 10 is provided. Details of the various structural and functional features of the Schottky diode 10 and an exemplary process of manufacturing the Schottky diode 10 of FIG. 1 are provided after this structural overview. In particular, the embodiments described herein refer to the various semiconductor layers or elements as being doped with an N-type or P-type doping material. Dope with an N-type or P-type material indicates that the layer or element has N-type or P-type conductivity, respectively. The N-type material has a majority equilibrium concentration of negatively charged electrons, and the P-type material has a majority equilibrium concentration of positively charged holes. The doping concentration for the various layers or elements can be defined as a low concentration doping, a normal doping, or a high concentration doping. These terms are relative and are intended to relate the doping concentration for one layer or element to that of another layer or element.
[0020] Further, the following description focuses on using an N-type substrate and drift layer in the Schottky diode 10, but the concept provided here uses a P-type substrate and drift layer. The same can be applied to Schottky diodes. Thus, the doping charge for each layer or element in the disclosed embodiments can be reversed to make Schottky diodes with P-type substrates and drift layers. Moreover, not necessarily deviating from the overview of the present disclosure, any of the layers described herein can be formed from one or more epitaxial layers using any available technique and is not described. Additional layers can be added between those described here.
[0021] As shown, the Schottky diode 10 is formed on the substrate 12 and has an active region 14 within the edge termination region 16, where the edge termination region 16 is completely or substantially. Can enclose the active region 14, but not necessarily. A cathode contact 18 is formed along the bottom side of the substrate 12, which extends below both the active region 14 and the edge termination region 16. A cathode ohmic layer 20 can be provided between the substrate 12 and the cathode contacts 18 to facilitate low impedance coupling between them. The drift layer 22 extends along the upper side of the substrate 12. The drift layer 22, the cathode contact 18, and the cathode ohmic layer 20 can extend along both the active region 14 and the edge termination region 16.
[0022] In the active region 14, the Schottky layer 24 is above the top surface of the drift layer 22 and the anode contacts 26 are above the Schottky layer 24. As shown, a barrier layer 28 is provided between the Schottky layer 24 and the anode contact 26 to prevent material from one of the Schottky layer 24 and the anode contact 26 from diffusing into the other. be able to. In particular, the active region 14 substantially corresponds to the region where the Schottky layer 24 of the Schottky diode 10 is on the drift layer 22. For purposes of illustration only, it is assumed that the substrate 12 and the drift layer 22 are silicon carbide (SiC). Other materials for these and other layers will be described later.
[0023] In the indicated embodiment, the N-type material is doped with a high concentration of substrate 12 and a relatively low concentration of drift layer 22. The drift layer 22 can be doped substantially uniformly or in a stepwise manner. For example, the doping concentration of the drift layer 22 can be varied, from where it is doped to a relatively high concentration near the substrate 12 to near the top surface of the drift layer 22 which is in the immediate vicinity of the Schottky layer 24. It changes to the point where it is doped with a low concentration of. The details of doping will be described later.
[0024] Below the Schottky layer 24, a plurality of bonding barrier (JB) elements 30 are provided along the upper surface of the drift layer 22. These JB elements 30 are formed by doping the selected region of the drift layer 22 with a P-type material. Therefore, each B element 30 extends from the upper surface of the drift layer 22 into the drift layer 22. The JB elements 30 together form a JB array. As shown in FIGS. 2 to 5, the JB element 30 can have various shapes. In the illustration of FIG. 2, each JB element 30 is one elongated stripe, which extends substantially across the active region 14, and the JB array is a plurality of parallel JB elements 30. In FIG. 3, each JB element 30 is a short extending dash, and the JB array has a plurality of sprints aligned linearly and extending across the active region 14 in parallel rows. In FIG. 4, the JB element 30 includes a plurality of elongated stripes (30') and a plurality of islands (30'). As will be further described, the elongated stripes and the islands are substantially the same. Alternatively, they can have substantially different dope concentrations. In FIG. 5, the JB element 30 has an array of small circular islands and a plurality of large rectangular islands evenly distributed with an array of small circular islands. Other shapes and configurations of the JB element 30 and the final JB array formed from the JB element 30 are also understandable to those skilled in the art after reading the disclosure herein.
[0025] FIG. 1 is continuously referred to in relation to FIGS. 2 to 5. The edge termination region 16 includes a recessed channel, which recessed channel is formed on the upper surface of the drift layer 22 and substantially surrounds the active region 14. This recessed channel is called the edge termination recess 32. The presence of the edge termination recess 32 provides a mesa, which is surrounded by the edge termination recess 32 of the drift layer 22. In the selected embodiment, the distance between the surface of the edge termination recess 32 and the bottom surface of the mesa is about 0.2 to 0.5 micron, perhaps about 0.3 micron.
[0026] At least one recess well 34 is formed in a portion of the drift layer 22 below the bottom surface of the edge termination recess 32. The recess well 34 is formed by doping the portion of the drift layer 22 below the bottom surface of the edge termination recess 32 with a P-type material at a low concentration. Therefore, the recess well 34 is a low concentration-doped P-type region in the drift layer 22. A plurality of concentric guard rings 36 are formed along the bottom surface of the edge termination recess 32 and in the recess well 34. The guard ring 36 is formed by doping the corresponding portion of the recess well 34 with a high concentration using a P-type doping material. In the selected embodiment, the guard rings are spaced apart from each other and extend from the bottom surface of the edge termination recess 32 into the recess well 34.
[0027] In addition to the guard ring 36 within the edge termination recess 32, a mesa guard ring 38 can be provided around the outer peripheral edge of the mesa formed by the edge termination recess 32. The mesa guard ring 38 is formed by doping the outer portion of the upper surface of the mesa with a high concentration using a P-type material, and the mesa guard ring 38 is formed on the peripheral edge of the active region 14. It is made to extend into the mesa. Although shown as substantially rectangular in FIGS. 2-5, the edge termination recess 32, the guard ring 36, and the mesa guard ring 38 can be of any shape and are generally of any shape. Corresponding to the shape of the peripheral edge of the active region 14, in the embodiment illustrated here, the peripheral edge of the active region 14 is rectangular. Each of these three elements is continuous or interrupted with (eg for the active region 14 if a dash type, a dot-type) can provide a loop.
[0028] In a first embodiment, FIG. 6 is an enlarged view of a portion of the active region 14 to help identify the various pn junctions that work during the operation of the Schottky diode 10. Use. For this embodiment, the JB element is assumed to be an elongated stripe (as shown in FIG. 2). If the JB element 30 is present, there are at least two types of junctions for the active region 14. The first is called the Schottky junction J1 and is an arbitrary semiconductor metal (ms) junction between the Schottky layer 24 and the portion of the upper surface of the drift layer 22 that does not have the JB element 30. is there. In other words, the Schottky junction J1 is formed between the Schottky layer 24 and the portion of the upper surface of the drift layer between two adjacent JB elements 30 or between the JB element 30 and the mesa guard ring 38 (not shown). It is a joint with the part of. The second is called the JB junction J2, which is an arbitrary pn junction between the JB element 30 and the drift layer 22.
Since the Schottky diode 10 is forward biased, the Schottky junction J1 turns on before the JB junction J2 turns on. At low forward voltages, the current transport in the Schottky diode 10 is dominated by the multiple carriers (electrons) injected across the Schottky junction J1. Therefore, the Schottky diode 10 operates like a traditional Schottky diode. In this configuration, there is little or no minority carrier injection, so there is no minority charge. As a result, the Schottky diode 10 can increase the switching speed at a normal operating voltage.
[0030] When the Schottky diode 10 is reverse biased, the depletion layer region formed near the JB junction J2 expands to block the reverse current through the Schottky diode 10. As a result, the expanded depletion layer region functions to both protect the Schottky junction J1 and limit the reverse leakage current in the Schottky diode 10. With the JB element 30, the Schottky diode 10 behaves like a PIN diode.
[0031] In another embodiment, FIG. 7 is an enlarged view of a portion of the active region 14 used to help identify the various pn junctions that work during the operation of the Schottky diode 10. .. With respect to this embodiment, two types of JB elements 30, here the striped low concentration doped JB element 30'and the island-shaped high concentration doped JB element 30'(shown in FIG. 4). Again, the Schottky junction J1 is the portion of the Schottky layer 24 and the upper surface of the drift layer between two adjacent JB elements 30 or the JB element 30 and the mesa guard ring. Any semiconductor metal junction with the portion between 38 (not shown). The first JB junction J2 is any p between the striped JB element 30'and the drift layer 22. -N junction. The second JB junction J3 is an arbitrary pn junction between the island-shaped JB element 30 "and the drift layer 22. In this embodiment, it is assumed that the striped JB element 30'is doped with the P-shaped material to the same or lower concentration as the island JB element 30'.
[0032] Of the active region 14 occupied by the low concentration-doped JB element 30'and the high concentration doped JB element 30'with respect to the entire surface range of the active region 14 of the Schottky diode 10. The ratio of the surface range can affect both the reverse leakage current and the forward voltage drop of the Schottky diode 10. For example, the low concentration doped JB element 30'and over the entire range of the active region 14. If the region occupied by the highly concentrated JB element 30 "is increased, the reverse leakage current can be reduced, but the forward voltage drop of the Schottky diode 10 can be increased. Therefore, the selection of the ratio of the surface range of the active region 14 occupied by the low concentration JB element 30'and the high concentration JB element 30'is for reverse leakage current and forward voltage drop. With trade-offs between. In some embodiments, The ratio of the surface range of the active region 14 occupied by the low concentration JB element 30'and the high concentration JB element 30'to the entire surface range of the active region 14 is about 2%. Or 40%.
Since the Schottky diode 10 is forward biased beyond the first threshold, the Schottky junction J1 is turned on before the first JB junction J2 and the second JB junction J3. The Schottky diode 10 exhibits traditional Schottky diode behavior at low forward bias voltages. At low forward bias voltages, the operation of the Schottky diode 10 is dominated by injection of multiple carriers over the Schottky junction J1. Since there is no injection of minority carriers under normal operating conditions, the Schottky diode 10 can have the ability to switch very quickly, which is characteristic of common Schottky diodes. ..
As shown, the turn-on voltage for the Schottky junction J1 is lower than the turn-on voltage for the first JB junction J2 and the second JB junction J3. In the low-concentration-doped JB element 30'and the high-concentration-doped JB element 30', the second JB junction J3 conducts when the forward bias voltage continues to increase beyond the second threshold. It can be designed to start. If the forward bias voltage increases beyond the second threshold, such as in the case of a current surge through the Schottky diode 10, the second JB junction J3 Initiate conduction. When the second JB junction J3 initiates conduction, the operation of the Schottky diode 10 is dominated by injection and recombination of minority carriers across the second junction J3. If so, the on-resistance of the Schottky diode 10 is reduced, which can reduce the amount of power dissipated by the Schottky diode 10 for a given current level and also help prevent thermal runaway. Can be.
Under reverse bias conditions, the depletion layer region formed by the first JB junction J2 and the second JB junction J3 expands to block the reverse current through the Schottky diode 10. This protects the Schottky junction J1 and limits the reverse leakage current in the Schottky diode 10. Again, when back-biased, the Schottky diode 10 can function substantially like a PIN diode.
[0036] In particular, the voltage blocking capability of the Schottky diode 10 according to some embodiments of the present invention is determined by the thickness and doping of the low concentration-doped JB element 30'. When a sufficiently large reverse voltage is applied to the Schottky diode 10, the depletion layer region of the low concentration-doped JB element 30'punches through to the depletion layer region associated with the drift layer 22. As a result, a large reverse current can flow through the Schottky diode 10. Since the low concentration-doped JB element 30'is dispersed over the active region 14, this reverse breakdown can be uniformly dispersed and controlled without damaging the Schottky diode 10. .. In essence, the breakdown of the Schottky diode 10 is localized to the punch-through of the low concentration doped JB element 30', whereby the breakdown current is evenly distributed over the active region 14. As a result, the breakdown characteristics of the Schottky diode 10 can be controlled so that a large reverse current is dissipated without damaging or destroying the Schottky diode 10. In some embodiments, the low concentration doped JB element 30'is such that the punch-through voltage is slightly lower than the maximum reverse voltage that can be supported by the edge termination of the Schottky diode 10. , Can be selected.
The design of the edge termination region 16 shown in FIG. 1 further improves both forward and reverse current and voltage characteristics of the Schottky diode 10. In particular, the electric field tends to build around the periphery of the Schottky diode 10, especially when the reverse voltage increases. As the electric field increases, the reverse leakage current increases, the reverse breakdown voltage decreases, and the ability to control the avalanche current when the breakdown voltage is exceeded decreases. Each of these features goes against the need to provide a Schottky diode 10 with low reverse leakage current, high reverse breakdown voltage and controlled avalanche current.
Fortunately, providing a guard ring 36 around the Schottky layer 24 or active region 14 generally tends to reduce the buildup of electric field around the periphery of the Schottky layer 24. In a selected embodiment as shown in FIG. 1, providing the guard ring 36 to the doped recess well 34 at the bottom of the edge termination recess 32 simply causes the guard ring 36 to drift layer 22. It has been proven to reduce the accumulation of their electric fields significantly more than it is provided on the top surface and on the same surface as the surface on which the JB element 30 is provided. The mesa guard ring 38 further suppresses the field. Although not specifically shown, the mesa guard ring 38 is adapted to be wrapped around the edge of the mesa formed in the drift layer 22 and can extend into the edge termination recess 32. In such an embodiment, the mesa guard ring 38 may or may not be combined with another guard ring 36, which is usually distant from each other.
[0039] Therefore, the design of the edge termination region 16 and the JB element 30 plays an important role in determining the forward and reverse current and voltage characteristics of the Schottky diode 10. As will be further described later, the JB element 30, guard ring 36, mesa guard ring 38, and recessed well 34 are formed using ion implantation, in which case the ions of the appropriate doping material drift. It is implanted into the exposed upper surface of layer 22. Applicants can use deeper doping regions to form the JB element 30, guard ring 36, mesa guard ring 38, and even recessed wells 34 to provide excellent electric field suppression for the Schottky diode 10. We have found that it proves to be provided and that the current and voltage characteristics are further improved. Unfortunately, when the drift layer 22 is formed from a material that is somewhat resistant to ion implantation, it is not possible to create a relatively deep doping region that is doped in a relatively uniform and controlled manner. , A challenge.
[0040] With reference to FIG. 8, the drift layer 22 and the Schottky layer 24 of the Schottky diode 10 according to an alternative embodiment are shown. As shown, the JB element 30, guard ring 36, and mesa guard ring 38 are located in the corresponding recess formed in the drift layer 22 and etched onto the top surface of the drift layer 22. In the active region 14, the plurality of JB element recesses 40 and the mesa guard ring 38 are etched into the drift layer 22. In the edge termination region 16, the edge termination recess 32 is etched into the drift layer 22, and then the guard ring recess 42 is etched into the drift layer 22 at the bottom surface of the edge termination recess 32. If desired, the recess well 34 can be formed by selectively doping the edge termination recess 32. Once the JB element recess 40, guard ring recess 42, mesa guard ring recess 44, and edge termination recess 32 are formed, the area along the side of the recess or at the bottom is selectively doped into a cup. A mold or trough JB element 30, a guard ring 36, and a mesa guard ring 38 are formed. By etching the recesses in the drift layer 22, individual ones of the JB element 30, the guard ring 36, and the mesa guard ring 38 can be formed in the drift layer 22 as deeper ones. As mentioned, this is particularly beneficial for SiC devices. The depths and widths of the various JB element recesses 40, guard ring recesses 42, and mesa guard ring recesses 44 may be the same or different. When describing the width of a particular recess, width refers to the narrow lateral dimension of the recess having width, length and depth. In one embodiment, the depth of any recess is at least 0.1 micron and the width of any recess is at least 0.5 micron. In another embodiment, the depth of the recess is at least 1.0 micron and the width of any recess is at least 3.0 microns.
[0041] With reference to FIG. 9, another embodiment is provided, which uses a JB element recess 40, a guard ring recess 42, and a mesa guard ring recess 44. However, in this embodiment, there is no edge termination recess 32, a mesa guard ring recess 44, and a mesa guard ring 38. Instead, the guard ring recess 42 is formed on the same surface as the JB element recess 40, and the JB element 30 and guard ring 36 are formed along the lateral sides of those recesses and at the bottom. In any of the embodiments of FIGS. 7 and 8, the recessed well 34 is optional.
[0042] The above embodiment relates to the Schottky diode 10, but the intended structure and the edge termination region 16 including the structure and design of the recess well 34, the guard ring 36, and the guard ring recess 42. All of the designs are equally applicable to other semiconductor devices that suffer from the effects of harmful fields around the periphery of the active region. Examples of devices that can benefit from the intended structure and design of the edge termination region 16 are all types of field effect transistors (FETs), insulated gate bipolar transistors (IGBTs), and gate turn-off thyristors (GTOs). )including.
Another feature that affects both forward and reverse current and voltage characteristics of the Schottky diode 10 is the barrier height associated with the Schottky junction J1 (FIGS. 6 and 7). Again, the Schottky junction J1 is a semiconductor metal junction between the metal Schottky layer 24 and the semiconductor drift layer 22. When a metal layer such as the Schottky layer 24 is in close proximity to a semiconductor layer such as the drift layer 22, a native potential barrier is created between the two layers. The barrier height associated with the Schottky junction J1 corresponds to the native potential barrier. In the absence of an external voltage, this native potential barrier prevents one layer from one layer to another for most charge carriers, whether electrons or holes. When an external voltage is applied, the native potential barrier effectively increases or decreases when viewed from the semiconductor layer. In particular, the potential barrier does not change when an external voltage is applied when viewed from the metal layer.
[0044] When the Schottky diode 10 having the N-type drift layer 22 is forward biased, the application of a positive voltage at the Schottky layer 24 effectively reduces the native potential barrier, and electrons move from semiconductor to semiconductor. Allow to flow through metal junctions. The size of the native potential barrier, and therefore the height of the barrier, is related to the amount of voltage required to overcome the native potential barrier and allow electrons to flow from the semiconductor layer to the metal layer. In fact, the potential barrier is reduced when the Schottky diode is forward biased. When the Schottky diode 10 is reverse biased, the potential barrier increases significantly and acts to block the flow of electrons.
[0045] The material used to form the Schottky layer 24 will significantly define the barrier height associated with the Schottky junction J1. For many applications, low barrier height is desirable. The low barrier height allows one of the following: First, a device with a small active region 14 and a low barrier height has the same forward turn-on and operating current and voltage ratings as a device with a large active region 14 and a high barrier height. Can be developed. In other words, a device with a small active region 14 and a low barrier height can support the same forward voltage at a given current as a device with a large active region 14 and a high barrier height. Alternatively, if a device with a low barrier height and a device with a high barrier height have an active region 14 of the same size, the device with a low barrier height has the same or similar current as the device with a high barrier height. Can have low forward turn-on and operating voltage while dealing with. The low barrier height also reduces the device's forward-biased on-resistance, which helps to make the device more efficient and to reduce the generation of heat that can harm the device. Become. Examples of metals (including alloys) associated with low barrier heights in shotkey applications with the SiC drift layer 22 are, but are not limited to, tantalum (Ta), titanium (Ti), chromium (Cr), aluminum (Al). In this group, tantalum is associated with the lowest barrier height. The metal is defined as a cable metal with a low barrier height. Barrier height is a function of the metal used for the Schottky layer 24, the metal used for the drift layer 22, and perhaps the range of doping in the drift layer 22, but is an example that can be achieved using certain embodiments. Barrier heights are less than 1.2 electron volt (eV), less than 1.1 eV, less than 1.0 eV, less than 0.9 eV, and less than about 0.8 eV.
[0046] With reference to FIGS. 10 to 24, an exemplary process for manufacturing the Schottky diode 10 as shown in FIG. 1 is provided. In this example, the JB element 30 is assumed to be an elongated stripe, as shown in FIG. Through the process description, we will outline the exemplary materials, doping types, doping levels, structural dimensions, and alternatives selected. These configurations are merely examples, and the concepts and claims disclosed herein are not limited by these configurations.
The process begins with providing an N-type doped single crystal 4H SiC substrate 12, as shown in FIG. The substrate 12 can have various crystalline polytypes such as 2H, 4H, 6H, 3C and the like. The substrate can also be formed from other materials such as gallium nitride (GaN), silicon (Si), germanium (Ge), SiGe and the like. The intrinsic resistance of the N-shaped doped SiC substrate 12 is about 10 mΩ · cm (milliohm centimeters) to 30 mΩ · cm in one embodiment. The initial substrate 12 can have a thickness of 200 to 500 microns.
[0048] As shown in FIG. 11, the drift layer 22 is grown on the substrate 12 and doped in situ. The drift layer 22 is grown and doped with an N-type doping material. In particular, one or more buffer layers (not shown) can be formed on the substrate 12 before the drift layer 22 is formed. The buffer layer can be used as a nucleation layer and can be doped with a material for N-type doping at a relatively high concentration. The buffer layer can be in the range of 0.5 to 5 microns in certain embodiments.
[0049] The drift layer 22 can be doped in whole relatively uniformly, or in whole or in part in stages. For the uniformly doped drift layer 22, the doping concentration is about 2x10.<sup>15</sup>cm<sup>−3</sup>Or 1x10<sup>16</sup>cm<sup>−3</sup>Can be between. In stepwise doping, the doping concentration is highest at the bottom of the drift layer 22 near the substrate 12 and lowest at the top of the drift layer 22 near the Schottky layer 24. Doping concentrations are generally in a gradual decrease or uniform fashion from the bottom position or near the bottom of the drift layer 22 to the top position or near the top. In one embodiment using stepwise doping, the lower part of the drift layer 22 is approximately 1x10.<sup>15</sup>cm<sup>−3</sup>Dope to the concentration of, and the upper part of the drift layer 22 is about 5 × 10.<sup>16</sup>cm<sup>−3</sup>Can be doped to the concentration of. In another embodiment using stepwise doping, the lower part of the drift layer 22 is about 5x10.<sup>15</sup>cm<sup>−3</sup>Dope to the concentration of, and the upper part of the drift layer 22 is about 1 × 10.<sup>16</sup>cm<sup>−3</sup>Can be doped to the concentration of.
[0050] The drift layer 22 is, in the selected embodiment, 4 to 10 microns thick, depending on the desired reverse breakdown voltage. In one embodiment, the drift layer 22 is about 1 micron thick for 100 volts of the desired reverse breakdown voltage. For example, a Schottky diode 10 with a breakdown voltage of 600 volts can have a drift layer 22 with a thickness of about 6 microns.
[0051] When the drift layer 22 is formed, the upper surface is etched to form the edge termination recess 32, as shown in FIG. The edge termination recess 32 varies in depth and width depending on the desired device characteristics. In one embodiment of the Schottky diode 10 having a reverse breakdown voltage of 600 volts and capable of handling a continuous forward current of 50 amps, the edge termination recess 32 is approximately 0.2 to 0.5 micron. It has a depth between and a width between about 10 and 120, which ultimately depends on the number of guard rings 36 used in the device.
[0052] Next, as shown in FIG. 13, the recess well 34 is formed by selectively injecting a P-type material into the bottom portion of the edge termination recess 32 in the drift layer 22. For example, a Schottky diode 10 having a reverse breakdown voltage of 600 volts and capable of handling a continuous forward current of 50 amps is about 5x10.<sup>16</sup>cm<sup>−3</sup>Or 2x10<sup>17</sup>cm<sup>−3</sup>Concentrations between can have recessed wells 34 doped to low concentrations. The recess well 34 can have a depth between about 0.1 and 0.5 microns and has a width substantially corresponding to the width of the edge termination recess 32.
[0053] When the recess well 34 is formed, as shown in FIG. 14, the JB element 30, the mesa guard ring 38, and the guard ring 36 are formed, which form the bottom surface of the edge termination recess 32. It is formed by selectively injecting a P-type material into the corresponding portion of the upper surface of the drift layer 22 including the drift layer 22. The JB element 30, the mesa guard ring 38, and the guard ring 36 are doped at a relatively high concentration and can be formed simultaneously using the same ion implantation process. In one embodiment, a Schottky diode 10 having a reverse breakdown voltage of 600 volts and capable of handling a continuous forward current of 50 amps is about 5x10.<sup>17</sup>cm<sup>−3</sup>Or 5x10<sup>19</sup>cm<sup>−3</sup>It can have a JB element 30, a mesa guard ring 38, and a guard ring 36 doped at a concentration between. In another embodiment, these elements can be doped at different concentrations using the same or different ion implantation processes. For example, the JB array of the JB element 30 may include different shapes and sizes, or different JB elements 30 may have different depths, as shown in FIGS. 4 and 5. In such cases, the depth and the spacing between the adjacent JB elements 30, the spacing between the mesa guard ring 38 and the JB element 30, and the spacing between the adjacent guard rings 36 are the desired devices. It depends on the characteristics. For example, the depth of these elements can range from 0.2 microns to greater than 1.5 microns, and the individual elements can be spaced between about 1 to 4 microns from each other.
[0054] In an embodiment using a JB element recess or mesa guard ring recess 44 or guard ring recess 42, as shown in FIGS. 8 and 9, the JB element 30, mesa guard ring 38, and guard. Each of the rings 36 is more easily formed deep in the drift layer 22. For the drift layer 22 formed of SiC, each recess can be between about 0.1 and 1.0 microns in depth and has a width of about 1.0 to 5.0 microns. Therefore, the overall depth of the JB element 30, the mesa guard ring 38, and the guard ring 36 is measured from the top surface of the drift layer 22 to a depth between 0.5 and 1.5. It can be easily extended.
As shown in FIG. 15, a thermal oxide layer 46 is formed on the upper surface of the drift layer 22 including the bottom surface of the edge termination recess 32. With respect to the SiC drift layer 22, the oxide is silicon dioxide (SiO).<sub>2</sub>). The thermal oxide layer 46 can serve as a passivation layer that assists in the protection or operation of the drift layer 22 and the various elements formed in the drift layer 22. Next, as shown in FIG. 16, a part of the thermal oxide layer 46 associated with the active region 14 is removed to form a Schottky recess 48, in which the Schottky layer 24 is later formed.
When the Schottky recess 48 is formed, as shown in FIG. 17, the Schottky layer 24 is formed on the portion of the drift layer 22 exposed by the Schottky recess 48. The thickness of the Schottky layer 24 varies depending on the properties of the desired device and the metal used to form the Schottky layer 24, but is generally between about 100 and 4500 angstroms. For the 600 V device referenced, the Schottky layer 24 formed of tantalum (Ta) can be between about 200 and 1200 angstroms, and the Schottky layer 24 formed of titanium (Ti) is about 500 or more. It can be between 2500 angstroms, and the Schottky layer 24 made of aluminum (Al) can be between about 3500 and 4500 angstroms. As mentioned above, tantalum (Ta) is associated with very low barrier heights, especially when used in combination with SiC to form Schottky junctions. Also, tantalum is very stable with respect to SiC.
[0057] Depending on the metal used for the Schottky layer 24 and the anode contacts 26 to be made later, one or more barrier layers 28 can be formed on the Schottky layer 24, as shown in FIG. .. The barrier layer 28 can be formed of titanium-tungsten alloy (TiW), titanium-nickel alloy (TiN), tantalum (Ta), and other suitable materials, and in selected embodiments, about 75 to 400 angstroms. Can be a thickness between. The barrier layer 28 helps prevent diffusion between the metal used to form the Schottky layer 24 and the later formed anode contacts 26. In particular, in certain embodiments, the barrier layer 28 is not used, in which case the Schottky layer 24 is tantalum (Ta) and the anode contacts 26 to be made later are made of aluminum (Al). The barrier layer 28 is generally useful in embodiments where the Schottky layer 24 is titanium (Ti) and the anode contacts 26 made later are made of aluminum (Al).
Next, as shown in FIG. 19, the anode contact 26 is formed on the Schottky layer 24 and, if there is a barrier layer 28, on the Schottky layer 24. The anode contact 26 is generally relatively thick and made of metal and acts as a bond pad for the anode of the Schottky diode 10. The anode contact 26 can be formed of aluminum (Al), gold (Au), silver (Ag), or the like.
Next, as shown in FIG. 20, the sealing layer 50 is formed on at least the exposed surface of the thermal oxide layer 46 and the anode contact 26. The sealing layer 50 can be a nitride such as silicon nitride (SiN) and acts as a conformal coating to protect the underlying layer from harmful environmental conditions. For further protection against scratches and similar mechanical damage, the polyimide layer 52 can be provided on top of the sealing layer 50, as shown in FIG. A specific portion of the polyimide layer 52 is removed to form an anode opening 54 on the sealing layer 50. In this example, the polyimide layer 52 is used as an etching mask, which has an anode opening 54 centered on the anode contact 26. Next, as shown in FIG. 22, the portion of the sealing layer 50 exposed by the anode opening 54 is removed to expose the upper surface of the anode contact 26. Finally, a bond wire or the like can be brazed or connected to the upper surface of the anode contact 26 through the anode opening 54 of the sealing layer 50.
[0060] Here, the process is switched from the front surface (upper side) of the Schottky diode 10 to the back surface (lower side) of the Schottky diode 10. As shown in FIG. 23, the substrate 12 is substantially thinned by removing the bottom of the substrate 12 using grinding, etching and similar processes. For the 600 V referenced device, the substrate 12 can be thinned to a thickness of about 50-200 microns in the first embodiment and about 75-125 microns in the second embodiment. it can. By making the substrate 12 thinner, or by using a thinner substrate 12, the overall electrical and thermal resistance between the anode and cathode of the Schottky diode 10 is reduced and the device does not overheat and has a high current. Allows you to work with densities.
Finally, using an ohmic metal such as nickel (Ni), nickel silicate (NiSi), and nickel aluminide (NiAl), the cathode ohmic layer 20 is thinned, as shown in FIG. It is formed on the bottom of the formed substrate 12. In embodiments using the polyimide layer 52, the cathode ohmic layer 20 can be laser annealed instead of baking the entire device at high temperatures to anneal the ohmic metal. Laser annealing allows the ohmic metal to be sufficiently heated for annealing, but does not heat the rest of the device to a temperature that damages or destroys the polyimide layer 52. After forming and annealing the cathode ohmic layer 20, a cathode contact 18 is provided on the cathode ohmic layer 20 as shown in FIG. 25, brazing for the Schottky diode 10 or the like. Provides a face for.
[0062] Using the concepts disclosed herein, it is possible to design a very high performance Schottky diode 10 for various applications requiring various operating parameters. In certain embodiments, the current density associated with the DC forward bias current is 440 amps / centimeter.<sup>2</sup>Can exceed, in other embodiments 500 amps / centimeter<sup>2</sup>Can be exceeded. In addition, the Schottky diode 10 in various embodiments is 0.275, 0.3, 0.325, 0.35, 0.375, and 0.4 amps / picofarad (A / cm).<sup>2</sup>It can be configured to have a ratio of DC forward bias current density to reverse bias anode-cathode capacitance greater than pF). The reverse bias anode-cathode voltage is determined when the Schottky diode is reverse biased to a point where the active region is essentially completely depleted.
Those skilled in the art will recognize improvements and modifications to the embodiments in this disclosure. All such improvements and modifications are believed to be within the scope of the concepts and claims disclosed herein.
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| JP6104250B2 | Japan | B2 | |
| EP2754179B1 | European Patent Office (EPO) | B1 | |
| EP2754180B1 | European Patent Office (EPO) | B1 | |
| CN104025302B | China | B | |
| CN103765598B | China | B | |
| JP6272227B2 | Japan | B2 | |
| TWI620332B | Taiwan Province of China | B | |
| CN108039360A | China | A | |
| KR101984662B1 | Republic of Korea | B1 | |
| KR101984713B1 | Republic of Korea | B1 | |
| CN108039360B | China | B | |
| CN108039360B | China | B |
18 legal events, as the office reported them to INPADOC
Over the term
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|---|---|---|
| Receipt of annual feesJAPANESE INTERMEDIATE CODE: R250R250 | R250 | |
| Receipt of annual feesJAPANESE INTERMEDIATE CODE: R250R250 | R250 | |
| Receipt of annual feesJAPANESE INTERMEDIATE CODE: R250R250 | R250 | |
| Receipt of annual feesJAPANESE INTERMEDIATE CODE: R250R250 | R250 | |
| Written notification of registration of transferJAPANESE INTERMEDIATE CODE: R350R350 | R350 | |
| Written request for registration of change of nameJAPANESE INTERMEDIATE CODE: R313533S533 | S533 | |
| Receipt of annual feesJAPANESE INTERMEDIATE CODE: R250R250 | R250 | |
| Receipt of annual feesJAPANESE INTERMEDIATE CODE: R250R250 | R250 | |
| Certificate of patent or registration of utility modelJAPANESE INTERMEDIATE CODE: R150R150 | R150 | |
| First payment of annual fees (during grant procedure)JAPANESE INTERMEDIATE CODE: A61A61 | A61 | |
| Request for written amendment filedJAPANESE INTERMEDIATE CODE: A523A521 | A521 | |
| Re-examination (zenchi) completed and case transferred to appeal boardAppealJAPANESE INTERMEDIATE CODE: A912A912 | A912 | |
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| Request for written amendment filedJAPANESE INTERMEDIATE CODE: A523A521 | A521 | |
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| Report on retrievalJAPANESE INTERMEDIATE CODE: A971007A977 | A977 |
Numbers
- Publication
- 2014530486
- Application
- 2014529882
Titles2
- Japanese
- 接合障壁アレイのエレメントのための凹部を用いるショットキー・ダイオード
- English
- Schottky diodes with recesses for the elements of the junction barrier array
Classification
- CPC, 5
- H10D8/051
- H10D8/60
- H10D62/106
- H10D62/8325
- H10W72/983
- IPC, 12
- H01L29 861
- H01L29 868
- H01L29 47
- H01L29 872
- H01L21 329
- H01L29 06
- H01L21 265
- H10D8 60
- H10D62 815
- H10D8 50
- H10D62 10
- H10D64 64
Designated states5
- Regional, 4
- Zimbabwe
- Turkmenistan
- Türkiye
- Togo
- National, 1
- Saint Vincent and the Grenadines