Voltage applying system of nanopore type analyzer
Abstract
Problem to be solved.To solve the problem of a conventional nanopore-type analyzer having a field effect transistor in which: the potential difference for passing a sample through a nanopore serves also as a gate voltage for controlling channel current; the downsizing thereof requires a larger gate voltage because the channel current becomes difficult to flow, but the nanopore passing speed of the sample increases to make the detection difficult; and the leak current from a channel also increases.
Solution.An ammeter for minute current allowing variable potential setting so as to control channel current while keeping constant the potential difference for passing a sample through a nanopore is added. Current of a source and drain is read, and leak of the channel current is detected.

Term
6.5 yearsto projected expiry
Projected expiry 28 March 2033, counted from filing; an application has no term until it is granted.
- Priority and filed
- Published
- Today
- Projected expiry
25 claims: 4 independent, 21 dependent
- 11個以上のナノメートルサイズの細孔があいている基板と上記基板を隔てて2区画に分離される、試料導入側の第1の空間と試料流出側の第2の空間、上記空間のそれぞれに満たされる電解質を含んだ溶液、上記基板を隔てて電圧を印加するために設けられた、第1の空間に配置される1個以上の第1の電極と、第2の空間に配置される1個以上の第2の電極と、上記基板上の上記ナノポアの近傍に配置された電界効果トランジスタと、電界効果トランジスタの構成要素であるソースとドレインとチャンネルと、第1の電極と第2の電極とソースとドレインにそれぞれ独立に接地からの電位を設定する電圧源と、第1の電極と第2の電極とソースとドレインに流れる電気信号を検出する電流計と、電流計からの出力を処理し記録するデータ処理記録システムを有するナノポア式分析装置。
- 2請求項1のナノポア式分析装置において、第1の電極と第2の電極の電位差を一定に保ちつつ同時に同量だけ変えてチャンネルを流れる電流を制御する手段を有する、ナノポア式分析装置。
- 3請求項1のナノポア式分析装置において、第1の電極と第2の電極の電位差を一定に保ちつつ、ソースとドレインの電位を変えて、チャンネルを流れる電流を制御する手段を有する、ナノポア式分析装置。
- 4請求項3のナノポア式分析装置において、ソースとドレインの電位を同時に同量だけ変えて、チャンネルを流れる電流を制御する手段を有する、ナノポア式分析装置。
- 5請求項1のナノポア式分析装置において、電界効果トランジスタのチャンネルの両側に形成され、チャンネルを流れる電流を制御するための電圧印加できるコントロールゲートとバックゲートを有する、ナノポア式分析装置。
- 6請求項1のナノポア式分析装置において、電流計は入力電流を計測可能な電圧値に変換する増幅器とアナログデジタル変換器で構成され、増幅器のアナロググランドには、電圧源が接続され、増幅器を介して測定対象物の電位が設定できる、ナノポア式分析装置。
- 7請求項1のナノポア式分析装置において、ソースとドレインに流れる電流から、チャンネルからリークする電流を計測する、ナノポア式分析装置。
- 81個以上のナノメートルサイズの細孔があいている基板と上記基板を隔てて2区画に分離される、試料導入側の第1の空間と試料流出側の第2の空間、上記空間のそれぞれに満たされる電解質を含んだ溶液、上記基板を隔てて電圧を印加するために設けられた、第1の空間に配置される1個以上の第1の電極と、第2の空間に配置される1個以上の第2の電極と、それぞれのナノポアの近傍に配置された電界効果トランジスタと、電界効果トランジスタの構成要素であるソースとドレインとチャンネルと、第1の電極は接地し、第2の電極とソースとドレインにそれぞれ独立に接地からの電位を設定する電圧源と、第2の電極とソースとドレインに流れる電気信号を検出する電流計と、電流計からの出力を処理し記録するデータ処理記録システムを有するナノポア式分析装置。
- 9請求項8のナノポア式分析装置において、1個以上の第2の電極、1個以上の電圧源、1個以上の電流源、がシリコン基板上に形成されている、ナノポア式分析装置。
- 10請求項8のナノポア式分析装置において、第1の電極と第2の電極の電位差を一定に保ちつつ、ソースとドレインの電位を変えて、チャンネルを流れる電流を制御する手段を有する、ナノポア式分析装置。
- 11請求項10のナノポア式分析装置において、ソースとドレインの電位を同時に同量だけ変えて、チャンネルを流れる電流を制御する手段を有する、ナノポア式分析装置。
- 12請求項8のナノポア式分析装置において、電界効果トランジスタのチャンネルの両側に形成され、チャンネルを流れる電流を制御するための電圧印加できるコントロールゲートとバックゲートを有する、ナノポア式分析装置。
- 13請求項8のナノポア式分析装置において、電流計は入力電流を計測可能な電圧値に変換する増幅器とアナログデジタル変換器で構成され、増幅器のアナロググランドには、電圧源が接続され、増幅器を介して測定対象物の電位が設定できる、ナノポア式分析装置。
- 14請求項8のナノポア式分析装置において、ソースとドレインに流れる電流から、チャンネルからリークする電流を計測する、ナノポア式分析装置。
- 151個以上のナノメートルサイズの細孔があいている基板と上記基板を隔てて2区画に分離される、試料導入側の第1の空間と試料流出側の第2の空間、上記空間のそれぞれに満たされる電解質を含んだ溶液、上記基板を隔てて電圧を印加するために設けられた、第1の空間に配置される1個以上の第1の電極と、第2の空間に配置される1個以上の第2の電極と、それぞれのナノポアの近傍に配置された電界効果トランジスタと、電界効果トランジスタの構成要素であるソースとドレインとチャンネルと、第1の電極と第2の電極とドレインにそれぞれ独立に接地からの電位を設定する電圧源と、第1の電極とソースとドレインに流れる電気信号を検出する電流計と、電流計からの出力を処理し記録するデータ処理記録システムを有する、ナノポア式分析装置。
- 16請求項15のナノポア式分析装置において、第1の電極と第2の電極の電位差を一定に保ちつつ同時に同量だけ変えてチャンネルを流れる電流を制御する手段を有する、ナノポア式分析装置。
- 17請求項15のナノポア式分析装置において、電界効果トランジスタのチャンネルの両側に形成され、チャンネルを流れる電流を制御するための電圧印加できるコントロールゲートとバックゲートを有する、ナノポア式分析装置。
- 18請求項15のナノポア式分析装置において、電流計は入力電流を計測可能な電圧値に変換する増幅器とアナログデジタル変換器で構成され、増幅器のアナロググランドには、電圧源が接続され、増幅器を介して測定対象物の電位が設定できる、ナノポア式分析装置。
- 19請求項15のナノポア式分析装置において、ソースとドレインに流れる電流から、チャンネルからリークする電流を計測する、ナノポア式分析装置。
- 201個以上のナノメートルサイズの細孔があいている基板と上記基板を隔てて2区画に分離される、試料導入側の第1の空間と試料流出側の第2の空間、上記空間のそれぞれに満たされる電解質を含んだ溶液、上記基板を隔てて電圧を印加するために設けられた、第1の空間に配置される1個以上の第1の電極と、第2の空間に配置される1個以上の第2の電極と、それぞれのナノポアの近傍に配置された電界効果トランジスタと、電界効果トランジスタの構成要素であるソースとドレインとチャンネルと、第2の電極とソースとドレインにそれぞれ独立に接地からの電位を設定する電圧源と、第1の電極とソースとドレインに流れる電気信号を検出する電流計と、電流計からの出力を処理し記録するデータ処理記録システムを有する、ナノポア式分析装置。
- 21請求項20のナノポア式分析装置において、第1の電極と第2の電極の電位差を一定に保ちつつ、ソースとドレインの電位を変えて、チャンネルを流れる電流を制御する手段を有する、ナノポア式分析装置。
- 22請求項21のナノポア式分析装置において、ソースとドレインの電位を同時に同量だけ変えて、チャンネルを流れる電流を制御する手段を有する、ナノポア式分析装置。
- 23請求項20のナノポア式分析装置において、電界効果トランジスタのチャンネルの両側に形成され、チャンネルを流れる電流を制御するための電圧印加できるコントロールゲートとバックゲートを有する、ナノポア式分析装置。
- 24請求項20のナノポア式分析装置において、電流計は入力電流を計測可能な電圧値に変換する増幅器とアナログデジタル変換器で構成され、増幅器のアナロググランドには、電圧源が接続され、増幅器を介して測定対象物の電位が設定できる、ナノポア式分析装置。
- 25請求項20のナノポア式分析装置において、ソースとドレインに流れる電流から、チャンネルからリークする電流を計測する、ナノポア式分析装置。
Independent claims25
23 paragraphs, as filed
The present invention relates to a voltage application system for a nanopore analyzer. For example, regarding a device that passes a sample of DNA, protein, etc. through nanometer-sized pores (hereinafter referred to as nanopores) and detects and analyzes it with a field-effect transistor near the nanopore, the source and drain of the field-effect transistor and the sample are nanopores. It relates to the electric potential applied to the four electrodes of the cis electrode and the trans electrode, which act as a gate to pass through by electrophoresis.
Development of a method for analyzing high molecular polymers such as DNA and proteins using nanometer-sized pores called nanopores is underway. Opening the nanopores was technically difficult, but was first achieved in the biotechnology field by introducing ion channels into the lipid bilayer. (Non-Patent Document 1: Kasianowicz JJ; Brandin E .; Branton D .; Deamer DW: Proc. Natl. Acad. Sci. USA 1996, 93, 13770-13773) In addition, the measurement method using nanopores is also a biological ion. A method similar to the patch clamp method used for channel measurement was adopted. Next, an attempt was made to open nanopores using a semiconductor process, using an ion beam method (Non-Patent Document 2: Li J .; D. Stein; C. McMullan; D. Branton; MJAziz; JA Golovchenko J. A.) and electron beam methods (Non-Patent Document 3: Storm AJ; JHChen; XSLing; H. Zandbergen; C. Dekker 2003, Nat. Mater. 2, 537 540) have been developed.
As nanopores could be created, methods were developed to analyze macromolecules such as DNA and proteins using nanopores. The following two main techniques are required for nanopore analysis. 1. 1. Detection technology: Detects physical changes as macromolecules pass through nanopores 2. Movement control technology: Moves macromolecules and passes nanopores The detection technology includes a blockade current method, a tunnel current method, a capacitance method, and a field effect transistor method.
The blockade current method is a method for detecting the effect of the polymer partially blocking the opening of the nanopore. (Non-Patent Document 4: D.Fologea; M.Gershow; B.Ledden; DSMcNabb; JAGolovchenko; J.Li; Nano Lett 2005, 5, 10, 1905) It is separated into two, each space is filled with a liquid containing ions, and an electrode is arranged. When a constant voltage is applied to the electrodes, ions move through the nanopores and an electric current flows (ion current). If a charged polymer is present, the polymer is also attracted to one side due to the potential difference and passes through the nanopores. At that time, since the opening of the nanopore is partially closed, it becomes difficult for ions to flow and the magnitude of the ion current decreases. This is a method of analyzing the presence or component of a polymer by detecting this decrease in current value. In addition to the opening area, the difficulty of ion flow is affected by the charged state of the polymer and the interaction with the nanopore wall surface.
In the tunnel current method, when a polymer passes through a nanopore, a tunnel current flows in a small gap between the tunnel current electrode provided near the nanopore and the polymer, and the presence of the polymer is detected by detecting it. It is a method of analyzing components and components. (Non-Patent Document 5: M.Zwolak; MDVentra; Nano Lett 2005, 5, 3, 421) (Non-Patent Document 6: M.Taniguchi; M.Tsutsui; K.Yokota; T.Kawai: Appl Phys Lett 95, 123701) (2009))
In the capacitance method, when a polymer passes through the nanopore, the nanopore is partially blocked, so that the capacitor of the membrane having the nanopore changes, and by detecting this, the presence and composition of the polymer are analyzed. The method. (Non-Patent Document 7: G.Sigalov; J.Comer; G.Timp; A.Aksimentiev: Nano Lett 2008, 8, 1, 56)
The field-effect transistor method is a method in which a field-effect transistor is arranged in the vicinity of the nanopore to detect a change in the electric field that occurs in or near the nanopore when the polymer passes through the nanopore. (Non-Patent Document 8: P.Xie1; Q.Xiong; Y.Fang; Q.Qing; CMLieber: Nature Nanotech. 7, 119-125 (2012), Patent Document 1: US2011 / 0279125A1) The movement control technology includes a potential difference movement method, an enzyme movement method, and a mechanical movement method.
The potential difference transfer method is an electric field of a charged polymer by arranging electrodes in two spaces separated by a membrane having nanopores and applying a voltage to the electrodes, as described in the above-mentioned blocking current method. It is a method of moving according to the gradient of the above, and its advantages are that it can be realized with a simple structure and that no extra addition is applied to the polymer.
The enzyme transfer method is a method in which an enzyme is placed in the vicinity of nanopores and the polymer is transferred by utilizing the reaction between the polymer and the enzyme. For example, when the polymer is single-stranded DNA, there is a method of moving the DNA one base at a time by arranging a DNA polymerase near the nanopore and causing a double-stranded synthesis reaction.
The mechanical movement method is a method in which the polymer is fixed to the beads and the beads are moved with optical tweezers to realize the movement of the polymer.
Therefore, by combining detection technology and movement control technology, analysis of polymer samples using nanopores is realized. Detection technology and movement control technology often work in relation to each other. For example, the first time a polymer was detected using nanopores was a method using a blockade current method as a detection technique and a potential difference transfer method as a movement control technology. In this method, the potential difference generated at both ends of the nanopore acts as an ionic current for detecting the sample and also as an electrophoretic force for moving the sample.
<p><patcit num="1"><text>US2011 / 0279125</text></patcit></p>
<p><nplcit num="1"><text>Kasianowicz JJ; Brandin E .; Branton D .; Deamer DW: Proc. Natl. Acad. Sci. USA 1996, 93, 13770-13773</text></nplcit><nplcit num="2"><text>Li J .; D.Stein; C.McMullan; D.Branton; MJAziz; JA Golovchenko JA</text></nplcit><nplcit num="3"><text>Storm AJ; JHChen; XSLing; H.Zandbergen; C.Dekker 2003, Nat. Mater. 2, 537540</text></nplcit><nplcit num="4"><text>D.Fologea; M.Gershow; B.Ledden; DSMcNabb; JAGolovchenko; J.Li; Nano Lett 2005, 5, 10, 1905</text></nplcit><nplcit num="5"><text>M.Zwolak; MDVentra; Nano Lett 2005, 5, 3, 421</text></nplcit><nplcit num="6"><text>M.Taniguchi; M.Tsutsui; K.Yokota; T.Kawai: Appl Phys Lett 95, 123701 (2009)</text></nplcit><nplcit num="7"><text>G.Sigalov; J.Comer; G.Timp; A.Aksimentiev: Nano Lett 2008, 8, 1, 56</text></nplcit><nplcit num="8"><text>P.Xie1; Q.Xiong; Y.Fang; Q.Qing; CMLieber: Nature Nanotech. 7, 119-125 (2012)</text></nplcit></p>
<p num="0014"> When the field effect transistor method is used as the detection technology and the potential difference movement method is used as the movement control technology, the potential difference applied to the nanopores via the solution acts as the gate voltage of the field effect transistor and moves the sample. Acts as an electrophoretic force of. When the potential difference is increased, the effect of the gate voltage is increased, the channel current is increased, the ratio of signal and noise (SN ratio) is increased, and the detection sensitivity is improved. However, on the other hand, the speed at which the sample passes through the nanopore becomes too high, and when the sample is a polymer, it becomes difficult to detect the components of each molecule, and the spatial resolution of detection is lowered. That is, there is a "trade-off relationship between detection sensitivity and spatial resolution" in the potential difference applied to the nanopore via the solution. In addition, if the speed is too high, the sample is more likely to clog the nanopores.</p><p num="0015"> Hereinafter, an example will be described in detail. FIG. 1 shows the configuration of the nanopore substrate in the conventional method and the chamber in which the nanopore substrate is arranged. The chamber 101 is composed of two sealed spaces 104 and 105 separated by a nanopore substrate 103 having a nanopore 102 and is filled with liquids 106 and 107. The liquids 106 and 107 are aqueous solutions containing a large amount of the electrolyte 108 that bears the electric charge, and the liquid 106 further contains a small amount of the sample 109 to be analyzed. When a potential difference is applied to the cis electrode 110 and the transformer electrode 111 arranged on both sides of the nanopore, the electrolyte 108 and the charged sample 109 move through the nanopore 102. The cis electrode 110 is connected to 0V at the ground 112 in order to realize a stable potential, and the transformer electrode 111 has a potential set by the transformer voltage source 113, and a potential difference is given to both openings of the nanopores. .. The change in the current value when the sample 109 is present in the nanopore 102 and when it is not present is measured by the cis ammeter 114, and the components of the sample 109 are analyzed.</p><p num="0016"> A field effect transistor 118 having a channel 117 is arranged between the source 115 and the drain 116 in the vicinity of the nanopore 102, and a general source grounded circuit in which the source 115 is grounded is formed. The difference between the potential near channel 117 and the potential of channel 117 caused by the potential difference between the cis electrode 110 and the transformer electrode 111 acts as a gate voltage, and by setting the potential on the drain 116 using the drain voltage source 119, the source 115 Current flows from the channel 116 to the drain 115 (hereinafter referred to as channel current) (Non-Patent Document 8: P.Xie1; Q.Xiong; Y.Fang; Q.Qing; CMLieber: Nature Nanotech. 7, 119-125 (2012)).</p><p num="0017"> The component analysis of the sample 109 by the field effect transistor 118 is performed as follows. When the charged sample 109 passes through the nanopore 102, the electric field in the vicinity of the channel 222 changes, and the amount of change in the channel current accompanying the change is detected by the source ammeter 120. Since the amount of change differs for each component of the sample, the sample 109 can be analyzed.</p><p num="0018"> Generally, when a sample is a polymer, for example, when a plurality of bases such as DNA are connected to form a chain structure, it is necessary to identify the type of each base, and the sensor unit for detecting the sample is used. Detection sensitivity for identifying the type of base and spatial resolution for detecting adjacent bases separately are required.</p><p num="0019"> It was found that the conventional method causes the following problems. When detecting single-stranded DNA or double-stranded DNA, the distance between bases is about 0.3 nm to 0.7 nm, so extremely high spatial resolution is required, and the sensor unit must be miniaturized. However, in the field effect transistor 118, if the channel 117, which is a sensor unit, is miniaturized, it becomes difficult for the channel current to flow. Therefore, it is necessary to increase the gate voltage in order to pass a channel current having an SN ratio sufficient for detection. In the conventional method, when the field effect transistor 118 is N-type, the potential of the transformer electrode 114 is larger than the potential of channel 117, and when it is P-type, the potential of the transformer electrode 114 is smaller than the potential of channel 117, and the solution 107 is used. The gate voltage was applied through.</p><p num="0020"> If it is a normal field effect transistor, there is no problem in increasing the gate voltage and securing the channel current. However, in the conventional device, the transformer electrode that controls the gate voltage has another function of passing the sample 109 through the nanopore 102 by utilizing the potential difference between the cis electrode 113 and the cis electrode 113, which causes the following problems. It was. When the potential of the transformer electrode 114 is increased (N type) or decreased (P type), the potential difference between the cis electrode 113 and the transformer electrode 114, which is the driving force for passing the sample 109 through the nanopore 102, also increases. The speed at which the sample 109 passes through the nanopore 102 becomes very high, which makes detection difficult. That is, in the configuration of FIG. 1, the potential of the transformer electrode 114 considers a trade-off between the function of increasing the channel current to improve the detection sensitivity and the function of controlling the nanopore passing speed of the sample 109 to maintain the spatial resolution. Must be set.</p><p num="0021"> As a general measure to solve this problem, if the nanopore passing speed of the sample 109 increases, it is conceivable to increase the sampling speed for detection. However, in reality, it is difficult to realize. This is because the channel current is several pA to several μA and cannot be detected unless it is amplified by an amplifier having a large amplification degree, but generally, when the amplification degree becomes large, it cannot follow a fast response.</p><p num="0022"> It was also found that another issue described below arises. Normally, the ionic current flowing between the cis electrode 113 and the transformer electrode 114 via the nanopore 102 and the channel current flowing through the field effect transistor 118 are insulated by the insulating layers 121 and 122. However, in the conventional configuration, there is a high possibility that the insulation will be destroyed. This is because when the field effect transistor 118 is miniaturized, it becomes difficult for the channel current to flow. Therefore, a method of changing the potential of the transformer electrode 111 and applying a gate voltage to secure the channel current is adopted. However, the transformer electrode 111 and the source are used. The potential difference between 115 became large and there was a possibility of current leakage. If current leaks, accurate measurement becomes difficult.</p><p num="0023"> Summarize the issues of the conventional method. When the potential difference between the electrode 114 and the channel is increased, the first problem is that there is a trade-off relationship between the detection sensitivity and the spatial resolution, and the second problem is that leakage current is generated and the detection accuracy is lowered. Can be mentioned.</p>
<p num="0024"> As a solution to the first problem, the potential difference between the cis electrode and the transformer electrode is kept constant, and the potentials of the cis electrode and the transformer electrode are changed by the same amount at the same time, or the potentials of the source side and the drain side are changed by the same amount at the same time. change.</p><p num="0025"> As a solution to the second problem, the currents flowing through the source and the drain are detected, respectively, and it is confirmed that the current flows from the drain side to the source side through the channel and there is no leakage of the current. If there is a current leak, the field effect transistor is judged to be defective and will not be used.</p><p num="0026"> Further, the solutions of the first and second problems described above are combined to solve both problems at the same time.</p>
<p num="0027"> According to the present invention, it is possible to improve the detection sensitivity and the spatial resolution of detection in the field-effect transistor in the vicinity of the nanopore at the same time, to reduce the size of the field-effect transistor, and to analyze a small sample with high accuracy.</p><p num="0028"> Further, it can be detected that a current is surely flowing in the channel of the field effect transistor, and the quality of the detection performance can be ensured.</p>
<figref num="1">It is a figure which shows the nanopore type analyzer with the electric field effect transistor of the conventional type.</figref><figref num="2">It is a figure which shows the connection relationship of an ammeter and a voltage source when the channel current is controlled by the potential of a cis electrode and a transformer electrode in the nanopore with a field effect transistor of an Example.</figref><figref num="3">It is a figure which shows the relationship between the gate voltage and the channel current in the field effect transistor of an Example.</figref><figref num="4">It is a figure which shows the ammeter of an Example.</figref><figref num="5">It is a figure which showed the connection relationship of an ammeter and a voltage source when the channel current is controlled by the potential of a cis electrode and a transformer electrode in the nanopore with a parallel field effect transistor in an Example.</figref><figref num="6">It is a figure which showed the connection relationship of an ammeter and a voltage source when the channel current is controlled by the potential of a cis electrode and a transformer electrode in the nanopore with a parallel field effect transistor in an Example.</figref><figref num="7">It is a figure which shows the connection relationship of an ammeter and a voltage source when the channel current is controlled by the potential of a source and drain in the nanopore with a field effect transistor of an Example.</figref><figref num="8">It is a figure which showed the connection relationship of an ammeter and a voltage source at the time of controlling a channel current by a potential of a source and a drain in a nanopore with a parallel field effect transistor in an Example.</figref><figref num="9">It is a figure which showed the connection relationship of an ammeter and a voltage source at the time of controlling a channel current by a potential of a source and a drain in a nanopore with a parallel field effect transistor in an Example.</figref><figref num="10">It is a figure which showed the connection relationship of an ammeter and a voltage source at the time of controlling a channel current by a potential of a source and a drain in a nanopore with a parallel field effect transistor in an Example.</figref><figref num="11">It is a figure which shows the connection relationship of an ammeter and a voltage source at the time of confirming the leakage of a channel current in the nanopore with a field effect transistor of an Example.</figref><figref num="12">It is a figure which showed the procedure which confirmed the leak current of the channel of an Example.</figref><figref num="13">It is a figure which shows the connection relationship of an ammeter and a voltage source at the time of confirming the leakage of a channel current in the nanopore with a field effect transistor of an Example.</figref><figref num="14">It is a figure which showed the procedure which confirmed the leak current of the channel of an Example.</figref><figref num="15">It is a figure which showed the system configuration which confirms the leakage current of the channel of an Example.</figref><figref num="16">It is a figure which showed the system configuration which confirms the leakage current of the channel of an Example.</figref><figref num="17">It is a figure which shows the connection relationship of an ammeter and a voltage source when the channel current is controlled by the potential of a cis electrode and a transformer electrode in the nanopore with a field effect transistor which has a control gate of an Example.</figref><figref num="18">It is a figure which shows the connection relationship of the ammeter and the voltage source when the channel current is controlled by the potential of a source and drain in the nanopore with a field effect transistor which has a control gate of an Example.</figref><figref num="19">It is a figure which shows the connection relationship of the ammeter and the voltage source at the time of controlling a channel current by a potential of a source and a drain in a nanopore with a field effect transistor which has a parallel control gate of an Example.</figref>
Hereinafter, the details of the examples of the present invention will be described with reference to the drawings.
<p> An embodiment of the present invention for solving the first problem "trade-off between detection sensitivity and spatial resolution" is shown below.</p><p> FIG. 2 shows the configuration of the nanopore substrate of this embodiment and the chamber in which the nanopore substrate is arranged. Chamber 201 is composed of two sealed spaces 204 and 205 separated by a nanopore substrate 203 having nanopores 202 and is filled with liquids 206 and 207. The liquid 206 is composed of an aqueous solution containing a large amount of electrolyte 208, which is a carrier of electric charge, and a small amount of sample 209 to be analyzed, and the liquid 207 is composed of an aqueous solution containing an electrolyte 208. As the electrolyte 212, one that is easily ionized, such as an aqueous potassium chloride solution having a concentration of 1 mM to 1 M, is used. As the sample 209, a sample having an electric charge in an aqueous solution is used. For example, macromolecules such as single-strand DNA and double-strand DNA having a negative charge can be mentioned. A buffer solution is added so that the sample 209 can stably exist in the aqueous solution. For example, Tris / Tris-HCl (10 mM) + EDTA (1 mM) is used. In the case of single-strand DNA, a denaturing agent such as urea is added to prevent hybridization between its own bases.</p><p> The charged sample 209 is moved from space 204 to space 205 through the nanopore 202 by electrophoresis. In order to perform electrophoresis, a cis electrode 210 and a transformer electrode 211 are arranged in spaces 204 and 205 on both sides, and a potential difference is given to both electrodes. As the cis electrode 210 and the transformer electrode 211, a silver chloride electrode, a platinum electrode, or the like is used. When the sample 209 has a negative charge, the potential of the cis electrode 210 is smaller than the potential of the transformer electrode 211, and when the sample 209 has a positive charge, the potential of the cis electrode 210 is made larger than the potential of the transformer electrode 211. Typically, when the sample is a single-strand DNA consisting of 1,000 bases, it will pass through the nanopore 202 in about 1 ms when a potential difference of 0.1 V is applied. The passing speed is 1 μs per base. Since the speed at which the sample passes through the nanopore increases in approximately proportion to the potential difference, if the potential difference is too large, the speed will be too large and detection will be difficult. On the contrary, if the potential difference is too small, the sample 209 cannot enter the nanopore 202 due to the influence of vibration due to heat and entropy due to diffusion.</p><p> The cis side voltage source 212 and the transformer side voltage source 213 are connected to the cis electrode 210 and the transformer electrode 211 to give a potential to the ground 214. The cis-side voltage source 212 and the transformer-side voltage source 213 are variable DC voltage sources. As the DC voltage source, a battery or a structure in which an AC voltage is rectified and stabilized by a regulator is used.</p><p> A cis side ammeter 215 for measuring the current (ion current) due to the electrolyte passing through the nanopore 202 is connected to the cis electrode 210. The ammeter for measuring the ion current may be installed on the transformer electrode 211 instead of the cis electrode 210, or may be installed on both the cis electrode 210 and the transformer electrode 211, respectively. Since the value of the ion current is from several hundred pA to several tens of nA, a low noise preamplifier is required to measure the current, and a current-voltage conversion type amplifier is used. The sample is mainly detected by the field effect transistor described later, but the cis side ammeter 215 also detects the sample from the change in the ion current and improves the reliability of the detection by simultaneous measurement. Further, the clogging of the nanopore 202 is easier to detect by the ion current.</p><p> The configuration of the nanopore substrate 203 will be described below. An insulating layer 217 having a diameter of 20 to 40 nm, a field effect transistor 218, and an insulating layer 219 having a diameter of 20 to 40 nm are laminated on the silicon substrate 216. Silicon oxide, silicon nitride, or both are laminated as the material of the insulating layer. The surface in contact with the solutions 206 and 207 is preferably made of high-density silicon nitride in order to prevent the permeation of hydrogen ions and the like. The field effect transistor 218 has a source 220, a drain 221 and a channel 222 on the surface of the nanopore substrate 203, and the source 220 and the drain 221 are connected to the channel 222. The source 220, drain 221 and channel 222 are each formed by laminating polysilicon and doped with phosphorus or boron so that an electric current can pass through. When phosphorus is doped, it becomes an N-type field effect transistor in which electrons become carriers, and when boron is doped, it becomes a P-type field effect transistor in which holes become carriers. Nanopore 202 is formed in the vicinity of channel 222. The nanopore 202 is formed by converging an electron beam with a transmission electron microscope. Alternatively, a focused ion beam processing observation device may be used. The size of the nanopore 202 is 10 nm or less. When single-strand DNA is detected as sample 209, it is formed to have a diameter of about 2 nm so that double-strand DNA having a diameter of about 2.5 nm cannot pass through the nanopore 202. The nanopore 202 is formed at a position in contact with the channel 222. Alternatively, the position may be about 1 nm to 30 nm away from the channel, or nanopores may be formed on the channel.</p><p> The thickness of the channel 222 is preferably as thin as 10 nm or less, preferably 2 nm or less, and more preferably about 0.5 nm. This is because the single-strand DNA, which is one of the objects of the sample 209, is a polymer in which different types of base molecules are connected at intervals of 0.3 nm to 0.7 nm, and in order to identify the type for each base, This is because the channel 222 is made as thin as possible in the FET operation. The width of the channel 222 is about 22 nm to 50 nm, which can be formed by a general semiconductor process. Alternatively, the channel 222 may be formed of silicon nanowires, carbon nanotubes, graphene, or the like.</p><p> A drain voltage source 223 is connected to the drain 221 to give a potential difference from the source 220, and a source ammeter 224 connected to the source 220 is used to measure the channel current flowing from the drain 221 through the channel 222 to the source 220. .. When the sample 209 passes through the nanopore 202, the change in the electric field in the nanopore 202 affects the channel 222 and the channel current changes. The cause of the electric field change is the influence of the electric charge of the sample 209 or the influence of the change of the effective cross-sectional area of the nanopore 202 containing the sample 209. Since the amount of change in the electric field differs depending on the component of the sample 209 and the amount of change in the channel current accompanying it also differs, the component of the sample 209 can be identified by detecting the amount of change in the channel current with the source ammeter 224. .. The ammeter that measures the channel current may be connected to the drain 221 instead of the source 220, or may be on both sides of the source 220 and the drain 221.</p><p> The drain voltage source 223 uses a variable DC voltage source. A battery or a voltage source having a structure that rectifies an AC voltage and stabilizes it with a regulator is used, and a variable voltage is output by dividing the voltage of a resistor or a variable resistor. Since the value of the channel current is several tens of pA to several tens of μA, a low noise preamplifier is required for the source ammeter 224, and a current-voltage conversion type amplifier is used.</p><p> The voltage applied by the cis electrode 210 and the transformer electrode 211 arranged for electrophoresis of the sample 209 also acts as a gate voltage to the field effect transistor 218. When a potential difference is applied between the cis electrode 210 or the transformer electrode 211 and the channel 222, an electric field is generated around the channel, electrons and holes easily flow into the channel 222, and the channel current can be controlled. The potential in the vicinity of the channel 222 generated in the nanopore by the potentials of the cis electrode 210 and the transformer electrode 211 is approximately the midpoint of the potentials of the cis electrode 210 and the transformer electrode 211. The potential in the vicinity of channel 222 depends on the concentration of electrolytes in solutions 206 and 207 that fill both spaces 204 and 205, so it may deviate slightly from the midpoint. The potential of the channel 222 is approximately the midpoint between the potentials of the drain 221 and the source 220. Then, the potential difference between the potential in the vicinity of channel 222 and the potential of channel 222 becomes the gate voltage. Therefore, the channel current can be controlled by controlling the potential in the vicinity of the channel 222 with the potentials of the cis electrode 210 and the transformer electrode 211. In FIG. 2 of this embodiment, since both the cis electrode 210 and the transformer electrode 211 are variable, the potential difference between the cis electrode 210 and the transformer 211 electrode is kept constant, and the speed at which the sample 209 passes through the nanopore 202 is kept constant. The channel current can be controlled by changing the potentials of the cis electrode 210 and the transformer 211 electrode by the same amount and controlling the potential difference from the potential of the channel 222.</p><p> Next, a specific example regarding the potential of each electrode will be shown. The channel will be described as an N type. When the potential Vcis of the cis voltage source 212 is 1 V, the potential Vtrans of the transformer voltage source 213 is 1.2 V, the potential Vs of the source is 0 V (grounded), and the potential Vd of the drain voltage source 223 is 0.2 V, the cis electrode 210 The potential difference generated between the transformer electrode 211 and the transformer electrode 211 is the difference between Vcis and Vtrans, which is 0.2 V, and this potential difference becomes the driving force for electrophoresis through the nanopore 202. The potential of the channel 222 is 0.1 V, which is an intermediate value between the potentials of the source 220 and the drain 221. The potential near the channel 222 is 1.1 V, which is an intermediate value between the potentials of the cis electrode 210 and the transformer electrode 211. Then, the electric potential generated by the gate voltage corresponding to 1V, which is the difference between 1.1V and 0.1V, acts on the channel 222.</p><p> It is necessary to pass a current in the subthreshold region through the channel 222 as described in FIG. 3 described later. However, since there are individual differences in the devices, an appropriate channel current may flow when the gate voltage is 1 V. In some cases, the channel current does not flow, or the channel current flows too much and exceeds the subthreshold region to reach the saturation region.</p><p> When the channel current does not flow, the gate voltage can be increased by + 0.1V to 1.1V by setting Vcis to 1.1V and Vtrans to 1.3V while maintaining the potential difference of 0.2V between Vcis and Vtrans. , The current can be made easier to flow through the N-type channel. If it still does not flow, similarly, while maintaining the potential difference of 0.2 V between Vcis and Vtrans, the respective potentials may be increased by the same amount.</p><p> When the current exceeds the subthreshold region, similarly, the potentials of Vcis and Vtrans may be lowered by the same amount while maintaining the potential difference of 0.2V.</p><p> The appropriate value for the potential difference between Vcis and Vtrans is 0.2V to 0.5V. If the potential difference is large, the speed at which the sample 209 passes through the nanopore 202 increases, making measurement difficult. It also increases the likelihood that the nanopore 202 will be clogged with sample 209. If it is completely clogged, it cannot be measured. Even in a partially clogged state, the baseline of the ion current becomes unstable, making measurement difficult. The baseline here means the ion current when the sample 209 does not pass through the nanopore 202.</p><p> On the contrary, if the potential difference is too small, the sample 209 cannot pass through the nanopore 202. Therefore, the range of the potential difference between Vcis and Vtrans is limited.</p><p> As a supplement, when the concentrations of the electrolyte 208 of the solution 206 on the cis side and the solution 207 on the transformer side are equalized, the potential near the channel 222 becomes an intermediate value between the potentials of the cis electrode 210 and the transformer electrode 211, and the concentration difference. If is added, it deviates slightly from the intermediate value. However, since the sample 209 is identified by the amount of change in the channel current when the sample 209 passes through the nanopore 202, the influence of not being in the middle of the potential is small.</p><p> A comparison between the present embodiment of FIG. 2 and the conventional method of FIG. 1 will be described below. In the conventional method, since the cis electrode 110 is grounded, in order to make the potential difference between Vtrans and Vcis 0.2V as in this embodiment, Vtrans must have a potential of 0.2V. In that case, the potential relationship is 0V for Vcis, 0.2V for Vtrans, 0V for Vs, 0.2V for Vd, the gate voltage is 0V, and no electric field acts.</p><p> Therefore, it is necessary to control the gate voltage in order to pass a current in the subthreshold region to channel 117, but since Vcis is grounded, only Vtrans can be changed. When Vtrans is changed, the potential difference between Vtrans and Vcis also changes, and the speed at which the sample 109 passes through the nanopore 102 increases. For example, if the Vtrans is changed so that the gate voltage becomes 1V as in this embodiment, the Vtrans must be 2.2V. Then, the potential difference between Vtrans and Vcis becomes 2.2 V, and the speed at which the sample 109 passes through the nanopore 102 becomes 11 times. The potential of the source 115 is 0V, the potential voltage of the transformer electrode 111 is 2.2V, the potential difference is 2.2V, and the insulation of the insulating layer 121 between the source 115 and the transformer electrode 111 may be broken. It gets higher. In this embodiment, the potential difference between the source 215 and the transformer electrode 211 is 1.2 V, so that the value of the conventional method is about twice as large.</p><p> In this embodiment, when the channel 222 is P-type, the carrier is a hole, so that the gate voltage is negative, that is, the potential near the channel 222 is smaller than the potential of the channel 222. Set the potentials of Vcis and Vtrans. A specific example is shown below. When Vcis is -1.2V, Vtrans is -1.0V, Vs is 0V, and Vd is -0.2V, the potential difference 0.2V generated between the cis electrode 210 and the transformer electrode 211 is the driving force for electrophoresis. Become. Further, the potential of the channel 222 is 0.1 V, which is an intermediate value between the potentials of the source 215 and the drain 216, and the potential near the channel 222 is an intermediate value of the potentials of the cis electrode 210 and the transformer electrode 211 -1. It becomes .1V, and the electric potential generated by the gate voltage corresponding to -1V, which is the difference between -1.1V and -0.1V, acts on the channel 222. Then, the channel current is measured by the source ammeter 224, and the current in the subthreshold region is optimized by changing it by the same amount while maintaining the potential difference between Vcis and Vtrans.</p><p> In this embodiment, the sample 209 is introduced into the space 206 on the side where the silicon substrate 216 is located, the cis electrode 210 is arranged, and the transformer electrode 211 is arranged on the opposite side. However, the sample 209, the cis electrode 210, and the transformer electrode 211 are arranged. May be the other way around.</p><p> In this embodiment, the cis-side voltage source 212, the cis-side ammeter 215, the transformer-side voltage source 213, the drain-side voltage source 223, and the source-side ammeter 224 may be formed on the silicon substrate 216.</p><p> FIG. 3 describes the importance of controlling the channel current in this embodiment. The sample is identified by the amount of change in the channel current when the sample does not exist in the nanopore and when it exists, but the accuracy of identification differs depending on the value of the channel current before the change. As shown in FIG. 3, the device of this embodiment shows the characteristics of a general field effect transistor, and when the gate voltage is increased, it transitions to the subthreshold region 301, the saturation region 302, and the linear region 303. In each region, the state of channel current increase when the gate voltage increases is different, and it increases exponentially in the subthreshold region, quadraticly in the saturation region, and linearly in the linear region. In this example, since the charge of the sample is very small, the change in the electric field is also very small. Therefore, the subthreshold region is used to detect exponential changes in channel current with respect to changes in electric field. For that purpose, it is necessary to control the gate voltage so that the channel current flows in the subthreshold region before measuring the sample. Since the relationship between the gate voltage and the channel current of each transistor is slightly different, it is desirable to control the gate voltage of each transistor.</p><p> FIG. 4 shows a circuit diagram of a system that changes the potential and measures the current with the cis electrode in this embodiment.</p><p> In the conventional method, the cis electrode is connected to the ground to be 0 V, but in this embodiment, in order to control the gate voltage, it is necessary to change the potential of the cis electrode 402 at the cis side voltage source 401. Further, it is necessary to measure the ion current flowing through the cis electrode with the cis side ammeter 402 as in the conventional method. The ion current may be measured by only one of the cis electrode 402 and the transformer electrode 404. Moreover, you may measure with both.</p><p> The cis-side voltage source 401 that outputs the variable potential Vcis is connected to the + terminal of the operational amplifier 406 in the current-voltage conversion type amplifier 405. Then, since the terminal of the operational amplifier 406 has the same potential as the + terminal, the potential of the cis electrode becomes Vcis. The transformer side power supply 407 that outputs the variable potential Vtrans is connected to the transformer electrode 404. The ionic current flows between the cis electrode and the transformer electrode through the aqueous electrolyte solutions 409, 410 and nanopore 411 in the space according to the potential difference between Vcis and Vtrans, flows into the amplifier 405, and changes from current to voltage via the feedback resistor 412. It is converted and output as an analog voltage. Next, the voltage output from the amplifier and the analog ground 413 are converted from analog values to digital values by the differential input analog-to-digital converter (AD converter) 414, and the digital values are converted to the data processing recording system 415. It is captured.</p><p> Since the flowing ion current is several hundred pA to several nA, a feedback resistor 412 having a resistance value of 1 MΩ to 1 GΩ is used. Further, since the response speed of the amplifier 405 may vary due to the influence of the stray capacitance, a capacitance may be provided in parallel with the feedback resistor 412 to specify the response speed.</p><p> Instead of the differential input AD converter 414, even if the input potential difference is converted to the potential from the ground using a differential amplifier or instrumentation amplifier, and then converted to a digital value with a single-ended input AD converter. good.</p><p> Vtrans and Vcis are variable, and when a sample is placed on the cis side, Vtrans> Vcis if the sample has a negative charge such as DNA, and Vtrans <Vcis if the sample has a positive charge. Further, the gate voltage is controlled by raising or lowering both potentials by the same amount while maintaining the potential difference between Vtrans and Vcis.</p><p> Further, the reference voltage of the analog ground 413 is also Vcis, and the positive power supply 416 and the negative power supply 417 of the operational amplifier supply power to the operational amplifier 406 with reference to the analog ground 413. By doing so, the operational amplifier 406 can fully utilize the power supplied by the positive power supply and the negative power supply, and the dynamic range of the output can be minimized by the power supply.</p><p> The amplifier 405 and the AD converter 414 used in the embodiment of FIG. 4 have a limited response speed, and it is necessary to examine whether the response speed is sufficient for the speed at which the sample passes through the nanopore.</p><p> For example, as shown in the specific example of FIG. 2, when the potential difference between the cis electrode and the trans electrode is 0.2 V, the negatively charged double-strand DNA having a length of 1 kbp has a nanopore having a diameter of 5 to 10 nm of about 0. It passes in 5 ms and reaches a rate of 0.5 μs per base. The AD converter 414 has a sampling rate specification, and when sampling 20 points per base, a sampling rate of 40 MHz or more is used. The amplifier 412 also has a limited response speed. The amount of change in the ionic current when DNA passes through the nanopore is several tens of pA to several hundreds of pA. To amplify the minute current change and detect it at several mV, 10<sup>8</sup>Amplification of about [V / I] is required. However, high amplification amplifiers have a limited response speed and are generally 10<sup>8</sup>The amplification degree of [V / I] is a cutoff frequency of about several MHz to 100 MHz. In the case of a CR circuit, the rise time indicating the response speed is t.<sub>r</sub>, Cutoff frequency f<sub>c</sub>Then, t<sub>r</sub>= 0.35 / f<sub>c</sub>Because there is a relationship of, the response speed t<sub>r</sub>Is f<sub>c</sub>0.035 μs, f at 10 MHz<sub>c</sub>Since it is 0.0035 μs at = 100 MHz and the passing speed at 0.2 V is 0.5 μs per base, it can be amplified.</p><p> A comparison between the conventional method and this embodiment will be made. In the conventional method, the speed at which the sample passes through the nanopore is even faster. For example, in order to apply a gate voltage of 1 V, the potential difference between the cis electrode and the transformer electrode becomes 2.2 V. It is approximately 11 times the 0.2 V shown in the specific example in this embodiment. In that case, the nanopore passage rate of DNA is 0.045 μs per base. The required sampling speed is as high as 440 MHz, which is 10<sup>8</sup>Since the response speed of the [V / I] amplifier is 0.0035 to 0.035 μs, amplification becomes difficult.</p><p> Therefore, a method capable of controlling the gate voltage while changing the potentials of both the cis electrode and the transformer electrode in this embodiment and maintaining the potential difference between the cis electrode and the transformer electrode becomes very important.</p><p> A system having a voltage source and an ammeter connected to the cis electrode shown in FIG. 4 controls the potentials of the source and drain described later, and when both the voltage source and the ammeter are required in the method of applying the gate voltage. Is used as well.</p><p> FIG. 5 shows another example of the present embodiment in which two or more field effect transistors of FIG. 2 are arranged. Each field effect transistor is insulated by the insulating portion 501. The material of the insulating part is silicon oxide, silicon nitride, or a structure in which silicon oxide and silicon nitride are laminated, and high-density silicon nitride is used for the surface in contact with the aqueous solution. A set of cis electrode 502 and transformer electrode 503 is provided in one field effect transistor, and the gate voltage is changed to control the channel current. A cis electrode and a trans electrode may be formed on a nanopore substrate in a semiconductor process.</p><p> FIG. 6 shows another example of the present embodiment in which two or more field effect transistors of FIG. 2 are arranged and one set of cis electrode and transformer electrode is provided. Each field effect transistor is insulated by the insulating portion 601. The material of the insulating part is silicon oxide, silicon nitride, or a structure in which silicon oxide and silicon nitride are laminated, and high-density silicon nitride is used for the surface in contact with the aqueous solution. Only one set of cis electrode 602 and transformer electrode 603 is provided, and the gate voltage of two or more field effect transistors is changed to control the channel current. When there is little variation in the performance of each field effect transistor, this method can easily control all channel currents.</p>
<p> FIG. 7 shows another embodiment of this embodiment. In FIG. 2, the potentials of the cis electrode 210 and the transformer electrode 211 are made variable with respect to the potential of the channel 222, and the gate voltage is applied to the channel 222. However, in FIG. 6, the potentials of the cis electrode 210 and the transformer electrode 211 are applied. Is fixed, the potential in the vicinity of the channel 222 is not changed, the potentials of the source 215 and the drain 216 are made variable, the potential of the channel 222 is changed, and the gate voltage is given to the channel. In this embodiment, as in FIG. 2, the chamber 201 is a nanopore substrate 203 having nanopores 202, two sealed spaces 204 and 205, filled liquids 206, 207, sample 209, cis electrode 210, transistor electrodes 211, nanopores. It is composed of a field effect transistor 218 formed on the surface of the substrate 203, a source 220, a drain 221 and a channel 222. Further, similarly to FIG. 2, the cis electrode 210 is connected to the cis side ammeter 215, the transformer electrode 211 is connected to the transformer side voltage source 213, the source 220 is connected to the source ammeter 224, and the drain 221 is connected to the drain voltage source 223. The difference from FIG. 2 is that the voltage source is not connected to the cis electrode 210, but is connected to the ground 214 to set the potential to 0V. Further, a source voltage source 701 is added to the source 220. Then, while keeping the potential difference between the cis electrode 210 and the transformer electrode 211 constant, the potentials of the source 220 and the drain 221 are changed, and the gate voltage is applied to the channel 222. In this case, the amount of change in the potentials of the source 220 and the drain 221 may be the same amount, but may be different.</p><p> In this embodiment, when the channel is N-type, the carrier is an electron, so that the gate voltage is positive, that is, the potential near the channel 222 is larger than the potential of the channel 222. Set the potential of Vd. A specific example is shown below. When Vcis is 0V, Vtrans is 0.2V, Vs is -0.8V, and Vd is -1V, the potential difference of 0.2V generated between the cis electrode 210 and the trans electrode 211 is the electrophoresis of passing the sample through the nanopore 202. It becomes the driving force. Further, the potential of the channel 222 is 0.9 V, which is an intermediate value between the potentials of the source 215 and the drain 216, and the potential in the vicinity of the channel 222 is an intermediate value of the potentials of the cis electrode 210 and the transformer electrode 211. It becomes 1V, and + 1V, which is the difference between 0.1V and 0.9V, becomes the gate voltage, and the electric field acts on the channel 222. Then, the channel current is measured by the source ammeter 224, and Vs and Vd are changed by the same amount or by different amounts to optimize so that the current in the subthreshold region flows.</p><p> In this embodiment, when the channel 222 is P-type, the carrier is a hole, so that the gate voltage is negative, that is, the potential in the vicinity of the channel 222 is smaller than the potential of the channel 222. Set the potentials of Vs and Vd. A specific example is shown below. When Vcis is 0V, Vtrans is 0.2V, Vs is 1.0V, and Vd is 1.2V, the potential difference 0.2V generated between the cis electrode 210 and the transformer electrode 211 passes the sample 209 through the nanopore 202. It becomes the driving force of. Further, the potential of the channel 222 is 1.1 V, which is an intermediate value between the potentials of the source 215 and the drain 216, and the potential in the vicinity of the channel 222 is 0.1 V, which is an intermediate value between the potentials of the cis electrode 210 and the transformer electrode 211. Then, -1V, which is the difference between 0.1V and 1.1V, becomes the gate voltage, and the electric field acts on the channel 222. Then, the channel current is measured by the source ammeter 224, and Vs and Vd are changed by the same amount or by different amounts to optimize so that the current in the subthreshold region flows.</p><p> In this embodiment, the sample 209 is introduced on the side of the space 206 where the silicon substrate 216 is located, the cis electrode 210 is arranged, and the transformer electrode 211 is arranged on the opposite side. However, the sample 209, the cis electrode 210, and the transformer electrode 211 are arranged. May be the other way around.</p><p> In this embodiment, the cis-side ammeter 215, the transformer-side voltage source 213, the drain-side voltage source 223, the source-side ammeter 224, and the source-side voltage source 701 may be formed on the silicon substrate 216.</p><p> FIG. 8 shows another example of the present embodiment in which two or more field effect transistors of FIG. 7 are arranged. Each field effect transistor is insulated by the insulating portion 801. The material of the insulating part is silicon oxide, silicon nitride, or a structure in which silicon oxide and silicon nitride are laminated, and high-density silicon nitride is used for the surface in contact with the aqueous solution. A set of cis electrode 803 and transformer electrode 804 is provided in one nanopore and field effect transistor 802, and the potentials of the source 805 and the drain 806 are changed to control the channel current. A cis electrode and a trans electrode may be formed on a nanopore substrate in a semiconductor process.</p><p> FIG. 9 shows another example of the present embodiment in which two or more field effect transistors of FIG. 7 are arranged. Each field effect transistor is insulated by an insulating portion 901. The material of the insulating part is silicon oxide, silicon nitride, or a structure in which silicon oxide and silicon nitride are laminated, and high-density silicon nitride is used for the surface in contact with the aqueous solution. Each field effect transistor is provided with a transformer electrode 902 and only one cis electrode 903. The channel current is controlled by changing the potentials of the source 904 and the drain 905. When the variation in the diameter of the nanopore 906 is small, one transformer voltage source 907 and one transformer ammeter 908 are installed in each transformer electrode 902 to control the ion current. The transformer voltage source 907 and the transformer ammeter 908 have the same configuration as that shown in FIG. A cis electrode and a trans electrode may be formed on a nanopore substrate by a semiconductor process.</p><p> FIG. 10 shows another example of the present embodiment in which two or more field effect transistors of FIG. 7 are arranged and one set of cis electrode and transformer electrode is provided. Each field effect transistor is insulated by the insulating portion 1003. The material of the insulating part is silicon oxide, silicon nitride, or a structure in which silicon oxide and silicon nitride are laminated, and high-density silicon nitride is used for the surface in contact with the aqueous solution. Only one set of cis electrode 1002 and transformer electrode 1003 is provided, and the gate voltage of two or more field effect transistors is changed to control the channel current. When there is little variation in the performance of each field effect transistor, this method can easily control all channel currents. The control of each channel current is performed by changing the potentials of the source 1004 and the drain 1005 of each field effect transistor. As the sample passes through each nanopore, the cis-side ammeter 1006 measures the sum of the current changes that occur in all the nanopores 1007. In this case, it is not possible to confirm which nanopore the sample has passed through with the cis-side ammeter 1006. Therefore, it is used in combination with the channel current change of each field effect transistor.</p>
<p> Next, an embodiment of the present invention that solves the problem of Problem 2 "decrease in detection accuracy due to generation of leakage current" will be shown. In this embodiment, the problem 1 is solved at the same time. When the field effect transistor is miniaturized, it is difficult to completely eliminate the leakage current. Therefore, the leakage current is detected, and if the leakage current is too large, the field effect transistor is not used to ensure the reliability of the detection performance.</p><p> FIG. 11 shows a configuration in which a function for detecting a leak current is added to the configuration of FIG. 2 as an embodiment of the present embodiment. Similar to FIG. 2, the chamber 201 is on the surface of the nanopore substrate 203 having the nanopore 202, the two sealed spaces 204 and 205, the filled liquids 206, 207, the sample 209, the cis electrode 210, the transformer electrode 211, and the nanopore substrate 203. It is composed of a field effect transistor 218 to be formed, a source 220, a drain 221 and a channel 222. Further, as in FIG. 2, the cis electrode 210 has a cis side ammeter 215 and a cis voltage source 212, the transformer electrode 211 has a transformer side voltage source 213, the source 220 has a source ammeter 224, and the drain 221 has a drain voltage source. Connect 223. The difference from FIG. 2 is that a drain ammeter 1101 is added to the drain 221.</p><p> The leakage current is calculated by adding the output voltages of the source ammeter 224 and the drain ammeter 1101. This is because, when the ammeter shown in FIG. 4 is used, the output voltage becomes negative when the current flows in, the output voltage becomes positive when the current flows out, there is no leakage current, and there is no error in the ammeter. This is because the output voltage of each ammeter when the current flows out from the drain side and flows into the source side has the same absolute value and the sign is inverted.</p><p> It is also possible to arrange two or more field effect transistors with a leak current detection function in FIG. 11 in parallel on the silicon substrate surface, and the drain ammeter 1001 is added to the configuration shown in FIGS. 5 and 6. Become.</p><p> FIG. 12 shows a procedure for checking the leak current with the configuration shown in FIG.</p><p> FIG. 13 shows a configuration in which a function for detecting a leak current is incorporated in the configuration of FIG. 7 as another configuration of this embodiment.</p><p> Similar to FIG. 7, the chamber 201 is on the surface of the nanopore substrate 203 having the nanopore 202, the two sealed spaces 204 and 205, the filled liquids 206, 207, the sample 209, the cis electrode 210, the transformer electrode 211, and the nanopore substrate 203. It is composed of a field effect transistor 218 to be formed, a source 220, a drain 221 and a channel 222. Further, as in FIG. 6, the cis electrode 210 has a cis side ammeter 215, the transformer electrode 211 has a transformer side voltage source 213, the source 220 has a source ammeter 224 and a source voltage source 601 and the drain 221 has a drain voltage source. Connect 223. The difference from FIG. 7 is that a drain ammeter 1301 is added to the drain 221.</p><p> The leakage current is calculated by adding the output voltages of the source ammeter 224 and the drain ammeter 1301 in the same manner as in FIG.</p><p> It is also possible to arrange two or more field effect transistors with a leak current detection function in FIG. 13 in parallel on the silicon substrate surface, and a drain ammeter 1301 is added to the configurations shown in FIGS. 8, 9, and 10. It becomes the configuration.</p><p> FIG. 14 shows a procedure for checking the leak current with the configuration shown in FIG.</p><p> FIG. 15 shows a specific example of leak current detection. The source ammeter 1501 and the drain ammeter 1502 have the same configuration as in FIG. 4, and consist of a current-voltage converter and a differential input AD converter, and convert a minute input current into a voltage that can be read by the current-voltage converter. Then, it is converted into digital data by an AD converter and output to a data processing recording system 1503 such as a personal computer. The data processing recording system 1503 compares the source current value and the drain current value of the digital data, and if they are about the same, it is determined that there is no leakage current from the drain to the source and the data is flowing. If either of them is large, it is determined that the field effect transistor is leaking to the outside by the difference, and if the leakage current is large, it is diagnosed as a failure.</p><p> FIG. 16 shows another method of detecting leak current. Only the source ammeter 1601 measures the channel current and no drain ammeter is used. The current-voltage converters 1602 and 1603 convert the source current and drain current into readable voltages, and the instrumentation amplifiers 1604 and 1605 with 1x amplification in the next stage set each voltage of each analog ground reference to the ground reference. The voltage is converted to the voltage of 1606, and the magnitude relation between the source current and the drain current and the difference thereof are obtained by the adder circuit 1606. When there is no leak, the source current and drain current are voltages with the same absolute value and opposite signs, so the magnitude relationship and the difference between them can be obtained in the adder circuit 1606. Next, the window comparator 1607 determines whether the input is within the range of the upper threshold voltage and the lower threshold voltage, and the result is processed by the data processing recording system 1608 to diagnose the failure. When the magnitude relationship between the source current and the drain current and the difference between them exceed the threshold voltage, it is determined that a leak current has occurred. This configuration is a simple configuration because it does not use an AD converter, and the input to the data processing recording system 1608 is 1-bit data as to whether or not the threshold value is exceeded, so that the burden on the entire system can be reduced. Therefore, the effect is particularly large when a large number of field effect transistors are arranged.</p>
<p> FIG. 17 shows another configuration in this embodiment. In addition to the configuration of FIG. 11, the control gate electrode 1701 and the back gate electrode 1702 are arranged on both sides of the field effect transistor on the silicon substrate, and the gate voltage is directly applied by the control gate voltage source 1703 and the back gate voltage source 1704. It is applied to channel 222 to control the channel current. Each control gate is insulated from the channel by an insulating layer 1705. It has a function to assist the application of gate voltage by the cis electrode and the transformer electrode.</p><p> When two or more field effect transistors are arranged in parallel, one control gate electrode and one back gate electrode are arranged for each field effect transistor. The cis electrode and the transformer electrode are installed in the same manner as shown in FIGS. 5 and 6.</p><p> FIG. 18 shows another configuration in this embodiment. In addition to the configuration of FIG. 13, the control gate electrode 1801 and the back gate electrode 1802 are arranged on both sides of the field effect transistor on the silicon substrate, and the gate voltage is directly applied by the control gate voltage source 1803 and the back gate voltage source 1804. It is applied to channel 222 to control the channel current. Each control gate is insulated from the channel by an insulating layer 1805. It has a function to assist the application of gate voltage by the potential of the source and drain.</p><p> When two or more configurations of FIG. 17 are arranged in parallel on a silicon substrate, one control gate electrode and one back gate electrode are arranged for each field effect transistor. The cis electrode and the transformer electrode are installed in the same manner as shown in FIGS. 8, 9, and 10.</p><p> FIG. 19 shows a configuration in which two or more field effect transistors are arranged in parallel by combining channel current control, leak detection, and control gates on both sides while keeping the nanopore passing speed of the sample constant in this embodiment. Based on the configuration of FIG. 7, a method of controlling the channel current by changing the potentials of the source 220 and the drain 221 and confirming the leak current is used according to the procedure of FIG. Chamber 201 is a nanopore substrate 203 with two or more nanopores 202, two sealed spaces 204 and 205, filled liquids 206, 207, electrolyte 208, sample 209, one cis electrode 210, two or more transistor electrodes. It consists of 211, two or more field effect transistors 218 formed on the surface of the nanopore substrate 203, and a source 220, a drain 221 and a channel 222 constituting each field effect transistor 218. Further, similarly to FIG. 18, the cis electrode 210 is connected to the ground 214, the transformer electrode 211 has a transformer side voltage source 213 and a transformer side ammeter 907, and the source 220 has a source current meter 224 and a source voltage source 601 and a drain. A drain voltage source 223 and a drain ammeter 1301 are connected to 221. A control gate electrode 1801 and a back gate electrode 1802 are arranged on both sides of the field effect transistor 118, and the gate voltage is directly applied to the channel 222 by the control gate voltage source 1803 and the back gate voltage source 1804 to assist the control of the channel current. To do. The transformer electrode 211 deposits polysilicon doped with silver, silver chloride, platinum, boron, phosphorus, etc. by a semiconductor process, and covers the upper surface with an insulating layer in which silicon oxide, silicon nitride, silicon oxide and silicon nitride are laminated. In this configuration, in this embodiment, the transformer side voltage source 213, the transformer side ammeter 907, the drain side ammeter 223, the drain side ammeter 1301, the source side voltage source 701, the source side ammeter 224, and the control gate voltage source 1803 , The backgate voltage source 1804 may be formed on the silicon substrate 216.</p><p> A plurality of electrodes, a plurality of chambers, a plurality of nanopores, and a plurality of field effect transistors indicate a structure in which a plurality of elements are arranged one-dimensionally or two-dimensionally. In the figure, each element is represented by two, but the present embodiment is not limited.</p><p> It will be easily understood by those skilled in the art that the present invention is not limited to the above-described embodiment, and various modifications can be made within the scope of the invention described in the claims.</p>
101 ... chamber, 102 ... nanopore, 103 ... nanopore substrate, 104 ... space, 105 ... space, 106 ... liquid, 107 ... liquid, 108 ... electrolyte, 109 ... sample, 110 ... cis electrode, 111 ... transformer electrode, 112 ... ground , 113 ... transformer side voltage source, 114 ... cis side current meter, 115 ... source, 116 ... drain, 117 ... channel, 118 ... electric field effect transistor, 119 ... drain side voltage source, 120 ... source side current meter, 121 ... insulation Layer, 122 ... Insulation layer, 201 ... Chamber, 202 ... Nanopore, 203 ... Nanopore substrate, 204 ... Space, 205 ... Space, 206 ... Liquid, 207 ... Liquid, 208 ... Electrolyte, 209 ... Sample, 210 ... Sis electrode, 211 ... Transformer electrode, 212... cis side voltage source, 213... transformer side voltage source, 214... ground, 215... cis side current meter, 216... silicon substrate, 217... insulating layer, 218... electric field effect transistor, 219... insulating layer, 220 ... source, 221 ... drain, 222 ... channel, 223 ... drain side voltage source, 224 ... source side current meter, 301 ... sub-threshold region, 302 ... saturation region, 303 ... linear region, 401 ... cis side voltage source, 402 ... cis electrode, 403 ... cis side current meter, 404 ... transformer electrode, 405 ... current conversion type amplifier, 406 ... operational amplifier, 407 ... transformer side voltage source, 408 ..., 409 ... electrolyte aqueous solution, 410 ... electrolyte aqueous solution, 411 ... nanopore , 412 ... feedback resistor, 413 ... analog ground, 414 ... analog digital converter, 415 ... data processing recording system, 416 ... positive power supply, 417 ... negative power supply, 501 ... insulation, 502 ... cis electrode, 503 ... transformer electrode, 601 ... Insulation part, 602 ... Sis electrode, 603 ... Trans electrode, 701 ... Source side voltage source, 801 ... Insulation part, 802 ... Nanopore, 803 ... Sis electrode, 804 ... Trans electrode, 805 ... Source, 806 ... Drain, 901 ... insulation, 902 ... transformer electrode, 903 ... cis electrode, 904 ... source, 905 ... drain, 906 ... nanopore, 907 ... transformer side voltage source, 908 ... transformer side current meter,1001 ... Insulation, 1002 ... Sis electrode, 1003 ... Transformer electrode, 1004 ... Source, 1005 ... Drain, 1006 ... Sis side current meter, 1007 ... Nanopore, 1101 ... Drain side current meter, 1301 ... Drain side current meter, 1501 ... Source side current meter, 1502 ... Drain side current meter, 1503 ... Data processing recording system, 1601 ... Source side current meter, 1602 ... Current-voltage conversion type amplifier, 1603 ... Current-voltage conversion type amplifier, 1604 ... Instrumentation amplifier, 1605 ... Instrumentation amplifier, 1606 ... Addition circuit, 1607 ... Window comparator, 1608 ... Data processing recording system, 1701 ... Control gate, 1702 ... Back gate, 1703 ... Control gate side voltage source, 1704 ... Back gate side voltage source, 1705 ... Insulation Layer, 1801 ... Control gate, 1802 ... Back gate, 1803 ... Control gate side voltage source, 1804 ... Back gate side voltage source, 1805 ... Insulation layer
20 sheets
Sheet 1 Sheet 2 Sheet 3 Sheet 4 Sheet 5 Sheet 6 Sheet 7 Sheet 8 Sheet 9 Sheet 10 Sheet 11 Sheet 12 Sheet 13 Sheet 14 Sheet 15 Sheet 16 Sheet 17 Sheet 18 Sheet 19 Sheet 20
Every citation, both ways
| Document | Relation | Office | Cited during |
|---|---|---|---|
| CN111094976A | Cited by | China | Search report |
| US11913936B2 | Cited by | United States of America | Applicant |
| US11084015B2 | Cited by | United States of America | Applicant |
| US11977069B2 | Cited by | United States of America | Applicant |
| US11768174B2 | Cited by | United States of America | Applicant |
| CN115125131A | Cited by | China | Search report |
| US11774400B2 | Cited by | United States of America | Applicant |
| US12392766B2 | Cited by | United States of America | Applicant |
| CN109313157A | Cited by | China | Search report |
| WO2017184790A1 | Cited by | World Intellectual Property Organization (WIPO) | Applicant |
| JP2020201088A | Cited by | Japan | Search report |
| EP4113112A1 | Cited by | European Patent Office (EPO) | Search report |
| EP3502688A1 | Cited by | European Patent Office (EPO) | Search report |
| JP2021056227A | Cited by | Japan | Search report |
| US2025116650A1 | Cited by | United States of America | Search report |
| US11959904B2 | Cited by | United States of America | Applicant |
| JP2019510200A | Cited by | Japan | Search report |
| US12411126B2 | Cited by | United States of America | Applicant |
| JP2016102748A | Cited by | Japan | Search report |
| US11946925B2 | Cited by | United States of America | Applicant |
| JP2022523435A | Cited by | Japan | Search report |
| JP2022069453A | Cited by | Japan | Search report |
| JPWO2016075764A1 | Cited by | Japan | Search report |
| US12411125B2 | Cited by | United States of America | Applicant |
| US11391693B2 | Cited by | United States of America | Applicant |
| US12146873B2 | Cited by | United States of America | Search report |
| WO2020183172A1 | Cited by | World Intellectual Property Organization (WIPO) | International search |
| US11367797B2 | Cited by | United States of America | Applicant |
| WO2019120642A1 | Cited by | World Intellectual Property Organization (WIPO) | International search |
| US11644437B2 | Cited by | United States of America | Applicant |
| JP2016102748A | Cited by | Japan | Search report |
| EP3446113A4 | Cited by | European Patent Office (EPO) | Search report |
| JP2016102748A | Cited by | Japan | Search report |
| US11596940B2 | Cited by | United States of America | Applicant |
| US12121894B2 | Cited by | United States of America | Applicant |
| US12458945B2 | Cited by | United States of America | Applicant |
| US11789006B2 | Cited by | United States of America | Applicant |
| US11561216B2 | Cited by | United States of America | Applicant |
| JP2016102748A | Cited by | Japan | Search report |
| US2023003710A1 | Cited by | United States of America | Search report |
| US12140563B2 | Cited by | United States of America | Applicant |
| US12350637B2 | Cited by | United States of America | Applicant |
| JP2021060406A | Cited by | Japan | Search report |
| CN112816679A | Cited by | China | Search report |
| US12540937B2 | Cited by | United States of America | Applicant |
| WO2016075764A1 | Cited by | World Intellectual Property Organization (WIPO) | International search |
| JP2020525762A | Cited by | Japan | Search report |
| US10969377B2 | Cited by | United States of America | Applicant |
| US11994507B2 | Cited by | United States of America | Applicant |
| AU2020239385B2 | Cited by | Australia | Search report |
| US12552661B2 | Cited by | United States of America | Applicant |
| JPWO2016075764A1 | Cited by | Japan | Search report |
1 member in 1 office
Members1
| Document | Office | Kind | |
|---|---|---|---|
| JP2014190891AThis record | Japan | A |
Numbers
- Publication
- 2014190891
- Application
- 67833
Titles2
- Japanese
- ナノポア式分析装置の電圧印加システム
- English
- A voltage impression system of a ナノポア type analysis device
Classification
- CPC, 1
- G01N33/48721
- IPC, 2
- G01N27 00
- G01N27 414