Display device and electronic apparatus

The present invention is a semiconductor having a circuit composed of a thin film transistor (hereinafter referred to as TFT). The present invention relates to an apparatus and a method for producing the apparatus. For example, an electro-optical device represented by a liquid crystal display panel. And an electronic device equipped with such an electro-optical device as a component.

In the present specification, a semiconductor device is a device that can function by utilizing semiconductor characteristics. Electro-optics, semiconductor circuits, and electronic devices are all semiconductor devices.

In recent years, semiconductor thin films (thickness of several to several hundred nm) formed on a substrate having an insulating surface have been used. The technology for constructing thin film transistors (TFTs) is attracting attention. Thin film transistor Widely applied to electronic devices such as ICs and electro-optical devices, especially switches for image display devices. Development is urgently needed as a device.

Typical examples of the above electro-optical device include a liquid crystal display device, an EL display device, and a close contact type image sensor. There is an answer.

Generally, in a liquid crystal display device, a pair of substrates facing each other with a constant substrate spacing and a constant substrate are separated from each other. It includes a particulate spacer for keeping a gap and a liquid crystal material enclosed between the substrates.

The substrate spacing of the liquid crystal display device is usually set to 1 to 20 μm, and this is set to a precision of about ± 0.1 μm. It is necessary to control the degree uniformly. If the board spacing varies, color unevenness, interference fringes, etc. Not only does it cause deterioration of display quality, but the electrodes also become when the substrate spacing is narrowed by an external force. This is because they may come into contact with each other and cause defects such as circuit damage and inability to display. Space like this The cellar is an important member for maintaining the performance of the liquid crystal display element.

Hereinafter, a method for manufacturing a conventional liquid crystal display device (TFT-LCD) will be briefly described.

First, a pair of substrates is prepared. A TFT element and a pixel electrode are mounted on one of the substrates. Form in a square shape. An electrode, a color filter, or the like is formed on the other substrate. Next After forming an alignment film on each of the pair of substrates, a rubbing treatment is performed.

Next, the particulate spacer is uniformly sprayed on the alignment film of either substrate. Next, combine it with the other substrate and seal the peripheral edge with a sealing adhesive to form a liquid crystal cell. Form. Next, the liquid crystal material is filled in the liquid crystal cell by the vacuum injection method, and then the injection port is opened. Seal.

The above process flow is the general manufacturing process of TFT-LCD.

In the above-mentioned conventional process, it is difficult to uniformly spray the particulate spacer, and the space is Leakage and short circuit occur due to reduction of transmittance due to pseudo-collection of cells and destruction of the element directly under the spacer. Is a problem.

In addition, in the process of injecting the liquid crystal material by the vacuum injection method, the liquid crystal material is injected into the substrate by pressurization during injection. The central part has a concave shape on both sides, and the compression strength is insufficient with the conventional particulate spacer around this. It was destroyed or the spacer was moved, and the trace of the movement is the cause of misalignment. It has become.

<p> Commonly used conventional particulate spacers (glass beads, plastic beads, etc.) ) Is used, the particulate spacer is sprayed on one of the substrates. for that reason , Spacers are placed on the pixel electrodes, blocking incident light and disturbing the orientation of liquid crystal molecules. .. As a result, it has become difficult to adjust the amount of transmitted light and color development. Also, the particulate spacer Static electricity is easily charged, which makes it easier for spacers to gather together and distribute them evenly. Was difficult.</p><p>An object of the present invention is free depending on the characteristics of the liquid crystal to be used and the driving method without using a particulate spacer. We propose a high-quality liquid crystal panel and its manufacturing method that have a thickness designed in a wide range with high accuracy. To serve.</p>

<p>The configurations of the invention disclosed herein include a first substrate, a second substrate, the first substrate and the front. A columnar column that is arranged between the second substrate and keeps a distance between the first substrate and the second substrate. It is a semiconductor device characterized by having a plurality of spacers.</p><p> Further, the configurations of other inventions include a first substrate, a second substrate, the first substrate, and the second substrate. A semiconductor device having a plurality of columnar spacers between the substrate and the columnar spacers. A semiconductor device having a rate radius R of 2 μm or less, preferably 1 μm or less. To.</p><p> Further, in each of the above configurations, the height H of the columnar spacer is 0.5 μm to 10 μm. It is preferably 1.2 μm to 5 μm.</p><p> Further, in each of the above configurations, the width L1 of the columnar spacer is preferably 20 μm or less. Is characterized by being 7 μm or less.</p><p> Further, in each of the above configurations, the tangent plane and the substrate surface at the center of the side surface of the columnar spacer The angle α of is characterized by being 65 ° to 115 °.</p><p> Further, in each of the above configurations, the columnar spacer has a flat surface on the crown. It is a feature.</p><p> Further, in each of the above configurations, the radial cross-sectional shape of the columnar spacer is circular. It is characterized by being an ellipse, a triangle, a quadrangle, or a larger polygon.</p><p> Further, in each of the above configurations, the columnar spacer is made of a material having an insulating property. It is a sign.</p><p> Further, in each of the above configurations, the columnar spacer connects the TFT and the pixel electrode. It is characterized by being formed on the contact portion.</p><p> Further, the columnar spacer may be formed only in the seal region, or the seal may be formed. It may be formed on the region and the region where the element does not exist in the drive circuit. In addition, the columnar The spacer may be formed in the seal region and the pixel portion, or the element is present in the drive circuit. It may be formed on the non-existent area and on the pixel portion. In addition, the columnar spacer is used for the seal area and It may be formed in the region between the drive circuit and the pixel portion, and the columnar spacer may be formed in the area between the drive circuit and the pixel portion. It may be formed in the region between the element portion and the pixel portion.</p><p> Further, the columnar spacer is above the seal region and the region where the element does not exist in the drive circuit. And may be formed in the pixel portion, and the columnar spacer does not have an element in the drive circuit. It may be formed on the above region and in the region between the drive circuit and the pixel portion. In addition, the columnar space The sensor is in the seal area, the area where the element does not exist in the drive circuit, and the drive circuit and the pixel part. It may be formed in the intervening region and the pixel portion, and the columnar spacer may be formed between the seal region and the pixel portion. It may be formed in the intervening area. Further, the columnar spacer is provided between the seal region and the drive circuit. It may be formed in the region, or the columnar spacer may be formed in the region between the sealing region and the edge of the substrate. It may be formed. Further, the columnar spacer may be formed over the entire surface of the substrate.</p><p> Further, in each of the above configurations, the columnar spacer is formed in contact with the alignment film. In this case, the pre-tilt angle is characterized by being 4 to 5 °.</p><p> Further, in each of the above configurations, when the columnar spacer is covered with an alignment film, a pre The tilt angle is characterized by being 6 to 10 °.</p><p> Further, the configurations of other inventions include a first substrate, a second substrate, the first substrate, and the second substrate. It is equipped with a display device having a plurality of columnar spacers arranged between the substrate and an optical detection element. It is a semiconductor device characterized by having a touch panel.</p><p> Further, the configurations of other inventions include a first substrate, a second substrate, the first substrate, and the second substrate. Equipped with a display device equipped with a plurality of columnar spacers arranged between the substrates and a pressure-sensitive detection element. It is a semiconductor device characterized by having a touch panel.</p><p> Further, the configurations of other inventions include a first substrate, a second substrate, the first substrate, and the second substrate. A display device equipped with a plurality of columnar spacers arranged between the substrate and a capacitance type detection element. It is a semiconductor device characterized by having a touch panel provided.</p><p> Further, the configuration of the invention for realizing the above structure is the first step of forming the TFT on the substrate. , The second step of covering the TFT to form a flattening film, and opening the flattening film to form the T The third step of connecting to the FT and forming the pixel electrode, and forming an alignment film on the pixel electrode. The fourth step of forming, the fifth step of applying a rubbing treatment to the alignment film, the TFT and the above. The sixth work of forming a columnar spacer made of an insulating film above the contact portion connected to the pixel electrode. It is a method for manufacturing a semiconductor device, which is characterized by having a semiconductor device.</p><p> Further, the configuration of another invention includes a first step of forming a TFT on a substrate and covering the TFT. In the second step of forming the flattening film, the flattening film is opened and connected to the TFT. The third step of forming the pixel electrode and the contact portion where the TFT and the pixel electrode are connected to each other. The fourth step of forming a columnar spacer made of an insulating film on the pixel electrode and the columnar column. The fifth step of forming an alignment film covering the spacer and the sixth step of applying a rubbing treatment to the alignment film. It is a method for manufacturing a semiconductor device, which is characterized by having a semiconductor device.</p><p>In the above configuration, the step of forming the columnar spacer made of the insulating film forms the insulating film. To form a columnar spacer by the step of patterning the insulating film and the step of patterning the insulating film. It is a feature.</p>

<p>By using the columnar spacer of the present invention, the characteristics of the liquid crystal used without using the particulate spacer High-quality liquid crystal panel with accurate thickness designed in a free range according to the driving method Can be provided.</p><p> Further, by adopting the shape of the columnar spacer of the present invention, it is possible to prevent the liquid crystal from being misaligned. To.</p><p> Further, by using the columnar spacer of the present invention, the load applied to the device is reduced and the device is destroyed. It is possible to prevent a decrease in yield and a decrease in reliability due to such factors. In this way, the liquid crystal display It is possible to improve the operating performance and reliability of the electro-optical device represented by the device. ..</p>

<figref num="1">It is a SEM observation photograph and schematic diagram of the columnar spacer of the present invention.</figref><figref num="2">It is a figure which showed an example of arrangement of a columnar spacer, and is an SEM observation photograph.</figref><figref num="3">It is a manufacturing process drawing of this invention.</figref><figref num="4">It is a figure which shows the flowchart of the manufacturing process of this invention.</figref><figref num="5">It is a figure which shows the manufacturing process of AM-LCD.</figref><figref num="6">It is a figure which shows the manufacturing process of AM-LCD.</figref><figref num="7">It is a figure which shows the manufacturing process of AM-LCD.</figref><figref num="8">It is a figure which shows the manufacturing process of AM-LCD.</figref><figref num="9">It is sectional drawing of TFT.</figref><figref num="10">It is a figure which shows the appearance of AM-LCD.</figref><figref num="11">It is a figure which shows the structure of a pixel part and a drive circuit.</figref><figref num="12">It is a top view which shows the pixel structure.</figref><figref num="13">It is a figure which shows an example of the connection part with an external terminal.</figref><figref num="14">It is a manufacturing process drawing of this invention.</figref><figref num="15">It is a figure which shows the flowchart of the manufacturing process of this invention.</figref><figref num="16">It is a figure which shows the manufacturing process of AM-LCD.</figref><figref num="17">It is an SEM observation photograph of the columnar spacer of the present invention.</figref><figref num="18">It is a figure which showed an example of the arrangement of a columnar spacer.</figref><figref num="19">It is a figure which showed an example of the arrangement of a columnar spacer.</figref><figref num="20">It is sectional drawing of the active matrix type liquid crystal display device.</figref><figref num="21">It is sectional drawing of the active matrix type liquid crystal display device.</figref><figref num="22">It is a figure which shows the display device provided with a touch panel.</figref><figref num="23">The figure which shows the structure of the active matrix type EL display device.</figref><figref num="24">It is a figure which shows the characteristic of the light transmittance with respect to the applied voltage of the non-threshold antiferroelectric mixed liquid crystal.</figref><figref num="25">It is a figure which shows an example of an electronic device.</figref><figref num="26">It is a figure which shows an example of an electronic device.</figref><figref num="27">It is a figure which shows the rubbing roll pushing amount dependence of a pre-tilt angle.</figref>

Embodiments of the present invention will be described below with reference to FIGS. 1 to 4.

In the present invention, a columnar spacer is used to keep the distance between the first substrate and the second substrate constant. It is desirable that the shape of the columnar spacer of the present invention conforms to the following conditions.

As shown in FIG. 1, in the columnar spacer, the width (diameter) of the central portion is L1 and the width (diameter) of the upper end is L1. Let L3 and the width (diameter) of the lower end be L2. The process shown in FIG. 3 (columnar space on the alignment film 301) In the case of forming the battery 303), the value is the width of the columnar spacer itself, which is shown in FIG. In the process (when forming the alignment film 1103 on the columnar spacer 1102), the columnar spacer The width L1 to L3 is the value obtained by adding the film thickness of the alignment film to itself. The width L2 is a columnar spacer. The width of the region where the columnar spacer material with a film thickness of 0.2 μm or more exists from the plane before formation. To. The central width L1 of the columnar spacer needs to play a sufficient role as a spacer It should be 20 μm or less, preferably 10 μm or less, and more preferably 7 μm or less. desirable.

In the present specification, the lower end refers to the end portion of the columnar spacer on the first substrate side. The upper end refers to the crown of the columnar spacer. The top of the columnar spacer of the present invention has an external pressure. It has a flat surface so that even pressure is applied to the columnar spacer when it is applied. Also, the tree Since the spacer made of a fat material is highly elastic, it can absorb pressure appropriately. Also, Unlike the particulate spacer, the columnar spacer of the present invention is in contact with the element on a surface, so that the pressure is dispersed and the pressure is dispersed. There is no excessive pressure on one point. In the present invention, the crown of the columnar spacer The radius of curvature R of the end portion in the above is 2 μm or less, preferably 1 μm or less so that the pressure is uniform. Is placed on the columnar spacer.

In the present invention, the width of each part of the columnar spacer is the same, that is, L1 = L2 = L3. desirable. The angle α ° between the side surface and the substrate surface at the center of the columnar spacer is 65 °. The range is preferably in the range of ~ 115 °.

However, when a columnar spacer is actually formed, the upper end of the columnar spacer has a radius of curvature of 2 μm or more. The bottom, preferably the end with 1 μm or less, has a tapered portion at the bottom of the columnar spacer. Since it is formed, L2&gt; L1&gt; L3. In the tapered part, the orientation of the liquid crystal tends to be poor, Light leakage occurs around this area. In the present invention, within the range of 0.8 L2 / L1 3. Light leakage is reduced by making it. The process shown in Fig. 3 (columnar space on the alignment film) In the case of forming a user), it is desirable to set 1 L2 / L1 1.1. Also , In the process shown in FIG. 14 (when forming an alignment film on the columnar spacer), 1 L2 It is desirable that / L1 2.5.

In addition, since the contact area with the second substrate is reduced, a large pressure is applied when an external pressure is applied. It takes somewhere. This causes deterioration of the spacer strength. In the present invention, 0. The spacer strength was strengthened by setting 6 L3 / L1 1.2.

The height H of the columnar spacer is controlled within a free range depending on the conditions of the columnar spacer forming process. Therefore, it may be set to a desired value as appropriate. For example, in a liquid crystal display device, the Optimal according to the liquid crystal material used in the device (TN liquid crystal, ferroelectric liquid crystal, antiferroelectric liquid crystal, etc.) Set the substrate spacing (0.5 μm to 10 μm, preferably 1.2 μm to 5 μm).

Further, as the material of the columnar spacer, an insulator (insulating film) made of a resin material is desirable. Po An insulating film made of a resin material such as reimide can be formed by applying a solution, but solution coating The cloth-based insulating film is very suitable for filling minute holes. Of course, apply the solution and shape A silicon oxide film or the like formed may be used. Also, when using an insulating film made of resin material In that case, a photopolymerization type insulating film may be used, or a heat polymerization type insulating film may be used. Especially positive or negative It is preferable to use a photosensitive resin because a columnar spacer can be formed in a simple process. Further, it is desirable to use a resin material having negative photosensitivity in order to avoid photodegradation.

Further, the cross-sectional shape of the columnar spacer in the radial direction may be circular or elliptical. There may be. Furthermore, it may be a triangle, a quadrangle, or a polygon larger than that. Good.

In addition, the columnar spacers are regularly arranged as shown in FIG. In Figure 2, 6 One columnar spacer 202 is arranged per pixel (6 rows x 1 column), but in particular Not limited, 10-200 pieces / mm²It may be arranged at the density of. 201 in Fig. 2 is pixel power The pole, 203, is a contact portion in which a columnar spacer is not formed. Also, in Fig. 2. Is formed at the position on the contact part where the TFT and the pixel electrode are connected, but is particularly limited. I can't. For example, above the wiring (source wiring, gate wiring, capacitance wiring, etc.) or on the light-shielding film. It is preferable to form it upward because it does not affect the transmittance. In addition, the columnar spacers other than the pixel part For example, in the drive circuit, the area where the element does not exist, the seal area, between the pixel part and the drive circuit. Area, the area between the pixel part and the seal area, the area between the drive circuit and the seal area, the seal area It may be formed in the region between the region and the edge of the substrate. The area between the seal area and the edge of the substrate When formed in, the pressure is evenly applied to the substrate in the bonding process and the substrate division process. , Yield is improved. In addition, a pillar is connected to the wiring from the terminal that connects the FPC to the drive circuit. By forming the shape spacer, the mechanical strength of the part connected to the FPC can be reinforced.

The method for producing a columnar spacer of the present invention having the above shape will be briefly described below. Note that FIG. 3 shows a cross-sectional view of the process of the present invention, and FIG. 4 is a flowchart showing the process sequence. is there.

First, the first substrate 300 in which the switching element and the pixel electrodes are formed in a matrix is formed. Form. In addition, a second substrate 304 on which the electrodes are formed is formed. In addition, Fig. 3 shows the simplification. Therefore, switching elements, pixel electrodes, etc. are not shown. Then with the first substrate 300 After forming the alignment films 301 and 305 on the second substrate 304, respectively, the rubbing treatment is performed. .. (Fig. 3 (a))

Next, the spacer material layer 302 is formed on the alignment film 301 of the first substrate. (Fig. 3 (b) )) Here, an example in which a columnar spacer is formed on the first substrate is shown, but on the second substrate. It may be a step of forming a columnar spacer.

The spacer material layer 302 formed in this way is covered with a columnar spacer pattern via an exposure mask. After exposing the particles, a developing process is performed to form a columnar spacer 303. (Fig. 3 (c))

Then, the sealing material pattern 30 is formed on the second substrate 304 on which the electrodes and the alignment film 305 are formed. Form 6. The sealing material pattern is a rectangle forming a liquid crystal injection port and has the same width. Form a frame. Although an example in which a seal region is formed on the second substrate is shown here, the first It may be a step of forming a seal region on the substrate of the above. And the first substrate 300 and the second base Stick the boards 304 together. The bonding process uses alignment marks to accurately bond This is a process in which the sealing material is hardened by pressure firing after the bonding. (Fig. 3 (d))

After that, the first substrate and the second substrate are divided into appropriate sizes, and the liquid crystal material is cut from the liquid crystal injection port. After injecting the charge 307, the injection port is sealed. In this way, the liquid crystal panel is completed.

Further, in the above step, after forming an alignment film on the first substrate, a columnar spacer is formed on the alignment film. An example of this is shown, but as shown in FIG. 14, the columnar spacer 110 is placed on the first substrate 1100. After forming 2, the step may be a step of forming an alignment film 1103 on the alignment film 1103.

Also, as a process of forming a color filter or a shielding film on the first substrate or the second substrate. May be good.

Further, although an example of an active matrix type liquid crystal display device is shown here, it is particularly limited. Absent. For example, it can be applied to a simple matrix type liquid crystal display device, and even if the display method is TN type, S It may be a TN type, a transmissive type, or a reflective type.

The invention of the present application having the above configuration will be described in more detail with reference to the following examples. I will do it.

<p>Examples of the present invention will be described with reference to FIGS. 5 to 8. Here, it is installed in and around the pixel section. A method of simultaneously producing a drive circuit that can be driven will be described. However, for the sake of simplicity Regarding the drive circuit, the CMO, which is the basic circuit of the shift register circuit, buffer circuit, etc. The S circuit and the n-channel TFT forming the sampling circuit will be illustrated.</p><p> In FIG. 5 (A), it is desirable to use a glass substrate or a quartz substrate for the substrate 501. I. In addition, an insulating film was formed on the surface of a silicon substrate, metal substrate, or stainless steel substrate. A thing may be used as a substrate. A plastic substrate can also be used if heat resistance allows.</p><p> Then, on the surface of the substrate 501 on which the TFT is formed, an insulating film containing silicon (silicon) ( In the present specification, a generic term for a silicon oxide film, a silicon nitride film, or a silicon nitride film is used. The base film 502 made of (s) is 100 to 400 nm thick by plasma CVD method or sputtering method. To form.</p><p> In the present specification, the silicon nitride film is an insulating film represented by SiOxNy. , Silicon, oxygen, nitrogen in a predetermined ratio. In this embodiment, the base film 502 is used. 100 nm thick with nitrogen in 20-50 atomic% (typically 20-30 atomic%) Contains silicon nitride film and nitrogen at 1-20 atomic% (typically 5-10 atomic%) A laminated film with a 200 nm thick silicon nitride film is used. The thickness is limited to this value. No need. In addition, the content ratio (atomic% ratio) of nitrogen and oxygen contained in the silicon nitride film is It may be 3: 1 to 1: 3 (typically 1: 1). The silicon nitride film is Si. H₄And N₂O and NH₃May be produced as a raw material gas.</p><p> The base film 502 is provided to prevent impurity contamination from the substrate. When a quartz substrate is used, it is not always necessary to provide it.</p><p> Next, on the base film 502, a thickness of 30 to 120 nm (preferably 50 to 70 nm), non- Semiconductor film containing a crystalline structure (amorphous silicon film (not shown) in this example) ) Is formed by a known film forming method. The semiconductor film containing an amorphous structure is an amorphous semiconductor. There are membranes and microcrystalline semiconductor membranes, and also includes amorphous structures such as amorphous silicon germanium membranes. Compound semiconductor film is also included. In addition, if it is formed with the above film thickness, the TFT is finally completed. The film thickness of the active layer at that time is 10 to 100 nm (preferably 30 to 50 nm).</p><p> Then, it is described in Japanese Patent Application Laid-Open No. 7-130652 (corresponding to USP 5,643,826). Semiconductor film containing a crystal structure (crystalline silicon film in this example) 503 according to the technique To form. The technique described in the publication promotes crystallization when crystallization of an amorphous silicon film. Catalytic elements (nickel, cobalt, germanium, tin, lead, palladium, iron, copper It is a crystallization means using one or more kinds of elements, typically nickel).</p><p> Specifically, the heat treatment is performed with the catalytic element retained on the surface of the amorphous silicon film, and the surface is not treated. It changes a crystalline silicon film into a crystalline silicon film. In this example, the publication is carried out. Although the technique described in Example 1 is used, the technique described in Example 2 may be used. In addition, the conclusion Crystalline silicon films include so-called single crystal silicon films and polycrystalline silicon films. The crystalline silicon film formed in the example is a silicon film having grain boundaries. (Fig. 5 (A) )</p><p> The amorphous silicon film is preferably heated at 400 to 550 ° C for several hours, although it depends on the hydrogen content. It is hoped that the dehydrogenation treatment will be carried out to reduce the hydrogen content to 5 atom% or less and carry out the crystallization process. Good. Further, even if the amorphous silicon film is formed by another manufacturing method such as a sputtering method or a thin film deposition method, It is good, but it is desirable to sufficiently reduce the impurity elements such as oxygen and nitrogen contained in the film. I.</p><p> Here, the base film and the amorphous silicon film can be formed by the same film forming method. You may form both continuously with. After forming the undercoat, prevent it from being exposed to the atmosphere. This makes it possible to prevent surface contamination and reduce variations in the characteristics of the manufactured TFTs. Can be made.</p><p> Next, the crystalline silicon film 503 is illuminated with light (laser light) emitted from a laser light source. Crystalline silicon film 504 with improved crystallinity by irradiation (hereinafter referred to as laser annealing) Form. As the laser light, pulse oscillation type or continuous oscillation type excimer laser light is used. Although desirable, continuous oscillation type argon laser light may be used. Also, the beam shape of the laser beam May be linear or rectangular. (Fig. 5 (B))</p><p> Also, instead of laser light, the light emitted from the lamp (hereinafter referred to as lamp light) is irradiated (hereinafter referred to as lamp light). Below, it may be called lamp annealing). Halogen lamps and infrared lamps are used as lamp light. Lamp light emitted from a lamp or the like can be used.</p><p> The process of performing heat treatment (annealing) with laser light or lamp light in this way is performed by light. This is called the annealing process. Since the photoannealing process can perform high-temperature heat treatment in a short time, glass substrates, etc. Perform an effective heat treatment process with high throughput even when using a substrate with low heat resistance. Can be done. Of course, since the purpose is annealing, furnace anneal using an electric heating furnace (thermal ani) It can also be used as a substitute.</p><p> In this embodiment, the pulse oscillation type excimer laser light is processed into a linear shape and laser annealing is performed. Do the same. For laser annealing conditions, XeCl gas is used as the excitation gas, and the processing temperature is set to a chamber. Temperature, pulse oscillation frequency is 30Hz, laser energy density is 250 ~ 500mJ / cm²(Typically 350 ~ 400mJ / cm²).</p><p> The laser annealing step performed under the above conditions completely removes the amorphous region remaining after thermal crystallization. It has the effect of reducing defects and the like in the crystalline region that has already been crystallized. So Therefore, this step is a step of improving the crystallinity of the semiconductor film by photoannealing, or a step of improving the crystallinity of the semiconductor film. It can also be called a process that promotes crystallization. Such an effect is the best condition for lamp annealing. It can also be obtained by optimizing. In the present specification, such a condition is referred to as the first item. We will call it the Neil condition.</p><p> Next, the crystalline silicon film 504 is patterned to form an island-shaped semiconductor film (hereinafter referred to as an active layer). C) Form 505 ~ 508. At the same time, the position at the time of future patterning Alignment markers used for squeezing are formed using a crystalline silicon film. Of this example In the case, the alignment marker can be formed at the same time as the formation of the active layer. It is possible to prevent the trouble of separately forming the ment marker (increase in the number of masks).</p><p> Next, a protective film 509 is formed on the active layers 505 to 508 for later addition of impurities. Protective film 509 is 100 to 200 nm (preferably 130 to 170 nm) Use a silicon nitride or silicon oxide film of the same thickness. This protective film 509 is an impurity Delicate concentration control to prevent the crystalline silicon film from being directly exposed to plasma during addition There is a meaning to make it possible. (Fig. 5 (C))</p><p> Then, a resist mask 510 is formed on the resist mask 510, and p-type is imparted via the protective film 509. Impurity element (hereinafter referred to as p-type impurity element) is added. As a p-type impurity element, On the surface, elements belonging to Group 13, typically boron or gallium, can be used. This process (called the channel doping process) is a process for controlling the threshold voltage of the TFT. is there. Here, diborane (B)₂H₆) Is plasma-excited without mass separation Boron is added by the poop method. Of course, the ion implantation method that separates the mass is used. You may.</p><p> Thus 1x10¹⁵~1×10¹⁸atoms / cm³(Typically 5 × 10¹⁶~5×10¹⁷atoms /cm³) To the active layer 511 to 51 to which the p-type impurity element (boron in this example) was added. 3 is formed. These active layers 511 to 513 will later become the active layers of the n-channel TFT. However, all the concentrations described in this specification are measured values by SIMS (mass secondary ion analysis). is there.</p><p> In this specification, an impurity region containing a p-type impurity element at least in the above concentration range (however, And 1x10¹⁶atoms / cm³Impurity element that imparts n-type at the concentration of, typically phosphorus or arsenic The region to which is added) is defined as the p-type impurity region (b). (Fig. 5 (D))</p><p> Next, the resist mask 510 is removed to form new resist masks 514a to 514d. To do. Then, an impurity element that imparts n-type (hereinafter referred to as n-type impurity element) is added to n It forms mold-bearing impurity regions 515-517. A representative n-type impurity element Elements belonging to Group 15 can be used, typically phosphorus or arsenic. (Fig. 5 ( E))</p><p> This low-concentration impurity region 515 to 517 will later be used in CMOS and sampling circuits. This is an impurity region for functioning as an LDD region in an n-channel TFT. Na Oh, there are 2 × 10 n-type impurity elements in the impurity region formed here.¹⁶~5×10¹⁹atoms / cm³(Typically 5 × 10¹⁷~5×10¹⁸atoms / cm³) Concentration. In the present specification Defines an impurity region containing an n-type impurity element in the above concentration range as an n-type impurity region (b).</p><p> Here, phosphine (PH)₃) Is plasma-excited without mass separation Phosphorus 1 × 10 by the poop method¹⁸atoms / cm³Add at the concentration of. Of course, Ion a that performs mass separation The plantation method may be used. In this step, crystalline siri is passed through the protective film 509. Phosphorus is added to the film.</p><p> Next, the resist masks 514a to 514d and the protective film 509 are removed, and the laser beam is again applied. Perform the irradiation process. Again, the laser light is a pulse oscillation type or continuous oscillation type exhibition. Male laser light is preferable, but continuous oscillation type argon laser light may also be used. Also laser The beam shape of the light may be linear or rectangular. However, the source of added impurities Since the purpose is to activate the element, irradiate with energy that does not melt the crystalline silicon film. Is preferable. It is also possible to perform the laser annealing process with the protective film 509 attached. It is possible. (Fig. 5 (F) )</p><p> In this embodiment, the pulse oscillation type excimer laser light is processed into a linear shape and laser annealing is performed. Do the same. For laser annealing conditions, KrF gas is used as the excitation gas, and the treatment temperature is room temperature. , Pulse oscillation frequency is 30Hz, laser energy density is 100 ~ 300mJ / cm²( Typically 150 ~ 250mJ / cm²).</p><p> The photoannealing step performed under the above conditions is an impurity source that imparts the added n-type or p-type. The effect of activating the element and recrystallizing the amorphous semiconductor film when an impurity element is added. Have. It should be noted that the above conditions ensure that the atomic arrangement is consistent without melting the semiconductor film, and It is preferable to activate the impurity element. In addition, this process is n-type by photoannealing. Is the step of activating the impurity element that imparts p-type, the step of recrystallizing the semiconductor film, or It can also be called a process of performing these at the same time. Such an effect is the best condition for lamp annealing. It can also be obtained by optimizing. In the present specification, such a condition is referred to as the second item. We will call it the Neil condition.</p><p> By this step, the boundary portion of the n-type impurity region (b) 515 to 517, that is, the n-type impurity region With the true region existing around (b) (the p-type impurity region (b) is also considered to be substantially true) The joint of is clarified. This later became the LDD area when the TFT was completed. This means that the channel forming region can form a very good junction.</p><p> When activating the impurity elements by this laser light, heat treatment using an electric heating furnace was performed. Activation may be used in combination. When activating by heat treatment, consider the heat resistance of the substrate. Then, the heat treatment may be performed at 450 to 650 ° C (preferably 500 to 550 ° C).</p><p> Next, the gate insulating film 518 is formed by covering the active layers 505 and 511 to 513. Gate The insulating film 518 may be formed to a thickness of 10 to 200 nm, preferably 50 to 150 nm. I. In this example, N is performed by the plasma CVD method.₂O and SiH₄Silicon nitride film made from Is formed to a thickness of 115 nm. (Fig. 6 (A))</p><p> Next, a conductive film to be a gate wiring is formed. The gate wiring is made of a single-layer conductive film. However, it is preferable to use a laminated film having two or three layers, if necessary. In this example Form a laminated film composed of the first conductive film 519 and the second conductive film 520. (Fig. 6 (B))</p><p> Here, the first conductive film 519 and the second conductive film 520 include tantalum (Ta) and titanium (T). i), molybdenum (Mo), tungsten (W), chromium (Cr), niobium (Nb), shi A metal film containing an element selected from recon (Si), or an intermetallic compound containing the element as a main component. Material film (typically tantalum nitride film, tungsten nitride film, titanium nitride film), or the original Alloy film combining elements (typically Mo-W alloy film, Mo-Ta alloy film, tungsten Silicide film) or a laminated film in which these thin films are laminated can be used.</p><p> The first conductive film 519 is set to 10 to 50 nm (preferably 20 to 30 nm), and the second conductor is set to 10 to 50 nm. The electric film 520 may be 200 to 400 nm (preferably 250 to 350 nm). Real In the example, a 50 nm thick tantalum nitride (TaN) film was used as the first conductive film 519, and the second conductor was used. As an electric film 520, 350 nm thick tantalum (Ta) Use a membrane.</p><p> In addition, a laminated film of a tungsten nitride film and a tungsten film, and a single tantalum nitride film only. Layered films and tungsten silicide films are also suitable. Also, silicon under the first conductive film 519 If the film is formed with a thickness of about 2 to 20 nm (polyside structure), it is on the silicon film. It is possible to improve the adhesion of the conductive film formed on the surface and at the same time suppress the oxidation of the conductive film. To.</p><p> Further, when a metal film is used as the second conductive film 520 as in this embodiment, the surface thereof is unshaped. Nitriding by exposing to a plasma atmosphere using monia gas or nitrogen gas is also effective. To. By doing so, it is possible to suppress the oxidation of the surface of the metal film.</p><p> Next, the first conductive film 519 and the second conductive film 520 are etched at once to a thickness of 400 nm. Gate wiring (also called gate electrode) 521 to 524a and 524b are formed. At this time The gate wiring 522 and 523 formed in the dynamic circuit are in the n-type impurity region (b) 515 to 517. It is formed so as to overlap with a part through a gate insulating film. The gate wirings 524a and 524b appear to be two in cross section, but they are actually connected continuously. It is formed from one pattern. (Fig. 6 (C))</p><p> Next, using the gate wirings 521 to 524 as a mask, n-type impurity elements are self-aligned (this implementation). In the example, phosphorus) is added. The n-type non-type is formed in the impurity regions 525 to 530 thus formed. Concentration of 1/2 to 1/10 (typically 1/3 to 1/4) of the pure region (b) (however, as described above Concentration 5 to 10 times higher than the concentration of boron added in the channel doping process, typically 1 × Ten¹⁶~5×10¹⁸atoms / cm³, Typically 3x10¹⁷~3×10¹⁸atoms / cm³,) With phosphorus Is adjusted so that In the present specification, n-type impurity elements are included in the above concentration range. The impurity region is defined as the n-type impurity region (c). (Fig. 6 (D))</p><p> The n-type impurity region (c) 527 to 530 has already been 1 × 10 in the channel doping process.¹⁵ ~1×10¹⁸atoms / cm³Boron with the same concentration is added, but in this process, the p-type impurity region Since phosphorus is added at a concentration 5 to 10 times that of boron contained in region (b), the effect of boron is You can ignore it.</p><p> However, strictly speaking, the part of the n-type impurity region (b) 515 to 517 that overlaps the gate wiring Phosphorus concentration is 2 × 10¹⁶~5×10¹⁹atoms / cm³While it remains, it is heavy on the gate wiring The part that does not become it is 1 × 10¹⁶~5×10¹⁸atoms / cm³Concentration of phosphorus is added, It will contain phosphorus at a slightly higher concentration.</p><p> Next, the gate insulating film 518 is self-aligned with the gate wirings 521 to 524 as masks. To itch. The dry etching method is used for etching, and CHF is used as the etching gas.₃Gas may be used. However, the etching gas does not have to be limited to this. In this way Gate insulating films 531 to 534a and 534b are formed under the wiring. (Fig. 6 (E))</p><p> By exposing the active layer in this way, it is added when the next step of adding the impurity element is performed. The speed voltage can be lowered. Therefore, the amount of dose required is also small. -Put improves. Of course, the gate insulating film is left unetched and through-doping. Impurity region may be formed by.</p><p> Next, resist masks 535a to 535d are formed so as to cover the gate wiring, and an n-type impurity source is formed. Element (phosphorus in this example) is added to form impurity regions 536 to 544 containing phosphorus at high concentration. To do. Again, Phosphine (PH₃) Ion doping method (of course, ion imp The lantern method is also acceptable), and the phosphorus concentration in this region is 1 × 10.²⁰~1×10²¹at oms / cm³(Typically 2x10²⁰~5×10²¹atoms / cm³). (Fig. 6 (F))</p><p> In the present specification, the impurity region containing the n-type impurity element in the above concentration range is defined as the n-type impurity region. Defined as region (a). In addition, the pre-process has already been performed in the region where the impurity regions 536 to 544 are formed. Contains phosphorus or boron added in, but with a sufficiently high concentration of phosphorus added Therefore, it is not necessary to consider the influence of phosphorus or boron added in the previous step. Therefore, Honmei Impurity regions 536 to 544 may be paraphrased as n-type impurity regions (a) in the detailed writing.</p><p> Next, the resist masks 535a to 535d are removed to form a new resist mask 545. To do. Then, a p-type impurity element (boron in this example) is added, and boron is contained in a high concentration. It forms impurity regions 546 and 547. Here diborane (B₂H₆) Using ion dough 3 × 10 by the implantation method (of course, the ion implantation method is also acceptable)²⁰~3×10²¹at oms / cm³(Typically 5 × 10²⁰~1×10²¹atoms / cm³) Add boron at a concentration. It should be noted that , In the present specification, the impurity region containing the p-type impurity element in the above concentration range is referred to as the p-type impurity region (a). ). (Fig. 7 (A))</p><p> A part of the impurity regions 546 and 547 (the above-mentioned n-type impurity region (a) 536 and 537) ) Is already 1x10²⁰~1×10²¹atoms / cm³Phosphorus is added at the concentration of, but here Boron to be added is added at a concentration at least three times that of boron. Therefore, it is pre-formed The n-type impurity region that had been removed is completely inverted to P-type and functions as a P-type impurity region. Subordinate Therefore, in this specification, the impurity regions 546 and 547 may be paraphrased as the p-type impurity region (a). I do not care.</p><p> Next, after removing the resist mask 545, the first interlayer insulating film 548 is formed. 1st layer The inter-insulating film 548 includes an insulating film containing silicon, specifically, a silicon nitride film and silicon oxide. It may be formed of a film, a silicon nitride film, or a laminated film in which they are combined. Also, the membrane The thickness may be 50 to 400 nm (preferably 100 to 200 nm).</p><p> In this example, SiH is used by the plasma CVD method.₄, N₂O, NH₃As a raw material gas, 200n Use an m-thick silicon nitride film (however, the nitrogen concentration is 25 to 50 atomic%). This first layer The inter-insulating film 548 is used for the gate wiring 521 ~ in the next heat treatment step (activation step). It has the effect of preventing 524a and 524b from being oxidized and increasing the resistance value.</p><p> Then heat is applied to activate the n-type or p-type impurity elements added at the respective concentrations. Perform the processing process. This process can be Furnace anneal, Laser anneal, or Rapid. It can be performed by the dothermal annealing method (RTA method). Here, the furnace anneal method Perform the activation step at. This heat treatment step is preferred at 300-650 ° C in a nitrogen atmosphere. Heat treatment is performed at 400 to 550 ° C, here at 550 ° C, for 4 hours. (Fig. 7 (B))</p><p> At this time, the catalyst element used for crystallization of the amorphous silicon film in this example (in this example, Nickel) moves in the direction indicated by the arrow, and the high concentration formed in the step of FIG. 6 (F) described above. It is captured (gettered) in the area containing phosphorus. This is a get-together of metal elements due to phosphorus This is a phenomenon caused by the aging effect, and as a result, the later channel forming regions 549 to 553 are described above. The concentration of catalytic element is 1 × 10¹⁷atoms / cm³It becomes as follows. However, in the case of nickel, 1 x 10¹⁷a toms / cm³The following is the lower limit of SIMS measurement, so it cannot be measured with the current technology.</p><p> On the contrary, the region that became the gettering site of the catalyst element (impurity region in the process of Fig. 6 (F)) In the region where regions 536 to 544 are formed), the catalytic elements segregate to a high concentration and 5 × 10¹⁸atoms / cm³Above (typically 1x10¹⁹~5×10²⁰atoms / cm³) Will be present at concentration. Deer However, this gettering site area functions as a source area or drain area. It is considered that the presence or absence of nickel does not matter.</p><p> Next, heat treatment at 300 to 450 ° C for 1 to 12 hours in an atmosphere containing 3 to 100% hydrogen. The process of hydrogenating the active layer is performed. This process is semi-conducted by thermally excited hydrogen This is the process of terminating the dangling bond of the body layer. Plasma water as another means of hydrogenation Dehydrogenation (using hydrogen excited by plasma) may be performed.</p><p> After the activation step is completed, a second interlayer insulating film 548 having a thickness of 500 nm to 1.5 μm is placed on the first interlayer insulating film 548. An interlayer insulating film 554 is formed. In this embodiment, the second interlayer insulating film 554 has a thickness of 800 nm. A silicon oxide film is formed by a plasma CVD method. In this way, the first interlayer insulating film (nitriding oxidation) 1 μm consisting of a laminated film of silicon film) 548 and second interlayer insulating film (silicon oxide film) 554 A thick interlayer insulating film is formed.</p><p> The second interlayer insulating film 554 is polyimide, acrylic, polyamide, or polyimide. It is also possible to use an organic resin insulating film such as amide or BCB (benzocyclobutene).</p><p> Then a contact hole that reaches the source or drain area of each TFT Is formed to form source wiring 555 to 558 and drain wiring 559 to 562. Na Although not shown, drain wiring 559 and 560 are the same to form a CMOS circuit. It is formed by one wiring. Further, in this embodiment, this electrode is used, the Ti film is 100 nm, and Ti is used. Three layers in which an aluminum film including 300 nm and a Ti film of 150 nm are continuously formed by a sputtering method. It is a laminated film with a structure.</p><p> Next, as the passivation film 563, a silicon nitride film, a silicon oxide film, or nitrogen is used. Formed with a silicon oxide film with a thickness of 50 to 500 nm (typically 200 to 300 nm) To. (Fig. 7 (C))</p><p> At this time, H prior to the formation of the film₂, NH₃Plasma treatment is performed using a gas containing isohydrogen. It is effective to perform heat treatment after film formation. The hydrogen excited by this pretreatment is the first and first It is supplied in a two-layer insulating film. By performing heat treatment in this state, the passivation membrane 5 While improving the film quality of 63, hydrogen added in the first and second interlayer insulating films spreads to the lower layer side. Since it disperses, the active layer can be effectively hydrogenated.</p><p> Further, after forming the passivation film 563, a hydrogenation step may be further performed. For example, heat treatment at 300 to 450 ° C for 1 to 12 hours in an atmosphere containing 3 to 100% hydrogen. It is good to do the reason, or the same effect was obtained by using the plasma hydrogenation method.</p><p> Here, a contact hole for connecting the pixel electrode and the drain wiring will be formed later. An opening may be formed in the passivation film 563 at such a position.</p><p> After that, as shown in FIG. 7 (D), an insulating film made of a resin material (also referred to as an organic material) (also referred to as an organic material) ( Hereinafter, it may be referred to as a flattening film as well as a third interlayer insulating film (hereinafter referred to as a resin insulating film). 564 is formed to a thickness of about 1-3 μm (typically 1.5-2 μm).</p><p> Resin materials include polyimide, acrylic, polyamide, polyimide amide, and BCB ( Benzocyclobutene), cycloten and the like can be used. Use a resin insulating film The advantages of this are that it is extremely flat and has a low relative permittivity. It should be noted that the above-mentioned Other resin insulating films, organic SiO compounds, and the like can also be used. Also, even the flatness is high If so, it is also possible to use an insulating film made of an inorganic material.</p><p> Here, a type of acrylic film that polymerizes by heat after being applied to the substrate is used, but it is irradiated with light. You may use the type which polymerizes by. Of course, it is a positive or negative photosensitive material. Is also good.</p><p> Further, a resin film colored with a pigment or the like is provided as a part of the third interlayer insulating film 564, and the color is increased. -It can also be used as a filter.</p><p> Next, in the pixel portion, a shielding film is placed on the third interlayer insulating film (flattening film) 564 made of a resin material. Form 565. In the present specification, the shielding film blocks light or electromagnetic waves. Refers to a conductive film having properties.</p><p> Shielding film 565 is selected from aluminum (Al), titanium (Ti), and tantalum (Ta). The main component is a metal film composed of the above elements or any of the above elements (50% by weight or more in the present specification). It is formed to a thickness of 100 to 300 nm with a metal film to be regarded as the main component when it is contained in. Book In the example, an aluminum film containing 1 wt% titanium is formed to a thickness of 125 nm. Na In the present specification, this shielding film may be referred to as a first conductive film.</p><p> In this embodiment, the silicon oxide film is set to 5 to 50 nm (typically) before the shielding film 565 is formed. It is formed to a thickness of 20 to 30 nm). Then, a shielding film 565 is formed on it. , The insulating film is etched using the shielding film 565 as a mask, and the acid represented by 566 is obtained. A siliconized silicon film is formed.</p><p> This silicon oxide film 566 enhances the adhesion between the third interlayer insulating film 564 and the shielding film 565. However, in areas other than the presence of the shielding film, the contact ho is later applied to the third interlayer insulating film. It is desirable to remove it because it becomes an obstacle in forming the le. The third interlayer insulating film 564 CF on the surface of₄By applying plasma treatment using gas, the surface is modified on the film. The adhesion of the forming shielding film can be improved.</p><p> In addition, using this titanium-containing aluminum film, not only the shielding film but also other connection arrangements It is also possible to form a line. For example, by forming a connection wiring that connects the circuits in the drive circuit. Wear. However, in that case, before forming the material that forms the shielding film or the connection wiring, the third It is necessary to form a contact hole in the interlayer insulating film.</p><p> Next, a known anodizing method or plasma oxidation method (anodizing in this embodiment) is applied to the surface of the shielding film 565. Oxide method) to form an oxide with a thickness of 20 to 100 nm (preferably 30 to 50 nm). To. In this embodiment, a film containing aluminum as a main component is used as the shielding film 565, and an anodizing method is used. An aluminum oxide film (alumina film) is formed as the anodic oxide 567. .. This anodized oxide 567 serves as a dielectric having a holding capacity of this embodiment.</p><p> In addition, here, the anodizing method was used to provide an insulator only on the surface of the shielding film, but other Insulation (insulating film) by vapor phase method such as plasma CVD method, thermal CVD method or sputtering method May be formed. Even in that case, the film thickness is 20 to 100 nm (preferably 30 to 50 nm). Is preferable.</p><p> Next, the drain wiring 562 is reached in the third interlayer insulating film 564 and the passivation film 563. A contact hole is formed to form a pixel electrode 569. The pixel electrodes 570 and 57 1 is a pixel electrode of another pixel adjacent to each other. In this embodiment, the pixel electrodes 569 to 571 A transparent conductive film is used as the material, and specifically, an indium tin oxide (ITO) film of 110 nm is used. It is formed to a thickness by a sputtering method. In the present specification, the pixel electrode is referred to as a "second conductive film". There is a match.</p><p> When using a reflective liquid crystal display device, a metal film may be used as the material for the pixel electrodes. I.</p><p> At this time, the pixel electrode 569 and the shielding film 565 overlap with each other via the anodized oxide 567. Form a retention capacity (capacity storage or capacitor) 572. In addition, it should be noted. Only the holding capacity 572 is marked, but the entire area where the shielding film and the pixel electrode overlap is held. Functions as capacity.</p><p> In addition, it is necessary because an alumina film with a high relative permittivity of 7 to 9 was used as the dielectric material for the holding capacity. It is possible to reduce the area for forming a large capacity. Furthermore, in this embodiment By using the shielding film formed on the pixel TFT as one of the holding capacitance electrodes, it is active. The aperture ratio of the image display unit of the matrix type liquid crystal display device can be improved.</p><p> In this case, the shielding film 565 is either floating (electrically isolated) or fixed. Set to potential, preferably common potential (intermediate potential of image signal sent as data) It is desirable to do so.</p><p> An active matrix substrate (No. 1) on which pixel TFTs and pixel electrodes are formed through the above steps. 1 substrate) was formed.</p><p> Next, from the active matrix substrate (first substrate), the active matrix type liquid crystal table The process of manufacturing the display device will be described. First, the first group that formed the pixel TFT and the pixel electrode An alignment film 573 was formed on the plate. Further, the facing substrate (second substrate) 574 has a transparent conductive film. 575 and an alignment film 576 are formed. If necessary, color fill the second substrate. A tar or a shielding film may be formed. In this example, a polyimide film is used as the alignment film. Orientation Membrane 573 was applied with a roll coater and then heated at 200 ° C. for 90 minutes. The alignment film It is preferable to clean the first substrate before forming the 573. After that, the low with the cloth attached Rubbing the surface of the alignment film with a rar, the liquid crystal molecules have a certain pretilt angle (6 ° to 10 °, preferably The rubbing orientation treatment was performed so that the orientation was held at 7 ° to 8 °).</p><p> Next, a photosensitive acrylic resin (NN700: J) was used as a spacer material layer on the alignment film 573. SR) was spin-coated at 900 rpm to a film thickness of 4.7 μm. Then hot pre The mixture was heated at 80 ° C. for 3 minutes. The thickness of the photosensitive acrylic resin film after heating is 4.0. It was set to μm.</p><p> A pattern of columnar spacers (on the spacer material layer thus formed) via an exposure mask ( Size: 6 μm square) was exposed and then developed. The development conditions are CD-70 as a developer. Using 0 (TMAH 0.14%), the liquid temperature was 18 ± 1 ° C and the development time was 60 seconds. Next Then, it was heated at 180 ° C. for 1 minute using a clean oven.</p><p> In this way, a columnar spacer 568 was formed on the first substrate. (Fig. 8 (A)) In addition, the columnar spacer 568 can be freely designed for its formation position, so the image table The display area can be effectively used. Depending on the developer, the pre-tilt angle may be 4 ° to 5 °. Changed to.</p><p> FIG. 12 shows a view of the pixel structure of this embodiment as viewed from above. In this embodiment as shown in FIG. Is a columnar space on the contact portion 65 where the pixel TFT and the pixel electrode 62 are electrically connected. Provide a service 63. Also, in FIG. 12, 565 is a shielding film, which is illustrated above it. A pixel electrode 62 is provided via a non-oxide 567. At this time, the shielding film 565, A holding capacity of 64a to 64c is formed by the oxide 567 and the pixel electrode 62. With the structure of this embodiment By doing so, a step (thickness of the interlayer insulating film 564) formed in the contact portion can be embedded. It is possible to prevent the liquid crystal molecules from being misaligned due to the step.</p><p> As described above, in this embodiment, a columnar spacer is formed at the contact portion between the TFT and the pixel electrode. The columnar spacer 568 is used as an image display area such as on a shielding film or source wiring. It is not particularly limited as long as it is formed in an unused region. In this embodiment, 1 mm²Around About 100 pixels were regularly arranged in the pixel section. In the cross section of the columnar spacer of this example The SEM observation photograph is shown in FIG. 17 (A). In addition, the SEM observation photograph showing the appearance is shown in the figure. 1 (A). Fig. 2 (A) shows the arranged schematic diagram, and Fig. 2 (B) and Fig. 2 (C). Shows SEM observation photographs with different magnifications corresponding to FIG. 1 (A).</p><p> The shape of this columnar spacer has almost no taper, has a flat surface on the crown, and is high. H = 4 μm, width L1 = 6 μm, radius of curvature was 1 μm or less. Also, of columnar spacers The angle α between the tangent plane and the substrate surface at the center of the side surface is 85 ° to 95 °, which is almost vertical. Met. With such a shape, light leakage can be reduced.</p><p> Then, the pixel portion, the active matrix substrate on which the drive circuit is formed, and the facing substrate are formed. It is bonded via a sealing material 579 by a known cell assembly process. In this embodiment, The substrate spacing was kept constant by using a sealing material containing Ra 580. Further, in this embodiment, a columnar spacer 568 made of a highly elastic resin material is used. , The pressure applied in the bonding process can be absorbed (relaxed). In addition, the space of this embodiment Since the contact area with the element is larger than that of the beaded spacer, the sensor is excessive in a specific part. There is no pressure.</p><p> After that, liquid crystal 578 is injected between the two substrates and completely sealed with a sealant (not shown). To. A known liquid crystal material may be used for the liquid crystal. In this way, the Acty shown in Fig. 8 (B) The Bumatrial liquid crystal display device is completed.</p><p>In FIG. 8B, the drive circuit is a p-channel type TFT701 and an n-channel type T. FT702 and 703 are formed, and the pixel part is a pixel TFT704 consisting of an n-channel type TFT. Is formed.</p><p> The process order of this embodiment may be changed as appropriate. Final in any order If the structure of the TFT formed is as shown in Fig. 8 (B), the active matrix group The basic function of the board does not change and does not impair the effect of the present invention.</p><p> The p-channel type TFT701 of the drive circuit has a channel formation area 601 and a source area 60. 2. The drain region 603 is formed in the p-type impurity region (a), respectively. However, in reality 1x10 in part of the source or drain area²⁰~1×10²¹atoms / cm³Phosphorus at the concentration of There is an area containing. In addition, the catalyst gettered in the process shown in Fig. 7 (B) is in that area. Element is 5x10¹⁸atoms / cm³Above (typically 1x10¹⁹~5×10²⁰atoms / cm³) At concentration Exists.</p><p> In addition, the n-channel type TFT702 includes a channel formation area 604, a source area 605, and the like. Gate insulation on one side (drain region side) of the drain region 606 and the channel formation region The LDD region that overlaps the gate wiring via the membrane (in the present specification, such a region is referred to as the Lov region. That is. In addition, ov is attached to mean overlap. ) 607 is formed. At this time, the Lov area 607 is 2x10¹⁶~5×10¹⁹atoms / cm³Phosphorus at the concentration of, and the gate wiring and the whole It is formed so as to overlap.</p><p> In addition, the n-channel type TFT703 includes a channel formation area 608, a source area 609, and the like. LDD regions 611 and 612 are formed on both sides of the drain region 610 and the channel formation region. Was done. In this structure, a part of LDD areas 611 and 612 overlaps with the gate wiring. LDD area (Lov area) that overlaps the gate wiring through the gate insulating film because it was placed in ) And the LDD region that does not overlap with the gate wiring via the gate insulating film (as described in this specification). Area is called Loff area. In addition, off is attached to mean offset. ) Is formed.</p><p> Here, the cross-sectional view shown in FIG. 9 is the n-channel type TFT 703 shown in FIG. 8 (B) in FIG. 7 (B). It is an enlarged view which shows the state which manufactured up to the process of. As shown here, the LDD area 611 is In addition, the Lov region 611a, the Loff region 611b, and the LDD region 612 are further Lov region 612a. , Loff area 612b can be distinguished. In addition, 2 × 10 in the above-mentioned Lov regions 611a and 612a.¹⁶~5×10¹⁹atoms / cm³Phosphorus is contained at the concentration of, but the Loff regions 611b and 612b are Phosphorus is contained at a concentration of 1 to 2 times (typically 1.2 to 1.5 times).</p><p> Further, in the pixel TFT 704, the channel formation areas 613 and 614, the source area 615, N-type in contact with drain area 616, Loff area 617 to 620, Loff area 618, 619 Impurity region (a) 621 is formed. At this time, the source area 615 and the drain area 616 Are each formed in the n-type impurity region (a), and the Loff regions 617 to 620 are n-type impurity regions. It is formed in region (c).</p><p> According to this embodiment, a circuit or an element is formed according to the performance required by the pixel unit and the drive circuit. By optimizing the structure of the TFT, it is possible to improve the operating performance and reliability of semiconductor devices. Wear. Specifically, the n-channel TFT has different LDD region arrangements according to the circuit specifications. By using the Lov area or the Loff area properly, high-speed operation or e Realized a TFT structure that emphasizes countermeasures against carriers and a TFT structure that emphasizes low off-current operation Can be done.</p><p> For example, in the case of an active matrix type liquid crystal display device, the n-channel type TFT702 is high. Shift register circuit, signal division circuit, level shifter circuit, buffer circuit that emphasizes high-speed operation Suitable for drive circuits such as. That is, only on one side (drain region side) of the channel formation region By arranging the Lov region, hot carrier injection is performed while reducing the resistance component as much as possible. It is possible to achieve an operation that is resistant to deterioration. In the case of the above circuit, this is a machine in the source area and drain area. This is because the function does not change and the direction in which the carrier (electron) moves is constant. However, if necessary It is also possible to arrange the Lov region on both sides of the channel formation region.</p><p> In addition, the n-channel TFT703 emphasizes both hot carrier countermeasures and low off-current operation. Suitable for sampling circuits (sample and hold circuits). That is, the Lov region is arranged. By placing it as a countermeasure against hot carriers, by further arranging the Loff region, low off current operation The work can be achieved. Moreover, in the sampling circuit, the functions of the source region and the drain region are inverted. Since the carrier movement direction changes by 180 °, the structure is line-symmetrical around the gate wiring. Must be. In some cases, only the Lov region may be used.</p><p> In addition, the n-channel type TFT704 has a pixel section and sampling times that emphasize low off-current operation. Suitable for roads (sample hold circuit). That is, it may be a factor that increases the off-current value. Low off-current operation can be achieved by arranging only the Loff region without arranging the Lov region. Also, use the LDD region with a concentration lower than the LDD region of the drive circuit as the Loff region. Therefore, the on-current value is slightly lowered, but the off-current value can be drastically reduced. further, The n-type impurity region (a) 621 is very effective in reducing the off-current value.</p><p> The length (width) of the Lov region 607 of the n-channel TFT 702 is 0.1 to 3.0 μm. , Typically 0.2 to 1.5 μm. In addition, the Lov of the n-channel TFT703 The lengths (widths) of the regions 611a and 612a are 0.1 to 3.0 μm, typically 0.2 to 1.5 μm. The length (width) of m and Loff regions 611b and 612b is 1.0 to 3.5 μm, typically 1.5. It should be ~ 2.0 μm. In addition, the Loff area 617 to 6 provided in the pixel TFT 704 The length (width) of 20 may be 0.5 to 3.5 μm, typically 2.0 to 2.5 μm.</p><p> In addition, the configuration of the active matrix type liquid crystal display device will be explained using the perspective view of FIG. I will reveal. The active matrix substrate (first substrate) was formed on the glass substrate 801. , Pixel unit 802, gate side drive circuit 803, and source side drive circuit 804. The pixel TFT 805 in the pixel section (corresponding to the pixel TFT 704 in Fig. 8 (B)) is an n-channel type. It is a TFT and corresponds to the pixel electrode 806 and the holding capacity 807 (corresponding to the holding capacity 572 in Fig. 8 (A)). To be connected to).</p><p> Further, the drive circuit provided in the periphery is basically configured as a CMOS circuit. Gate The side drive circuit 803 and the source side drive circuit 804 are the gate wiring 808 and the source wiring, respectively. It is connected to the pixel unit 802 at 809. Also, the external input / output terminal to which the FPC810 is connected Input / output wiring (connection wiring) 812, 813 for transmitting signals to the drive circuit in child 811 Is provided. Reference numeral 814 is an opposed substrate (second substrate).</p><p> In this specification, the semiconductor device shown in FIG. 10 is used as an active matrix type liquid crystal display device. Although it is called a stand, it is a liquid crystal panel that is attached to the FPC as shown in Fig. 10. Generally called a liquid crystal module. Therefore, the active matrix type liquid crystal table referred to in this embodiment. The display device may be called a liquid crystal module.</p><p> Further, FIG. 11 shows an example of the circuit configuration of the liquid crystal display device. The liquid crystal display device of this embodiment , Source side drive circuit 901, Gate side drive circuit (A) 907, Gate side drive circuit (B) 9 11. It has a precharge circuit 912 and a pixel unit 906. In addition, in this specification, a drive circuit includes a source side drive circuit and a gate side drive circuit. It is a generic term.</p><p> The source side drive circuit 901 includes a shift register circuit 902, a level shifter circuit 903, and a battery. It is equipped with a ufffa circuit 904 and a sampling circuit 905. Also, the gate side drive circuit (A) ) 907 is a shift register circuit 908, a level shifter circuit 909, and a buffer circuit 910. It has. The gate side drive circuit (B) 911 has the same configuration.</p><p> Here, the shift register circuits 902 and 908 have a drive voltage of 5 to 16V (typically 10V). ), And the n-channel TFT used in the CMOS circuit that forms the circuit is 7 in Fig. 8 (B). The structure indicated by 02 is suitable.</p><p> The drive voltage of the level shifter circuits 903 and 909 and the buffer circuits 904 and 910 is It is as high as 14 to 16V, but like the shift register circuit, Fig. 8 (B) CMOS circuits including the n-channel TFT702 are suitable. In addition, the gate wiring is doubled A multi-gate structure such as a lugate structure or a triple gate structure is the key to each circuit. It is effective in improving reliability.</p><p> In addition, the sampling circuit 905 has a drive voltage of 14 to 16V, but the source region and drainage Since the in region is inverted and the off current value needs to be reduced, the n channels in Fig. 8 (B) CMOS circuits including the type TFT703 are suitable. In Fig. 8 (B), n-channel type T Only FT is shown, but when actually forming a sampling circuit, n-channel type TF It will be formed by combining T and p-channel TFT.</p><p> In addition, the pixel unit 906 has a drive voltage of 14 to 16V, which is higher than that of the sampling circuit 905. Furthermore, since the off-current value is required to be low, do not arrange the Lov region that causes an increase in the off-current. It is desirable to have a different structure, and the n-channel TFT 704 shown in Fig. 8 (B) is used as the pixel TFT. It is desirable to use it. </p>

<p>In this embodiment, a columnar spacer is provided in a place other than the seal region to reinforce the mechanical strength. It is shown in FIG. 13 (a) and FIG. 13 (b). This example was not shown in FIG. 8 (B). Indicates the area (external terminal connection). Therefore, it corresponds to FIG. 8 (B) of Example 1. Some of the same codes are used. The only point is that the sealant 1000 does not show a filler. It is different from Example 1.</p><p> FIG. 13 (a) shows a top view of the external terminal connection, and FIG. 13 (b) shows a cross section of the external terminal connection. A structural diagram is shown. The cross-sectional structure of the d-d'cross section in the top view is also shown.</p><p> In FIGS. 13 (a) and 13 (b), 1001 is a columnar spacer and 1002 is an outside. Terminal connection, 1003 is ITO film, 1004 is conductive spacer, 1005 is adhesive, 1 006 is an FPC.</p><p> The external terminal connection 1002 that connects to the FPC1006 is a p-channel type TFT701. It extends from the phase electrode (wiring).</p><p> In this embodiment, between the sealing area where the sealing material 1000 is present and the end of the facing substrate 574. Form columnar spacer 1001. This columnar spacer 1001 is provided between the lead-out wirings. And reinforces the mechanical strength. Further, this columnar spacer 1001 divides the facing substrate. It also has the effect of preventing poor division in the process. Here, p-channel type TF The wiring between the source electrode of the T701 and the external terminal connection is called the lead-out wiring.</p><p>Further, this columnar spacer is formed by the same process as that formed in the contact portion in Example 1. Can be formed.</p><p> In addition, the ITO film 1003 is placed on the external terminal connection 1002 by the same process as the pixel electrode. Form and form good contact with FPC. In addition, gold paste in adhesive 1005 Conductive spacers such as FPC1006 and ITO film 1 are mixed by crimping. It is connected to 003. </p>

<p>In this embodiment, the following method (FIG. 14 shows a simplified process diagram), which is different from that of the first embodiment. , FIG. 15 shows the flowchart), showing an example of forming a columnar spacer. Further, in this example, the process order is different from that in Example 1, and the columnar space is used before the alignment film is formed. Form a server.</p><p>The procedure will be briefly described with reference to FIG. First, the spacer material layer 1 on the first substrate 1100 Form 101. (Fig. 14 (a)) Next, exposure and development are performed in the same manner as in Example 1. Therefore, the columnar spacer 1102 is formed. (Fig. 14 (b)) Next, the columnar spacer 110 An alignment film 1103 covering 2 is formed and a rubbing treatment is performed. (Fig. 14 (c)) Next, orientation The second substrate 1104 provided with the film 1105 and the seal 1106 is combined with the first substrate 1100. to paste together. (Fig. 14 (d)) Next, the first substrate and the second substrate are divided into appropriate shapes. The liquid crystal panel is completed by cutting, injecting and sealing the liquid crystal material 1107. (Fig. 14 (e))</p><p> Details are shown below.</p><p> First, an active matrix substrate (first substrate) is formed in the same manner as in Example 1. Picture Exactly the same process was used up to the process of forming the elementary electrodes 569 and 570. Next, the same spacer material as in Example 1 was used on the first substrate, and the same conditions (deposition conditions, exposure) were used. Columnar spacer 1201 was formed under the conditions (conditions, development conditions, baking conditions, etc.).</p><p> Next, the alignment film 1202 was formed by covering the columnar spacer. (Fig. 16 (A)) Then, a rubbing process was performed. After that, except for these steps, the figure is exactly the same as in Example 1. The liquid crystal display device shown in 16 (B) was manufactured.</p><p> FIG. 17 (B) is an SEM observation photograph of the cross section of the columnar spacer of this example.</p><p> The shape of this columnar spacer has a flat surface on the crown, although it has a tapered portion. However, the width L1 = 7 to 8 μm and the radius of curvature was 2 μm. Also, in the center of the side surface of the columnar spacer The angle α between the tangent plane and the substrate surface was 68 °. In this example, the width L1 is oriented The value includes the thickness of the film. In this embodiment, 1 L2 / L1 2.5 Then, light leakage due to the tapered portion can be reduced, which is desirable.</p><p> Further, in Example 1, the final pretilt angle is about 4 ° to 5 ° due to the influence of the developing solution. However, in this embodiment, after forming the columnar spacer, an alignment film is formed and a rubbing treatment is performed. Therefore, the pretilt angle can be set to 6 ° to 10 °, preferably 7 ° to 8 °, and the liquid The orientation of the crystals could be improved.</p><p> Figure 27 shows the dependence of the pretilt angle on the amount of pushing roll in the rubbing roll. Rubbing roll push The amount of penetration refers to the amount of pushing the roll during the rubbing treatment applied to the alignment film. ..</p><p> In this embodiment, the rubbing roll pushing amount is 0.3 mm, 0.4 mm, 0.5 mm. Rubbing processing was performed based on the above cases, and an experiment was conducted to measure each pre-tilt angle. Experiment As a result, assuming 0.3 mm, the average pre-tilt angle is 8.23 °, which is 0.4 mm. If, the average pre-tilt angle is 7.42 °, and if 0.5 mm, the average pre-tilt angle is The pre-tilt angle was 6.95 °. By adjusting the amount of pushing the rubbing roll Therefore, the pretilt angle can be set to 6 ° to 10 °, preferably 7 ° to 8 °. like this In addition, this example is not much different from the conventional example in which the spherical spacer is sprayed on the alignment film. Value is shown.</p><p> It is possible to combine this example with Example 2. </p>

<p> In this embodiment, as shown in FIG. 18A, columnar spacers are placed at regular intervals on the entire surface of the first substrate. An example provided in is shown.</p><p> In FIG. 18 (A), 1300 is a sealing material, 1301 is a first substrate, and 1302 is a pixel portion. , 1303 is the gate side drive circuit, 1304 is the source side drive circuit, 1305 is the signal division circuit , 1306 is the external connection terminal, 1308 is the seal area, and 1321 is the second board.</p><p> In this embodiment, a columnar spacer 1307 is installed between the pixel portion and the source side drive circuit. Columnar spacer 1309 for connection terminal, columnar spacer 1310 for pixel, gate side drive circuit Columnar spacers 1311 in the seal area and columnar spacers 1312 in the seal area at regular intervals. It was provided by the photolithography method. In this way, columnar spacers are provided at regular intervals. A more uniform substrate spacing can be maintained. Also, columnar spacer 1312 in the seal area It is not necessary to use a filler by providing. In addition, a columnar spacer is attached to the external connection terminal. By providing 1309, the mechanical strength at the connection part can be reinforced. In addition, above For each columnar spacer, the manufacturing method shown in Example 1 or Example 3 may be used.</p><p> Further, FIG. 18 (B) simplifies the cross-sectional structure of the region surrounded by the dotted line 1322 in FIG. 18 (A). It was shown to. The same reference numerals as in FIG. 18 (A) were used. In Figure 18 (A), 1314 is the CMO. S circuit, 1315 is n-channel TFT, 1316 is pixel TFT, 1317 is interlayer insulating film , 1318a is a pixel electrode, and 1318b is an ITO film. This ITO film 1318b is F Provided to connect to an external terminal such as a PC. Further, 1319 is a liquid crystal material, and 1320 is a counter electrode.</p><p> In addition, FIG. 19 shows other forms of spacer arrangement. Figure 19 (A) shows the seal area 140. This is an example in which the columnar spacer 1407 is uniformly formed in 8. Further, FIG. 19 (B) shows the pixel portion. There is no columnar spacer in the seal area, and the columnar spacer 1410 is in the seal area and 1 is in the external connection terminal. This is an example of forming 409. In addition, FIG. 19 (C) shows a columnar space in a region other than the seal region. This is an example of forming the cells 1411, 1412. Similarly, each of the above columnar spacers is an example. The production method shown in 1 or Example 3 may be used.</p><p> In addition, this Example can be freely combined with Examples 1 to 3. </p>

<p> In this embodiment, an active matrix substrate (first substrate) different from that of the first embodiment is produced. To make. The details of the TFT manufacturing process of this example are described in Japanese Patent Application No. 11-104646. Use the process of.</p><p>First, a low-alkali glass substrate or a quartz substrate can be used as the substrate 1501. This implementation In the example, a low alkaline glass substrate was used. On the surface forming the TFT of this substrate 1501, Silicon oxide film, silicon nitride film or acid to prevent impurity diffusion from substrate 1501 A base film 1502 such as a silicon nitriding film is formed.</p><p>Next, a semiconduct with an amorphous structure with a thickness of 20 to 150 nm (preferably 30 to 80 nm). The body film is formed by a known method such as a plasma CVD method or a sputtering method. In this example, an amorphous silicon film was formed to a thickness of 55 nm by the plasma CVD method. Soshi A crystalline silicon film is formed from the amorphous silicon film using a known crystallization technique. Example For example, a laser crystallization method or a thermal crystallization method (solid phase growth method) may be applied. In accordance with the technique disclosed in Kaihei 7-130652, a crystallization method using a catalytic element is used. A crystalline silicon film was formed.</p><p>Then, the crystalline silicon film is divided into islands to form an island-shaped semiconductor layer. Then Plas Mass by silicon oxide film with a thickness of 50 to 100 nm by Ma CVD method or sputtering method Form a layer. Then, a resist mask is provided to form an n-channel TFT. 1x10 for the purpose of controlling the threshold voltage over the entire body layer¹⁶~5×10¹⁷atoms / cm³Degree of darkness Boron (B) was added as an impurity element that imparts p-type in degrees. Next, the drive circuit n In order to form the LDD region of the channel type TFT, the impurity element that imparts n type is an island-shaped semiconductor. Selectively add to the layer. Therefore, a resist mask was formed in advance. Then the mask A step of removing the layer with hydrofluoric acid or the like to activate the added impurity element is performed. activation Is a method for heat treatment and laser activation at 500 to 600 ° C for 1 to 4 hours in a nitrogen atmosphere. Can be done more. Further, both may be used in combination. In this embodiment, laser activity The method of sexualization was used.</p><p> Then, the gate insulating film 1520 is subjected to 10 to 1 using a plasma CVD method or a sputtering method. It is formed of an insulating film containing silicon with a thickness of 50 nm. Next, in this embodiment, conductive nitriding Conductive layer (A) made of metal film and conductive layer (B) made of metal film And were laminated. The conductive layer (B) is tantalum (Ta), titanium (Ti), molybdenum (Mo). ), Tungsten (W), or an alloy containing the element as a main component, or the above. Formed with an alloy film that combines elements (typically Mo-W alloy film, Mo-Ta alloy film) The conductive layer (A) is tantalum nitride (TaN), tungsten nitride (WN), and titanium nitride. (TiN) film, molybdenum nitride (MoN) Formed with. In this embodiment, a tantalum nitride film having a thickness of 30 nm is applied to the conductive layer (A). A 350 nm Ta film was used for (B), and all of them were formed by a sputtering method.</p><p>Next, a resist mask is formed, and the conductive layer (A) and the conductive layer (B) are etched at once. The gate electrodes 1528 to 1531 and the capacitance wiring 132 are formed.</p><p>Next, in order to form the source region and drain region of the p-channel TFT of the drive circuit. In addition, a step of adding an impurity element that imparts p-type is performed. Here, the gate electrode 1528 As a mask, an impurity region is formed in a self-aligned manner. At this time, the n-channel TFT is formed. The formed area is covered with a resist mask.</p><p> Next, in an n-channel TFT, it does not function as a source area or a drain area. A pure region was formed.</p><p> Then, the n-type for forming the LDD region of the n-channel type TFT of the pixel matrix circuit. The step of adding impurities was performed. Then n-type or n-type added at each concentration Activated by Furnace anneal method in a nitrogen atmosphere to activate the impurity element that imparts p-type. A sexualization process was performed. By the heat treatment of the activation process carried out here, the n-channel type TFT And the catalytic element can be gettered from the channel formation region of the p-channel TFT. Came. In this heat treatment, on the surface of the gate electrodes 1528 to 1531 and the capacitive wiring 1532. A metal nitride layer is formed. Further, a step of hydrogenating the island-shaped semiconductor layer was performed.</p><p> After the activation and hydrogenation steps are complete, gate wiring 1547, 1548 and capacitive wiring 1 Formed 549.</p><p> The first interlayer insulating film 1550 is a silicon oxide film or oxidation with a thickness of 500 to 1500 nm. A source region formed of a silicon nitride film and then formed on each island-shaped semiconductor layer. Or form a contact hole that reaches the drain area, with source wiring 1551 ~ 1554 , Drain wiring 1555 ~ 1558 is formed. Next, the passivation film 1559 Silicon nitride film, silicon oxide film, or silicon nitride film with 50 to 500 nm ( It is typically formed with a thickness of 100 to 300 nm).</p><p> After that, a second interlayer insulating film 1560 made of an organic resin is formed into a thickness of 1.0 to 1.5 μm. To be done. Then, a contact that reaches the drain wiring 1558 to the second interlayer insulating film 1560. Holes are formed to form pixel electrodes 1561 and 1562. Pixel electrode is a transmissive liquid crystal display A transparent conductive film may be used when the device is used, and gold is used when the device is a reflective liquid crystal display device. A genus membrane may be used.</p><p> The columnar spacer 1607 is then formed. This columnar spacer 1607 is in Example 3. Since it is the same as the spacer manufacturing process, it is omitted. Next, the columnar spacer 1 is the same as in Example 3. An alignment film 1601 covering 607 is formed. After forming the alignment film, rubbing treatment is applied to the liquid. Crystal molecules are oriented with a certain pretilt angle (6 ° to 10 °, preferably 7 ° to 8 °) I tried to do it. On the opposite substrate 1602 on the opposite side, a light-shielding film 1603 and a transparent conductive film 1604 And the alignment film 1605 was formed. Then, the pixel matrix circuit and the active matrix board on which the CMOS circuit is formed The facing substrate is bonded to each other by a known cell assembly process. After that, the liquid crystal material between the two substrates Charge 1606 was injected and completely sealed with a sealant (not shown). Known for liquid crystal materials A liquid crystal material may be used. In this way, the active matrix type liquid crystal display shown in FIG. 20 The device is complete.</p><p> In FIG. 20, the drive circuit is a p-channel type TFT1701 and a first n-channel type TF. T1702, second n-channel type TFT1703, pixel TFT1704 in the display area, A holding capacity of 1705 is formed.</p><p> In addition, this Example can be freely combined with Examples 1 to 4. </p>

<p> In this example, an example in which a display device is manufactured using a TFT different from the above example is shown. Su.</p><p> Although the top gate type TFT was used in the above embodiment, the bottom gate type TFT was used in this embodiment. A first substrate is made using TFT.</p><p>In Fig. 21, 1814 is a CMOS circuit, 1815 is an n-channel TFT, and 1816 is an n-channel TFT. Pixel TFT, 1817 is an interlayer insulating film, 1818a is a pixel electrode, and 1818b is an ITO film. To. This ITO film 1818b is provided to connect to an external terminal such as an FPC. Also 1 819 is a liquid crystal material and 1820 is a counter electrode. 1801 is the first board, 1808 Is the seal area and 1821 is the second substrate.</p><p> Further, in this embodiment, the columnar spacer 1807 between the pixel portion and the source side drive circuit, Columnar spacer 1809 for external connection terminal, columnar spacer 1810 for pixel, gate side drive Columnar spacers 1811 in the circuit and columnar spacers 1812 in the seal area at regular intervals. It was provided by the photolithography method. In this way, columnar spacers are provided at regular intervals. Therefore, a uniform substrate spacing can be maintained. Also, a columnar spacer 18 in the seal area By providing 12, it is not necessary to use a filler. In addition, there is a columnar space on the external connection terminal. The mechanical strength at the connection can be reinforced by providing the servicer 1809. It should be noted that For each of the above columnar spacers, the manufacturing method shown in Example 1 or Example 3 may be used.</p><p> The manufacturing process for obtaining the TFT structure may be performed by using a known technique, and is particularly limited. I can't.</p><p> In addition, this Example can be freely combined with Examples 1 to 4. </p>

<p> In this embodiment, the columnar spacer of the present invention is applied to a liquid crystal display device provided with a touch panel. The case will be described with reference to FIGS. 22 (a) and 22 (b).</p><p> FIG. 22 (a) shows an external view of a personal digital assistant equipped with the optical touch panel 3002. It is also a cross-sectional view.</p><p> In Fig. 22 (a), 3001 is a digital camera, 3002 is a touch panel, and 300. 3 is a liquid crystal panel, 3004 is an LED backlight, 3100 is a light emitting element, and 3200 is a light receiving element. It is an element.</p><p> In a display device equipped with this touch panel, a fingertip or a fingertip is placed on the surface of the touch panel 3002. When the pen tip touches, a part of the optical path a from the light emitting element 3100 provided at the edge of the panel is blocked. And a part of the light goes to the optical path b. Then, a light emitting element in which a part of the optical path a is blocked. Since the light receiving element 3200 corresponding to the above does not receive light, it can detect the temporal position change of the touched part. Can be put out.</p><p> In this example, the columnar spacer 3005 of the present invention was used for the liquid crystal panel 3003. This The columnar spacer is formed by the production method described in Example 1 or Example 3. This As a result, the mechanical strength was reinforced and a sturdy panel could be obtained. In addition, the present invention Due to the columnar spacer, the board spacing is increased by external pressure (from the fingertip or pen tip). Since it does not change much, the displayed image is not easily disturbed.</p><p> In this embodiment, a transmissive LCD panel using an LED backlight was used. A reflective LCD panel that does not use a back light may be used. Also, depending on the amount of outside light, Therefore, an LCD panel that can be switched between a reflective type and a transmissive type may be used.</p><p> FIG. 22 (b) is an external view of a personal digital assistant equipped with a pen input type touch panel 3102. And a cross-sectional view.</p><p> In FIG. 22 (b), 3102 is a touch panel, 3103 is a liquid crystal panel, and 3104 is a liquid crystal panel. The backlight, 3105, is an input pen.</p><p> In a display device equipped with this touch panel, the surface of the touch panel 3102 is pressure-sensitive. And a capacitance type detection element is provided. When touched with the input pen 3105, the detection element It is possible to detect a change in position over time.</p><p> In this example, the columnar spacer 3106 of the present invention was used for the liquid crystal panel 3103. This The columnar spacer is formed by the production method described in Example 1 or Example 3. This As a result, the mechanical strength was reinforced and a sturdy panel could be obtained. In addition, the present invention Due to the columnar spacer, the board spacing is increased by external pressure (from the fingertip or pen tip). Since it does not change much, the displayed image is not easily disturbed. The touch panel 3102 provided with such a pressure-sensitive or capacitive detection element is L. Since it is in direct contact with the CD panel 3103, the LCD panel 3103 receives external pressure. Easy and effective.</p><p> The configuration of this embodiment can be freely combined with any of the configurations of Examples 1 to 6. It is possible. </p>

<p> In this embodiment, when the present invention is applied to a reflective liquid crystal display device manufactured on a silicon substrate. Will be described. In this example, in Example 1, a substitute for an active layer made of a crystalline silicon film. Instead, an impurity source that directly imparts n-type or p-type to a silicon substrate (silicon wafer). A TFT structure may be realized by adding an element. Also, since it is a reflective type, it is anti-pixel electrode. Highly projectile metal films (eg aluminum, silver, or alloys of these (Al-Ag alloys), etc. Should be used.</p><p> The configuration of this embodiment can be freely combined with any of the configurations of Examples 1 to 7. It is possible. </p>

<p> According to the present invention, when an interlayer insulating film is formed on a conventional MOSFET and a TFT is formed on the interlayer insulating film. It can also be used. That is, it is also possible to realize a semiconductor device having a three-dimensional structure. Also, as a board, SIMOX, Smart-Cut (registered trademark of SOITEC), ELTRA It is also possible to use an SOI substrate such as N (registered trademark of Canon Inc.).</p><p> The configuration of this embodiment can be freely combined with any of the configurations of Examples 1 to 8. It is possible. </p>

<p> The present invention is suitable for active matrix type EL (electroluminescence) displays. It is also possible to use it. An example is shown in FIG.</p><p> FIG. 23 is a circuit diagram of an active matrix type EL display. 11 represents the pixel part A drive circuit 12 in the X direction and a drive circuit 13 in the Y direction are provided around the drive circuit 12. Ma In addition, each pixel of the display area 11 has a switch TFT 14, a holding capacity 15, and a current control TFT. 16, has an organic EL element 17, and has an X-direction signal line 18a (or 1) on the switch TFT14. 8b), Y direction signal line 19a (or 19b, 19c) is connected. Also, TF for current control Power lines 20a and 20b are connected to T16.</p><p>In the active matrix type EL display of this embodiment, the X direction drive circuit 12 and the Y direction The TFT used in the drive circuit 13 is the p-channel type TFT701, n-channel shown in Fig. 8 (B). Formed in combination with type TFT 702 or 703. In addition, TFT14 for switches and electricity The TFT of the flow control TFT 16 is formed by the n-channel type TFT 704 shown in FIG. 8 (B).</p>

<p> The liquid crystal display device produced by the present invention can use various liquid crystal materials. Such materials include TN liquid crystal, PDLC (polymer-dispersed liquid crystal), FLC (ferroelectricity). Liquid crystals), AFLCs (anti-strongly attracting liquid crystals), or mixtures of FLC and AFLC.</p><p> For example, "H. Furue et al .; Charakteristics and Drivng Scheme of Polymer-Stabiliz ed Monostable FLCD Exhibiting Fast Response Time and High Contrast Ratio with Gr ay-Scale Capability, SID, 1998 , T. Yoshida et al .; A Full-Color Thresholdless An tiferroelectric LCD Exhibiting Wide Viewing Angle with Fast Response Time, 841, SI Materials disclosed in D97 DIGEST, 1997 "or US Pat. No. 5,594,569 can be used. To.</p><p> In particular, there is no threshold (no threshold) antiferroelectric liquid crystal (Thresholdless Antiferroelectric). When using ric LCD (abbreviated as TL-AFLC), the operating voltage of the liquid crystal is lowered to about ± 2.5V. Since it can be reduced, the power supply voltage may be about 5 to 8V. That is, it is possible to operate the driver circuit and the pixel matrix circuit with the same power supply voltage. Therefore, the power consumption of the entire liquid crystal display device can be reduced.</p><p> In addition, some non-ferroelectric antiferroelectric liquid crystals exhibit a V-shaped electro-optical response characteristic. Some have been found to have a drive voltage of about ± 2.5 V (cell thickness of about 1 μm to 2 μm).</p><p> Here, with respect to the applied voltage of the non-ferroelectric mixed liquid crystal showing a V-shaped electro-optical response. The characteristics of the light transmittance are shown in FIG. The vertical axis of the graph shown in FIG. 24 is the transmittance (arbitrary unit) and the horizontal axis. The axis is the applied voltage. The transmission axis of the polarizing plate on the incident side of the liquid crystal panel is the liquid crystal panel. Normal of smectic layer of non-ferroelectric mixed liquid crystal that almost matches the rubbing direction of It is set almost parallel to the direction. The transmission axis of the polarizing plate on the emitting side is that of the polarizing plate on the incident side. It is set almost perpendicular to the transmission axis (cross Nicol).</p><p> In addition, ferroelectric liquid crystals and antiferroelectric liquid crystals have the advantage of faster response speed than TN liquid crystals. Have. Crystalline TFTs such as those used in the above examples will realize TFTs with extremely high operating speeds. Therefore, the image response speed that fully utilizes the response speed of the ferroelectric liquid crystal and the antiferroelectric liquid crystal. It is possible to realize a fast liquid crystal display device.</p><p> The liquid crystal display device of this embodiment is used as a display display device for an electronic device such as a personal computer. Needless to say, it is effective to use it as a ray.</p><p> In addition, the configuration of this embodiment can be freely combined with any of the configurations of Examples 1 to 10. Is possible.</p>

<p> The TFT formed by carrying out the present invention can be used in various electro-optical devices. That is, The present invention can be applied to all electronic devices incorporating these electro-optical devices as display units.</p><p> Such electronic devices include video cameras, digital cameras, and head-mounted displays. Ray (goggles type display), wearable display, car navigation, pa -Sonal computer, personal digital assistant (mobile computer, mobile phone or e-book) Etc.) and so on. An example of them is shown in FIG.</p><p> Fig. 25 (A) shows a personal computer, which is the main body 2001, the image input unit 2002, It consists of a display unit 2003 and a keyboard 2004. The present invention is described in the image input unit 2002, table. It can be applied to the display 2003 and other drive circuits.</p><p> FIG. 25 (B) shows a video camera, which is a main body 2101, display unit 2102, and audio input unit 21. It consists of 03, operation switch 2104, battery 2105, and image receiving unit 2106. Application The invention can be applied to the display unit 2102, audio input unit 2103 and other drive circuits. ..</p><p> Figure 25 (C) shows a mobile computer (mobile computer), which is the main body 2201. , Camera unit 2202, image receiving unit 2203, operation switch 2204, display unit 2205 Is done. The present invention can be applied to the display unit 2205 and other drive circuits.</p><p> Figure 25 (D) shows a goggle-type display, which includes the main unit 2301, the display unit 2302, and the aer. It is composed of 2303 parts. The present invention is applied to the display unit 2302 and other drive circuits. Can be done.</p><p> FIG. 25 (E) shows a pre-recording medium (hereinafter referred to as a recording medium) on which the program is recorded. -Yar, main unit 2401, display unit 2402, speaker unit 2403, recording medium 2404 , Consists of operation switch 2405. This device is a DVD (Dig) as a recording medium. Using tial Versatile Disc), CD, etc., listening to music, watching movies, and playing games You can do the internet and the internet. The present invention applies to the display unit 2402 and other drive circuits. Can be applied.</p><p> Figure 25 (F) shows a digital camera, which is the main body 2501, the display 2502, and the eyepiece 250. 3. Consists of operation switch 2504 and image receiving unit (not shown). Display section 25 of the present invention It can be applied to 02 and other drive circuits.</p><p> As described above, the scope of application of the present invention is extremely wide, and it can be applied to electronic devices in all fields. And is possible. In addition, how the electronic devices of this embodiment are described in Examples 1 to 9 and Example 11. It can also be realized by using a configuration consisting of various combinations. </p>

<p> The TFT formed by carrying out the present invention can be used in various electro-optical devices. That is, The present invention can be applied to all electronic devices incorporating these electro-optical devices as display units.</p><p> Examples of such electronic devices include projectors (rear type or front type). Is done. An example of them is shown in FIG.</p><p> FIG. 26 (A) shows a front-type projector, which is a projector 2601 and a screen 26. Including 02 etc. The present invention relates to a liquid crystal display device 2808 and the like, which form a part of the projection device 2601. It can be applied to other drive circuits.</p><p> Figure 26 (B) shows the rear projector, which includes the main unit 2701, projection device 2702, and Mira. -Includes 2703, screen 2704, etc. The present invention constitutes a part of the projection device 2702. It can be applied to the liquid crystal display device 2808 and other drive circuits.</p><p> Note that FIG. 26 (C) shows the projection device 2601 in FIGS. 26 (A) and 26 (B). It is a figure which showed an example of the structure of 2702. The projection devices 2601 and 2702 are the light source optical system 2 801, Mirror 2802, 2804 ~ 2806, Dichroic Mirror 2803, Pris 2807, liquid crystal display 2808, retardation plate 2809, projection optical system 2810 To. The projection optical system 2810 is composed of an optical system including a projection lens. This embodiment is a three-plate type An example is shown, but the present invention is not particularly limited, and for example, a single plate type may be used. Also, in Fig. 26 (C) In the optical path indicated by the arrow, the practitioner appropriately uses an optical lens, a film having a polarizing function, or the like. An optical system such as a film or an IR film for adjusting the phase difference may be provided.</p><p> Further, FIG. 26 (D) shows an example of the structure of the light source optical system 2801 in FIG. 26 (C). It is a figure. In this embodiment, the light source optical system 2801 has a reflector 2811 and a light source 28. 12, lens array 2813, 2814, polarization conversion element 2815, condenser lens 2816 It is composed. The light source optical system shown in FIG. 26 (D) is an example and is not particularly limited. For example, an optical lens, a film having a polarizing function, or a phase of the light source optical system An optical system such as a film for adjusting the difference or an IR film may be provided.</p><p> However, in the projector shown in FIG. 26, when a transmissive electro-optic device is used. The case is shown, and an application example in a reflection type electro-optic device and an EL display device is not shown.</p><p> As described above, the scope of application of the present invention is extremely wide, and it can be applied to electronic devices in all fields. And is possible. In addition, how the electronic devices of this embodiment are described in Examples 1 to 9 and Example 11. It can also be realized by using a configuration consisting of various combinations.</p>